diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-02 00:49:07 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-11-02 00:49:07 -0500 |
commit | d8762748cae4f85b3201c0304969d993b42d5258 (patch) | |
tree | 559819d9b17e5ee305d705cf9f31ac5de2aab54a /drivers/char/drm/mga_warp.c | |
parent | ce4633704038f9bf39f20c10691747d6fc127bf4 (diff) | |
parent | a4e62fa031a9681477207b08391c3a5c5c831ce7 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/airlied/drm-2.6
Manual fixups for some clashes due to re-indenting.
Diffstat (limited to 'drivers/char/drm/mga_warp.c')
-rw-r--r-- | drivers/char/drm/mga_warp.c | 120 |
1 files changed, 57 insertions, 63 deletions
diff --git a/drivers/char/drm/mga_warp.c b/drivers/char/drm/mga_warp.c index 55ccc8a0ac29..d67f4925fbac 100644 --- a/drivers/char/drm/mga_warp.c +++ b/drivers/char/drm/mga_warp.c | |||
@@ -33,8 +33,7 @@ | |||
33 | #include "mga_drv.h" | 33 | #include "mga_drv.h" |
34 | #include "mga_ucode.h" | 34 | #include "mga_ucode.h" |
35 | 35 | ||
36 | 36 | #define MGA_WARP_CODE_ALIGN 256 /* in bytes */ | |
37 | #define MGA_WARP_CODE_ALIGN 256 /* in bytes */ | ||
38 | 37 | ||
39 | #define WARP_UCODE_SIZE( which ) \ | 38 | #define WARP_UCODE_SIZE( which ) \ |
40 | ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) | 39 | ((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN) |
@@ -49,33 +48,30 @@ do { \ | |||
49 | } while (0) | 48 | } while (0) |
50 | 49 | ||
51 | static const unsigned int mga_warp_g400_microcode_size = | 50 | static const unsigned int mga_warp_g400_microcode_size = |
52 | (WARP_UCODE_SIZE(warp_g400_tgz) + | 51 | (WARP_UCODE_SIZE(warp_g400_tgz) + |
53 | WARP_UCODE_SIZE(warp_g400_tgza) + | 52 | WARP_UCODE_SIZE(warp_g400_tgza) + |
54 | WARP_UCODE_SIZE(warp_g400_tgzaf) + | 53 | WARP_UCODE_SIZE(warp_g400_tgzaf) + |
55 | WARP_UCODE_SIZE(warp_g400_tgzf) + | 54 | WARP_UCODE_SIZE(warp_g400_tgzf) + |
56 | WARP_UCODE_SIZE(warp_g400_tgzs) + | 55 | WARP_UCODE_SIZE(warp_g400_tgzs) + |
57 | WARP_UCODE_SIZE(warp_g400_tgzsa) + | 56 | WARP_UCODE_SIZE(warp_g400_tgzsa) + |
58 | WARP_UCODE_SIZE(warp_g400_tgzsaf) + | 57 | WARP_UCODE_SIZE(warp_g400_tgzsaf) + |
59 | WARP_UCODE_SIZE(warp_g400_tgzsf) + | 58 | WARP_UCODE_SIZE(warp_g400_tgzsf) + |
60 | WARP_UCODE_SIZE(warp_g400_t2gz) + | 59 | WARP_UCODE_SIZE(warp_g400_t2gz) + |
61 | WARP_UCODE_SIZE(warp_g400_t2gza) + | 60 | WARP_UCODE_SIZE(warp_g400_t2gza) + |
62 | WARP_UCODE_SIZE(warp_g400_t2gzaf) + | 61 | WARP_UCODE_SIZE(warp_g400_t2gzaf) + |
63 | WARP_UCODE_SIZE(warp_g400_t2gzf) + | 62 | WARP_UCODE_SIZE(warp_g400_t2gzf) + |
64 | WARP_UCODE_SIZE(warp_g400_t2gzs) + | 63 | WARP_UCODE_SIZE(warp_g400_t2gzs) + |
65 | WARP_UCODE_SIZE(warp_g400_t2gzsa) + | 64 | WARP_UCODE_SIZE(warp_g400_t2gzsa) + |
66 | WARP_UCODE_SIZE(warp_g400_t2gzsaf) + | 65 | WARP_UCODE_SIZE(warp_g400_t2gzsaf) + WARP_UCODE_SIZE(warp_g400_t2gzsf)); |
67 | WARP_UCODE_SIZE(warp_g400_t2gzsf)); | ||
68 | 66 | ||
69 | static const unsigned int mga_warp_g200_microcode_size = | 67 | static const unsigned int mga_warp_g200_microcode_size = |
70 | (WARP_UCODE_SIZE(warp_g200_tgz) + | 68 | (WARP_UCODE_SIZE(warp_g200_tgz) + |
71 | WARP_UCODE_SIZE(warp_g200_tgza) + | 69 | WARP_UCODE_SIZE(warp_g200_tgza) + |
72 | WARP_UCODE_SIZE(warp_g200_tgzaf) + | 70 | WARP_UCODE_SIZE(warp_g200_tgzaf) + |
73 | WARP_UCODE_SIZE(warp_g200_tgzf) + | 71 | WARP_UCODE_SIZE(warp_g200_tgzf) + |
74 | WARP_UCODE_SIZE(warp_g200_tgzs) + | 72 | WARP_UCODE_SIZE(warp_g200_tgzs) + |
75 | WARP_UCODE_SIZE(warp_g200_tgzsa) + | 73 | WARP_UCODE_SIZE(warp_g200_tgzsa) + |
76 | WARP_UCODE_SIZE(warp_g200_tgzsaf) + | 74 | WARP_UCODE_SIZE(warp_g200_tgzsaf) + WARP_UCODE_SIZE(warp_g200_tgzsf)); |
77 | WARP_UCODE_SIZE(warp_g200_tgzsf)); | ||
78 | |||
79 | 75 | ||
80 | unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) | 76 | unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) |
81 | { | 77 | { |
@@ -90,36 +86,35 @@ unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) | |||
90 | } | 86 | } |
91 | } | 87 | } |
92 | 88 | ||
93 | static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv ) | 89 | static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv) |
94 | { | 90 | { |
95 | unsigned char *vcbase = dev_priv->warp->handle; | 91 | unsigned char *vcbase = dev_priv->warp->handle; |
96 | unsigned long pcbase = dev_priv->warp->offset; | 92 | unsigned long pcbase = dev_priv->warp->offset; |
97 | 93 | ||
98 | memset( dev_priv->warp_pipe_phys, 0, | 94 | memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); |
99 | sizeof(dev_priv->warp_pipe_phys) ); | 95 | |
100 | 96 | WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ); | |
101 | WARP_UCODE_INSTALL( warp_g400_tgz, MGA_WARP_TGZ ); | 97 | WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF); |
102 | WARP_UCODE_INSTALL( warp_g400_tgzf, MGA_WARP_TGZF ); | 98 | WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA); |
103 | WARP_UCODE_INSTALL( warp_g400_tgza, MGA_WARP_TGZA ); | 99 | WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF); |
104 | WARP_UCODE_INSTALL( warp_g400_tgzaf, MGA_WARP_TGZAF ); | 100 | WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS); |
105 | WARP_UCODE_INSTALL( warp_g400_tgzs, MGA_WARP_TGZS ); | 101 | WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF); |
106 | WARP_UCODE_INSTALL( warp_g400_tgzsf, MGA_WARP_TGZSF ); | 102 | WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA); |
107 | WARP_UCODE_INSTALL( warp_g400_tgzsa, MGA_WARP_TGZSA ); | 103 | WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF); |
108 | WARP_UCODE_INSTALL( warp_g400_tgzsaf, MGA_WARP_TGZSAF ); | 104 | |
109 | 105 | WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ); | |
110 | WARP_UCODE_INSTALL( warp_g400_t2gz, MGA_WARP_T2GZ ); | 106 | WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF); |
111 | WARP_UCODE_INSTALL( warp_g400_t2gzf, MGA_WARP_T2GZF ); | 107 | WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA); |
112 | WARP_UCODE_INSTALL( warp_g400_t2gza, MGA_WARP_T2GZA ); | 108 | WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF); |
113 | WARP_UCODE_INSTALL( warp_g400_t2gzaf, MGA_WARP_T2GZAF ); | 109 | WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS); |
114 | WARP_UCODE_INSTALL( warp_g400_t2gzs, MGA_WARP_T2GZS ); | 110 | WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF); |
115 | WARP_UCODE_INSTALL( warp_g400_t2gzsf, MGA_WARP_T2GZSF ); | 111 | WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA); |
116 | WARP_UCODE_INSTALL( warp_g400_t2gzsa, MGA_WARP_T2GZSA ); | 112 | WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF); |
117 | WARP_UCODE_INSTALL( warp_g400_t2gzsaf, MGA_WARP_T2GZSAF ); | ||
118 | 113 | ||
119 | return 0; | 114 | return 0; |
120 | } | 115 | } |
121 | 116 | ||
122 | static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv ) | 117 | static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv) |
123 | { | 118 | { |
124 | unsigned char *vcbase = dev_priv->warp->handle; | 119 | unsigned char *vcbase = dev_priv->warp->handle; |
125 | unsigned long pcbase = dev_priv->warp->offset; | 120 | unsigned long pcbase = dev_priv->warp->offset; |
@@ -138,7 +133,7 @@ static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv ) | |||
138 | return 0; | 133 | return 0; |
139 | } | 134 | } |
140 | 135 | ||
141 | int mga_warp_install_microcode( drm_mga_private_t *dev_priv ) | 136 | int mga_warp_install_microcode(drm_mga_private_t * dev_priv) |
142 | { | 137 | { |
143 | const unsigned int size = mga_warp_microcode_size(dev_priv); | 138 | const unsigned int size = mga_warp_microcode_size(dev_priv); |
144 | 139 | ||
@@ -154,7 +149,7 @@ int mga_warp_install_microcode( drm_mga_private_t *dev_priv ) | |||
154 | case MGA_CARD_TYPE_G550: | 149 | case MGA_CARD_TYPE_G550: |
155 | return mga_warp_install_g400_microcode(dev_priv); | 150 | return mga_warp_install_g400_microcode(dev_priv); |
156 | case MGA_CARD_TYPE_G200: | 151 | case MGA_CARD_TYPE_G200: |
157 | return mga_warp_install_g200_microcode( dev_priv ); | 152 | return mga_warp_install_g200_microcode(dev_priv); |
158 | default: | 153 | default: |
159 | return DRM_ERR(EINVAL); | 154 | return DRM_ERR(EINVAL); |
160 | } | 155 | } |
@@ -162,13 +157,13 @@ int mga_warp_install_microcode( drm_mga_private_t *dev_priv ) | |||
162 | 157 | ||
163 | #define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) | 158 | #define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) |
164 | 159 | ||
165 | int mga_warp_init( drm_mga_private_t *dev_priv ) | 160 | int mga_warp_init(drm_mga_private_t * dev_priv) |
166 | { | 161 | { |
167 | u32 wmisc; | 162 | u32 wmisc; |
168 | 163 | ||
169 | /* FIXME: Get rid of these damned magic numbers... | 164 | /* FIXME: Get rid of these damned magic numbers... |
170 | */ | 165 | */ |
171 | switch ( dev_priv->chipset ) { | 166 | switch (dev_priv->chipset) { |
172 | case MGA_CARD_TYPE_G400: | 167 | case MGA_CARD_TYPE_G400: |
173 | case MGA_CARD_TYPE_G550: | 168 | case MGA_CARD_TYPE_G550: |
174 | MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND); | 169 | MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND); |
@@ -177,21 +172,20 @@ int mga_warp_init( drm_mga_private_t *dev_priv ) | |||
177 | MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000); | 172 | MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000); |
178 | break; | 173 | break; |
179 | case MGA_CARD_TYPE_G200: | 174 | case MGA_CARD_TYPE_G200: |
180 | MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND ); | 175 | MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND); |
181 | MGA_WRITE( MGA_WGETMSB, 0x1606 ); | 176 | MGA_WRITE(MGA_WGETMSB, 0x1606); |
182 | MGA_WRITE( MGA_WVRTXSZ, 7 ); | 177 | MGA_WRITE(MGA_WVRTXSZ, 7); |
183 | break; | 178 | break; |
184 | default: | 179 | default: |
185 | return DRM_ERR(EINVAL); | 180 | return DRM_ERR(EINVAL); |
186 | } | 181 | } |
187 | 182 | ||
188 | MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE | | 183 | MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE | |
189 | MGA_WMASTER_ENABLE | | 184 | MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE)); |
190 | MGA_WCACHEFLUSH_ENABLE) ); | 185 | wmisc = MGA_READ(MGA_WMISC); |
191 | wmisc = MGA_READ( MGA_WMISC ); | 186 | if (wmisc != WMISC_EXPECTED) { |
192 | if ( wmisc != WMISC_EXPECTED ) { | 187 | DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n", |
193 | DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n", | 188 | wmisc, WMISC_EXPECTED); |
194 | wmisc, WMISC_EXPECTED ); | ||
195 | return DRM_ERR(EINVAL); | 189 | return DRM_ERR(EINVAL); |
196 | } | 190 | } |
197 | 191 | ||