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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-08-28 18:15:03 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-09-08 16:20:16 -0400
commitfdfb58a965486d2afea4ef0f9b8153dab9b98b2e (patch)
treea67a1feac243119c776344f5cac582269f018578 /drivers/char/agp
parent210b23c2f7b9721afb0a57459b7dbac3b094862e (diff)
intel-gtt: i830: adjust ioremap of regs and gtt to i9xx
This way around this can be extracted into common code. Also use a common cleanup function (and give it a generic name). Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/char/agp')
-rw-r--r--drivers/char/agp/intel-gtt.c41
1 files changed, 23 insertions, 18 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index cd0fd1479e5d..7359fbe94428 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -883,6 +883,7 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
883 int page_order, ret; 883 int page_order, ret;
884 struct aper_size_info_fixed *size; 884 struct aper_size_info_fixed *size;
885 int num_entries; 885 int num_entries;
886 int gtt_map_size;
886 u32 temp; 887 u32 temp;
887 888
888 size = agp_bridge->current_size; 889 size = agp_bridge->current_size;
@@ -893,10 +894,19 @@ static int intel_i830_create_gatt_table(struct agp_bridge_data *bridge)
893 pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &temp); 894 pci_read_config_dword(intel_private.pcidev, I810_MMADDR, &temp);
894 temp &= 0xfff80000; 895 temp &= 0xfff80000;
895 896
896 intel_private.registers = ioremap(temp, 128 * 4096); 897 intel_private.registers = ioremap(temp, KB(64));
897 if (!intel_private.registers) 898 if (!intel_private.registers)
898 return -ENOMEM; 899 return -ENOMEM;
899 900
901 intel_private.base.gtt_total_entries = intel_gtt_total_entries();
902 gtt_map_size = intel_private.base.gtt_total_entries * 4;
903
904 intel_private.gtt = ioremap(temp + I810_PTE_BASE, gtt_map_size);
905 if (!intel_private.gtt) {
906 iounmap(intel_private.registers);
907 return -ENOMEM;
908 }
909
900 temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; 910 temp = readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000;
901 global_cache_flush(); /* FIXME: ?? */ 911 global_cache_flush(); /* FIXME: ?? */
902 912
@@ -940,9 +950,9 @@ static int intel_i830_configure(void)
940 950
941 if (agp_bridge->driver->needs_scratch_page) { 951 if (agp_bridge->driver->needs_scratch_page) {
942 for (i = intel_private.base.gtt_stolen_entries; i < current_size->num_entries; i++) { 952 for (i = intel_private.base.gtt_stolen_entries; i < current_size->num_entries; i++) {
943 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); 953 writel(agp_bridge->scratch_page, intel_private.gtt+i);
944 } 954 }
945 readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); /* PCI Posting. */ 955 readl(intel_private.gtt+i-1); /* PCI Posting. */
946 } 956 }
947 957
948 global_cache_flush(); 958 global_cache_flush();
@@ -951,11 +961,6 @@ static int intel_i830_configure(void)
951 return 0; 961 return 0;
952} 962}
953 963
954static void intel_i830_cleanup(void)
955{
956 iounmap(intel_private.registers);
957}
958
959static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start, 964static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
960 int type) 965 int type)
961{ 966{
@@ -1002,9 +1007,9 @@ static int intel_i830_insert_entries(struct agp_memory *mem, off_t pg_start,
1002 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { 1007 for (i = 0, j = pg_start; i < mem->page_count; i++, j++) {
1003 writel(agp_bridge->driver->mask_memory(agp_bridge, 1008 writel(agp_bridge->driver->mask_memory(agp_bridge,
1004 page_to_phys(mem->pages[i]), mask_type), 1009 page_to_phys(mem->pages[i]), mask_type),
1005 intel_private.registers+I810_PTE_BASE+(j*4)); 1010 intel_private.gtt+j);
1006 } 1011 }
1007 readl(intel_private.registers+I810_PTE_BASE+((j-1)*4)); 1012 readl(intel_private.gtt+j-1);
1008 1013
1009out: 1014out:
1010 ret = 0; 1015 ret = 0;
@@ -1028,9 +1033,9 @@ static int intel_i830_remove_entries(struct agp_memory *mem, off_t pg_start,
1028 } 1033 }
1029 1034
1030 for (i = pg_start; i < (mem->page_count + pg_start); i++) { 1035 for (i = pg_start; i < (mem->page_count + pg_start); i++) {
1031 writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); 1036 writel(agp_bridge->scratch_page, intel_private.gtt+i);
1032 } 1037 }
1033 readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); 1038 readl(intel_private.gtt+i-1);
1034 1039
1035 return 0; 1040 return 0;
1036} 1041}
@@ -1171,7 +1176,7 @@ static int intel_i9xx_configure(void)
1171 return 0; 1176 return 0;
1172} 1177}
1173 1178
1174static void intel_i915_cleanup(void) 1179static void intel_gtt_cleanup(void)
1175{ 1180{
1176 if (intel_private.i9xx_flush_page) 1181 if (intel_private.i9xx_flush_page)
1177 iounmap(intel_private.i9xx_flush_page); 1182 iounmap(intel_private.i9xx_flush_page);
@@ -1444,7 +1449,7 @@ static const struct agp_bridge_driver intel_830_driver = {
1444 .needs_scratch_page = true, 1449 .needs_scratch_page = true,
1445 .configure = intel_i830_configure, 1450 .configure = intel_i830_configure,
1446 .fetch_size = intel_fake_agp_fetch_size, 1451 .fetch_size = intel_fake_agp_fetch_size,
1447 .cleanup = intel_i830_cleanup, 1452 .cleanup = intel_gtt_cleanup,
1448 .mask_memory = intel_i810_mask_memory, 1453 .mask_memory = intel_i810_mask_memory,
1449 .masks = intel_i810_masks, 1454 .masks = intel_i810_masks,
1450 .agp_enable = intel_fake_agp_enable, 1455 .agp_enable = intel_fake_agp_enable,
@@ -1471,7 +1476,7 @@ static const struct agp_bridge_driver intel_915_driver = {
1471 .needs_scratch_page = true, 1476 .needs_scratch_page = true,
1472 .configure = intel_i9xx_configure, 1477 .configure = intel_i9xx_configure,
1473 .fetch_size = intel_fake_agp_fetch_size, 1478 .fetch_size = intel_fake_agp_fetch_size,
1474 .cleanup = intel_i915_cleanup, 1479 .cleanup = intel_gtt_cleanup,
1475 .mask_memory = intel_i810_mask_memory, 1480 .mask_memory = intel_i810_mask_memory,
1476 .masks = intel_i810_masks, 1481 .masks = intel_i810_masks,
1477 .agp_enable = intel_fake_agp_enable, 1482 .agp_enable = intel_fake_agp_enable,
@@ -1504,7 +1509,7 @@ static const struct agp_bridge_driver intel_i965_driver = {
1504 .needs_scratch_page = true, 1509 .needs_scratch_page = true,
1505 .configure = intel_i9xx_configure, 1510 .configure = intel_i9xx_configure,
1506 .fetch_size = intel_fake_agp_fetch_size, 1511 .fetch_size = intel_fake_agp_fetch_size,
1507 .cleanup = intel_i915_cleanup, 1512 .cleanup = intel_gtt_cleanup,
1508 .mask_memory = intel_i965_mask_memory, 1513 .mask_memory = intel_i965_mask_memory,
1509 .masks = intel_i810_masks, 1514 .masks = intel_i810_masks,
1510 .agp_enable = intel_fake_agp_enable, 1515 .agp_enable = intel_fake_agp_enable,
@@ -1537,7 +1542,7 @@ static const struct agp_bridge_driver intel_gen6_driver = {
1537 .needs_scratch_page = true, 1542 .needs_scratch_page = true,
1538 .configure = intel_i9xx_configure, 1543 .configure = intel_i9xx_configure,
1539 .fetch_size = intel_fake_agp_fetch_size, 1544 .fetch_size = intel_fake_agp_fetch_size,
1540 .cleanup = intel_i915_cleanup, 1545 .cleanup = intel_gtt_cleanup,
1541 .mask_memory = intel_gen6_mask_memory, 1546 .mask_memory = intel_gen6_mask_memory,
1542 .masks = intel_gen6_masks, 1547 .masks = intel_gen6_masks,
1543 .agp_enable = intel_fake_agp_enable, 1548 .agp_enable = intel_fake_agp_enable,
@@ -1570,7 +1575,7 @@ static const struct agp_bridge_driver intel_g33_driver = {
1570 .needs_scratch_page = true, 1575 .needs_scratch_page = true,
1571 .configure = intel_i9xx_configure, 1576 .configure = intel_i9xx_configure,
1572 .fetch_size = intel_fake_agp_fetch_size, 1577 .fetch_size = intel_fake_agp_fetch_size,
1573 .cleanup = intel_i915_cleanup, 1578 .cleanup = intel_gtt_cleanup,
1574 .mask_memory = intel_i965_mask_memory, 1579 .mask_memory = intel_i965_mask_memory,
1575 .masks = intel_i810_masks, 1580 .masks = intel_i810_masks,
1576 .agp_enable = intel_fake_agp_enable, 1581 .agp_enable = intel_fake_agp_enable,