Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
  drm/i915: Fix LVDS fixed-mode regression from 219adae1
  drm/i915/ringbuffer: Use the HEAD auto-reporting mechanism
  drm/i915: Avoid might_fault during pwrite whilst holding our mutex
  agp/intel: fix cache control for sandybridge
  agp/intel: restore cache behavior on sandybridge
  drm/i915; Don't apply Ironlake FDI clock workaround to Sandybridge
  drm/i915: Fix KMS regression on Sandybridge/CPT
  i915: reprogram power monitoring registers on resume
  drm/i915: SNB BLT workaround
  drm/i915: Fix the graphics frequency clamping at init and when IPS is active.
  drm/i915: Allow powersave modparam to be adjusted at runtime.
  drm/i915: Apply big hammer to serialise buffer access between rings
  drm/i915: opregion_setup: iounmap correct address
  drm/i915: Flush read-only buffers from the active list upon idle as well
  i915: signedness bug in check_overlay_src()
  drm/i915: Fix typo from "Enable DisplayPort Audio"

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 6b6760ea2435..9272c38dd3c6 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1210,14 +1210,14 @@ static void gen6_write_entry(dma_addr_t addr, unsigned int entry,
         unsigned int gfdt = flags & AGP_USER_CACHED_MEMORY_GFDT;
         u32 pte_flags;
 
-        if (type_mask == AGP_USER_UNCACHED_MEMORY)
+        if (type_mask == AGP_USER_MEMORY)
                 pte_flags = GEN6_PTE_UNCACHED | I810_PTE_VALID;
         else if (type_mask == AGP_USER_CACHED_MEMORY_LLC_MLC) {
-                pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;
+                pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;
                 if (gfdt)
                         pte_flags |= GEN6_PTE_GFDT;
         } else { /* set 'normal'/'cached' to LLC by default */
-                pte_flags = GEN6_PTE_LLC_MLC | I810_PTE_VALID;
+                pte_flags = GEN6_PTE_LLC | I810_PTE_VALID;
                 if (gfdt)
                         pte_flags |= GEN6_PTE_GFDT;
         }