diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-07-09 13:45:17 -0400 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-01 22:03:48 -0400 |
| commit | a2757b6fab6dee3dbf43bdb7d7226d03747fbdb1 (patch) | |
| tree | f3f30e2921f93fc6bfbcf0a8a13fba872b40de3e /drivers/char/agp/intel-gtt.c | |
| parent | 3869d4a8afd3ce97770e66d6a96672af93984cc2 (diff) | |
agp/intel: Add actual definitions of the Sandybridge PTE caching bits.
Diffstat (limited to 'drivers/char/agp/intel-gtt.c')
| -rw-r--r-- | drivers/char/agp/intel-gtt.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 2b1a0e96c71f..ccd4b1e694d1 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
| @@ -176,7 +176,7 @@ static void intel_agp_insert_sg_entries(struct agp_memory *mem, | |||
| 176 | if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || | 176 | if (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB || |
| 177 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB) | 177 | agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB) |
| 178 | { | 178 | { |
| 179 | cache_bits = I830_PTE_SYSTEM_CACHED; | 179 | cache_bits = GEN6_PTE_LLC_MLC; |
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { | 182 | for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { |