diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-09 17:38:28 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-12-09 17:38:28 -0500 |
commit | 6cd94d5e57ab97ddd672b707ab4bb639672c1727 (patch) | |
tree | b1b301b16433d4deab6bd52e81d04a7b58c239d3 /drivers/bus/brcmstb_gisb.c | |
parent | 6c9e92476bc924ede6d6d2f0bfed2c06ae148d29 (diff) | |
parent | 842f7d2c4d392c0571cf72e3eaca26742bebbd1e (diff) |
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support, notable changes include:
- bcm:
brcmstb SMP support
initial iproc/cygnus support
- exynos:
Exynos4415 SoC support
PMU and suspend support for Exynos5420
PMU support for Exynos3250
pm related maintenance
- imx:
new LS1021A SoC support
vybrid 610 global timer support
- integrator:
convert to using multiplatform configuration
- mediatek:
earlyprintk support for mt8127/mt8135
- meson:
meson8 soc and l2 cache controller support
- mvebu:
Armada 38x CPU hotplug support
drop support for prerelease Armada 375 Z1 stepping
extended suspend support, now works on Armada 370/XP
- omap:
hwmod related maintenance
prcm cleanup
- pxa:
initial pxa27x DT handling
- rockchip:
SMP support for rk3288
add cpu frequency scaling support
- shmobile:
r8a7740 power domain support
various small restart, timer, pci apmu changes
- sunxi:
Allwinner A80 (sun9i) earlyprintk support
- ux500:
power domain support
Overall, a significant chunk of changes, coming mostly from the usual
suspects: omap, shmobile, samsung and mvebu, all of which already
contain a lot of platform specific code in arch/arm"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
soc: integrator: Add terminating entry for integrator_cm_match
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
ARM: add lolevel debug support for asm9260
ARM: add mach-asm9260
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
...
Diffstat (limited to 'drivers/bus/brcmstb_gisb.c')
-rw-r--r-- | drivers/bus/brcmstb_gisb.c | 45 |
1 files changed, 39 insertions, 6 deletions
diff --git a/drivers/bus/brcmstb_gisb.c b/drivers/bus/brcmstb_gisb.c index f2cd6a2d40b4..e7ccd21a45c9 100644 --- a/drivers/bus/brcmstb_gisb.c +++ b/drivers/bus/brcmstb_gisb.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/list.h> | 23 | #include <linux/list.h> |
24 | #include <linux/of.h> | 24 | #include <linux/of.h> |
25 | #include <linux/bitops.h> | 25 | #include <linux/bitops.h> |
26 | #include <linux/pm.h> | ||
26 | 27 | ||
27 | #include <asm/bug.h> | 28 | #include <asm/bug.h> |
28 | #include <asm/signal.h> | 29 | #include <asm/signal.h> |
@@ -48,6 +49,7 @@ struct brcmstb_gisb_arb_device { | |||
48 | struct list_head next; | 49 | struct list_head next; |
49 | u32 valid_mask; | 50 | u32 valid_mask; |
50 | const char *master_names[sizeof(u32) * BITS_PER_BYTE]; | 51 | const char *master_names[sizeof(u32) * BITS_PER_BYTE]; |
52 | u32 saved_timeout; | ||
51 | }; | 53 | }; |
52 | 54 | ||
53 | static LIST_HEAD(brcmstb_gisb_arb_device_list); | 55 | static LIST_HEAD(brcmstb_gisb_arb_device_list); |
@@ -160,12 +162,6 @@ static int brcmstb_bus_error_handler(unsigned long addr, unsigned int fsr, | |||
160 | return ret; | 162 | return ret; |
161 | } | 163 | } |
162 | 164 | ||
163 | void __init brcmstb_hook_fault_code(void) | ||
164 | { | ||
165 | hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0, | ||
166 | "imprecise external abort"); | ||
167 | } | ||
168 | |||
169 | static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) | 165 | static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id) |
170 | { | 166 | { |
171 | brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); | 167 | brcmstb_gisb_arb_decode_addr(dev_id, "timeout"); |
@@ -261,12 +257,48 @@ static int brcmstb_gisb_arb_probe(struct platform_device *pdev) | |||
261 | 257 | ||
262 | list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); | 258 | list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list); |
263 | 259 | ||
260 | hook_fault_code(22, brcmstb_bus_error_handler, SIGBUS, 0, | ||
261 | "imprecise external abort"); | ||
262 | |||
264 | dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n", | 263 | dev_info(&pdev->dev, "registered mem: %p, irqs: %d, %d\n", |
265 | gdev->base, timeout_irq, tea_irq); | 264 | gdev->base, timeout_irq, tea_irq); |
266 | 265 | ||
267 | return 0; | 266 | return 0; |
268 | } | 267 | } |
269 | 268 | ||
269 | #ifdef CONFIG_PM_SLEEP | ||
270 | static int brcmstb_gisb_arb_suspend(struct device *dev) | ||
271 | { | ||
272 | struct platform_device *pdev = to_platform_device(dev); | ||
273 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | ||
274 | |||
275 | gdev->saved_timeout = ioread32(gdev->base + ARB_TIMER); | ||
276 | |||
277 | return 0; | ||
278 | } | ||
279 | |||
280 | /* Make sure we provide the same timeout value that was configured before, and | ||
281 | * do this before the GISB timeout interrupt handler has any chance to run. | ||
282 | */ | ||
283 | static int brcmstb_gisb_arb_resume_noirq(struct device *dev) | ||
284 | { | ||
285 | struct platform_device *pdev = to_platform_device(dev); | ||
286 | struct brcmstb_gisb_arb_device *gdev = platform_get_drvdata(pdev); | ||
287 | |||
288 | iowrite32(gdev->saved_timeout, gdev->base + ARB_TIMER); | ||
289 | |||
290 | return 0; | ||
291 | } | ||
292 | #else | ||
293 | #define brcmstb_gisb_arb_suspend NULL | ||
294 | #define brcmstb_gisb_arb_resume_noirq NULL | ||
295 | #endif | ||
296 | |||
297 | static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = { | ||
298 | .suspend = brcmstb_gisb_arb_suspend, | ||
299 | .resume_noirq = brcmstb_gisb_arb_resume_noirq, | ||
300 | }; | ||
301 | |||
270 | static const struct of_device_id brcmstb_gisb_arb_of_match[] = { | 302 | static const struct of_device_id brcmstb_gisb_arb_of_match[] = { |
271 | { .compatible = "brcm,gisb-arb" }, | 303 | { .compatible = "brcm,gisb-arb" }, |
272 | { }, | 304 | { }, |
@@ -278,6 +310,7 @@ static struct platform_driver brcmstb_gisb_arb_driver = { | |||
278 | .name = "brcm-gisb-arb", | 310 | .name = "brcm-gisb-arb", |
279 | .owner = THIS_MODULE, | 311 | .owner = THIS_MODULE, |
280 | .of_match_table = brcmstb_gisb_arb_of_match, | 312 | .of_match_table = brcmstb_gisb_arb_of_match, |
313 | .pm = &brcmstb_gisb_arb_pm_ops, | ||
281 | }, | 314 | }, |
282 | }; | 315 | }; |
283 | 316 | ||