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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-02-05 05:11:28 -0500
committerSimon Horman <horms+renesas@verge.net.au>2015-02-23 16:36:18 -0500
commit89d463ea106dba530786a2815fd174f9e6eab71f (patch)
tree502a864f5d8aee105f7201c33e9f9e9da2df0bb6 /drivers/bus/Kconfig
parentb1e5bbd61eb7584caa61ab3b89f3a66c3d5b4dd3 (diff)
drivers: bus: Add Simple Power-Managed Bus Driver
Add a driver for transparent busses that don't need a real driver, but where the bus controller is part of a PM domain, or under the control of a functional clock. Typically, the bus controller's PM domain and/or clock must be enabled for child devices connected to the bus (either on-SoC or externally) to function. Hence the sole purpose of this driver is to enable its clock and PM domain (if exist(s)), which are specified in the DT and managed from platform and PM domain code, and to probe for child devices. Due to the child-parent relationship with devices connected to the bus, PM domain and clock state transitions are handled in the correct order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/bus/Kconfig')
-rw-r--r--drivers/bus/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 626960819e6d..7e9c2674af81 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -58,6 +58,19 @@ config OMAP_OCP2SCP
58 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via 58 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
59 OCP2SCP. 59 OCP2SCP.
60 60
61config SIMPLE_PM_BUS
62 bool "Simple Power-Managed Bus Driver"
63 depends on OF && PM
64 depends on ARCH_SHMOBILE || COMPILE_TEST
65 help
66 Driver for transparent busses that don't need a real driver, but
67 where the bus controller is part of a PM domain, or under the control
68 of a functional clock, and thus relies on runtime PM for managing
69 this PM domain and/or clock.
70 An example of such a bus controller is the Renesas Bus State
71 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
72 "External Bus Interface") as found on several Renesas ARM SoCs.
73
61config VEXPRESS_CONFIG 74config VEXPRESS_CONFIG
62 bool "Versatile Express configuration bus" 75 bool "Versatile Express configuration bus"
63 default y if ARCH_VEXPRESS 76 default y if ARCH_VEXPRESS