diff options
author | Tejun Heo <htejun@gmail.com> | 2007-02-01 01:06:36 -0500 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-02-09 17:39:38 -0500 |
commit | 0d5ff566779f894ca9937231a181eb31e4adff0e (patch) | |
tree | d1c7495c932581c1d41aa7f0fdb303348da49106 /drivers/ata/pdc_adma.c | |
parent | 1a68ff13c8a9b517de3fd4187dc525412a6eba1b (diff) |
libata: convert to iomap
Convert libata core layer and LLDs to use iomap.
* managed iomap is used. Pointer to pcim_iomap_table() is cached at
host->iomap and used through out LLDs. This basically replaces
host->mmio_base.
* if possible, pcim_iomap_regions() is used
Most iomap operation conversions are taken from Jeff Garzik
<jgarzik@pobox.com>'s iomap branch.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pdc_adma.c')
-rw-r--r-- | drivers/ata/pdc_adma.c | 47 |
1 files changed, 24 insertions, 23 deletions
diff --git a/drivers/ata/pdc_adma.c b/drivers/ata/pdc_adma.c index a6bf7cbdfdc5..71e17df83f48 100644 --- a/drivers/ata/pdc_adma.c +++ b/drivers/ata/pdc_adma.c | |||
@@ -51,9 +51,15 @@ | |||
51 | #define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40)) | 51 | #define ADMA_ATA_REGS(base,port_no) ((base) + ((port_no) * 0x40)) |
52 | 52 | ||
53 | /* macro to calculate base address for ADMA regs */ | 53 | /* macro to calculate base address for ADMA regs */ |
54 | #define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20)) | 54 | #define ADMA_REGS(base,port_no) ((base) + 0x80 + ((port_no) * 0x20)) |
55 | |||
56 | /* macro to obtain addresses from ata_host */ | ||
57 | #define ADMA_HOST_REGS(host,port_no) \ | ||
58 | ADMA_REGS((host)->iomap[ADMA_MMIO_BAR], port_no) | ||
55 | 59 | ||
56 | enum { | 60 | enum { |
61 | ADMA_MMIO_BAR = 4, | ||
62 | |||
57 | ADMA_PORTS = 2, | 63 | ADMA_PORTS = 2, |
58 | ADMA_CPB_BYTES = 40, | 64 | ADMA_CPB_BYTES = 40, |
59 | ADMA_PRD_BYTES = LIBATA_MAX_PRD * 16, | 65 | ADMA_PRD_BYTES = LIBATA_MAX_PRD * 16, |
@@ -166,7 +172,7 @@ static const struct ata_port_operations adma_ata_ops = { | |||
166 | .qc_prep = adma_qc_prep, | 172 | .qc_prep = adma_qc_prep, |
167 | .qc_issue = adma_qc_issue, | 173 | .qc_issue = adma_qc_issue, |
168 | .eng_timeout = adma_eng_timeout, | 174 | .eng_timeout = adma_eng_timeout, |
169 | .data_xfer = ata_mmio_data_xfer, | 175 | .data_xfer = ata_data_xfer, |
170 | .irq_handler = adma_intr, | 176 | .irq_handler = adma_intr, |
171 | .irq_clear = adma_irq_clear, | 177 | .irq_clear = adma_irq_clear, |
172 | .port_start = adma_port_start, | 178 | .port_start = adma_port_start, |
@@ -234,11 +240,10 @@ static void adma_reset_engine(void __iomem *chan) | |||
234 | static void adma_reinit_engine(struct ata_port *ap) | 240 | static void adma_reinit_engine(struct ata_port *ap) |
235 | { | 241 | { |
236 | struct adma_port_priv *pp = ap->private_data; | 242 | struct adma_port_priv *pp = ap->private_data; |
237 | void __iomem *mmio_base = ap->host->mmio_base; | 243 | void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); |
238 | void __iomem *chan = ADMA_REGS(mmio_base, ap->port_no); | ||
239 | 244 | ||
240 | /* mask/clear ATA interrupts */ | 245 | /* mask/clear ATA interrupts */ |
241 | writeb(ATA_NIEN, (void __iomem *)ap->ioaddr.ctl_addr); | 246 | writeb(ATA_NIEN, ap->ioaddr.ctl_addr); |
242 | ata_check_status(ap); | 247 | ata_check_status(ap); |
243 | 248 | ||
244 | /* reset the ADMA engine */ | 249 | /* reset the ADMA engine */ |
@@ -262,7 +267,7 @@ static void adma_reinit_engine(struct ata_port *ap) | |||
262 | 267 | ||
263 | static inline void adma_enter_reg_mode(struct ata_port *ap) | 268 | static inline void adma_enter_reg_mode(struct ata_port *ap) |
264 | { | 269 | { |
265 | void __iomem *chan = ADMA_REGS(ap->host->mmio_base, ap->port_no); | 270 | void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); |
266 | 271 | ||
267 | writew(aPIOMD4, chan + ADMA_CONTROL); | 272 | writew(aPIOMD4, chan + ADMA_CONTROL); |
268 | readb(chan + ADMA_STATUS); /* flush */ | 273 | readb(chan + ADMA_STATUS); /* flush */ |
@@ -409,7 +414,7 @@ static void adma_qc_prep(struct ata_queued_cmd *qc) | |||
409 | static inline void adma_packet_start(struct ata_queued_cmd *qc) | 414 | static inline void adma_packet_start(struct ata_queued_cmd *qc) |
410 | { | 415 | { |
411 | struct ata_port *ap = qc->ap; | 416 | struct ata_port *ap = qc->ap; |
412 | void __iomem *chan = ADMA_REGS(ap->host->mmio_base, ap->port_no); | 417 | void __iomem *chan = ADMA_HOST_REGS(ap->host, ap->port_no); |
413 | 418 | ||
414 | VPRINTK("ENTER, ap %p\n", ap); | 419 | VPRINTK("ENTER, ap %p\n", ap); |
415 | 420 | ||
@@ -442,13 +447,12 @@ static unsigned int adma_qc_issue(struct ata_queued_cmd *qc) | |||
442 | static inline unsigned int adma_intr_pkt(struct ata_host *host) | 447 | static inline unsigned int adma_intr_pkt(struct ata_host *host) |
443 | { | 448 | { |
444 | unsigned int handled = 0, port_no; | 449 | unsigned int handled = 0, port_no; |
445 | u8 __iomem *mmio_base = host->mmio_base; | ||
446 | 450 | ||
447 | for (port_no = 0; port_no < host->n_ports; ++port_no) { | 451 | for (port_no = 0; port_no < host->n_ports; ++port_no) { |
448 | struct ata_port *ap = host->ports[port_no]; | 452 | struct ata_port *ap = host->ports[port_no]; |
449 | struct adma_port_priv *pp; | 453 | struct adma_port_priv *pp; |
450 | struct ata_queued_cmd *qc; | 454 | struct ata_queued_cmd *qc; |
451 | void __iomem *chan = ADMA_REGS(mmio_base, port_no); | 455 | void __iomem *chan = ADMA_HOST_REGS(host, port_no); |
452 | u8 status = readb(chan + ADMA_STATUS); | 456 | u8 status = readb(chan + ADMA_STATUS); |
453 | 457 | ||
454 | if (status == 0) | 458 | if (status == 0) |
@@ -522,7 +526,7 @@ static irqreturn_t adma_intr(int irq, void *dev_instance) | |||
522 | return IRQ_RETVAL(handled); | 526 | return IRQ_RETVAL(handled); |
523 | } | 527 | } |
524 | 528 | ||
525 | static void adma_ata_setup_port(struct ata_ioports *port, unsigned long base) | 529 | static void adma_ata_setup_port(struct ata_ioports *port, void __iomem *base) |
526 | { | 530 | { |
527 | port->cmd_addr = | 531 | port->cmd_addr = |
528 | port->data_addr = base + 0x000; | 532 | port->data_addr = base + 0x000; |
@@ -570,7 +574,7 @@ static int adma_port_start(struct ata_port *ap) | |||
570 | 574 | ||
571 | static void adma_port_stop(struct ata_port *ap) | 575 | static void adma_port_stop(struct ata_port *ap) |
572 | { | 576 | { |
573 | adma_reset_engine(ADMA_REGS(ap->host->mmio_base, ap->port_no)); | 577 | adma_reset_engine(ADMA_HOST_REGS(ap->host, ap->port_no)); |
574 | } | 578 | } |
575 | 579 | ||
576 | static void adma_host_stop(struct ata_host *host) | 580 | static void adma_host_stop(struct ata_host *host) |
@@ -578,14 +582,14 @@ static void adma_host_stop(struct ata_host *host) | |||
578 | unsigned int port_no; | 582 | unsigned int port_no; |
579 | 583 | ||
580 | for (port_no = 0; port_no < ADMA_PORTS; ++port_no) | 584 | for (port_no = 0; port_no < ADMA_PORTS; ++port_no) |
581 | adma_reset_engine(ADMA_REGS(host->mmio_base, port_no)); | 585 | adma_reset_engine(ADMA_HOST_REGS(host, port_no)); |
582 | } | 586 | } |
583 | 587 | ||
584 | static void adma_host_init(unsigned int chip_id, | 588 | static void adma_host_init(unsigned int chip_id, |
585 | struct ata_probe_ent *probe_ent) | 589 | struct ata_probe_ent *probe_ent) |
586 | { | 590 | { |
587 | unsigned int port_no; | 591 | unsigned int port_no; |
588 | void __iomem *mmio_base = probe_ent->mmio_base; | 592 | void __iomem *mmio_base = probe_ent->iomap[ADMA_MMIO_BAR]; |
589 | 593 | ||
590 | /* enable/lock aGO operation */ | 594 | /* enable/lock aGO operation */ |
591 | writeb(7, mmio_base + ADMA_MODE_LOCK); | 595 | writeb(7, mmio_base + ADMA_MODE_LOCK); |
@@ -615,7 +619,7 @@ static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) | |||
615 | } | 619 | } |
616 | 620 | ||
617 | static int adma_ata_init_one(struct pci_dev *pdev, | 621 | static int adma_ata_init_one(struct pci_dev *pdev, |
618 | const struct pci_device_id *ent) | 622 | const struct pci_device_id *ent) |
619 | { | 623 | { |
620 | static int printed_version; | 624 | static int printed_version; |
621 | struct ata_probe_ent *probe_ent = NULL; | 625 | struct ata_probe_ent *probe_ent = NULL; |
@@ -630,16 +634,13 @@ static int adma_ata_init_one(struct pci_dev *pdev, | |||
630 | if (rc) | 634 | if (rc) |
631 | return rc; | 635 | return rc; |
632 | 636 | ||
633 | rc = pci_request_regions(pdev, DRV_NAME); | ||
634 | if (rc) | ||
635 | return rc; | ||
636 | |||
637 | if ((pci_resource_flags(pdev, 4) & IORESOURCE_MEM) == 0) | 637 | if ((pci_resource_flags(pdev, 4) & IORESOURCE_MEM) == 0) |
638 | return -ENODEV; | 638 | return -ENODEV; |
639 | 639 | ||
640 | mmio_base = pcim_iomap(pdev, 4, 0); | 640 | rc = pcim_iomap_regions(pdev, 1 << ADMA_MMIO_BAR, DRV_NAME); |
641 | if (mmio_base == NULL) | 641 | if (rc) |
642 | return -ENOMEM; | 642 | return rc; |
643 | mmio_base = pcim_iomap_table(pdev)[ADMA_MMIO_BAR]; | ||
643 | 644 | ||
644 | rc = adma_set_dma_masks(pdev, mmio_base); | 645 | rc = adma_set_dma_masks(pdev, mmio_base); |
645 | if (rc) | 646 | if (rc) |
@@ -661,12 +662,12 @@ static int adma_ata_init_one(struct pci_dev *pdev, | |||
661 | 662 | ||
662 | probe_ent->irq = pdev->irq; | 663 | probe_ent->irq = pdev->irq; |
663 | probe_ent->irq_flags = IRQF_SHARED; | 664 | probe_ent->irq_flags = IRQF_SHARED; |
664 | probe_ent->mmio_base = mmio_base; | ||
665 | probe_ent->n_ports = ADMA_PORTS; | 665 | probe_ent->n_ports = ADMA_PORTS; |
666 | probe_ent->iomap = pcim_iomap_table(pdev); | ||
666 | 667 | ||
667 | for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) { | 668 | for (port_no = 0; port_no < probe_ent->n_ports; ++port_no) { |
668 | adma_ata_setup_port(&probe_ent->port[port_no], | 669 | adma_ata_setup_port(&probe_ent->port[port_no], |
669 | ADMA_ATA_REGS((unsigned long)mmio_base, port_no)); | 670 | ADMA_ATA_REGS(mmio_base, port_no)); |
670 | } | 671 | } |
671 | 672 | ||
672 | pci_set_master(pdev); | 673 | pci_set_master(pdev); |