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authorJeff Garzik <jeff@garzik.org>2006-08-29 18:12:40 -0400
committerJeff Garzik <jeff@garzik.org>2006-08-29 18:12:40 -0400
commit669a5db411d85a14f86cd92bc16bf7ab5b8aa235 (patch)
tree8d4f9d63e18185695a4d97e1a3fa4e18b61c7345 /drivers/ata/pata_mpiix.c
parentb01e86fee6c821e4e003fd4e9f65453ac478a58e (diff)
[libata] Add a bunch of PATA drivers.
The vast majority of drivers and changes are from Alan Cox. Albert Lee contributed and maintains pata_pdc2027x. Adrian Bunk, Andrew Morton, and Tejun Heo contributed various minor fixes and updates. Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/pata_mpiix.c')
-rw-r--r--drivers/ata/pata_mpiix.c313
1 files changed, 313 insertions, 0 deletions
diff --git a/drivers/ata/pata_mpiix.c b/drivers/ata/pata_mpiix.c
new file mode 100644
index 000000000000..1958c4ed09a8
--- /dev/null
+++ b/drivers/ata/pata_mpiix.c
@@ -0,0 +1,313 @@
1/*
2 * pata_mpiix.c - Intel MPIIX PATA for new ATA layer
3 * (C) 2005-2006 Red Hat Inc
4 * Alan Cox <alan@redhat.com>
5 *
6 * The MPIIX is different enough to the PIIX4 and friends that we give it
7 * a separate driver. The old ide/pci code handles this by just not tuning
8 * MPIIX at all.
9 *
10 * The MPIIX also differs in another important way from the majority of PIIX
11 * devices. The chip is a bridge (pardon the pun) between the old world of
12 * ISA IDE and PCI IDE. Although the ATA timings are PCI configured the actual
13 * IDE controller is not decoded in PCI space and the chip does not claim to
14 * be IDE class PCI. This requires slightly non-standard probe logic compared
15 * with PCI IDE and also that we do not disable the device when our driver is
16 * unloaded (as it has many other functions).
17 *
18 * The driver conciously keeps this logic internally to avoid pushing quirky
19 * PATA history into the clean libata layer.
20 *
21 * Thinkpad specific note: If you boot an MPIIX using thinkpad with a PCMCIA
22 * hard disk present this driver will not detect it. This is not a bug. In this
23 * configuration the secondary port of the MPIIX is disabled and the addresses
24 * are decoded by the PCMCIA bridge and therefore are for a generic IDE driver
25 * to operate.
26 */
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/blkdev.h>
33#include <linux/delay.h>
34#include <scsi/scsi_host.h>
35#include <linux/libata.h>
36
37#define DRV_NAME "pata_mpiix"
38#define DRV_VERSION "0.7.1"
39
40enum {
41 IDETIM = 0x6C, /* IDE control register */
42 IORDY = (1 << 1),
43 PPE = (1 << 2),
44 FTIM = (1 << 0),
45 ENABLED = (1 << 15),
46 SECONDARY = (1 << 14)
47};
48
49static int mpiix_pre_reset(struct ata_port *ap)
50{
51 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
52 static const struct pci_bits mpiix_enable_bits[] = {
53 { 0x6D, 1, 0x80, 0x80 },
54 { 0x6F, 1, 0x80, 0x80 }
55 };
56
57 if (!pci_test_config_bits(pdev, &mpiix_enable_bits[ap->port_no])) {
58 ata_port_disable(ap);
59 printk(KERN_INFO "ata%u: port disabled. ignoring.\n", ap->id);
60 return 0;
61 }
62 ap->cbl = ATA_CBL_PATA40;
63 return ata_std_prereset(ap);
64}
65
66/**
67 * mpiix_error_handler - probe reset
68 * @ap: ATA port
69 *
70 * Perform the ATA probe and bus reset sequence plus specific handling
71 * for this hardware. The MPIIX has the enable bits in a different place
72 * to PIIX4 and friends. As a pure PIO device it has no cable detect
73 */
74
75static void mpiix_error_handler(struct ata_port *ap)
76{
77 ata_bmdma_drive_eh(ap, mpiix_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
78}
79
80/**
81 * mpiix_set_piomode - set initial PIO mode data
82 * @ap: ATA interface
83 * @adev: ATA device
84 *
85 * Called to do the PIO mode setup. The MPIIX allows us to program the
86 * IORDY sample point (2-5 clocks), recovery 1-4 clocks and whether
87 * prefetching or iordy are used.
88 *
89 * This would get very ugly because we can only program timing for one
90 * device at a time, the other gets PIO0. Fortunately libata calls
91 * our qc_issue_prot command before a command is issued so we can
92 * flip the timings back and forth to reduce the pain.
93 */
94
95static void mpiix_set_piomode(struct ata_port *ap, struct ata_device *adev)
96{
97 int control = 0;
98 int pio = adev->pio_mode - XFER_PIO_0;
99 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
100 u16 idetim;
101 static const /* ISP RTC */
102 u8 timings[][2] = { { 0, 0 },
103 { 0, 0 },
104 { 1, 0 },
105 { 2, 1 },
106 { 2, 3 }, };
107
108 pci_read_config_word(pdev, IDETIM, &idetim);
109 /* Mask the IORDY/TIME/PPE0 bank for this device */
110 if (adev->class == ATA_DEV_ATA)
111 control |= PPE; /* PPE enable for disk */
112 if (ata_pio_need_iordy(adev))
113 control |= IORDY; /* IORDY */
114 if (pio > 0)
115 control |= FTIM; /* This drive is on the fast timing bank */
116
117 /* Mask out timing and clear both TIME bank selects */
118 idetim &= 0xCCEE;
119 idetim &= ~(0x07 << (2 * adev->devno));
120 idetim |= (control << (2 * adev->devno));
121
122 idetim |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
123 pci_write_config_word(pdev, IDETIM, idetim);
124
125 /* We use ap->private_data as a pointer to the device currently
126 loaded for timing */
127 ap->private_data = adev;
128}
129
130/**
131 * mpiix_qc_issue_prot - command issue
132 * @qc: command pending
133 *
134 * Called when the libata layer is about to issue a command. We wrap
135 * this interface so that we can load the correct ATA timings if
136 * neccessary. Our logic also clears TIME0/TIME1 for the other device so
137 * that, even if we get this wrong, cycles to the other device will
138 * be made PIO0.
139 */
140
141static unsigned int mpiix_qc_issue_prot(struct ata_queued_cmd *qc)
142{
143 struct ata_port *ap = qc->ap;
144 struct ata_device *adev = qc->dev;
145
146 /* If modes have been configured and the channel data is not loaded
147 then load it. We have to check if pio_mode is set as the core code
148 does not set adev->pio_mode to XFER_PIO_0 while probing as would be
149 logical */
150
151 if (adev->pio_mode && adev != ap->private_data)
152 mpiix_set_piomode(ap, adev);
153
154 return ata_qc_issue_prot(qc);
155}
156
157static struct scsi_host_template mpiix_sht = {
158 .module = THIS_MODULE,
159 .name = DRV_NAME,
160 .ioctl = ata_scsi_ioctl,
161 .queuecommand = ata_scsi_queuecmd,
162 .can_queue = ATA_DEF_QUEUE,
163 .this_id = ATA_SHT_THIS_ID,
164 .sg_tablesize = LIBATA_MAX_PRD,
165 .max_sectors = ATA_MAX_SECTORS,
166 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
167 .emulated = ATA_SHT_EMULATED,
168 .use_clustering = ATA_SHT_USE_CLUSTERING,
169 .proc_name = DRV_NAME,
170 .dma_boundary = ATA_DMA_BOUNDARY,
171 .slave_configure = ata_scsi_slave_config,
172 .bios_param = ata_std_bios_param,
173};
174
175static struct ata_port_operations mpiix_port_ops = {
176 .port_disable = ata_port_disable,
177 .set_piomode = mpiix_set_piomode,
178
179 .tf_load = ata_tf_load,
180 .tf_read = ata_tf_read,
181 .check_status = ata_check_status,
182 .exec_command = ata_exec_command,
183 .dev_select = ata_std_dev_select,
184
185 .freeze = ata_bmdma_freeze,
186 .thaw = ata_bmdma_thaw,
187 .error_handler = mpiix_error_handler,
188 .post_internal_cmd = ata_bmdma_post_internal_cmd,
189
190 .qc_prep = ata_qc_prep,
191 .qc_issue = mpiix_qc_issue_prot,
192 .data_xfer = ata_pio_data_xfer,
193
194 .irq_handler = ata_interrupt,
195 .irq_clear = ata_bmdma_irq_clear,
196
197 .port_start = ata_port_start,
198 .port_stop = ata_port_stop,
199 .host_stop = ata_host_stop
200};
201
202static int mpiix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
203{
204 /* Single threaded by the PCI probe logic */
205 static struct ata_probe_ent probe[2];
206 static int printed_version;
207 u16 idetim;
208 int enabled;
209
210 if (!printed_version++)
211 dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
212
213 /* MPIIX has many functions which can be turned on or off according
214 to other devices present. Make sure IDE is enabled before we try
215 and use it */
216
217 pci_read_config_word(dev, IDETIM, &idetim);
218 if (!(idetim & ENABLED))
219 return -ENODEV;
220
221 /* We do our own plumbing to avoid leaking special cases for whacko
222 ancient hardware into the core code. There are two issues to
223 worry about. #1 The chip is a bridge so if in legacy mode and
224 without BARs set fools the setup. #2 If you pci_disable_device
225 the MPIIX your box goes castors up */
226
227 INIT_LIST_HEAD(&probe[0].node);
228 probe[0].dev = pci_dev_to_dev(dev);
229 probe[0].port_ops = &mpiix_port_ops;
230 probe[0].sht = &mpiix_sht;
231 probe[0].pio_mask = 0x1F;
232 probe[0].irq = 14;
233 probe[0].irq_flags = SA_SHIRQ;
234 probe[0].port_flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST;
235 probe[0].n_ports = 1;
236 probe[0].port[0].cmd_addr = 0x1F0;
237 probe[0].port[0].ctl_addr = 0x3F6;
238 probe[0].port[0].altstatus_addr = 0x3F6;
239
240 /* The secondary lurks at different addresses but is otherwise
241 the same beastie */
242
243 INIT_LIST_HEAD(&probe[1].node);
244 probe[1] = probe[0];
245 probe[1].irq = 15;
246 probe[1].port[0].cmd_addr = 0x170;
247 probe[1].port[0].ctl_addr = 0x376;
248 probe[1].port[0].altstatus_addr = 0x376;
249
250 /* Let libata fill in the port details */
251 ata_std_ports(&probe[0].port[0]);
252 ata_std_ports(&probe[1].port[0]);
253
254 /* Now add the port that is active */
255 enabled = (idetim & SECONDARY) ? 1 : 0;
256
257 if (ata_device_add(&probe[enabled]))
258 return 0;
259 return -ENODEV;
260}
261
262/**
263 * mpiix_remove_one - device unload
264 * @pdev: PCI device being removed
265 *
266 * Handle an unplug/unload event for a PCI device. Unload the
267 * PCI driver but do not use the default handler as we *MUST NOT*
268 * disable the device as it has other functions.
269 */
270
271static void __devexit mpiix_remove_one(struct pci_dev *pdev)
272{
273 struct device *dev = pci_dev_to_dev(pdev);
274 struct ata_host *host = dev_get_drvdata(dev);
275
276 ata_host_remove(host);
277 dev_set_drvdata(dev, NULL);
278}
279
280
281
282static const struct pci_device_id mpiix[] = {
283 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371MX), },
284 { 0, },
285};
286
287static struct pci_driver mpiix_pci_driver = {
288 .name = DRV_NAME,
289 .id_table = mpiix,
290 .probe = mpiix_init_one,
291 .remove = mpiix_remove_one
292};
293
294static int __init mpiix_init(void)
295{
296 return pci_register_driver(&mpiix_pci_driver);
297}
298
299
300static void __exit mpiix_exit(void)
301{
302 pci_unregister_driver(&mpiix_pci_driver);
303}
304
305
306MODULE_AUTHOR("Alan Cox");
307MODULE_DESCRIPTION("low-level driver for Intel MPIIX");
308MODULE_LICENSE("GPL");
309MODULE_DEVICE_TABLE(pci, mpiix);
310MODULE_VERSION(DRV_VERSION);
311
312module_init(mpiix_init);
313module_exit(mpiix_exit);