diff options
author | Ben Dooks <ben-linux@fluff.org> | 2008-07-15 15:19:14 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2008-07-15 15:19:14 -0400 |
commit | 0c17e4ceedd35c78b1c7413dbd16279a350be6bc (patch) | |
tree | 313b3b9ca04727f3704464e01d8dd97da1dd534b /drivers/ata/libata-core.c | |
parent | 19c1d6a34abf73d0baf8e325d018c920fa78dddc (diff) | |
parent | b9d2252c1e44fa83a4e65fdc9eb93db6297c55af (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6 into for-rmk
Diffstat (limited to 'drivers/ata/libata-core.c')
-rw-r--r-- | drivers/ata/libata-core.c | 56 |
1 files changed, 32 insertions, 24 deletions
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index 303fc0d2b978..9bef1a84fe3f 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -54,7 +54,6 @@ | |||
54 | #include <linux/completion.h> | 54 | #include <linux/completion.h> |
55 | #include <linux/suspend.h> | 55 | #include <linux/suspend.h> |
56 | #include <linux/workqueue.h> | 56 | #include <linux/workqueue.h> |
57 | #include <linux/jiffies.h> | ||
58 | #include <linux/scatterlist.h> | 57 | #include <linux/scatterlist.h> |
59 | #include <linux/io.h> | 58 | #include <linux/io.h> |
60 | #include <scsi/scsi.h> | 59 | #include <scsi/scsi.h> |
@@ -145,7 +144,7 @@ static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CF | |||
145 | module_param_named(dma, libata_dma_mask, int, 0444); | 144 | module_param_named(dma, libata_dma_mask, int, 0444); |
146 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); | 145 | MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)"); |
147 | 146 | ||
148 | static int ata_probe_timeout = ATA_TMOUT_INTERNAL / HZ; | 147 | static int ata_probe_timeout; |
149 | module_param(ata_probe_timeout, int, 0444); | 148 | module_param(ata_probe_timeout, int, 0444); |
150 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); | 149 | MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)"); |
151 | 150 | ||
@@ -1533,7 +1532,7 @@ unsigned long ata_id_xfermask(const u16 *id) | |||
1533 | * @ap: The ata_port to queue port_task for | 1532 | * @ap: The ata_port to queue port_task for |
1534 | * @fn: workqueue function to be scheduled | 1533 | * @fn: workqueue function to be scheduled |
1535 | * @data: data for @fn to use | 1534 | * @data: data for @fn to use |
1536 | * @delay: delay time for workqueue function | 1535 | * @delay: delay time in msecs for workqueue function |
1537 | * | 1536 | * |
1538 | * Schedule @fn(@data) for execution after @delay jiffies using | 1537 | * Schedule @fn(@data) for execution after @delay jiffies using |
1539 | * port_task. There is one port_task per port and it's the | 1538 | * port_task. There is one port_task per port and it's the |
@@ -1552,7 +1551,7 @@ void ata_pio_queue_task(struct ata_port *ap, void *data, unsigned long delay) | |||
1552 | ap->port_task_data = data; | 1551 | ap->port_task_data = data; |
1553 | 1552 | ||
1554 | /* may fail if ata_port_flush_task() in progress */ | 1553 | /* may fail if ata_port_flush_task() in progress */ |
1555 | queue_delayed_work(ata_wq, &ap->port_task, delay); | 1554 | queue_delayed_work(ata_wq, &ap->port_task, msecs_to_jiffies(delay)); |
1556 | } | 1555 | } |
1557 | 1556 | ||
1558 | /** | 1557 | /** |
@@ -1612,6 +1611,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, | |||
1612 | struct ata_link *link = dev->link; | 1611 | struct ata_link *link = dev->link; |
1613 | struct ata_port *ap = link->ap; | 1612 | struct ata_port *ap = link->ap; |
1614 | u8 command = tf->command; | 1613 | u8 command = tf->command; |
1614 | int auto_timeout = 0; | ||
1615 | struct ata_queued_cmd *qc; | 1615 | struct ata_queued_cmd *qc; |
1616 | unsigned int tag, preempted_tag; | 1616 | unsigned int tag, preempted_tag; |
1617 | u32 preempted_sactive, preempted_qc_active; | 1617 | u32 preempted_sactive, preempted_qc_active; |
@@ -1684,8 +1684,14 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, | |||
1684 | 1684 | ||
1685 | spin_unlock_irqrestore(ap->lock, flags); | 1685 | spin_unlock_irqrestore(ap->lock, flags); |
1686 | 1686 | ||
1687 | if (!timeout) | 1687 | if (!timeout) { |
1688 | timeout = ata_probe_timeout * 1000 / HZ; | 1688 | if (ata_probe_timeout) |
1689 | timeout = ata_probe_timeout * 1000; | ||
1690 | else { | ||
1691 | timeout = ata_internal_cmd_timeout(dev, command); | ||
1692 | auto_timeout = 1; | ||
1693 | } | ||
1694 | } | ||
1689 | 1695 | ||
1690 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); | 1696 | rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout)); |
1691 | 1697 | ||
@@ -1761,6 +1767,9 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, | |||
1761 | 1767 | ||
1762 | spin_unlock_irqrestore(ap->lock, flags); | 1768 | spin_unlock_irqrestore(ap->lock, flags); |
1763 | 1769 | ||
1770 | if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout) | ||
1771 | ata_internal_cmd_timed_out(dev, command); | ||
1772 | |||
1764 | return err_mask; | 1773 | return err_mask; |
1765 | } | 1774 | } |
1766 | 1775 | ||
@@ -3319,7 +3328,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
3319 | int (*check_ready)(struct ata_link *link)) | 3328 | int (*check_ready)(struct ata_link *link)) |
3320 | { | 3329 | { |
3321 | unsigned long start = jiffies; | 3330 | unsigned long start = jiffies; |
3322 | unsigned long nodev_deadline = start + ATA_TMOUT_FF_WAIT; | 3331 | unsigned long nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT); |
3323 | int warned = 0; | 3332 | int warned = 0; |
3324 | 3333 | ||
3325 | if (time_after(nodev_deadline, deadline)) | 3334 | if (time_after(nodev_deadline, deadline)) |
@@ -3387,7 +3396,7 @@ int ata_wait_ready(struct ata_link *link, unsigned long deadline, | |||
3387 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, | 3396 | int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, |
3388 | int (*check_ready)(struct ata_link *link)) | 3397 | int (*check_ready)(struct ata_link *link)) |
3389 | { | 3398 | { |
3390 | msleep(ATA_WAIT_AFTER_RESET_MSECS); | 3399 | msleep(ATA_WAIT_AFTER_RESET); |
3391 | 3400 | ||
3392 | return ata_wait_ready(link, deadline, check_ready); | 3401 | return ata_wait_ready(link, deadline, check_ready); |
3393 | } | 3402 | } |
@@ -3417,13 +3426,13 @@ int ata_wait_after_reset(struct ata_link *link, unsigned long deadline, | |||
3417 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, | 3426 | int sata_link_debounce(struct ata_link *link, const unsigned long *params, |
3418 | unsigned long deadline) | 3427 | unsigned long deadline) |
3419 | { | 3428 | { |
3420 | unsigned long interval_msec = params[0]; | 3429 | unsigned long interval = params[0]; |
3421 | unsigned long duration = msecs_to_jiffies(params[1]); | 3430 | unsigned long duration = params[1]; |
3422 | unsigned long last_jiffies, t; | 3431 | unsigned long last_jiffies, t; |
3423 | u32 last, cur; | 3432 | u32 last, cur; |
3424 | int rc; | 3433 | int rc; |
3425 | 3434 | ||
3426 | t = jiffies + msecs_to_jiffies(params[2]); | 3435 | t = ata_deadline(jiffies, params[2]); |
3427 | if (time_before(t, deadline)) | 3436 | if (time_before(t, deadline)) |
3428 | deadline = t; | 3437 | deadline = t; |
3429 | 3438 | ||
@@ -3435,7 +3444,7 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, | |||
3435 | last_jiffies = jiffies; | 3444 | last_jiffies = jiffies; |
3436 | 3445 | ||
3437 | while (1) { | 3446 | while (1) { |
3438 | msleep(interval_msec); | 3447 | msleep(interval); |
3439 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) | 3448 | if ((rc = sata_scr_read(link, SCR_STATUS, &cur))) |
3440 | return rc; | 3449 | return rc; |
3441 | cur &= 0xf; | 3450 | cur &= 0xf; |
@@ -3444,7 +3453,8 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params, | |||
3444 | if (cur == last) { | 3453 | if (cur == last) { |
3445 | if (cur == 1 && time_before(jiffies, deadline)) | 3454 | if (cur == 1 && time_before(jiffies, deadline)) |
3446 | continue; | 3455 | continue; |
3447 | if (time_after(jiffies, last_jiffies + duration)) | 3456 | if (time_after(jiffies, |
3457 | ata_deadline(last_jiffies, duration))) | ||
3448 | return 0; | 3458 | return 0; |
3449 | continue; | 3459 | continue; |
3450 | } | 3460 | } |
@@ -3636,7 +3646,8 @@ int sata_link_hardreset(struct ata_link *link, const unsigned long *timing, | |||
3636 | if (check_ready) { | 3646 | if (check_ready) { |
3637 | unsigned long pmp_deadline; | 3647 | unsigned long pmp_deadline; |
3638 | 3648 | ||
3639 | pmp_deadline = jiffies + ATA_TMOUT_PMP_SRST_WAIT; | 3649 | pmp_deadline = ata_deadline(jiffies, |
3650 | ATA_TMOUT_PMP_SRST_WAIT); | ||
3640 | if (time_after(pmp_deadline, deadline)) | 3651 | if (time_after(pmp_deadline, deadline)) |
3641 | pmp_deadline = deadline; | 3652 | pmp_deadline = deadline; |
3642 | ata_wait_ready(link, pmp_deadline, check_ready); | 3653 | ata_wait_ready(link, pmp_deadline, check_ready); |
@@ -6073,8 +6084,6 @@ static void __init ata_parse_force_param(void) | |||
6073 | 6084 | ||
6074 | static int __init ata_init(void) | 6085 | static int __init ata_init(void) |
6075 | { | 6086 | { |
6076 | ata_probe_timeout *= HZ; | ||
6077 | |||
6078 | ata_parse_force_param(); | 6087 | ata_parse_force_param(); |
6079 | 6088 | ||
6080 | ata_wq = create_workqueue("ata"); | 6089 | ata_wq = create_workqueue("ata"); |
@@ -6127,8 +6136,8 @@ int ata_ratelimit(void) | |||
6127 | * @reg: IO-mapped register | 6136 | * @reg: IO-mapped register |
6128 | * @mask: Mask to apply to read register value | 6137 | * @mask: Mask to apply to read register value |
6129 | * @val: Wait condition | 6138 | * @val: Wait condition |
6130 | * @interval_msec: polling interval in milliseconds | 6139 | * @interval: polling interval in milliseconds |
6131 | * @timeout_msec: timeout in milliseconds | 6140 | * @timeout: timeout in milliseconds |
6132 | * | 6141 | * |
6133 | * Waiting for some bits of register to change is a common | 6142 | * Waiting for some bits of register to change is a common |
6134 | * operation for ATA controllers. This function reads 32bit LE | 6143 | * operation for ATA controllers. This function reads 32bit LE |
@@ -6146,10 +6155,9 @@ int ata_ratelimit(void) | |||
6146 | * The final register value. | 6155 | * The final register value. |
6147 | */ | 6156 | */ |
6148 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | 6157 | u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, |
6149 | unsigned long interval_msec, | 6158 | unsigned long interval, unsigned long timeout) |
6150 | unsigned long timeout_msec) | ||
6151 | { | 6159 | { |
6152 | unsigned long timeout; | 6160 | unsigned long deadline; |
6153 | u32 tmp; | 6161 | u32 tmp; |
6154 | 6162 | ||
6155 | tmp = ioread32(reg); | 6163 | tmp = ioread32(reg); |
@@ -6158,10 +6166,10 @@ u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val, | |||
6158 | * preceding writes reach the controller before starting to | 6166 | * preceding writes reach the controller before starting to |
6159 | * eat away the timeout. | 6167 | * eat away the timeout. |
6160 | */ | 6168 | */ |
6161 | timeout = jiffies + (timeout_msec * HZ) / 1000; | 6169 | deadline = ata_deadline(jiffies, timeout); |
6162 | 6170 | ||
6163 | while ((tmp & mask) == val && time_before(jiffies, timeout)) { | 6171 | while ((tmp & mask) == val && time_before(jiffies, deadline)) { |
6164 | msleep(interval_msec); | 6172 | msleep(interval); |
6165 | tmp = ioread32(reg); | 6173 | tmp = ioread32(reg); |
6166 | } | 6174 | } |
6167 | 6175 | ||