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authorTejun Heo <htejun@gmail.com>2006-11-01 22:17:23 -0500
committerJeff Garzik <jeff@garzik.org>2006-12-01 22:41:31 -0500
commit98fa4b60c673526fdd478d9719e41cd9e2b84986 (patch)
tree696cb1f0d19bbda6dc9030eb11e4b2754472dfaa /drivers/ata/ahci.c
parentada406c8246b0792afe4d7f8ae7606093052de87 (diff)
[PATCH] ahci: preserve PORTS_IMPL over host resets
Instead of writing 0xf blindly, preserve the content of write-once PORTS_IMPL register over host resets. This patch is taken from Jeff Garzik's AHCI init update patch. Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/ahci.c')
-rw-r--r--drivers/ata/ahci.c23
1 files changed, 20 insertions, 3 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index bc6599e4f474..f2277be70c0f 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -421,6 +421,11 @@ static struct pci_driver ahci_pci_driver = {
421}; 421};
422 422
423 423
424static inline int ahci_nr_ports(u32 cap)
425{
426 return (cap & 0x1f) + 1;
427}
428
424static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port) 429static inline unsigned long ahci_port_base_ul (unsigned long base, unsigned int port)
425{ 430{
426 return base + 0x100 + (port * 0x80); 431 return base + 0x100 + (port * 0x80);
@@ -630,11 +635,12 @@ static int ahci_deinit_port(void __iomem *port_mmio, u32 cap, const char **emsg)
630 635
631static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev) 636static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
632{ 637{
633 u32 cap_save, tmp; 638 u32 cap_save, impl_save, tmp;
634 639
635 cap_save = readl(mmio + HOST_CAP); 640 cap_save = readl(mmio + HOST_CAP);
636 cap_save &= ( (1<<28) | (1<<17) ); 641 cap_save &= ( (1<<28) | (1<<17) );
637 cap_save |= (1 << 27); 642 cap_save |= (1 << 27);
643 impl_save = readl(mmio + HOST_PORTS_IMPL);
638 644
639 /* global controller reset */ 645 /* global controller reset */
640 tmp = readl(mmio + HOST_CTL); 646 tmp = readl(mmio + HOST_CTL);
@@ -655,10 +661,21 @@ static int ahci_reset_controller(void __iomem *mmio, struct pci_dev *pdev)
655 return -EIO; 661 return -EIO;
656 } 662 }
657 663
664 /* turn on AHCI mode */
658 writel(HOST_AHCI_EN, mmio + HOST_CTL); 665 writel(HOST_AHCI_EN, mmio + HOST_CTL);
659 (void) readl(mmio + HOST_CTL); /* flush */ 666 (void) readl(mmio + HOST_CTL); /* flush */
667
668 /* These write-once registers are normally cleared on reset.
669 * Restore BIOS values... which we HOPE were present before
670 * reset.
671 */
672 if (!impl_save) {
673 impl_save = (1 << ahci_nr_ports(cap_save)) - 1;
674 dev_printk(KERN_WARNING, &pdev->dev,
675 "PORTS_IMPL is zero, forcing 0x%x\n", impl_save);
676 }
660 writel(cap_save, mmio + HOST_CAP); 677 writel(cap_save, mmio + HOST_CAP);
661 writel(0xf, mmio + HOST_PORTS_IMPL); 678 writel(impl_save, mmio + HOST_PORTS_IMPL);
662 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */ 679 (void) readl(mmio + HOST_PORTS_IMPL); /* flush */
663 680
664 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 681 if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
@@ -1467,7 +1484,7 @@ static int ahci_host_init(struct ata_probe_ent *probe_ent)
1467 1484
1468 hpriv->cap = readl(mmio + HOST_CAP); 1485 hpriv->cap = readl(mmio + HOST_CAP);
1469 hpriv->port_map = readl(mmio + HOST_PORTS_IMPL); 1486 hpriv->port_map = readl(mmio + HOST_PORTS_IMPL);
1470 probe_ent->n_ports = (hpriv->cap & 0x1f) + 1; 1487 probe_ent->n_ports = ahci_nr_ports(hpriv->cap);
1471 1488
1472 VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n", 1489 VPRINTK("cap 0x%x port_map 0x%x n_ports %d\n",
1473 hpriv->cap, hpriv->port_map, probe_ent->n_ports); 1490 hpriv->cap, hpriv->port_map, probe_ent->n_ports);