ACPI / processor: Make it possible to get CPU hardware ID via GICC

Introduce a new function map_gicc_mpidr() to allow MPIDRs to be obtained
from the GICC Structure introduced by ACPI 5.1, since MPIDR for ARM64 is
64-bit, so typedef u64 for phys_cpuid_t.

The ARM architecture defines the MPIDR register as the CPU hardware
identifier. This patch adds the code infrastructure to retrieve the MPIDR
values from the ARM ACPI GICC structure in order to look-up the kernel CPU
hardware ids required by the ACPI core code to identify CPUs.

CC: Rafael J. Wysocki <rjw@rjwysocki.net>
CC: Catalin Marinas <catalin.marinas@arm.com>
CC: Will Deacon <will.deacon@arm.com>
Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
Tested-by: Yijing Wang <wangyijing@huawei.com>
Tested-by: Mark Langsdorf <mlangsdo@redhat.com>
Tested-by: Jon Masters <jcm@redhat.com>
Tested-by: Timur Tabi <timur@codeaurora.org>
Tested-by: Robert Richter <rrichter@cavium.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>

1 files changed, 30 insertions, 0 deletions

diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index 51cc29909e08..b1ec78b8a645 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -83,6 +83,31 @@ static int map_lsapic_id(struct acpi_subtable_header *entry,
         return 0;
 }
 
+/*
+ * Retrieve the ARM CPU physical identifier (MPIDR)
+ */
+static int map_gicc_mpidr(struct acpi_subtable_header *entry,
+                int device_declaration, u32 acpi_id, phys_cpuid_t *mpidr)
+{
+        struct acpi_madt_generic_interrupt *gicc =
+            container_of(entry, struct acpi_madt_generic_interrupt, header);
+
+        if (!(gicc->flags & ACPI_MADT_ENABLED))
+                return -ENODEV;
+
+        /* device_declaration means Device object in DSDT, in the
+         * GIC interrupt model, logical processors are required to
+         * have a Processor Device object in the DSDT, so we should
+         * check device_declaration here
+         */
+        if (device_declaration && (gicc->uid == acpi_id)) {
+                *mpidr = gicc->arm_mpidr;
+                return 0;
+        }
+
+        return -EINVAL;
+}
+
 static phys_cpuid_t map_madt_entry(int type, u32 acpi_id)
 {
         unsigned long madt_end, entry;
@@ -111,6 +136,9 @@ static phys_cpuid_t map_madt_entry(int type, u32 acpi_id)
                 } else if (header->type == ACPI_MADT_TYPE_LOCAL_SAPIC) {
                         if (!map_lsapic_id(header, type, acpi_id, &phys_id))
                                 break;
+                } else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) {
+                        if (!map_gicc_mpidr(header, type, acpi_id, &phys_id))
+                                break;
                 }
                 entry += header->length;
         }
@@ -143,6 +171,8 @@ static phys_cpuid_t map_mat_entry(acpi_handle handle, int type, u32 acpi_id)
                 map_lsapic_id(header, type, acpi_id, &phys_id);
         else if (header->type == ACPI_MADT_TYPE_LOCAL_X2APIC)
                 map_x2apic_id(header, type, acpi_id, &phys_id);
+        else if (header->type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
+                map_gicc_mpidr(header, type, acpi_id, &phys_id);
 
 exit:
         kfree(buffer.pointer);