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authorGuennadi Liakhovetski <g.liakhovetski@gmx.de>2009-07-31 09:42:09 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2009-07-31 10:38:03 -0400
commitff46a474ca2566d79e8d7454442b56d82bce37c1 (patch)
treeb222311b655a18d89769fbda73fc1e5b0f91c468 /arch
parent4be3bd7849165e7efa6b0b35a23d6a3598d97465 (diff)
mx3: Fix double pin allocation in pcm037_eet.c
SPI pins are now allocated in pcm037.c, remove them from EET. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mx3/pcm037_eet.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/arch/arm/mach-mx3/pcm037_eet.c b/arch/arm/mach-mx3/pcm037_eet.c
index fe52fb1bb8b7..8d386000fc40 100644
--- a/arch/arm/mach-mx3/pcm037_eet.c
+++ b/arch/arm/mach-mx3/pcm037_eet.c
@@ -24,15 +24,6 @@
24#include "devices.h" 24#include "devices.h"
25 25
26static unsigned int pcm037_eet_pins[] = { 26static unsigned int pcm037_eet_pins[] = {
27 /* SPI #1 */
28 MX31_PIN_CSPI1_MISO__MISO,
29 MX31_PIN_CSPI1_MOSI__MOSI,
30 MX31_PIN_CSPI1_SCLK__SCLK,
31 MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
32 MX31_PIN_CSPI1_SS0__SS0,
33 MX31_PIN_CSPI1_SS1__SS1,
34 MX31_PIN_CSPI1_SS2__SS2,
35
36 /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */ 27 /* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
37 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO), 28 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO),
38 /* GPIO keys */ 29 /* GPIO keys */