diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2012-11-30 11:27:27 -0500 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-12-13 12:15:24 -0500 |
| commit | f772cdb2bd544eeb3e83a8bb42629d155c1b53fd (patch) | |
| tree | bb368b90fd756fa08476fecb1efa3dea2f09f41f /arch | |
| parent | d7ea335c05ba7c013615d1e0d5a71459eb4195e8 (diff) | |
MIPS: Remove usage of CEVT_R4K_LIB config option.
Manuel Lauss <manuel.lauss@gmail.com> writes:
I introduced it as a fallback because early revisions of Alchemy hardware
we shipped had a non-functional 32kHz timer and had to rely on the r4k
timer instead. Previously the r4k timer was initialized regardless, but
it's useless with the "wait" instruction.
So long story short: I need either the on-chip 32kHz timer OR the r4k
timer if the 32kHz one is unusable, but not both, and r4k timer is useless
when au1k_idle is in use.
The current in-kernel Alchemy boards all work with the 32kHz timer, so I'm
not against removing R4K_LIB symbols.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/mips/Kconfig | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/time.h | 2 | ||||
| -rw-r--r-- | arch/mips/kernel/Makefile | 2 |
3 files changed, 2 insertions, 8 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b04b4916aa3d..53470f0437c3 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
| @@ -54,7 +54,7 @@ choice | |||
| 54 | config MIPS_ALCHEMY | 54 | config MIPS_ALCHEMY |
| 55 | bool "Alchemy processor based machines" | 55 | bool "Alchemy processor based machines" |
| 56 | select 64BIT_PHYS_ADDR | 56 | select 64BIT_PHYS_ADDR |
| 57 | select CEVT_R4K_LIB | 57 | select CEVT_R4K |
| 58 | select CSRC_R4K | 58 | select CSRC_R4K |
| 59 | select IRQ_CPU | 59 | select IRQ_CPU |
| 60 | select SYS_HAS_CPU_MIPS32_R1 | 60 | select SYS_HAS_CPU_MIPS32_R1 |
| @@ -926,11 +926,7 @@ config CEVT_DS1287 | |||
| 926 | config CEVT_GT641XX | 926 | config CEVT_GT641XX |
| 927 | bool | 927 | bool |
| 928 | 928 | ||
| 929 | config CEVT_R4K_LIB | ||
| 930 | bool | ||
| 931 | |||
| 932 | config CEVT_R4K | 929 | config CEVT_R4K |
| 933 | select CEVT_R4K_LIB | ||
| 934 | bool | 930 | bool |
| 935 | 931 | ||
| 936 | config CEVT_SB1250 | 932 | config CEVT_SB1250 |
diff --git a/arch/mips/include/asm/time.h b/arch/mips/include/asm/time.h index 6be93a468ec9..761f2e92119e 100644 --- a/arch/mips/include/asm/time.h +++ b/arch/mips/include/asm/time.h | |||
| @@ -50,10 +50,8 @@ extern int (*perf_irq)(void); | |||
| 50 | /* | 50 | /* |
| 51 | * Initialize the calling CPU's compare interrupt as clockevent device | 51 | * Initialize the calling CPU's compare interrupt as clockevent device |
| 52 | */ | 52 | */ |
| 53 | #ifdef CONFIG_CEVT_R4K_LIB | ||
| 54 | extern unsigned int __weak get_c0_compare_int(void); | 53 | extern unsigned int __weak get_c0_compare_int(void); |
| 55 | extern int r4k_clockevent_init(void); | 54 | extern int r4k_clockevent_init(void); |
| 56 | #endif | ||
| 57 | 55 | ||
| 58 | static inline int mips_clockevent_init(void) | 56 | static inline int mips_clockevent_init(void) |
| 59 | { | 57 | { |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index d9abe17b3556..540dff8c7217 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
| @@ -16,7 +16,7 @@ CFLAGS_REMOVE_perf_event_mipsxx.o = -pg | |||
| 16 | endif | 16 | endif |
| 17 | 17 | ||
| 18 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o | 18 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o |
| 19 | obj-$(CONFIG_CEVT_R4K_LIB) += cevt-r4k.o | 19 | obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o |
| 20 | obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o | 20 | obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o |
| 21 | obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o | 21 | obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o |
| 22 | obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o | 22 | obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o |
