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authorLinus Torvalds <torvalds@linux-foundation.org>2010-02-27 16:26:18 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-02-27 16:26:18 -0500
commitef1a8de8ea004a689b2aa9f5cefcba2b1a0262f2 (patch)
tree14324fad5e33c50c7d00646b7f6d2524943e7726 /arch
parent1c32fd0c5ac1ccbdc37a1a392a5d75cbe059b401 (diff)
parent3d98ffbffb16f2a1569b83cb78db0b5100e6c937 (diff)
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (88 commits) powerpc: Fix lwsync feature fixup vs. modules on 64-bit powerpc: Convert pmc_owner_lock to raw_spinlock powerpc: Convert die.lock to raw_spinlock powerpc: Convert tlbivax_lock to raw_spinlock powerpc: Convert mpic locks to raw_spinlock powerpc: Convert pmac_pic_lock to raw_spinlock powerpc: Convert big_irq_lock to raw_spinlock powerpc: Convert feature_lock to raw_spinlock powerpc: Convert i8259_lock to raw_spinlock powerpc: Convert beat_htab_lock to raw_spinlock powerpc: Convert confirm_error_lock to raw_spinlock powerpc: Convert ipic_lock to raw_spinlock powerpc: Convert native_tlbie_lock to raw_spinlock powerpc: Convert beatic_irq_mask_lock to raw_spinlock powerpc: Convert nv_lock to raw_spinlock powerpc: Convert context_lock to raw_spinlock powerpc/85xx: Add NOR, LEDs and PIB support for MPC8568E-MDS boards powerpc/86xx: Enable VME driver on the GE SBC610 powerpc/86xx: Enable VME driver on the GE PPC9A powerpc/86xx: Add MSI section to GE PPC9A DTS ...
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/Kconfig29
-rw-r--r--arch/powerpc/boot/dts/arches.dts12
-rw-r--r--arch/powerpc/boot/dts/gef_ppc9a.dts16
-rw-r--r--arch/powerpc/boot/dts/gef_sbc310.dts19
-rw-r--r--arch/powerpc/boot/dts/gef_sbc610.dts66
-rw-r--r--arch/powerpc/boot/dts/glacier.dts76
-rw-r--r--arch/powerpc/boot/dts/katmai.dts71
-rw-r--r--arch/powerpc/boot/dts/mpc5121ads.dts55
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts65
-rw-r--r--arch/powerpc/configs/44x/katmai_defconfig94
-rw-r--r--arch/powerpc/configs/86xx/gef_ppc9a_defconfig47
-rw-r--r--arch/powerpc/configs/86xx/gef_sbc610_defconfig65
-rw-r--r--arch/powerpc/configs/mpc512x_defconfig1694
-rw-r--r--arch/powerpc/configs/ppc64_defconfig75
-rw-r--r--arch/powerpc/configs/pseries_defconfig63
-rw-r--r--arch/powerpc/include/asm/asm-compat.h5
-rw-r--r--arch/powerpc/include/asm/atomic.h48
-rw-r--r--arch/powerpc/include/asm/bitops.h56
-rw-r--r--arch/powerpc/include/asm/cputable.h4
-rw-r--r--arch/powerpc/include/asm/cputime.h7
-rw-r--r--arch/powerpc/include/asm/feature-fixups.h2
-rw-r--r--arch/powerpc/include/asm/futex.h6
-rw-r--r--arch/powerpc/include/asm/hardirq.h30
-rw-r--r--arch/powerpc/include/asm/local.h12
-rw-r--r--arch/powerpc/include/asm/mpc5121.h24
-rw-r--r--arch/powerpc/include/asm/mpc52xx_psc.h4
-rw-r--r--arch/powerpc/include/asm/mpic.h2
-rw-r--r--arch/powerpc/include/asm/mutex.h6
-rw-r--r--arch/powerpc/include/asm/param.h23
-rw-r--r--arch/powerpc/include/asm/pmac_feature.h2
-rw-r--r--arch/powerpc/include/asm/ppc-opcode.h18
-rw-r--r--arch/powerpc/include/asm/ppc-pci.h5
-rw-r--r--arch/powerpc/include/asm/processor.h36
-rw-r--r--arch/powerpc/include/asm/ptrace.h77
-rw-r--r--arch/powerpc/include/asm/reg_booke.h96
-rw-r--r--arch/powerpc/include/asm/spinlock.h32
-rw-r--r--arch/powerpc/include/asm/synch.h12
-rw-r--r--arch/powerpc/include/asm/system.h21
-rw-r--r--arch/powerpc/include/asm/topology.h48
-rw-r--r--arch/powerpc/kernel/entry_64.S3
-rw-r--r--arch/powerpc/kernel/firmware.c2
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S4
-rw-r--r--arch/powerpc/kernel/irq.c140
-rw-r--r--arch/powerpc/kernel/kgdb.c2
-rw-r--r--arch/powerpc/kernel/kprobes.c4
-rw-r--r--arch/powerpc/kernel/lparcfg.c10
-rw-r--r--arch/powerpc/kernel/nvram_64.c6
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c2
-rw-r--r--arch/powerpc/kernel/pmc.c10
-rw-r--r--arch/powerpc/kernel/process.c116
-rw-r--r--arch/powerpc/kernel/prom_init.c81
-rw-r--r--arch/powerpc/kernel/ptrace.c516
-rw-r--r--arch/powerpc/kernel/signal.c6
-rw-r--r--arch/powerpc/kernel/signal_32.c16
-rw-r--r--arch/powerpc/kernel/time.c10
-rw-r--r--arch/powerpc/kernel/traps.c128
-rw-r--r--arch/powerpc/lib/copypage_64.S28
-rw-r--r--arch/powerpc/lib/copyuser_64.S80
-rw-r--r--arch/powerpc/lib/feature-fixups.c3
-rw-r--r--arch/powerpc/mm/40x_mmu.c4
-rw-r--r--arch/powerpc/mm/hash_native_64.c19
-rw-r--r--arch/powerpc/mm/mmu_context_hash64.c10
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c14
-rw-r--r--arch/powerpc/mm/tlb_low_64e.S2
-rw-r--r--arch/powerpc/mm/tlb_nohash.c6
-rw-r--r--arch/powerpc/platforms/512x/clock.c6
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads.c3
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads_cpld.c2
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_generic.c3
-rw-r--r--arch/powerpc/platforms/512x/mpc512x.h3
-rw-r--r--arch/powerpc/platforms/512x/mpc512x_shared.c43
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_mds.c3
-rw-r--r--arch/powerpc/platforms/85xx/socrates_fpga_pic.c2
-rw-r--r--arch/powerpc/platforms/85xx/stx_gp3.c2
-rw-r--r--arch/powerpc/platforms/cell/beat_htab.c24
-rw-r--r--arch/powerpc/platforms/cell/beat_interrupt.c20
-rw-r--r--arch/powerpc/platforms/cell/interrupt.c4
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c2
-rw-r--r--arch/powerpc/platforms/iseries/irq.c2
-rw-r--r--arch/powerpc/platforms/iseries/proc.c2
-rw-r--r--arch/powerpc/platforms/iseries/setup.c2
-rw-r--r--arch/powerpc/platforms/powermac/bootx_init.c4
-rw-r--r--arch/powerpc/platforms/powermac/feature.c6
-rw-r--r--arch/powerpc/platforms/powermac/nvram.c14
-rw-r--r--arch/powerpc/platforms/powermac/pfunc_base.c24
-rw-r--r--arch/powerpc/platforms/powermac/pic.c40
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c18
-rw-r--r--arch/powerpc/platforms/pseries/eeh_driver.c10
-rw-r--r--arch/powerpc/platforms/pseries/eeh_event.c2
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-cpu.c22
-rw-r--r--arch/powerpc/platforms/pseries/hvCall_inst.c4
-rw-r--r--arch/powerpc/platforms/pseries/pci_dlpar.c2
-rw-r--r--arch/powerpc/platforms/pseries/phyp_dump.c6
-rw-r--r--arch/powerpc/platforms/pseries/smp.c4
-rw-r--r--arch/powerpc/platforms/pseries/xics.c32
-rw-r--r--arch/powerpc/sysdev/cpm1.c2
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c2
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c2
-rw-r--r--arch/powerpc/sysdev/i8259.c24
-rw-r--r--arch/powerpc/sysdev/ipic.c22
-rw-r--r--arch/powerpc/sysdev/mpc8xx_pic.c2
-rw-r--r--arch/powerpc/sysdev/mpic.c40
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c2
-rw-r--r--arch/powerpc/sysdev/mv64x60_dev.c3
-rw-r--r--arch/powerpc/sysdev/ppc4xx_soc.c3
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c4
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_io.c8
-rw-r--r--arch/powerpc/sysdev/uic.c2
-rw-r--r--arch/powerpc/xmon/xmon.c2
109 files changed, 3959 insertions, 715 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 50c9af43e017..155d571f5e26 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -58,7 +58,7 @@ config IRQ_PER_CPU
58 58
59config NR_IRQS 59config NR_IRQS
60 int "Number of virtual interrupt numbers" 60 int "Number of virtual interrupt numbers"
61 range 32 512 61 range 32 32768
62 default "512" 62 default "512"
63 help 63 help
64 This defines the number of virtual interrupt numbers the kernel 64 This defines the number of virtual interrupt numbers the kernel
@@ -241,6 +241,33 @@ config PPC_OF_PLATFORM_PCI
241config ARCH_SUPPORTS_DEBUG_PAGEALLOC 241config ARCH_SUPPORTS_DEBUG_PAGEALLOC
242 def_bool y 242 def_bool y
243 243
244config PPC_ADV_DEBUG_REGS
245 bool
246 depends on 40x || BOOKE
247 default y
248
249config PPC_ADV_DEBUG_IACS
250 int
251 depends on PPC_ADV_DEBUG_REGS
252 default 4 if 44x
253 default 2
254
255config PPC_ADV_DEBUG_DACS
256 int
257 depends on PPC_ADV_DEBUG_REGS
258 default 2
259
260config PPC_ADV_DEBUG_DVCS
261 int
262 depends on PPC_ADV_DEBUG_REGS
263 default 2 if 44x
264 default 0
265
266config PPC_ADV_DEBUG_DAC_RANGE
267 bool
268 depends on PPC_ADV_DEBUG_REGS && 44x
269 default y
270
244source "init/Kconfig" 271source "init/Kconfig"
245 272
246source "kernel/Kconfig.freezer" 273source "kernel/Kconfig.freezer"
diff --git a/arch/powerpc/boot/dts/arches.dts b/arch/powerpc/boot/dts/arches.dts
index 414ef8b7e575..30f41204acfa 100644
--- a/arch/powerpc/boot/dts/arches.dts
+++ b/arch/powerpc/boot/dts/arches.dts
@@ -60,6 +60,7 @@
60 d-cache-size = <32768>; 60 d-cache-size = <32768>;
61 dcr-controller; 61 dcr-controller;
62 dcr-access-method = "native"; 62 dcr-access-method = "native";
63 next-level-cache = <&L2C0>;
63 }; 64 };
64 }; 65 };
65 66
@@ -146,6 +147,13 @@
146 dcr-reg = <0x010 0x002>; 147 dcr-reg = <0x010 0x002>;
147 }; 148 };
148 149
150 CRYPTO: crypto@180000 {
151 compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
152 reg = <4 0x00180000 0x80400>;
153 interrupt-parent = <&UIC0>;
154 interrupts = <0x1d 0x4>;
155 };
156
149 MAL0: mcmal { 157 MAL0: mcmal {
150 compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 158 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
151 dcr-reg = <0x180 0x062>; 159 dcr-reg = <0x180 0x062>;
@@ -274,6 +282,7 @@
274 max-frame-size = <9000>; 282 max-frame-size = <9000>;
275 rx-fifo-size = <4096>; 283 rx-fifo-size = <4096>;
276 tx-fifo-size = <2048>; 284 tx-fifo-size = <2048>;
285 rx-fifo-size-gige = <16384>;
277 phy-mode = "sgmii"; 286 phy-mode = "sgmii";
278 phy-map = <0xffffffff>; 287 phy-map = <0xffffffff>;
279 gpcs-address = <0x0000000a>; 288 gpcs-address = <0x0000000a>;
@@ -302,6 +311,7 @@
302 max-frame-size = <9000>; 311 max-frame-size = <9000>;
303 rx-fifo-size = <4096>; 312 rx-fifo-size = <4096>;
304 tx-fifo-size = <2048>; 313 tx-fifo-size = <2048>;
314 rx-fifo-size-gige = <16384>;
305 phy-mode = "sgmii"; 315 phy-mode = "sgmii";
306 phy-map = <0x00000000>; 316 phy-map = <0x00000000>;
307 gpcs-address = <0x0000000b>; 317 gpcs-address = <0x0000000b>;
@@ -331,6 +341,8 @@
331 max-frame-size = <9000>; 341 max-frame-size = <9000>;
332 rx-fifo-size = <4096>; 342 rx-fifo-size = <4096>;
333 tx-fifo-size = <2048>; 343 tx-fifo-size = <2048>;
344 rx-fifo-size-gige = <16384>;
345 tx-fifo-size-gige = <16384>; /* emac2&3 only */
334 phy-mode = "sgmii"; 346 phy-mode = "sgmii";
335 phy-map = <0x00000001>; 347 phy-map = <0x00000001>;
336 gpcs-address = <0x0000000C>; 348 gpcs-address = <0x0000000C>;
diff --git a/arch/powerpc/boot/dts/gef_ppc9a.dts b/arch/powerpc/boot/dts/gef_ppc9a.dts
index c86114e93f1e..977f260d5e64 100644
--- a/arch/powerpc/boot/dts/gef_ppc9a.dts
+++ b/arch/powerpc/boot/dts/gef_ppc9a.dts
@@ -341,6 +341,22 @@
341 device_type = "open-pic"; 341 device_type = "open-pic";
342 }; 342 };
343 343
344 msi@41600 {
345 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
346 reg = <0x41600 0x80>;
347 msi-available-ranges = <0 0x100>;
348 interrupts = <
349 0xe0 0
350 0xe1 0
351 0xe2 0
352 0xe3 0
353 0xe4 0
354 0xe5 0
355 0xe6 0
356 0xe7 0>;
357 interrupt-parent = <&mpic>;
358 };
359
344 global-utilities@e0000 { 360 global-utilities@e0000 {
345 compatible = "fsl,mpc8641-guts"; 361 compatible = "fsl,mpc8641-guts";
346 reg = <0xe0000 0x1000>; 362 reg = <0xe0000 0x1000>;
diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts
index 820c2b355ab1..8e4efff3bda1 100644
--- a/arch/powerpc/boot/dts/gef_sbc310.dts
+++ b/arch/powerpc/boot/dts/gef_sbc310.dts
@@ -32,6 +32,7 @@
32 serial0 = &serial0; 32 serial0 = &serial0;
33 serial1 = &serial1; 33 serial1 = &serial1;
34 pci0 = &pci0; 34 pci0 = &pci0;
35 pci1 = &pci1;
35 }; 36 };
36 37
37 cpus { 38 cpus {
@@ -338,6 +339,22 @@
338 device_type = "open-pic"; 339 device_type = "open-pic";
339 }; 340 };
340 341
342 msi@41600 {
343 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
344 reg = <0x41600 0x80>;
345 msi-available-ranges = <0 0x100>;
346 interrupts = <
347 0xe0 0
348 0xe1 0
349 0xe2 0
350 0xe3 0
351 0xe4 0
352 0xe5 0
353 0xe6 0
354 0xe7 0>;
355 interrupt-parent = <&mpic>;
356 };
357
341 global-utilities@e0000 { 358 global-utilities@e0000 {
342 compatible = "fsl,mpc8641-guts"; 359 compatible = "fsl,mpc8641-guts";
343 reg = <0xe0000 0x1000>; 360 reg = <0xe0000 0x1000>;
@@ -358,7 +375,7 @@
358 clock-frequency = <33333333>; 375 clock-frequency = <33333333>;
359 interrupt-parent = <&mpic>; 376 interrupt-parent = <&mpic>;
360 interrupts = <0x18 0x2>; 377 interrupts = <0x18 0x2>;
361 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 378 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
362 interrupt-map = < 379 interrupt-map = <
363 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 380 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
364 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 381 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
diff --git a/arch/powerpc/boot/dts/gef_sbc610.dts b/arch/powerpc/boot/dts/gef_sbc610.dts
index 30911adefc8e..bb7060078fb4 100644
--- a/arch/powerpc/boot/dts/gef_sbc610.dts
+++ b/arch/powerpc/boot/dts/gef_sbc610.dts
@@ -75,14 +75,48 @@
75 interrupts = <19 2>; 75 interrupts = <19 2>;
76 interrupt-parent = <&mpic>; 76 interrupt-parent = <&mpic>;
77 77
78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash 78 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
79 1 0 0xe8000000 0x08000000 // Paged Flash 0 79 1 0 0xe8000000 0x08000000 // Paged Flash 0
80 2 0 0xe0000000 0x08000000 // Paged Flash 1 80 2 0 0xe0000000 0x08000000 // Paged Flash 1
81 3 0 0xfc100000 0x00020000 // NVRAM 81 3 0 0xfc100000 0x00020000 // NVRAM
82 4 0 0xfc000000 0x00008000 // FPGA 82 4 0 0xfc000000 0x00008000 // FPGA
83 5 0 0xfc008000 0x00008000 // AFIX FPGA 83 5 0 0xfc008000 0x00008000 // AFIX FPGA
84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit) 84 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit) 85 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
86
87 /* flash@0,0 is a mirror of part of the memory in flash@1,0
88 flash@0,0 {
89 compatible = "gef,sbc610-firmware-mirror", "cfi-flash";
90 reg = <0x0 0x0 0x1000000>;
91 bank-width = <4>;
92 device-width = <2>;
93 #address-cells = <1>;
94 #size-cells = <1>;
95 partition@0 {
96 label = "firmware";
97 reg = <0x0 0x1000000>;
98 read-only;
99 };
100 };
101 */
102
103 flash@1,0 {
104 compatible = "gef,sbc610-paged-flash", "cfi-flash";
105 reg = <0x1 0x0 0x8000000>;
106 bank-width = <4>;
107 device-width = <2>;
108 #address-cells = <1>;
109 #size-cells = <1>;
110 partition@0 {
111 label = "user";
112 reg = <0x0 0x7800000>;
113 };
114 partition@7800000 {
115 label = "firmware";
116 reg = <0x7800000 0x800000>;
117 read-only;
118 };
119 };
86 120
87 nvram@3,0 { 121 nvram@3,0 {
88 device_type = "nvram"; 122 device_type = "nvram";
@@ -305,6 +339,22 @@
305 device_type = "open-pic"; 339 device_type = "open-pic";
306 }; 340 };
307 341
342 msi@41600 {
343 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi";
344 reg = <0x41600 0x80>;
345 msi-available-ranges = <0 0x100>;
346 interrupts = <
347 0xe0 0
348 0xe1 0
349 0xe2 0
350 0xe3 0
351 0xe4 0
352 0xe5 0
353 0xe6 0
354 0xe7 0>;
355 interrupt-parent = <&mpic>;
356 };
357
308 global-utilities@e0000 { 358 global-utilities@e0000 {
309 compatible = "fsl,mpc8641-guts"; 359 compatible = "fsl,mpc8641-guts";
310 reg = <0xe0000 0x1000>; 360 reg = <0xe0000 0x1000>;
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index f6f618939293..d62a4fb6f93c 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Device Tree Source for AMCC Glacier (460GT) 2 * Device Tree Source for AMCC Glacier (460GT)
3 * 3 *
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> 4 * Copyright 2008-2010 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 * 5 *
6 * This file is licensed under the terms of the GNU General Public 6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without 7 * License version 2. This program is licensed "as is" without
@@ -42,6 +42,7 @@
42 d-cache-size = <32768>; 42 d-cache-size = <32768>;
43 dcr-controller; 43 dcr-controller;
44 dcr-access-method = "native"; 44 dcr-access-method = "native";
45 next-level-cache = <&L2C0>;
45 }; 46 };
46 }; 47 };
47 48
@@ -106,6 +107,16 @@
106 dcr-reg = <0x00c 0x002>; 107 dcr-reg = <0x00c 0x002>;
107 }; 108 };
108 109
110 L2C0: l2c {
111 compatible = "ibm,l2-cache-460gt", "ibm,l2-cache";
112 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
113 0x030 0x008>; /* L2 cache DCR's */
114 cache-line-size = <32>; /* 32 bytes */
115 cache-size = <262144>; /* L2, 256K */
116 interrupt-parent = <&UIC1>;
117 interrupts = <11 1>;
118 };
119
109 plb { 120 plb {
110 compatible = "ibm,plb-460gt", "ibm,plb4"; 121 compatible = "ibm,plb-460gt", "ibm,plb4";
111 #address-cells = <2>; 122 #address-cells = <2>;
@@ -118,6 +129,13 @@
118 dcr-reg = <0x010 0x002>; 129 dcr-reg = <0x010 0x002>;
119 }; 130 };
120 131
132 CRYPTO: crypto@180000 {
133 compatible = "amcc,ppc460gt-crypto", "amcc,ppc4xx-crypto";
134 reg = <4 0x00180000 0x80400>;
135 interrupt-parent = <&UIC0>;
136 interrupts = <0x1d 0x4>;
137 };
138
121 MAL0: mcmal { 139 MAL0: mcmal {
122 compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 140 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
123 dcr-reg = <0x180 0x062>; 141 dcr-reg = <0x180 0x062>;
@@ -186,6 +204,29 @@
186 reg = <0x03fa0000 0x00060000>; 204 reg = <0x03fa0000 0x00060000>;
187 }; 205 };
188 }; 206 };
207
208 ndfc@3,0 {
209 compatible = "ibm,ndfc";
210 reg = <0x00000003 0x00000000 0x00002000>;
211 ccr = <0x00001000>;
212 bank-settings = <0x80002222>;
213 #address-cells = <1>;
214 #size-cells = <1>;
215
216 nand {
217 #address-cells = <1>;
218 #size-cells = <1>;
219
220 partition@0 {
221 label = "u-boot";
222 reg = <0x00000000 0x00100000>;
223 };
224 partition@100000 {
225 label = "user";
226 reg = <0x00000000 0x03f00000>;
227 };
228 };
229 };
189 }; 230 };
190 231
191 UART0: serial@ef600300 { 232 UART0: serial@ef600300 {
@@ -237,6 +278,20 @@
237 reg = <0xef600700 0x00000014>; 278 reg = <0xef600700 0x00000014>;
238 interrupt-parent = <&UIC0>; 279 interrupt-parent = <&UIC0>;
239 interrupts = <0x2 0x4>; 280 interrupts = <0x2 0x4>;
281 #address-cells = <1>;
282 #size-cells = <0>;
283 rtc@68 {
284 compatible = "stm,m41t80";
285 reg = <0x68>;
286 interrupt-parent = <&UIC2>;
287 interrupts = <0x19 0x8>;
288 };
289 sttm@48 {
290 compatible = "ad,ad7414";
291 reg = <0x48>;
292 interrupt-parent = <&UIC1>;
293 interrupts = <0x14 0x8>;
294 };
240 }; 295 };
241 296
242 IIC1: i2c@ef600800 { 297 IIC1: i2c@ef600800 {
@@ -275,7 +330,7 @@
275 330
276 EMAC0: ethernet@ef600e00 { 331 EMAC0: ethernet@ef600e00 {
277 device_type = "network"; 332 device_type = "network";
278 compatible = "ibm,emac-460gt", "ibm,emac4"; 333 compatible = "ibm,emac-460gt", "ibm,emac4sync";
279 interrupt-parent = <&EMAC0>; 334 interrupt-parent = <&EMAC0>;
280 interrupts = <0x0 0x1>; 335 interrupts = <0x0 0x1>;
281 #interrupt-cells = <1>; 336 #interrupt-cells = <1>;
@@ -283,7 +338,7 @@
283 #size-cells = <0>; 338 #size-cells = <0>;
284 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 339 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
285 /*Wake*/ 0x1 &UIC2 0x14 0x4>; 340 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
286 reg = <0xef600e00 0x00000074>; 341 reg = <0xef600e00 0x000000c4>;
287 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 342 local-mac-address = [000000000000]; /* Filled in by U-Boot */
288 mal-device = <&MAL0>; 343 mal-device = <&MAL0>;
289 mal-tx-channel = <0>; 344 mal-tx-channel = <0>;
@@ -305,7 +360,7 @@
305 360
306 EMAC1: ethernet@ef600f00 { 361 EMAC1: ethernet@ef600f00 {
307 device_type = "network"; 362 device_type = "network";
308 compatible = "ibm,emac-460gt", "ibm,emac4"; 363 compatible = "ibm,emac-460gt", "ibm,emac4sync";
309 interrupt-parent = <&EMAC1>; 364 interrupt-parent = <&EMAC1>;
310 interrupts = <0x0 0x1>; 365 interrupts = <0x0 0x1>;
311 #interrupt-cells = <1>; 366 #interrupt-cells = <1>;
@@ -313,7 +368,7 @@
313 #size-cells = <0>; 368 #size-cells = <0>;
314 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 369 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
315 /*Wake*/ 0x1 &UIC2 0x15 0x4>; 370 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
316 reg = <0xef600f00 0x00000074>; 371 reg = <0xef600f00 0x000000c4>;
317 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 372 local-mac-address = [000000000000]; /* Filled in by U-Boot */
318 mal-device = <&MAL0>; 373 mal-device = <&MAL0>;
319 mal-tx-channel = <1>; 374 mal-tx-channel = <1>;
@@ -336,7 +391,7 @@
336 391
337 EMAC2: ethernet@ef601100 { 392 EMAC2: ethernet@ef601100 {
338 device_type = "network"; 393 device_type = "network";
339 compatible = "ibm,emac-460gt", "ibm,emac4"; 394 compatible = "ibm,emac-460gt", "ibm,emac4sync";
340 interrupt-parent = <&EMAC2>; 395 interrupt-parent = <&EMAC2>;
341 interrupts = <0x0 0x1>; 396 interrupts = <0x0 0x1>;
342 #interrupt-cells = <1>; 397 #interrupt-cells = <1>;
@@ -344,7 +399,7 @@
344 #size-cells = <0>; 399 #size-cells = <0>;
345 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 400 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
346 /*Wake*/ 0x1 &UIC2 0x16 0x4>; 401 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
347 reg = <0xef601100 0x00000074>; 402 reg = <0xef601100 0x000000c4>;
348 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 403 local-mac-address = [000000000000]; /* Filled in by U-Boot */
349 mal-device = <&MAL0>; 404 mal-device = <&MAL0>;
350 mal-tx-channel = <2>; 405 mal-tx-channel = <2>;
@@ -366,7 +421,7 @@
366 421
367 EMAC3: ethernet@ef601200 { 422 EMAC3: ethernet@ef601200 {
368 device_type = "network"; 423 device_type = "network";
369 compatible = "ibm,emac-460gt", "ibm,emac4"; 424 compatible = "ibm,emac-460gt", "ibm,emac4sync";
370 interrupt-parent = <&EMAC3>; 425 interrupt-parent = <&EMAC3>;
371 interrupts = <0x0 0x1>; 426 interrupts = <0x0 0x1>;
372 #interrupt-cells = <1>; 427 #interrupt-cells = <1>;
@@ -374,7 +429,7 @@
374 #size-cells = <0>; 429 #size-cells = <0>;
375 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 430 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
376 /*Wake*/ 0x1 &UIC2 0x17 0x4>; 431 /*Wake*/ 0x1 &UIC2 0x17 0x4>;
377 reg = <0xef601200 0x00000074>; 432 reg = <0xef601200 0x000000c4>;
378 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 433 local-mac-address = [000000000000]; /* Filled in by U-Boot */
379 mal-device = <&MAL0>; 434 mal-device = <&MAL0>;
380 mal-tx-channel = <3>; 435 mal-tx-channel = <3>;
@@ -414,6 +469,7 @@
414 * later cannot be changed 469 * later cannot be changed
415 */ 470 */
416 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 471 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
472 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
417 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; 473 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
418 474
419 /* Inbound 2GB range starting at 0 */ 475 /* Inbound 2GB range starting at 0 */
@@ -444,6 +500,7 @@
444 * later cannot be changed 500 * later cannot be changed
445 */ 501 */
446 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 502 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
503 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
447 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; 504 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
448 505
449 /* Inbound 2GB range starting at 0 */ 506 /* Inbound 2GB range starting at 0 */
@@ -485,6 +542,7 @@
485 * later cannot be changed 542 * later cannot be changed
486 */ 543 */
487 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 544 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
545 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
488 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; 546 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
489 547
490 /* Inbound 2GB range starting at 0 */ 548 /* Inbound 2GB range starting at 0 */
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
index 8f345de960cd..8cf2c0c88c05 100644
--- a/arch/powerpc/boot/dts/katmai.dts
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -156,7 +156,7 @@
156 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; 156 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
157 #address-cells = <1>; 157 #address-cells = <1>;
158 #size-cells = <1>; 158 #size-cells = <1>;
159 ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>; 159 ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>;
160 clock-frequency = <0>; /* Filled in by zImage */ 160 clock-frequency = <0>; /* Filled in by zImage */
161 161
162 EBC0: ebc { 162 EBC0: ebc {
@@ -165,14 +165,47 @@
165 #address-cells = <2>; 165 #address-cells = <2>;
166 #size-cells = <1>; 166 #size-cells = <1>;
167 clock-frequency = <0>; /* Filled in by zImage */ 167 clock-frequency = <0>; /* Filled in by zImage */
168 /* ranges property is supplied by U-Boot */
168 interrupts = <0x5 0x1>; 169 interrupts = <0x5 0x1>;
169 interrupt-parent = <&UIC1>; 170 interrupt-parent = <&UIC1>;
171
172 nor_flash@0,0 {
173 compatible = "cfi-flash";
174 bank-width = <2>;
175 reg = <0x00000000 0x00000000 0x01000000>;
176 #address-cells = <1>;
177 #size-cells = <1>;
178 partition@0 {
179 label = "kernel";
180 reg = <0x00000000 0x001e0000>;
181 };
182 partition@1e0000 {
183 label = "dtb";
184 reg = <0x001e0000 0x00020000>;
185 };
186 partition@200000 {
187 label = "root";
188 reg = <0x00200000 0x00200000>;
189 };
190 partition@400000 {
191 label = "user";
192 reg = <0x00400000 0x00b60000>;
193 };
194 partition@f60000 {
195 label = "env";
196 reg = <0x00f60000 0x00040000>;
197 };
198 partition@fa0000 {
199 label = "u-boot";
200 reg = <0x00fa0000 0x00060000>;
201 };
202 };
170 }; 203 };
171 204
172 UART0: serial@10000200 { 205 UART0: serial@f0000200 {
173 device_type = "serial"; 206 device_type = "serial";
174 compatible = "ns16550"; 207 compatible = "ns16550";
175 reg = <0x10000200 0x00000008>; 208 reg = <0xf0000200 0x00000008>;
176 virtual-reg = <0xa0000200>; 209 virtual-reg = <0xa0000200>;
177 clock-frequency = <0>; /* Filled in by zImage */ 210 clock-frequency = <0>; /* Filled in by zImage */
178 current-speed = <115200>; 211 current-speed = <115200>;
@@ -180,10 +213,10 @@
180 interrupts = <0x0 0x4>; 213 interrupts = <0x0 0x4>;
181 }; 214 };
182 215
183 UART1: serial@10000300 { 216 UART1: serial@f0000300 {
184 device_type = "serial"; 217 device_type = "serial";
185 compatible = "ns16550"; 218 compatible = "ns16550";
186 reg = <0x10000300 0x00000008>; 219 reg = <0xf0000300 0x00000008>;
187 virtual-reg = <0xa0000300>; 220 virtual-reg = <0xa0000300>;
188 clock-frequency = <0>; 221 clock-frequency = <0>;
189 current-speed = <0>; 222 current-speed = <0>;
@@ -192,10 +225,10 @@
192 }; 225 };
193 226
194 227
195 UART2: serial@10000600 { 228 UART2: serial@f0000600 {
196 device_type = "serial"; 229 device_type = "serial";
197 compatible = "ns16550"; 230 compatible = "ns16550";
198 reg = <0x10000600 0x00000008>; 231 reg = <0xf0000600 0x00000008>;
199 virtual-reg = <0xa0000600>; 232 virtual-reg = <0xa0000600>;
200 clock-frequency = <0>; 233 clock-frequency = <0>;
201 current-speed = <0>; 234 current-speed = <0>;
@@ -203,27 +236,27 @@
203 interrupts = <0x5 0x4>; 236 interrupts = <0x5 0x4>;
204 }; 237 };
205 238
206 IIC0: i2c@10000400 { 239 IIC0: i2c@f0000400 {
207 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 240 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
208 reg = <0x10000400 0x00000014>; 241 reg = <0xf0000400 0x00000014>;
209 interrupt-parent = <&UIC0>; 242 interrupt-parent = <&UIC0>;
210 interrupts = <0x2 0x4>; 243 interrupts = <0x2 0x4>;
211 }; 244 };
212 245
213 IIC1: i2c@10000500 { 246 IIC1: i2c@f0000500 {
214 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 247 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
215 reg = <0x10000500 0x00000014>; 248 reg = <0xf0000500 0x00000014>;
216 interrupt-parent = <&UIC0>; 249 interrupt-parent = <&UIC0>;
217 interrupts = <0x3 0x4>; 250 interrupts = <0x3 0x4>;
218 }; 251 };
219 252
220 EMAC0: ethernet@10000800 { 253 EMAC0: ethernet@f0000800 {
221 linux,network-index = <0x0>; 254 linux,network-index = <0x0>;
222 device_type = "network"; 255 device_type = "network";
223 compatible = "ibm,emac-440spe", "ibm,emac4"; 256 compatible = "ibm,emac-440spe", "ibm,emac4";
224 interrupt-parent = <&UIC1>; 257 interrupt-parent = <&UIC1>;
225 interrupts = <0x1c 0x4 0x1d 0x4>; 258 interrupts = <0x1c 0x4 0x1d 0x4>;
226 reg = <0x10000800 0x00000074>; 259 reg = <0xf0000800 0x00000074>;
227 local-mac-address = [000000000000]; 260 local-mac-address = [000000000000];
228 mal-device = <&MAL0>; 261 mal-device = <&MAL0>;
229 mal-tx-channel = <0>; 262 mal-tx-channel = <0>;
@@ -248,11 +281,11 @@
248 primary; 281 primary;
249 large-inbound-windows; 282 large-inbound-windows;
250 enable-msi-hole; 283 enable-msi-hole;
251 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ 284 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
252 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ 285 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
253 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ 286 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
254 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ 287 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
255 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ 288 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
256 289
257 /* Outbound ranges, one memory and one IO, 290 /* Outbound ranges, one memory and one IO,
258 * later cannot be changed 291 * later cannot be changed
@@ -453,6 +486,6 @@
453 }; 486 };
454 487
455 chosen { 488 chosen {
456 linux,stdout-path = "/plb/opb/serial@10000200"; 489 linux,stdout-path = "/plb/opb/serial@f0000200";
457 }; 490 };
458}; 491};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index c353dac33416..c9ef6bbe26cf 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -62,17 +62,12 @@
62 interrupt-parent = < &ipic >; 62 interrupt-parent = < &ipic >;
63 #address-cells = <1>; 63 #address-cells = <1>;
64 #size-cells = <1>; 64 #size-cells = <1>;
65 bank-width = <1>;
66 // ADS has two Hynix 512MB Nand flash chips in a single 65 // ADS has two Hynix 512MB Nand flash chips in a single
67 // stacked package . 66 // stacked package.
68 chips = <2>; 67 chips = <2>;
69 nand0@0 { 68 nand@0 {
70 label = "nand0"; 69 label = "nand";
71 reg = <0x00000000 0x02000000>; // first 32 MB of chip 0 70 reg = <0x00000000 0x40000000>; // 512MB + 512MB
72 };
73 nand1@20000000 {
74 label = "nand1";
75 reg = <0x20000000 0x02000000>; // first 32 MB of chip 1
76 }; 71 };
77 }; 72 };
78 73
@@ -166,6 +161,11 @@
166 interrupt-parent = < &ipic >; 161 interrupt-parent = < &ipic >;
167 }; 162 };
168 163
164 reset@e00 { // Reset module
165 compatible = "fsl,mpc5121-reset";
166 reg = <0xe00 0x100>;
167 };
168
169 clock@f00 { // Clock control 169 clock@f00 { // Clock control
170 compatible = "fsl,mpc5121-clock"; 170 compatible = "fsl,mpc5121-clock";
171 reg = <0xf00 0x100>; 171 reg = <0xf00 0x100>;
@@ -185,17 +185,15 @@
185 interrupt-parent = < &ipic >; 185 interrupt-parent = < &ipic >;
186 }; 186 };
187 187
188 mscan@1300 { 188 can@1300 {
189 compatible = "fsl,mpc5121-mscan"; 189 compatible = "fsl,mpc5121-mscan";
190 cell-index = <0>;
191 interrupts = <12 0x8>; 190 interrupts = <12 0x8>;
192 interrupt-parent = < &ipic >; 191 interrupt-parent = < &ipic >;
193 reg = <0x1300 0x80>; 192 reg = <0x1300 0x80>;
194 }; 193 };
195 194
196 mscan@1380 { 195 can@1380 {
197 compatible = "fsl,mpc5121-mscan"; 196 compatible = "fsl,mpc5121-mscan";
198 cell-index = <1>;
199 interrupts = <13 0x8>; 197 interrupts = <13 0x8>;
200 interrupt-parent = < &ipic >; 198 interrupt-parent = < &ipic >;
201 reg = <0x1380 0x80>; 199 reg = <0x1380 0x80>;
@@ -205,17 +203,31 @@
205 #address-cells = <1>; 203 #address-cells = <1>;
206 #size-cells = <0>; 204 #size-cells = <0>;
207 compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 205 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
208 cell-index = <0>;
209 reg = <0x1700 0x20>; 206 reg = <0x1700 0x20>;
210 interrupts = <9 0x8>; 207 interrupts = <9 0x8>;
211 interrupt-parent = < &ipic >; 208 interrupt-parent = < &ipic >;
209 fsl,preserve-clocking;
210
211 hwmon@4a {
212 compatible = "adi,ad7414";
213 reg = <0x4a>;
214 };
215
216 eeprom@50 {
217 compatible = "at,24c32";
218 reg = <0x50>;
219 };
220
221 rtc@68 {
222 compatible = "stm,m41t62";
223 reg = <0x68>;
224 };
212 }; 225 };
213 226
214 i2c@1720 { 227 i2c@1720 {
215 #address-cells = <1>; 228 #address-cells = <1>;
216 #size-cells = <0>; 229 #size-cells = <0>;
217 compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 230 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
218 cell-index = <1>;
219 reg = <0x1720 0x20>; 231 reg = <0x1720 0x20>;
220 interrupts = <10 0x8>; 232 interrupts = <10 0x8>;
221 interrupt-parent = < &ipic >; 233 interrupt-parent = < &ipic >;
@@ -225,7 +237,6 @@
225 #address-cells = <1>; 237 #address-cells = <1>;
226 #size-cells = <0>; 238 #size-cells = <0>;
227 compatible = "fsl,mpc5121-i2c", "fsl-i2c"; 239 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
228 cell-index = <2>;
229 reg = <0x1740 0x20>; 240 reg = <0x1740 0x20>;
230 interrupts = <11 0x8>; 241 interrupts = <11 0x8>;
231 interrupt-parent = < &ipic >; 242 interrupt-parent = < &ipic >;
@@ -244,7 +255,7 @@
244 }; 255 };
245 256
246 display@2100 { 257 display@2100 {
247 compatible = "fsl,mpc5121-diu", "fsl-diu"; 258 compatible = "fsl,mpc5121-diu";
248 reg = <0x2100 0x100>; 259 reg = <0x2100 0x100>;
249 interrupts = <64 0x8>; 260 interrupts = <64 0x8>;
250 interrupt-parent = < &ipic >; 261 interrupt-parent = < &ipic >;
@@ -277,7 +288,7 @@
277 288
278 // USB1 using external ULPI PHY 289 // USB1 using external ULPI PHY
279 //usb@3000 { 290 //usb@3000 {
280 // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; 291 // compatible = "fsl,mpc5121-usb2-dr";
281 // reg = <0x3000 0x1000>; 292 // reg = <0x3000 0x1000>;
282 // #address-cells = <1>; 293 // #address-cells = <1>;
283 // #size-cells = <0>; 294 // #size-cells = <0>;
@@ -285,12 +296,11 @@
285 // interrupts = <43 0x8>; 296 // interrupts = <43 0x8>;
286 // dr_mode = "otg"; 297 // dr_mode = "otg";
287 // phy_type = "ulpi"; 298 // phy_type = "ulpi";
288 // port1;
289 //}; 299 //};
290 300
291 // USB0 using internal UTMI PHY 301 // USB0 using internal UTMI PHY
292 usb@4000 { 302 usb@4000 {
293 compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr"; 303 compatible = "fsl,mpc5121-usb2-dr";
294 reg = <0x4000 0x1000>; 304 reg = <0x4000 0x1000>;
295 #address-cells = <1>; 305 #address-cells = <1>;
296 #size-cells = <0>; 306 #size-cells = <0>;
@@ -298,7 +308,8 @@
298 interrupts = <44 0x8>; 308 interrupts = <44 0x8>;
299 dr_mode = "otg"; 309 dr_mode = "otg";
300 phy_type = "utmi_wide"; 310 phy_type = "utmi_wide";
301 port0; 311 fsl,invert-drvvbus;
312 fsl,invert-pwr-fault;
302 }; 313 };
303 314
304 // IO control 315 // IO control
@@ -365,7 +376,7 @@
365 }; 376 };
366 377
367 dma@14000 { 378 dma@14000 {
368 compatible = "fsl,mpc5121-dma2"; 379 compatible = "fsl,mpc5121-dma";
369 reg = <0x14000 0x1800>; 380 reg = <0x14000 0x1800>;
370 interrupts = <65 0x8>; 381 interrupts = <65 0x8>;
371 interrupt-parent = < &ipic >; 382 interrupt-parent = < &ipic >;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 6d892ba74e55..92fb17876e7d 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -54,9 +54,52 @@
54 reg = <0x0 0x10000000>; 54 reg = <0x0 0x10000000>;
55 }; 55 };
56 56
57 bcsr@f8000000 { 57 localbus@e0005000 {
58 compatible = "fsl,mpc8568mds-bcsr"; 58 #address-cells = <2>;
59 reg = <0xf8000000 0x8000>; 59 #size-cells = <1>;
60 compatible = "fsl,mpc8568-localbus", "fsl,pq3-localbus",
61 "simple-bus";
62 reg = <0xe0005000 0x1000>;
63
64 ranges = <0x0 0x0 0xfe000000 0x02000000
65 0x1 0x0 0xf8000000 0x00008000
66 0x2 0x0 0xf0000000 0x04000000
67 0x4 0x0 0xf8008000 0x00008000
68 0x5 0x0 0xf8010000 0x00008000>;
69
70 nor@0,0 {
71 #address-cells = <1>;
72 #size-cells = <1>;
73 compatible = "cfi-flash";
74 reg = <0x0 0x0 0x02000000>;
75 bank-width = <2>;
76 device-width = <2>;
77 };
78
79 bcsr@1,0 {
80 #address-cells = <1>;
81 #size-cells = <1>;
82 compatible = "fsl,mpc8568mds-bcsr";
83 reg = <1 0 0x8000>;
84 ranges = <0 1 0 0x8000>;
85
86 bcsr5: gpio-controller@11 {
87 #gpio-cells = <2>;
88 compatible = "fsl,mpc8568mds-bcsr-gpio";
89 reg = <0x5 0x1>;
90 gpio-controller;
91 };
92 };
93
94 pib@4,0 {
95 compatible = "fsl,mpc8568mds-pib";
96 reg = <4 0 0x8000>;
97 };
98
99 pib@5,0 {
100 compatible = "fsl,mpc8568mds-pib";
101 reg = <5 0 0x8000>;
102 };
60 }; 103 };
61 104
62 soc8568@e0000000 { 105 soc8568@e0000000 {
@@ -610,4 +653,20 @@
610 sleep = <&pmc 0x00080000 /* controller */ 653 sleep = <&pmc 0x00080000 /* controller */
611 &pmc 0x00040000>; /* message unit */ 654 &pmc 0x00040000>; /* message unit */
612 }; 655 };
656
657 leds {
658 compatible = "gpio-leds";
659
660 green {
661 gpios = <&bcsr5 1 0>;
662 };
663
664 amber {
665 gpios = <&bcsr5 2 0>;
666 };
667
668 red {
669 gpios = <&bcsr5 3 0>;
670 };
671 };
613}; 672};
diff --git a/arch/powerpc/configs/44x/katmai_defconfig b/arch/powerpc/configs/44x/katmai_defconfig
index dec901f9cc84..af244e1d255e 100644
--- a/arch/powerpc/configs/44x/katmai_defconfig
+++ b/arch/powerpc/configs/44x/katmai_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc1 3# Linux kernel version: 2.6.33-rc5
4# Mon Jan 4 14:55:34 2010 4# Tue Jan 26 14:40:58 2010
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -106,6 +106,7 @@ CONFIG_INITRAMFS_SOURCE=""
106CONFIG_RD_GZIP=y 106CONFIG_RD_GZIP=y
107# CONFIG_RD_BZIP2 is not set 107# CONFIG_RD_BZIP2 is not set
108# CONFIG_RD_LZMA is not set 108# CONFIG_RD_LZMA is not set
109# CONFIG_RD_LZO is not set
109# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 110# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
110CONFIG_SYSCTL=y 111CONFIG_SYSCTL=y
111CONFIG_ANON_INODES=y 112CONFIG_ANON_INODES=y
@@ -442,7 +443,90 @@ CONFIG_EXTRA_FIRMWARE=""
442# CONFIG_SYS_HYPERVISOR is not set 443# CONFIG_SYS_HYPERVISOR is not set
443CONFIG_CONNECTOR=y 444CONFIG_CONNECTOR=y
444CONFIG_PROC_EVENTS=y 445CONFIG_PROC_EVENTS=y
445# CONFIG_MTD is not set 446CONFIG_MTD=y
447# CONFIG_MTD_DEBUG is not set
448# CONFIG_MTD_TESTS is not set
449# CONFIG_MTD_CONCAT is not set
450CONFIG_MTD_PARTITIONS=y
451# CONFIG_MTD_REDBOOT_PARTS is not set
452CONFIG_MTD_CMDLINE_PARTS=y
453CONFIG_MTD_OF_PARTS=y
454# CONFIG_MTD_AR7_PARTS is not set
455
456#
457# User Modules And Translation Layers
458#
459CONFIG_MTD_CHAR=y
460CONFIG_MTD_BLKDEVS=y
461CONFIG_MTD_BLOCK=y
462# CONFIG_FTL is not set
463# CONFIG_NFTL is not set
464# CONFIG_INFTL is not set
465# CONFIG_RFD_FTL is not set
466# CONFIG_SSFDC is not set
467# CONFIG_MTD_OOPS is not set
468
469#
470# RAM/ROM/Flash chip drivers
471#
472CONFIG_MTD_CFI=y
473# CONFIG_MTD_JEDECPROBE is not set
474CONFIG_MTD_GEN_PROBE=y
475# CONFIG_MTD_CFI_ADV_OPTIONS is not set
476CONFIG_MTD_MAP_BANK_WIDTH_1=y
477CONFIG_MTD_MAP_BANK_WIDTH_2=y
478CONFIG_MTD_MAP_BANK_WIDTH_4=y
479# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
480# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
481# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
482CONFIG_MTD_CFI_I1=y
483CONFIG_MTD_CFI_I2=y
484# CONFIG_MTD_CFI_I4 is not set
485# CONFIG_MTD_CFI_I8 is not set
486# CONFIG_MTD_CFI_INTELEXT is not set
487CONFIG_MTD_CFI_AMDSTD=y
488# CONFIG_MTD_CFI_STAA is not set
489CONFIG_MTD_CFI_UTIL=y
490# CONFIG_MTD_RAM is not set
491# CONFIG_MTD_ROM is not set
492# CONFIG_MTD_ABSENT is not set
493
494#
495# Mapping drivers for chip access
496#
497# CONFIG_MTD_COMPLEX_MAPPINGS is not set
498# CONFIG_MTD_PHYSMAP is not set
499CONFIG_MTD_PHYSMAP_OF=y
500# CONFIG_MTD_INTEL_VR_NOR is not set
501# CONFIG_MTD_PLATRAM is not set
502
503#
504# Self-contained MTD device drivers
505#
506# CONFIG_MTD_PMC551 is not set
507# CONFIG_MTD_SLRAM is not set
508# CONFIG_MTD_PHRAM is not set
509# CONFIG_MTD_MTDRAM is not set
510# CONFIG_MTD_BLOCK2MTD is not set
511
512#
513# Disk-On-Chip Device Drivers
514#
515# CONFIG_MTD_DOC2000 is not set
516# CONFIG_MTD_DOC2001 is not set
517# CONFIG_MTD_DOC2001PLUS is not set
518# CONFIG_MTD_NAND is not set
519# CONFIG_MTD_ONENAND is not set
520
521#
522# LPDDR flash memory drivers
523#
524# CONFIG_MTD_LPDDR is not set
525
526#
527# UBI - Unsorted block images
528#
529# CONFIG_MTD_UBI is not set
446CONFIG_OF_DEVICE=y 530CONFIG_OF_DEVICE=y
447# CONFIG_PARPORT is not set 531# CONFIG_PARPORT is not set
448CONFIG_BLK_DEV=y 532CONFIG_BLK_DEV=y
@@ -500,7 +584,7 @@ CONFIG_HAVE_IDE=y
500# 584#
501 585
502# 586#
503# See the help texts for more information. 587# The newer stack is recommended.
504# 588#
505# CONFIG_FIREWIRE is not set 589# CONFIG_FIREWIRE is not set
506# CONFIG_IEEE1394 is not set 590# CONFIG_IEEE1394 is not set
@@ -763,7 +847,6 @@ CONFIG_EXT2_FS=y
763# CONFIG_EXT2_FS_XIP is not set 847# CONFIG_EXT2_FS_XIP is not set
764# CONFIG_EXT3_FS is not set 848# CONFIG_EXT3_FS is not set
765# CONFIG_EXT4_FS is not set 849# CONFIG_EXT4_FS is not set
766CONFIG_EXT4_USE_FOR_EXT23=y
767# CONFIG_REISERFS_FS is not set 850# CONFIG_REISERFS_FS is not set
768# CONFIG_JFS_FS is not set 851# CONFIG_JFS_FS is not set
769# CONFIG_FS_POSIX_ACL is not set 852# CONFIG_FS_POSIX_ACL is not set
@@ -820,6 +903,7 @@ CONFIG_MISC_FILESYSTEMS=y
820# CONFIG_BEFS_FS is not set 903# CONFIG_BEFS_FS is not set
821# CONFIG_BFS_FS is not set 904# CONFIG_BFS_FS is not set
822# CONFIG_EFS_FS is not set 905# CONFIG_EFS_FS is not set
906# CONFIG_JFFS2_FS is not set
823CONFIG_CRAMFS=y 907CONFIG_CRAMFS=y
824# CONFIG_SQUASHFS is not set 908# CONFIG_SQUASHFS is not set
825# CONFIG_VXFS_FS is not set 909# CONFIG_VXFS_FS is not set
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index a85f927bf225..622d84f48aba 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -1557,7 +1557,52 @@ CONFIG_RTC_DRV_RX8581=y
1557# 1557#
1558# TI VLYNQ 1558# TI VLYNQ
1559# 1559#
1560# CONFIG_STAGING is not set 1560CONFIG_STAGING=y
1561# CONFIG_STAGING_EXCLUDE_BUILD is not set
1562# CONFIG_ET131X is not set
1563# CONFIG_ME4000 is not set
1564# CONFIG_MEILHAUS is not set
1565# CONFIG_USB_IP_COMMON is not set
1566# CONFIG_ECHO is not set
1567# CONFIG_COMEDI is not set
1568# CONFIG_ASUS_OLED is not set
1569# CONFIG_ALTERA_PCIE_CHDMA is not set
1570# CONFIG_INPUT_MIMIO is not set
1571# CONFIG_TRANZPORT is not set
1572
1573#
1574# Android
1575#
1576# CONFIG_ANDROID is not set
1577# CONFIG_DST is not set
1578# CONFIG_POHMELFS is not set
1579# CONFIG_B3DFG is not set
1580# CONFIG_IDE_PHISON is not set
1581# CONFIG_PLAN9AUTH is not set
1582# CONFIG_HECI is not set
1583# CONFIG_USB_CPC is not set
1584
1585#
1586# Qualcomm MSM Camera And Video
1587#
1588
1589#
1590# Camera Sensor Selection
1591#
1592# CONFIG_HYPERV_STORAGE is not set
1593# CONFIG_HYPERV_BLOCK is not set
1594# CONFIG_HYPERV_NET is not set
1595CONFIG_VME_BUS=y
1596
1597#
1598# VME Bridge Drivers
1599#
1600CONFIG_VME_TSI148=y
1601
1602#
1603# VME Device Drivers
1604#
1605# CONFIG_VME_USER is not set
1561 1606
1562# 1607#
1563# File systems 1608# File systems
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 4554d9bb03e5..62c2b81a4a8f 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -265,7 +265,7 @@ CONFIG_MMIO_NVRAM=y
265# 265#
266# Kernel options 266# Kernel options
267# 267#
268# CONFIG_HIGHMEM is not set 268CONFIG_HIGHMEM=y
269CONFIG_TICK_ONESHOT=y 269CONFIG_TICK_ONESHOT=y
270# CONFIG_NO_HZ is not set 270# CONFIG_NO_HZ is not set
271CONFIG_HIGH_RES_TIMERS=y 271CONFIG_HIGH_RES_TIMERS=y
@@ -651,7 +651,7 @@ CONFIG_MTD_CONCAT=y
651CONFIG_MTD_PARTITIONS=y 651CONFIG_MTD_PARTITIONS=y
652# CONFIG_MTD_REDBOOT_PARTS is not set 652# CONFIG_MTD_REDBOOT_PARTS is not set
653# CONFIG_MTD_CMDLINE_PARTS is not set 653# CONFIG_MTD_CMDLINE_PARTS is not set
654# CONFIG_MTD_OF_PARTS is not set 654CONFIG_MTD_OF_PARTS=y
655# CONFIG_MTD_AR7_PARTS is not set 655# CONFIG_MTD_AR7_PARTS is not set
656 656
657# 657#
@@ -671,13 +671,9 @@ CONFIG_MTD_BLOCK=y
671# RAM/ROM/Flash chip drivers 671# RAM/ROM/Flash chip drivers
672# 672#
673CONFIG_MTD_CFI=y 673CONFIG_MTD_CFI=y
674# CONFIG_MTD_JEDECPROBE is not set 674CONFIG_MTD_JEDECPROBE=y
675CONFIG_MTD_GEN_PROBE=y 675CONFIG_MTD_GEN_PROBE=y
676CONFIG_MTD_CFI_ADV_OPTIONS=y 676# CONFIG_MTD_CFI_ADV_OPTIONS is not set
677# CONFIG_MTD_CFI_NOSWAP is not set
678# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
679CONFIG_MTD_CFI_LE_BYTE_SWAP=y
680# CONFIG_MTD_CFI_GEOMETRY is not set
681CONFIG_MTD_MAP_BANK_WIDTH_1=y 677CONFIG_MTD_MAP_BANK_WIDTH_1=y
682CONFIG_MTD_MAP_BANK_WIDTH_2=y 678CONFIG_MTD_MAP_BANK_WIDTH_2=y
683CONFIG_MTD_MAP_BANK_WIDTH_4=y 679CONFIG_MTD_MAP_BANK_WIDTH_4=y
@@ -688,7 +684,6 @@ CONFIG_MTD_CFI_I1=y
688CONFIG_MTD_CFI_I2=y 684CONFIG_MTD_CFI_I2=y
689# CONFIG_MTD_CFI_I4 is not set 685# CONFIG_MTD_CFI_I4 is not set
690# CONFIG_MTD_CFI_I8 is not set 686# CONFIG_MTD_CFI_I8 is not set
691# CONFIG_MTD_OTP is not set
692CONFIG_MTD_CFI_INTELEXT=y 687CONFIG_MTD_CFI_INTELEXT=y
693CONFIG_MTD_CFI_AMDSTD=y 688CONFIG_MTD_CFI_AMDSTD=y
694# CONFIG_MTD_CFI_STAA is not set 689# CONFIG_MTD_CFI_STAA is not set
@@ -1652,7 +1647,44 @@ CONFIG_RTC_DRV_RX8581=y
1652# 1647#
1653# TI VLYNQ 1648# TI VLYNQ
1654# 1649#
1655# CONFIG_STAGING is not set 1650CONFIG_STAGING=y
1651# CONFIG_STAGING_EXCLUDE_BUILD is not set
1652# CONFIG_ET131X is not set
1653# CONFIG_ME4000 is not set
1654# CONFIG_MEILHAUS is not set
1655# CONFIG_USB_IP_COMMON is not set
1656# CONFIG_ECHO is not set
1657# CONFIG_COMEDI is not set
1658# CONFIG_ASUS_OLED is not set
1659# CONFIG_ALTERA_PCIE_CHDMA is not set
1660# CONFIG_INPUT_MIMIO is not set
1661# CONFIG_TRANZPORT is not set
1662
1663#
1664# Android
1665#
1666# CONFIG_ANDROID is not set
1667# CONFIG_DST is not set
1668# CONFIG_POHMELFS is not set
1669# CONFIG_B3DFG is not set
1670# CONFIG_IDE_PHISON is not set
1671# CONFIG_PLAN9AUTH is not set
1672# CONFIG_HECI is not set
1673# CONFIG_VT6655 is not set
1674# CONFIG_USB_CPC is not set
1675# CONFIG_RDC_17F3101X is not set
1676CONFIG_VME_BUS=y
1677
1678#
1679# VME Bridge Drivers
1680#
1681# CONFIG_VME_CA91CX42 is not set
1682CONFIG_VME_TSI148=y
1683
1684#
1685# VME Device Drivers
1686#
1687# CONFIG_VME_USER is not set
1656 1688
1657# 1689#
1658# File systems 1690# File systems
@@ -1729,7 +1761,17 @@ CONFIG_MISC_FILESYSTEMS=y
1729# CONFIG_BEFS_FS is not set 1761# CONFIG_BEFS_FS is not set
1730# CONFIG_BFS_FS is not set 1762# CONFIG_BFS_FS is not set
1731# CONFIG_EFS_FS is not set 1763# CONFIG_EFS_FS is not set
1732# CONFIG_JFFS2_FS is not set 1764CONFIG_JFFS2_FS=y
1765CONFIG_JFFS2_FS_DEBUG=0
1766CONFIG_JFFS2_FS_WRITEBUFFER=y
1767# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1768# CONFIG_JFFS2_SUMMARY is not set
1769# CONFIG_JFFS2_FS_XATTR is not set
1770# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1771CONFIG_JFFS2_ZLIB=y
1772# CONFIG_JFFS2_LZO is not set
1773CONFIG_JFFS2_RTIME=y
1774# CONFIG_JFFS2_RUBIN is not set
1733# CONFIG_CRAMFS is not set 1775# CONFIG_CRAMFS is not set
1734# CONFIG_SQUASHFS is not set 1776# CONFIG_SQUASHFS is not set
1735# CONFIG_VXFS_FS is not set 1777# CONFIG_VXFS_FS is not set
@@ -1874,6 +1916,7 @@ CONFIG_DEBUG_PREEMPT=y
1874# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1916# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1875# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1917# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1876# CONFIG_DEBUG_KOBJECT is not set 1918# CONFIG_DEBUG_KOBJECT is not set
1919# CONFIG_DEBUG_HIGHMEM is not set
1877# CONFIG_DEBUG_BUGVERBOSE is not set 1920# CONFIG_DEBUG_BUGVERBOSE is not set
1878CONFIG_DEBUG_INFO=y 1921CONFIG_DEBUG_INFO=y
1879# CONFIG_DEBUG_VM is not set 1922# CONFIG_DEBUG_VM is not set
diff --git a/arch/powerpc/configs/mpc512x_defconfig b/arch/powerpc/configs/mpc512x_defconfig
new file mode 100644
index 000000000000..a04727295d46
--- /dev/null
+++ b/arch/powerpc/configs/mpc512x_defconfig
@@ -0,0 +1,1694 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.33-rc6
4# Fri Feb 5 11:48:29 2010
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_PPC_BOOK3S_32=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_BOOK3S=y
18CONFIG_6xx=y
19CONFIG_PPC_FPU=y
20# CONFIG_ALTIVEC is not set
21CONFIG_PPC_STD_MMU=y
22CONFIG_PPC_STD_MMU_32=y
23# CONFIG_PPC_MM_SLICES is not set
24CONFIG_PPC_HAVE_PMU_SUPPORT=y
25# CONFIG_SMP is not set
26CONFIG_NOT_COHERENT_CACHE=y
27CONFIG_PPC32=y
28CONFIG_WORD_SIZE=32
29# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set
30CONFIG_MMU=y
31CONFIG_GENERIC_CMOS_UPDATE=y
32CONFIG_GENERIC_TIME=y
33CONFIG_GENERIC_TIME_VSYSCALL=y
34CONFIG_GENERIC_CLOCKEVENTS=y
35CONFIG_GENERIC_HARDIRQS=y
36CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
37# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
38# CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK is not set
39CONFIG_IRQ_PER_CPU=y
40CONFIG_NR_IRQS=512
41CONFIG_STACKTRACE_SUPPORT=y
42CONFIG_HAVE_LATENCYTOP_SUPPORT=y
43CONFIG_TRACE_IRQFLAGS_SUPPORT=y
44CONFIG_LOCKDEP_SUPPORT=y
45CONFIG_RWSEM_XCHGADD_ALGORITHM=y
46CONFIG_ARCH_HAS_ILOG2_U32=y
47CONFIG_GENERIC_HWEIGHT=y
48CONFIG_GENERIC_FIND_NEXT_BIT=y
49# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
50CONFIG_PPC=y
51CONFIG_EARLY_PRINTK=y
52CONFIG_GENERIC_NVRAM=y
53CONFIG_SCHED_OMIT_FRAME_POINTER=y
54CONFIG_ARCH_MAY_HAVE_PC_FDC=y
55CONFIG_PPC_OF=y
56CONFIG_OF=y
57# CONFIG_PPC_UDBG_16550 is not set
58# CONFIG_GENERIC_TBSYNC is not set
59CONFIG_AUDIT_ARCH=y
60CONFIG_GENERIC_BUG=y
61CONFIG_DTC=y
62CONFIG_DEFAULT_UIMAGE=y
63CONFIG_ARCH_HIBERNATION_POSSIBLE=y
64# CONFIG_PPC_DCR_NATIVE is not set
65# CONFIG_PPC_DCR_MMIO is not set
66CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
67CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
68CONFIG_CONSTRUCTORS=y
69
70#
71# General setup
72#
73CONFIG_EXPERIMENTAL=y
74CONFIG_BROKEN_ON_SMP=y
75CONFIG_INIT_ENV_ARG_LIMIT=32
76CONFIG_LOCALVERSION=""
77CONFIG_LOCALVERSION_AUTO=y
78# CONFIG_SWAP is not set
79CONFIG_SYSVIPC=y
80CONFIG_SYSVIPC_SYSCTL=y
81# CONFIG_POSIX_MQUEUE is not set
82# CONFIG_BSD_PROCESS_ACCT is not set
83# CONFIG_TASKSTATS is not set
84# CONFIG_AUDIT is not set
85
86#
87# RCU Subsystem
88#
89CONFIG_TREE_RCU=y
90# CONFIG_TREE_PREEMPT_RCU is not set
91# CONFIG_TINY_RCU is not set
92# CONFIG_RCU_TRACE is not set
93CONFIG_RCU_FANOUT=32
94# CONFIG_RCU_FANOUT_EXACT is not set
95# CONFIG_TREE_RCU_TRACE is not set
96# CONFIG_IKCONFIG is not set
97CONFIG_LOG_BUF_SHIFT=16
98# CONFIG_GROUP_SCHED is not set
99# CONFIG_CGROUPS is not set
100CONFIG_SYSFS_DEPRECATED=y
101CONFIG_SYSFS_DEPRECATED_V2=y
102# CONFIG_RELAY is not set
103CONFIG_NAMESPACES=y
104# CONFIG_UTS_NS is not set
105# CONFIG_IPC_NS is not set
106# CONFIG_USER_NS is not set
107# CONFIG_PID_NS is not set
108# CONFIG_NET_NS is not set
109CONFIG_BLK_DEV_INITRD=y
110CONFIG_INITRAMFS_SOURCE=""
111CONFIG_RD_GZIP=y
112CONFIG_RD_BZIP2=y
113CONFIG_RD_LZMA=y
114CONFIG_RD_LZO=y
115# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
116CONFIG_SYSCTL=y
117CONFIG_ANON_INODES=y
118# CONFIG_EMBEDDED is not set
119CONFIG_SYSCTL_SYSCALL=y
120CONFIG_KALLSYMS=y
121# CONFIG_KALLSYMS_EXTRA_PASS is not set
122CONFIG_HOTPLUG=y
123CONFIG_PRINTK=y
124CONFIG_BUG=y
125CONFIG_ELF_CORE=y
126CONFIG_BASE_FULL=y
127CONFIG_FUTEX=y
128CONFIG_EPOLL=y
129CONFIG_SIGNALFD=y
130CONFIG_TIMERFD=y
131CONFIG_EVENTFD=y
132CONFIG_SHMEM=y
133CONFIG_AIO=y
134CONFIG_HAVE_PERF_EVENTS=y
135
136#
137# Kernel Performance Events And Counters
138#
139# CONFIG_PERF_EVENTS is not set
140# CONFIG_PERF_COUNTERS is not set
141CONFIG_VM_EVENT_COUNTERS=y
142# CONFIG_COMPAT_BRK is not set
143CONFIG_SLAB=y
144# CONFIG_SLUB is not set
145# CONFIG_SLOB is not set
146# CONFIG_PROFILING is not set
147CONFIG_HAVE_OPROFILE=y
148# CONFIG_KPROBES is not set
149CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
150CONFIG_HAVE_IOREMAP_PROT=y
151CONFIG_HAVE_KPROBES=y
152CONFIG_HAVE_KRETPROBES=y
153CONFIG_HAVE_ARCH_TRACEHOOK=y
154CONFIG_HAVE_DMA_ATTRS=y
155CONFIG_HAVE_CLK=y
156CONFIG_HAVE_DMA_API_DEBUG=y
157
158#
159# GCOV-based kernel profiling
160#
161# CONFIG_SLOW_WORK is not set
162# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
163CONFIG_SLABINFO=y
164CONFIG_RT_MUTEXES=y
165CONFIG_BASE_SMALL=0
166CONFIG_MODULES=y
167# CONFIG_MODULE_FORCE_LOAD is not set
168CONFIG_MODULE_UNLOAD=y
169# CONFIG_MODULE_FORCE_UNLOAD is not set
170# CONFIG_MODVERSIONS is not set
171# CONFIG_MODULE_SRCVERSION_ALL is not set
172CONFIG_BLOCK=y
173CONFIG_LBDAF=y
174# CONFIG_BLK_DEV_BSG is not set
175# CONFIG_BLK_DEV_INTEGRITY is not set
176
177#
178# IO Schedulers
179#
180CONFIG_IOSCHED_NOOP=y
181CONFIG_IOSCHED_DEADLINE=y
182# CONFIG_IOSCHED_CFQ is not set
183CONFIG_DEFAULT_DEADLINE=y
184# CONFIG_DEFAULT_CFQ is not set
185# CONFIG_DEFAULT_NOOP is not set
186CONFIG_DEFAULT_IOSCHED="deadline"
187# CONFIG_INLINE_SPIN_TRYLOCK is not set
188# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
189# CONFIG_INLINE_SPIN_LOCK is not set
190# CONFIG_INLINE_SPIN_LOCK_BH is not set
191# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
192# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
193CONFIG_INLINE_SPIN_UNLOCK=y
194# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
195CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
196# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
197# CONFIG_INLINE_READ_TRYLOCK is not set
198# CONFIG_INLINE_READ_LOCK is not set
199# CONFIG_INLINE_READ_LOCK_BH is not set
200# CONFIG_INLINE_READ_LOCK_IRQ is not set
201# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
202CONFIG_INLINE_READ_UNLOCK=y
203# CONFIG_INLINE_READ_UNLOCK_BH is not set
204CONFIG_INLINE_READ_UNLOCK_IRQ=y
205# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
206# CONFIG_INLINE_WRITE_TRYLOCK is not set
207# CONFIG_INLINE_WRITE_LOCK is not set
208# CONFIG_INLINE_WRITE_LOCK_BH is not set
209# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
210# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
211CONFIG_INLINE_WRITE_UNLOCK=y
212# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
213CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
214# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
215# CONFIG_MUTEX_SPIN_ON_OWNER is not set
216# CONFIG_FREEZER is not set
217
218#
219# Platform support
220#
221# CONFIG_PPC_CHRP is not set
222CONFIG_PPC_MPC512x=y
223CONFIG_PPC_MPC5121=y
224CONFIG_MPC5121_ADS=y
225# CONFIG_MPC5121_GENERIC is not set
226# CONFIG_PPC_MPC52xx is not set
227# CONFIG_PPC_PMAC is not set
228# CONFIG_PPC_CELL is not set
229# CONFIG_PPC_CELL_NATIVE is not set
230# CONFIG_PPC_82xx is not set
231# CONFIG_PQ2ADS is not set
232# CONFIG_PPC_83xx is not set
233# CONFIG_PPC_86xx is not set
234# CONFIG_EMBEDDED6xx is not set
235# CONFIG_AMIGAONE is not set
236CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
237CONFIG_IPIC=y
238# CONFIG_MPIC is not set
239# CONFIG_MPIC_WEIRD is not set
240# CONFIG_PPC_I8259 is not set
241# CONFIG_PPC_RTAS is not set
242# CONFIG_MMIO_NVRAM is not set
243# CONFIG_PPC_MPC106 is not set
244# CONFIG_PPC_970_NAP is not set
245# CONFIG_PPC_INDIRECT_IO is not set
246# CONFIG_GENERIC_IOMAP is not set
247# CONFIG_CPU_FREQ is not set
248# CONFIG_TAU is not set
249# CONFIG_QUICC_ENGINE is not set
250# CONFIG_FSL_ULI1575 is not set
251# CONFIG_SIMPLE_GPIO is not set
252
253#
254# Kernel options
255#
256# CONFIG_HIGHMEM is not set
257CONFIG_TICK_ONESHOT=y
258CONFIG_NO_HZ=y
259# CONFIG_HIGH_RES_TIMERS is not set
260CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
261# CONFIG_HZ_100 is not set
262# CONFIG_HZ_250 is not set
263# CONFIG_HZ_300 is not set
264CONFIG_HZ_1000=y
265CONFIG_HZ=1000
266# CONFIG_SCHED_HRTICK is not set
267CONFIG_PREEMPT_NONE=y
268# CONFIG_PREEMPT_VOLUNTARY is not set
269# CONFIG_PREEMPT is not set
270CONFIG_BINFMT_ELF=y
271# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
272# CONFIG_HAVE_AOUT is not set
273# CONFIG_BINFMT_MISC is not set
274# CONFIG_IOMMU_HELPER is not set
275# CONFIG_SWIOTLB is not set
276CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
277CONFIG_ARCH_HAS_WALK_MEMORY=y
278CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
279# CONFIG_KEXEC is not set
280# CONFIG_CRASH_DUMP is not set
281CONFIG_SPARSE_IRQ=y
282CONFIG_MAX_ACTIVE_REGIONS=32
283CONFIG_ARCH_FLATMEM_ENABLE=y
284CONFIG_ARCH_POPULATES_NODE_MAP=y
285CONFIG_SELECT_MEMORY_MODEL=y
286CONFIG_FLATMEM_MANUAL=y
287# CONFIG_DISCONTIGMEM_MANUAL is not set
288# CONFIG_SPARSEMEM_MANUAL is not set
289CONFIG_FLATMEM=y
290CONFIG_FLAT_NODE_MEM_MAP=y
291CONFIG_PAGEFLAGS_EXTENDED=y
292CONFIG_SPLIT_PTLOCK_CPUS=4
293# CONFIG_MIGRATION is not set
294# CONFIG_PHYS_ADDR_T_64BIT is not set
295CONFIG_ZONE_DMA_FLAG=1
296CONFIG_BOUNCE=y
297CONFIG_VIRT_TO_BUS=y
298# CONFIG_KSM is not set
299CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
300CONFIG_PPC_4K_PAGES=y
301# CONFIG_PPC_16K_PAGES is not set
302# CONFIG_PPC_64K_PAGES is not set
303# CONFIG_PPC_256K_PAGES is not set
304CONFIG_FORCE_MAX_ZONEORDER=11
305CONFIG_PROC_DEVICETREE=y
306# CONFIG_CMDLINE_BOOL is not set
307CONFIG_EXTRA_TARGETS=""
308# CONFIG_PM is not set
309# CONFIG_SECCOMP is not set
310CONFIG_ISA_DMA_API=y
311
312#
313# Bus options
314#
315CONFIG_ZONE_DMA=y
316CONFIG_GENERIC_ISA_DMA=y
317CONFIG_FSL_SOC=y
318CONFIG_PPC_PCI_CHOICE=y
319# CONFIG_PCI is not set
320# CONFIG_PCI_DOMAINS is not set
321# CONFIG_PCI_SYSCALL is not set
322# CONFIG_ARCH_SUPPORTS_MSI is not set
323# CONFIG_PCCARD is not set
324# CONFIG_HAS_RAPIDIO is not set
325
326#
327# Advanced setup
328#
329# CONFIG_ADVANCED_OPTIONS is not set
330
331#
332# Default settings for advanced configuration options are used
333#
334CONFIG_LOWMEM_SIZE=0x30000000
335CONFIG_PAGE_OFFSET=0xc0000000
336CONFIG_KERNEL_START=0xc0000000
337CONFIG_PHYSICAL_START=0x00000000
338CONFIG_TASK_SIZE=0xc0000000
339CONFIG_CONSISTENT_SIZE=0x00200000
340CONFIG_NET=y
341
342#
343# Networking options
344#
345CONFIG_PACKET=y
346# CONFIG_PACKET_MMAP is not set
347CONFIG_UNIX=y
348# CONFIG_NET_KEY is not set
349CONFIG_INET=y
350# CONFIG_IP_MULTICAST is not set
351# CONFIG_IP_ADVANCED_ROUTER is not set
352CONFIG_IP_FIB_HASH=y
353CONFIG_IP_PNP=y
354# CONFIG_IP_PNP_DHCP is not set
355# CONFIG_IP_PNP_BOOTP is not set
356# CONFIG_IP_PNP_RARP is not set
357# CONFIG_NET_IPIP is not set
358# CONFIG_NET_IPGRE is not set
359# CONFIG_ARPD is not set
360# CONFIG_SYN_COOKIES is not set
361# CONFIG_INET_AH is not set
362# CONFIG_INET_ESP is not set
363# CONFIG_INET_IPCOMP is not set
364# CONFIG_INET_XFRM_TUNNEL is not set
365# CONFIG_INET_TUNNEL is not set
366# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
367# CONFIG_INET_XFRM_MODE_TUNNEL is not set
368# CONFIG_INET_XFRM_MODE_BEET is not set
369# CONFIG_INET_LRO is not set
370# CONFIG_INET_DIAG is not set
371# CONFIG_TCP_CONG_ADVANCED is not set
372CONFIG_TCP_CONG_CUBIC=y
373CONFIG_DEFAULT_TCP_CONG="cubic"
374# CONFIG_TCP_MD5SIG is not set
375# CONFIG_IPV6 is not set
376# CONFIG_NETWORK_SECMARK is not set
377# CONFIG_NETFILTER is not set
378# CONFIG_IP_DCCP is not set
379# CONFIG_IP_SCTP is not set
380# CONFIG_RDS is not set
381# CONFIG_TIPC is not set
382# CONFIG_ATM is not set
383# CONFIG_BRIDGE is not set
384# CONFIG_NET_DSA is not set
385# CONFIG_VLAN_8021Q is not set
386# CONFIG_DECNET is not set
387# CONFIG_LLC2 is not set
388# CONFIG_IPX is not set
389# CONFIG_ATALK is not set
390# CONFIG_X25 is not set
391# CONFIG_LAPB is not set
392# CONFIG_ECONET is not set
393# CONFIG_WAN_ROUTER is not set
394# CONFIG_PHONET is not set
395# CONFIG_IEEE802154 is not set
396# CONFIG_NET_SCHED is not set
397# CONFIG_DCB is not set
398
399#
400# Network testing
401#
402# CONFIG_NET_PKTGEN is not set
403# CONFIG_HAMRADIO is not set
404CONFIG_CAN=y
405CONFIG_CAN_RAW=y
406CONFIG_CAN_BCM=y
407
408#
409# CAN Device Drivers
410#
411CONFIG_CAN_VCAN=y
412CONFIG_CAN_DEV=y
413# CONFIG_CAN_CALC_BITTIMING is not set
414CONFIG_CAN_MSCAN=y
415# CONFIG_CAN_SJA1000 is not set
416
417#
418# CAN USB interfaces
419#
420# CONFIG_CAN_EMS_USB is not set
421CONFIG_CAN_DEBUG_DEVICES=y
422# CONFIG_IRDA is not set
423# CONFIG_BT is not set
424# CONFIG_AF_RXRPC is not set
425# CONFIG_WIRELESS is not set
426# CONFIG_WIMAX is not set
427# CONFIG_RFKILL is not set
428# CONFIG_NET_9P is not set
429
430#
431# Device Drivers
432#
433
434#
435# Generic Driver Options
436#
437CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
438# CONFIG_DEVTMPFS is not set
439CONFIG_STANDALONE=y
440# CONFIG_PREVENT_FIRMWARE_BUILD is not set
441CONFIG_FW_LOADER=y
442# CONFIG_FIRMWARE_IN_KERNEL is not set
443CONFIG_EXTRA_FIRMWARE=""
444# CONFIG_SYS_HYPERVISOR is not set
445# CONFIG_CONNECTOR is not set
446CONFIG_MTD=y
447# CONFIG_MTD_DEBUG is not set
448# CONFIG_MTD_TESTS is not set
449CONFIG_MTD_CONCAT=y
450CONFIG_MTD_PARTITIONS=y
451# CONFIG_MTD_REDBOOT_PARTS is not set
452CONFIG_MTD_CMDLINE_PARTS=y
453CONFIG_MTD_OF_PARTS=y
454# CONFIG_MTD_AR7_PARTS is not set
455
456#
457# User Modules And Translation Layers
458#
459CONFIG_MTD_CHAR=y
460CONFIG_MTD_BLKDEVS=y
461CONFIG_MTD_BLOCK=y
462# CONFIG_FTL is not set
463# CONFIG_NFTL is not set
464# CONFIG_INFTL is not set
465# CONFIG_RFD_FTL is not set
466# CONFIG_SSFDC is not set
467# CONFIG_MTD_OOPS is not set
468
469#
470# RAM/ROM/Flash chip drivers
471#
472CONFIG_MTD_CFI=y
473# CONFIG_MTD_JEDECPROBE is not set
474CONFIG_MTD_GEN_PROBE=y
475# CONFIG_MTD_CFI_ADV_OPTIONS is not set
476CONFIG_MTD_MAP_BANK_WIDTH_1=y
477CONFIG_MTD_MAP_BANK_WIDTH_2=y
478CONFIG_MTD_MAP_BANK_WIDTH_4=y
479# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
480# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
481# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
482CONFIG_MTD_CFI_I1=y
483CONFIG_MTD_CFI_I2=y
484# CONFIG_MTD_CFI_I4 is not set
485# CONFIG_MTD_CFI_I8 is not set
486# CONFIG_MTD_CFI_INTELEXT is not set
487CONFIG_MTD_CFI_AMDSTD=y
488# CONFIG_MTD_CFI_STAA is not set
489CONFIG_MTD_CFI_UTIL=y
490# CONFIG_MTD_RAM is not set
491CONFIG_MTD_ROM=y
492# CONFIG_MTD_ABSENT is not set
493
494#
495# Mapping drivers for chip access
496#
497# CONFIG_MTD_COMPLEX_MAPPINGS is not set
498# CONFIG_MTD_PHYSMAP is not set
499CONFIG_MTD_PHYSMAP_OF=y
500# CONFIG_MTD_PLATRAM is not set
501
502#
503# Self-contained MTD device drivers
504#
505# CONFIG_MTD_SLRAM is not set
506# CONFIG_MTD_PHRAM is not set
507# CONFIG_MTD_MTDRAM is not set
508# CONFIG_MTD_BLOCK2MTD is not set
509
510#
511# Disk-On-Chip Device Drivers
512#
513# CONFIG_MTD_DOC2000 is not set
514# CONFIG_MTD_DOC2001 is not set
515# CONFIG_MTD_DOC2001PLUS is not set
516CONFIG_MTD_NAND=y
517# CONFIG_MTD_NAND_VERIFY_WRITE is not set
518# CONFIG_MTD_NAND_ECC_SMC is not set
519# CONFIG_MTD_NAND_MUSEUM_IDS is not set
520CONFIG_MTD_NAND_IDS=y
521# CONFIG_MTD_NAND_DISKONCHIP is not set
522# CONFIG_MTD_NAND_NANDSIM is not set
523# CONFIG_MTD_NAND_PLATFORM is not set
524# CONFIG_MTD_ALAUDA is not set
525# CONFIG_MTD_NAND_FSL_ELBC is not set
526CONFIG_MTD_NAND_MPC5121_NFC=y
527# CONFIG_MTD_ONENAND is not set
528
529#
530# LPDDR flash memory drivers
531#
532# CONFIG_MTD_LPDDR is not set
533
534#
535# UBI - Unsorted block images
536#
537CONFIG_MTD_UBI=y
538CONFIG_MTD_UBI_WL_THRESHOLD=4096
539CONFIG_MTD_UBI_BEB_RESERVE=1
540# CONFIG_MTD_UBI_GLUEBI is not set
541
542#
543# UBI debugging options
544#
545# CONFIG_MTD_UBI_DEBUG is not set
546CONFIG_OF_DEVICE=y
547CONFIG_OF_I2C=y
548CONFIG_OF_MDIO=y
549# CONFIG_PARPORT is not set
550CONFIG_BLK_DEV=y
551# CONFIG_BLK_DEV_FD is not set
552# CONFIG_BLK_DEV_COW_COMMON is not set
553# CONFIG_BLK_DEV_LOOP is not set
554
555#
556# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
557#
558# CONFIG_BLK_DEV_NBD is not set
559# CONFIG_BLK_DEV_UB is not set
560CONFIG_BLK_DEV_RAM=y
561CONFIG_BLK_DEV_RAM_COUNT=1
562CONFIG_BLK_DEV_RAM_SIZE=8192
563CONFIG_BLK_DEV_XIP=y
564# CONFIG_CDROM_PKTCDVD is not set
565# CONFIG_ATA_OVER_ETH is not set
566# CONFIG_BLK_DEV_HD is not set
567CONFIG_MISC_DEVICES=y
568# CONFIG_AD525X_DPOT is not set
569# CONFIG_ICS932S401 is not set
570# CONFIG_ENCLOSURE_SERVICES is not set
571# CONFIG_ISL29003 is not set
572# CONFIG_DS1682 is not set
573# CONFIG_C2PORT is not set
574
575#
576# EEPROM support
577#
578CONFIG_EEPROM_AT24=y
579# CONFIG_EEPROM_LEGACY is not set
580# CONFIG_EEPROM_MAX6875 is not set
581# CONFIG_EEPROM_93CX6 is not set
582CONFIG_HAVE_IDE=y
583# CONFIG_IDE is not set
584
585#
586# SCSI device support
587#
588# CONFIG_RAID_ATTRS is not set
589CONFIG_SCSI=y
590CONFIG_SCSI_DMA=y
591# CONFIG_SCSI_TGT is not set
592# CONFIG_SCSI_NETLINK is not set
593# CONFIG_SCSI_PROC_FS is not set
594
595#
596# SCSI support type (disk, tape, CD-ROM)
597#
598CONFIG_BLK_DEV_SD=y
599# CONFIG_CHR_DEV_ST is not set
600# CONFIG_CHR_DEV_OSST is not set
601# CONFIG_BLK_DEV_SR is not set
602CONFIG_CHR_DEV_SG=y
603# CONFIG_CHR_DEV_SCH is not set
604# CONFIG_SCSI_MULTI_LUN is not set
605# CONFIG_SCSI_CONSTANTS is not set
606# CONFIG_SCSI_LOGGING is not set
607# CONFIG_SCSI_SCAN_ASYNC is not set
608CONFIG_SCSI_WAIT_SCAN=m
609
610#
611# SCSI Transports
612#
613# CONFIG_SCSI_SPI_ATTRS is not set
614# CONFIG_SCSI_FC_ATTRS is not set
615# CONFIG_SCSI_ISCSI_ATTRS is not set
616# CONFIG_SCSI_SAS_LIBSAS is not set
617# CONFIG_SCSI_SRP_ATTRS is not set
618CONFIG_SCSI_LOWLEVEL=y
619# CONFIG_ISCSI_TCP is not set
620# CONFIG_LIBFC is not set
621# CONFIG_LIBFCOE is not set
622# CONFIG_SCSI_DEBUG is not set
623# CONFIG_SCSI_DH is not set
624# CONFIG_SCSI_OSD_INITIATOR is not set
625# CONFIG_ATA is not set
626# CONFIG_MD is not set
627# CONFIG_MACINTOSH_DRIVERS is not set
628CONFIG_NETDEVICES=y
629# CONFIG_DUMMY is not set
630# CONFIG_BONDING is not set
631# CONFIG_MACVLAN is not set
632# CONFIG_EQUALIZER is not set
633# CONFIG_TUN is not set
634# CONFIG_VETH is not set
635CONFIG_PHYLIB=y
636
637#
638# MII PHY device drivers
639#
640CONFIG_MARVELL_PHY=y
641CONFIG_DAVICOM_PHY=y
642CONFIG_QSEMI_PHY=y
643CONFIG_LXT_PHY=y
644CONFIG_CICADA_PHY=y
645CONFIG_VITESSE_PHY=y
646CONFIG_SMSC_PHY=y
647CONFIG_BROADCOM_PHY=y
648CONFIG_ICPLUS_PHY=y
649CONFIG_REALTEK_PHY=y
650CONFIG_NATIONAL_PHY=y
651CONFIG_STE10XP=y
652CONFIG_LSI_ET1011C_PHY=y
653CONFIG_FIXED_PHY=y
654CONFIG_MDIO_BITBANG=y
655CONFIG_NET_ETHERNET=y
656CONFIG_MII=y
657# CONFIG_ETHOC is not set
658# CONFIG_DNET is not set
659# CONFIG_IBM_NEW_EMAC_ZMII is not set
660# CONFIG_IBM_NEW_EMAC_RGMII is not set
661# CONFIG_IBM_NEW_EMAC_TAH is not set
662# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
663# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
664# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
665# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
666# CONFIG_B44 is not set
667# CONFIG_KS8842 is not set
668# CONFIG_KS8851_MLL is not set
669# CONFIG_XILINX_EMACLITE is not set
670CONFIG_FS_ENET=y
671CONFIG_FS_ENET_MPC5121_FEC=y
672CONFIG_FS_ENET_HAS_FEC=y
673CONFIG_FS_ENET_MDIO_FEC=y
674# CONFIG_NETDEV_1000 is not set
675# CONFIG_NETDEV_10000 is not set
676# CONFIG_WLAN is not set
677
678#
679# Enable WiMAX (Networking options) to see the WiMAX drivers
680#
681
682#
683# USB Network Adapters
684#
685# CONFIG_USB_CATC is not set
686# CONFIG_USB_KAWETH is not set
687# CONFIG_USB_PEGASUS is not set
688# CONFIG_USB_RTL8150 is not set
689# CONFIG_USB_USBNET is not set
690# CONFIG_WAN is not set
691# CONFIG_PPP is not set
692# CONFIG_SLIP is not set
693# CONFIG_NETCONSOLE is not set
694# CONFIG_NETPOLL is not set
695# CONFIG_NET_POLL_CONTROLLER is not set
696# CONFIG_ISDN is not set
697# CONFIG_PHONE is not set
698
699#
700# Input device support
701#
702CONFIG_INPUT=y
703# CONFIG_INPUT_FF_MEMLESS is not set
704# CONFIG_INPUT_POLLDEV is not set
705# CONFIG_INPUT_SPARSEKMAP is not set
706
707#
708# Userland interfaces
709#
710CONFIG_INPUT_MOUSEDEV=y
711# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
712CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
713CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
714# CONFIG_INPUT_JOYDEV is not set
715CONFIG_INPUT_EVDEV=y
716# CONFIG_INPUT_EVBUG is not set
717
718#
719# Input Device Drivers
720#
721CONFIG_INPUT_KEYBOARD=y
722# CONFIG_KEYBOARD_ADP5588 is not set
723CONFIG_KEYBOARD_ATKBD=y
724# CONFIG_QT2160 is not set
725# CONFIG_KEYBOARD_LKKBD is not set
726# CONFIG_KEYBOARD_MAX7359 is not set
727# CONFIG_KEYBOARD_NEWTON is not set
728# CONFIG_KEYBOARD_OPENCORES is not set
729# CONFIG_KEYBOARD_STOWAWAY is not set
730# CONFIG_KEYBOARD_SUNKBD is not set
731# CONFIG_KEYBOARD_XTKBD is not set
732CONFIG_INPUT_MOUSE=y
733CONFIG_MOUSE_PS2=y
734CONFIG_MOUSE_PS2_ALPS=y
735CONFIG_MOUSE_PS2_LOGIPS2PP=y
736CONFIG_MOUSE_PS2_SYNAPTICS=y
737CONFIG_MOUSE_PS2_TRACKPOINT=y
738# CONFIG_MOUSE_PS2_ELANTECH is not set
739# CONFIG_MOUSE_PS2_SENTELIC is not set
740# CONFIG_MOUSE_PS2_TOUCHKIT is not set
741# CONFIG_MOUSE_SERIAL is not set
742# CONFIG_MOUSE_APPLETOUCH is not set
743# CONFIG_MOUSE_BCM5974 is not set
744# CONFIG_MOUSE_VSXXXAA is not set
745# CONFIG_MOUSE_SYNAPTICS_I2C is not set
746# CONFIG_INPUT_JOYSTICK is not set
747# CONFIG_INPUT_TABLET is not set
748# CONFIG_INPUT_TOUCHSCREEN is not set
749# CONFIG_INPUT_MISC is not set
750
751#
752# Hardware I/O ports
753#
754CONFIG_SERIO=y
755CONFIG_SERIO_I8042=y
756CONFIG_SERIO_SERPORT=y
757CONFIG_SERIO_LIBPS2=y
758# CONFIG_SERIO_RAW is not set
759# CONFIG_SERIO_XILINX_XPS_PS2 is not set
760# CONFIG_SERIO_ALTERA_PS2 is not set
761# CONFIG_GAMEPORT is not set
762
763#
764# Character devices
765#
766CONFIG_VT=y
767CONFIG_CONSOLE_TRANSLATIONS=y
768CONFIG_VT_CONSOLE=y
769CONFIG_HW_CONSOLE=y
770CONFIG_VT_HW_CONSOLE_BINDING=y
771# CONFIG_DEVKMEM is not set
772# CONFIG_SERIAL_NONSTANDARD is not set
773
774#
775# Serial drivers
776#
777# CONFIG_SERIAL_8250 is not set
778
779#
780# Non-8250 serial port support
781#
782# CONFIG_SERIAL_UARTLITE is not set
783CONFIG_SERIAL_CORE=y
784CONFIG_SERIAL_CORE_CONSOLE=y
785CONFIG_SERIAL_MPC52xx=y
786CONFIG_SERIAL_MPC52xx_CONSOLE=y
787CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD=115200
788# CONFIG_SERIAL_GRLIB_GAISLER_APBUART is not set
789CONFIG_UNIX98_PTYS=y
790# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
791CONFIG_LEGACY_PTYS=y
792CONFIG_LEGACY_PTY_COUNT=256
793# CONFIG_HVC_UDBG is not set
794# CONFIG_IPMI_HANDLER is not set
795# CONFIG_HW_RANDOM is not set
796# CONFIG_NVRAM is not set
797# CONFIG_R3964 is not set
798# CONFIG_RAW_DRIVER is not set
799# CONFIG_TCG_TPM is not set
800CONFIG_I2C=y
801CONFIG_I2C_BOARDINFO=y
802CONFIG_I2C_COMPAT=y
803CONFIG_I2C_CHARDEV=y
804CONFIG_I2C_HELPER_AUTO=y
805
806#
807# I2C Hardware Bus support
808#
809
810#
811# I2C system bus drivers (mostly embedded / system-on-chip)
812#
813# CONFIG_I2C_DESIGNWARE is not set
814CONFIG_I2C_MPC=y
815# CONFIG_I2C_OCORES is not set
816# CONFIG_I2C_SIMTEC is not set
817
818#
819# External I2C/SMBus adapter drivers
820#
821# CONFIG_I2C_PARPORT_LIGHT is not set
822# CONFIG_I2C_TAOS_EVM is not set
823# CONFIG_I2C_TINY_USB is not set
824
825#
826# Other I2C/SMBus bus drivers
827#
828# CONFIG_I2C_PCA_PLATFORM is not set
829# CONFIG_I2C_STUB is not set
830
831#
832# Miscellaneous I2C Chip support
833#
834# CONFIG_SENSORS_TSL2550 is not set
835# CONFIG_I2C_DEBUG_CORE is not set
836# CONFIG_I2C_DEBUG_ALGO is not set
837# CONFIG_I2C_DEBUG_BUS is not set
838# CONFIG_I2C_DEBUG_CHIP is not set
839# CONFIG_SPI is not set
840
841#
842# PPS support
843#
844# CONFIG_PPS is not set
845CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
846# CONFIG_GPIOLIB is not set
847# CONFIG_W1 is not set
848# CONFIG_POWER_SUPPLY is not set
849# CONFIG_HWMON is not set
850# CONFIG_THERMAL is not set
851# CONFIG_WATCHDOG is not set
852CONFIG_SSB_POSSIBLE=y
853
854#
855# Sonics Silicon Backplane
856#
857# CONFIG_SSB is not set
858
859#
860# Multifunction device drivers
861#
862# CONFIG_MFD_CORE is not set
863# CONFIG_MFD_SM501 is not set
864# CONFIG_HTC_PASIC3 is not set
865# CONFIG_TWL4030_CORE is not set
866# CONFIG_MFD_TMIO is not set
867# CONFIG_PMIC_DA903X is not set
868# CONFIG_PMIC_ADP5520 is not set
869# CONFIG_MFD_WM8400 is not set
870# CONFIG_MFD_WM831X is not set
871# CONFIG_MFD_WM8350_I2C is not set
872# CONFIG_MFD_PCF50633 is not set
873# CONFIG_AB3100_CORE is not set
874# CONFIG_MFD_88PM8607 is not set
875# CONFIG_REGULATOR is not set
876CONFIG_MEDIA_SUPPORT=y
877
878#
879# Multimedia core support
880#
881CONFIG_VIDEO_DEV=y
882CONFIG_VIDEO_V4L2_COMMON=y
883# CONFIG_VIDEO_ALLOW_V4L1 is not set
884CONFIG_VIDEO_V4L1_COMPAT=y
885# CONFIG_DVB_CORE is not set
886CONFIG_VIDEO_MEDIA=y
887
888#
889# Multimedia drivers
890#
891CONFIG_IR_CORE=y
892CONFIG_VIDEO_IR=y
893# CONFIG_MEDIA_ATTACH is not set
894CONFIG_MEDIA_TUNER=y
895# CONFIG_MEDIA_TUNER_CUSTOMISE is not set
896CONFIG_MEDIA_TUNER_SIMPLE=y
897CONFIG_MEDIA_TUNER_TDA8290=y
898CONFIG_MEDIA_TUNER_TDA9887=y
899CONFIG_MEDIA_TUNER_TEA5761=y
900CONFIG_MEDIA_TUNER_TEA5767=y
901CONFIG_MEDIA_TUNER_MT20XX=y
902CONFIG_MEDIA_TUNER_XC2028=y
903CONFIG_MEDIA_TUNER_XC5000=y
904CONFIG_MEDIA_TUNER_MC44S803=y
905CONFIG_VIDEO_V4L2=y
906CONFIG_VIDEO_CAPTURE_DRIVERS=y
907CONFIG_VIDEO_ADV_DEBUG=y
908# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
909# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
910CONFIG_VIDEO_IR_I2C=y
911
912#
913# Encoders/decoders and other helper chips
914#
915
916#
917# Audio decoders
918#
919# CONFIG_VIDEO_TVAUDIO is not set
920# CONFIG_VIDEO_TDA7432 is not set
921# CONFIG_VIDEO_TDA9840 is not set
922# CONFIG_VIDEO_TDA9875 is not set
923# CONFIG_VIDEO_TEA6415C is not set
924# CONFIG_VIDEO_TEA6420 is not set
925# CONFIG_VIDEO_MSP3400 is not set
926# CONFIG_VIDEO_CS5345 is not set
927# CONFIG_VIDEO_CS53L32A is not set
928# CONFIG_VIDEO_M52790 is not set
929# CONFIG_VIDEO_TLV320AIC23B is not set
930# CONFIG_VIDEO_WM8775 is not set
931# CONFIG_VIDEO_WM8739 is not set
932# CONFIG_VIDEO_VP27SMPX is not set
933
934#
935# RDS decoders
936#
937# CONFIG_VIDEO_SAA6588 is not set
938
939#
940# Video decoders
941#
942# CONFIG_VIDEO_ADV7180 is not set
943# CONFIG_VIDEO_BT819 is not set
944# CONFIG_VIDEO_BT856 is not set
945# CONFIG_VIDEO_BT866 is not set
946# CONFIG_VIDEO_KS0127 is not set
947# CONFIG_VIDEO_OV7670 is not set
948# CONFIG_VIDEO_MT9V011 is not set
949# CONFIG_VIDEO_TCM825X is not set
950# CONFIG_VIDEO_SAA7110 is not set
951CONFIG_VIDEO_SAA711X=y
952# CONFIG_VIDEO_SAA717X is not set
953# CONFIG_VIDEO_TVP514X is not set
954# CONFIG_VIDEO_TVP5150 is not set
955# CONFIG_VIDEO_VPX3220 is not set
956
957#
958# Video and audio decoders
959#
960# CONFIG_VIDEO_CX25840 is not set
961
962#
963# MPEG video encoders
964#
965# CONFIG_VIDEO_CX2341X is not set
966
967#
968# Video encoders
969#
970# CONFIG_VIDEO_SAA7127 is not set
971# CONFIG_VIDEO_SAA7185 is not set
972# CONFIG_VIDEO_ADV7170 is not set
973# CONFIG_VIDEO_ADV7175 is not set
974# CONFIG_VIDEO_THS7303 is not set
975# CONFIG_VIDEO_ADV7343 is not set
976
977#
978# Video improvement chips
979#
980# CONFIG_VIDEO_UPD64031A is not set
981# CONFIG_VIDEO_UPD64083 is not set
982# CONFIG_VIDEO_VIVI is not set
983# CONFIG_VIDEO_SAA5246A is not set
984# CONFIG_VIDEO_SAA5249 is not set
985# CONFIG_SOC_CAMERA is not set
986CONFIG_V4L_USB_DRIVERS=y
987# CONFIG_USB_VIDEO_CLASS is not set
988CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
989CONFIG_USB_GSPCA=m
990# CONFIG_USB_M5602 is not set
991# CONFIG_USB_STV06XX is not set
992# CONFIG_USB_GL860 is not set
993# CONFIG_USB_GSPCA_CONEX is not set
994# CONFIG_USB_GSPCA_ETOMS is not set
995# CONFIG_USB_GSPCA_FINEPIX is not set
996# CONFIG_USB_GSPCA_JEILINJ is not set
997# CONFIG_USB_GSPCA_MARS is not set
998# CONFIG_USB_GSPCA_MR97310A is not set
999# CONFIG_USB_GSPCA_OV519 is not set
1000# CONFIG_USB_GSPCA_OV534 is not set
1001# CONFIG_USB_GSPCA_PAC207 is not set
1002# CONFIG_USB_GSPCA_PAC7302 is not set
1003# CONFIG_USB_GSPCA_PAC7311 is not set
1004# CONFIG_USB_GSPCA_SN9C20X is not set
1005# CONFIG_USB_GSPCA_SONIXB is not set
1006# CONFIG_USB_GSPCA_SONIXJ is not set
1007# CONFIG_USB_GSPCA_SPCA500 is not set
1008# CONFIG_USB_GSPCA_SPCA501 is not set
1009# CONFIG_USB_GSPCA_SPCA505 is not set
1010# CONFIG_USB_GSPCA_SPCA506 is not set
1011# CONFIG_USB_GSPCA_SPCA508 is not set
1012# CONFIG_USB_GSPCA_SPCA561 is not set
1013# CONFIG_USB_GSPCA_SQ905 is not set
1014# CONFIG_USB_GSPCA_SQ905C is not set
1015# CONFIG_USB_GSPCA_STK014 is not set
1016# CONFIG_USB_GSPCA_STV0680 is not set
1017# CONFIG_USB_GSPCA_SUNPLUS is not set
1018# CONFIG_USB_GSPCA_T613 is not set
1019# CONFIG_USB_GSPCA_TV8532 is not set
1020# CONFIG_USB_GSPCA_VC032X is not set
1021# CONFIG_USB_GSPCA_ZC3XX is not set
1022# CONFIG_VIDEO_PVRUSB2 is not set
1023# CONFIG_VIDEO_HDPVR is not set
1024# CONFIG_VIDEO_EM28XX is not set
1025# CONFIG_VIDEO_CX231XX is not set
1026# CONFIG_VIDEO_USBVISION is not set
1027# CONFIG_USB_ET61X251 is not set
1028# CONFIG_USB_SN9C102 is not set
1029# CONFIG_USB_ZC0301 is not set
1030CONFIG_USB_PWC_INPUT_EVDEV=y
1031# CONFIG_USB_ZR364XX is not set
1032# CONFIG_USB_STKWEBCAM is not set
1033# CONFIG_USB_S2255 is not set
1034CONFIG_RADIO_ADAPTERS=y
1035# CONFIG_I2C_SI4713 is not set
1036# CONFIG_RADIO_SI4713 is not set
1037# CONFIG_USB_DSBR is not set
1038# CONFIG_RADIO_SI470X is not set
1039# CONFIG_USB_MR800 is not set
1040# CONFIG_RADIO_TEA5764 is not set
1041# CONFIG_RADIO_TEF6862 is not set
1042# CONFIG_DAB is not set
1043
1044#
1045# Graphics support
1046#
1047# CONFIG_VGASTATE is not set
1048# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1049CONFIG_FB=y
1050# CONFIG_FIRMWARE_EDID is not set
1051# CONFIG_FB_DDC is not set
1052# CONFIG_FB_BOOT_VESA_SUPPORT is not set
1053CONFIG_FB_CFB_FILLRECT=y
1054CONFIG_FB_CFB_COPYAREA=y
1055CONFIG_FB_CFB_IMAGEBLIT=y
1056# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
1057# CONFIG_FB_SYS_FILLRECT is not set
1058# CONFIG_FB_SYS_COPYAREA is not set
1059# CONFIG_FB_SYS_IMAGEBLIT is not set
1060# CONFIG_FB_FOREIGN_ENDIAN is not set
1061# CONFIG_FB_SYS_FOPS is not set
1062# CONFIG_FB_SVGALIB is not set
1063# CONFIG_FB_MACMODES is not set
1064# CONFIG_FB_BACKLIGHT is not set
1065# CONFIG_FB_MODE_HELPERS is not set
1066# CONFIG_FB_TILEBLITTING is not set
1067
1068#
1069# Frame buffer hardware drivers
1070#
1071# CONFIG_FB_OF is not set
1072# CONFIG_FB_VGA16 is not set
1073# CONFIG_FB_S1D13XXX is not set
1074CONFIG_FB_FSL_DIU=y
1075# CONFIG_FB_IBM_GXT4500 is not set
1076# CONFIG_FB_VIRTUAL is not set
1077# CONFIG_FB_METRONOME is not set
1078# CONFIG_FB_MB862XX is not set
1079# CONFIG_FB_BROADSHEET is not set
1080# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1081
1082#
1083# Display device support
1084#
1085# CONFIG_DISPLAY_SUPPORT is not set
1086
1087#
1088# Console display driver support
1089#
1090# CONFIG_VGA_CONSOLE is not set
1091CONFIG_DUMMY_CONSOLE=y
1092CONFIG_FRAMEBUFFER_CONSOLE=y
1093# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
1094# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
1095# CONFIG_FONTS is not set
1096CONFIG_FONT_8x8=y
1097CONFIG_FONT_8x16=y
1098# CONFIG_LOGO is not set
1099# CONFIG_SOUND is not set
1100CONFIG_HID_SUPPORT=y
1101CONFIG_HID=y
1102# CONFIG_HIDRAW is not set
1103
1104#
1105# USB Input Devices
1106#
1107CONFIG_USB_HID=y
1108# CONFIG_HID_PID is not set
1109# CONFIG_USB_HIDDEV is not set
1110
1111#
1112# Special HID drivers
1113#
1114CONFIG_HID_A4TECH=y
1115CONFIG_HID_APPLE=y
1116CONFIG_HID_BELKIN=y
1117CONFIG_HID_CHERRY=y
1118CONFIG_HID_CHICONY=y
1119CONFIG_HID_CYPRESS=y
1120CONFIG_HID_DRAGONRISE=y
1121# CONFIG_DRAGONRISE_FF is not set
1122CONFIG_HID_EZKEY=y
1123CONFIG_HID_KYE=y
1124CONFIG_HID_GYRATION=y
1125CONFIG_HID_TWINHAN=y
1126CONFIG_HID_KENSINGTON=y
1127CONFIG_HID_LOGITECH=y
1128# CONFIG_LOGITECH_FF is not set
1129# CONFIG_LOGIRUMBLEPAD2_FF is not set
1130CONFIG_HID_MICROSOFT=y
1131CONFIG_HID_MONTEREY=y
1132CONFIG_HID_NTRIG=y
1133CONFIG_HID_PANTHERLORD=y
1134# CONFIG_PANTHERLORD_FF is not set
1135CONFIG_HID_PETALYNX=y
1136CONFIG_HID_SAMSUNG=y
1137CONFIG_HID_SONY=y
1138CONFIG_HID_SUNPLUS=y
1139CONFIG_HID_GREENASIA=y
1140# CONFIG_GREENASIA_FF is not set
1141CONFIG_HID_SMARTJOYPLUS=y
1142# CONFIG_SMARTJOYPLUS_FF is not set
1143CONFIG_HID_TOPSEED=y
1144CONFIG_HID_THRUSTMASTER=y
1145# CONFIG_THRUSTMASTER_FF is not set
1146CONFIG_HID_ZEROPLUS=y
1147# CONFIG_ZEROPLUS_FF is not set
1148CONFIG_USB_SUPPORT=y
1149CONFIG_USB_ARCH_HAS_HCD=y
1150# CONFIG_USB_ARCH_HAS_OHCI is not set
1151CONFIG_USB_ARCH_HAS_EHCI=y
1152CONFIG_USB=y
1153# CONFIG_USB_DEBUG is not set
1154# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1155
1156#
1157# Miscellaneous USB options
1158#
1159# CONFIG_USB_DEVICEFS is not set
1160CONFIG_USB_DEVICE_CLASS=y
1161# CONFIG_USB_DYNAMIC_MINORS is not set
1162# CONFIG_USB_OTG is not set
1163# CONFIG_USB_MON is not set
1164# CONFIG_USB_WUSB is not set
1165# CONFIG_USB_WUSB_CBAF is not set
1166
1167#
1168# USB Host Controller Drivers
1169#
1170# CONFIG_USB_C67X00_HCD is not set
1171CONFIG_USB_EHCI_HCD=y
1172CONFIG_USB_EHCI_ROOT_HUB_TT=y
1173# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1174CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
1175CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y
1176# CONFIG_XPS_USB_HCD_XILINX is not set
1177CONFIG_USB_EHCI_FSL=y
1178CONFIG_USB_EHCI_HCD_PPC_OF=y
1179# CONFIG_USB_OXU210HP_HCD is not set
1180# CONFIG_USB_ISP116X_HCD is not set
1181# CONFIG_USB_ISP1760_HCD is not set
1182# CONFIG_USB_ISP1362_HCD is not set
1183# CONFIG_USB_SL811_HCD is not set
1184# CONFIG_USB_R8A66597_HCD is not set
1185# CONFIG_USB_HWA_HCD is not set
1186
1187#
1188# USB Device Class drivers
1189#
1190# CONFIG_USB_ACM is not set
1191# CONFIG_USB_PRINTER is not set
1192# CONFIG_USB_WDM is not set
1193# CONFIG_USB_TMC is not set
1194
1195#
1196# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
1197#
1198
1199#
1200# also be needed; see USB_STORAGE Help for more info
1201#
1202CONFIG_USB_STORAGE=y
1203# CONFIG_USB_STORAGE_DEBUG is not set
1204# CONFIG_USB_STORAGE_DATAFAB is not set
1205# CONFIG_USB_STORAGE_FREECOM is not set
1206# CONFIG_USB_STORAGE_ISD200 is not set
1207# CONFIG_USB_STORAGE_USBAT is not set
1208# CONFIG_USB_STORAGE_SDDR09 is not set
1209# CONFIG_USB_STORAGE_SDDR55 is not set
1210# CONFIG_USB_STORAGE_JUMPSHOT is not set
1211# CONFIG_USB_STORAGE_ALAUDA is not set
1212# CONFIG_USB_STORAGE_ONETOUCH is not set
1213# CONFIG_USB_STORAGE_KARMA is not set
1214# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1215# CONFIG_USB_LIBUSUAL is not set
1216
1217#
1218# USB Imaging devices
1219#
1220# CONFIG_USB_MDC800 is not set
1221# CONFIG_USB_MICROTEK is not set
1222
1223#
1224# USB port drivers
1225#
1226# CONFIG_USB_SERIAL is not set
1227
1228#
1229# USB Miscellaneous drivers
1230#
1231# CONFIG_USB_EMI62 is not set
1232# CONFIG_USB_EMI26 is not set
1233# CONFIG_USB_ADUTUX is not set
1234# CONFIG_USB_SEVSEG is not set
1235# CONFIG_USB_RIO500 is not set
1236# CONFIG_USB_LEGOTOWER is not set
1237# CONFIG_USB_LCD is not set
1238# CONFIG_USB_BERRY_CHARGE is not set
1239# CONFIG_USB_LED is not set
1240# CONFIG_USB_CYPRESS_CY7C63 is not set
1241# CONFIG_USB_CYTHERM is not set
1242# CONFIG_USB_IDMOUSE is not set
1243# CONFIG_USB_FTDI_ELAN is not set
1244# CONFIG_USB_APPLEDISPLAY is not set
1245# CONFIG_USB_SISUSBVGA is not set
1246# CONFIG_USB_LD is not set
1247# CONFIG_USB_TRANCEVIBRATOR is not set
1248# CONFIG_USB_IOWARRIOR is not set
1249# CONFIG_USB_TEST is not set
1250# CONFIG_USB_ISIGHTFW is not set
1251# CONFIG_USB_VST is not set
1252# CONFIG_USB_GADGET is not set
1253
1254#
1255# OTG and related infrastructure
1256#
1257# CONFIG_NOP_USB_XCEIV is not set
1258# CONFIG_MMC is not set
1259# CONFIG_MEMSTICK is not set
1260# CONFIG_NEW_LEDS is not set
1261# CONFIG_ACCESSIBILITY is not set
1262# CONFIG_EDAC is not set
1263CONFIG_RTC_LIB=y
1264CONFIG_RTC_CLASS=y
1265CONFIG_RTC_HCTOSYS=y
1266CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1267# CONFIG_RTC_DEBUG is not set
1268
1269#
1270# RTC interfaces
1271#
1272CONFIG_RTC_INTF_SYSFS=y
1273CONFIG_RTC_INTF_PROC=y
1274CONFIG_RTC_INTF_DEV=y
1275# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1276# CONFIG_RTC_DRV_TEST is not set
1277
1278#
1279# I2C RTC drivers
1280#
1281# CONFIG_RTC_DRV_DS1307 is not set
1282# CONFIG_RTC_DRV_DS1374 is not set
1283# CONFIG_RTC_DRV_DS1672 is not set
1284# CONFIG_RTC_DRV_MAX6900 is not set
1285# CONFIG_RTC_DRV_RS5C372 is not set
1286# CONFIG_RTC_DRV_ISL1208 is not set
1287# CONFIG_RTC_DRV_X1205 is not set
1288# CONFIG_RTC_DRV_PCF8563 is not set
1289# CONFIG_RTC_DRV_PCF8583 is not set
1290CONFIG_RTC_DRV_M41T80=y
1291# CONFIG_RTC_DRV_M41T80_WDT is not set
1292# CONFIG_RTC_DRV_BQ32K is not set
1293# CONFIG_RTC_DRV_S35390A is not set
1294# CONFIG_RTC_DRV_FM3130 is not set
1295# CONFIG_RTC_DRV_RX8581 is not set
1296# CONFIG_RTC_DRV_RX8025 is not set
1297
1298#
1299# SPI RTC drivers
1300#
1301
1302#
1303# Platform RTC drivers
1304#
1305# CONFIG_RTC_DRV_CMOS is not set
1306# CONFIG_RTC_DRV_DS1286 is not set
1307# CONFIG_RTC_DRV_DS1511 is not set
1308# CONFIG_RTC_DRV_DS1553 is not set
1309# CONFIG_RTC_DRV_DS1742 is not set
1310# CONFIG_RTC_DRV_STK17TA8 is not set
1311# CONFIG_RTC_DRV_M48T86 is not set
1312# CONFIG_RTC_DRV_M48T35 is not set
1313# CONFIG_RTC_DRV_M48T59 is not set
1314# CONFIG_RTC_DRV_MSM6242 is not set
1315# CONFIG_RTC_DRV_BQ4802 is not set
1316# CONFIG_RTC_DRV_RP5C01 is not set
1317# CONFIG_RTC_DRV_V3020 is not set
1318
1319#
1320# on-CPU RTC drivers
1321#
1322# CONFIG_RTC_DRV_GENERIC is not set
1323CONFIG_RTC_DRV_MPC5121=y
1324CONFIG_DMADEVICES=y
1325
1326#
1327# DMA Devices
1328#
1329# CONFIG_FSL_DMA is not set
1330CONFIG_MPC512X_DMA=y
1331CONFIG_DMA_ENGINE=y
1332
1333#
1334# DMA Clients
1335#
1336# CONFIG_NET_DMA is not set
1337# CONFIG_ASYNC_TX_DMA is not set
1338# CONFIG_DMATEST is not set
1339# CONFIG_AUXDISPLAY is not set
1340# CONFIG_UIO is not set
1341
1342#
1343# TI VLYNQ
1344#
1345# CONFIG_STAGING is not set
1346
1347#
1348# File systems
1349#
1350CONFIG_EXT2_FS=y
1351# CONFIG_EXT2_FS_XATTR is not set
1352CONFIG_EXT2_FS_XIP=y
1353CONFIG_EXT3_FS=y
1354# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
1355CONFIG_EXT3_FS_XATTR=y
1356# CONFIG_EXT3_FS_POSIX_ACL is not set
1357# CONFIG_EXT3_FS_SECURITY is not set
1358# CONFIG_EXT4_FS is not set
1359CONFIG_FS_XIP=y
1360CONFIG_JBD=y
1361CONFIG_FS_MBCACHE=y
1362# CONFIG_REISERFS_FS is not set
1363# CONFIG_JFS_FS is not set
1364# CONFIG_FS_POSIX_ACL is not set
1365# CONFIG_XFS_FS is not set
1366# CONFIG_GFS2_FS is not set
1367# CONFIG_OCFS2_FS is not set
1368# CONFIG_BTRFS_FS is not set
1369# CONFIG_NILFS2_FS is not set
1370CONFIG_FILE_LOCKING=y
1371CONFIG_FSNOTIFY=y
1372# CONFIG_DNOTIFY is not set
1373# CONFIG_INOTIFY is not set
1374CONFIG_INOTIFY_USER=y
1375# CONFIG_QUOTA is not set
1376# CONFIG_AUTOFS_FS is not set
1377# CONFIG_AUTOFS4_FS is not set
1378# CONFIG_FUSE_FS is not set
1379
1380#
1381# Caches
1382#
1383# CONFIG_FSCACHE is not set
1384
1385#
1386# CD-ROM/DVD Filesystems
1387#
1388# CONFIG_ISO9660_FS is not set
1389# CONFIG_UDF_FS is not set
1390
1391#
1392# DOS/FAT/NT Filesystems
1393#
1394CONFIG_FAT_FS=y
1395# CONFIG_MSDOS_FS is not set
1396CONFIG_VFAT_FS=y
1397CONFIG_FAT_DEFAULT_CODEPAGE=437
1398CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1399# CONFIG_NTFS_FS is not set
1400
1401#
1402# Pseudo filesystems
1403#
1404CONFIG_PROC_FS=y
1405# CONFIG_PROC_KCORE is not set
1406CONFIG_PROC_SYSCTL=y
1407CONFIG_PROC_PAGE_MONITOR=y
1408CONFIG_SYSFS=y
1409CONFIG_TMPFS=y
1410# CONFIG_TMPFS_POSIX_ACL is not set
1411# CONFIG_HUGETLB_PAGE is not set
1412# CONFIG_CONFIGFS_FS is not set
1413CONFIG_MISC_FILESYSTEMS=y
1414# CONFIG_ADFS_FS is not set
1415# CONFIG_AFFS_FS is not set
1416# CONFIG_HFS_FS is not set
1417# CONFIG_HFSPLUS_FS is not set
1418# CONFIG_BEFS_FS is not set
1419# CONFIG_BFS_FS is not set
1420# CONFIG_EFS_FS is not set
1421CONFIG_JFFS2_FS=y
1422CONFIG_JFFS2_FS_DEBUG=0
1423CONFIG_JFFS2_FS_WRITEBUFFER=y
1424# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1425# CONFIG_JFFS2_SUMMARY is not set
1426# CONFIG_JFFS2_FS_XATTR is not set
1427# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1428CONFIG_JFFS2_ZLIB=y
1429# CONFIG_JFFS2_LZO is not set
1430CONFIG_JFFS2_RTIME=y
1431# CONFIG_JFFS2_RUBIN is not set
1432CONFIG_UBIFS_FS=y
1433# CONFIG_UBIFS_FS_XATTR is not set
1434# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
1435CONFIG_UBIFS_FS_LZO=y
1436CONFIG_UBIFS_FS_ZLIB=y
1437# CONFIG_UBIFS_FS_DEBUG is not set
1438# CONFIG_CRAMFS is not set
1439# CONFIG_SQUASHFS is not set
1440# CONFIG_VXFS_FS is not set
1441# CONFIG_MINIX_FS is not set
1442# CONFIG_OMFS_FS is not set
1443# CONFIG_HPFS_FS is not set
1444# CONFIG_QNX4FS_FS is not set
1445# CONFIG_ROMFS_FS is not set
1446# CONFIG_SYSV_FS is not set
1447# CONFIG_UFS_FS is not set
1448CONFIG_NETWORK_FILESYSTEMS=y
1449CONFIG_NFS_FS=y
1450CONFIG_NFS_V3=y
1451# CONFIG_NFS_V3_ACL is not set
1452# CONFIG_NFS_V4 is not set
1453CONFIG_ROOT_NFS=y
1454# CONFIG_NFSD is not set
1455CONFIG_LOCKD=y
1456CONFIG_LOCKD_V4=y
1457CONFIG_NFS_COMMON=y
1458CONFIG_SUNRPC=y
1459# CONFIG_RPCSEC_GSS_KRB5 is not set
1460# CONFIG_RPCSEC_GSS_SPKM3 is not set
1461# CONFIG_SMB_FS is not set
1462# CONFIG_CIFS is not set
1463# CONFIG_NCP_FS is not set
1464# CONFIG_CODA_FS is not set
1465# CONFIG_AFS_FS is not set
1466
1467#
1468# Partition Types
1469#
1470CONFIG_PARTITION_ADVANCED=y
1471# CONFIG_ACORN_PARTITION is not set
1472# CONFIG_OSF_PARTITION is not set
1473# CONFIG_AMIGA_PARTITION is not set
1474# CONFIG_ATARI_PARTITION is not set
1475# CONFIG_MAC_PARTITION is not set
1476CONFIG_MSDOS_PARTITION=y
1477# CONFIG_BSD_DISKLABEL is not set
1478# CONFIG_MINIX_SUBPARTITION is not set
1479# CONFIG_SOLARIS_X86_PARTITION is not set
1480# CONFIG_UNIXWARE_DISKLABEL is not set
1481# CONFIG_LDM_PARTITION is not set
1482# CONFIG_SGI_PARTITION is not set
1483# CONFIG_ULTRIX_PARTITION is not set
1484# CONFIG_SUN_PARTITION is not set
1485# CONFIG_KARMA_PARTITION is not set
1486# CONFIG_EFI_PARTITION is not set
1487# CONFIG_SYSV68_PARTITION is not set
1488CONFIG_NLS=y
1489CONFIG_NLS_DEFAULT="iso8859-1"
1490CONFIG_NLS_CODEPAGE_437=y
1491# CONFIG_NLS_CODEPAGE_737 is not set
1492# CONFIG_NLS_CODEPAGE_775 is not set
1493# CONFIG_NLS_CODEPAGE_850 is not set
1494# CONFIG_NLS_CODEPAGE_852 is not set
1495# CONFIG_NLS_CODEPAGE_855 is not set
1496# CONFIG_NLS_CODEPAGE_857 is not set
1497# CONFIG_NLS_CODEPAGE_860 is not set
1498# CONFIG_NLS_CODEPAGE_861 is not set
1499# CONFIG_NLS_CODEPAGE_862 is not set
1500# CONFIG_NLS_CODEPAGE_863 is not set
1501# CONFIG_NLS_CODEPAGE_864 is not set
1502# CONFIG_NLS_CODEPAGE_865 is not set
1503# CONFIG_NLS_CODEPAGE_866 is not set
1504# CONFIG_NLS_CODEPAGE_869 is not set
1505# CONFIG_NLS_CODEPAGE_936 is not set
1506# CONFIG_NLS_CODEPAGE_950 is not set
1507# CONFIG_NLS_CODEPAGE_932 is not set
1508# CONFIG_NLS_CODEPAGE_949 is not set
1509# CONFIG_NLS_CODEPAGE_874 is not set
1510# CONFIG_NLS_ISO8859_8 is not set
1511# CONFIG_NLS_CODEPAGE_1250 is not set
1512# CONFIG_NLS_CODEPAGE_1251 is not set
1513# CONFIG_NLS_ASCII is not set
1514CONFIG_NLS_ISO8859_1=y
1515# CONFIG_NLS_ISO8859_2 is not set
1516# CONFIG_NLS_ISO8859_3 is not set
1517# CONFIG_NLS_ISO8859_4 is not set
1518# CONFIG_NLS_ISO8859_5 is not set
1519# CONFIG_NLS_ISO8859_6 is not set
1520# CONFIG_NLS_ISO8859_7 is not set
1521# CONFIG_NLS_ISO8859_9 is not set
1522# CONFIG_NLS_ISO8859_13 is not set
1523# CONFIG_NLS_ISO8859_14 is not set
1524# CONFIG_NLS_ISO8859_15 is not set
1525# CONFIG_NLS_KOI8_R is not set
1526# CONFIG_NLS_KOI8_U is not set
1527# CONFIG_NLS_UTF8 is not set
1528# CONFIG_DLM is not set
1529# CONFIG_BINARY_PRINTF is not set
1530
1531#
1532# Library routines
1533#
1534CONFIG_BITREVERSE=y
1535CONFIG_GENERIC_FIND_LAST_BIT=y
1536# CONFIG_CRC_CCITT is not set
1537CONFIG_CRC16=y
1538# CONFIG_CRC_T10DIF is not set
1539# CONFIG_CRC_ITU_T is not set
1540CONFIG_CRC32=y
1541# CONFIG_CRC7 is not set
1542# CONFIG_LIBCRC32C is not set
1543CONFIG_ZLIB_INFLATE=y
1544CONFIG_ZLIB_DEFLATE=y
1545CONFIG_LZO_COMPRESS=y
1546CONFIG_LZO_DECOMPRESS=y
1547CONFIG_DECOMPRESS_GZIP=y
1548CONFIG_DECOMPRESS_BZIP2=y
1549CONFIG_DECOMPRESS_LZMA=y
1550CONFIG_DECOMPRESS_LZO=y
1551CONFIG_HAS_IOMEM=y
1552CONFIG_HAS_IOPORT=y
1553CONFIG_HAS_DMA=y
1554CONFIG_HAVE_LMB=y
1555CONFIG_NLATTR=y
1556CONFIG_GENERIC_ATOMIC64=y
1557
1558#
1559# Kernel hacking
1560#
1561# CONFIG_PRINTK_TIME is not set
1562# CONFIG_ENABLE_WARN_DEPRECATED is not set
1563# CONFIG_ENABLE_MUST_CHECK is not set
1564CONFIG_FRAME_WARN=1024
1565# CONFIG_MAGIC_SYSRQ is not set
1566# CONFIG_STRIP_ASM_SYMS is not set
1567# CONFIG_UNUSED_SYMBOLS is not set
1568# CONFIG_DEBUG_FS is not set
1569# CONFIG_HEADERS_CHECK is not set
1570# CONFIG_DEBUG_KERNEL is not set
1571CONFIG_DEBUG_BUGVERBOSE=y
1572CONFIG_DEBUG_MEMORY_INIT=y
1573# CONFIG_RCU_CPU_STALL_DETECTOR is not set
1574# CONFIG_LATENCYTOP is not set
1575# CONFIG_SYSCTL_SYSCALL_CHECK is not set
1576CONFIG_HAVE_FUNCTION_TRACER=y
1577CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
1578CONFIG_HAVE_DYNAMIC_FTRACE=y
1579CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
1580CONFIG_TRACING_SUPPORT=y
1581# CONFIG_FTRACE is not set
1582# CONFIG_DMA_API_DEBUG is not set
1583# CONFIG_SAMPLES is not set
1584CONFIG_HAVE_ARCH_KGDB=y
1585# CONFIG_PPC_DISABLE_WERROR is not set
1586CONFIG_PPC_WERROR=y
1587CONFIG_PRINT_STACK_DEPTH=64
1588# CONFIG_IRQSTACKS is not set
1589# CONFIG_BOOTX_TEXT is not set
1590# CONFIG_PPC_EARLY_DEBUG is not set
1591
1592#
1593# Security options
1594#
1595# CONFIG_KEYS is not set
1596# CONFIG_SECURITY is not set
1597# CONFIG_SECURITYFS is not set
1598# CONFIG_DEFAULT_SECURITY_SELINUX is not set
1599# CONFIG_DEFAULT_SECURITY_SMACK is not set
1600# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
1601CONFIG_DEFAULT_SECURITY_DAC=y
1602CONFIG_DEFAULT_SECURITY=""
1603CONFIG_CRYPTO=y
1604
1605#
1606# Crypto core or helper
1607#
1608CONFIG_CRYPTO_ALGAPI=y
1609CONFIG_CRYPTO_ALGAPI2=y
1610# CONFIG_CRYPTO_MANAGER is not set
1611# CONFIG_CRYPTO_MANAGER2 is not set
1612# CONFIG_CRYPTO_GF128MUL is not set
1613# CONFIG_CRYPTO_NULL is not set
1614# CONFIG_CRYPTO_CRYPTD is not set
1615# CONFIG_CRYPTO_AUTHENC is not set
1616# CONFIG_CRYPTO_TEST is not set
1617
1618#
1619# Authenticated Encryption with Associated Data
1620#
1621# CONFIG_CRYPTO_CCM is not set
1622# CONFIG_CRYPTO_GCM is not set
1623# CONFIG_CRYPTO_SEQIV is not set
1624
1625#
1626# Block modes
1627#
1628# CONFIG_CRYPTO_CBC is not set
1629# CONFIG_CRYPTO_CTR is not set
1630# CONFIG_CRYPTO_CTS is not set
1631# CONFIG_CRYPTO_ECB is not set
1632# CONFIG_CRYPTO_LRW is not set
1633# CONFIG_CRYPTO_PCBC is not set
1634# CONFIG_CRYPTO_XTS is not set
1635
1636#
1637# Hash modes
1638#
1639# CONFIG_CRYPTO_HMAC is not set
1640# CONFIG_CRYPTO_XCBC is not set
1641# CONFIG_CRYPTO_VMAC is not set
1642
1643#
1644# Digest
1645#
1646# CONFIG_CRYPTO_CRC32C is not set
1647# CONFIG_CRYPTO_GHASH is not set
1648# CONFIG_CRYPTO_MD4 is not set
1649# CONFIG_CRYPTO_MD5 is not set
1650# CONFIG_CRYPTO_MICHAEL_MIC is not set
1651# CONFIG_CRYPTO_RMD128 is not set
1652# CONFIG_CRYPTO_RMD160 is not set
1653# CONFIG_CRYPTO_RMD256 is not set
1654# CONFIG_CRYPTO_RMD320 is not set
1655# CONFIG_CRYPTO_SHA1 is not set
1656# CONFIG_CRYPTO_SHA256 is not set
1657# CONFIG_CRYPTO_SHA512 is not set
1658# CONFIG_CRYPTO_TGR192 is not set
1659# CONFIG_CRYPTO_WP512 is not set
1660
1661#
1662# Ciphers
1663#
1664# CONFIG_CRYPTO_AES is not set
1665# CONFIG_CRYPTO_ANUBIS is not set
1666# CONFIG_CRYPTO_ARC4 is not set
1667# CONFIG_CRYPTO_BLOWFISH is not set
1668# CONFIG_CRYPTO_CAMELLIA is not set
1669# CONFIG_CRYPTO_CAST5 is not set
1670# CONFIG_CRYPTO_CAST6 is not set
1671# CONFIG_CRYPTO_DES is not set
1672# CONFIG_CRYPTO_FCRYPT is not set
1673# CONFIG_CRYPTO_KHAZAD is not set
1674# CONFIG_CRYPTO_SALSA20 is not set
1675# CONFIG_CRYPTO_SEED is not set
1676# CONFIG_CRYPTO_SERPENT is not set
1677# CONFIG_CRYPTO_TEA is not set
1678# CONFIG_CRYPTO_TWOFISH is not set
1679
1680#
1681# Compression
1682#
1683CONFIG_CRYPTO_DEFLATE=y
1684# CONFIG_CRYPTO_ZLIB is not set
1685CONFIG_CRYPTO_LZO=y
1686
1687#
1688# Random Number Generation
1689#
1690# CONFIG_CRYPTO_ANSI_CPRNG is not set
1691# CONFIG_CRYPTO_HW is not set
1692CONFIG_PPC_CLOCK=y
1693CONFIG_PPC_LIB_RHEAP=y
1694# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 7b3804a6e363..b5b259960794 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -137,8 +137,9 @@ CONFIG_TRACEPOINTS=y
137CONFIG_MARKERS=y 137CONFIG_MARKERS=y
138CONFIG_OPROFILE=y 138CONFIG_OPROFILE=y
139CONFIG_HAVE_OPROFILE=y 139CONFIG_HAVE_OPROFILE=y
140# CONFIG_KPROBES is not set 140CONFIG_KPROBES=y
141CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y 141CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
142CONFIG_KRETPROBES=y
142CONFIG_HAVE_IOREMAP_PROT=y 143CONFIG_HAVE_IOREMAP_PROT=y
143CONFIG_HAVE_KPROBES=y 144CONFIG_HAVE_KPROBES=y
144CONFIG_HAVE_KRETPROBES=y 145CONFIG_HAVE_KRETPROBES=y
@@ -191,6 +192,7 @@ CONFIG_SCANLOG=m
191CONFIG_LPARCFG=y 192CONFIG_LPARCFG=y
192CONFIG_PPC_SMLPAR=y 193CONFIG_PPC_SMLPAR=y
193CONFIG_CMM=y 194CONFIG_CMM=y
195CONFIG_DTL=y
194CONFIG_PPC_ISERIES=y 196CONFIG_PPC_ISERIES=y
195 197
196# 198#
@@ -328,9 +330,10 @@ CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
328CONFIG_KEXEC=y 330CONFIG_KEXEC=y
329# CONFIG_PHYP_DUMP is not set 331# CONFIG_PHYP_DUMP is not set
330CONFIG_IRQ_ALL_CPUS=y 332CONFIG_IRQ_ALL_CPUS=y
331# CONFIG_NUMA is not set 333CONFIG_NUMA=y
334CONFIG_NODES_SHIFT=8
335CONFIG_MAX_ACTIVE_REGIONS=256
332CONFIG_ARCH_SELECT_MEMORY_MODEL=y 336CONFIG_ARCH_SELECT_MEMORY_MODEL=y
333CONFIG_ARCH_FLATMEM_ENABLE=y
334CONFIG_ARCH_SPARSEMEM_ENABLE=y 337CONFIG_ARCH_SPARSEMEM_ENABLE=y
335CONFIG_ARCH_SPARSEMEM_DEFAULT=y 338CONFIG_ARCH_SPARSEMEM_DEFAULT=y
336CONFIG_ARCH_POPULATES_NODE_MAP=y 339CONFIG_ARCH_POPULATES_NODE_MAP=y
@@ -339,6 +342,7 @@ CONFIG_SELECT_MEMORY_MODEL=y
339# CONFIG_DISCONTIGMEM_MANUAL is not set 342# CONFIG_DISCONTIGMEM_MANUAL is not set
340CONFIG_SPARSEMEM_MANUAL=y 343CONFIG_SPARSEMEM_MANUAL=y
341CONFIG_SPARSEMEM=y 344CONFIG_SPARSEMEM=y
345CONFIG_NEED_MULTIPLE_NODES=y
342CONFIG_HAVE_MEMORY_PRESENT=y 346CONFIG_HAVE_MEMORY_PRESENT=y
343CONFIG_SPARSEMEM_EXTREME=y 347CONFIG_SPARSEMEM_EXTREME=y
344CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y 348CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
@@ -354,11 +358,12 @@ CONFIG_PHYS_ADDR_T_64BIT=y
354CONFIG_ZONE_DMA_FLAG=1 358CONFIG_ZONE_DMA_FLAG=1
355CONFIG_BOUNCE=y 359CONFIG_BOUNCE=y
356CONFIG_UNEVICTABLE_LRU=y 360CONFIG_UNEVICTABLE_LRU=y
361CONFIG_NODES_SPAN_OTHER_NODES=y
357CONFIG_ARCH_MEMORY_PROBE=y 362CONFIG_ARCH_MEMORY_PROBE=y
358CONFIG_PPC_HAS_HASH_64K=y 363CONFIG_PPC_HAS_HASH_64K=y
359# CONFIG_PPC_64K_PAGES is not set 364# CONFIG_PPC_64K_PAGES is not set
360CONFIG_FORCE_MAX_ZONEORDER=13 365CONFIG_FORCE_MAX_ZONEORDER=13
361# CONFIG_SCHED_SMT is not set 366CONFIG_SCHED_SMT=y
362CONFIG_PROC_DEVICETREE=y 367CONFIG_PROC_DEVICETREE=y
363# CONFIG_CMDLINE_BOOL is not set 368# CONFIG_CMDLINE_BOOL is not set
364CONFIG_EXTRA_TARGETS="" 369CONFIG_EXTRA_TARGETS=""
@@ -790,12 +795,12 @@ CONFIG_SCSI_IPR=y
790CONFIG_SCSI_IPR_TRACE=y 795CONFIG_SCSI_IPR_TRACE=y
791CONFIG_SCSI_IPR_DUMP=y 796CONFIG_SCSI_IPR_DUMP=y
792# CONFIG_SCSI_QLOGIC_1280 is not set 797# CONFIG_SCSI_QLOGIC_1280 is not set
793# CONFIG_SCSI_QLA_FC is not set 798CONFIG_SCSI_QLA_FC=m
794# CONFIG_SCSI_QLA_ISCSI is not set 799# CONFIG_SCSI_QLA_ISCSI is not set
795CONFIG_SCSI_LPFC=m 800CONFIG_SCSI_LPFC=m
796# CONFIG_SCSI_DC395x is not set 801# CONFIG_SCSI_DC395x is not set
797# CONFIG_SCSI_DC390T is not set 802# CONFIG_SCSI_DC390T is not set
798CONFIG_SCSI_DEBUG=m 803# CONFIG_SCSI_DEBUG is not set
799# CONFIG_SCSI_SRP is not set 804# CONFIG_SCSI_SRP is not set
800# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set 805# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
801# CONFIG_SCSI_DH is not set 806# CONFIG_SCSI_DH is not set
@@ -867,9 +872,8 @@ CONFIG_MD_AUTODETECT=y
867CONFIG_MD_LINEAR=y 872CONFIG_MD_LINEAR=y
868CONFIG_MD_RAID0=y 873CONFIG_MD_RAID0=y
869CONFIG_MD_RAID1=y 874CONFIG_MD_RAID1=y
870CONFIG_MD_RAID10=y 875CONFIG_MD_RAID10=m
871CONFIG_MD_RAID456=y 876CONFIG_MD_RAID456=m
872CONFIG_MD_RAID5_RESHAPE=y
873CONFIG_MD_MULTIPATH=m 877CONFIG_MD_MULTIPATH=m
874CONFIG_MD_FAULTY=m 878CONFIG_MD_FAULTY=m
875CONFIG_BLK_DEV_DM=y 879CONFIG_BLK_DEV_DM=y
@@ -984,7 +988,7 @@ CONFIG_ACENIC=m
984CONFIG_ACENIC_OMIT_TIGON_I=y 988CONFIG_ACENIC_OMIT_TIGON_I=y
985# CONFIG_DL2K is not set 989# CONFIG_DL2K is not set
986CONFIG_E1000=y 990CONFIG_E1000=y
987# CONFIG_E1000E is not set 991CONFIG_E1000E=m
988# CONFIG_IP1000 is not set 992# CONFIG_IP1000 is not set
989# CONFIG_IGB is not set 993# CONFIG_IGB is not set
990# CONFIG_NS83820 is not set 994# CONFIG_NS83820 is not set
@@ -1006,19 +1010,19 @@ CONFIG_GELIC_WIRELESS=y
1006# CONFIG_ATL1E is not set 1010# CONFIG_ATL1E is not set
1007# CONFIG_JME is not set 1011# CONFIG_JME is not set
1008CONFIG_NETDEV_10000=y 1012CONFIG_NETDEV_10000=y
1009# CONFIG_CHELSIO_T1 is not set 1013CONFIG_CHELSIO_T1=m
1010# CONFIG_CHELSIO_T3 is not set 1014CONFIG_CHELSIO_T3=m
1011CONFIG_EHEA=m 1015CONFIG_EHEA=m
1012# CONFIG_ENIC is not set 1016# CONFIG_ENIC is not set
1013# CONFIG_IXGBE is not set 1017CONFIG_IXGBE=m
1014CONFIG_IXGB=m 1018CONFIG_IXGB=m
1015# CONFIG_S2IO is not set 1019CONFIG_S2IO=m
1016# CONFIG_MYRI10GE is not set 1020CONFIG_MYRI10GE=m
1017# CONFIG_NETXEN_NIC is not set 1021CONFIG_NETXEN_NIC=m
1018# CONFIG_NIU is not set 1022# CONFIG_NIU is not set
1019CONFIG_PASEMI_MAC=y 1023CONFIG_PASEMI_MAC=y
1020# CONFIG_MLX4_EN is not set 1024CONFIG_MLX4_EN=m
1021# CONFIG_MLX4_CORE is not set 1025CONFIG_MLX4_CORE=m
1022# CONFIG_TEHUTI is not set 1026# CONFIG_TEHUTI is not set
1023# CONFIG_BNX2X is not set 1027# CONFIG_BNX2X is not set
1024# CONFIG_QLGE is not set 1028# CONFIG_QLGE is not set
@@ -1169,7 +1173,7 @@ CONFIG_SERIAL_TXX9=y
1169CONFIG_HAS_TXX9_SERIAL=y 1173CONFIG_HAS_TXX9_SERIAL=y
1170CONFIG_SERIAL_TXX9_NR_UARTS=6 1174CONFIG_SERIAL_TXX9_NR_UARTS=6
1171CONFIG_SERIAL_TXX9_CONSOLE=y 1175CONFIG_SERIAL_TXX9_CONSOLE=y
1172# CONFIG_SERIAL_JSM is not set 1176CONFIG_SERIAL_JSM=m
1173# CONFIG_SERIAL_OF_PLATFORM is not set 1177# CONFIG_SERIAL_OF_PLATFORM is not set
1174CONFIG_UNIX98_PTYS=y 1178CONFIG_UNIX98_PTYS=y
1175CONFIG_LEGACY_PTYS=y 1179CONFIG_LEGACY_PTYS=y
@@ -1586,7 +1590,7 @@ CONFIG_USB_DEVICEFS=y
1586CONFIG_USB_DEVICE_CLASS=y 1590CONFIG_USB_DEVICE_CLASS=y
1587# CONFIG_USB_DYNAMIC_MINORS is not set 1591# CONFIG_USB_DYNAMIC_MINORS is not set
1588# CONFIG_USB_OTG is not set 1592# CONFIG_USB_OTG is not set
1589# CONFIG_USB_MON is not set 1593CONFIG_USB_MON=m
1590# CONFIG_USB_WUSB is not set 1594# CONFIG_USB_WUSB is not set
1591# CONFIG_USB_WUSB_CBAF is not set 1595# CONFIG_USB_WUSB_CBAF is not set
1592 1596
@@ -1686,21 +1690,22 @@ CONFIG_USB_APPLEDISPLAY=m
1686# CONFIG_NEW_LEDS is not set 1690# CONFIG_NEW_LEDS is not set
1687# CONFIG_ACCESSIBILITY is not set 1691# CONFIG_ACCESSIBILITY is not set
1688CONFIG_INFINIBAND=m 1692CONFIG_INFINIBAND=m
1689# CONFIG_INFINIBAND_USER_MAD is not set 1693CONFIG_INFINIBAND_USER_MAD=m
1690# CONFIG_INFINIBAND_USER_ACCESS is not set 1694CONFIG_INFINIBAND_USER_ACCESS=m
1695CONFIG_INFINIBAND_USER_MEM=y
1691CONFIG_INFINIBAND_ADDR_TRANS=y 1696CONFIG_INFINIBAND_ADDR_TRANS=y
1692CONFIG_INFINIBAND_MTHCA=m 1697CONFIG_INFINIBAND_MTHCA=m
1693CONFIG_INFINIBAND_MTHCA_DEBUG=y 1698CONFIG_INFINIBAND_MTHCA_DEBUG=y
1694# CONFIG_INFINIBAND_IPATH is not set 1699CONFIG_INFINIBAND_IPATH=m
1695CONFIG_INFINIBAND_EHCA=m 1700CONFIG_INFINIBAND_EHCA=m
1696# CONFIG_INFINIBAND_AMSO1100 is not set 1701# CONFIG_INFINIBAND_AMSO1100 is not set
1697# CONFIG_MLX4_INFINIBAND is not set 1702CONFIG_MLX4_INFINIBAND=m
1698# CONFIG_INFINIBAND_NES is not set 1703# CONFIG_INFINIBAND_NES is not set
1699CONFIG_INFINIBAND_IPOIB=m 1704CONFIG_INFINIBAND_IPOIB=m
1700# CONFIG_INFINIBAND_IPOIB_CM is not set 1705CONFIG_INFINIBAND_IPOIB_CM=y
1701CONFIG_INFINIBAND_IPOIB_DEBUG=y 1706CONFIG_INFINIBAND_IPOIB_DEBUG=y
1702# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set 1707# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
1703# CONFIG_INFINIBAND_SRP is not set 1708CONFIG_INFINIBAND_SRP=m
1704CONFIG_INFINIBAND_ISER=m 1709CONFIG_INFINIBAND_ISER=m
1705CONFIG_EDAC=y 1710CONFIG_EDAC=y
1706 1711
@@ -1798,7 +1803,7 @@ CONFIG_REISERFS_FS=y
1798CONFIG_REISERFS_FS_XATTR=y 1803CONFIG_REISERFS_FS_XATTR=y
1799CONFIG_REISERFS_FS_POSIX_ACL=y 1804CONFIG_REISERFS_FS_POSIX_ACL=y
1800CONFIG_REISERFS_FS_SECURITY=y 1805CONFIG_REISERFS_FS_SECURITY=y
1801CONFIG_JFS_FS=y 1806CONFIG_JFS_FS=m
1802CONFIG_JFS_POSIX_ACL=y 1807CONFIG_JFS_POSIX_ACL=y
1803CONFIG_JFS_SECURITY=y 1808CONFIG_JFS_SECURITY=y
1804# CONFIG_JFS_DEBUG is not set 1809# CONFIG_JFS_DEBUG is not set
@@ -1811,14 +1816,22 @@ CONFIG_XFS_POSIX_ACL=y
1811# CONFIG_XFS_RT is not set 1816# CONFIG_XFS_RT is not set
1812# CONFIG_XFS_DEBUG is not set 1817# CONFIG_XFS_DEBUG is not set
1813# CONFIG_GFS2_FS is not set 1818# CONFIG_GFS2_FS is not set
1814# CONFIG_OCFS2_FS is not set 1819CONFIG_OCFS2_FS=m
1820CONFIG_OCFS2_FS_O2CB=m
1821CONFIG_OCFS2_FS_STATS=y
1822CONFIG_OCFS2_DEBUG_MASKLOG=y
1823# CONFIG_OCFS2_DEBUG_FS is not set
1824# CONFIG_OCFS2_COMPAT_JBD is not set
1825CONFIG_BTRFS_FS=m
1826CONFIG_BTRFS_FS_POSIX_ACL=y
1827CONFIG_NILFS2_FS=m
1815CONFIG_DNOTIFY=y 1828CONFIG_DNOTIFY=y
1816CONFIG_INOTIFY=y 1829CONFIG_INOTIFY=y
1817CONFIG_INOTIFY_USER=y 1830CONFIG_INOTIFY_USER=y
1818# CONFIG_QUOTA is not set 1831# CONFIG_QUOTA is not set
1819# CONFIG_AUTOFS_FS is not set 1832# CONFIG_AUTOFS_FS is not set
1820CONFIG_AUTOFS4_FS=m 1833CONFIG_AUTOFS4_FS=m
1821# CONFIG_FUSE_FS is not set 1834CONFIG_FUSE_FS=m
1822 1835
1823# 1836#
1824# CD-ROM/DVD Filesystems 1837# CD-ROM/DVD Filesystems
@@ -1851,7 +1864,7 @@ CONFIG_TMPFS=y
1851# CONFIG_TMPFS_POSIX_ACL is not set 1864# CONFIG_TMPFS_POSIX_ACL is not set
1852CONFIG_HUGETLBFS=y 1865CONFIG_HUGETLBFS=y
1853CONFIG_HUGETLB_PAGE=y 1866CONFIG_HUGETLB_PAGE=y
1854# CONFIG_CONFIGFS_FS is not set 1867CONFIG_CONFIGFS_FS=m
1855 1868
1856# 1869#
1857# Miscellaneous filesystems 1870# Miscellaneous filesystems
@@ -2075,7 +2088,7 @@ CONFIG_XMON=y
2075CONFIG_XMON_DISASSEMBLY=y 2088CONFIG_XMON_DISASSEMBLY=y
2076CONFIG_DEBUGGER=y 2089CONFIG_DEBUGGER=y
2077CONFIG_IRQSTACKS=y 2090CONFIG_IRQSTACKS=y
2078# CONFIG_VIRQ_DEBUG is not set 2091CONFIG_VIRQ_DEBUG=y
2079CONFIG_BOOTX_TEXT=y 2092CONFIG_BOOTX_TEXT=y
2080# CONFIG_PPC_EARLY_DEBUG is not set 2093# CONFIG_PPC_EARLY_DEBUG is not set
2081 2094
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index ca9ff9aad74a..41de3ddc9f24 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -159,7 +159,7 @@ CONFIG_MODULE_SRCVERSION_ALL=y
159CONFIG_KMOD=y 159CONFIG_KMOD=y
160CONFIG_STOP_MACHINE=y 160CONFIG_STOP_MACHINE=y
161CONFIG_BLOCK=y 161CONFIG_BLOCK=y
162# CONFIG_BLK_DEV_IO_TRACE is not set 162CONFIG_BLK_DEV_IO_TRACE=y
163CONFIG_BLK_DEV_BSG=y 163CONFIG_BLK_DEV_BSG=y
164# CONFIG_BLK_DEV_INTEGRITY is not set 164# CONFIG_BLK_DEV_INTEGRITY is not set
165CONFIG_BLOCK_COMPAT=y 165CONFIG_BLOCK_COMPAT=y
@@ -191,6 +191,7 @@ CONFIG_SCANLOG=m
191CONFIG_LPARCFG=y 191CONFIG_LPARCFG=y
192CONFIG_PPC_SMLPAR=y 192CONFIG_PPC_SMLPAR=y
193CONFIG_CMM=y 193CONFIG_CMM=y
194CONFIG_DTL=y
194# CONFIG_PPC_ISERIES is not set 195# CONFIG_PPC_ISERIES is not set
195# CONFIG_PPC_PMAC is not set 196# CONFIG_PPC_PMAC is not set
196# CONFIG_PPC_MAPLE is not set 197# CONFIG_PPC_MAPLE is not set
@@ -255,7 +256,8 @@ CONFIG_KEXEC=y
255# CONFIG_PHYP_DUMP is not set 256# CONFIG_PHYP_DUMP is not set
256CONFIG_IRQ_ALL_CPUS=y 257CONFIG_IRQ_ALL_CPUS=y
257CONFIG_NUMA=y 258CONFIG_NUMA=y
258CONFIG_NODES_SHIFT=4 259CONFIG_NODES_SHIFT=8
260CONFIG_MAX_ACTIVE_REGIONS=256
259CONFIG_ARCH_SELECT_MEMORY_MODEL=y 261CONFIG_ARCH_SELECT_MEMORY_MODEL=y
260CONFIG_ARCH_SPARSEMEM_ENABLE=y 262CONFIG_ARCH_SPARSEMEM_ENABLE=y
261CONFIG_ARCH_SPARSEMEM_DEFAULT=y 263CONFIG_ARCH_SPARSEMEM_DEFAULT=y
@@ -270,7 +272,9 @@ CONFIG_HAVE_MEMORY_PRESENT=y
270CONFIG_SPARSEMEM_EXTREME=y 272CONFIG_SPARSEMEM_EXTREME=y
271CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y 273CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
272CONFIG_SPARSEMEM_VMEMMAP=y 274CONFIG_SPARSEMEM_VMEMMAP=y
273# CONFIG_MEMORY_HOTPLUG is not set 275CONFIG_MEMORY_HOTPLUG=y
276CONFIG_MEMORY_HOTPLUG_SPARSE=y
277CONFIG_MEMORY_HOTREMOVE=y
274CONFIG_PAGEFLAGS_EXTENDED=y 278CONFIG_PAGEFLAGS_EXTENDED=y
275CONFIG_SPLIT_PTLOCK_CPUS=4 279CONFIG_SPLIT_PTLOCK_CPUS=4
276CONFIG_MIGRATION=y 280CONFIG_MIGRATION=y
@@ -705,7 +709,7 @@ CONFIG_MD_LINEAR=y
705CONFIG_MD_RAID0=y 709CONFIG_MD_RAID0=y
706CONFIG_MD_RAID1=y 710CONFIG_MD_RAID1=y
707CONFIG_MD_RAID10=m 711CONFIG_MD_RAID10=m
708# CONFIG_MD_RAID456 is not set 712CONFIG_MD_RAID456=m
709CONFIG_MD_MULTIPATH=m 713CONFIG_MD_MULTIPATH=m
710CONFIG_MD_FAULTY=m 714CONFIG_MD_FAULTY=m
711CONFIG_BLK_DEV_DM=y 715CONFIG_BLK_DEV_DM=y
@@ -800,7 +804,7 @@ CONFIG_ACENIC=m
800CONFIG_ACENIC_OMIT_TIGON_I=y 804CONFIG_ACENIC_OMIT_TIGON_I=y
801# CONFIG_DL2K is not set 805# CONFIG_DL2K is not set
802CONFIG_E1000=y 806CONFIG_E1000=y
803# CONFIG_E1000E is not set 807CONFIG_E1000E=m
804# CONFIG_IP1000 is not set 808# CONFIG_IP1000 is not set
805# CONFIG_IGB is not set 809# CONFIG_IGB is not set
806# CONFIG_NS83820 is not set 810# CONFIG_NS83820 is not set
@@ -818,18 +822,18 @@ CONFIG_TIGON3=y
818# CONFIG_ATL1E is not set 822# CONFIG_ATL1E is not set
819# CONFIG_JME is not set 823# CONFIG_JME is not set
820CONFIG_NETDEV_10000=y 824CONFIG_NETDEV_10000=y
821# CONFIG_CHELSIO_T1 is not set 825CONFIG_CHELSIO_T1=m
822# CONFIG_CHELSIO_T3 is not set 826CONFIG_CHELSIO_T3=m
823CONFIG_EHEA=y 827CONFIG_EHEA=y
824# CONFIG_ENIC is not set 828# CONFIG_ENIC is not set
825# CONFIG_IXGBE is not set 829CONFIG_IXGBE=m
826CONFIG_IXGB=m 830CONFIG_IXGB=m
827CONFIG_S2IO=m 831CONFIG_S2IO=m
828# CONFIG_MYRI10GE is not set 832CONFIG_MYRI10GE=m
829# CONFIG_NETXEN_NIC is not set 833CONFIG_NETXEN_NIC=m
830# CONFIG_NIU is not set 834# CONFIG_NIU is not set
831# CONFIG_MLX4_EN is not set 835CONFIG_MLX4_EN=m
832# CONFIG_MLX4_CORE is not set 836CONFIG_MLX4_CORE=m
833# CONFIG_TEHUTI is not set 837# CONFIG_TEHUTI is not set
834# CONFIG_BNX2X is not set 838# CONFIG_BNX2X is not set
835# CONFIG_QLGE is not set 839# CONFIG_QLGE is not set
@@ -894,7 +898,7 @@ CONFIG_INPUT_MOUSEDEV=y
894CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 898CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
895CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 899CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
896# CONFIG_INPUT_JOYDEV is not set 900# CONFIG_INPUT_JOYDEV is not set
897# CONFIG_INPUT_EVDEV is not set 901CONFIG_INPUT_EVDEV=m
898# CONFIG_INPUT_EVBUG is not set 902# CONFIG_INPUT_EVBUG is not set
899 903
900# 904#
@@ -1271,7 +1275,7 @@ CONFIG_USB_DEVICEFS=y
1271CONFIG_USB_DEVICE_CLASS=y 1275CONFIG_USB_DEVICE_CLASS=y
1272# CONFIG_USB_DYNAMIC_MINORS is not set 1276# CONFIG_USB_DYNAMIC_MINORS is not set
1273# CONFIG_USB_OTG is not set 1277# CONFIG_USB_OTG is not set
1274CONFIG_USB_MON=y 1278CONFIG_USB_MON=m
1275# CONFIG_USB_WUSB is not set 1279# CONFIG_USB_WUSB is not set
1276# CONFIG_USB_WUSB_CBAF is not set 1280# CONFIG_USB_WUSB_CBAF is not set
1277 1281
@@ -1311,7 +1315,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1311# 1315#
1312# may also be needed; see USB_STORAGE Help for more information 1316# may also be needed; see USB_STORAGE Help for more information
1313# 1317#
1314CONFIG_USB_STORAGE=y 1318CONFIG_USB_STORAGE=m
1315# CONFIG_USB_STORAGE_DEBUG is not set 1319# CONFIG_USB_STORAGE_DEBUG is not set
1316# CONFIG_USB_STORAGE_DATAFAB is not set 1320# CONFIG_USB_STORAGE_DATAFAB is not set
1317# CONFIG_USB_STORAGE_FREECOM is not set 1321# CONFIG_USB_STORAGE_FREECOM is not set
@@ -1322,7 +1326,7 @@ CONFIG_USB_STORAGE=y
1322# CONFIG_USB_STORAGE_SDDR55 is not set 1326# CONFIG_USB_STORAGE_SDDR55 is not set
1323# CONFIG_USB_STORAGE_JUMPSHOT is not set 1327# CONFIG_USB_STORAGE_JUMPSHOT is not set
1324# CONFIG_USB_STORAGE_ALAUDA is not set 1328# CONFIG_USB_STORAGE_ALAUDA is not set
1325CONFIG_USB_STORAGE_ONETOUCH=y 1329# CONFIG_USB_STORAGE_ONETOUCH is not set
1326# CONFIG_USB_STORAGE_KARMA is not set 1330# CONFIG_USB_STORAGE_KARMA is not set
1327# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 1331# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1328# CONFIG_USB_LIBUSUAL is not set 1332# CONFIG_USB_LIBUSUAL is not set
@@ -1377,17 +1381,17 @@ CONFIG_INFINIBAND_USER_MEM=y
1377CONFIG_INFINIBAND_ADDR_TRANS=y 1381CONFIG_INFINIBAND_ADDR_TRANS=y
1378CONFIG_INFINIBAND_MTHCA=m 1382CONFIG_INFINIBAND_MTHCA=m
1379CONFIG_INFINIBAND_MTHCA_DEBUG=y 1383CONFIG_INFINIBAND_MTHCA_DEBUG=y
1380# CONFIG_INFINIBAND_IPATH is not set 1384CONFIG_INFINIBAND_IPATH=m
1381CONFIG_INFINIBAND_EHCA=m 1385CONFIG_INFINIBAND_EHCA=m
1382# CONFIG_INFINIBAND_AMSO1100 is not set 1386# CONFIG_INFINIBAND_AMSO1100 is not set
1383# CONFIG_MLX4_INFINIBAND is not set 1387CONFIG_MLX4_INFINIBAND=m
1384# CONFIG_INFINIBAND_NES is not set 1388# CONFIG_INFINIBAND_NES is not set
1385CONFIG_INFINIBAND_IPOIB=m 1389CONFIG_INFINIBAND_IPOIB=m
1386# CONFIG_INFINIBAND_IPOIB_CM is not set 1390CONFIG_INFINIBAND_IPOIB_CM=y
1387CONFIG_INFINIBAND_IPOIB_DEBUG=y 1391CONFIG_INFINIBAND_IPOIB_DEBUG=y
1388# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set 1392# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
1389CONFIG_INFINIBAND_SRP=m 1393CONFIG_INFINIBAND_SRP=m
1390# CONFIG_INFINIBAND_ISER is not set 1394CONFIG_INFINIBAND_ISER=m
1391# CONFIG_EDAC is not set 1395# CONFIG_EDAC is not set
1392# CONFIG_RTC_CLASS is not set 1396# CONFIG_RTC_CLASS is not set
1393# CONFIG_DMADEVICES is not set 1397# CONFIG_DMADEVICES is not set
@@ -1443,6 +1447,9 @@ CONFIG_OCFS2_FS_STATS=y
1443CONFIG_OCFS2_DEBUG_MASKLOG=y 1447CONFIG_OCFS2_DEBUG_MASKLOG=y
1444# CONFIG_OCFS2_DEBUG_FS is not set 1448# CONFIG_OCFS2_DEBUG_FS is not set
1445# CONFIG_OCFS2_COMPAT_JBD is not set 1449# CONFIG_OCFS2_COMPAT_JBD is not set
1450CONFIG_BTRFS_FS=m
1451CONFIG_BTRFS_FS_POSIX_ACL=y
1452CONFIG_NILFS2_FS=m
1446CONFIG_DNOTIFY=y 1453CONFIG_DNOTIFY=y
1447CONFIG_INOTIFY=y 1454CONFIG_INOTIFY=y
1448CONFIG_INOTIFY_USER=y 1455CONFIG_INOTIFY_USER=y
@@ -1455,8 +1462,8 @@ CONFIG_FUSE_FS=m
1455# CD-ROM/DVD Filesystems 1462# CD-ROM/DVD Filesystems
1456# 1463#
1457CONFIG_ISO9660_FS=y 1464CONFIG_ISO9660_FS=y
1458CONFIG_JOLIET=y 1465# CONFIG_JOLIET is not set
1459CONFIG_ZISOFS=y 1466# CONFIG_ZISOFS is not set
1460CONFIG_UDF_FS=m 1467CONFIG_UDF_FS=m
1461CONFIG_UDF_NLS=y 1468CONFIG_UDF_NLS=y
1462 1469
@@ -1508,14 +1515,14 @@ CONFIG_NFS_FS=y
1508CONFIG_NFS_V3=y 1515CONFIG_NFS_V3=y
1509CONFIG_NFS_V3_ACL=y 1516CONFIG_NFS_V3_ACL=y
1510CONFIG_NFS_V4=y 1517CONFIG_NFS_V4=y
1511CONFIG_NFSD=y 1518CONFIG_NFSD=m
1512CONFIG_NFSD_V2_ACL=y 1519CONFIG_NFSD_V2_ACL=y
1513CONFIG_NFSD_V3=y 1520CONFIG_NFSD_V3=y
1514CONFIG_NFSD_V3_ACL=y 1521CONFIG_NFSD_V3_ACL=y
1515CONFIG_NFSD_V4=y 1522CONFIG_NFSD_V4=y
1516CONFIG_LOCKD=y 1523CONFIG_LOCKD=y
1517CONFIG_LOCKD_V4=y 1524CONFIG_LOCKD_V4=y
1518CONFIG_EXPORTFS=y 1525CONFIG_EXPORTFS=m
1519CONFIG_NFS_ACL_SUPPORT=y 1526CONFIG_NFS_ACL_SUPPORT=y
1520CONFIG_NFS_COMMON=y 1527CONFIG_NFS_COMMON=y
1521CONFIG_SUNRPC=y 1528CONFIG_SUNRPC=y
@@ -1681,12 +1688,12 @@ CONFIG_DYNAMIC_PRINTK_DEBUG=y
1681CONFIG_HAVE_ARCH_KGDB=y 1688CONFIG_HAVE_ARCH_KGDB=y
1682# CONFIG_KGDB is not set 1689# CONFIG_KGDB is not set
1683CONFIG_DEBUG_STACKOVERFLOW=y 1690CONFIG_DEBUG_STACKOVERFLOW=y
1684# CONFIG_DEBUG_STACK_USAGE is not set 1691CONFIG_DEBUG_STACK_USAGE=y
1685# CONFIG_DEBUG_PAGEALLOC is not set 1692# CONFIG_DEBUG_PAGEALLOC is not set
1686# CONFIG_HCALL_STATS is not set 1693# CONFIG_HCALL_STATS is not set
1687# CONFIG_CODE_PATCHING_SELFTEST is not set 1694CONFIG_CODE_PATCHING_SELFTEST=y
1688# CONFIG_FTR_FIXUP_SELFTEST is not set 1695CONFIG_FTR_FIXUP_SELFTEST=y
1689# CONFIG_MSI_BITMAP_SELFTEST is not set 1696CONFIG_MSI_BITMAP_SELFTEST=y
1690CONFIG_XMON=y 1697CONFIG_XMON=y
1691CONFIG_XMON_DEFAULT=y 1698CONFIG_XMON_DEFAULT=y
1692CONFIG_XMON_DISASSEMBLY=y 1699CONFIG_XMON_DISASSEMBLY=y
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index 8f0fe7971949..c1b475a941eb 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -2,6 +2,7 @@
2#define _ASM_POWERPC_ASM_COMPAT_H 2#define _ASM_POWERPC_ASM_COMPAT_H
3 3
4#include <asm/types.h> 4#include <asm/types.h>
5#include <asm/ppc-opcode.h>
5 6
6#ifdef __ASSEMBLY__ 7#ifdef __ASSEMBLY__
7# define stringify_in_c(...) __VA_ARGS__ 8# define stringify_in_c(...) __VA_ARGS__
@@ -24,7 +25,7 @@
24#define PPC_LONG stringify_in_c(.llong) 25#define PPC_LONG stringify_in_c(.llong)
25#define PPC_LONG_ALIGN stringify_in_c(.balign 8) 26#define PPC_LONG_ALIGN stringify_in_c(.balign 8)
26#define PPC_TLNEI stringify_in_c(tdnei) 27#define PPC_TLNEI stringify_in_c(tdnei)
27#define PPC_LLARX stringify_in_c(ldarx) 28#define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh)
28#define PPC_STLCX stringify_in_c(stdcx.) 29#define PPC_STLCX stringify_in_c(stdcx.)
29#define PPC_CNTLZL stringify_in_c(cntlzd) 30#define PPC_CNTLZL stringify_in_c(cntlzd)
30 31
@@ -46,7 +47,7 @@
46#define PPC_LONG stringify_in_c(.long) 47#define PPC_LONG stringify_in_c(.long)
47#define PPC_LONG_ALIGN stringify_in_c(.balign 4) 48#define PPC_LONG_ALIGN stringify_in_c(.balign 4)
48#define PPC_TLNEI stringify_in_c(twnei) 49#define PPC_TLNEI stringify_in_c(twnei)
49#define PPC_LLARX stringify_in_c(lwarx) 50#define PPC_LLARX(t, a, b, eh) PPC_LWARX(t, a, b, eh)
50#define PPC_STLCX stringify_in_c(stwcx.) 51#define PPC_STLCX stringify_in_c(stwcx.)
51#define PPC_CNTLZL stringify_in_c(cntlzw) 52#define PPC_CNTLZL stringify_in_c(cntlzw)
52#define PPC_MTOCRF stringify_in_c(mtcrf) 53#define PPC_MTOCRF stringify_in_c(mtcrf)
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index 4012483b1899..b8f152ece025 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -49,13 +49,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v)
49 int t; 49 int t;
50 50
51 __asm__ __volatile__( 51 __asm__ __volatile__(
52 LWSYNC_ON_SMP 52 PPC_RELEASE_BARRIER
53"1: lwarx %0,0,%2 # atomic_add_return\n\ 53"1: lwarx %0,0,%2 # atomic_add_return\n\
54 add %0,%1,%0\n" 54 add %0,%1,%0\n"
55 PPC405_ERR77(0,%2) 55 PPC405_ERR77(0,%2)
56" stwcx. %0,0,%2 \n\ 56" stwcx. %0,0,%2 \n\
57 bne- 1b" 57 bne- 1b"
58 ISYNC_ON_SMP 58 PPC_ACQUIRE_BARRIER
59 : "=&r" (t) 59 : "=&r" (t)
60 : "r" (a), "r" (&v->counter) 60 : "r" (a), "r" (&v->counter)
61 : "cc", "memory"); 61 : "cc", "memory");
@@ -85,13 +85,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v)
85 int t; 85 int t;
86 86
87 __asm__ __volatile__( 87 __asm__ __volatile__(
88 LWSYNC_ON_SMP 88 PPC_RELEASE_BARRIER
89"1: lwarx %0,0,%2 # atomic_sub_return\n\ 89"1: lwarx %0,0,%2 # atomic_sub_return\n\
90 subf %0,%1,%0\n" 90 subf %0,%1,%0\n"
91 PPC405_ERR77(0,%2) 91 PPC405_ERR77(0,%2)
92" stwcx. %0,0,%2 \n\ 92" stwcx. %0,0,%2 \n\
93 bne- 1b" 93 bne- 1b"
94 ISYNC_ON_SMP 94 PPC_ACQUIRE_BARRIER
95 : "=&r" (t) 95 : "=&r" (t)
96 : "r" (a), "r" (&v->counter) 96 : "r" (a), "r" (&v->counter)
97 : "cc", "memory"); 97 : "cc", "memory");
@@ -119,13 +119,13 @@ static __inline__ int atomic_inc_return(atomic_t *v)
119 int t; 119 int t;
120 120
121 __asm__ __volatile__( 121 __asm__ __volatile__(
122 LWSYNC_ON_SMP 122 PPC_RELEASE_BARRIER
123"1: lwarx %0,0,%1 # atomic_inc_return\n\ 123"1: lwarx %0,0,%1 # atomic_inc_return\n\
124 addic %0,%0,1\n" 124 addic %0,%0,1\n"
125 PPC405_ERR77(0,%1) 125 PPC405_ERR77(0,%1)
126" stwcx. %0,0,%1 \n\ 126" stwcx. %0,0,%1 \n\
127 bne- 1b" 127 bne- 1b"
128 ISYNC_ON_SMP 128 PPC_ACQUIRE_BARRIER
129 : "=&r" (t) 129 : "=&r" (t)
130 : "r" (&v->counter) 130 : "r" (&v->counter)
131 : "cc", "xer", "memory"); 131 : "cc", "xer", "memory");
@@ -163,13 +163,13 @@ static __inline__ int atomic_dec_return(atomic_t *v)
163 int t; 163 int t;
164 164
165 __asm__ __volatile__( 165 __asm__ __volatile__(
166 LWSYNC_ON_SMP 166 PPC_RELEASE_BARRIER
167"1: lwarx %0,0,%1 # atomic_dec_return\n\ 167"1: lwarx %0,0,%1 # atomic_dec_return\n\
168 addic %0,%0,-1\n" 168 addic %0,%0,-1\n"
169 PPC405_ERR77(0,%1) 169 PPC405_ERR77(0,%1)
170" stwcx. %0,0,%1\n\ 170" stwcx. %0,0,%1\n\
171 bne- 1b" 171 bne- 1b"
172 ISYNC_ON_SMP 172 PPC_ACQUIRE_BARRIER
173 : "=&r" (t) 173 : "=&r" (t)
174 : "r" (&v->counter) 174 : "r" (&v->counter)
175 : "cc", "xer", "memory"); 175 : "cc", "xer", "memory");
@@ -194,7 +194,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
194 int t; 194 int t;
195 195
196 __asm__ __volatile__ ( 196 __asm__ __volatile__ (
197 LWSYNC_ON_SMP 197 PPC_RELEASE_BARRIER
198"1: lwarx %0,0,%1 # atomic_add_unless\n\ 198"1: lwarx %0,0,%1 # atomic_add_unless\n\
199 cmpw 0,%0,%3 \n\ 199 cmpw 0,%0,%3 \n\
200 beq- 2f \n\ 200 beq- 2f \n\
@@ -202,7 +202,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
202 PPC405_ERR77(0,%2) 202 PPC405_ERR77(0,%2)
203" stwcx. %0,0,%1 \n\ 203" stwcx. %0,0,%1 \n\
204 bne- 1b \n" 204 bne- 1b \n"
205 ISYNC_ON_SMP 205 PPC_ACQUIRE_BARRIER
206" subf %0,%2,%0 \n\ 206" subf %0,%2,%0 \n\
2072:" 2072:"
208 : "=&r" (t) 208 : "=&r" (t)
@@ -227,7 +227,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
227 int t; 227 int t;
228 228
229 __asm__ __volatile__( 229 __asm__ __volatile__(
230 LWSYNC_ON_SMP 230 PPC_RELEASE_BARRIER
231"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ 231"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
232 cmpwi %0,1\n\ 232 cmpwi %0,1\n\
233 addi %0,%0,-1\n\ 233 addi %0,%0,-1\n\
@@ -235,7 +235,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v)
235 PPC405_ERR77(0,%1) 235 PPC405_ERR77(0,%1)
236" stwcx. %0,0,%1\n\ 236" stwcx. %0,0,%1\n\
237 bne- 1b" 237 bne- 1b"
238 ISYNC_ON_SMP 238 PPC_ACQUIRE_BARRIER
239 "\n\ 239 "\n\
2402:" : "=&b" (t) 2402:" : "=&b" (t)
241 : "r" (&v->counter) 241 : "r" (&v->counter)
@@ -286,12 +286,12 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v)
286 long t; 286 long t;
287 287
288 __asm__ __volatile__( 288 __asm__ __volatile__(
289 LWSYNC_ON_SMP 289 PPC_RELEASE_BARRIER
290"1: ldarx %0,0,%2 # atomic64_add_return\n\ 290"1: ldarx %0,0,%2 # atomic64_add_return\n\
291 add %0,%1,%0\n\ 291 add %0,%1,%0\n\
292 stdcx. %0,0,%2 \n\ 292 stdcx. %0,0,%2 \n\
293 bne- 1b" 293 bne- 1b"
294 ISYNC_ON_SMP 294 PPC_ACQUIRE_BARRIER
295 : "=&r" (t) 295 : "=&r" (t)
296 : "r" (a), "r" (&v->counter) 296 : "r" (a), "r" (&v->counter)
297 : "cc", "memory"); 297 : "cc", "memory");
@@ -320,12 +320,12 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v)
320 long t; 320 long t;
321 321
322 __asm__ __volatile__( 322 __asm__ __volatile__(
323 LWSYNC_ON_SMP 323 PPC_RELEASE_BARRIER
324"1: ldarx %0,0,%2 # atomic64_sub_return\n\ 324"1: ldarx %0,0,%2 # atomic64_sub_return\n\
325 subf %0,%1,%0\n\ 325 subf %0,%1,%0\n\
326 stdcx. %0,0,%2 \n\ 326 stdcx. %0,0,%2 \n\
327 bne- 1b" 327 bne- 1b"
328 ISYNC_ON_SMP 328 PPC_ACQUIRE_BARRIER
329 : "=&r" (t) 329 : "=&r" (t)
330 : "r" (a), "r" (&v->counter) 330 : "r" (a), "r" (&v->counter)
331 : "cc", "memory"); 331 : "cc", "memory");
@@ -352,12 +352,12 @@ static __inline__ long atomic64_inc_return(atomic64_t *v)
352 long t; 352 long t;
353 353
354 __asm__ __volatile__( 354 __asm__ __volatile__(
355 LWSYNC_ON_SMP 355 PPC_RELEASE_BARRIER
356"1: ldarx %0,0,%1 # atomic64_inc_return\n\ 356"1: ldarx %0,0,%1 # atomic64_inc_return\n\
357 addic %0,%0,1\n\ 357 addic %0,%0,1\n\
358 stdcx. %0,0,%1 \n\ 358 stdcx. %0,0,%1 \n\
359 bne- 1b" 359 bne- 1b"
360 ISYNC_ON_SMP 360 PPC_ACQUIRE_BARRIER
361 : "=&r" (t) 361 : "=&r" (t)
362 : "r" (&v->counter) 362 : "r" (&v->counter)
363 : "cc", "xer", "memory"); 363 : "cc", "xer", "memory");
@@ -394,12 +394,12 @@ static __inline__ long atomic64_dec_return(atomic64_t *v)
394 long t; 394 long t;
395 395
396 __asm__ __volatile__( 396 __asm__ __volatile__(
397 LWSYNC_ON_SMP 397 PPC_RELEASE_BARRIER
398"1: ldarx %0,0,%1 # atomic64_dec_return\n\ 398"1: ldarx %0,0,%1 # atomic64_dec_return\n\
399 addic %0,%0,-1\n\ 399 addic %0,%0,-1\n\
400 stdcx. %0,0,%1\n\ 400 stdcx. %0,0,%1\n\
401 bne- 1b" 401 bne- 1b"
402 ISYNC_ON_SMP 402 PPC_ACQUIRE_BARRIER
403 : "=&r" (t) 403 : "=&r" (t)
404 : "r" (&v->counter) 404 : "r" (&v->counter)
405 : "cc", "xer", "memory"); 405 : "cc", "xer", "memory");
@@ -419,13 +419,13 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
419 long t; 419 long t;
420 420
421 __asm__ __volatile__( 421 __asm__ __volatile__(
422 LWSYNC_ON_SMP 422 PPC_RELEASE_BARRIER
423"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ 423"1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\
424 addic. %0,%0,-1\n\ 424 addic. %0,%0,-1\n\
425 blt- 2f\n\ 425 blt- 2f\n\
426 stdcx. %0,0,%1\n\ 426 stdcx. %0,0,%1\n\
427 bne- 1b" 427 bne- 1b"
428 ISYNC_ON_SMP 428 PPC_ACQUIRE_BARRIER
429 "\n\ 429 "\n\
4302:" : "=&r" (t) 4302:" : "=&r" (t)
431 : "r" (&v->counter) 431 : "r" (&v->counter)
@@ -451,14 +451,14 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
451 long t; 451 long t;
452 452
453 __asm__ __volatile__ ( 453 __asm__ __volatile__ (
454 LWSYNC_ON_SMP 454 PPC_RELEASE_BARRIER
455"1: ldarx %0,0,%1 # atomic_add_unless\n\ 455"1: ldarx %0,0,%1 # atomic_add_unless\n\
456 cmpd 0,%0,%3 \n\ 456 cmpd 0,%0,%3 \n\
457 beq- 2f \n\ 457 beq- 2f \n\
458 add %0,%2,%0 \n" 458 add %0,%2,%0 \n"
459" stdcx. %0,0,%1 \n\ 459" stdcx. %0,0,%1 \n\
460 bne- 1b \n" 460 bne- 1b \n"
461 ISYNC_ON_SMP 461 PPC_ACQUIRE_BARRIER
462" subf %0,%2,%0 \n\ 462" subf %0,%2,%0 \n\
4632:" 4632:"
464 : "=&r" (t) 464 : "=&r" (t)
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index 56f2f2ea5631..30964ae2d096 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -65,7 +65,7 @@ static __inline__ void fn(unsigned long mask, \
65 unsigned long *p = (unsigned long *)_p; \ 65 unsigned long *p = (unsigned long *)_p; \
66 __asm__ __volatile__ ( \ 66 __asm__ __volatile__ ( \
67 prefix \ 67 prefix \
68"1:" PPC_LLARX "%0,0,%3\n" \ 68"1:" PPC_LLARX(%0,0,%3,0) "\n" \
69 stringify_in_c(op) "%0,%0,%2\n" \ 69 stringify_in_c(op) "%0,%0,%2\n" \
70 PPC405_ERR77(0,%3) \ 70 PPC405_ERR77(0,%3) \
71 PPC_STLCX "%0,0,%3\n" \ 71 PPC_STLCX "%0,0,%3\n" \
@@ -78,7 +78,7 @@ static __inline__ void fn(unsigned long mask, \
78 78
79DEFINE_BITOP(set_bits, or, "", "") 79DEFINE_BITOP(set_bits, or, "", "")
80DEFINE_BITOP(clear_bits, andc, "", "") 80DEFINE_BITOP(clear_bits, andc, "", "")
81DEFINE_BITOP(clear_bits_unlock, andc, LWSYNC_ON_SMP, "") 81DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "")
82DEFINE_BITOP(change_bits, xor, "", "") 82DEFINE_BITOP(change_bits, xor, "", "")
83 83
84static __inline__ void set_bit(int nr, volatile unsigned long *addr) 84static __inline__ void set_bit(int nr, volatile unsigned long *addr)
@@ -103,31 +103,35 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr)
103 103
104/* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output 104/* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output
105 * operands. */ 105 * operands. */
106#define DEFINE_TESTOP(fn, op, prefix, postfix) \ 106#define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
107static __inline__ unsigned long fn( \ 107static __inline__ unsigned long fn( \
108 unsigned long mask, \ 108 unsigned long mask, \
109 volatile unsigned long *_p) \ 109 volatile unsigned long *_p) \
110{ \ 110{ \
111 unsigned long old, t; \ 111 unsigned long old, t; \
112 unsigned long *p = (unsigned long *)_p; \ 112 unsigned long *p = (unsigned long *)_p; \
113 __asm__ __volatile__ ( \ 113 __asm__ __volatile__ ( \
114 prefix \ 114 prefix \
115"1:" PPC_LLARX "%0,0,%3\n" \ 115"1:" PPC_LLARX(%0,0,%3,eh) "\n" \
116 stringify_in_c(op) "%1,%0,%2\n" \ 116 stringify_in_c(op) "%1,%0,%2\n" \
117 PPC405_ERR77(0,%3) \ 117 PPC405_ERR77(0,%3) \
118 PPC_STLCX "%1,0,%3\n" \ 118 PPC_STLCX "%1,0,%3\n" \
119 "bne- 1b\n" \ 119 "bne- 1b\n" \
120 postfix \ 120 postfix \
121 : "=&r" (old), "=&r" (t) \ 121 : "=&r" (old), "=&r" (t) \
122 : "r" (mask), "r" (p) \ 122 : "r" (mask), "r" (p) \
123 : "cc", "memory"); \ 123 : "cc", "memory"); \
124 return (old & mask); \ 124 return (old & mask); \
125} 125}
126 126
127DEFINE_TESTOP(test_and_set_bits, or, LWSYNC_ON_SMP, ISYNC_ON_SMP) 127DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER,
128DEFINE_TESTOP(test_and_set_bits_lock, or, "", ISYNC_ON_SMP) 128 PPC_ACQUIRE_BARRIER, 0)
129DEFINE_TESTOP(test_and_clear_bits, andc, LWSYNC_ON_SMP, ISYNC_ON_SMP) 129DEFINE_TESTOP(test_and_set_bits_lock, or, "",
130DEFINE_TESTOP(test_and_change_bits, xor, LWSYNC_ON_SMP, ISYNC_ON_SMP) 130 PPC_ACQUIRE_BARRIER, 1)
131DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER,
132 PPC_ACQUIRE_BARRIER, 0)
133DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER,
134 PPC_ACQUIRE_BARRIER, 0)
131 135
132static __inline__ int test_and_set_bit(unsigned long nr, 136static __inline__ int test_and_set_bit(unsigned long nr,
133 volatile unsigned long *addr) 137 volatile unsigned long *addr)
@@ -158,7 +162,7 @@ static __inline__ int test_and_change_bit(unsigned long nr,
158 162
159static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) 163static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
160{ 164{
161 __asm__ __volatile__(LWSYNC_ON_SMP "" ::: "memory"); 165 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
162 __clear_bit(nr, addr); 166 __clear_bit(nr, addr);
163} 167}
164 168
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 80f315e8a421..abb833b0e58f 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -381,9 +381,9 @@ extern const char *powerpc_base_platform;
381#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) 381#define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
382 382
383/* 64-bit CPUs */ 383/* 64-bit CPUs */
384#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 384#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \
385 CPU_FTR_IABR | CPU_FTR_PPC_LE) 385 CPU_FTR_IABR | CPU_FTR_PPC_LE)
386#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 386#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | \
387 CPU_FTR_IABR | \ 387 CPU_FTR_IABR | \
388 CPU_FTR_MMCRA | CPU_FTR_CTRL) 388 CPU_FTR_MMCRA | CPU_FTR_CTRL)
389#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ 389#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index fa19f3fe05ff..8bdc6a9e5773 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -73,10 +73,9 @@ static inline unsigned long cputime_to_jiffies(const cputime_t ct)
73static inline cputime_t cputime_to_scaled(const cputime_t ct) 73static inline cputime_t cputime_to_scaled(const cputime_t ct)
74{ 74{
75 if (cpu_has_feature(CPU_FTR_SPURR) && 75 if (cpu_has_feature(CPU_FTR_SPURR) &&
76 per_cpu(cputime_last_delta, smp_processor_id())) 76 __get_cpu_var(cputime_last_delta))
77 return ct * 77 return ct * __get_cpu_var(cputime_scaled_last_delta) /
78 per_cpu(cputime_scaled_last_delta, smp_processor_id())/ 78 __get_cpu_var(cputime_last_delta);
79 per_cpu(cputime_last_delta, smp_processor_id());
80 return ct; 79 return ct;
81} 80}
82 81
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index cbd4dfa4bce2..96a7d067fbb2 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -165,7 +165,7 @@ label##2: \
165 .pushsection sect,"a"; \ 165 .pushsection sect,"a"; \
166 .align 2; \ 166 .align 2; \
167label##3: \ 167label##3: \
168 .long label##1b-label##3b; \ 168 FTR_ENTRY_OFFSET label##1b-label##3b; \
169 .popsection; 169 .popsection;
170 170
171#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ 171#endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 9696cc36d2dc..7c589ef81fb0 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -11,7 +11,7 @@
11 11
12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ 12#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13 __asm__ __volatile ( \ 13 __asm__ __volatile ( \
14 LWSYNC_ON_SMP \ 14 PPC_RELEASE_BARRIER \
15"1: lwarx %0,0,%2\n" \ 15"1: lwarx %0,0,%2\n" \
16 insn \ 16 insn \
17 PPC405_ERR77(0, %2) \ 17 PPC405_ERR77(0, %2) \
@@ -90,14 +90,14 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
90 return -EFAULT; 90 return -EFAULT;
91 91
92 __asm__ __volatile__ ( 92 __asm__ __volatile__ (
93 LWSYNC_ON_SMP 93 PPC_RELEASE_BARRIER
94"1: lwarx %0,0,%2 # futex_atomic_cmpxchg_inatomic\n\ 94"1: lwarx %0,0,%2 # futex_atomic_cmpxchg_inatomic\n\
95 cmpw 0,%0,%3\n\ 95 cmpw 0,%0,%3\n\
96 bne- 3f\n" 96 bne- 3f\n"
97 PPC405_ERR77(0,%2) 97 PPC405_ERR77(0,%2)
98"2: stwcx. %4,0,%2\n\ 98"2: stwcx. %4,0,%2\n\
99 bne- 1b\n" 99 bne- 1b\n"
100 ISYNC_ON_SMP 100 PPC_ACQUIRE_BARRIER
101"3: .section .fixup,\"ax\"\n\ 101"3: .section .fixup,\"ax\"\n\
1024: li %0,%5\n\ 1024: li %0,%5\n\
103 b 3b\n\ 103 b 3b\n\
diff --git a/arch/powerpc/include/asm/hardirq.h b/arch/powerpc/include/asm/hardirq.h
index fb3c05a0cbbf..3147a2970125 100644
--- a/arch/powerpc/include/asm/hardirq.h
+++ b/arch/powerpc/include/asm/hardirq.h
@@ -1 +1,29 @@
1#include <asm-generic/hardirq.h> 1#ifndef _ASM_POWERPC_HARDIRQ_H
2#define _ASM_POWERPC_HARDIRQ_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7typedef struct {
8 unsigned int __softirq_pending;
9 unsigned int timer_irqs;
10 unsigned int pmu_irqs;
11 unsigned int mce_exceptions;
12 unsigned int spurious_irqs;
13} ____cacheline_aligned irq_cpustat_t;
14
15DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
16
17#define __ARCH_IRQ_STAT
18
19#define local_softirq_pending() __get_cpu_var(irq_stat).__softirq_pending
20
21static inline void ack_bad_irq(unsigned int irq)
22{
23 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq);
24}
25
26extern u64 arch_irq_stat_cpu(unsigned int cpu);
27#define arch_irq_stat_cpu arch_irq_stat_cpu
28
29#endif /* _ASM_POWERPC_HARDIRQ_H */
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h
index 84b457a3c1bc..ce58c80e1bcf 100644
--- a/arch/powerpc/include/asm/local.h
+++ b/arch/powerpc/include/asm/local.h
@@ -24,7 +24,7 @@ static __inline__ long local_add_return(long a, local_t *l)
24 long t; 24 long t;
25 25
26 __asm__ __volatile__( 26 __asm__ __volatile__(
27"1:" PPC_LLARX "%0,0,%2 # local_add_return\n\ 27"1:" PPC_LLARX(%0,0,%2,0) " # local_add_return\n\
28 add %0,%1,%0\n" 28 add %0,%1,%0\n"
29 PPC405_ERR77(0,%2) 29 PPC405_ERR77(0,%2)
30 PPC_STLCX "%0,0,%2 \n\ 30 PPC_STLCX "%0,0,%2 \n\
@@ -43,7 +43,7 @@ static __inline__ long local_sub_return(long a, local_t *l)
43 long t; 43 long t;
44 44
45 __asm__ __volatile__( 45 __asm__ __volatile__(
46"1:" PPC_LLARX "%0,0,%2 # local_sub_return\n\ 46"1:" PPC_LLARX(%0,0,%2,0) " # local_sub_return\n\
47 subf %0,%1,%0\n" 47 subf %0,%1,%0\n"
48 PPC405_ERR77(0,%2) 48 PPC405_ERR77(0,%2)
49 PPC_STLCX "%0,0,%2 \n\ 49 PPC_STLCX "%0,0,%2 \n\
@@ -60,7 +60,7 @@ static __inline__ long local_inc_return(local_t *l)
60 long t; 60 long t;
61 61
62 __asm__ __volatile__( 62 __asm__ __volatile__(
63"1:" PPC_LLARX "%0,0,%1 # local_inc_return\n\ 63"1:" PPC_LLARX(%0,0,%1,0) " # local_inc_return\n\
64 addic %0,%0,1\n" 64 addic %0,%0,1\n"
65 PPC405_ERR77(0,%1) 65 PPC405_ERR77(0,%1)
66 PPC_STLCX "%0,0,%1 \n\ 66 PPC_STLCX "%0,0,%1 \n\
@@ -87,7 +87,7 @@ static __inline__ long local_dec_return(local_t *l)
87 long t; 87 long t;
88 88
89 __asm__ __volatile__( 89 __asm__ __volatile__(
90"1:" PPC_LLARX "%0,0,%1 # local_dec_return\n\ 90"1:" PPC_LLARX(%0,0,%1,0) " # local_dec_return\n\
91 addic %0,%0,-1\n" 91 addic %0,%0,-1\n"
92 PPC405_ERR77(0,%1) 92 PPC405_ERR77(0,%1)
93 PPC_STLCX "%0,0,%1\n\ 93 PPC_STLCX "%0,0,%1\n\
@@ -117,7 +117,7 @@ static __inline__ int local_add_unless(local_t *l, long a, long u)
117 long t; 117 long t;
118 118
119 __asm__ __volatile__ ( 119 __asm__ __volatile__ (
120"1:" PPC_LLARX "%0,0,%1 # local_add_unless\n\ 120"1:" PPC_LLARX(%0,0,%1,0) " # local_add_unless\n\
121 cmpw 0,%0,%3 \n\ 121 cmpw 0,%0,%3 \n\
122 beq- 2f \n\ 122 beq- 2f \n\
123 add %0,%2,%0 \n" 123 add %0,%2,%0 \n"
@@ -147,7 +147,7 @@ static __inline__ long local_dec_if_positive(local_t *l)
147 long t; 147 long t;
148 148
149 __asm__ __volatile__( 149 __asm__ __volatile__(
150"1:" PPC_LLARX "%0,0,%1 # local_dec_if_positive\n\ 150"1:" PPC_LLARX(%0,0,%1,0) " # local_dec_if_positive\n\
151 cmpwi %0,1\n\ 151 cmpwi %0,1\n\
152 addi %0,%0,-1\n\ 152 addi %0,%0,-1\n\
153 blt- 2f\n" 153 blt- 2f\n"
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h
new file mode 100644
index 000000000000..e6a30bb1d16a
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -0,0 +1,24 @@
1/*
2 * MPC5121 Prototypes and definitions
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2.
6 */
7
8#ifndef __ASM_POWERPC_MPC5121_H__
9#define __ASM_POWERPC_MPC5121_H__
10
11/* MPC512x Reset module registers */
12struct mpc512x_reset_module {
13 u32 rcwlr; /* Reset Configuration Word Low Register */
14 u32 rcwhr; /* Reset Configuration Word High Register */
15 u32 reserved1;
16 u32 reserved2;
17 u32 rsr; /* Reset Status Register */
18 u32 rmr; /* Reset Mode Register */
19 u32 rpr; /* Reset Protection Register */
20 u32 rcr; /* Reset Control Register */
21 u32 rcer; /* Reset Control Enable Register */
22};
23
24#endif /* __ASM_POWERPC_MPC5121_H__ */
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h
index fb8412057450..42561f4f032d 100644
--- a/arch/powerpc/include/asm/mpc52xx_psc.h
+++ b/arch/powerpc/include/asm/mpc52xx_psc.h
@@ -25,7 +25,11 @@
25#include <asm/types.h> 25#include <asm/types.h>
26 26
27/* Max number of PSCs */ 27/* Max number of PSCs */
28#ifdef CONFIG_PPC_MPC512x
29#define MPC52xx_PSC_MAXNUM 12
30#else
28#define MPC52xx_PSC_MAXNUM 6 31#define MPC52xx_PSC_MAXNUM 6
32#endif
29 33
30/* Programmable Serial Controller (PSC) status register bits */ 34/* Programmable Serial Controller (PSC) status register bits */
31#define MPC52xx_PSC_SR_UNEX_RX 0x0001 35#define MPC52xx_PSC_SR_UNEX_RX 0x0001
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index a002682f3a6d..61913d9a21a0 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -289,7 +289,7 @@ struct mpic
289#ifdef CONFIG_MPIC_U3_HT_IRQS 289#ifdef CONFIG_MPIC_U3_HT_IRQS
290 /* The fixup table */ 290 /* The fixup table */
291 struct mpic_irq_fixup *fixups; 291 struct mpic_irq_fixup *fixups;
292 spinlock_t fixup_lock; 292 raw_spinlock_t fixup_lock;
293#endif 293#endif
294 294
295 /* Register access method */ 295 /* Register access method */
diff --git a/arch/powerpc/include/asm/mutex.h b/arch/powerpc/include/asm/mutex.h
index dabc01c727b8..5399f7e18102 100644
--- a/arch/powerpc/include/asm/mutex.h
+++ b/arch/powerpc/include/asm/mutex.h
@@ -15,7 +15,7 @@ static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
15 PPC405_ERR77(0,%1) 15 PPC405_ERR77(0,%1)
16" stwcx. %3,0,%1\n\ 16" stwcx. %3,0,%1\n\
17 bne- 1b" 17 bne- 1b"
18 ISYNC_ON_SMP 18 PPC_ACQUIRE_BARRIER
19 "\n\ 19 "\n\
202:" 202:"
21 : "=&r" (t) 21 : "=&r" (t)
@@ -35,7 +35,7 @@ static inline int __mutex_dec_return_lock(atomic_t *v)
35 PPC405_ERR77(0,%1) 35 PPC405_ERR77(0,%1)
36" stwcx. %0,0,%1\n\ 36" stwcx. %0,0,%1\n\
37 bne- 1b" 37 bne- 1b"
38 ISYNC_ON_SMP 38 PPC_ACQUIRE_BARRIER
39 : "=&r" (t) 39 : "=&r" (t)
40 : "r" (&v->counter) 40 : "r" (&v->counter)
41 : "cc", "memory"); 41 : "cc", "memory");
@@ -48,7 +48,7 @@ static inline int __mutex_inc_return_unlock(atomic_t *v)
48 int t; 48 int t;
49 49
50 __asm__ __volatile__( 50 __asm__ __volatile__(
51 LWSYNC_ON_SMP 51 PPC_RELEASE_BARRIER
52"1: lwarx %0,0,%1 # mutex unlock\n\ 52"1: lwarx %0,0,%1 # mutex unlock\n\
53 addic %0,%0,1\n" 53 addic %0,%0,1\n"
54 PPC405_ERR77(0,%1) 54 PPC405_ERR77(0,%1)
diff --git a/arch/powerpc/include/asm/param.h b/arch/powerpc/include/asm/param.h
index 094f63d4d5ca..965d45427975 100644
--- a/arch/powerpc/include/asm/param.h
+++ b/arch/powerpc/include/asm/param.h
@@ -1,22 +1 @@
1#ifndef _ASM_POWERPC_PARAM_H #include <asm-generic/param.h>
2#define _ASM_POWERPC_PARAM_H
3
4#ifdef __KERNEL__
5#define HZ CONFIG_HZ /* internal kernel timer frequency */
6#define USER_HZ 100 /* for user interfaces in "ticks" */
7#define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
8#endif /* __KERNEL__ */
9
10#ifndef HZ
11#define HZ 100
12#endif
13
14#define EXEC_PAGESIZE 4096
15
16#ifndef NOGROUP
17#define NOGROUP (-1)
18#endif
19
20#define MAXHOSTNAMELEN 64 /* max length of hostname */
21
22#endif /* _ASM_POWERPC_PARAM_H */
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h
index 877c35a4356e..00eedc5a4e61 100644
--- a/arch/powerpc/include/asm/pmac_feature.h
+++ b/arch/powerpc/include/asm/pmac_feature.h
@@ -378,7 +378,7 @@ extern struct macio_chip* macio_find(struct device_node* child, int type);
378 * Those are exported by pmac feature for internal use by arch code 378 * Those are exported by pmac feature for internal use by arch code
379 * only like the platform function callbacks, do not use directly in drivers 379 * only like the platform function callbacks, do not use directly in drivers
380 */ 380 */
381extern spinlock_t feature_lock; 381extern raw_spinlock_t feature_lock;
382extern struct device_node *uninorth_node; 382extern struct device_node *uninorth_node;
383extern u32 __iomem *uninorth_base; 383extern u32 __iomem *uninorth_base;
384 384
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index ef9aa84cac5a..aea714797590 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -22,8 +22,10 @@
22#define PPC_INST_DCBZL 0x7c2007ec 22#define PPC_INST_DCBZL 0x7c2007ec
23#define PPC_INST_ISEL 0x7c00001e 23#define PPC_INST_ISEL 0x7c00001e
24#define PPC_INST_ISEL_MASK 0xfc00003e 24#define PPC_INST_ISEL_MASK 0xfc00003e
25#define PPC_INST_LDARX 0x7c0000a8
25#define PPC_INST_LSWI 0x7c0004aa 26#define PPC_INST_LSWI 0x7c0004aa
26#define PPC_INST_LSWX 0x7c00042a 27#define PPC_INST_LSWX 0x7c00042a
28#define PPC_INST_LWARX 0x7c000029
27#define PPC_INST_LWSYNC 0x7c2004ac 29#define PPC_INST_LWSYNC 0x7c2004ac
28#define PPC_INST_LXVD2X 0x7c000698 30#define PPC_INST_LXVD2X 0x7c000698
29#define PPC_INST_MCRXR 0x7c000400 31#define PPC_INST_MCRXR 0x7c000400
@@ -55,15 +57,31 @@
55#define __PPC_RA(a) (((a) & 0x1f) << 16) 57#define __PPC_RA(a) (((a) & 0x1f) << 16)
56#define __PPC_RB(b) (((b) & 0x1f) << 11) 58#define __PPC_RB(b) (((b) & 0x1f) << 11)
57#define __PPC_RS(s) (((s) & 0x1f) << 21) 59#define __PPC_RS(s) (((s) & 0x1f) << 21)
60#define __PPC_RT(s) __PPC_RS(s)
58#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) 61#define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
59#define __PPC_T_TLB(t) (((t) & 0x3) << 21) 62#define __PPC_T_TLB(t) (((t) & 0x3) << 21)
60#define __PPC_WC(w) (((w) & 0x3) << 21) 63#define __PPC_WC(w) (((w) & 0x3) << 21)
64/*
65 * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have
66 * any side effects on all 32bit processors, we can do this all the time.
67 */
68#ifdef CONFIG_PPC64
69#define __PPC_EH(eh) (((eh) & 0x1) << 0)
70#else
71#define __PPC_EH(eh) 0
72#endif
61 73
62/* Deal with instructions that older assemblers aren't aware of */ 74/* Deal with instructions that older assemblers aren't aware of */
63#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ 75#define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \
64 __PPC_RA(a) | __PPC_RB(b)) 76 __PPC_RA(a) | __PPC_RB(b))
65#define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ 77#define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \
66 __PPC_RA(a) | __PPC_RB(b)) 78 __PPC_RA(a) | __PPC_RB(b))
79#define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \
80 __PPC_RT(t) | __PPC_RA(a) | \
81 __PPC_RB(b) | __PPC_EH(eh))
82#define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \
83 __PPC_RT(t) | __PPC_RA(a) | \
84 __PPC_RB(b) | __PPC_EH(eh))
67#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ 85#define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \
68 __PPC_RB(b)) 86 __PPC_RB(b))
69#define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) 87#define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI)
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index 2828f9d0f66d..42fdff0e4b32 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -137,6 +137,11 @@ struct device_node * find_device_pe(struct device_node *dn);
137void eeh_sysfs_add_device(struct pci_dev *pdev); 137void eeh_sysfs_add_device(struct pci_dev *pdev);
138void eeh_sysfs_remove_device(struct pci_dev *pdev); 138void eeh_sysfs_remove_device(struct pci_dev *pdev);
139 139
140static inline const char *eeh_pci_name(struct pci_dev *pdev)
141{
142 return pdev ? pci_name(pdev) : "<null>";
143}
144
140#endif /* CONFIG_EEH */ 145#endif /* CONFIG_EEH */
141 146
142#else /* CONFIG_PCI */ 147#else /* CONFIG_PCI */
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 9eed29eee604..221ba6240464 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -161,9 +161,41 @@ struct thread_struct {
161#ifdef CONFIG_PPC32 161#ifdef CONFIG_PPC32
162 void *pgdir; /* root of page-table tree */ 162 void *pgdir; /* root of page-table tree */
163#endif 163#endif
164#if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) 164#ifdef CONFIG_PPC_ADV_DEBUG_REGS
165 unsigned long dbcr0; /* debug control register values */ 165 /*
166 * The following help to manage the use of Debug Control Registers
167 * om the BookE platforms.
168 */
169 unsigned long dbcr0;
166 unsigned long dbcr1; 170 unsigned long dbcr1;
171#ifdef CONFIG_BOOKE
172 unsigned long dbcr2;
173#endif
174 /*
175 * The stored value of the DBSR register will be the value at the
176 * last debug interrupt. This register can only be read from the
177 * user (will never be written to) and has value while helping to
178 * describe the reason for the last debug trap. Torez
179 */
180 unsigned long dbsr;
181 /*
182 * The following will contain addresses used by debug applications
183 * to help trace and trap on particular address locations.
184 * The bits in the Debug Control Registers above help define which
185 * of the following registers will contain valid data and/or addresses.
186 */
187 unsigned long iac1;
188 unsigned long iac2;
189#if CONFIG_PPC_ADV_DEBUG_IACS > 2
190 unsigned long iac3;
191 unsigned long iac4;
192#endif
193 unsigned long dac1;
194 unsigned long dac2;
195#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
196 unsigned long dvc1;
197 unsigned long dvc2;
198#endif
167#endif 199#endif
168 /* FP and VSX 0-31 register set */ 200 /* FP and VSX 0-31 register set */
169 double fpr[32][TS_FPRWIDTH]; 201 double fpr[32][TS_FPRWIDTH];
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index cbd759e3cd78..b45108126562 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -24,6 +24,12 @@
24 * 2 of the License, or (at your option) any later version. 24 * 2 of the License, or (at your option) any later version.
25 */ 25 */
26 26
27#ifdef __KERNEL__
28#include <linux/types.h>
29#else
30#include <stdint.h>
31#endif
32
27#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
28 34
29struct pt_regs { 35struct pt_regs {
@@ -294,4 +300,75 @@ extern void user_disable_single_step(struct task_struct *);
294 300
295#define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */ 301#define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */
296 302
303#define PPC_PTRACE_GETHWDBGINFO 0x89
304#define PPC_PTRACE_SETHWDEBUG 0x88
305#define PPC_PTRACE_DELHWDEBUG 0x87
306
307#ifndef __ASSEMBLY__
308
309struct ppc_debug_info {
310 uint32_t version; /* Only version 1 exists to date */
311 uint32_t num_instruction_bps;
312 uint32_t num_data_bps;
313 uint32_t num_condition_regs;
314 uint32_t data_bp_alignment;
315 uint32_t sizeof_condition; /* size of the DVC register */
316 uint64_t features;
317};
318
319#endif /* __ASSEMBLY__ */
320
321/*
322 * features will have bits indication whether there is support for:
323 */
324#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x0000000000000001
325#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002
326#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004
327#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008
328
329#ifndef __ASSEMBLY__
330
331struct ppc_hw_breakpoint {
332 uint32_t version; /* currently, version must be 1 */
333 uint32_t trigger_type; /* only some combinations allowed */
334 uint32_t addr_mode; /* address match mode */
335 uint32_t condition_mode; /* break/watchpoint condition flags */
336 uint64_t addr; /* break/watchpoint address */
337 uint64_t addr2; /* range end or mask */
338 uint64_t condition_value; /* contents of the DVC register */
339};
340
341#endif /* __ASSEMBLY__ */
342
343/*
344 * Trigger Type
345 */
346#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x00000001
347#define PPC_BREAKPOINT_TRIGGER_READ 0x00000002
348#define PPC_BREAKPOINT_TRIGGER_WRITE 0x00000004
349#define PPC_BREAKPOINT_TRIGGER_RW \
350 (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE)
351
352/*
353 * Address Mode
354 */
355#define PPC_BREAKPOINT_MODE_EXACT 0x00000000
356#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x00000001
357#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x00000002
358#define PPC_BREAKPOINT_MODE_MASK 0x00000003
359
360/*
361 * Condition Mode
362 */
363#define PPC_BREAKPOINT_CONDITION_MODE 0x00000003
364#define PPC_BREAKPOINT_CONDITION_NONE 0x00000000
365#define PPC_BREAKPOINT_CONDITION_AND 0x00000001
366#define PPC_BREAKPOINT_CONDITION_EXACT PPC_BREAKPOINT_CONDITION_AND
367#define PPC_BREAKPOINT_CONDITION_OR 0x00000002
368#define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003
369#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000
370#define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16
371#define PPC_BREAKPOINT_CONDITION_BE(n) \
372 (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT))
373
297#endif /* _ASM_POWERPC_PTRACE_H */ 374#endif /* _ASM_POWERPC_PTRACE_H */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 3bf783505528..8808d307fe7e 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -248,6 +248,8 @@
248#define DBSR_RET 0x00008000 /* Return Debug Event */ 248#define DBSR_RET 0x00008000 /* Return Debug Event */
249#define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */ 249#define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */
250#define DBSR_CRET 0x00000020 /* Critical Return Debug Event */ 250#define DBSR_CRET 0x00000020 /* Critical Return Debug Event */
251#define DBSR_IAC12ATS 0x00000002 /* Instr Address Compare 1/2 Toggle */
252#define DBSR_IAC34ATS 0x00000001 /* Instr Address Compare 3/4 Toggle */
251#endif 253#endif
252#ifdef CONFIG_40x 254#ifdef CONFIG_40x
253#define DBSR_IC 0x80000000 /* Instruction Completion */ 255#define DBSR_IC 0x80000000 /* Instruction Completion */
@@ -313,6 +315,38 @@
313#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */ 315#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */
314#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */ 316#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */
315#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ 317#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
318
319#define dbcr_iac_range(task) ((task)->thread.dbcr0)
320#define DBCR_IAC12I DBCR0_IA12 /* Range Inclusive */
321#define DBCR_IAC12X (DBCR0_IA12 | DBCR0_IA12X) /* Range Exclusive */
322#define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X) /* IAC 1-2 Mode Bits */
323#define DBCR_IAC34I DBCR0_IA34 /* Range Inclusive */
324#define DBCR_IAC34X (DBCR0_IA34 | DBCR0_IA34X) /* Range Exclusive */
325#define DBCR_IAC34MODE (DBCR0_IA34 | DBCR0_IA34X) /* IAC 3-4 Mode Bits */
326
327/* Bit definitions related to the DBCR1. */
328#define DBCR1_DAC1R 0x80000000 /* DAC1 Read Debug Event */
329#define DBCR1_DAC2R 0x40000000 /* DAC2 Read Debug Event */
330#define DBCR1_DAC1W 0x20000000 /* DAC1 Write Debug Event */
331#define DBCR1_DAC2W 0x10000000 /* DAC2 Write Debug Event */
332
333#define dbcr_dac(task) ((task)->thread.dbcr1)
334#define DBCR_DAC1R DBCR1_DAC1R
335#define DBCR_DAC1W DBCR1_DAC1W
336#define DBCR_DAC2R DBCR1_DAC2R
337#define DBCR_DAC2W DBCR1_DAC2W
338
339/*
340 * Are there any active Debug Events represented in the
341 * Debug Control Registers?
342 */
343#define DBCR0_ACTIVE_EVENTS (DBCR0_ICMP | DBCR0_IAC1 | DBCR0_IAC2 | \
344 DBCR0_IAC3 | DBCR0_IAC4)
345#define DBCR1_ACTIVE_EVENTS (DBCR1_DAC1R | DBCR1_DAC2R | \
346 DBCR1_DAC1W | DBCR1_DAC2W)
347#define DBCR_ACTIVE_EVENTS(dbcr0, dbcr1) (((dbcr0) & DBCR0_ACTIVE_EVENTS) || \
348 ((dbcr1) & DBCR1_ACTIVE_EVENTS))
349
316#elif defined(CONFIG_BOOKE) 350#elif defined(CONFIG_BOOKE)
317#define DBCR0_EDM 0x80000000 /* External Debug Mode */ 351#define DBCR0_EDM 0x80000000 /* External Debug Mode */
318#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ 352#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */
@@ -342,19 +376,79 @@
342#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */ 376#define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */
343#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ 377#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
344 378
379#define dbcr_dac(task) ((task)->thread.dbcr0)
380#define DBCR_DAC1R DBCR0_DAC1R
381#define DBCR_DAC1W DBCR0_DAC1W
382#define DBCR_DAC2R DBCR0_DAC2R
383#define DBCR_DAC2W DBCR0_DAC2W
384
345/* Bit definitions related to the DBCR1. */ 385/* Bit definitions related to the DBCR1. */
386#define DBCR1_IAC1US 0xC0000000 /* Instr Addr Cmp 1 Sup/User */
387#define DBCR1_IAC1ER 0x30000000 /* Instr Addr Cmp 1 Eff/Real */
388#define DBCR1_IAC1ER_01 0x10000000 /* reserved */
389#define DBCR1_IAC1ER_10 0x20000000 /* Instr Addr Cmp 1 Eff/Real MSR[IS]=0 */
390#define DBCR1_IAC1ER_11 0x30000000 /* Instr Addr Cmp 1 Eff/Real MSR[IS]=1 */
391#define DBCR1_IAC2US 0x0C000000 /* Instr Addr Cmp 2 Sup/User */
392#define DBCR1_IAC2ER 0x03000000 /* Instr Addr Cmp 2 Eff/Real */
393#define DBCR1_IAC2ER_01 0x01000000 /* reserved */
394#define DBCR1_IAC2ER_10 0x02000000 /* Instr Addr Cmp 2 Eff/Real MSR[IS]=0 */
395#define DBCR1_IAC2ER_11 0x03000000 /* Instr Addr Cmp 2 Eff/Real MSR[IS]=1 */
346#define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */ 396#define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */
347#define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */ 397#define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */
348#define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */ 398#define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */
399#define DBCR1_IAC3US 0x0000C000 /* Instr Addr Cmp 3 Sup/User */
400#define DBCR1_IAC3ER 0x00003000 /* Instr Addr Cmp 3 Eff/Real */
401#define DBCR1_IAC3ER_01 0x00001000 /* reserved */
402#define DBCR1_IAC3ER_10 0x00002000 /* Instr Addr Cmp 3 Eff/Real MSR[IS]=0 */
403#define DBCR1_IAC3ER_11 0x00003000 /* Instr Addr Cmp 3 Eff/Real MSR[IS]=1 */
404#define DBCR1_IAC4US 0x00000C00 /* Instr Addr Cmp 4 Sup/User */
405#define DBCR1_IAC4ER 0x00000300 /* Instr Addr Cmp 4 Eff/Real */
406#define DBCR1_IAC4ER_01 0x00000100 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=0 */
407#define DBCR1_IAC4ER_10 0x00000200 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=0 */
408#define DBCR1_IAC4ER_11 0x00000300 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=1 */
349#define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */ 409#define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */
350#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */ 410#define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */
351#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */ 411#define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */
352 412
413#define dbcr_iac_range(task) ((task)->thread.dbcr1)
414#define DBCR_IAC12I DBCR1_IAC12M /* Range Inclusive */
415#define DBCR_IAC12X DBCR1_IAC12MX /* Range Exclusive */
416#define DBCR_IAC12MODE DBCR1_IAC12MX /* IAC 1-2 Mode Bits */
417#define DBCR_IAC34I DBCR1_IAC34M /* Range Inclusive */
418#define DBCR_IAC34X DBCR1_IAC34MX /* Range Exclusive */
419#define DBCR_IAC34MODE DBCR1_IAC34MX /* IAC 3-4 Mode Bits */
420
353/* Bit definitions related to the DBCR2. */ 421/* Bit definitions related to the DBCR2. */
422#define DBCR2_DAC1US 0xC0000000 /* Data Addr Cmp 1 Sup/User */
423#define DBCR2_DAC1ER 0x30000000 /* Data Addr Cmp 1 Eff/Real */
424#define DBCR2_DAC2US 0x00000000 /* Data Addr Cmp 2 Sup/User */
425#define DBCR2_DAC2ER 0x00000000 /* Data Addr Cmp 2 Eff/Real */
354#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */ 426#define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */
427#define DBCR2_DAC12MM 0x00400000 /* DAC 1-2 Mask mode*/
355#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */ 428#define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */
429#define DBCR2_DAC12MODE 0x00C00000 /* DAC 1-2 Mode Bits */
356#define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */ 430#define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */
357#endif 431#define DBCR2_DVC1M 0x000C0000 /* Data Value Comp 1 Mode */
432#define DBCR2_DVC1M_SHIFT 18 /* # of bits to shift DBCR2_DVC1M */
433#define DBCR2_DVC2M 0x00030000 /* Data Value Comp 2 Mode */
434#define DBCR2_DVC2M_SHIFT 16 /* # of bits to shift DBCR2_DVC2M */
435#define DBCR2_DVC1BE 0x00000F00 /* Data Value Comp 1 Byte */
436#define DBCR2_DVC1BE_SHIFT 8 /* # of bits to shift DBCR2_DVC1BE */
437#define DBCR2_DVC2BE 0x0000000F /* Data Value Comp 2 Byte */
438#define DBCR2_DVC2BE_SHIFT 0 /* # of bits to shift DBCR2_DVC2BE */
439
440/*
441 * Are there any active Debug Events represented in the
442 * Debug Control Registers?
443 */
444#define DBCR0_ACTIVE_EVENTS (DBCR0_ICMP | DBCR0_IAC1 | DBCR0_IAC2 | \
445 DBCR0_IAC3 | DBCR0_IAC4 | DBCR0_DAC1R | \
446 DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W)
447#define DBCR1_ACTIVE_EVENTS 0
448
449#define DBCR_ACTIVE_EVENTS(dbcr0, dbcr1) (((dbcr0) & DBCR0_ACTIVE_EVENTS) || \
450 ((dbcr1) & DBCR1_ACTIVE_EVENTS))
451#endif /* #elif defined(CONFIG_BOOKE) */
358 452
359/* Bit definitions related to the TCR. */ 453/* Bit definitions related to the TCR. */
360#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ 454#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 764094cff681..f9611bd69ed2 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -27,6 +27,7 @@
27#endif 27#endif
28#include <asm/asm-compat.h> 28#include <asm/asm-compat.h>
29#include <asm/synch.h> 29#include <asm/synch.h>
30#include <asm/ppc-opcode.h>
30 31
31#define arch_spin_is_locked(x) ((x)->slock != 0) 32#define arch_spin_is_locked(x) ((x)->slock != 0)
32 33
@@ -60,13 +61,14 @@ static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock)
60 61
61 token = LOCK_TOKEN; 62 token = LOCK_TOKEN;
62 __asm__ __volatile__( 63 __asm__ __volatile__(
63"1: lwarx %0,0,%2\n\ 64"1: " PPC_LWARX(%0,0,%2,1) "\n\
64 cmpwi 0,%0,0\n\ 65 cmpwi 0,%0,0\n\
65 bne- 2f\n\ 66 bne- 2f\n\
66 stwcx. %1,0,%2\n\ 67 stwcx. %1,0,%2\n\
67 bne- 1b\n\ 68 bne- 1b\n"
68 isync\n\ 69 PPC_ACQUIRE_BARRIER
692:" : "=&r" (tmp) 70"2:"
71 : "=&r" (tmp)
70 : "r" (token), "r" (&lock->slock) 72 : "r" (token), "r" (&lock->slock)
71 : "cr0", "memory"); 73 : "cr0", "memory");
72 74
@@ -144,7 +146,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
144{ 146{
145 SYNC_IO; 147 SYNC_IO;
146 __asm__ __volatile__("# arch_spin_unlock\n\t" 148 __asm__ __volatile__("# arch_spin_unlock\n\t"
147 LWSYNC_ON_SMP: : :"memory"); 149 PPC_RELEASE_BARRIER: : :"memory");
148 lock->slock = 0; 150 lock->slock = 0;
149} 151}
150 152
@@ -186,15 +188,15 @@ static inline long __arch_read_trylock(arch_rwlock_t *rw)
186 long tmp; 188 long tmp;
187 189
188 __asm__ __volatile__( 190 __asm__ __volatile__(
189"1: lwarx %0,0,%1\n" 191"1: " PPC_LWARX(%0,0,%1,1) "\n"
190 __DO_SIGN_EXTEND 192 __DO_SIGN_EXTEND
191" addic. %0,%0,1\n\ 193" addic. %0,%0,1\n\
192 ble- 2f\n" 194 ble- 2f\n"
193 PPC405_ERR77(0,%1) 195 PPC405_ERR77(0,%1)
194" stwcx. %0,0,%1\n\ 196" stwcx. %0,0,%1\n\
195 bne- 1b\n\ 197 bne- 1b\n"
196 isync\n\ 198 PPC_ACQUIRE_BARRIER
1972:" : "=&r" (tmp) 199"2:" : "=&r" (tmp)
198 : "r" (&rw->lock) 200 : "r" (&rw->lock)
199 : "cr0", "xer", "memory"); 201 : "cr0", "xer", "memory");
200 202
@@ -211,14 +213,14 @@ static inline long __arch_write_trylock(arch_rwlock_t *rw)
211 213
212 token = WRLOCK_TOKEN; 214 token = WRLOCK_TOKEN;
213 __asm__ __volatile__( 215 __asm__ __volatile__(
214"1: lwarx %0,0,%2\n\ 216"1: " PPC_LWARX(%0,0,%2,1) "\n\
215 cmpwi 0,%0,0\n\ 217 cmpwi 0,%0,0\n\
216 bne- 2f\n" 218 bne- 2f\n"
217 PPC405_ERR77(0,%1) 219 PPC405_ERR77(0,%1)
218" stwcx. %1,0,%2\n\ 220" stwcx. %1,0,%2\n\
219 bne- 1b\n\ 221 bne- 1b\n"
220 isync\n\ 222 PPC_ACQUIRE_BARRIER
2212:" : "=&r" (tmp) 223"2:" : "=&r" (tmp)
222 : "r" (token), "r" (&rw->lock) 224 : "r" (token), "r" (&rw->lock)
223 : "cr0", "memory"); 225 : "cr0", "memory");
224 226
@@ -269,7 +271,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
269 271
270 __asm__ __volatile__( 272 __asm__ __volatile__(
271 "# read_unlock\n\t" 273 "# read_unlock\n\t"
272 LWSYNC_ON_SMP 274 PPC_RELEASE_BARRIER
273"1: lwarx %0,0,%1\n\ 275"1: lwarx %0,0,%1\n\
274 addic %0,%0,-1\n" 276 addic %0,%0,-1\n"
275 PPC405_ERR77(0,%1) 277 PPC405_ERR77(0,%1)
@@ -283,7 +285,7 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
283static inline void arch_write_unlock(arch_rwlock_t *rw) 285static inline void arch_write_unlock(arch_rwlock_t *rw)
284{ 286{
285 __asm__ __volatile__("# write_unlock\n\t" 287 __asm__ __volatile__("# write_unlock\n\t"
286 LWSYNC_ON_SMP: : :"memory"); 288 PPC_RELEASE_BARRIER: : :"memory");
287 rw->lock = 0; 289 rw->lock = 0;
288} 290}
289 291
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h
index 28f6ddbff4cf..d7cab44643c5 100644
--- a/arch/powerpc/include/asm/synch.h
+++ b/arch/powerpc/include/asm/synch.h
@@ -37,11 +37,15 @@ static inline void isync(void)
37#endif 37#endif
38 38
39#ifdef CONFIG_SMP 39#ifdef CONFIG_SMP
40#define ISYNC_ON_SMP "\n\tisync\n" 40#define __PPC_ACQUIRE_BARRIER \
41#define LWSYNC_ON_SMP stringify_in_c(LWSYNC) "\n" 41 START_LWSYNC_SECTION(97); \
42 isync; \
43 MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup);
44#define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER)
45#define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n"
42#else 46#else
43#define ISYNC_ON_SMP 47#define PPC_ACQUIRE_BARRIER
44#define LWSYNC_ON_SMP 48#define PPC_RELEASE_BARRIER
45#endif 49#endif
46 50
47#endif /* __KERNEL__ */ 51#endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index bb8e006a47c6..a6297c67c3d6 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -112,8 +112,13 @@ static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; }
112#endif 112#endif
113 113
114extern int set_dabr(unsigned long dabr); 114extern int set_dabr(unsigned long dabr);
115#ifdef CONFIG_PPC_ADV_DEBUG_REGS
116extern void do_send_trap(struct pt_regs *regs, unsigned long address,
117 unsigned long error_code, int signal_code, int brkpt);
118#else
115extern void do_dabr(struct pt_regs *regs, unsigned long address, 119extern void do_dabr(struct pt_regs *regs, unsigned long address,
116 unsigned long error_code); 120 unsigned long error_code);
121#endif
117extern void print_backtrace(unsigned long *); 122extern void print_backtrace(unsigned long *);
118extern void show_regs(struct pt_regs * regs); 123extern void show_regs(struct pt_regs * regs);
119extern void flush_instruction_cache(void); 124extern void flush_instruction_cache(void);
@@ -232,12 +237,12 @@ __xchg_u32(volatile void *p, unsigned long val)
232 unsigned long prev; 237 unsigned long prev;
233 238
234 __asm__ __volatile__( 239 __asm__ __volatile__(
235 LWSYNC_ON_SMP 240 PPC_RELEASE_BARRIER
236"1: lwarx %0,0,%2 \n" 241"1: lwarx %0,0,%2 \n"
237 PPC405_ERR77(0,%2) 242 PPC405_ERR77(0,%2)
238" stwcx. %3,0,%2 \n\ 243" stwcx. %3,0,%2 \n\
239 bne- 1b" 244 bne- 1b"
240 ISYNC_ON_SMP 245 PPC_ACQUIRE_BARRIER
241 : "=&r" (prev), "+m" (*(volatile unsigned int *)p) 246 : "=&r" (prev), "+m" (*(volatile unsigned int *)p)
242 : "r" (p), "r" (val) 247 : "r" (p), "r" (val)
243 : "cc", "memory"); 248 : "cc", "memory");
@@ -275,12 +280,12 @@ __xchg_u64(volatile void *p, unsigned long val)
275 unsigned long prev; 280 unsigned long prev;
276 281
277 __asm__ __volatile__( 282 __asm__ __volatile__(
278 LWSYNC_ON_SMP 283 PPC_RELEASE_BARRIER
279"1: ldarx %0,0,%2 \n" 284"1: ldarx %0,0,%2 \n"
280 PPC405_ERR77(0,%2) 285 PPC405_ERR77(0,%2)
281" stdcx. %3,0,%2 \n\ 286" stdcx. %3,0,%2 \n\
282 bne- 1b" 287 bne- 1b"
283 ISYNC_ON_SMP 288 PPC_ACQUIRE_BARRIER
284 : "=&r" (prev), "+m" (*(volatile unsigned long *)p) 289 : "=&r" (prev), "+m" (*(volatile unsigned long *)p)
285 : "r" (p), "r" (val) 290 : "r" (p), "r" (val)
286 : "cc", "memory"); 291 : "cc", "memory");
@@ -366,14 +371,14 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new)
366 unsigned int prev; 371 unsigned int prev;
367 372
368 __asm__ __volatile__ ( 373 __asm__ __volatile__ (
369 LWSYNC_ON_SMP 374 PPC_RELEASE_BARRIER
370"1: lwarx %0,0,%2 # __cmpxchg_u32\n\ 375"1: lwarx %0,0,%2 # __cmpxchg_u32\n\
371 cmpw 0,%0,%3\n\ 376 cmpw 0,%0,%3\n\
372 bne- 2f\n" 377 bne- 2f\n"
373 PPC405_ERR77(0,%2) 378 PPC405_ERR77(0,%2)
374" stwcx. %4,0,%2\n\ 379" stwcx. %4,0,%2\n\
375 bne- 1b" 380 bne- 1b"
376 ISYNC_ON_SMP 381 PPC_ACQUIRE_BARRIER
377 "\n\ 382 "\n\
3782:" 3832:"
379 : "=&r" (prev), "+m" (*p) 384 : "=&r" (prev), "+m" (*p)
@@ -412,13 +417,13 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new)
412 unsigned long prev; 417 unsigned long prev;
413 418
414 __asm__ __volatile__ ( 419 __asm__ __volatile__ (
415 LWSYNC_ON_SMP 420 PPC_RELEASE_BARRIER
416"1: ldarx %0,0,%2 # __cmpxchg_u64\n\ 421"1: ldarx %0,0,%2 # __cmpxchg_u64\n\
417 cmpd 0,%0,%3\n\ 422 cmpd 0,%0,%3\n\
418 bne- 2f\n\ 423 bne- 2f\n\
419 stdcx. %4,0,%2\n\ 424 stdcx. %4,0,%2\n\
420 bne- 1b" 425 bne- 1b"
421 ISYNC_ON_SMP 426 PPC_ACQUIRE_BARRIER
422 "\n\ 427 "\n\
4232:" 4282:"
424 : "=&r" (prev), "+m" (*p) 429 : "=&r" (prev), "+m" (*p)
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index bbf89701d7a4..8eaec310a25b 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -38,27 +38,33 @@ static inline int pcibus_to_node(struct pci_bus *bus)
38 cpumask_of_node(pcibus_to_node(bus))) 38 cpumask_of_node(pcibus_to_node(bus)))
39 39
40/* sched_domains SD_NODE_INIT for PPC64 machines */ 40/* sched_domains SD_NODE_INIT for PPC64 machines */
41#define SD_NODE_INIT (struct sched_domain) { \ 41#define SD_NODE_INIT (struct sched_domain) { \
42 .parent = NULL, \ 42 .min_interval = 8, \
43 .child = NULL, \ 43 .max_interval = 32, \
44 .groups = NULL, \ 44 .busy_factor = 32, \
45 .min_interval = 8, \ 45 .imbalance_pct = 125, \
46 .max_interval = 32, \ 46 .cache_nice_tries = 1, \
47 .busy_factor = 32, \ 47 .busy_idx = 3, \
48 .imbalance_pct = 125, \ 48 .idle_idx = 1, \
49 .cache_nice_tries = 1, \ 49 .newidle_idx = 0, \
50 .busy_idx = 3, \ 50 .wake_idx = 0, \
51 .idle_idx = 1, \ 51 .forkexec_idx = 0, \
52 .newidle_idx = 0, \ 52 \
53 .wake_idx = 0, \ 53 .flags = 1*SD_LOAD_BALANCE \
54 .flags = SD_LOAD_BALANCE \ 54 | 1*SD_BALANCE_NEWIDLE \
55 | SD_BALANCE_EXEC \ 55 | 1*SD_BALANCE_EXEC \
56 | SD_BALANCE_FORK \ 56 | 1*SD_BALANCE_FORK \
57 | SD_BALANCE_NEWIDLE \ 57 | 0*SD_BALANCE_WAKE \
58 | SD_SERIALIZE, \ 58 | 0*SD_WAKE_AFFINE \
59 .last_balance = jiffies, \ 59 | 0*SD_PREFER_LOCAL \
60 .balance_interval = 1, \ 60 | 0*SD_SHARE_CPUPOWER \
61 .nr_balance_failed = 0, \ 61 | 0*SD_POWERSAVINGS_BALANCE \
62 | 0*SD_SHARE_PKG_RESOURCES \
63 | 1*SD_SERIALIZE \
64 | 0*SD_PREFER_SIBLING \
65 , \
66 .last_balance = jiffies, \
67 .balance_interval = 1, \
62} 68}
63 69
64extern void __init dump_numa_cpu_topology(void); 70extern void __init dump_numa_cpu_topology(void);
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index bdcb557d470a..07109d843787 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -791,9 +791,8 @@ _GLOBAL(enter_rtas)
791 791
792 li r9,1 792 li r9,1
793 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG) 793 rldicr r9,r9,MSR_SF_LG,(63-MSR_SF_LG)
794 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP 794 ori r9,r9,MSR_IR|MSR_DR|MSR_FE0|MSR_FE1|MSR_FP|MSR_RI
795 andc r6,r0,r9 795 andc r6,r0,r9
796 ori r6,r6,MSR_RI
797 sync /* disable interrupts so SRR0/1 */ 796 sync /* disable interrupts so SRR0/1 */
798 mtmsrd r0 /* don't get trashed */ 797 mtmsrd r0 /* don't get trashed */
799 798
diff --git a/arch/powerpc/kernel/firmware.c b/arch/powerpc/kernel/firmware.c
index 1679a70bbcad..6b1f4271eb53 100644
--- a/arch/powerpc/kernel/firmware.c
+++ b/arch/powerpc/kernel/firmware.c
@@ -17,5 +17,5 @@
17 17
18#include <asm/firmware.h> 18#include <asm/firmware.h>
19 19
20unsigned long powerpc_firmware_features; 20unsigned long powerpc_firmware_features __read_mostly;
21EXPORT_SYMBOL_GPL(powerpc_firmware_features); 21EXPORT_SYMBOL_GPL(powerpc_firmware_features);
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 7f4bd7f3b6af..25793bb0e782 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -214,11 +214,11 @@ skpinv: addi r6,r6,1 /* Increment */
214 bl 1f /* Find our address */ 214 bl 1f /* Find our address */
2151: mflr r9 2151: mflr r9
216 rlwimi r7,r9,0,20,31 216 rlwimi r7,r9,0,20,31
217 addi r7,r7,24 217 addi r7,r7,(2f - 1b)
218 mtspr SPRN_SRR0,r7 218 mtspr SPRN_SRR0,r7
219 mtspr SPRN_SRR1,r6 219 mtspr SPRN_SRR1,r6
220 rfi 220 rfi
221 2212:
222/* 4. Clear out PIDs & Search info */ 222/* 4. Clear out PIDs & Search info */
223 li r6,0 223 li r6,0
224 mtspr SPRN_MAS6,r6 224 mtspr SPRN_MAS6,r6
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 9040330b0530..64f6f2031c22 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -73,8 +73,10 @@
73#define CREATE_TRACE_POINTS 73#define CREATE_TRACE_POINTS
74#include <asm/trace.h> 74#include <asm/trace.h>
75 75
76DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
77EXPORT_PER_CPU_SYMBOL(irq_stat);
78
76int __irq_offset_value; 79int __irq_offset_value;
77static int ppc_spurious_interrupts;
78 80
79#ifdef CONFIG_PPC32 81#ifdef CONFIG_PPC32
80EXPORT_SYMBOL(__irq_offset_value); 82EXPORT_SYMBOL(__irq_offset_value);
@@ -180,30 +182,64 @@ notrace void raw_local_irq_restore(unsigned long en)
180EXPORT_SYMBOL(raw_local_irq_restore); 182EXPORT_SYMBOL(raw_local_irq_restore);
181#endif /* CONFIG_PPC64 */ 183#endif /* CONFIG_PPC64 */
182 184
185static int show_other_interrupts(struct seq_file *p, int prec)
186{
187 int j;
188
189#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
190 if (tau_initialized) {
191 seq_printf(p, "%*s: ", prec, "TAU");
192 for_each_online_cpu(j)
193 seq_printf(p, "%10u ", tau_interrupts(j));
194 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
195 }
196#endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
197
198 seq_printf(p, "%*s: ", prec, "LOC");
199 for_each_online_cpu(j)
200 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
201 seq_printf(p, " Local timer interrupts\n");
202
203 seq_printf(p, "%*s: ", prec, "SPU");
204 for_each_online_cpu(j)
205 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
206 seq_printf(p, " Spurious interrupts\n");
207
208 seq_printf(p, "%*s: ", prec, "CNT");
209 for_each_online_cpu(j)
210 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
211 seq_printf(p, " Performance monitoring interrupts\n");
212
213 seq_printf(p, "%*s: ", prec, "MCE");
214 for_each_online_cpu(j)
215 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
216 seq_printf(p, " Machine check exceptions\n");
217
218 return 0;
219}
220
183int show_interrupts(struct seq_file *p, void *v) 221int show_interrupts(struct seq_file *p, void *v)
184{ 222{
185 int i = *(loff_t *)v, j; 223 unsigned long flags, any_count = 0;
224 int i = *(loff_t *) v, j, prec;
186 struct irqaction *action; 225 struct irqaction *action;
187 struct irq_desc *desc; 226 struct irq_desc *desc;
188 unsigned long flags;
189 227
228 if (i > nr_irqs)
229 return 0;
230
231 for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
232 j *= 10;
233
234 if (i == nr_irqs)
235 return show_other_interrupts(p, prec);
236
237 /* print header */
190 if (i == 0) { 238 if (i == 0) {
191 seq_puts(p, " "); 239 seq_printf(p, "%*s", prec + 8, "");
192 for_each_online_cpu(j) 240 for_each_online_cpu(j)
193 seq_printf(p, "CPU%d ", j); 241 seq_printf(p, "CPU%-8d", j);
194 seq_putc(p, '\n'); 242 seq_putc(p, '\n');
195 } else if (i == nr_irqs) {
196#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
197 if (tau_initialized){
198 seq_puts(p, "TAU: ");
199 for_each_online_cpu(j)
200 seq_printf(p, "%10u ", tau_interrupts(j));
201 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
202 }
203#endif /* CONFIG_PPC32 && CONFIG_TAU_INT*/
204 seq_printf(p, "BAD: %10u\n", ppc_spurious_interrupts);
205
206 return 0;
207 } 243 }
208 244
209 desc = irq_to_desc(i); 245 desc = irq_to_desc(i);
@@ -211,37 +247,48 @@ int show_interrupts(struct seq_file *p, void *v)
211 return 0; 247 return 0;
212 248
213 raw_spin_lock_irqsave(&desc->lock, flags); 249 raw_spin_lock_irqsave(&desc->lock, flags);
214 250 for_each_online_cpu(j)
251 any_count |= kstat_irqs_cpu(i, j);
215 action = desc->action; 252 action = desc->action;
216 if (!action || !action->handler) 253 if (!action && !any_count)
217 goto skip; 254 goto out;
218 255
219 seq_printf(p, "%3d: ", i); 256 seq_printf(p, "%*d: ", prec, i);
220#ifdef CONFIG_SMP
221 for_each_online_cpu(j) 257 for_each_online_cpu(j)
222 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); 258 seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
223#else
224 seq_printf(p, "%10u ", kstat_irqs(i));
225#endif /* CONFIG_SMP */
226 259
227 if (desc->chip) 260 if (desc->chip)
228 seq_printf(p, " %s ", desc->chip->name); 261 seq_printf(p, " %-16s", desc->chip->name);
229 else 262 else
230 seq_puts(p, " None "); 263 seq_printf(p, " %-16s", "None");
264 seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge");
231 265
232 seq_printf(p, "%s", (desc->status & IRQ_LEVEL) ? "Level " : "Edge "); 266 if (action) {
233 seq_printf(p, " %s", action->name); 267 seq_printf(p, " %s", action->name);
268 while ((action = action->next) != NULL)
269 seq_printf(p, ", %s", action->name);
270 }
234 271
235 for (action = action->next; action; action = action->next)
236 seq_printf(p, ", %s", action->name);
237 seq_putc(p, '\n'); 272 seq_putc(p, '\n');
238 273out:
239skip:
240 raw_spin_unlock_irqrestore(&desc->lock, flags); 274 raw_spin_unlock_irqrestore(&desc->lock, flags);
241
242 return 0; 275 return 0;
243} 276}
244 277
278/*
279 * /proc/stat helpers
280 */
281u64 arch_irq_stat_cpu(unsigned int cpu)
282{
283 u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
284
285 sum += per_cpu(irq_stat, cpu).pmu_irqs;
286 sum += per_cpu(irq_stat, cpu).mce_exceptions;
287 sum += per_cpu(irq_stat, cpu).spurious_irqs;
288
289 return sum;
290}
291
245#ifdef CONFIG_HOTPLUG_CPU 292#ifdef CONFIG_HOTPLUG_CPU
246void fixup_irqs(cpumask_t map) 293void fixup_irqs(cpumask_t map)
247{ 294{
@@ -353,8 +400,7 @@ void do_IRQ(struct pt_regs *regs)
353 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) 400 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE)
354 handle_one_irq(irq); 401 handle_one_irq(irq);
355 else if (irq != NO_IRQ_IGNORE) 402 else if (irq != NO_IRQ_IGNORE)
356 /* That's not SMP safe ... but who cares ? */ 403 __get_cpu_var(irq_stat).spurious_irqs++;
357 ppc_spurious_interrupts++;
358 404
359 irq_exit(); 405 irq_exit();
360 set_irq_regs(old_regs); 406 set_irq_regs(old_regs);
@@ -474,7 +520,7 @@ void do_softirq(void)
474 */ 520 */
475 521
476static LIST_HEAD(irq_hosts); 522static LIST_HEAD(irq_hosts);
477static DEFINE_SPINLOCK(irq_big_lock); 523static DEFINE_RAW_SPINLOCK(irq_big_lock);
478static unsigned int revmap_trees_allocated; 524static unsigned int revmap_trees_allocated;
479static DEFINE_MUTEX(revmap_trees_mutex); 525static DEFINE_MUTEX(revmap_trees_mutex);
480struct irq_map_entry irq_map[NR_IRQS]; 526struct irq_map_entry irq_map[NR_IRQS];
@@ -520,14 +566,14 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
520 if (host->ops->match == NULL) 566 if (host->ops->match == NULL)
521 host->ops->match = default_irq_host_match; 567 host->ops->match = default_irq_host_match;
522 568
523 spin_lock_irqsave(&irq_big_lock, flags); 569 raw_spin_lock_irqsave(&irq_big_lock, flags);
524 570
525 /* If it's a legacy controller, check for duplicates and 571 /* If it's a legacy controller, check for duplicates and
526 * mark it as allocated (we use irq 0 host pointer for that 572 * mark it as allocated (we use irq 0 host pointer for that
527 */ 573 */
528 if (revmap_type == IRQ_HOST_MAP_LEGACY) { 574 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
529 if (irq_map[0].host != NULL) { 575 if (irq_map[0].host != NULL) {
530 spin_unlock_irqrestore(&irq_big_lock, flags); 576 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
531 /* If we are early boot, we can't free the structure, 577 /* If we are early boot, we can't free the structure,
532 * too bad... 578 * too bad...
533 * this will be fixed once slab is made available early 579 * this will be fixed once slab is made available early
@@ -541,7 +587,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
541 } 587 }
542 588
543 list_add(&host->link, &irq_hosts); 589 list_add(&host->link, &irq_hosts);
544 spin_unlock_irqrestore(&irq_big_lock, flags); 590 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
545 591
546 /* Additional setups per revmap type */ 592 /* Additional setups per revmap type */
547 switch(revmap_type) { 593 switch(revmap_type) {
@@ -592,13 +638,13 @@ struct irq_host *irq_find_host(struct device_node *node)
592 * the absence of a device node. This isn't a problem so far 638 * the absence of a device node. This isn't a problem so far
593 * yet though... 639 * yet though...
594 */ 640 */
595 spin_lock_irqsave(&irq_big_lock, flags); 641 raw_spin_lock_irqsave(&irq_big_lock, flags);
596 list_for_each_entry(h, &irq_hosts, link) 642 list_for_each_entry(h, &irq_hosts, link)
597 if (h->ops->match(h, node)) { 643 if (h->ops->match(h, node)) {
598 found = h; 644 found = h;
599 break; 645 break;
600 } 646 }
601 spin_unlock_irqrestore(&irq_big_lock, flags); 647 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
602 return found; 648 return found;
603} 649}
604EXPORT_SYMBOL_GPL(irq_find_host); 650EXPORT_SYMBOL_GPL(irq_find_host);
@@ -967,7 +1013,7 @@ unsigned int irq_alloc_virt(struct irq_host *host,
967 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS)) 1013 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
968 return NO_IRQ; 1014 return NO_IRQ;
969 1015
970 spin_lock_irqsave(&irq_big_lock, flags); 1016 raw_spin_lock_irqsave(&irq_big_lock, flags);
971 1017
972 /* Use hint for 1 interrupt if any */ 1018 /* Use hint for 1 interrupt if any */
973 if (count == 1 && hint >= NUM_ISA_INTERRUPTS && 1019 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
@@ -991,7 +1037,7 @@ unsigned int irq_alloc_virt(struct irq_host *host,
991 } 1037 }
992 } 1038 }
993 if (found == NO_IRQ) { 1039 if (found == NO_IRQ) {
994 spin_unlock_irqrestore(&irq_big_lock, flags); 1040 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
995 return NO_IRQ; 1041 return NO_IRQ;
996 } 1042 }
997 hint_found: 1043 hint_found:
@@ -1000,7 +1046,7 @@ unsigned int irq_alloc_virt(struct irq_host *host,
1000 smp_wmb(); 1046 smp_wmb();
1001 irq_map[i].host = host; 1047 irq_map[i].host = host;
1002 } 1048 }
1003 spin_unlock_irqrestore(&irq_big_lock, flags); 1049 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1004 return found; 1050 return found;
1005} 1051}
1006 1052
@@ -1012,7 +1058,7 @@ void irq_free_virt(unsigned int virq, unsigned int count)
1012 WARN_ON (virq < NUM_ISA_INTERRUPTS); 1058 WARN_ON (virq < NUM_ISA_INTERRUPTS);
1013 WARN_ON (count == 0 || (virq + count) > irq_virq_count); 1059 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1014 1060
1015 spin_lock_irqsave(&irq_big_lock, flags); 1061 raw_spin_lock_irqsave(&irq_big_lock, flags);
1016 for (i = virq; i < (virq + count); i++) { 1062 for (i = virq; i < (virq + count); i++) {
1017 struct irq_host *host; 1063 struct irq_host *host;
1018 1064
@@ -1025,7 +1071,7 @@ void irq_free_virt(unsigned int virq, unsigned int count)
1025 smp_wmb(); 1071 smp_wmb();
1026 irq_map[i].host = NULL; 1072 irq_map[i].host = NULL;
1027 } 1073 }
1028 spin_unlock_irqrestore(&irq_big_lock, flags); 1074 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1029} 1075}
1030 1076
1031int arch_early_irq_init(void) 1077int arch_early_irq_init(void)
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index b6bd1eaa1c24..41bada0298c8 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -333,7 +333,7 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code,
333 atomic_set(&kgdb_cpu_doing_single_step, -1); 333 atomic_set(&kgdb_cpu_doing_single_step, -1);
334 /* set the trace bit if we're stepping */ 334 /* set the trace bit if we're stepping */
335 if (remcom_in_buffer[0] == 's') { 335 if (remcom_in_buffer[0] == 's') {
336#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 336#ifdef CONFIG_PPC_ADV_DEBUG_REGS
337 mtspr(SPRN_DBCR0, 337 mtspr(SPRN_DBCR0,
338 mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 338 mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
339 linux_regs->msr |= MSR_DE; 339 linux_regs->msr |= MSR_DE;
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index c9329786073b..3fd1af902112 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -36,7 +36,7 @@
36#include <asm/uaccess.h> 36#include <asm/uaccess.h>
37#include <asm/system.h> 37#include <asm/system.h>
38 38
39#ifdef CONFIG_BOOKE 39#ifdef CONFIG_PPC_ADV_DEBUG_REGS
40#define MSR_SINGLESTEP (MSR_DE) 40#define MSR_SINGLESTEP (MSR_DE)
41#else 41#else
42#define MSR_SINGLESTEP (MSR_SE) 42#define MSR_SINGLESTEP (MSR_SE)
@@ -110,7 +110,7 @@ static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
110 * like Decrementer or External Interrupt */ 110 * like Decrementer or External Interrupt */
111 regs->msr &= ~MSR_EE; 111 regs->msr &= ~MSR_EE;
112 regs->msr |= MSR_SINGLESTEP; 112 regs->msr |= MSR_SINGLESTEP;
113#ifdef CONFIG_BOOKE 113#ifdef CONFIG_PPC_ADV_DEBUG_REGS
114 regs->msr &= ~MSR_CE; 114 regs->msr &= ~MSR_CE;
115 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); 115 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
116#endif 116#endif
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 79a00bb9c64c..d09d1c615150 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -359,7 +359,7 @@ static void parse_system_parameter_string(struct seq_file *m)
359 359
360 unsigned char *local_buffer = kmalloc(SPLPAR_MAXLENGTH, GFP_KERNEL); 360 unsigned char *local_buffer = kmalloc(SPLPAR_MAXLENGTH, GFP_KERNEL);
361 if (!local_buffer) { 361 if (!local_buffer) {
362 printk(KERN_ERR "%s %s kmalloc failure at line %d \n", 362 printk(KERN_ERR "%s %s kmalloc failure at line %d\n",
363 __FILE__, __func__, __LINE__); 363 __FILE__, __func__, __LINE__);
364 return; 364 return;
365 } 365 }
@@ -383,13 +383,13 @@ static void parse_system_parameter_string(struct seq_file *m)
383 int idx, w_idx; 383 int idx, w_idx;
384 char *workbuffer = kzalloc(SPLPAR_MAXLENGTH, GFP_KERNEL); 384 char *workbuffer = kzalloc(SPLPAR_MAXLENGTH, GFP_KERNEL);
385 if (!workbuffer) { 385 if (!workbuffer) {
386 printk(KERN_ERR "%s %s kmalloc failure at line %d \n", 386 printk(KERN_ERR "%s %s kmalloc failure at line %d\n",
387 __FILE__, __func__, __LINE__); 387 __FILE__, __func__, __LINE__);
388 kfree(local_buffer); 388 kfree(local_buffer);
389 return; 389 return;
390 } 390 }
391#ifdef LPARCFG_DEBUG 391#ifdef LPARCFG_DEBUG
392 printk(KERN_INFO "success calling get-system-parameter \n"); 392 printk(KERN_INFO "success calling get-system-parameter\n");
393#endif 393#endif
394 splpar_strlen = local_buffer[0] * 256 + local_buffer[1]; 394 splpar_strlen = local_buffer[0] * 256 + local_buffer[1];
395 local_buffer += 2; /* step over strlen value */ 395 local_buffer += 2; /* step over strlen value */
@@ -440,7 +440,7 @@ static int lparcfg_count_active_processors(void)
440 440
441 while ((cpus_dn = of_find_node_by_type(cpus_dn, "cpu"))) { 441 while ((cpus_dn = of_find_node_by_type(cpus_dn, "cpu"))) {
442#ifdef LPARCFG_DEBUG 442#ifdef LPARCFG_DEBUG
443 printk(KERN_ERR "cpus_dn %p \n", cpus_dn); 443 printk(KERN_ERR "cpus_dn %p\n", cpus_dn);
444#endif 444#endif
445 count++; 445 count++;
446 } 446 }
@@ -725,7 +725,7 @@ static int lparcfg_data(struct seq_file *m, void *v)
725 const unsigned int *lp_index_ptr; 725 const unsigned int *lp_index_ptr;
726 unsigned int lp_index = 0; 726 unsigned int lp_index = 0;
727 727
728 seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS); 728 seq_printf(m, "%s %s\n", MODULE_NAME, MODULE_VERS);
729 729
730 rootdn = of_find_node_by_path("/"); 730 rootdn = of_find_node_by_path("/");
731 if (rootdn) { 731 if (rootdn) {
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index ad461e735aec..9cf197f01e94 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -338,8 +338,8 @@ static int __init nvram_create_os_partition(void)
338 338
339 rc = nvram_write_header(new_part); 339 rc = nvram_write_header(new_part);
340 if (rc <= 0) { 340 if (rc <= 0) {
341 printk(KERN_ERR "nvram_create_os_partition: nvram_write_header \ 341 printk(KERN_ERR "nvram_create_os_partition: nvram_write_header "
342 failed (%d)\n", rc); 342 "failed (%d)\n", rc);
343 return rc; 343 return rc;
344 } 344 }
345 345
@@ -349,7 +349,7 @@ static int __init nvram_create_os_partition(void)
349 rc = ppc_md.nvram_write((char *)&seq_init, sizeof(seq_init), &tmp_index); 349 rc = ppc_md.nvram_write((char *)&seq_init, sizeof(seq_init), &tmp_index);
350 if (rc <= 0) { 350 if (rc <= 0) {
351 printk(KERN_ERR "nvram_create_os_partition: nvram_write " 351 printk(KERN_ERR "nvram_create_os_partition: nvram_write "
352 "failed (%d)\n", rc); 352 "failed (%d)\n", rc);
353 return rc; 353 return rc;
354 } 354 }
355 355
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 4aa17401657b..cd11d5ca80df 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -304,7 +304,7 @@ static void __devinit __of_scan_bus(struct device_node *node,
304 int reglen, devfn; 304 int reglen, devfn;
305 struct pci_dev *dev; 305 struct pci_dev *dev;
306 306
307 pr_debug("of_scan_bus(%s) bus no %d... \n", 307 pr_debug("of_scan_bus(%s) bus no %d...\n",
308 node->full_name, bus->number); 308 node->full_name, bus->number);
309 309
310 /* Scan direct children */ 310 /* Scan direct children */
diff --git a/arch/powerpc/kernel/pmc.c b/arch/powerpc/kernel/pmc.c
index 0516e2d3e02e..461499b43cff 100644
--- a/arch/powerpc/kernel/pmc.c
+++ b/arch/powerpc/kernel/pmc.c
@@ -37,7 +37,7 @@ static void dummy_perf(struct pt_regs *regs)
37} 37}
38 38
39 39
40static DEFINE_SPINLOCK(pmc_owner_lock); 40static DEFINE_RAW_SPINLOCK(pmc_owner_lock);
41static void *pmc_owner_caller; /* mostly for debugging */ 41static void *pmc_owner_caller; /* mostly for debugging */
42perf_irq_t perf_irq = dummy_perf; 42perf_irq_t perf_irq = dummy_perf;
43 43
@@ -45,7 +45,7 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq)
45{ 45{
46 int err = 0; 46 int err = 0;
47 47
48 spin_lock(&pmc_owner_lock); 48 raw_spin_lock(&pmc_owner_lock);
49 49
50 if (pmc_owner_caller) { 50 if (pmc_owner_caller) {
51 printk(KERN_WARNING "reserve_pmc_hardware: " 51 printk(KERN_WARNING "reserve_pmc_hardware: "
@@ -59,21 +59,21 @@ int reserve_pmc_hardware(perf_irq_t new_perf_irq)
59 perf_irq = new_perf_irq ? new_perf_irq : dummy_perf; 59 perf_irq = new_perf_irq ? new_perf_irq : dummy_perf;
60 60
61 out: 61 out:
62 spin_unlock(&pmc_owner_lock); 62 raw_spin_unlock(&pmc_owner_lock);
63 return err; 63 return err;
64} 64}
65EXPORT_SYMBOL_GPL(reserve_pmc_hardware); 65EXPORT_SYMBOL_GPL(reserve_pmc_hardware);
66 66
67void release_pmc_hardware(void) 67void release_pmc_hardware(void)
68{ 68{
69 spin_lock(&pmc_owner_lock); 69 raw_spin_lock(&pmc_owner_lock);
70 70
71 WARN_ON(! pmc_owner_caller); 71 WARN_ON(! pmc_owner_caller);
72 72
73 pmc_owner_caller = NULL; 73 pmc_owner_caller = NULL;
74 perf_irq = dummy_perf; 74 perf_irq = dummy_perf;
75 75
76 spin_unlock(&pmc_owner_lock); 76 raw_spin_unlock(&pmc_owner_lock);
77} 77}
78EXPORT_SYMBOL_GPL(release_pmc_hardware); 78EXPORT_SYMBOL_GPL(release_pmc_hardware);
79 79
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7b816daf3eba..e4d71ced97ef 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -245,6 +245,24 @@ void discard_lazy_cpu_state(void)
245} 245}
246#endif /* CONFIG_SMP */ 246#endif /* CONFIG_SMP */
247 247
248#ifdef CONFIG_PPC_ADV_DEBUG_REGS
249void do_send_trap(struct pt_regs *regs, unsigned long address,
250 unsigned long error_code, int signal_code, int breakpt)
251{
252 siginfo_t info;
253
254 if (notify_die(DIE_DABR_MATCH, "dabr_match", regs, error_code,
255 11, SIGSEGV) == NOTIFY_STOP)
256 return;
257
258 /* Deliver the signal to userspace */
259 info.si_signo = SIGTRAP;
260 info.si_errno = breakpt; /* breakpoint or watchpoint id */
261 info.si_code = signal_code;
262 info.si_addr = (void __user *)address;
263 force_sig_info(SIGTRAP, &info, current);
264}
265#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
248void do_dabr(struct pt_regs *regs, unsigned long address, 266void do_dabr(struct pt_regs *regs, unsigned long address,
249 unsigned long error_code) 267 unsigned long error_code)
250{ 268{
@@ -257,12 +275,6 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
257 if (debugger_dabr_match(regs)) 275 if (debugger_dabr_match(regs))
258 return; 276 return;
259 277
260 /* Clear the DAC and struct entries. One shot trigger */
261#if defined(CONFIG_BOOKE)
262 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | DBSR_DAC1W
263 | DBCR0_IDM));
264#endif
265
266 /* Clear the DABR */ 278 /* Clear the DABR */
267 set_dabr(0); 279 set_dabr(0);
268 280
@@ -273,9 +285,82 @@ void do_dabr(struct pt_regs *regs, unsigned long address,
273 info.si_addr = (void __user *)address; 285 info.si_addr = (void __user *)address;
274 force_sig_info(SIGTRAP, &info, current); 286 force_sig_info(SIGTRAP, &info, current);
275} 287}
288#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
276 289
277static DEFINE_PER_CPU(unsigned long, current_dabr); 290static DEFINE_PER_CPU(unsigned long, current_dabr);
278 291
292#ifdef CONFIG_PPC_ADV_DEBUG_REGS
293/*
294 * Set the debug registers back to their default "safe" values.
295 */
296static void set_debug_reg_defaults(struct thread_struct *thread)
297{
298 thread->iac1 = thread->iac2 = 0;
299#if CONFIG_PPC_ADV_DEBUG_IACS > 2
300 thread->iac3 = thread->iac4 = 0;
301#endif
302 thread->dac1 = thread->dac2 = 0;
303#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
304 thread->dvc1 = thread->dvc2 = 0;
305#endif
306 thread->dbcr0 = 0;
307#ifdef CONFIG_BOOKE
308 /*
309 * Force User/Supervisor bits to b11 (user-only MSR[PR]=1)
310 */
311 thread->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | \
312 DBCR1_IAC3US | DBCR1_IAC4US;
313 /*
314 * Force Data Address Compare User/Supervisor bits to be User-only
315 * (0b11 MSR[PR]=1) and set all other bits in DBCR2 register to be 0.
316 */
317 thread->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
318#else
319 thread->dbcr1 = 0;
320#endif
321}
322
323static void prime_debug_regs(struct thread_struct *thread)
324{
325 mtspr(SPRN_IAC1, thread->iac1);
326 mtspr(SPRN_IAC2, thread->iac2);
327#if CONFIG_PPC_ADV_DEBUG_IACS > 2
328 mtspr(SPRN_IAC3, thread->iac3);
329 mtspr(SPRN_IAC4, thread->iac4);
330#endif
331 mtspr(SPRN_DAC1, thread->dac1);
332 mtspr(SPRN_DAC2, thread->dac2);
333#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
334 mtspr(SPRN_DVC1, thread->dvc1);
335 mtspr(SPRN_DVC2, thread->dvc2);
336#endif
337 mtspr(SPRN_DBCR0, thread->dbcr0);
338 mtspr(SPRN_DBCR1, thread->dbcr1);
339#ifdef CONFIG_BOOKE
340 mtspr(SPRN_DBCR2, thread->dbcr2);
341#endif
342}
343/*
344 * Unless neither the old or new thread are making use of the
345 * debug registers, set the debug registers from the values
346 * stored in the new thread.
347 */
348static void switch_booke_debug_regs(struct thread_struct *new_thread)
349{
350 if ((current->thread.dbcr0 & DBCR0_IDM)
351 || (new_thread->dbcr0 & DBCR0_IDM))
352 prime_debug_regs(new_thread);
353}
354#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
355static void set_debug_reg_defaults(struct thread_struct *thread)
356{
357 if (thread->dabr) {
358 thread->dabr = 0;
359 set_dabr(0);
360 }
361}
362#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
363
279int set_dabr(unsigned long dabr) 364int set_dabr(unsigned long dabr)
280{ 365{
281 __get_cpu_var(current_dabr) = dabr; 366 __get_cpu_var(current_dabr) = dabr;
@@ -284,7 +369,7 @@ int set_dabr(unsigned long dabr)
284 return ppc_md.set_dabr(dabr); 369 return ppc_md.set_dabr(dabr);
285 370
286 /* XXX should we have a CPU_FTR_HAS_DABR ? */ 371 /* XXX should we have a CPU_FTR_HAS_DABR ? */
287#if defined(CONFIG_BOOKE) 372#ifdef CONFIG_PPC_ADV_DEBUG_REGS
288 mtspr(SPRN_DAC1, dabr); 373 mtspr(SPRN_DAC1, dabr);
289#elif defined(CONFIG_PPC_BOOK3S) 374#elif defined(CONFIG_PPC_BOOK3S)
290 mtspr(SPRN_DABR, dabr); 375 mtspr(SPRN_DABR, dabr);
@@ -371,10 +456,8 @@ struct task_struct *__switch_to(struct task_struct *prev,
371 456
372#endif /* CONFIG_SMP */ 457#endif /* CONFIG_SMP */
373 458
374#if defined(CONFIG_BOOKE) 459#ifdef CONFIG_PPC_ADV_DEBUG_REGS
375 /* If new thread DAC (HW breakpoint) is the same then leave it */ 460 switch_booke_debug_regs(&new->thread);
376 if (new->thread.dabr)
377 set_dabr(new->thread.dabr);
378#else 461#else
379 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr)) 462 if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
380 set_dabr(new->thread.dabr); 463 set_dabr(new->thread.dabr);
@@ -514,7 +597,7 @@ void show_regs(struct pt_regs * regs)
514 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer); 597 printk(" CR: %08lx XER: %08lx\n", regs->ccr, regs->xer);
515 trap = TRAP(regs); 598 trap = TRAP(regs);
516 if (trap == 0x300 || trap == 0x600) 599 if (trap == 0x300 || trap == 0x600)
517#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 600#ifdef CONFIG_PPC_ADV_DEBUG_REGS
518 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr); 601 printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
519#else 602#else
520 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr); 603 printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
@@ -556,14 +639,7 @@ void flush_thread(void)
556{ 639{
557 discard_lazy_cpu_state(); 640 discard_lazy_cpu_state();
558 641
559 if (current->thread.dabr) { 642 set_debug_reg_defaults(&current->thread);
560 current->thread.dabr = 0;
561 set_dabr(0);
562
563#if defined(CONFIG_BOOKE)
564 current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W);
565#endif
566 }
567} 643}
568 644
569void 645void
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index bafac2e41ae1..5f306c4946e5 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -654,6 +654,9 @@ static void __init early_cmdline_parse(void)
654#define OV5_CMO 0x00 654#define OV5_CMO 0x00
655#endif 655#endif
656 656
657/* Option Vector 6: IBM PAPR hints */
658#define OV6_LINUX 0x02 /* Linux is our OS */
659
657/* 660/*
658 * The architecture vector has an array of PVR mask/value pairs, 661 * The architecture vector has an array of PVR mask/value pairs,
659 * followed by # option vectors - 1, followed by the option vectors. 662 * followed by # option vectors - 1, followed by the option vectors.
@@ -665,7 +668,7 @@ static unsigned char ibm_architecture_vec[] = {
665 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */ 668 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
666 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ 669 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
667 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ 670 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
668 5 - 1, /* 5 option vectors */ 671 6 - 1, /* 6 option vectors */
669 672
670 /* option vector 1: processor architectures supported */ 673 /* option vector 1: processor architectures supported */
671 3 - 2, /* length */ 674 3 - 2, /* length */
@@ -697,12 +700,29 @@ static unsigned char ibm_architecture_vec[] = {
697 0, /* don't halt */ 700 0, /* don't halt */
698 701
699 /* option vector 5: PAPR/OF options */ 702 /* option vector 5: PAPR/OF options */
700 5 - 2, /* length */ 703 13 - 2, /* length */
701 0, /* don't ignore, don't halt */ 704 0, /* don't ignore, don't halt */
702 OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | 705 OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY |
703 OV5_DONATE_DEDICATE_CPU | OV5_MSI, 706 OV5_DONATE_DEDICATE_CPU | OV5_MSI,
704 0, 707 0,
705 OV5_CMO, 708 OV5_CMO,
709 0,
710 0,
711 0,
712 0,
713 /* WARNING: The offset of the "number of cores" field below
714 * must match by the macro below. Update the definition if
715 * the structure layout changes.
716 */
717#define IBM_ARCH_VEC_NRCORES_OFFSET 100
718 W(NR_CPUS), /* number of cores supported */
719
720 /* option vector 6: IBM PAPR hints */
721 4 - 2, /* length */
722 0,
723 0,
724 OV6_LINUX,
725
706}; 726};
707 727
708/* Old method - ELF header with PT_NOTE sections */ 728/* Old method - ELF header with PT_NOTE sections */
@@ -792,13 +812,70 @@ static struct fake_elf {
792 } 812 }
793}; 813};
794 814
815static int __init prom_count_smt_threads(void)
816{
817 phandle node;
818 char type[64];
819 unsigned int plen;
820
821 /* Pick up th first CPU node we can find */
822 for (node = 0; prom_next_node(&node); ) {
823 type[0] = 0;
824 prom_getprop(node, "device_type", type, sizeof(type));
825
826 if (strcmp(type, RELOC("cpu")))
827 continue;
828 /*
829 * There is an entry for each smt thread, each entry being
830 * 4 bytes long. All cpus should have the same number of
831 * smt threads, so return after finding the first.
832 */
833 plen = prom_getproplen(node, "ibm,ppc-interrupt-server#s");
834 if (plen == PROM_ERROR)
835 break;
836 plen >>= 2;
837 prom_debug("Found 0x%x smt threads per core\n", (unsigned long)plen);
838
839 /* Sanity check */
840 if (plen < 1 || plen > 64) {
841 prom_printf("Threads per core 0x%x out of bounds, assuming 1\n",
842 (unsigned long)plen);
843 return 1;
844 }
845 return plen;
846 }
847 prom_debug("No threads found, assuming 1 per core\n");
848
849 return 1;
850
851}
852
853
795static void __init prom_send_capabilities(void) 854static void __init prom_send_capabilities(void)
796{ 855{
797 ihandle elfloader, root; 856 ihandle elfloader, root;
798 prom_arg_t ret; 857 prom_arg_t ret;
858 u32 *cores;
799 859
800 root = call_prom("open", 1, 1, ADDR("/")); 860 root = call_prom("open", 1, 1, ADDR("/"));
801 if (root != 0) { 861 if (root != 0) {
862 /* We need to tell the FW about the number of cores we support.
863 *
864 * To do that, we count the number of threads on the first core
865 * (we assume this is the same for all cores) and use it to
866 * divide NR_CPUS.
867 */
868 cores = (u32 *)PTRRELOC(&ibm_architecture_vec[IBM_ARCH_VEC_NRCORES_OFFSET]);
869 if (*cores != NR_CPUS) {
870 prom_printf("WARNING ! "
871 "ibm_architecture_vec structure inconsistent: 0x%x !\n",
872 *cores);
873 } else {
874 *cores = NR_CPUS / prom_count_smt_threads();
875 prom_printf("Max number of cores passed to firmware: 0x%x\n",
876 (unsigned long)*cores);
877 }
878
802 /* try calling the ibm,client-architecture-support method */ 879 /* try calling the ibm,client-architecture-support method */
803 prom_printf("Calling ibm,client-architecture-support..."); 880 prom_printf("Calling ibm,client-architecture-support...");
804 if (call_prom_ret("call-method", 3, 2, &ret, 881 if (call_prom_ret("call-method", 3, 2, &ret,
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index ef149880c145..d9b05866615f 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -46,7 +46,7 @@
46/* 46/*
47 * Set of msr bits that gdb can change on behalf of a process. 47 * Set of msr bits that gdb can change on behalf of a process.
48 */ 48 */
49#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 49#ifdef CONFIG_PPC_ADV_DEBUG_REGS
50#define MSR_DEBUGCHANGE 0 50#define MSR_DEBUGCHANGE 0
51#else 51#else
52#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE) 52#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
@@ -703,7 +703,7 @@ void user_enable_single_step(struct task_struct *task)
703 struct pt_regs *regs = task->thread.regs; 703 struct pt_regs *regs = task->thread.regs;
704 704
705 if (regs != NULL) { 705 if (regs != NULL) {
706#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 706#ifdef CONFIG_PPC_ADV_DEBUG_REGS
707 task->thread.dbcr0 &= ~DBCR0_BT; 707 task->thread.dbcr0 &= ~DBCR0_BT;
708 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC; 708 task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
709 regs->msr |= MSR_DE; 709 regs->msr |= MSR_DE;
@@ -720,7 +720,7 @@ void user_enable_block_step(struct task_struct *task)
720 struct pt_regs *regs = task->thread.regs; 720 struct pt_regs *regs = task->thread.regs;
721 721
722 if (regs != NULL) { 722 if (regs != NULL) {
723#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 723#ifdef CONFIG_PPC_ADV_DEBUG_REGS
724 task->thread.dbcr0 &= ~DBCR0_IC; 724 task->thread.dbcr0 &= ~DBCR0_IC;
725 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT; 725 task->thread.dbcr0 = DBCR0_IDM | DBCR0_BT;
726 regs->msr |= MSR_DE; 726 regs->msr |= MSR_DE;
@@ -737,17 +737,25 @@ void user_disable_single_step(struct task_struct *task)
737 struct pt_regs *regs = task->thread.regs; 737 struct pt_regs *regs = task->thread.regs;
738 738
739 if (regs != NULL) { 739 if (regs != NULL) {
740#if defined(CONFIG_BOOKE) 740#ifdef CONFIG_PPC_ADV_DEBUG_REGS
741 /* If DAC don't clear DBCRO_IDM or MSR_DE */ 741 /*
742 if (task->thread.dabr) 742 * The logic to disable single stepping should be as
743 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT); 743 * simple as turning off the Instruction Complete flag.
744 else { 744 * And, after doing so, if all debug flags are off, turn
745 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM); 745 * off DBCR0(IDM) and MSR(DE) .... Torez
746 */
747 task->thread.dbcr0 &= ~DBCR0_IC;
748 /*
749 * Test to see if any of the DBCR_ACTIVE_EVENTS bits are set.
750 */
751 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
752 task->thread.dbcr1)) {
753 /*
754 * All debug events were off.....
755 */
756 task->thread.dbcr0 &= ~DBCR0_IDM;
746 regs->msr &= ~MSR_DE; 757 regs->msr &= ~MSR_DE;
747 } 758 }
748#elif defined(CONFIG_40x)
749 task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_BT | DBCR0_IDM);
750 regs->msr &= ~MSR_DE;
751#else 759#else
752 regs->msr &= ~(MSR_SE | MSR_BE); 760 regs->msr &= ~(MSR_SE | MSR_BE);
753#endif 761#endif
@@ -769,8 +777,7 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
769 if ((data & ~0x7UL) >= TASK_SIZE) 777 if ((data & ~0x7UL) >= TASK_SIZE)
770 return -EIO; 778 return -EIO;
771 779
772#ifndef CONFIG_BOOKE 780#ifndef CONFIG_PPC_ADV_DEBUG_REGS
773
774 /* For processors using DABR (i.e. 970), the bottom 3 bits are flags. 781 /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
775 * It was assumed, on previous implementations, that 3 bits were 782 * It was assumed, on previous implementations, that 3 bits were
776 * passed together with the data address, fitting the design of the 783 * passed together with the data address, fitting the design of the
@@ -789,21 +796,22 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
789 796
790 /* Move contents to the DABR register */ 797 /* Move contents to the DABR register */
791 task->thread.dabr = data; 798 task->thread.dabr = data;
792 799#else /* CONFIG_PPC_ADV_DEBUG_REGS */
793#endif
794#if defined(CONFIG_BOOKE)
795
796 /* As described above, it was assumed 3 bits were passed with the data 800 /* As described above, it was assumed 3 bits were passed with the data
797 * address, but we will assume only the mode bits will be passed 801 * address, but we will assume only the mode bits will be passed
798 * as to not cause alignment restrictions for DAC-based processors. 802 * as to not cause alignment restrictions for DAC-based processors.
799 */ 803 */
800 804
801 /* DAC's hold the whole address without any mode flags */ 805 /* DAC's hold the whole address without any mode flags */
802 task->thread.dabr = data & ~0x3UL; 806 task->thread.dac1 = data & ~0x3UL;
803 807
804 if (task->thread.dabr == 0) { 808 if (task->thread.dac1 == 0) {
805 task->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | DBCR0_IDM); 809 dbcr_dac(task) &= ~(DBCR_DAC1R | DBCR_DAC1W);
806 task->thread.regs->msr &= ~MSR_DE; 810 if (!DBCR_ACTIVE_EVENTS(task->thread.dbcr0,
811 task->thread.dbcr1)) {
812 task->thread.regs->msr &= ~MSR_DE;
813 task->thread.dbcr0 &= ~DBCR0_IDM;
814 }
807 return 0; 815 return 0;
808 } 816 }
809 817
@@ -814,17 +822,17 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
814 822
815 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0 823 /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
816 register */ 824 register */
817 task->thread.dbcr0 = DBCR0_IDM; 825 task->thread.dbcr0 |= DBCR0_IDM;
818 826
819 /* Check for write and read flags and set DBCR0 827 /* Check for write and read flags and set DBCR0
820 accordingly */ 828 accordingly */
829 dbcr_dac(task) &= ~(DBCR_DAC1R|DBCR_DAC1W);
821 if (data & 0x1UL) 830 if (data & 0x1UL)
822 task->thread.dbcr0 |= DBSR_DAC1R; 831 dbcr_dac(task) |= DBCR_DAC1R;
823 if (data & 0x2UL) 832 if (data & 0x2UL)
824 task->thread.dbcr0 |= DBSR_DAC1W; 833 dbcr_dac(task) |= DBCR_DAC1W;
825
826 task->thread.regs->msr |= MSR_DE; 834 task->thread.regs->msr |= MSR_DE;
827#endif 835#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
828 return 0; 836 return 0;
829} 837}
830 838
@@ -839,6 +847,394 @@ void ptrace_disable(struct task_struct *child)
839 user_disable_single_step(child); 847 user_disable_single_step(child);
840} 848}
841 849
850#ifdef CONFIG_PPC_ADV_DEBUG_REGS
851static long set_intruction_bp(struct task_struct *child,
852 struct ppc_hw_breakpoint *bp_info)
853{
854 int slot;
855 int slot1_in_use = ((child->thread.dbcr0 & DBCR0_IAC1) != 0);
856 int slot2_in_use = ((child->thread.dbcr0 & DBCR0_IAC2) != 0);
857 int slot3_in_use = ((child->thread.dbcr0 & DBCR0_IAC3) != 0);
858 int slot4_in_use = ((child->thread.dbcr0 & DBCR0_IAC4) != 0);
859
860 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
861 slot2_in_use = 1;
862 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
863 slot4_in_use = 1;
864
865 if (bp_info->addr >= TASK_SIZE)
866 return -EIO;
867
868 if (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) {
869
870 /* Make sure range is valid. */
871 if (bp_info->addr2 >= TASK_SIZE)
872 return -EIO;
873
874 /* We need a pair of IAC regsisters */
875 if ((!slot1_in_use) && (!slot2_in_use)) {
876 slot = 1;
877 child->thread.iac1 = bp_info->addr;
878 child->thread.iac2 = bp_info->addr2;
879 child->thread.dbcr0 |= DBCR0_IAC1;
880 if (bp_info->addr_mode ==
881 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
882 dbcr_iac_range(child) |= DBCR_IAC12X;
883 else
884 dbcr_iac_range(child) |= DBCR_IAC12I;
885#if CONFIG_PPC_ADV_DEBUG_IACS > 2
886 } else if ((!slot3_in_use) && (!slot4_in_use)) {
887 slot = 3;
888 child->thread.iac3 = bp_info->addr;
889 child->thread.iac4 = bp_info->addr2;
890 child->thread.dbcr0 |= DBCR0_IAC3;
891 if (bp_info->addr_mode ==
892 PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
893 dbcr_iac_range(child) |= DBCR_IAC34X;
894 else
895 dbcr_iac_range(child) |= DBCR_IAC34I;
896#endif
897 } else
898 return -ENOSPC;
899 } else {
900 /* We only need one. If possible leave a pair free in
901 * case a range is needed later
902 */
903 if (!slot1_in_use) {
904 /*
905 * Don't use iac1 if iac1-iac2 are free and either
906 * iac3 or iac4 (but not both) are free
907 */
908 if (slot2_in_use || (slot3_in_use == slot4_in_use)) {
909 slot = 1;
910 child->thread.iac1 = bp_info->addr;
911 child->thread.dbcr0 |= DBCR0_IAC1;
912 goto out;
913 }
914 }
915 if (!slot2_in_use) {
916 slot = 2;
917 child->thread.iac2 = bp_info->addr;
918 child->thread.dbcr0 |= DBCR0_IAC2;
919#if CONFIG_PPC_ADV_DEBUG_IACS > 2
920 } else if (!slot3_in_use) {
921 slot = 3;
922 child->thread.iac3 = bp_info->addr;
923 child->thread.dbcr0 |= DBCR0_IAC3;
924 } else if (!slot4_in_use) {
925 slot = 4;
926 child->thread.iac4 = bp_info->addr;
927 child->thread.dbcr0 |= DBCR0_IAC4;
928#endif
929 } else
930 return -ENOSPC;
931 }
932out:
933 child->thread.dbcr0 |= DBCR0_IDM;
934 child->thread.regs->msr |= MSR_DE;
935
936 return slot;
937}
938
939static int del_instruction_bp(struct task_struct *child, int slot)
940{
941 switch (slot) {
942 case 1:
943 if (child->thread.iac1 == 0)
944 return -ENOENT;
945
946 if (dbcr_iac_range(child) & DBCR_IAC12MODE) {
947 /* address range - clear slots 1 & 2 */
948 child->thread.iac2 = 0;
949 dbcr_iac_range(child) &= ~DBCR_IAC12MODE;
950 }
951 child->thread.iac1 = 0;
952 child->thread.dbcr0 &= ~DBCR0_IAC1;
953 break;
954 case 2:
955 if (child->thread.iac2 == 0)
956 return -ENOENT;
957
958 if (dbcr_iac_range(child) & DBCR_IAC12MODE)
959 /* used in a range */
960 return -EINVAL;
961 child->thread.iac2 = 0;
962 child->thread.dbcr0 &= ~DBCR0_IAC2;
963 break;
964#if CONFIG_PPC_ADV_DEBUG_IACS > 2
965 case 3:
966 if (child->thread.iac3 == 0)
967 return -ENOENT;
968
969 if (dbcr_iac_range(child) & DBCR_IAC34MODE) {
970 /* address range - clear slots 3 & 4 */
971 child->thread.iac4 = 0;
972 dbcr_iac_range(child) &= ~DBCR_IAC34MODE;
973 }
974 child->thread.iac3 = 0;
975 child->thread.dbcr0 &= ~DBCR0_IAC3;
976 break;
977 case 4:
978 if (child->thread.iac4 == 0)
979 return -ENOENT;
980
981 if (dbcr_iac_range(child) & DBCR_IAC34MODE)
982 /* Used in a range */
983 return -EINVAL;
984 child->thread.iac4 = 0;
985 child->thread.dbcr0 &= ~DBCR0_IAC4;
986 break;
987#endif
988 default:
989 return -EINVAL;
990 }
991 return 0;
992}
993
994static int set_dac(struct task_struct *child, struct ppc_hw_breakpoint *bp_info)
995{
996 int byte_enable =
997 (bp_info->condition_mode >> PPC_BREAKPOINT_CONDITION_BE_SHIFT)
998 & 0xf;
999 int condition_mode =
1000 bp_info->condition_mode & PPC_BREAKPOINT_CONDITION_MODE;
1001 int slot;
1002
1003 if (byte_enable && (condition_mode == 0))
1004 return -EINVAL;
1005
1006 if (bp_info->addr >= TASK_SIZE)
1007 return -EIO;
1008
1009 if ((dbcr_dac(child) & (DBCR_DAC1R | DBCR_DAC1W)) == 0) {
1010 slot = 1;
1011 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1012 dbcr_dac(child) |= DBCR_DAC1R;
1013 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1014 dbcr_dac(child) |= DBCR_DAC1W;
1015 child->thread.dac1 = (unsigned long)bp_info->addr;
1016#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1017 if (byte_enable) {
1018 child->thread.dvc1 =
1019 (unsigned long)bp_info->condition_value;
1020 child->thread.dbcr2 |=
1021 ((byte_enable << DBCR2_DVC1BE_SHIFT) |
1022 (condition_mode << DBCR2_DVC1M_SHIFT));
1023 }
1024#endif
1025#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1026 } else if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1027 /* Both dac1 and dac2 are part of a range */
1028 return -ENOSPC;
1029#endif
1030 } else if ((dbcr_dac(child) & (DBCR_DAC2R | DBCR_DAC2W)) == 0) {
1031 slot = 2;
1032 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1033 dbcr_dac(child) |= DBCR_DAC2R;
1034 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1035 dbcr_dac(child) |= DBCR_DAC2W;
1036 child->thread.dac2 = (unsigned long)bp_info->addr;
1037#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1038 if (byte_enable) {
1039 child->thread.dvc2 =
1040 (unsigned long)bp_info->condition_value;
1041 child->thread.dbcr2 |=
1042 ((byte_enable << DBCR2_DVC2BE_SHIFT) |
1043 (condition_mode << DBCR2_DVC2M_SHIFT));
1044 }
1045#endif
1046 } else
1047 return -ENOSPC;
1048 child->thread.dbcr0 |= DBCR0_IDM;
1049 child->thread.regs->msr |= MSR_DE;
1050
1051 return slot + 4;
1052}
1053
1054static int del_dac(struct task_struct *child, int slot)
1055{
1056 if (slot == 1) {
1057 if (child->thread.dac1 == 0)
1058 return -ENOENT;
1059
1060 child->thread.dac1 = 0;
1061 dbcr_dac(child) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1062#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1063 if (child->thread.dbcr2 & DBCR2_DAC12MODE) {
1064 child->thread.dac2 = 0;
1065 child->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1066 }
1067 child->thread.dbcr2 &= ~(DBCR2_DVC1M | DBCR2_DVC1BE);
1068#endif
1069#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1070 child->thread.dvc1 = 0;
1071#endif
1072 } else if (slot == 2) {
1073 if (child->thread.dac1 == 0)
1074 return -ENOENT;
1075
1076#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1077 if (child->thread.dbcr2 & DBCR2_DAC12MODE)
1078 /* Part of a range */
1079 return -EINVAL;
1080 child->thread.dbcr2 &= ~(DBCR2_DVC2M | DBCR2_DVC2BE);
1081#endif
1082#if CONFIG_PPC_ADV_DEBUG_DVCS > 0
1083 child->thread.dvc2 = 0;
1084#endif
1085 child->thread.dac2 = 0;
1086 dbcr_dac(child) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1087 } else
1088 return -EINVAL;
1089
1090 return 0;
1091}
1092#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1093
1094#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1095static int set_dac_range(struct task_struct *child,
1096 struct ppc_hw_breakpoint *bp_info)
1097{
1098 int mode = bp_info->addr_mode & PPC_BREAKPOINT_MODE_MASK;
1099
1100 /* We don't allow range watchpoints to be used with DVC */
1101 if (bp_info->condition_mode)
1102 return -EINVAL;
1103
1104 /*
1105 * Best effort to verify the address range. The user/supervisor bits
1106 * prevent trapping in kernel space, but let's fail on an obvious bad
1107 * range. The simple test on the mask is not fool-proof, and any
1108 * exclusive range will spill over into kernel space.
1109 */
1110 if (bp_info->addr >= TASK_SIZE)
1111 return -EIO;
1112 if (mode == PPC_BREAKPOINT_MODE_MASK) {
1113 /*
1114 * dac2 is a bitmask. Don't allow a mask that makes a
1115 * kernel space address from a valid dac1 value
1116 */
1117 if (~((unsigned long)bp_info->addr2) >= TASK_SIZE)
1118 return -EIO;
1119 } else {
1120 /*
1121 * For range breakpoints, addr2 must also be a valid address
1122 */
1123 if (bp_info->addr2 >= TASK_SIZE)
1124 return -EIO;
1125 }
1126
1127 if (child->thread.dbcr0 &
1128 (DBCR0_DAC1R | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W))
1129 return -ENOSPC;
1130
1131 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
1132 child->thread.dbcr0 |= (DBCR0_DAC1R | DBCR0_IDM);
1133 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
1134 child->thread.dbcr0 |= (DBCR0_DAC1W | DBCR0_IDM);
1135 child->thread.dac1 = bp_info->addr;
1136 child->thread.dac2 = bp_info->addr2;
1137 if (mode == PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE)
1138 child->thread.dbcr2 |= DBCR2_DAC12M;
1139 else if (mode == PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE)
1140 child->thread.dbcr2 |= DBCR2_DAC12MX;
1141 else /* PPC_BREAKPOINT_MODE_MASK */
1142 child->thread.dbcr2 |= DBCR2_DAC12MM;
1143 child->thread.regs->msr |= MSR_DE;
1144
1145 return 5;
1146}
1147#endif /* CONFIG_PPC_ADV_DEBUG_DAC_RANGE */
1148
1149static long ppc_set_hwdebug(struct task_struct *child,
1150 struct ppc_hw_breakpoint *bp_info)
1151{
1152 if (bp_info->version != 1)
1153 return -ENOTSUPP;
1154#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1155 /*
1156 * Check for invalid flags and combinations
1157 */
1158 if ((bp_info->trigger_type == 0) ||
1159 (bp_info->trigger_type & ~(PPC_BREAKPOINT_TRIGGER_EXECUTE |
1160 PPC_BREAKPOINT_TRIGGER_RW)) ||
1161 (bp_info->addr_mode & ~PPC_BREAKPOINT_MODE_MASK) ||
1162 (bp_info->condition_mode &
1163 ~(PPC_BREAKPOINT_CONDITION_MODE |
1164 PPC_BREAKPOINT_CONDITION_BE_ALL)))
1165 return -EINVAL;
1166#if CONFIG_PPC_ADV_DEBUG_DVCS == 0
1167 if (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
1168 return -EINVAL;
1169#endif
1170
1171 if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_EXECUTE) {
1172 if ((bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_EXECUTE) ||
1173 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1174 return -EINVAL;
1175 return set_intruction_bp(child, bp_info);
1176 }
1177 if (bp_info->addr_mode == PPC_BREAKPOINT_MODE_EXACT)
1178 return set_dac(child, bp_info);
1179
1180#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1181 return set_dac_range(child, bp_info);
1182#else
1183 return -EINVAL;
1184#endif
1185#else /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1186 /*
1187 * We only support one data breakpoint
1188 */
1189 if (((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0) ||
1190 ((bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0) ||
1191 (bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_WRITE) ||
1192 (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) ||
1193 (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
1194 return -EINVAL;
1195
1196 if (child->thread.dabr)
1197 return -ENOSPC;
1198
1199 if ((unsigned long)bp_info->addr >= TASK_SIZE)
1200 return -EIO;
1201
1202 child->thread.dabr = (unsigned long)bp_info->addr;
1203
1204 return 1;
1205#endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
1206}
1207
1208static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
1209{
1210#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1211 int rc;
1212
1213 if (data <= 4)
1214 rc = del_instruction_bp(child, (int)data);
1215 else
1216 rc = del_dac(child, (int)data - 4);
1217
1218 if (!rc) {
1219 if (!DBCR_ACTIVE_EVENTS(child->thread.dbcr0,
1220 child->thread.dbcr1)) {
1221 child->thread.dbcr0 &= ~DBCR0_IDM;
1222 child->thread.regs->msr &= ~MSR_DE;
1223 }
1224 }
1225 return rc;
1226#else
1227 if (data != 1)
1228 return -EINVAL;
1229 if (child->thread.dabr == 0)
1230 return -ENOENT;
1231
1232 child->thread.dabr = 0;
1233
1234 return 0;
1235#endif
1236}
1237
842/* 1238/*
843 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls, 1239 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
844 * we mark them as obsolete now, they will be removed in a future version 1240 * we mark them as obsolete now, they will be removed in a future version
@@ -932,13 +1328,77 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
932 break; 1328 break;
933 } 1329 }
934 1330
1331 case PPC_PTRACE_GETHWDBGINFO: {
1332 struct ppc_debug_info dbginfo;
1333
1334 dbginfo.version = 1;
1335#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1336 dbginfo.num_instruction_bps = CONFIG_PPC_ADV_DEBUG_IACS;
1337 dbginfo.num_data_bps = CONFIG_PPC_ADV_DEBUG_DACS;
1338 dbginfo.num_condition_regs = CONFIG_PPC_ADV_DEBUG_DVCS;
1339 dbginfo.data_bp_alignment = 4;
1340 dbginfo.sizeof_condition = 4;
1341 dbginfo.features = PPC_DEBUG_FEATURE_INSN_BP_RANGE |
1342 PPC_DEBUG_FEATURE_INSN_BP_MASK;
1343#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1344 dbginfo.features |=
1345 PPC_DEBUG_FEATURE_DATA_BP_RANGE |
1346 PPC_DEBUG_FEATURE_DATA_BP_MASK;
1347#endif
1348#else /* !CONFIG_PPC_ADV_DEBUG_REGS */
1349 dbginfo.num_instruction_bps = 0;
1350 dbginfo.num_data_bps = 1;
1351 dbginfo.num_condition_regs = 0;
1352#ifdef CONFIG_PPC64
1353 dbginfo.data_bp_alignment = 8;
1354#else
1355 dbginfo.data_bp_alignment = 4;
1356#endif
1357 dbginfo.sizeof_condition = 0;
1358 dbginfo.features = 0;
1359#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1360
1361 if (!access_ok(VERIFY_WRITE, data,
1362 sizeof(struct ppc_debug_info)))
1363 return -EFAULT;
1364 ret = __copy_to_user((struct ppc_debug_info __user *)data,
1365 &dbginfo, sizeof(struct ppc_debug_info)) ?
1366 -EFAULT : 0;
1367 break;
1368 }
1369
1370 case PPC_PTRACE_SETHWDEBUG: {
1371 struct ppc_hw_breakpoint bp_info;
1372
1373 if (!access_ok(VERIFY_READ, data,
1374 sizeof(struct ppc_hw_breakpoint)))
1375 return -EFAULT;
1376 ret = __copy_from_user(&bp_info,
1377 (struct ppc_hw_breakpoint __user *)data,
1378 sizeof(struct ppc_hw_breakpoint)) ?
1379 -EFAULT : 0;
1380 if (!ret)
1381 ret = ppc_set_hwdebug(child, &bp_info);
1382 break;
1383 }
1384
1385 case PPC_PTRACE_DELHWDEBUG: {
1386 ret = ppc_del_hwdebug(child, addr, data);
1387 break;
1388 }
1389
935 case PTRACE_GET_DEBUGREG: { 1390 case PTRACE_GET_DEBUGREG: {
936 ret = -EINVAL; 1391 ret = -EINVAL;
937 /* We only support one DABR and no IABRS at the moment */ 1392 /* We only support one DABR and no IABRS at the moment */
938 if (addr > 0) 1393 if (addr > 0)
939 break; 1394 break;
1395#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1396 ret = put_user(child->thread.dac1,
1397 (unsigned long __user *)data);
1398#else
940 ret = put_user(child->thread.dabr, 1399 ret = put_user(child->thread.dabr,
941 (unsigned long __user *)data); 1400 (unsigned long __user *)data);
1401#endif
942 break; 1402 break;
943 } 1403 }
944 1404
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index 00b5078da9a3..a0afb555a7c9 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -140,17 +140,15 @@ static int do_signal_pending(sigset_t *oldset, struct pt_regs *regs)
140 return 0; /* no signals delivered */ 140 return 0; /* no signals delivered */
141 } 141 }
142 142
143#ifndef CONFIG_PPC_ADV_DEBUG_REGS
143 /* 144 /*
144 * Reenable the DABR before delivering the signal to 145 * Reenable the DABR before delivering the signal to
145 * user space. The DABR will have been cleared if it 146 * user space. The DABR will have been cleared if it
146 * triggered inside the kernel. 147 * triggered inside the kernel.
147 */ 148 */
148 if (current->thread.dabr) { 149 if (current->thread.dabr)
149 set_dabr(current->thread.dabr); 150 set_dabr(current->thread.dabr);
150#if defined(CONFIG_BOOKE)
151 mtspr(SPRN_DBCR0, current->thread.dbcr0);
152#endif 151#endif
153 }
154 152
155 if (is32) { 153 if (is32) {
156 if (ka.sa.sa_flags & SA_SIGINFO) 154 if (ka.sa.sa_flags & SA_SIGINFO)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index d670429a1608..266610119f66 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -1078,7 +1078,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1078 int i; 1078 int i;
1079 unsigned char tmp; 1079 unsigned char tmp;
1080 unsigned long new_msr = regs->msr; 1080 unsigned long new_msr = regs->msr;
1081#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 1081#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1082 unsigned long new_dbcr0 = current->thread.dbcr0; 1082 unsigned long new_dbcr0 = current->thread.dbcr0;
1083#endif 1083#endif
1084 1084
@@ -1087,13 +1087,17 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1087 return -EFAULT; 1087 return -EFAULT;
1088 switch (op.dbg_type) { 1088 switch (op.dbg_type) {
1089 case SIG_DBG_SINGLE_STEPPING: 1089 case SIG_DBG_SINGLE_STEPPING:
1090#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 1090#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1091 if (op.dbg_value) { 1091 if (op.dbg_value) {
1092 new_msr |= MSR_DE; 1092 new_msr |= MSR_DE;
1093 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC); 1093 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
1094 } else { 1094 } else {
1095 new_msr &= ~MSR_DE; 1095 new_dbcr0 &= ~DBCR0_IC;
1096 new_dbcr0 &= ~(DBCR0_IDM | DBCR0_IC); 1096 if (!DBCR_ACTIVE_EVENTS(new_dbcr0,
1097 current->thread.dbcr1)) {
1098 new_msr &= ~MSR_DE;
1099 new_dbcr0 &= ~DBCR0_IDM;
1100 }
1097 } 1101 }
1098#else 1102#else
1099 if (op.dbg_value) 1103 if (op.dbg_value)
@@ -1103,7 +1107,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1103#endif 1107#endif
1104 break; 1108 break;
1105 case SIG_DBG_BRANCH_TRACING: 1109 case SIG_DBG_BRANCH_TRACING:
1106#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 1110#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1107 return -EINVAL; 1111 return -EINVAL;
1108#else 1112#else
1109 if (op.dbg_value) 1113 if (op.dbg_value)
@@ -1124,7 +1128,7 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
1124 failure is a problem, anyway, and it's very unlikely unless 1128 failure is a problem, anyway, and it's very unlikely unless
1125 the user is really doing something wrong. */ 1129 the user is really doing something wrong. */
1126 regs->msr = new_msr; 1130 regs->msr = new_msr;
1127#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 1131#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1128 current->thread.dbcr0 = new_dbcr0; 1132 current->thread.dbcr0 = new_dbcr0;
1129#endif 1133#endif
1130 1134
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 6c6093d67f30..1b16b9a3e49a 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -265,8 +265,8 @@ void account_system_vtime(struct task_struct *tsk)
265 account_system_time(tsk, 0, delta, deltascaled); 265 account_system_time(tsk, 0, delta, deltascaled);
266 else 266 else
267 account_idle_time(delta); 267 account_idle_time(delta);
268 per_cpu(cputime_last_delta, smp_processor_id()) = delta; 268 __get_cpu_var(cputime_last_delta) = delta;
269 per_cpu(cputime_scaled_last_delta, smp_processor_id()) = deltascaled; 269 __get_cpu_var(cputime_scaled_last_delta) = deltascaled;
270 local_irq_restore(flags); 270 local_irq_restore(flags);
271} 271}
272EXPORT_SYMBOL_GPL(account_system_vtime); 272EXPORT_SYMBOL_GPL(account_system_vtime);
@@ -575,6 +575,8 @@ void timer_interrupt(struct pt_regs * regs)
575 575
576 trace_timer_interrupt_entry(regs); 576 trace_timer_interrupt_entry(regs);
577 577
578 __get_cpu_var(irq_stat).timer_irqs++;
579
578 /* Ensure a positive value is written to the decrementer, or else 580 /* Ensure a positive value is written to the decrementer, or else
579 * some CPUs will continuue to take decrementer exceptions */ 581 * some CPUs will continuue to take decrementer exceptions */
580 set_dec(DECREMENTER_MAX); 582 set_dec(DECREMENTER_MAX);
@@ -935,8 +937,8 @@ static void register_decrementer_clockevent(int cpu)
935 *dec = decrementer_clockevent; 937 *dec = decrementer_clockevent;
936 dec->cpumask = cpumask_of(cpu); 938 dec->cpumask = cpumask_of(cpu);
937 939
938 printk(KERN_DEBUG "clockevent: %s mult[%x] shift[%d] cpu[%d]\n", 940 printk_once(KERN_DEBUG "clockevent: %s mult[%x] shift[%d] cpu[%d]\n",
939 dec->name, dec->mult, dec->shift, cpu); 941 dec->name, dec->mult, dec->shift, cpu);
940 942
941 clockevents_register_device(dec); 943 clockevents_register_device(dec);
942} 944}
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index d069ff8a7e03..696626a2e835 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -60,13 +60,13 @@
60#endif 60#endif
61 61
62#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 62#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
63int (*__debugger)(struct pt_regs *regs); 63int (*__debugger)(struct pt_regs *regs) __read_mostly;
64int (*__debugger_ipi)(struct pt_regs *regs); 64int (*__debugger_ipi)(struct pt_regs *regs) __read_mostly;
65int (*__debugger_bpt)(struct pt_regs *regs); 65int (*__debugger_bpt)(struct pt_regs *regs) __read_mostly;
66int (*__debugger_sstep)(struct pt_regs *regs); 66int (*__debugger_sstep)(struct pt_regs *regs) __read_mostly;
67int (*__debugger_iabr_match)(struct pt_regs *regs); 67int (*__debugger_iabr_match)(struct pt_regs *regs) __read_mostly;
68int (*__debugger_dabr_match)(struct pt_regs *regs); 68int (*__debugger_dabr_match)(struct pt_regs *regs) __read_mostly;
69int (*__debugger_fault_handler)(struct pt_regs *regs); 69int (*__debugger_fault_handler)(struct pt_regs *regs) __read_mostly;
70 70
71EXPORT_SYMBOL(__debugger); 71EXPORT_SYMBOL(__debugger);
72EXPORT_SYMBOL(__debugger_ipi); 72EXPORT_SYMBOL(__debugger_ipi);
@@ -102,11 +102,11 @@ static inline void pmac_backlight_unblank(void) { }
102int die(const char *str, struct pt_regs *regs, long err) 102int die(const char *str, struct pt_regs *regs, long err)
103{ 103{
104 static struct { 104 static struct {
105 spinlock_t lock; 105 raw_spinlock_t lock;
106 u32 lock_owner; 106 u32 lock_owner;
107 int lock_owner_depth; 107 int lock_owner_depth;
108 } die = { 108 } die = {
109 .lock = __SPIN_LOCK_UNLOCKED(die.lock), 109 .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
110 .lock_owner = -1, 110 .lock_owner = -1,
111 .lock_owner_depth = 0 111 .lock_owner_depth = 0
112 }; 112 };
@@ -120,7 +120,7 @@ int die(const char *str, struct pt_regs *regs, long err)
120 120
121 if (die.lock_owner != raw_smp_processor_id()) { 121 if (die.lock_owner != raw_smp_processor_id()) {
122 console_verbose(); 122 console_verbose();
123 spin_lock_irqsave(&die.lock, flags); 123 raw_spin_lock_irqsave(&die.lock, flags);
124 die.lock_owner = smp_processor_id(); 124 die.lock_owner = smp_processor_id();
125 die.lock_owner_depth = 0; 125 die.lock_owner_depth = 0;
126 bust_spinlocks(1); 126 bust_spinlocks(1);
@@ -146,6 +146,11 @@ int die(const char *str, struct pt_regs *regs, long err)
146#endif 146#endif
147 printk("%s\n", ppc_md.name ? ppc_md.name : ""); 147 printk("%s\n", ppc_md.name ? ppc_md.name : "");
148 148
149 sysfs_printk_last_file();
150 if (notify_die(DIE_OOPS, str, regs, err, 255,
151 SIGSEGV) == NOTIFY_STOP)
152 return 1;
153
149 print_modules(); 154 print_modules();
150 show_regs(regs); 155 show_regs(regs);
151 } else { 156 } else {
@@ -155,7 +160,7 @@ int die(const char *str, struct pt_regs *regs, long err)
155 bust_spinlocks(0); 160 bust_spinlocks(0);
156 die.lock_owner = -1; 161 die.lock_owner = -1;
157 add_taint(TAINT_DIE); 162 add_taint(TAINT_DIE);
158 spin_unlock_irqrestore(&die.lock, flags); 163 raw_spin_unlock_irqrestore(&die.lock, flags);
159 164
160 if (kexec_should_crash(current) || 165 if (kexec_should_crash(current) ||
161 kexec_sr_activated(smp_processor_id())) 166 kexec_sr_activated(smp_processor_id()))
@@ -294,7 +299,7 @@ static inline int check_io_access(struct pt_regs *regs)
294 return 0; 299 return 0;
295} 300}
296 301
297#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE) 302#ifdef CONFIG_PPC_ADV_DEBUG_REGS
298/* On 4xx, the reason for the machine check or program exception 303/* On 4xx, the reason for the machine check or program exception
299 is in the ESR. */ 304 is in the ESR. */
300#define get_reason(regs) ((regs)->dsisr) 305#define get_reason(regs) ((regs)->dsisr)
@@ -478,6 +483,8 @@ void machine_check_exception(struct pt_regs *regs)
478{ 483{
479 int recover = 0; 484 int recover = 0;
480 485
486 __get_cpu_var(irq_stat).mce_exceptions++;
487
481 /* See if any machine dependent calls. In theory, we would want 488 /* See if any machine dependent calls. In theory, we would want
482 * to call the CPU first, and call the ppc_md. one if the CPU 489 * to call the CPU first, and call the ppc_md. one if the CPU
483 * one returns a positive number. However there is existing code 490 * one returns a positive number. However there is existing code
@@ -960,6 +967,8 @@ void vsx_unavailable_exception(struct pt_regs *regs)
960 967
961void performance_monitor_exception(struct pt_regs *regs) 968void performance_monitor_exception(struct pt_regs *regs)
962{ 969{
970 __get_cpu_var(irq_stat).pmu_irqs++;
971
963 perf_irq(regs); 972 perf_irq(regs);
964} 973}
965 974
@@ -1024,10 +1033,69 @@ void SoftwareEmulation(struct pt_regs *regs)
1024} 1033}
1025#endif /* CONFIG_8xx */ 1034#endif /* CONFIG_8xx */
1026 1035
1027#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 1036#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1037static void handle_debug(struct pt_regs *regs, unsigned long debug_status)
1038{
1039 int changed = 0;
1040 /*
1041 * Determine the cause of the debug event, clear the
1042 * event flags and send a trap to the handler. Torez
1043 */
1044 if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1045 dbcr_dac(current) &= ~(DBCR_DAC1R | DBCR_DAC1W);
1046#ifdef CONFIG_PPC_ADV_DEBUG_DAC_RANGE
1047 current->thread.dbcr2 &= ~DBCR2_DAC12MODE;
1048#endif
1049 do_send_trap(regs, mfspr(SPRN_DAC1), debug_status, TRAP_HWBKPT,
1050 5);
1051 changed |= 0x01;
1052 } else if (debug_status & (DBSR_DAC2R | DBSR_DAC2W)) {
1053 dbcr_dac(current) &= ~(DBCR_DAC2R | DBCR_DAC2W);
1054 do_send_trap(regs, mfspr(SPRN_DAC2), debug_status, TRAP_HWBKPT,
1055 6);
1056 changed |= 0x01;
1057 } else if (debug_status & DBSR_IAC1) {
1058 current->thread.dbcr0 &= ~DBCR0_IAC1;
1059 dbcr_iac_range(current) &= ~DBCR_IAC12MODE;
1060 do_send_trap(regs, mfspr(SPRN_IAC1), debug_status, TRAP_HWBKPT,
1061 1);
1062 changed |= 0x01;
1063 } else if (debug_status & DBSR_IAC2) {
1064 current->thread.dbcr0 &= ~DBCR0_IAC2;
1065 do_send_trap(regs, mfspr(SPRN_IAC2), debug_status, TRAP_HWBKPT,
1066 2);
1067 changed |= 0x01;
1068 } else if (debug_status & DBSR_IAC3) {
1069 current->thread.dbcr0 &= ~DBCR0_IAC3;
1070 dbcr_iac_range(current) &= ~DBCR_IAC34MODE;
1071 do_send_trap(regs, mfspr(SPRN_IAC3), debug_status, TRAP_HWBKPT,
1072 3);
1073 changed |= 0x01;
1074 } else if (debug_status & DBSR_IAC4) {
1075 current->thread.dbcr0 &= ~DBCR0_IAC4;
1076 do_send_trap(regs, mfspr(SPRN_IAC4), debug_status, TRAP_HWBKPT,
1077 4);
1078 changed |= 0x01;
1079 }
1080 /*
1081 * At the point this routine was called, the MSR(DE) was turned off.
1082 * Check all other debug flags and see if that bit needs to be turned
1083 * back on or not.
1084 */
1085 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0, current->thread.dbcr1))
1086 regs->msr |= MSR_DE;
1087 else
1088 /* Make sure the IDM flag is off */
1089 current->thread.dbcr0 &= ~DBCR0_IDM;
1090
1091 if (changed & 0x01)
1092 mtspr(SPRN_DBCR0, current->thread.dbcr0);
1093}
1028 1094
1029void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) 1095void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1030{ 1096{
1097 current->thread.dbsr = debug_status;
1098
1031 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while 1099 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1032 * on server, it stops on the target of the branch. In order to simulate 1100 * on server, it stops on the target of the branch. In order to simulate
1033 * the server behaviour, we thus restart right away with a single step 1101 * the server behaviour, we thus restart right away with a single step
@@ -1071,29 +1139,23 @@ void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1071 if (debugger_sstep(regs)) 1139 if (debugger_sstep(regs))
1072 return; 1140 return;
1073 1141
1074 if (user_mode(regs))
1075 current->thread.dbcr0 &= ~(DBCR0_IC);
1076
1077 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1078 } else if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1079 regs->msr &= ~MSR_DE;
1080
1081 if (user_mode(regs)) { 1142 if (user_mode(regs)) {
1082 current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | 1143 current->thread.dbcr0 &= ~DBCR0_IC;
1083 DBCR0_IDM); 1144#ifdef CONFIG_PPC_ADV_DEBUG_REGS
1084 } else { 1145 if (DBCR_ACTIVE_EVENTS(current->thread.dbcr0,
1085 /* Disable DAC interupts */ 1146 current->thread.dbcr1))
1086 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R | 1147 regs->msr |= MSR_DE;
1087 DBSR_DAC1W | DBCR0_IDM)); 1148 else
1088 1149 /* Make sure the IDM bit is off */
1089 /* Clear the DAC event */ 1150 current->thread.dbcr0 &= ~DBCR0_IDM;
1090 mtspr(SPRN_DBSR, (DBSR_DAC1R | DBSR_DAC1W)); 1151#endif
1091 } 1152 }
1092 /* Setup and send the trap to the handler */ 1153
1093 do_dabr(regs, mfspr(SPRN_DAC1), debug_status); 1154 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1094 } 1155 } else
1156 handle_debug(regs, debug_status);
1095} 1157}
1096#endif /* CONFIG_4xx || CONFIG_BOOKE */ 1158#endif /* CONFIG_PPC_ADV_DEBUG_REGS */
1097 1159
1098#if !defined(CONFIG_TAU_INT) 1160#if !defined(CONFIG_TAU_INT)
1099void TAUException(struct pt_regs *regs) 1161void TAUException(struct pt_regs *regs)
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index e68beac0a171..4d4eeb900486 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -43,62 +43,62 @@ END_FTR_SECTION_IFSET(CPU_FTR_CP_USE_DCBTZ)
43 ld r7,16(r4) 43 ld r7,16(r4)
44 ldu r8,24(r4) 44 ldu r8,24(r4)
451: std r5,8(r3) 451: std r5,8(r3)
46 ld r9,8(r4)
47 std r6,16(r3) 46 std r6,16(r3)
47 ld r9,8(r4)
48 ld r10,16(r4) 48 ld r10,16(r4)
49 std r7,24(r3) 49 std r7,24(r3)
50 ld r11,24(r4)
51 std r8,32(r3) 50 std r8,32(r3)
51 ld r11,24(r4)
52 ld r12,32(r4) 52 ld r12,32(r4)
53 std r9,40(r3) 53 std r9,40(r3)
54 ld r5,40(r4)
55 std r10,48(r3) 54 std r10,48(r3)
55 ld r5,40(r4)
56 ld r6,48(r4) 56 ld r6,48(r4)
57 std r11,56(r3) 57 std r11,56(r3)
58 ld r7,56(r4)
59 std r12,64(r3) 58 std r12,64(r3)
59 ld r7,56(r4)
60 ld r8,64(r4) 60 ld r8,64(r4)
61 std r5,72(r3) 61 std r5,72(r3)
62 ld r9,72(r4)
63 std r6,80(r3) 62 std r6,80(r3)
63 ld r9,72(r4)
64 ld r10,80(r4) 64 ld r10,80(r4)
65 std r7,88(r3) 65 std r7,88(r3)
66 ld r11,88(r4)
67 std r8,96(r3) 66 std r8,96(r3)
67 ld r11,88(r4)
68 ld r12,96(r4) 68 ld r12,96(r4)
69 std r9,104(r3) 69 std r9,104(r3)
70 ld r5,104(r4)
71 std r10,112(r3) 70 std r10,112(r3)
71 ld r5,104(r4)
72 ld r6,112(r4) 72 ld r6,112(r4)
73 std r11,120(r3) 73 std r11,120(r3)
74 ld r7,120(r4)
75 stdu r12,128(r3) 74 stdu r12,128(r3)
75 ld r7,120(r4)
76 ldu r8,128(r4) 76 ldu r8,128(r4)
77 bdnz 1b 77 bdnz 1b
78 78
79 std r5,8(r3) 79 std r5,8(r3)
80 ld r9,8(r4)
81 std r6,16(r3) 80 std r6,16(r3)
81 ld r9,8(r4)
82 ld r10,16(r4) 82 ld r10,16(r4)
83 std r7,24(r3) 83 std r7,24(r3)
84 ld r11,24(r4)
85 std r8,32(r3) 84 std r8,32(r3)
85 ld r11,24(r4)
86 ld r12,32(r4) 86 ld r12,32(r4)
87 std r9,40(r3) 87 std r9,40(r3)
88 ld r5,40(r4)
89 std r10,48(r3) 88 std r10,48(r3)
89 ld r5,40(r4)
90 ld r6,48(r4) 90 ld r6,48(r4)
91 std r11,56(r3) 91 std r11,56(r3)
92 ld r7,56(r4)
93 std r12,64(r3) 92 std r12,64(r3)
93 ld r7,56(r4)
94 ld r8,64(r4) 94 ld r8,64(r4)
95 std r5,72(r3) 95 std r5,72(r3)
96 ld r9,72(r4)
97 std r6,80(r3) 96 std r6,80(r3)
97 ld r9,72(r4)
98 ld r10,80(r4) 98 ld r10,80(r4)
99 std r7,88(r3) 99 std r7,88(r3)
100 ld r11,88(r4)
101 std r8,96(r3) 100 std r8,96(r3)
101 ld r11,88(r4)
102 ld r12,96(r4) 102 ld r12,96(r4)
103 std r9,104(r3) 103 std r9,104(r3)
104 std r10,112(r3) 104 std r10,112(r3)
diff --git a/arch/powerpc/lib/copyuser_64.S b/arch/powerpc/lib/copyuser_64.S
index 693b14a778fa..578b625d6a3c 100644
--- a/arch/powerpc/lib/copyuser_64.S
+++ b/arch/powerpc/lib/copyuser_64.S
@@ -44,37 +44,55 @@ BEGIN_FTR_SECTION
44 andi. r0,r4,7 44 andi. r0,r4,7
45 bne .Lsrc_unaligned 45 bne .Lsrc_unaligned
46END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD) 46END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
47 srdi r7,r5,4 47 blt cr1,.Ldo_tail /* if < 16 bytes to copy */
4820: ld r9,0(r4) 48 srdi r0,r5,5
49 addi r4,r4,-8 49 cmpdi cr1,r0,0
50 mtctr r7 5020: ld r7,0(r4)
51 andi. r5,r5,7 51220: ld r6,8(r4)
52 bf cr7*4+0,22f 52 addi r4,r4,16
53 addi r3,r3,8 53 mtctr r0
54 addi r4,r4,8 54 andi. r0,r5,0x10
55 mr r8,r9 55 beq 22f
56 blt cr1,72f 56 addi r3,r3,16
5721: ld r9,8(r4) 57 addi r4,r4,-16
5870: std r8,8(r3) 58 mr r9,r7
5922: ldu r8,16(r4) 59 mr r8,r6
6071: stdu r9,16(r3) 60 beq cr1,72f
6121: ld r7,16(r4)
62221: ld r6,24(r4)
63 addi r4,r4,32
6470: std r9,0(r3)
65270: std r8,8(r3)
6622: ld r9,0(r4)
67222: ld r8,8(r4)
6871: std r7,16(r3)
69271: std r6,24(r3)
70 addi r3,r3,32
61 bdnz 21b 71 bdnz 21b
6272: std r8,8(r3) 7272: std r9,0(r3)
73272: std r8,8(r3)
74 andi. r5,r5,0xf
63 beq+ 3f 75 beq+ 3f
64 addi r3,r3,16 76 addi r4,r4,16
65.Ldo_tail: 77.Ldo_tail:
66 bf cr7*4+1,1f 78 addi r3,r3,16
6723: lwz r9,8(r4) 79 bf cr7*4+0,246f
80244: ld r9,0(r4)
81 addi r4,r4,8
82245: std r9,0(r3)
83 addi r3,r3,8
84246: bf cr7*4+1,1f
8523: lwz r9,0(r4)
68 addi r4,r4,4 86 addi r4,r4,4
6973: stw r9,0(r3) 8773: stw r9,0(r3)
70 addi r3,r3,4 88 addi r3,r3,4
711: bf cr7*4+2,2f 891: bf cr7*4+2,2f
7244: lhz r9,8(r4) 9044: lhz r9,0(r4)
73 addi r4,r4,2 91 addi r4,r4,2
7474: sth r9,0(r3) 9274: sth r9,0(r3)
75 addi r3,r3,2 93 addi r3,r3,2
762: bf cr7*4+3,3f 942: bf cr7*4+3,3f
7745: lbz r9,8(r4) 9545: lbz r9,0(r4)
7875: stb r9,0(r3) 9675: stb r9,0(r3)
793: li r3,0 973: li r3,0
80 blr 98 blr
@@ -220,7 +238,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
220131: 238131:
221 addi r3,r3,8 239 addi r3,r3,8
222120: 240120:
241320:
223122: 242122:
243322:
224124: 244124:
225125: 245125:
226126: 246126:
@@ -229,9 +249,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
229129: 249129:
230133: 250133:
231 addi r3,r3,8 251 addi r3,r3,8
232121:
233132: 252132:
234 addi r3,r3,8 253 addi r3,r3,8
254121:
255321:
256344:
235134: 257134:
236135: 258135:
237138: 259138:
@@ -303,18 +325,22 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
303183: 325183:
304 add r3,r3,r7 326 add r3,r3,r7
305 b 1f 327 b 1f
328371:
306180: 329180:
307 addi r3,r3,8 330 addi r3,r3,8
308171: 331171:
309177: 332177:
310 addi r3,r3,8 333 addi r3,r3,8
311170: 334370:
312172: 335372:
313176: 336176:
314178: 337178:
315 addi r3,r3,4 338 addi r3,r3,4
316185: 339185:
317 addi r3,r3,4 340 addi r3,r3,4
341170:
342172:
343345:
318173: 344173:
319174: 345174:
320175: 346175:
@@ -341,11 +367,19 @@ END_FTR_SECTION_IFCLR(CPU_FTR_UNALIGNED_LD_STD)
341 .section __ex_table,"a" 367 .section __ex_table,"a"
342 .align 3 368 .align 3
343 .llong 20b,120b 369 .llong 20b,120b
370 .llong 220b,320b
344 .llong 21b,121b 371 .llong 21b,121b
372 .llong 221b,321b
345 .llong 70b,170b 373 .llong 70b,170b
374 .llong 270b,370b
346 .llong 22b,122b 375 .llong 22b,122b
376 .llong 222b,322b
347 .llong 71b,171b 377 .llong 71b,171b
378 .llong 271b,371b
348 .llong 72b,172b 379 .llong 72b,172b
380 .llong 272b,372b
381 .llong 244b,344b
382 .llong 245b,345b
349 .llong 23b,123b 383 .llong 23b,123b
350 .llong 73b,173b 384 .llong 73b,173b
351 .llong 44b,144b 385 .llong 44b,144b
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
index 7e8865bcd683..e640175b65ae 100644
--- a/arch/powerpc/lib/feature-fixups.c
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -112,7 +112,8 @@ void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
112 112
113void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end) 113void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
114{ 114{
115 unsigned int *start, *end, *dest; 115 long *start, *end;
116 unsigned int *dest;
116 117
117 if (!(value & CPU_FTR_LWSYNC)) 118 if (!(value & CPU_FTR_LWSYNC))
118 return ; 119 return ;
diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c
index 08dfa8e6d86f..65abfcfaaa9e 100644
--- a/arch/powerpc/mm/40x_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -84,8 +84,8 @@ void __init MMU_init_hw(void)
84 * vectors and the kernel live in real-mode. 84 * vectors and the kernel live in real-mode.
85 */ 85 */
86 86
87 mtspr(SPRN_DCCR, 0xF0000000); /* 512 MB of data space at 0x0. */ 87 mtspr(SPRN_DCCR, 0xFFFF0000); /* 2GByte of data space at 0x0. */
88 mtspr(SPRN_ICCR, 0xF0000000); /* 512 MB of instr. space at 0x0. */ 88 mtspr(SPRN_ICCR, 0xFFFF0000); /* 2GByte of instr. space at 0x0. */
89} 89}
90 90
91#define LARGE_PAGE_SIZE_16M (1<<24) 91#define LARGE_PAGE_SIZE_16M (1<<24)
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 056d23a1b105..784a400e0781 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -37,7 +37,7 @@
37 37
38#define HPTE_LOCK_BIT 3 38#define HPTE_LOCK_BIT 3
39 39
40static DEFINE_SPINLOCK(native_tlbie_lock); 40static DEFINE_RAW_SPINLOCK(native_tlbie_lock);
41 41
42static inline void __tlbie(unsigned long va, int psize, int ssize) 42static inline void __tlbie(unsigned long va, int psize, int ssize)
43{ 43{
@@ -104,7 +104,7 @@ static inline void tlbie(unsigned long va, int psize, int ssize, int local)
104 if (use_local) 104 if (use_local)
105 use_local = mmu_psize_defs[psize].tlbiel; 105 use_local = mmu_psize_defs[psize].tlbiel;
106 if (lock_tlbie && !use_local) 106 if (lock_tlbie && !use_local)
107 spin_lock(&native_tlbie_lock); 107 raw_spin_lock(&native_tlbie_lock);
108 asm volatile("ptesync": : :"memory"); 108 asm volatile("ptesync": : :"memory");
109 if (use_local) { 109 if (use_local) {
110 __tlbiel(va, psize, ssize); 110 __tlbiel(va, psize, ssize);
@@ -114,7 +114,7 @@ static inline void tlbie(unsigned long va, int psize, int ssize, int local)
114 asm volatile("eieio; tlbsync; ptesync": : :"memory"); 114 asm volatile("eieio; tlbsync; ptesync": : :"memory");
115 } 115 }
116 if (lock_tlbie && !use_local) 116 if (lock_tlbie && !use_local)
117 spin_unlock(&native_tlbie_lock); 117 raw_spin_unlock(&native_tlbie_lock);
118} 118}
119 119
120static inline void native_lock_hpte(struct hash_pte *hptep) 120static inline void native_lock_hpte(struct hash_pte *hptep)
@@ -122,7 +122,7 @@ static inline void native_lock_hpte(struct hash_pte *hptep)
122 unsigned long *word = &hptep->v; 122 unsigned long *word = &hptep->v;
123 123
124 while (1) { 124 while (1) {
125 if (!test_and_set_bit(HPTE_LOCK_BIT, word)) 125 if (!test_and_set_bit_lock(HPTE_LOCK_BIT, word))
126 break; 126 break;
127 while(test_bit(HPTE_LOCK_BIT, word)) 127 while(test_bit(HPTE_LOCK_BIT, word))
128 cpu_relax(); 128 cpu_relax();
@@ -133,8 +133,7 @@ static inline void native_unlock_hpte(struct hash_pte *hptep)
133{ 133{
134 unsigned long *word = &hptep->v; 134 unsigned long *word = &hptep->v;
135 135
136 asm volatile("lwsync":::"memory"); 136 clear_bit_unlock(HPTE_LOCK_BIT, word);
137 clear_bit(HPTE_LOCK_BIT, word);
138} 137}
139 138
140static long native_hpte_insert(unsigned long hpte_group, unsigned long va, 139static long native_hpte_insert(unsigned long hpte_group, unsigned long va,
@@ -434,7 +433,7 @@ static void native_hpte_clear(void)
434 /* we take the tlbie lock and hold it. Some hardware will 433 /* we take the tlbie lock and hold it. Some hardware will
435 * deadlock if we try to tlbie from two processors at once. 434 * deadlock if we try to tlbie from two processors at once.
436 */ 435 */
437 spin_lock(&native_tlbie_lock); 436 raw_spin_lock(&native_tlbie_lock);
438 437
439 slots = pteg_count * HPTES_PER_GROUP; 438 slots = pteg_count * HPTES_PER_GROUP;
440 439
@@ -458,7 +457,7 @@ static void native_hpte_clear(void)
458 } 457 }
459 458
460 asm volatile("eieio; tlbsync; ptesync":::"memory"); 459 asm volatile("eieio; tlbsync; ptesync":::"memory");
461 spin_unlock(&native_tlbie_lock); 460 raw_spin_unlock(&native_tlbie_lock);
462 local_irq_restore(flags); 461 local_irq_restore(flags);
463} 462}
464 463
@@ -521,7 +520,7 @@ static void native_flush_hash_range(unsigned long number, int local)
521 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE); 520 int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
522 521
523 if (lock_tlbie) 522 if (lock_tlbie)
524 spin_lock(&native_tlbie_lock); 523 raw_spin_lock(&native_tlbie_lock);
525 524
526 asm volatile("ptesync":::"memory"); 525 asm volatile("ptesync":::"memory");
527 for (i = 0; i < number; i++) { 526 for (i = 0; i < number; i++) {
@@ -536,7 +535,7 @@ static void native_flush_hash_range(unsigned long number, int local)
536 asm volatile("eieio; tlbsync; ptesync":::"memory"); 535 asm volatile("eieio; tlbsync; ptesync":::"memory");
537 536
538 if (lock_tlbie) 537 if (lock_tlbie)
539 spin_unlock(&native_tlbie_lock); 538 raw_spin_unlock(&native_tlbie_lock);
540 } 539 }
541 540
542 local_irq_restore(flags); 541 local_irq_restore(flags);
diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c
index b910d37aea1a..51622daae09d 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -23,7 +23,7 @@
23#include <asm/mmu_context.h> 23#include <asm/mmu_context.h>
24 24
25static DEFINE_SPINLOCK(mmu_context_lock); 25static DEFINE_SPINLOCK(mmu_context_lock);
26static DEFINE_IDR(mmu_context_idr); 26static DEFINE_IDA(mmu_context_ida);
27 27
28/* 28/*
29 * The proto-VSID space has 2^35 - 1 segments available for user mappings. 29 * The proto-VSID space has 2^35 - 1 segments available for user mappings.
@@ -39,11 +39,11 @@ int __init_new_context(void)
39 int err; 39 int err;
40 40
41again: 41again:
42 if (!idr_pre_get(&mmu_context_idr, GFP_KERNEL)) 42 if (!ida_pre_get(&mmu_context_ida, GFP_KERNEL))
43 return -ENOMEM; 43 return -ENOMEM;
44 44
45 spin_lock(&mmu_context_lock); 45 spin_lock(&mmu_context_lock);
46 err = idr_get_new_above(&mmu_context_idr, NULL, 1, &index); 46 err = ida_get_new_above(&mmu_context_ida, 1, &index);
47 spin_unlock(&mmu_context_lock); 47 spin_unlock(&mmu_context_lock);
48 48
49 if (err == -EAGAIN) 49 if (err == -EAGAIN)
@@ -53,7 +53,7 @@ again:
53 53
54 if (index > MAX_CONTEXT) { 54 if (index > MAX_CONTEXT) {
55 spin_lock(&mmu_context_lock); 55 spin_lock(&mmu_context_lock);
56 idr_remove(&mmu_context_idr, index); 56 ida_remove(&mmu_context_ida, index);
57 spin_unlock(&mmu_context_lock); 57 spin_unlock(&mmu_context_lock);
58 return -ENOMEM; 58 return -ENOMEM;
59 } 59 }
@@ -85,7 +85,7 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
85void __destroy_context(int context_id) 85void __destroy_context(int context_id)
86{ 86{
87 spin_lock(&mmu_context_lock); 87 spin_lock(&mmu_context_lock);
88 idr_remove(&mmu_context_idr, context_id); 88 ida_remove(&mmu_context_ida, context_id);
89 spin_unlock(&mmu_context_lock); 89 spin_unlock(&mmu_context_lock);
90} 90}
91EXPORT_SYMBOL_GPL(__destroy_context); 91EXPORT_SYMBOL_GPL(__destroy_context);
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 1044a634b6d0..dbc692145ecb 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -56,7 +56,7 @@ static unsigned int next_context, nr_free_contexts;
56static unsigned long *context_map; 56static unsigned long *context_map;
57static unsigned long *stale_map[NR_CPUS]; 57static unsigned long *stale_map[NR_CPUS];
58static struct mm_struct **context_mm; 58static struct mm_struct **context_mm;
59static DEFINE_SPINLOCK(context_lock); 59static DEFINE_RAW_SPINLOCK(context_lock);
60 60
61#define CTX_MAP_SIZE \ 61#define CTX_MAP_SIZE \
62 (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1)) 62 (sizeof(unsigned long) * (last_context / BITS_PER_LONG + 1))
@@ -121,9 +121,9 @@ static unsigned int steal_context_smp(unsigned int id)
121 /* This will happen if you have more CPUs than available contexts, 121 /* This will happen if you have more CPUs than available contexts,
122 * all we can do here is wait a bit and try again 122 * all we can do here is wait a bit and try again
123 */ 123 */
124 spin_unlock(&context_lock); 124 raw_spin_unlock(&context_lock);
125 cpu_relax(); 125 cpu_relax();
126 spin_lock(&context_lock); 126 raw_spin_lock(&context_lock);
127 127
128 /* This will cause the caller to try again */ 128 /* This will cause the caller to try again */
129 return MMU_NO_CONTEXT; 129 return MMU_NO_CONTEXT;
@@ -194,7 +194,7 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
194 unsigned long *map; 194 unsigned long *map;
195 195
196 /* No lockless fast path .. yet */ 196 /* No lockless fast path .. yet */
197 spin_lock(&context_lock); 197 raw_spin_lock(&context_lock);
198 198
199 pr_hard("[%d] activating context for mm @%p, active=%d, id=%d", 199 pr_hard("[%d] activating context for mm @%p, active=%d, id=%d",
200 cpu, next, next->context.active, next->context.id); 200 cpu, next, next->context.active, next->context.id);
@@ -278,7 +278,7 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
278 /* Flick the MMU and release lock */ 278 /* Flick the MMU and release lock */
279 pr_hardcont(" -> %d\n", id); 279 pr_hardcont(" -> %d\n", id);
280 set_context(id, next->pgd); 280 set_context(id, next->pgd);
281 spin_unlock(&context_lock); 281 raw_spin_unlock(&context_lock);
282} 282}
283 283
284/* 284/*
@@ -307,7 +307,7 @@ void destroy_context(struct mm_struct *mm)
307 307
308 WARN_ON(mm->context.active != 0); 308 WARN_ON(mm->context.active != 0);
309 309
310 spin_lock_irqsave(&context_lock, flags); 310 raw_spin_lock_irqsave(&context_lock, flags);
311 id = mm->context.id; 311 id = mm->context.id;
312 if (id != MMU_NO_CONTEXT) { 312 if (id != MMU_NO_CONTEXT) {
313 __clear_bit(id, context_map); 313 __clear_bit(id, context_map);
@@ -318,7 +318,7 @@ void destroy_context(struct mm_struct *mm)
318 context_mm[id] = NULL; 318 context_mm[id] = NULL;
319 nr_free_contexts++; 319 nr_free_contexts++;
320 } 320 }
321 spin_unlock_irqrestore(&context_lock, flags); 321 raw_spin_unlock_irqrestore(&context_lock, flags);
322} 322}
323 323
324#ifdef CONFIG_SMP 324#ifdef CONFIG_SMP
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index f288279e679d..8b04c54e596f 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * Low leve TLB miss handlers for Book3E 2 * Low level TLB miss handlers for Book3E
3 * 3 *
4 * Copyright (C) 2008-2009 4 * Copyright (C) 2008-2009
5 * Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp. 5 * Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp.
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 2fbc680c2c71..e81d5d67f834 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -150,7 +150,7 @@ EXPORT_SYMBOL(local_flush_tlb_page);
150 */ 150 */
151#ifdef CONFIG_SMP 151#ifdef CONFIG_SMP
152 152
153static DEFINE_SPINLOCK(tlbivax_lock); 153static DEFINE_RAW_SPINLOCK(tlbivax_lock);
154 154
155static int mm_is_core_local(struct mm_struct *mm) 155static int mm_is_core_local(struct mm_struct *mm)
156{ 156{
@@ -232,10 +232,10 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
232 if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) { 232 if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
233 int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL); 233 int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL);
234 if (lock) 234 if (lock)
235 spin_lock(&tlbivax_lock); 235 raw_spin_lock(&tlbivax_lock);
236 _tlbivax_bcast(vmaddr, pid, tsize, ind); 236 _tlbivax_bcast(vmaddr, pid, tsize, ind);
237 if (lock) 237 if (lock)
238 spin_unlock(&tlbivax_lock); 238 raw_spin_unlock(&tlbivax_lock);
239 goto bail; 239 goto bail;
240 } else { 240 } else {
241 struct tlb_flush_param p = { 241 struct tlb_flush_param p = {
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
index 84544d072043..4c42246b86a7 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -698,8 +698,7 @@ static struct clk_interface mpc5121_clk_functions = {
698 .clk_get_parent = NULL, 698 .clk_get_parent = NULL,
699}; 699};
700 700
701static int 701int __init mpc5121_clk_init(void)
702mpc5121_clk_init(void)
703{ 702{
704 struct device_node *np; 703 struct device_node *np;
705 704
@@ -724,6 +723,3 @@ mpc5121_clk_init(void)
724 clk_functions = mpc5121_clk_functions; 723 clk_functions = mpc5121_clk_functions;
725 return 0; 724 return 0;
726} 725}
727
728
729arch_initcall(mpc5121_clk_init);
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 441abc488851..ee6ae129c25c 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -64,8 +64,9 @@ define_machine(mpc5121_ads) {
64 .name = "MPC5121 ADS", 64 .name = "MPC5121 ADS",
65 .probe = mpc5121_ads_probe, 65 .probe = mpc5121_ads_probe,
66 .setup_arch = mpc5121_ads_setup_arch, 66 .setup_arch = mpc5121_ads_setup_arch,
67 .init = mpc512x_declare_of_platform_devices, 67 .init = mpc512x_init,
68 .init_IRQ = mpc5121_ads_init_IRQ, 68 .init_IRQ = mpc5121_ads_init_IRQ,
69 .get_irq = ipic_get_irq, 69 .get_irq = ipic_get_irq,
70 .calibrate_decr = generic_calibrate_decr, 70 .calibrate_decr = generic_calibrate_decr,
71 .restart = mpc512x_restart,
71}; 72};
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
index da9b20a63769..4ecf4cf9a51b 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -79,7 +79,7 @@ cpld_unmask_irq(unsigned int irq)
79} 79}
80 80
81static struct irq_chip cpld_pic = { 81static struct irq_chip cpld_pic = {
82 .name = " CPLD PIC ", 82 .name = "CPLD PIC",
83 .mask = cpld_mask_irq, 83 .mask = cpld_mask_irq,
84 .ack = cpld_mask_irq, 84 .ack = cpld_mask_irq,
85 .unmask = cpld_unmask_irq, 85 .unmask = cpld_unmask_irq,
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
index 2479de9e2d12..a6c0e3a2615d 100644
--- a/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -51,8 +51,9 @@ static int __init mpc5121_generic_probe(void)
51define_machine(mpc5121_generic) { 51define_machine(mpc5121_generic) {
52 .name = "MPC5121 generic", 52 .name = "MPC5121 generic",
53 .probe = mpc5121_generic_probe, 53 .probe = mpc5121_generic_probe,
54 .init = mpc512x_declare_of_platform_devices, 54 .init = mpc512x_init,
55 .init_IRQ = mpc512x_init_IRQ, 55 .init_IRQ = mpc512x_init_IRQ,
56 .get_irq = ipic_get_irq, 56 .get_irq = ipic_get_irq,
57 .calibrate_decr = generic_calibrate_decr, 57 .calibrate_decr = generic_calibrate_decr,
58 .restart = mpc512x_restart,
58}; 59};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
index 22a5352407e0..b2daca0d1488 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -12,5 +12,8 @@
12#ifndef __MPC512X_H__ 12#ifndef __MPC512X_H__
13#define __MPC512X_H__ 13#define __MPC512X_H__
14extern void __init mpc512x_init_IRQ(void); 14extern void __init mpc512x_init_IRQ(void);
15extern void __init mpc512x_init(void);
16extern int __init mpc5121_clk_init(void);
15void __init mpc512x_declare_of_platform_devices(void); 17void __init mpc512x_declare_of_platform_devices(void);
18extern void mpc512x_restart(char *cmd);
16#endif /* __MPC512X_H__ */ 19#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
index 434d683df5a0..b7f518a60f03 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -21,9 +21,38 @@
21#include <asm/ipic.h> 21#include <asm/ipic.h>
22#include <asm/prom.h> 22#include <asm/prom.h>
23#include <asm/time.h> 23#include <asm/time.h>
24#include <asm/mpc5121.h>
24 25
25#include "mpc512x.h" 26#include "mpc512x.h"
26 27
28static struct mpc512x_reset_module __iomem *reset_module_base;
29
30static void __init mpc512x_restart_init(void)
31{
32 struct device_node *np;
33
34 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
35 if (!np)
36 return;
37
38 reset_module_base = of_iomap(np, 0);
39 of_node_put(np);
40}
41
42void mpc512x_restart(char *cmd)
43{
44 if (reset_module_base) {
45 /* Enable software reset "RSTE" */
46 out_be32(&reset_module_base->rpr, 0x52535445);
47 /* Set software hard reset */
48 out_be32(&reset_module_base->rcr, 0x2);
49 } else {
50 pr_err("Restart module not mapped.\n");
51 }
52 for (;;)
53 ;
54}
55
27void __init mpc512x_init_IRQ(void) 56void __init mpc512x_init_IRQ(void)
28{ 57{
29 struct device_node *np; 58 struct device_node *np;
@@ -53,8 +82,22 @@ static struct of_device_id __initdata of_bus_ids[] = {
53 82
54void __init mpc512x_declare_of_platform_devices(void) 83void __init mpc512x_declare_of_platform_devices(void)
55{ 84{
85 struct device_node *np;
86
56 if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) 87 if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
57 printk(KERN_ERR __FILE__ ": " 88 printk(KERN_ERR __FILE__ ": "
58 "Error while probing of_platform bus\n"); 89 "Error while probing of_platform bus\n");
90
91 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
92 if (np) {
93 of_platform_device_create(np, NULL, NULL);
94 of_node_put(np);
95 }
59} 96}
60 97
98void __init mpc512x_init(void)
99{
100 mpc512x_declare_of_platform_devices();
101 mpc5121_clk_init();
102 mpc512x_restart_init();
103}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index cc29c0f5300d..04d105d689f1 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -302,11 +302,14 @@ static struct of_device_id mpc85xx_ids[] = {
302 { .compatible = "gianfar", }, 302 { .compatible = "gianfar", },
303 { .compatible = "fsl,rapidio-delta", }, 303 { .compatible = "fsl,rapidio-delta", },
304 { .compatible = "fsl,mpc8548-guts", }, 304 { .compatible = "fsl,mpc8548-guts", },
305 { .compatible = "gpio-leds", },
305 {}, 306 {},
306}; 307};
307 308
308static int __init mpc85xx_publish_devices(void) 309static int __init mpc85xx_publish_devices(void)
309{ 310{
311 if (machine_is(mpc8568_mds))
312 simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio");
310 if (machine_is(mpc8569_mds)) 313 if (machine_is(mpc8569_mds))
311 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); 314 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
312 315
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index e5da5f62b24a..42e87f08aa01 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -232,7 +232,7 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
232} 232}
233 233
234static struct irq_chip socrates_fpga_pic_chip = { 234static struct irq_chip socrates_fpga_pic_chip = {
235 .name = " FPGA-PIC ", 235 .name = "FPGA-PIC",
236 .ack = socrates_fpga_pic_ack, 236 .ack = socrates_fpga_pic_ack,
237 .mask = socrates_fpga_pic_mask, 237 .mask = socrates_fpga_pic_mask,
238 .mask_ack = socrates_fpga_pic_mask_ack, 238 .mask_ack = socrates_fpga_pic_mask_ack,
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index f559918f3c6f..bc33d1859ae7 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -134,7 +134,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
134 pvid = mfspr(SPRN_PVR); 134 pvid = mfspr(SPRN_PVR);
135 svid = mfspr(SPRN_SVR); 135 svid = mfspr(SPRN_SVR);
136 136
137 seq_printf(m, "Vendor\t\t: RPC Electronics STx \n"); 137 seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
138 seq_printf(m, "PVR\t\t: 0x%x\n", pvid); 138 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
139 seq_printf(m, "SVR\t\t: 0x%x\n", svid); 139 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
140 140
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c
index 35b1ec492715..2516c1cf8467 100644
--- a/arch/powerpc/platforms/cell/beat_htab.c
+++ b/arch/powerpc/platforms/cell/beat_htab.c
@@ -40,7 +40,7 @@
40#define DBG_LOW(fmt...) do { } while (0) 40#define DBG_LOW(fmt...) do { } while (0)
41#endif 41#endif
42 42
43static DEFINE_SPINLOCK(beat_htab_lock); 43static DEFINE_RAW_SPINLOCK(beat_htab_lock);
44 44
45static inline unsigned int beat_read_mask(unsigned hpte_group) 45static inline unsigned int beat_read_mask(unsigned hpte_group)
46{ 46{
@@ -114,18 +114,18 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
114 if (rflags & _PAGE_NO_CACHE) 114 if (rflags & _PAGE_NO_CACHE)
115 hpte_r &= ~_PAGE_COHERENT; 115 hpte_r &= ~_PAGE_COHERENT;
116 116
117 spin_lock(&beat_htab_lock); 117 raw_spin_lock(&beat_htab_lock);
118 lpar_rc = beat_read_mask(hpte_group); 118 lpar_rc = beat_read_mask(hpte_group);
119 if (lpar_rc == 0) { 119 if (lpar_rc == 0) {
120 if (!(vflags & HPTE_V_BOLTED)) 120 if (!(vflags & HPTE_V_BOLTED))
121 DBG_LOW(" full\n"); 121 DBG_LOW(" full\n");
122 spin_unlock(&beat_htab_lock); 122 raw_spin_unlock(&beat_htab_lock);
123 return -1; 123 return -1;
124 } 124 }
125 125
126 lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, 126 lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
127 hpte_v, hpte_r, &slot); 127 hpte_v, hpte_r, &slot);
128 spin_unlock(&beat_htab_lock); 128 raw_spin_unlock(&beat_htab_lock);
129 129
130 /* 130 /*
131 * Since we try and ioremap PHBs we don't own, the pte insert 131 * Since we try and ioremap PHBs we don't own, the pte insert
@@ -198,17 +198,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
198 "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", 198 "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
199 want_v & HPTE_V_AVPN, slot, psize, newpp); 199 want_v & HPTE_V_AVPN, slot, psize, newpp);
200 200
201 spin_lock(&beat_htab_lock); 201 raw_spin_lock(&beat_htab_lock);
202 dummy0 = beat_lpar_hpte_getword0(slot); 202 dummy0 = beat_lpar_hpte_getword0(slot);
203 if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { 203 if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
204 DBG_LOW("not found !\n"); 204 DBG_LOW("not found !\n");
205 spin_unlock(&beat_htab_lock); 205 raw_spin_unlock(&beat_htab_lock);
206 return -1; 206 return -1;
207 } 207 }
208 208
209 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, 209 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
210 &dummy1); 210 &dummy1);
211 spin_unlock(&beat_htab_lock); 211 raw_spin_unlock(&beat_htab_lock);
212 if (lpar_rc != 0 || dummy0 == 0) { 212 if (lpar_rc != 0 || dummy0 == 0) {
213 DBG_LOW("not found !\n"); 213 DBG_LOW("not found !\n");
214 return -1; 214 return -1;
@@ -262,13 +262,13 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
262 vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M); 262 vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
263 va = (vsid << 28) | (ea & 0x0fffffff); 263 va = (vsid << 28) | (ea & 0x0fffffff);
264 264
265 spin_lock(&beat_htab_lock); 265 raw_spin_lock(&beat_htab_lock);
266 slot = beat_lpar_hpte_find(va, psize); 266 slot = beat_lpar_hpte_find(va, psize);
267 BUG_ON(slot == -1); 267 BUG_ON(slot == -1);
268 268
269 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, 269 lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
270 &dummy0, &dummy1); 270 &dummy0, &dummy1);
271 spin_unlock(&beat_htab_lock); 271 raw_spin_unlock(&beat_htab_lock);
272 272
273 BUG_ON(lpar_rc != 0); 273 BUG_ON(lpar_rc != 0);
274} 274}
@@ -285,18 +285,18 @@ static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
285 slot, va, psize, local); 285 slot, va, psize, local);
286 want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M); 286 want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
287 287
288 spin_lock_irqsave(&beat_htab_lock, flags); 288 raw_spin_lock_irqsave(&beat_htab_lock, flags);
289 dummy1 = beat_lpar_hpte_getword0(slot); 289 dummy1 = beat_lpar_hpte_getword0(slot);
290 290
291 if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) { 291 if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) {
292 DBG_LOW("not found !\n"); 292 DBG_LOW("not found !\n");
293 spin_unlock_irqrestore(&beat_htab_lock, flags); 293 raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
294 return; 294 return;
295 } 295 }
296 296
297 lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0, 297 lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0,
298 &dummy1, &dummy2); 298 &dummy1, &dummy2);
299 spin_unlock_irqrestore(&beat_htab_lock, flags); 299 raw_spin_unlock_irqrestore(&beat_htab_lock, flags);
300 300
301 BUG_ON(lpar_rc != 0); 301 BUG_ON(lpar_rc != 0);
302} 302}
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 36052a9ebcda..682af97321a8 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -30,7 +30,7 @@
30#include "beat_wrapper.h" 30#include "beat_wrapper.h"
31 31
32#define MAX_IRQS NR_IRQS 32#define MAX_IRQS NR_IRQS
33static DEFINE_SPINLOCK(beatic_irq_mask_lock); 33static DEFINE_RAW_SPINLOCK(beatic_irq_mask_lock);
34static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64]; 34static uint64_t beatic_irq_mask_enable[(MAX_IRQS+255)/64];
35static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64]; 35static uint64_t beatic_irq_mask_ack[(MAX_IRQS+255)/64];
36 36
@@ -65,30 +65,30 @@ static void beatic_mask_irq(unsigned int irq_plug)
65{ 65{
66 unsigned long flags; 66 unsigned long flags;
67 67
68 spin_lock_irqsave(&beatic_irq_mask_lock, flags); 68 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
69 beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); 69 beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
70 beatic_update_irq_mask(irq_plug); 70 beatic_update_irq_mask(irq_plug);
71 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); 71 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
72} 72}
73 73
74static void beatic_unmask_irq(unsigned int irq_plug) 74static void beatic_unmask_irq(unsigned int irq_plug)
75{ 75{
76 unsigned long flags; 76 unsigned long flags;
77 77
78 spin_lock_irqsave(&beatic_irq_mask_lock, flags); 78 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
79 beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); 79 beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
80 beatic_update_irq_mask(irq_plug); 80 beatic_update_irq_mask(irq_plug);
81 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); 81 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
82} 82}
83 83
84static void beatic_ack_irq(unsigned int irq_plug) 84static void beatic_ack_irq(unsigned int irq_plug)
85{ 85{
86 unsigned long flags; 86 unsigned long flags;
87 87
88 spin_lock_irqsave(&beatic_irq_mask_lock, flags); 88 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
89 beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64))); 89 beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
90 beatic_update_irq_mask(irq_plug); 90 beatic_update_irq_mask(irq_plug);
91 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); 91 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
92} 92}
93 93
94static void beatic_end_irq(unsigned int irq_plug) 94static void beatic_end_irq(unsigned int irq_plug)
@@ -103,14 +103,14 @@ static void beatic_end_irq(unsigned int irq_plug)
103 103
104 printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug); 104 printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug);
105 } 105 }
106 spin_lock_irqsave(&beatic_irq_mask_lock, flags); 106 raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
107 beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64)); 107 beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
108 beatic_update_irq_mask(irq_plug); 108 beatic_update_irq_mask(irq_plug);
109 spin_unlock_irqrestore(&beatic_irq_mask_lock, flags); 109 raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
110} 110}
111 111
112static struct irq_chip beatic_pic = { 112static struct irq_chip beatic_pic = {
113 .name = " CELL-BEAT ", 113 .name = "CELL-BEAT",
114 .unmask = beatic_unmask_irq, 114 .unmask = beatic_unmask_irq,
115 .mask = beatic_mask_irq, 115 .mask = beatic_mask_irq,
116 .eoi = beatic_end_irq, 116 .eoi = beatic_end_irq,
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 6829cf7e2bda..10eb1a443626 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -88,7 +88,7 @@ static void iic_eoi(unsigned int irq)
88} 88}
89 89
90static struct irq_chip iic_chip = { 90static struct irq_chip iic_chip = {
91 .name = " CELL-IIC ", 91 .name = "CELL-IIC",
92 .mask = iic_mask, 92 .mask = iic_mask,
93 .unmask = iic_unmask, 93 .unmask = iic_unmask,
94 .eoi = iic_eoi, 94 .eoi = iic_eoi,
@@ -133,7 +133,7 @@ static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
133 133
134 134
135static struct irq_chip iic_ioexc_chip = { 135static struct irq_chip iic_ioexc_chip = {
136 .name = " CELL-IOEX", 136 .name = "CELL-IOEX",
137 .mask = iic_mask, 137 .mask = iic_mask,
138 .unmask = iic_unmask, 138 .unmask = iic_unmask,
139 .eoi = iic_ioexc_eoi, 139 .eoi = iic_ioexc_eoi,
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 01244f254a11..5876e888e412 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -168,7 +168,7 @@ static int spider_set_irq_type(unsigned int virq, unsigned int type)
168} 168}
169 169
170static struct irq_chip spider_pic = { 170static struct irq_chip spider_pic = {
171 .name = " SPIDER ", 171 .name = "SPIDER",
172 .unmask = spider_unmask_irq, 172 .unmask = spider_unmask_irq,
173 .mask = spider_mask_irq, 173 .mask = spider_mask_irq,
174 .ack = spider_ack_irq, 174 .ack = spider_ack_irq,
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index 86c4b29eea89..ba446bf355a9 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -273,7 +273,7 @@ static void iseries_end_IRQ(unsigned int irq)
273} 273}
274 274
275static struct irq_chip iseries_pic = { 275static struct irq_chip iseries_pic = {
276 .name = "iSeries irq controller", 276 .name = "iSeries",
277 .startup = iseries_startup_IRQ, 277 .startup = iseries_startup_IRQ,
278 .shutdown = iseries_shutdown_IRQ, 278 .shutdown = iseries_shutdown_IRQ,
279 .unmask = iseries_enable_IRQ, 279 .unmask = iseries_enable_IRQ,
diff --git a/arch/powerpc/platforms/iseries/proc.c b/arch/powerpc/platforms/iseries/proc.c
index 91f4c6cd4b99..06763682db47 100644
--- a/arch/powerpc/platforms/iseries/proc.c
+++ b/arch/powerpc/platforms/iseries/proc.c
@@ -85,7 +85,7 @@ static int proc_titantod_show(struct seq_file *m, void *v)
85 85
86 seq_printf(m, " titan elapsed = %lu uSec\n", titan_usec); 86 seq_printf(m, " titan elapsed = %lu uSec\n", titan_usec);
87 seq_printf(m, " tb elapsed = %lu ticks\n", tb_ticks); 87 seq_printf(m, " tb elapsed = %lu ticks\n", tb_ticks);
88 seq_printf(m, " titan jiffies = %lu.%04lu \n", titan_jiffies, 88 seq_printf(m, " titan jiffies = %lu.%04lu\n", titan_jiffies,
89 titan_jiff_rem_usec); 89 titan_jiff_rem_usec);
90 seq_printf(m, " tb jiffies = %lu.%04lu\n", tb_jiffies, 90 seq_printf(m, " tb jiffies = %lu.%04lu\n", tb_jiffies,
91 tb_jiff_rem_usec); 91 tb_jiff_rem_usec);
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index a6cd3394feaa..b0863410517f 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -256,7 +256,7 @@ static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
256 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array, 256 mem_blocks = iSeries_process_Condor_mainstore_vpd(mb_array,
257 max_entries); 257 max_entries);
258 258
259 printk("Mainstore_VPD: numMemoryBlocks = %ld \n", mem_blocks); 259 printk("Mainstore_VPD: numMemoryBlocks = %ld\n", mem_blocks);
260 for (i = 0; i < mem_blocks; ++i) { 260 for (i = 0; i < mem_blocks; ++i) {
261 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n" 261 printk("Mainstore_VPD: block %3ld logical chunks %016lx - %016lx\n"
262 " abs chunks %016lx - %016lx\n", 262 " abs chunks %016lx - %016lx\n",
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c
index 9dd789a7370d..84d7fd9bcc69 100644
--- a/arch/powerpc/platforms/powermac/bootx_init.c
+++ b/arch/powerpc/platforms/powermac/bootx_init.c
@@ -539,7 +539,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
539 if (model 539 if (model
540 && (strcmp(model, "iMac,1") == 0 540 && (strcmp(model, "iMac,1") == 0
541 || strcmp(model, "PowerMac1,1") == 0)) { 541 || strcmp(model, "PowerMac1,1") == 0)) {
542 bootx_printf("iMac,1 detected, shutting down USB \n"); 542 bootx_printf("iMac,1 detected, shutting down USB\n");
543 out_le32((unsigned __iomem *)0x80880008, 1); /* XXX */ 543 out_le32((unsigned __iomem *)0x80880008, 1); /* XXX */
544 } 544 }
545 } 545 }
@@ -554,7 +554,7 @@ void __init bootx_init(unsigned long r3, unsigned long r4)
554 } else 554 } else
555 space = bi->totalParamsSize; 555 space = bi->totalParamsSize;
556 556
557 bootx_printf("Total space used by parameters & ramdisk: 0x%x \n", space); 557 bootx_printf("Total space used by parameters & ramdisk: 0x%x\n", space);
558 558
559 /* New BootX will have flushed all TLBs and enters kernel with 559 /* New BootX will have flushed all TLBs and enters kernel with
560 * MMU switched OFF, so this should not be useful anymore. 560 * MMU switched OFF, so this should not be useful anymore.
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index 33e815f4466c..9e1b9fd75206 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -59,10 +59,10 @@ extern struct device_node *k2_skiplist[2];
59 * We use a single global lock to protect accesses. Each driver has 59 * We use a single global lock to protect accesses. Each driver has
60 * to take care of its own locking 60 * to take care of its own locking
61 */ 61 */
62DEFINE_SPINLOCK(feature_lock); 62DEFINE_RAW_SPINLOCK(feature_lock);
63 63
64#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 64#define LOCK(flags) raw_spin_lock_irqsave(&feature_lock, flags);
65#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 65#define UNLOCK(flags) raw_spin_unlock_irqrestore(&feature_lock, flags);
66 66
67 67
68/* 68/*
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c
index c6f0f9e738e5..80a5258d0364 100644
--- a/arch/powerpc/platforms/powermac/nvram.c
+++ b/arch/powerpc/platforms/powermac/nvram.c
@@ -80,7 +80,7 @@ static int is_core_99;
80static int core99_bank = 0; 80static int core99_bank = 0;
81static int nvram_partitions[3]; 81static int nvram_partitions[3];
82// XXX Turn that into a sem 82// XXX Turn that into a sem
83static DEFINE_SPINLOCK(nv_lock); 83static DEFINE_RAW_SPINLOCK(nv_lock);
84 84
85static int (*core99_write_bank)(int bank, u8* datas); 85static int (*core99_write_bank)(int bank, u8* datas);
86static int (*core99_erase_bank)(int bank); 86static int (*core99_erase_bank)(int bank);
@@ -165,10 +165,10 @@ static unsigned char indirect_nvram_read_byte(int addr)
165 unsigned char val; 165 unsigned char val;
166 unsigned long flags; 166 unsigned long flags;
167 167
168 spin_lock_irqsave(&nv_lock, flags); 168 raw_spin_lock_irqsave(&nv_lock, flags);
169 out_8(nvram_addr, addr >> 5); 169 out_8(nvram_addr, addr >> 5);
170 val = in_8(&nvram_data[(addr & 0x1f) << 4]); 170 val = in_8(&nvram_data[(addr & 0x1f) << 4]);
171 spin_unlock_irqrestore(&nv_lock, flags); 171 raw_spin_unlock_irqrestore(&nv_lock, flags);
172 172
173 return val; 173 return val;
174} 174}
@@ -177,10 +177,10 @@ static void indirect_nvram_write_byte(int addr, unsigned char val)
177{ 177{
178 unsigned long flags; 178 unsigned long flags;
179 179
180 spin_lock_irqsave(&nv_lock, flags); 180 raw_spin_lock_irqsave(&nv_lock, flags);
181 out_8(nvram_addr, addr >> 5); 181 out_8(nvram_addr, addr >> 5);
182 out_8(&nvram_data[(addr & 0x1f) << 4], val); 182 out_8(&nvram_data[(addr & 0x1f) << 4], val);
183 spin_unlock_irqrestore(&nv_lock, flags); 183 raw_spin_unlock_irqrestore(&nv_lock, flags);
184} 184}
185 185
186 186
@@ -481,7 +481,7 @@ static void core99_nvram_sync(void)
481 if (!is_core_99 || !nvram_data || !nvram_image) 481 if (!is_core_99 || !nvram_data || !nvram_image)
482 return; 482 return;
483 483
484 spin_lock_irqsave(&nv_lock, flags); 484 raw_spin_lock_irqsave(&nv_lock, flags);
485 if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE, 485 if (!memcmp(nvram_image, (u8*)nvram_data + core99_bank*NVRAM_SIZE,
486 NVRAM_SIZE)) 486 NVRAM_SIZE))
487 goto bail; 487 goto bail;
@@ -503,7 +503,7 @@ static void core99_nvram_sync(void)
503 if (core99_write_bank(core99_bank, nvram_image)) 503 if (core99_write_bank(core99_bank, nvram_image))
504 printk("nvram: Error writing bank %d\n", core99_bank); 504 printk("nvram: Error writing bank %d\n", core99_bank);
505 bail: 505 bail:
506 spin_unlock_irqrestore(&nv_lock, flags); 506 raw_spin_unlock_irqrestore(&nv_lock, flags);
507 507
508#ifdef DEBUG 508#ifdef DEBUG
509 mdelay(2000); 509 mdelay(2000);
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index db20de512f3e..f5e3cda6660e 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -50,13 +50,13 @@ static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask)
50 value = ~value; 50 value = ~value;
51 51
52 /* Toggle the GPIO */ 52 /* Toggle the GPIO */
53 spin_lock_irqsave(&feature_lock, flags); 53 raw_spin_lock_irqsave(&feature_lock, flags);
54 tmp = readb(addr); 54 tmp = readb(addr);
55 tmp = (tmp & ~mask) | (value & mask); 55 tmp = (tmp & ~mask) | (value & mask);
56 DBG("Do write 0x%02x to GPIO %s (%p)\n", 56 DBG("Do write 0x%02x to GPIO %s (%p)\n",
57 tmp, func->node->full_name, addr); 57 tmp, func->node->full_name, addr);
58 writeb(tmp, addr); 58 writeb(tmp, addr);
59 spin_unlock_irqrestore(&feature_lock, flags); 59 raw_spin_unlock_irqrestore(&feature_lock, flags);
60 60
61 return 0; 61 return 0;
62} 62}
@@ -145,9 +145,9 @@ static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
145 struct macio_chip *macio = func->driver_data; 145 struct macio_chip *macio = func->driver_data;
146 unsigned long flags; 146 unsigned long flags;
147 147
148 spin_lock_irqsave(&feature_lock, flags); 148 raw_spin_lock_irqsave(&feature_lock, flags);
149 MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask)); 149 MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask));
150 spin_unlock_irqrestore(&feature_lock, flags); 150 raw_spin_unlock_irqrestore(&feature_lock, flags);
151 return 0; 151 return 0;
152} 152}
153 153
@@ -168,9 +168,9 @@ static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask)
168 struct macio_chip *macio = func->driver_data; 168 struct macio_chip *macio = func->driver_data;
169 unsigned long flags; 169 unsigned long flags;
170 170
171 spin_lock_irqsave(&feature_lock, flags); 171 raw_spin_lock_irqsave(&feature_lock, flags);
172 MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask)); 172 MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask));
173 spin_unlock_irqrestore(&feature_lock, flags); 173 raw_spin_unlock_irqrestore(&feature_lock, flags);
174 return 0; 174 return 0;
175} 175}
176 176
@@ -223,12 +223,12 @@ static int macio_do_write_reg32_slm(PMF_STD_ARGS, u32 offset, u32 shift,
223 if (args == NULL || args->count == 0) 223 if (args == NULL || args->count == 0)
224 return -EINVAL; 224 return -EINVAL;
225 225
226 spin_lock_irqsave(&feature_lock, flags); 226 raw_spin_lock_irqsave(&feature_lock, flags);
227 tmp = MACIO_IN32(offset); 227 tmp = MACIO_IN32(offset);
228 val = args->u[0].v << shift; 228 val = args->u[0].v << shift;
229 tmp = (tmp & ~mask) | (val & mask); 229 tmp = (tmp & ~mask) | (val & mask);
230 MACIO_OUT32(offset, tmp); 230 MACIO_OUT32(offset, tmp);
231 spin_unlock_irqrestore(&feature_lock, flags); 231 raw_spin_unlock_irqrestore(&feature_lock, flags);
232 return 0; 232 return 0;
233} 233}
234 234
@@ -243,12 +243,12 @@ static int macio_do_write_reg8_slm(PMF_STD_ARGS, u32 offset, u32 shift,
243 if (args == NULL || args->count == 0) 243 if (args == NULL || args->count == 0)
244 return -EINVAL; 244 return -EINVAL;
245 245
246 spin_lock_irqsave(&feature_lock, flags); 246 raw_spin_lock_irqsave(&feature_lock, flags);
247 tmp = MACIO_IN8(offset); 247 tmp = MACIO_IN8(offset);
248 val = args->u[0].v << shift; 248 val = args->u[0].v << shift;
249 tmp = (tmp & ~mask) | (val & mask); 249 tmp = (tmp & ~mask) | (val & mask);
250 MACIO_OUT8(offset, tmp); 250 MACIO_OUT8(offset, tmp);
251 spin_unlock_irqrestore(&feature_lock, flags); 251 raw_spin_unlock_irqrestore(&feature_lock, flags);
252 return 0; 252 return 0;
253} 253}
254 254
@@ -278,12 +278,12 @@ static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
278{ 278{
279 unsigned long flags; 279 unsigned long flags;
280 280
281 spin_lock_irqsave(&feature_lock, flags); 281 raw_spin_lock_irqsave(&feature_lock, flags);
282 /* This is fairly bogus in darwin, but it should work for our needs 282 /* This is fairly bogus in darwin, but it should work for our needs
283 * implemeted that way: 283 * implemeted that way:
284 */ 284 */
285 UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask)); 285 UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask));
286 spin_unlock_irqrestore(&feature_lock, flags); 286 raw_spin_unlock_irqrestore(&feature_lock, flags);
287 return 0; 287 return 0;
288} 288}
289 289
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 09e827296276..630a533d0e59 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -57,7 +57,7 @@ static int max_irqs;
57static int max_real_irqs; 57static int max_real_irqs;
58static u32 level_mask[4]; 58static u32 level_mask[4];
59 59
60static DEFINE_SPINLOCK(pmac_pic_lock); 60static DEFINE_RAW_SPINLOCK(pmac_pic_lock);
61 61
62#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 62#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
63static unsigned long ppc_lost_interrupts[NR_MASK_WORDS]; 63static unsigned long ppc_lost_interrupts[NR_MASK_WORDS];
@@ -85,7 +85,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq)
85 int i = src >> 5; 85 int i = src >> 5;
86 unsigned long flags; 86 unsigned long flags;
87 87
88 spin_lock_irqsave(&pmac_pic_lock, flags); 88 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
89 __clear_bit(src, ppc_cached_irq_mask); 89 __clear_bit(src, ppc_cached_irq_mask);
90 if (__test_and_clear_bit(src, ppc_lost_interrupts)) 90 if (__test_and_clear_bit(src, ppc_lost_interrupts))
91 atomic_dec(&ppc_n_lost_interrupts); 91 atomic_dec(&ppc_n_lost_interrupts);
@@ -97,7 +97,7 @@ static void pmac_mask_and_ack_irq(unsigned int virq)
97 mb(); 97 mb();
98 } while((in_le32(&pmac_irq_hw[i]->enable) & bit) 98 } while((in_le32(&pmac_irq_hw[i]->enable) & bit)
99 != (ppc_cached_irq_mask[i] & bit)); 99 != (ppc_cached_irq_mask[i] & bit));
100 spin_unlock_irqrestore(&pmac_pic_lock, flags); 100 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
101} 101}
102 102
103static void pmac_ack_irq(unsigned int virq) 103static void pmac_ack_irq(unsigned int virq)
@@ -107,12 +107,12 @@ static void pmac_ack_irq(unsigned int virq)
107 int i = src >> 5; 107 int i = src >> 5;
108 unsigned long flags; 108 unsigned long flags;
109 109
110 spin_lock_irqsave(&pmac_pic_lock, flags); 110 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
111 if (__test_and_clear_bit(src, ppc_lost_interrupts)) 111 if (__test_and_clear_bit(src, ppc_lost_interrupts))
112 atomic_dec(&ppc_n_lost_interrupts); 112 atomic_dec(&ppc_n_lost_interrupts);
113 out_le32(&pmac_irq_hw[i]->ack, bit); 113 out_le32(&pmac_irq_hw[i]->ack, bit);
114 (void)in_le32(&pmac_irq_hw[i]->ack); 114 (void)in_le32(&pmac_irq_hw[i]->ack);
115 spin_unlock_irqrestore(&pmac_pic_lock, flags); 115 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
116} 116}
117 117
118static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) 118static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
@@ -152,12 +152,12 @@ static unsigned int pmac_startup_irq(unsigned int virq)
152 unsigned long bit = 1UL << (src & 0x1f); 152 unsigned long bit = 1UL << (src & 0x1f);
153 int i = src >> 5; 153 int i = src >> 5;
154 154
155 spin_lock_irqsave(&pmac_pic_lock, flags); 155 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
156 if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0) 156 if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0)
157 out_le32(&pmac_irq_hw[i]->ack, bit); 157 out_le32(&pmac_irq_hw[i]->ack, bit);
158 __set_bit(src, ppc_cached_irq_mask); 158 __set_bit(src, ppc_cached_irq_mask);
159 __pmac_set_irq_mask(src, 0); 159 __pmac_set_irq_mask(src, 0);
160 spin_unlock_irqrestore(&pmac_pic_lock, flags); 160 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
161 161
162 return 0; 162 return 0;
163} 163}
@@ -167,10 +167,10 @@ static void pmac_mask_irq(unsigned int virq)
167 unsigned long flags; 167 unsigned long flags;
168 unsigned int src = irq_map[virq].hwirq; 168 unsigned int src = irq_map[virq].hwirq;
169 169
170 spin_lock_irqsave(&pmac_pic_lock, flags); 170 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
171 __clear_bit(src, ppc_cached_irq_mask); 171 __clear_bit(src, ppc_cached_irq_mask);
172 __pmac_set_irq_mask(src, 1); 172 __pmac_set_irq_mask(src, 1);
173 spin_unlock_irqrestore(&pmac_pic_lock, flags); 173 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
174} 174}
175 175
176static void pmac_unmask_irq(unsigned int virq) 176static void pmac_unmask_irq(unsigned int virq)
@@ -178,24 +178,24 @@ static void pmac_unmask_irq(unsigned int virq)
178 unsigned long flags; 178 unsigned long flags;
179 unsigned int src = irq_map[virq].hwirq; 179 unsigned int src = irq_map[virq].hwirq;
180 180
181 spin_lock_irqsave(&pmac_pic_lock, flags); 181 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
182 __set_bit(src, ppc_cached_irq_mask); 182 __set_bit(src, ppc_cached_irq_mask);
183 __pmac_set_irq_mask(src, 0); 183 __pmac_set_irq_mask(src, 0);
184 spin_unlock_irqrestore(&pmac_pic_lock, flags); 184 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
185} 185}
186 186
187static int pmac_retrigger(unsigned int virq) 187static int pmac_retrigger(unsigned int virq)
188{ 188{
189 unsigned long flags; 189 unsigned long flags;
190 190
191 spin_lock_irqsave(&pmac_pic_lock, flags); 191 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
192 __pmac_retrigger(irq_map[virq].hwirq); 192 __pmac_retrigger(irq_map[virq].hwirq);
193 spin_unlock_irqrestore(&pmac_pic_lock, flags); 193 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
194 return 1; 194 return 1;
195} 195}
196 196
197static struct irq_chip pmac_pic = { 197static struct irq_chip pmac_pic = {
198 .name = " PMAC-PIC ", 198 .name = "PMAC-PIC",
199 .startup = pmac_startup_irq, 199 .startup = pmac_startup_irq,
200 .mask = pmac_mask_irq, 200 .mask = pmac_mask_irq,
201 .ack = pmac_ack_irq, 201 .ack = pmac_ack_irq,
@@ -210,7 +210,7 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id)
210 int irq, bits; 210 int irq, bits;
211 int rc = IRQ_NONE; 211 int rc = IRQ_NONE;
212 212
213 spin_lock_irqsave(&pmac_pic_lock, flags); 213 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
214 for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) { 214 for (irq = max_irqs; (irq -= 32) >= max_real_irqs; ) {
215 int i = irq >> 5; 215 int i = irq >> 5;
216 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; 216 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
@@ -220,12 +220,12 @@ static irqreturn_t gatwick_action(int cpl, void *dev_id)
220 if (bits == 0) 220 if (bits == 0)
221 continue; 221 continue;
222 irq += __ilog2(bits); 222 irq += __ilog2(bits);
223 spin_unlock_irqrestore(&pmac_pic_lock, flags); 223 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
224 generic_handle_irq(irq); 224 generic_handle_irq(irq);
225 spin_lock_irqsave(&pmac_pic_lock, flags); 225 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
226 rc = IRQ_HANDLED; 226 rc = IRQ_HANDLED;
227 } 227 }
228 spin_unlock_irqrestore(&pmac_pic_lock, flags); 228 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
229 return rc; 229 return rc;
230} 230}
231 231
@@ -244,7 +244,7 @@ static unsigned int pmac_pic_get_irq(void)
244 return NO_IRQ_IGNORE; /* ignore, already handled */ 244 return NO_IRQ_IGNORE; /* ignore, already handled */
245 } 245 }
246#endif /* CONFIG_SMP */ 246#endif /* CONFIG_SMP */
247 spin_lock_irqsave(&pmac_pic_lock, flags); 247 raw_spin_lock_irqsave(&pmac_pic_lock, flags);
248 for (irq = max_real_irqs; (irq -= 32) >= 0; ) { 248 for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
249 int i = irq >> 5; 249 int i = irq >> 5;
250 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i]; 250 bits = in_le32(&pmac_irq_hw[i]->event) | ppc_lost_interrupts[i];
@@ -256,7 +256,7 @@ static unsigned int pmac_pic_get_irq(void)
256 irq += __ilog2(bits); 256 irq += __ilog2(bits);
257 break; 257 break;
258 } 258 }
259 spin_unlock_irqrestore(&pmac_pic_lock, flags); 259 raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
260 if (unlikely(irq < 0)) 260 if (unlikely(irq < 0))
261 return NO_IRQ; 261 return NO_IRQ;
262 return irq_linear_revmap(pmac_pic_host, irq); 262 return irq_linear_revmap(pmac_pic_host, irq);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index ccd8dd03b8c9..7df7fbb7cacb 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -100,7 +100,7 @@ int eeh_subsystem_enabled;
100EXPORT_SYMBOL(eeh_subsystem_enabled); 100EXPORT_SYMBOL(eeh_subsystem_enabled);
101 101
102/* Lock to avoid races due to multiple reports of an error */ 102/* Lock to avoid races due to multiple reports of an error */
103static DEFINE_SPINLOCK(confirm_error_lock); 103static DEFINE_RAW_SPINLOCK(confirm_error_lock);
104 104
105/* Buffer for reporting slot-error-detail rtas calls. Its here 105/* Buffer for reporting slot-error-detail rtas calls. Its here
106 * in BSS, and not dynamically alloced, so that it ends up in 106 * in BSS, and not dynamically alloced, so that it ends up in
@@ -436,7 +436,7 @@ static void __eeh_clear_slot(struct device_node *parent, int mode_flag)
436void eeh_clear_slot (struct device_node *dn, int mode_flag) 436void eeh_clear_slot (struct device_node *dn, int mode_flag)
437{ 437{
438 unsigned long flags; 438 unsigned long flags;
439 spin_lock_irqsave(&confirm_error_lock, flags); 439 raw_spin_lock_irqsave(&confirm_error_lock, flags);
440 440
441 dn = find_device_pe (dn); 441 dn = find_device_pe (dn);
442 442
@@ -447,7 +447,7 @@ void eeh_clear_slot (struct device_node *dn, int mode_flag)
447 PCI_DN(dn)->eeh_mode &= ~mode_flag; 447 PCI_DN(dn)->eeh_mode &= ~mode_flag;
448 PCI_DN(dn)->eeh_check_count = 0; 448 PCI_DN(dn)->eeh_check_count = 0;
449 __eeh_clear_slot(dn, mode_flag); 449 __eeh_clear_slot(dn, mode_flag);
450 spin_unlock_irqrestore(&confirm_error_lock, flags); 450 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
451} 451}
452 452
453/** 453/**
@@ -491,7 +491,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
491 pdn->eeh_mode & EEH_MODE_NOCHECK) { 491 pdn->eeh_mode & EEH_MODE_NOCHECK) {
492 ignored_check++; 492 ignored_check++;
493 pr_debug("EEH: Ignored check (%x) for %s %s\n", 493 pr_debug("EEH: Ignored check (%x) for %s %s\n",
494 pdn->eeh_mode, pci_name (dev), dn->full_name); 494 pdn->eeh_mode, eeh_pci_name(dev), dn->full_name);
495 return 0; 495 return 0;
496 } 496 }
497 497
@@ -506,7 +506,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
506 * in one slot might report errors simultaneously, and we 506 * in one slot might report errors simultaneously, and we
507 * only want one error recovery routine running. 507 * only want one error recovery routine running.
508 */ 508 */
509 spin_lock_irqsave(&confirm_error_lock, flags); 509 raw_spin_lock_irqsave(&confirm_error_lock, flags);
510 rc = 1; 510 rc = 1;
511 if (pdn->eeh_mode & EEH_MODE_ISOLATED) { 511 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
512 pdn->eeh_check_count ++; 512 pdn->eeh_check_count ++;
@@ -515,7 +515,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
515 printk (KERN_ERR "EEH: %d reads ignored for recovering device at " 515 printk (KERN_ERR "EEH: %d reads ignored for recovering device at "
516 "location=%s driver=%s pci addr=%s\n", 516 "location=%s driver=%s pci addr=%s\n",
517 pdn->eeh_check_count, location, 517 pdn->eeh_check_count, location,
518 dev->driver->name, pci_name(dev)); 518 dev->driver->name, eeh_pci_name(dev));
519 printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n", 519 printk (KERN_ERR "EEH: Might be infinite loop in %s driver\n",
520 dev->driver->name); 520 dev->driver->name);
521 dump_stack(); 521 dump_stack();
@@ -575,7 +575,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
575 * with other functions on this device, and functions under 575 * with other functions on this device, and functions under
576 * bridges. */ 576 * bridges. */
577 eeh_mark_slot (dn, EEH_MODE_ISOLATED); 577 eeh_mark_slot (dn, EEH_MODE_ISOLATED);
578 spin_unlock_irqrestore(&confirm_error_lock, flags); 578 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
579 579
580 eeh_send_failure_event (dn, dev); 580 eeh_send_failure_event (dn, dev);
581 581
@@ -586,7 +586,7 @@ int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
586 return 1; 586 return 1;
587 587
588dn_unlock: 588dn_unlock:
589 spin_unlock_irqrestore(&confirm_error_lock, flags); 589 raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
590 return rc; 590 return rc;
591} 591}
592 592
@@ -1064,7 +1064,7 @@ void __init eeh_init(void)
1064 struct device_node *phb, *np; 1064 struct device_node *phb, *np;
1065 struct eeh_early_enable_info info; 1065 struct eeh_early_enable_info info;
1066 1066
1067 spin_lock_init(&confirm_error_lock); 1067 raw_spin_lock_init(&confirm_error_lock);
1068 spin_lock_init(&slot_errbuf_lock); 1068 spin_lock_init(&slot_errbuf_lock);
1069 1069
1070 np = of_find_node_by_path("/rtas"); 1070 np = of_find_node_by_path("/rtas");
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index ef8e45448480..b8d70f5d9aa9 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -337,7 +337,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
337 location = location ? location : "unknown"; 337 location = location ? location : "unknown";
338 printk(KERN_ERR "EEH: Error: Cannot find partition endpoint " 338 printk(KERN_ERR "EEH: Error: Cannot find partition endpoint "
339 "for location=%s pci addr=%s\n", 339 "for location=%s pci addr=%s\n",
340 location, pci_name(event->dev)); 340 location, eeh_pci_name(event->dev));
341 return NULL; 341 return NULL;
342 } 342 }
343 343
@@ -368,7 +368,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
368 pci_str = pci_name (frozen_pdn->pcidev); 368 pci_str = pci_name (frozen_pdn->pcidev);
369 drv_str = pcid_name (frozen_pdn->pcidev); 369 drv_str = pcid_name (frozen_pdn->pcidev);
370 } else { 370 } else {
371 pci_str = pci_name (event->dev); 371 pci_str = eeh_pci_name(event->dev);
372 drv_str = pcid_name (event->dev); 372 drv_str = pcid_name (event->dev);
373 } 373 }
374 374
@@ -478,9 +478,9 @@ excess_failures:
478 * due to actual, failed cards. 478 * due to actual, failed cards.
479 */ 479 */
480 printk(KERN_ERR 480 printk(KERN_ERR
481 "EEH: PCI device at location=%s driver=%s pci addr=%s \n" 481 "EEH: PCI device at location=%s driver=%s pci addr=%s\n"
482 "has failed %d times in the last hour " 482 "has failed %d times in the last hour "
483 "and has been permanently disabled. \n" 483 "and has been permanently disabled.\n"
484 "Please try reseating this device or replacing it.\n", 484 "Please try reseating this device or replacing it.\n",
485 location, drv_str, pci_str, frozen_pdn->eeh_freeze_count); 485 location, drv_str, pci_str, frozen_pdn->eeh_freeze_count);
486 goto perm_error; 486 goto perm_error;
@@ -488,7 +488,7 @@ excess_failures:
488hard_fail: 488hard_fail:
489 printk(KERN_ERR 489 printk(KERN_ERR
490 "EEH: Unable to recover from failure of PCI device " 490 "EEH: Unable to recover from failure of PCI device "
491 "at location=%s driver=%s pci addr=%s \n" 491 "at location=%s driver=%s pci addr=%s\n"
492 "Please try reseating this device or replacing it.\n", 492 "Please try reseating this device or replacing it.\n",
493 location, drv_str, pci_str); 493 location, drv_str, pci_str);
494 494
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index ddb80f5d850b..ec5df8f519c7 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -80,7 +80,7 @@ static int eeh_event_handler(void * dummy)
80 eeh_mark_slot(event->dn, EEH_MODE_RECOVERING); 80 eeh_mark_slot(event->dn, EEH_MODE_RECOVERING);
81 81
82 printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n", 82 printk(KERN_INFO "EEH: Detected PCI bus error on device %s\n",
83 pci_name(event->dev)); 83 eeh_pci_name(event->dev));
84 84
85 pdn = handle_eeh_events(event); 85 pdn = handle_eeh_events(event);
86 86
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 6ea4698d9176..d1b124e44d77 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -387,24 +387,12 @@ static char cede_parameters[CEDE_LATENCY_PARAM_MAX_LENGTH];
387 387
388static int parse_cede_parameters(void) 388static int parse_cede_parameters(void)
389{ 389{
390 int call_status;
391
392 memset(cede_parameters, 0, CEDE_LATENCY_PARAM_MAX_LENGTH); 390 memset(cede_parameters, 0, CEDE_LATENCY_PARAM_MAX_LENGTH);
393 call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, 391 return rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
394 NULL, 392 NULL,
395 CEDE_LATENCY_TOKEN, 393 CEDE_LATENCY_TOKEN,
396 __pa(cede_parameters), 394 __pa(cede_parameters),
397 CEDE_LATENCY_PARAM_MAX_LENGTH); 395 CEDE_LATENCY_PARAM_MAX_LENGTH);
398
399 if (call_status != 0)
400 printk(KERN_INFO "CEDE_LATENCY: \
401 %s %s Error calling get-system-parameter(0x%x)\n",
402 __FILE__, __func__, call_status);
403 else
404 printk(KERN_INFO "CEDE_LATENCY: \
405 get-system-parameter successful.\n");
406
407 return call_status;
408} 396}
409 397
410static int __init pseries_cpu_hotplug_init(void) 398static int __init pseries_cpu_hotplug_init(void)
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index 2f58c71b7259..1fefae76e295 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -124,8 +124,8 @@ static void probe_hcall_exit(unsigned long opcode, unsigned long retval,
124 124
125 h = &__get_cpu_var(hcall_stats)[opcode / 4]; 125 h = &__get_cpu_var(hcall_stats)[opcode / 4];
126 h->num_calls++; 126 h->num_calls++;
127 h->tb_total = mftb() - h->tb_start; 127 h->tb_total += mftb() - h->tb_start;
128 h->purr_total = mfspr(SPRN_PURR) - h->purr_start; 128 h->purr_total += mfspr(SPRN_PURR) - h->purr_start;
129 129
130 put_cpu_var(hcall_stats); 130 put_cpu_var(hcall_stats);
131} 131}
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index b6fa3e4b51b5..4b7a062dee15 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -165,7 +165,7 @@ int remove_phb_dynamic(struct pci_controller *phb)
165 struct resource *res; 165 struct resource *res;
166 int rc, i; 166 int rc, i;
167 167
168 pr_debug("PCI: Removing PHB %04x:%02x... \n", 168 pr_debug("PCI: Removing PHB %04x:%02x...\n",
169 pci_domain_nr(b), b->number); 169 pci_domain_nr(b), b->number);
170 170
171 /* We cannot to remove a root bus that has children */ 171 /* We cannot to remove a root bus that has children */
diff --git a/arch/powerpc/platforms/pseries/phyp_dump.c b/arch/powerpc/platforms/pseries/phyp_dump.c
index 15eb6107bcd2..225a50ab14be 100644
--- a/arch/powerpc/platforms/pseries/phyp_dump.c
+++ b/arch/powerpc/platforms/pseries/phyp_dump.c
@@ -150,7 +150,7 @@ static void print_dump_header(const struct phyp_dump_header *ph)
150 printk(KERN_INFO "Max auto time= %d\n", ph->maxtime_to_auto); 150 printk(KERN_INFO "Max auto time= %d\n", ph->maxtime_to_auto);
151 151
152 /*set cpu state and hpte states as well scratch pad area */ 152 /*set cpu state and hpte states as well scratch pad area */
153 printk(KERN_INFO " CPU AREA \n"); 153 printk(KERN_INFO " CPU AREA\n");
154 printk(KERN_INFO "cpu dump_flags =%d\n", ph->cpu_data.dump_flags); 154 printk(KERN_INFO "cpu dump_flags =%d\n", ph->cpu_data.dump_flags);
155 printk(KERN_INFO "cpu source_type =%d\n", ph->cpu_data.source_type); 155 printk(KERN_INFO "cpu source_type =%d\n", ph->cpu_data.source_type);
156 printk(KERN_INFO "cpu error_flags =%d\n", ph->cpu_data.error_flags); 156 printk(KERN_INFO "cpu error_flags =%d\n", ph->cpu_data.error_flags);
@@ -161,7 +161,7 @@ static void print_dump_header(const struct phyp_dump_header *ph)
161 printk(KERN_INFO "cpu length_copied =%llx\n", 161 printk(KERN_INFO "cpu length_copied =%llx\n",
162 ph->cpu_data.length_copied); 162 ph->cpu_data.length_copied);
163 163
164 printk(KERN_INFO " HPTE AREA \n"); 164 printk(KERN_INFO " HPTE AREA\n");
165 printk(KERN_INFO "HPTE dump_flags =%d\n", ph->hpte_data.dump_flags); 165 printk(KERN_INFO "HPTE dump_flags =%d\n", ph->hpte_data.dump_flags);
166 printk(KERN_INFO "HPTE source_type =%d\n", ph->hpte_data.source_type); 166 printk(KERN_INFO "HPTE source_type =%d\n", ph->hpte_data.source_type);
167 printk(KERN_INFO "HPTE error_flags =%d\n", ph->hpte_data.error_flags); 167 printk(KERN_INFO "HPTE error_flags =%d\n", ph->hpte_data.error_flags);
@@ -172,7 +172,7 @@ static void print_dump_header(const struct phyp_dump_header *ph)
172 printk(KERN_INFO "HPTE length_copied =%llx\n", 172 printk(KERN_INFO "HPTE length_copied =%llx\n",
173 ph->hpte_data.length_copied); 173 ph->hpte_data.length_copied);
174 174
175 printk(KERN_INFO " SRSD AREA \n"); 175 printk(KERN_INFO " SRSD AREA\n");
176 printk(KERN_INFO "SRSD dump_flags =%d\n", ph->kernel_data.dump_flags); 176 printk(KERN_INFO "SRSD dump_flags =%d\n", ph->kernel_data.dump_flags);
177 printk(KERN_INFO "SRSD source_type =%d\n", ph->kernel_data.source_type); 177 printk(KERN_INFO "SRSD source_type =%d\n", ph->kernel_data.source_type);
178 printk(KERN_INFO "SRSD error_flags =%d\n", ph->kernel_data.error_flags); 178 printk(KERN_INFO "SRSD error_flags =%d\n", ph->kernel_data.error_flags);
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index b4886635972c..4e7f89a84561 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -144,8 +144,8 @@ static void __devinit smp_pSeries_kick_cpu(int nr)
144 hcpuid = get_hard_smp_processor_id(nr); 144 hcpuid = get_hard_smp_processor_id(nr);
145 rc = plpar_hcall_norets(H_PROD, hcpuid); 145 rc = plpar_hcall_norets(H_PROD, hcpuid);
146 if (rc != H_SUCCESS) 146 if (rc != H_SUCCESS)
147 printk(KERN_ERR "Error: Prod to wake up processor %d\ 147 printk(KERN_ERR "Error: Prod to wake up processor %d "
148 Ret= %ld\n", nr, rc); 148 "Ret= %ld\n", nr, rc);
149 } 149 }
150} 150}
151 151
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index f5f79196721c..4ca641042ec3 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -127,7 +127,7 @@ static inline unsigned int lpar_xirr_info_get(void)
127 127
128 lpar_rc = plpar_xirr(&return_value); 128 lpar_rc = plpar_xirr(&return_value);
129 if (lpar_rc != H_SUCCESS) 129 if (lpar_rc != H_SUCCESS)
130 panic(" bad return code xirr - rc = %lx \n", lpar_rc); 130 panic(" bad return code xirr - rc = %lx\n", lpar_rc);
131 return (unsigned int)return_value; 131 return (unsigned int)return_value;
132} 132}
133 133
@@ -424,7 +424,7 @@ static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
424} 424}
425 425
426static struct irq_chip xics_pic_direct = { 426static struct irq_chip xics_pic_direct = {
427 .name = " XICS ", 427 .name = "XICS",
428 .startup = xics_startup, 428 .startup = xics_startup,
429 .mask = xics_mask_irq, 429 .mask = xics_mask_irq,
430 .unmask = xics_unmask_irq, 430 .unmask = xics_unmask_irq,
@@ -433,7 +433,7 @@ static struct irq_chip xics_pic_direct = {
433}; 433};
434 434
435static struct irq_chip xics_pic_lpar = { 435static struct irq_chip xics_pic_lpar = {
436 .name = " XICS ", 436 .name = "XICS",
437 .startup = xics_startup, 437 .startup = xics_startup,
438 .mask = xics_mask_irq, 438 .mask = xics_mask_irq,
439 .unmask = xics_unmask_irq, 439 .unmask = xics_unmask_irq,
@@ -510,15 +510,13 @@ static void __init xics_init_host(void)
510/* 510/*
511 * XICS only has a single IPI, so encode the messages per CPU 511 * XICS only has a single IPI, so encode the messages per CPU
512 */ 512 */
513struct xics_ipi_struct { 513static DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
514 unsigned long value;
515 } ____cacheline_aligned;
516
517static struct xics_ipi_struct xics_ipi_message[NR_CPUS] __cacheline_aligned;
518 514
519static inline void smp_xics_do_message(int cpu, int msg) 515static inline void smp_xics_do_message(int cpu, int msg)
520{ 516{
521 set_bit(msg, &xics_ipi_message[cpu].value); 517 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
518
519 set_bit(msg, tgt);
522 mb(); 520 mb();
523 if (firmware_has_feature(FW_FEATURE_LPAR)) 521 if (firmware_has_feature(FW_FEATURE_LPAR))
524 lpar_qirr_info(cpu, IPI_PRIORITY); 522 lpar_qirr_info(cpu, IPI_PRIORITY);
@@ -544,25 +542,23 @@ void smp_xics_message_pass(int target, int msg)
544 542
545static irqreturn_t xics_ipi_dispatch(int cpu) 543static irqreturn_t xics_ipi_dispatch(int cpu)
546{ 544{
545 unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
546
547 WARN_ON(cpu_is_offline(cpu)); 547 WARN_ON(cpu_is_offline(cpu));
548 548
549 mb(); /* order mmio clearing qirr */ 549 mb(); /* order mmio clearing qirr */
550 while (xics_ipi_message[cpu].value) { 550 while (*tgt) {
551 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, 551 if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt)) {
552 &xics_ipi_message[cpu].value)) {
553 smp_message_recv(PPC_MSG_CALL_FUNCTION); 552 smp_message_recv(PPC_MSG_CALL_FUNCTION);
554 } 553 }
555 if (test_and_clear_bit(PPC_MSG_RESCHEDULE, 554 if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt)) {
556 &xics_ipi_message[cpu].value)) {
557 smp_message_recv(PPC_MSG_RESCHEDULE); 555 smp_message_recv(PPC_MSG_RESCHEDULE);
558 } 556 }
559 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, 557 if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt)) {
560 &xics_ipi_message[cpu].value)) {
561 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE); 558 smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
562 } 559 }
563#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC) 560#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
564 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, 561 if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt)) {
565 &xics_ipi_message[cpu].value)) {
566 smp_message_recv(PPC_MSG_DEBUGGER_BREAK); 562 smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
567 } 563 }
568#endif 564#endif
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index a4b41dbde128..ecad10d4e928 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -77,7 +77,7 @@ static void cpm_end_irq(unsigned int irq)
77} 77}
78 78
79static struct irq_chip cpm_pic = { 79static struct irq_chip cpm_pic = {
80 .name = " CPM PIC ", 80 .name = "CPM PIC",
81 .mask = cpm_mask_irq, 81 .mask = cpm_mask_irq,
82 .unmask = cpm_unmask_irq, 82 .unmask = cpm_unmask_irq,
83 .eoi = cpm_end_irq, 83 .eoi = cpm_end_irq,
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 1709ac5aac7c..fcea4ff825dd 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -198,7 +198,7 @@ err_sense:
198} 198}
199 199
200static struct irq_chip cpm2_pic = { 200static struct irq_chip cpm2_pic = {
201 .name = " CPM2 SIU ", 201 .name = "CPM2 SIU",
202 .mask = cpm2_mask_irq, 202 .mask = cpm2_mask_irq,
203 .unmask = cpm2_unmask_irq, 203 .unmask = cpm2_unmask_irq,
204 .ack = cpm2_ack, 204 .ack = cpm2_ack,
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index c6e11b077108..e094367d7739 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -47,7 +47,7 @@ static struct irq_chip fsl_msi_chip = {
47 .mask = mask_msi_irq, 47 .mask = mask_msi_irq,
48 .unmask = unmask_msi_irq, 48 .unmask = unmask_msi_irq,
49 .ack = fsl_msi_end_irq, 49 .ack = fsl_msi_end_irq,
50 .name = " FSL-MSI ", 50 .name = "FSL-MSI",
51}; 51};
52 52
53static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, 53static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index 0a55db8a5a29..6323e70e6bf4 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -23,7 +23,7 @@ static unsigned char cached_8259[2] = { 0xff, 0xff };
23#define cached_A1 (cached_8259[0]) 23#define cached_A1 (cached_8259[0])
24#define cached_21 (cached_8259[1]) 24#define cached_21 (cached_8259[1])
25 25
26static DEFINE_SPINLOCK(i8259_lock); 26static DEFINE_RAW_SPINLOCK(i8259_lock);
27 27
28static struct irq_host *i8259_host; 28static struct irq_host *i8259_host;
29 29
@@ -42,7 +42,7 @@ unsigned int i8259_irq(void)
42 if (pci_intack) 42 if (pci_intack)
43 irq = readb(pci_intack); 43 irq = readb(pci_intack);
44 else { 44 else {
45 spin_lock(&i8259_lock); 45 raw_spin_lock(&i8259_lock);
46 lock = 1; 46 lock = 1;
47 47
48 /* Perform an interrupt acknowledge cycle on controller 1. */ 48 /* Perform an interrupt acknowledge cycle on controller 1. */
@@ -74,7 +74,7 @@ unsigned int i8259_irq(void)
74 irq = NO_IRQ; 74 irq = NO_IRQ;
75 75
76 if (lock) 76 if (lock)
77 spin_unlock(&i8259_lock); 77 raw_spin_unlock(&i8259_lock);
78 return irq; 78 return irq;
79} 79}
80 80
@@ -82,7 +82,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr)
82{ 82{
83 unsigned long flags; 83 unsigned long flags;
84 84
85 spin_lock_irqsave(&i8259_lock, flags); 85 raw_spin_lock_irqsave(&i8259_lock, flags);
86 if (irq_nr > 7) { 86 if (irq_nr > 7) {
87 cached_A1 |= 1 << (irq_nr-8); 87 cached_A1 |= 1 << (irq_nr-8);
88 inb(0xA1); /* DUMMY */ 88 inb(0xA1); /* DUMMY */
@@ -95,7 +95,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr)
95 outb(cached_21, 0x21); 95 outb(cached_21, 0x21);
96 outb(0x20, 0x20); /* Non-specific EOI */ 96 outb(0x20, 0x20); /* Non-specific EOI */
97 } 97 }
98 spin_unlock_irqrestore(&i8259_lock, flags); 98 raw_spin_unlock_irqrestore(&i8259_lock, flags);
99} 99}
100 100
101static void i8259_set_irq_mask(int irq_nr) 101static void i8259_set_irq_mask(int irq_nr)
@@ -110,13 +110,13 @@ static void i8259_mask_irq(unsigned int irq_nr)
110 110
111 pr_debug("i8259_mask_irq(%d)\n", irq_nr); 111 pr_debug("i8259_mask_irq(%d)\n", irq_nr);
112 112
113 spin_lock_irqsave(&i8259_lock, flags); 113 raw_spin_lock_irqsave(&i8259_lock, flags);
114 if (irq_nr < 8) 114 if (irq_nr < 8)
115 cached_21 |= 1 << irq_nr; 115 cached_21 |= 1 << irq_nr;
116 else 116 else
117 cached_A1 |= 1 << (irq_nr-8); 117 cached_A1 |= 1 << (irq_nr-8);
118 i8259_set_irq_mask(irq_nr); 118 i8259_set_irq_mask(irq_nr);
119 spin_unlock_irqrestore(&i8259_lock, flags); 119 raw_spin_unlock_irqrestore(&i8259_lock, flags);
120} 120}
121 121
122static void i8259_unmask_irq(unsigned int irq_nr) 122static void i8259_unmask_irq(unsigned int irq_nr)
@@ -125,17 +125,17 @@ static void i8259_unmask_irq(unsigned int irq_nr)
125 125
126 pr_debug("i8259_unmask_irq(%d)\n", irq_nr); 126 pr_debug("i8259_unmask_irq(%d)\n", irq_nr);
127 127
128 spin_lock_irqsave(&i8259_lock, flags); 128 raw_spin_lock_irqsave(&i8259_lock, flags);
129 if (irq_nr < 8) 129 if (irq_nr < 8)
130 cached_21 &= ~(1 << irq_nr); 130 cached_21 &= ~(1 << irq_nr);
131 else 131 else
132 cached_A1 &= ~(1 << (irq_nr-8)); 132 cached_A1 &= ~(1 << (irq_nr-8));
133 i8259_set_irq_mask(irq_nr); 133 i8259_set_irq_mask(irq_nr);
134 spin_unlock_irqrestore(&i8259_lock, flags); 134 raw_spin_unlock_irqrestore(&i8259_lock, flags);
135} 135}
136 136
137static struct irq_chip i8259_pic = { 137static struct irq_chip i8259_pic = {
138 .name = " i8259 ", 138 .name = "i8259",
139 .mask = i8259_mask_irq, 139 .mask = i8259_mask_irq,
140 .disable = i8259_mask_irq, 140 .disable = i8259_mask_irq,
141 .unmask = i8259_unmask_irq, 141 .unmask = i8259_unmask_irq,
@@ -241,7 +241,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
241 unsigned long flags; 241 unsigned long flags;
242 242
243 /* initialize the controller */ 243 /* initialize the controller */
244 spin_lock_irqsave(&i8259_lock, flags); 244 raw_spin_lock_irqsave(&i8259_lock, flags);
245 245
246 /* Mask all first */ 246 /* Mask all first */
247 outb(0xff, 0xA1); 247 outb(0xff, 0xA1);
@@ -273,7 +273,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
273 outb(cached_A1, 0xA1); 273 outb(cached_A1, 0xA1);
274 outb(cached_21, 0x21); 274 outb(cached_21, 0x21);
275 275
276 spin_unlock_irqrestore(&i8259_lock, flags); 276 raw_spin_unlock_irqrestore(&i8259_lock, flags);
277 277
278 /* create a legacy host */ 278 /* create a legacy host */
279 i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, 279 i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 28cdddd2f89e..d7b9b9c69287 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -32,7 +32,7 @@
32 32
33static struct ipic * primary_ipic; 33static struct ipic * primary_ipic;
34static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip; 34static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip;
35static DEFINE_SPINLOCK(ipic_lock); 35static DEFINE_RAW_SPINLOCK(ipic_lock);
36 36
37static struct ipic_info ipic_info[] = { 37static struct ipic_info ipic_info[] = {
38 [1] = { 38 [1] = {
@@ -530,13 +530,13 @@ static void ipic_unmask_irq(unsigned int virq)
530 unsigned long flags; 530 unsigned long flags;
531 u32 temp; 531 u32 temp;
532 532
533 spin_lock_irqsave(&ipic_lock, flags); 533 raw_spin_lock_irqsave(&ipic_lock, flags);
534 534
535 temp = ipic_read(ipic->regs, ipic_info[src].mask); 535 temp = ipic_read(ipic->regs, ipic_info[src].mask);
536 temp |= (1 << (31 - ipic_info[src].bit)); 536 temp |= (1 << (31 - ipic_info[src].bit));
537 ipic_write(ipic->regs, ipic_info[src].mask, temp); 537 ipic_write(ipic->regs, ipic_info[src].mask, temp);
538 538
539 spin_unlock_irqrestore(&ipic_lock, flags); 539 raw_spin_unlock_irqrestore(&ipic_lock, flags);
540} 540}
541 541
542static void ipic_mask_irq(unsigned int virq) 542static void ipic_mask_irq(unsigned int virq)
@@ -546,7 +546,7 @@ static void ipic_mask_irq(unsigned int virq)
546 unsigned long flags; 546 unsigned long flags;
547 u32 temp; 547 u32 temp;
548 548
549 spin_lock_irqsave(&ipic_lock, flags); 549 raw_spin_lock_irqsave(&ipic_lock, flags);
550 550
551 temp = ipic_read(ipic->regs, ipic_info[src].mask); 551 temp = ipic_read(ipic->regs, ipic_info[src].mask);
552 temp &= ~(1 << (31 - ipic_info[src].bit)); 552 temp &= ~(1 << (31 - ipic_info[src].bit));
@@ -556,7 +556,7 @@ static void ipic_mask_irq(unsigned int virq)
556 * for nearly all cases. */ 556 * for nearly all cases. */
557 mb(); 557 mb();
558 558
559 spin_unlock_irqrestore(&ipic_lock, flags); 559 raw_spin_unlock_irqrestore(&ipic_lock, flags);
560} 560}
561 561
562static void ipic_ack_irq(unsigned int virq) 562static void ipic_ack_irq(unsigned int virq)
@@ -566,7 +566,7 @@ static void ipic_ack_irq(unsigned int virq)
566 unsigned long flags; 566 unsigned long flags;
567 u32 temp; 567 u32 temp;
568 568
569 spin_lock_irqsave(&ipic_lock, flags); 569 raw_spin_lock_irqsave(&ipic_lock, flags);
570 570
571 temp = 1 << (31 - ipic_info[src].bit); 571 temp = 1 << (31 - ipic_info[src].bit);
572 ipic_write(ipic->regs, ipic_info[src].ack, temp); 572 ipic_write(ipic->regs, ipic_info[src].ack, temp);
@@ -575,7 +575,7 @@ static void ipic_ack_irq(unsigned int virq)
575 * for nearly all cases. */ 575 * for nearly all cases. */
576 mb(); 576 mb();
577 577
578 spin_unlock_irqrestore(&ipic_lock, flags); 578 raw_spin_unlock_irqrestore(&ipic_lock, flags);
579} 579}
580 580
581static void ipic_mask_irq_and_ack(unsigned int virq) 581static void ipic_mask_irq_and_ack(unsigned int virq)
@@ -585,7 +585,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq)
585 unsigned long flags; 585 unsigned long flags;
586 u32 temp; 586 u32 temp;
587 587
588 spin_lock_irqsave(&ipic_lock, flags); 588 raw_spin_lock_irqsave(&ipic_lock, flags);
589 589
590 temp = ipic_read(ipic->regs, ipic_info[src].mask); 590 temp = ipic_read(ipic->regs, ipic_info[src].mask);
591 temp &= ~(1 << (31 - ipic_info[src].bit)); 591 temp &= ~(1 << (31 - ipic_info[src].bit));
@@ -598,7 +598,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq)
598 * for nearly all cases. */ 598 * for nearly all cases. */
599 mb(); 599 mb();
600 600
601 spin_unlock_irqrestore(&ipic_lock, flags); 601 raw_spin_unlock_irqrestore(&ipic_lock, flags);
602} 602}
603 603
604static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) 604static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
@@ -660,7 +660,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
660 660
661/* level interrupts and edge interrupts have different ack operations */ 661/* level interrupts and edge interrupts have different ack operations */
662static struct irq_chip ipic_level_irq_chip = { 662static struct irq_chip ipic_level_irq_chip = {
663 .name = " IPIC ", 663 .name = "IPIC",
664 .unmask = ipic_unmask_irq, 664 .unmask = ipic_unmask_irq,
665 .mask = ipic_mask_irq, 665 .mask = ipic_mask_irq,
666 .mask_ack = ipic_mask_irq, 666 .mask_ack = ipic_mask_irq,
@@ -668,7 +668,7 @@ static struct irq_chip ipic_level_irq_chip = {
668}; 668};
669 669
670static struct irq_chip ipic_edge_irq_chip = { 670static struct irq_chip ipic_edge_irq_chip = {
671 .name = " IPIC ", 671 .name = "IPIC",
672 .unmask = ipic_unmask_irq, 672 .unmask = ipic_unmask_irq,
673 .mask = ipic_mask_irq, 673 .mask = ipic_mask_irq,
674 .mask_ack = ipic_mask_irq_and_ack, 674 .mask_ack = ipic_mask_irq_and_ack,
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 69bd6f4dff83..8c27d261aba8 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -94,7 +94,7 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
94} 94}
95 95
96static struct irq_chip mpc8xx_pic = { 96static struct irq_chip mpc8xx_pic = {
97 .name = " MPC8XX SIU ", 97 .name = "MPC8XX SIU",
98 .unmask = mpc8xx_unmask_irq, 98 .unmask = mpc8xx_unmask_irq,
99 .mask = mpc8xx_mask_irq, 99 .mask = mpc8xx_mask_irq,
100 .ack = mpc8xx_ack, 100 .ack = mpc8xx_ack,
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 470dc6c11d57..339e8a3e26d2 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -46,7 +46,7 @@
46 46
47static struct mpic *mpics; 47static struct mpic *mpics;
48static struct mpic *mpic_primary; 48static struct mpic *mpic_primary;
49static DEFINE_SPINLOCK(mpic_lock); 49static DEFINE_RAW_SPINLOCK(mpic_lock);
50 50
51#ifdef CONFIG_PPC32 /* XXX for now */ 51#ifdef CONFIG_PPC32 /* XXX for now */
52#ifdef CONFIG_IRQ_ALL_CPUS 52#ifdef CONFIG_IRQ_ALL_CPUS
@@ -347,10 +347,10 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source)
347 unsigned int mask = 1U << (fixup->index & 0x1f); 347 unsigned int mask = 1U << (fixup->index & 0x1f);
348 writel(mask, fixup->applebase + soff); 348 writel(mask, fixup->applebase + soff);
349 } else { 349 } else {
350 spin_lock(&mpic->fixup_lock); 350 raw_spin_lock(&mpic->fixup_lock);
351 writeb(0x11 + 2 * fixup->index, fixup->base + 2); 351 writeb(0x11 + 2 * fixup->index, fixup->base + 2);
352 writel(fixup->data, fixup->base + 4); 352 writel(fixup->data, fixup->base + 4);
353 spin_unlock(&mpic->fixup_lock); 353 raw_spin_unlock(&mpic->fixup_lock);
354 } 354 }
355} 355}
356 356
@@ -366,7 +366,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
366 366
367 DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", 367 DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n",
368 source, irqflags, fixup->index); 368 source, irqflags, fixup->index);
369 spin_lock_irqsave(&mpic->fixup_lock, flags); 369 raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
370 /* Enable and configure */ 370 /* Enable and configure */
371 writeb(0x10 + 2 * fixup->index, fixup->base + 2); 371 writeb(0x10 + 2 * fixup->index, fixup->base + 2);
372 tmp = readl(fixup->base + 4); 372 tmp = readl(fixup->base + 4);
@@ -374,7 +374,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
374 if (irqflags & IRQ_LEVEL) 374 if (irqflags & IRQ_LEVEL)
375 tmp |= 0x22; 375 tmp |= 0x22;
376 writel(tmp, fixup->base + 4); 376 writel(tmp, fixup->base + 4);
377 spin_unlock_irqrestore(&mpic->fixup_lock, flags); 377 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);
378 378
379#ifdef CONFIG_PM 379#ifdef CONFIG_PM
380 /* use the lowest bit inverted to the actual HW, 380 /* use the lowest bit inverted to the actual HW,
@@ -396,12 +396,12 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
396 DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); 396 DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags);
397 397
398 /* Disable */ 398 /* Disable */
399 spin_lock_irqsave(&mpic->fixup_lock, flags); 399 raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
400 writeb(0x10 + 2 * fixup->index, fixup->base + 2); 400 writeb(0x10 + 2 * fixup->index, fixup->base + 2);
401 tmp = readl(fixup->base + 4); 401 tmp = readl(fixup->base + 4);
402 tmp |= 1; 402 tmp |= 1;
403 writel(tmp, fixup->base + 4); 403 writel(tmp, fixup->base + 4);
404 spin_unlock_irqrestore(&mpic->fixup_lock, flags); 404 raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);
405 405
406#ifdef CONFIG_PM 406#ifdef CONFIG_PM
407 /* use the lowest bit inverted to the actual HW, 407 /* use the lowest bit inverted to the actual HW,
@@ -515,7 +515,7 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic)
515 BUG_ON(mpic->fixups == NULL); 515 BUG_ON(mpic->fixups == NULL);
516 516
517 /* Init spinlock */ 517 /* Init spinlock */
518 spin_lock_init(&mpic->fixup_lock); 518 raw_spin_lock_init(&mpic->fixup_lock);
519 519
520 /* Map U3 config space. We assume all IO-APICs are on the primary bus 520 /* Map U3 config space. We assume all IO-APICs are on the primary bus
521 * so we only need to map 64kB. 521 * so we only need to map 64kB.
@@ -573,12 +573,12 @@ static int irq_choose_cpu(const cpumask_t *mask)
573 573
574 if (cpumask_equal(mask, cpu_all_mask)) { 574 if (cpumask_equal(mask, cpu_all_mask)) {
575 static int irq_rover; 575 static int irq_rover;
576 static DEFINE_SPINLOCK(irq_rover_lock); 576 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
577 unsigned long flags; 577 unsigned long flags;
578 578
579 /* Round-robin distribution... */ 579 /* Round-robin distribution... */
580 do_round_robin: 580 do_round_robin:
581 spin_lock_irqsave(&irq_rover_lock, flags); 581 raw_spin_lock_irqsave(&irq_rover_lock, flags);
582 582
583 while (!cpu_online(irq_rover)) { 583 while (!cpu_online(irq_rover)) {
584 if (++irq_rover >= NR_CPUS) 584 if (++irq_rover >= NR_CPUS)
@@ -590,7 +590,7 @@ static int irq_choose_cpu(const cpumask_t *mask)
590 irq_rover = 0; 590 irq_rover = 0;
591 } while (!cpu_online(irq_rover)); 591 } while (!cpu_online(irq_rover));
592 592
593 spin_unlock_irqrestore(&irq_rover_lock, flags); 593 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
594 } else { 594 } else {
595 cpuid = cpumask_first_and(mask, cpu_online_mask); 595 cpuid = cpumask_first_and(mask, cpu_online_mask);
596 if (cpuid >= nr_cpu_ids) 596 if (cpuid >= nr_cpu_ids)
@@ -1368,14 +1368,14 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable)
1368 unsigned long flags; 1368 unsigned long flags;
1369 u32 v; 1369 u32 v;
1370 1370
1371 spin_lock_irqsave(&mpic_lock, flags); 1371 raw_spin_lock_irqsave(&mpic_lock, flags);
1372 v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); 1372 v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
1373 if (enable) 1373 if (enable)
1374 v |= MPIC_GREG_GLOBAL_CONF_1_SIE; 1374 v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
1375 else 1375 else
1376 v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; 1376 v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
1377 mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); 1377 mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
1378 spin_unlock_irqrestore(&mpic_lock, flags); 1378 raw_spin_unlock_irqrestore(&mpic_lock, flags);
1379} 1379}
1380 1380
1381void mpic_irq_set_priority(unsigned int irq, unsigned int pri) 1381void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
@@ -1388,7 +1388,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
1388 if (!mpic) 1388 if (!mpic)
1389 return; 1389 return;
1390 1390
1391 spin_lock_irqsave(&mpic_lock, flags); 1391 raw_spin_lock_irqsave(&mpic_lock, flags);
1392 if (mpic_is_ipi(mpic, irq)) { 1392 if (mpic_is_ipi(mpic, irq)) {
1393 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & 1393 reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) &
1394 ~MPIC_VECPRI_PRIORITY_MASK; 1394 ~MPIC_VECPRI_PRIORITY_MASK;
@@ -1400,7 +1400,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
1400 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), 1400 mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
1401 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); 1401 reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
1402 } 1402 }
1403 spin_unlock_irqrestore(&mpic_lock, flags); 1403 raw_spin_unlock_irqrestore(&mpic_lock, flags);
1404} 1404}
1405 1405
1406void mpic_setup_this_cpu(void) 1406void mpic_setup_this_cpu(void)
@@ -1415,7 +1415,7 @@ void mpic_setup_this_cpu(void)
1415 1415
1416 DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); 1416 DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id());
1417 1417
1418 spin_lock_irqsave(&mpic_lock, flags); 1418 raw_spin_lock_irqsave(&mpic_lock, flags);
1419 1419
1420 /* let the mpic know we want intrs. default affinity is 0xffffffff 1420 /* let the mpic know we want intrs. default affinity is 0xffffffff
1421 * until changed via /proc. That's how it's done on x86. If we want 1421 * until changed via /proc. That's how it's done on x86. If we want
@@ -1431,7 +1431,7 @@ void mpic_setup_this_cpu(void)
1431 /* Set current processor priority to 0 */ 1431 /* Set current processor priority to 0 */
1432 mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); 1432 mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0);
1433 1433
1434 spin_unlock_irqrestore(&mpic_lock, flags); 1434 raw_spin_unlock_irqrestore(&mpic_lock, flags);
1435#endif /* CONFIG_SMP */ 1435#endif /* CONFIG_SMP */
1436} 1436}
1437 1437
@@ -1460,7 +1460,7 @@ void mpic_teardown_this_cpu(int secondary)
1460 BUG_ON(mpic == NULL); 1460 BUG_ON(mpic == NULL);
1461 1461
1462 DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); 1462 DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id());
1463 spin_lock_irqsave(&mpic_lock, flags); 1463 raw_spin_lock_irqsave(&mpic_lock, flags);
1464 1464
1465 /* let the mpic know we don't want intrs. */ 1465 /* let the mpic know we don't want intrs. */
1466 for (i = 0; i < mpic->num_sources ; i++) 1466 for (i = 0; i < mpic->num_sources ; i++)
@@ -1474,7 +1474,7 @@ void mpic_teardown_this_cpu(int secondary)
1474 */ 1474 */
1475 mpic_eoi(mpic); 1475 mpic_eoi(mpic);
1476 1476
1477 spin_unlock_irqrestore(&mpic_lock, flags); 1477 raw_spin_unlock_irqrestore(&mpic_lock, flags);
1478} 1478}
1479 1479
1480 1480
@@ -1575,7 +1575,7 @@ void mpic_request_ipis(void)
1575 int i; 1575 int i;
1576 BUG_ON(mpic == NULL); 1576 BUG_ON(mpic == NULL);
1577 1577
1578 printk(KERN_INFO "mpic: requesting IPIs ... \n"); 1578 printk(KERN_INFO "mpic: requesting IPIs...\n");
1579 1579
1580 for (i = 0; i < 4; i++) { 1580 for (i = 0; i < 4; i++) {
1581 unsigned int vipi = irq_create_mapping(mpic->irqhost, 1581 unsigned int vipi = irq_create_mapping(mpic->irqhost,
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 0f6ab06f8474..3b6a9a43718f 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -60,7 +60,7 @@ static struct irq_chip mpic_pasemi_msi_chip = {
60 .eoi = mpic_end_irq, 60 .eoi = mpic_end_irq,
61 .set_type = mpic_set_irq_type, 61 .set_type = mpic_set_irq_type,
62 .set_affinity = mpic_set_affinity, 62 .set_affinity = mpic_set_affinity,
63 .name = "PASEMI-MSI ", 63 .name = "PASEMI-MSI",
64}; 64};
65 65
66static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) 66static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index b6bd775d2e22..31acd3b1718b 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -16,6 +16,7 @@
16#include <linux/mv643xx.h> 16#include <linux/mv643xx.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/dma-mapping.h>
19 20
20#include <asm/prom.h> 21#include <asm/prom.h>
21 22
@@ -189,6 +190,7 @@ static int __init mv64x60_mpsc_device_setup(struct device_node *np, int id)
189 pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number); 190 pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number);
190 if (!pdev) 191 if (!pdev)
191 return -ENOMEM; 192 return -ENOMEM;
193 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
192 194
193 err = platform_device_add_resources(pdev, r, 5); 195 err = platform_device_add_resources(pdev, r, 5);
194 if (err) 196 if (err)
@@ -302,6 +304,7 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id,
302 if (!pdev) 304 if (!pdev)
303 return -ENOMEM; 305 return -ENOMEM;
304 306
307 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
305 err = platform_device_add_resources(pdev, r, 1); 308 err = platform_device_add_resources(pdev, r, 1);
306 if (err) 309 if (err)
307 goto error; 310 goto error;
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c
index 5b32adc9a9b2..5c014350bf16 100644
--- a/arch/powerpc/sysdev/ppc4xx_soc.c
+++ b/arch/powerpc/sysdev/ppc4xx_soc.c
@@ -174,7 +174,8 @@ static int __init ppc4xx_l2c_probe(void)
174 | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; 174 | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM;
175 175
176 /* Check for 460EX/GT special handling */ 176 /* Check for 460EX/GT special handling */
177 if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) 177 if (of_device_is_compatible(np, "ibm,l2-cache-460ex") ||
178 of_device_is_compatible(np, "ibm,l2-cache-460gt"))
178 r |= L2C_CFG_RDBW; 179 r |= L2C_CFG_RDBW;
179 180
180 mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); 181 mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r);
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 2acc928d1920..d927da893ec4 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -237,7 +237,7 @@ static void qe_ic_mask_irq(unsigned int virq)
237} 237}
238 238
239static struct irq_chip qe_ic_irq_chip = { 239static struct irq_chip qe_ic_irq_chip = {
240 .name = " QEIC ", 240 .name = "QEIC",
241 .unmask = qe_ic_unmask_irq, 241 .unmask = qe_ic_unmask_irq,
242 .mask = qe_ic_mask_irq, 242 .mask = qe_ic_mask_irq,
243 .mask_ack = qe_ic_mask_irq, 243 .mask_ack = qe_ic_mask_irq,
@@ -256,7 +256,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
256 struct irq_chip *chip; 256 struct irq_chip *chip;
257 257
258 if (qe_ic_info[hw].mask == 0) { 258 if (qe_ic_info[hw].mask == 0) {
259 printk(KERN_ERR "Can't map reserved IRQ \n"); 259 printk(KERN_ERR "Can't map reserved IRQ\n");
260 return -EINVAL; 260 return -EINVAL;
261 } 261 }
262 /* Default chip */ 262 /* Default chip */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index 7c87460179ef..77e4934b88c5 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -157,13 +157,13 @@ int par_io_of_config(struct device_node *np)
157 const unsigned int *pio_map; 157 const unsigned int *pio_map;
158 158
159 if (par_io == NULL) { 159 if (par_io == NULL) {
160 printk(KERN_ERR "par_io not initialized \n"); 160 printk(KERN_ERR "par_io not initialized\n");
161 return -1; 161 return -1;
162 } 162 }
163 163
164 ph = of_get_property(np, "pio-handle", NULL); 164 ph = of_get_property(np, "pio-handle", NULL);
165 if (ph == NULL) { 165 if (ph == NULL) {
166 printk(KERN_ERR "pio-handle not available \n"); 166 printk(KERN_ERR "pio-handle not available\n");
167 return -1; 167 return -1;
168 } 168 }
169 169
@@ -171,12 +171,12 @@ int par_io_of_config(struct device_node *np)
171 171
172 pio_map = of_get_property(pio, "pio-map", &pio_map_len); 172 pio_map = of_get_property(pio, "pio-map", &pio_map_len);
173 if (pio_map == NULL) { 173 if (pio_map == NULL) {
174 printk(KERN_ERR "pio-map is not set! \n"); 174 printk(KERN_ERR "pio-map is not set!\n");
175 return -1; 175 return -1;
176 } 176 }
177 pio_map_len /= sizeof(unsigned int); 177 pio_map_len /= sizeof(unsigned int);
178 if ((pio_map_len % 6) != 0) { 178 if ((pio_map_len % 6) != 0) {
179 printk(KERN_ERR "pio-map format wrong! \n"); 179 printk(KERN_ERR "pio-map format wrong!\n");
180 return -1; 180 return -1;
181 } 181 }
182 182
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 6f220a913e42..0038fb78f094 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -177,7 +177,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
177} 177}
178 178
179static struct irq_chip uic_irq_chip = { 179static struct irq_chip uic_irq_chip = {
180 .name = " UIC ", 180 .name = "UIC",
181 .unmask = uic_unmask_irq, 181 .unmask = uic_unmask_irq,
182 .mask = uic_mask_irq, 182 .mask = uic_mask_irq,
183 .mask_ack = uic_mask_ack_irq, 183 .mask_ack = uic_mask_ack_irq,
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 4e6152c13764..8bad7d5f32af 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -61,7 +61,7 @@ static int xmon_owner;
61static int xmon_gate; 61static int xmon_gate;
62#endif /* CONFIG_SMP */ 62#endif /* CONFIG_SMP */
63 63
64static unsigned long in_xmon = 0; 64static unsigned long in_xmon __read_mostly = 0;
65 65
66static unsigned long adrs; 66static unsigned long adrs;
67static int size = 1; 67static int size = 1;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 09:45:56 -0500