Merge tag 'v3.18-rc4' into next/dt2

Linux 3.18-rc4 is a dependency for the phy-dt-header branch that
is needed for the final mvebu DT changes.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

61 files changed, 572 insertions, 303 deletions

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 03dc4c1a8736..d8f6a2ec3d4e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1187,7 +1187,7 @@ config DEBUG_UART_VIRT
         default 0xf1c28000 if DEBUG_SUNXI_UART0
         default 0xf1c28400 if DEBUG_SUNXI_UART1
         default 0xf1f02800 if DEBUG_SUNXI_R_UART
-        default 0xf2100000 if DEBUG_PXA_UART1
+        default 0xf6200000 if DEBUG_PXA_UART1
         default 0xf4090000 if ARCH_LPC32XX
         default 0xf4200000 if ARCH_GEMINI
         default 0xf7000000 if DEBUG_S3C24XX_UART && (DEBUG_S3C_UART0 || \
diff --git a/arch/arm/boot/dts/vf610-cosmic.dts b/arch/arm/boot/dts/vf610-cosmic.dts
index 3fd1b74e1216..de1b453c2932 100644
--- a/arch/arm/boot/dts/vf610-cosmic.dts
+++ b/arch/arm/boot/dts/vf610-cosmic.dts
@@ -33,6 +33,13 @@
 
 };
 
+&esdhc1 {
+        pinctrl-names = "default";
+        pinctrl-0 = <&pinctrl_esdhc1>;
+        bus-width = <4>;
+        status = "okay";
+};
+
 &fec1 {
         phy-mode = "rmii";
         pinctrl-names = "default";
@@ -42,6 +49,18 @@
 
 &iomuxc {
         vf610-cosmic {
+                pinctrl_esdhc1: esdhc1grp {
+                        fsl,pins = <
+                                VF610_PAD_PTA24__ESDHC1_CLK     0x31ef
+                                VF610_PAD_PTA25__ESDHC1_CMD     0x31ef
+                                VF610_PAD_PTA26__ESDHC1_DAT0    0x31ef
+                                VF610_PAD_PTA27__ESDHC1_DAT1    0x31ef
+                                VF610_PAD_PTA28__ESDHC1_DATA2   0x31ef
+                                VF610_PAD_PTA29__ESDHC1_DAT3    0x31ef
+                                VF610_PAD_PTB28__GPIO_98        0x219d
+                        >;
+                };
+
                 pinctrl_fec1: fec1grp {
                         fsl,pins = <
                                 VF610_PAD_PTC9__ENET_RMII1_MDC          0x30d2
diff --git a/arch/arm/boot/dts/zynq-parallella.dts b/arch/arm/boot/dts/zynq-parallella.dts
index e1f51ca127fe..0429bbd89fba 100644
--- a/arch/arm/boot/dts/zynq-parallella.dts
+++ b/arch/arm/boot/dts/zynq-parallella.dts
@@ -34,6 +34,10 @@
         };
 };
 
+&clkc {
+        fclk-enable = <0xf>;
+};
+
 &gem0 {
         status = "okay";
         phy-mode = "rgmii-id";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index d86771abbf57..72041f002b7e 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -26,6 +26,7 @@
 #include <linux/io.h>
 #include <linux/slab.h>
 #include <linux/edma.h>
+#include <linux/dma-mapping.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/of_dma.h>
@@ -1623,6 +1624,11 @@ static int edma_probe(struct platform_device *pdev)
         struct device_node      *node = pdev->dev.of_node;
         struct device           *dev = &pdev->dev;
         int                     ret;
+        struct platform_device_info edma_dev_info = {
+                .name = "edma-dma-engine",
+                .dma_mask = DMA_BIT_MASK(32),
+                .parent = &pdev->dev,
+        };
 
         if (node) {
                 /* Check if this is a second instance registered */
@@ -1793,6 +1799,9 @@ static int edma_probe(struct platform_device *pdev)
                         edma_write_array(j, EDMA_QRAE, i, 0x0);
                 }
                 arch_num_cc++;
+
+                edma_dev_info.id = j;
+                platform_device_register_full(&edma_dev_info);
         }
 
         return 0;
diff --git a/arch/arm/configs/imx_v4_v5_defconfig b/arch/arm/configs/imx_v4_v5_defconfig
index e688741c89aa..e6b0007355f8 100644
--- a/arch/arm/configs/imx_v4_v5_defconfig
+++ b/arch/arm/configs/imx_v4_v5_defconfig
@@ -97,6 +97,7 @@ CONFIG_SERIAL_IMX_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_IMX=y
+CONFIG_SPI=y
 CONFIG_SPI_IMX=y
 CONFIG_SPI_SPIDEV=y
 CONFIG_GPIO_SYSFS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index 8fca6e276b69..6790f1b3f3a1 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -158,6 +158,7 @@ CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_ALGOPCF=m
 CONFIG_I2C_ALGOPCA=m
 CONFIG_I2C_IMX=y
+CONFIG_SPI=y
 CONFIG_SPI_IMX=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_MC9S08DZ60=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index f1dc7fc668f3..3487046d8a78 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -235,6 +235,7 @@ CONFIG_SPI_TEGRA20_SLINK=y
 CONFIG_SPI_XILINX=y
 CONFIG_PINCTRL_AS3722=y
 CONFIG_PINCTRL_PALMAS=y
+CONFIG_PINCTRL_APQ8084=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_GENERIC_PLATFORM=y
 CONFIG_GPIO_DWAPB=y
@@ -411,6 +412,7 @@ CONFIG_NVEC_POWER=y
 CONFIG_NVEC_PAZ00=y
 CONFIG_QCOM_GSBI=y
 CONFIG_COMMON_CLK_QCOM=y
+CONFIG_APQ_MMCC_8084=y
 CONFIG_MSM_GCC_8660=y
 CONFIG_MSM_MMCC_8960=y
 CONFIG_MSM_MMCC_8974=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 16e719c268dd..b3f86670d2eb 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -86,7 +86,6 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
 # CONFIG_INET_LRO is not set
-CONFIG_IPV6=y
 CONFIG_NETFILTER=y
 CONFIG_CAN=m
 CONFIG_CAN_C_CAN=m
@@ -112,6 +111,7 @@ CONFIG_MTD_OOPS=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC_BCH=y
 CONFIG_MTD_NAND_OMAP2=y
 CONFIG_MTD_ONENAND=y
 CONFIG_MTD_ONENAND_VERIFY_WRITE=y
@@ -317,7 +317,7 @@ CONFIG_EXT4_FS=y
 CONFIG_FANOTIFY=y
 CONFIG_QUOTA=y
 CONFIG_QFMT_V2=y
-CONFIG_AUTOFS4_FS=y
+CONFIG_AUTOFS4_FS=m
 CONFIG_MSDOS_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_TMPFS=y
diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig
index d7a5855a5db8..a2956c3112f1 100644
--- a/arch/arm/configs/socfpga_defconfig
+++ b/arch/arm/configs/socfpga_defconfig
@@ -1,5 +1,6 @@
-CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
+CONFIG_FHANDLE=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -11,23 +12,17 @@ CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
-CONFIG_HOTPLUG=y
 # CONFIG_LBDAF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_ARCH_SOCFPGA=y
-CONFIG_MACH_SOCFPGA_CYCLONE5=y
 CONFIG_ARM_THUMBEE=y
-# CONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA is not set
-# CONFIG_CACHE_L2X0 is not set
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_AEABI=y
 CONFIG_ZBOOT_ROM_TEXT=0x0
 CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE=""
 CONFIG_VFP=y
 CONFIG_NEON=y
 CONFIG_NET=y
@@ -41,38 +36,30 @@ CONFIG_IP_PNP=y
 CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 CONFIG_IP_PNP_RARP=y
+CONFIG_IPV6=y
+CONFIG_NETWORK_PHY_TIMESTAMPING=y
+CONFIG_VLAN_8021Q=y
+CONFIG_VLAN_8021Q_GVRP=y
 CONFIG_CAN=y
-CONFIG_CAN_RAW=y
-CONFIG_CAN_BCM=y
-CONFIG_CAN_GW=y
-CONFIG_CAN_DEV=y
-CONFIG_CAN_CALC_BITTIMING=y
 CONFIG_CAN_C_CAN=y
 CONFIG_CAN_C_CAN_PLATFORM=y
 CONFIG_CAN_DEBUG_DEVICES=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_DEVTMPFS=y
-CONFIG_PROC_DEVICETREE=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=2
 CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_SRAM=y
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_NETDEVICES=y
 CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_SOCFPGA=y
 CONFIG_MICREL_PHY=y
-# CONFIG_STMMAC_PHY_ID_ZERO_WORKAROUND is not set
 CONFIG_INPUT_EVDEV=y
-CONFIG_DWMAC_SOCFPGA=y
-CONFIG_PPS=y
-CONFIG_NETWORK_PHY_TIMESTAMPING=y
-CONFIG_PTP_1588_CLOCK=y
-CONFIG_VLAN_8021Q=y
-CONFIG_VLAN_8021Q_GVRP=y
-CONFIG_GARP=y
-CONFIG_IPV6=y
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_SERIO_AMBAKMI=y
 CONFIG_LEGACY_PTY_COUNT=16
@@ -81,45 +68,43 @@ CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
 CONFIG_SERIAL_8250_DW=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
 CONFIG_GPIOLIB=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_DWAPB=y
-# CONFIG_RTC_HCTOSYS is not set
+CONFIG_PMBUS=y
+CONFIG_SENSORS_LTC2978=y
+CONFIG_SENSORS_LTC2978_REGULATOR=y
 CONFIG_WATCHDOG=y
 CONFIG_DW_WATCHDOG=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_USB=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_DWC2_HOST=y
+CONFIG_MMC=y
+CONFIG_MMC_DW=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT2_FS_XATTR=y
 CONFIG_EXT2_FS_POSIX_ACL=y
 CONFIG_EXT3_FS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-# CONFIG_DNOTIFY is not set
-# CONFIG_INOTIFY_USER is not set
-CONFIG_FHANDLE=y
+CONFIG_EXT4_FS=y
 CONFIG_VFAT_FS=y
 CONFIG_NTFS_FS=y
 CONFIG_NTFS_RW=y
 CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_NFS_FS=y
+CONFIG_ROOT_NFS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ISO8859_1=y
+CONFIG_PRINTK_TIME=y
+CONFIG_DEBUG_INFO=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_SCHED_DEBUG is not set
-CONFIG_DEBUG_INFO=y
 CONFIG_ENABLE_DEFAULT_TRACERS=y
 CONFIG_DEBUG_USER=y
 CONFIG_XZ_DEC=y
-CONFIG_I2C=y
-CONFIG_I2C_DESIGNWARE_CORE=y
-CONFIG_I2C_DESIGNWARE_PLATFORM=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_MMC=y
-CONFIG_MMC_DW=y
-CONFIG_PM=y
-CONFIG_SUSPEND=y
-CONFIG_MMC_UNSAFE_RESUME=y
-CONFIG_USB=y
-CONFIG_USB_DWC2=y
-CONFIG_USB_DWC2_HOST=y
-CONFIG_USB_DWC2_PLATFORM=y
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index a17818475050..409637254594 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -58,8 +58,14 @@
 #define PFD_PLL1_BASE           (anatop_base + 0x2b0)
 #define PFD_PLL2_BASE           (anatop_base + 0x100)
 #define PFD_PLL3_BASE           (anatop_base + 0xf0)
+#define PLL1_CTRL               (anatop_base + 0x270)
+#define PLL2_CTRL               (anatop_base + 0x30)
 #define PLL3_CTRL               (anatop_base + 0x10)
+#define PLL4_CTRL               (anatop_base + 0x70)
+#define PLL5_CTRL               (anatop_base + 0xe0)
+#define PLL6_CTRL               (anatop_base + 0xa0)
 #define PLL7_CTRL               (anatop_base + 0x20)
+#define ANA_MISC1               (anatop_base + 0x160)
 
 static void __iomem *anatop_base;
 static void __iomem *ccm_base;
@@ -67,25 +73,34 @@ static void __iomem *ccm_base;
 /* sources for multiplexer clocks, this is used multiple times */
 static const char *fast_sels[]  = { "firc", "fxosc", };
 static const char *slow_sels[]  = { "sirc_32k", "sxosc", };
-static const char *pll1_sels[]  = { "pll1_main", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", };
-static const char *pll2_sels[]  = { "pll2_main", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", };
-static const char *sys_sels[]   = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_main", "pll1_pfd_sel", "pll3_main", };
+static const char *pll1_sels[]  = { "pll1_sys", "pll1_pfd1", "pll1_pfd2", "pll1_pfd3", "pll1_pfd4", };
+static const char *pll2_sels[]  = { "pll2_bus", "pll2_pfd1", "pll2_pfd2", "pll2_pfd3", "pll2_pfd4", };
+static const char *pll_bypass_src_sels[] = { "fast_clk_sel", "lvds1_in", };
+static const char *pll1_bypass_sels[] = { "pll1", "pll1_bypass_src", };
+static const char *pll2_bypass_sels[] = { "pll2", "pll2_bypass_src", };
+static const char *pll3_bypass_sels[] = { "pll3", "pll3_bypass_src", };
+static const char *pll4_bypass_sels[] = { "pll4", "pll4_bypass_src", };
+static const char *pll5_bypass_sels[] = { "pll5", "pll5_bypass_src", };
+static const char *pll6_bypass_sels[] = { "pll6", "pll6_bypass_src", };
+static const char *pll7_bypass_sels[] = { "pll7", "pll7_bypass_src", };
+static const char *sys_sels[]   = { "fast_clk_sel", "slow_clk_sel", "pll2_pfd_sel", "pll2_bus", "pll1_pfd_sel", "pll3_usb_otg", };
 static const char *ddr_sels[]   = { "pll2_pfd2", "sys_sel", };
 static const char *rmii_sels[]  = { "enet_ext", "audio_ext", "enet_50m", "enet_25m", };
 static const char *enet_ts_sels[]       = { "enet_ext", "fxosc", "audio_ext", "usb", "enet_ts", "enet_25m", "enet_50m", };
-static const char *esai_sels[]  = { "audio_ext", "mlb", "spdif_rx", "pll4_main_div", };
-static const char *sai_sels[]   = { "audio_ext", "mlb", "spdif_rx", "pll4_main_div", };
+static const char *esai_sels[]  = { "audio_ext", "mlb", "spdif_rx", "pll4_audio_div", };
+static const char *sai_sels[]   = { "audio_ext", "mlb", "spdif_rx", "pll4_audio_div", };
 static const char *nfc_sels[]   = { "platform_bus", "pll1_pfd1", "pll3_pfd1", "pll3_pfd3", };
-static const char *qspi_sels[]  = { "pll3_main", "pll3_pfd4", "pll2_pfd4", "pll1_pfd4", };
-static const char *esdhc_sels[] = { "pll3_main", "pll3_pfd3", "pll1_pfd3", "platform_bus", };
-static const char *dcu_sels[]   = { "pll1_pfd2", "pll3_main", };
+static const char *qspi_sels[]  = { "pll3_usb_otg", "pll3_pfd4", "pll2_pfd4", "pll1_pfd4", };
+static const char *esdhc_sels[] = { "pll3_usb_otg", "pll3_pfd3", "pll1_pfd3", "platform_bus", };
+static const char *dcu_sels[]   = { "pll1_pfd2", "pll3_usb_otg", };
 static const char *gpu_sels[]   = { "pll2_pfd2", "pll3_pfd2", };
-static const char *vadc_sels[]  = { "pll6_main_div", "pll3_main_div", "pll3_main", };
+static const char *vadc_sels[]  = { "pll6_video_div", "pll3_usb_otg_div", "pll3_usb_otg", };
 /* FTM counter clock source, not module clock */
 static const char *ftm_ext_sels[]       = {"sirc_128k", "sxosc", "fxosc_half", "audio_ext", };
 static const char *ftm_fix_sels[]       = { "sxosc", "ipg_bus", };
 
-static struct clk_div_table pll4_main_div_table[] = {
+
+static struct clk_div_table pll4_audio_div_table[] = {
         { .val = 0, .div = 1 },
         { .val = 1, .div = 2 },
         { .val = 2, .div = 6 },
@@ -120,6 +135,9 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
         clk[VF610_CLK_AUDIO_EXT] = imx_obtain_fixed_clock("audio_ext", 0);
         clk[VF610_CLK_ENET_EXT] = imx_obtain_fixed_clock("enet_ext", 0);
 
+        /* Clock source from external clock via LVDs PAD */
+        clk[VF610_CLK_ANACLK1] = imx_obtain_fixed_clock("anaclk1", 0);
+
         clk[VF610_CLK_FXOSC_HALF] = imx_clk_fixed_factor("fxosc_half", "fxosc", 1, 2);
 
         np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop");
@@ -133,31 +151,63 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
         clk[VF610_CLK_SLOW_CLK_SEL] = imx_clk_mux("slow_clk_sel", CCM_CCSR, 4, 1, slow_sels, ARRAY_SIZE(slow_sels));
         clk[VF610_CLK_FASK_CLK_SEL] = imx_clk_mux("fast_clk_sel", CCM_CCSR, 5, 1, fast_sels, ARRAY_SIZE(fast_sels));
 
-        clk[VF610_CLK_PLL1_MAIN] = imx_clk_fixed_factor("pll1_main", "fast_clk_sel", 22, 1);
-        clk[VF610_CLK_PLL1_PFD1] = imx_clk_pfd("pll1_pfd1", "pll1_main", PFD_PLL1_BASE, 0);
-        clk[VF610_CLK_PLL1_PFD2] = imx_clk_pfd("pll1_pfd2", "pll1_main", PFD_PLL1_BASE, 1);
-        clk[VF610_CLK_PLL1_PFD3] = imx_clk_pfd("pll1_pfd3", "pll1_main", PFD_PLL1_BASE, 2);
-        clk[VF610_CLK_PLL1_PFD4] = imx_clk_pfd("pll1_pfd4", "pll1_main", PFD_PLL1_BASE, 3);
-
-        clk[VF610_CLK_PLL2_MAIN] = imx_clk_fixed_factor("pll2_main", "fast_clk_sel", 22, 1);
-        clk[VF610_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_main", PFD_PLL2_BASE, 0);
-        clk[VF610_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_main", PFD_PLL2_BASE, 1);
-        clk[VF610_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3", "pll2_main", PFD_PLL2_BASE, 2);
-        clk[VF610_CLK_PLL2_PFD4] = imx_clk_pfd("pll2_pfd4", "pll2_main", PFD_PLL2_BASE, 3);
-
-        clk[VF610_CLK_PLL3_MAIN] = imx_clk_fixed_factor("pll3_main", "fast_clk_sel", 20, 1);
-        clk[VF610_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_main", PFD_PLL3_BASE, 0);
-        clk[VF610_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_main", PFD_PLL3_BASE, 1);
-        clk[VF610_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_main", PFD_PLL3_BASE, 2);
-        clk[VF610_CLK_PLL3_PFD4] = imx_clk_pfd("pll3_pfd4", "pll3_main", PFD_PLL3_BASE, 3);
-
-        clk[VF610_CLK_PLL4_MAIN] = imx_clk_fixed_factor("pll4_main", "fast_clk_sel", 25, 1);
-        /* Enet pll: fixed 50Mhz */
-        clk[VF610_CLK_PLL5_MAIN] = imx_clk_fixed_factor("pll5_main", "fast_clk_sel", 125, 6);
-        /* pll6: default 960Mhz */
-        clk[VF610_CLK_PLL6_MAIN] = imx_clk_fixed_factor("pll6_main", "fast_clk_sel", 40, 1);
-        /* pll7: USB1 PLL at 480MHz */
-        clk[VF610_CLK_PLL7_MAIN] = imx_clk_pllv3(IMX_PLLV3_USB, "pll7_main", "fast_clk_sel", PLL7_CTRL, 0x2);
+        clk[VF610_CLK_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", PLL1_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL2_BYPASS_SRC] = imx_clk_mux("pll2_bypass_src", PLL2_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL3_BYPASS_SRC] = imx_clk_mux("pll3_bypass_src", PLL3_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL4_BYPASS_SRC] = imx_clk_mux("pll4_bypass_src", PLL4_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL5_BYPASS_SRC] = imx_clk_mux("pll5_bypass_src", PLL5_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL6_BYPASS_SRC] = imx_clk_mux("pll6_bypass_src", PLL6_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+        clk[VF610_CLK_PLL7_BYPASS_SRC] = imx_clk_mux("pll7_bypass_src", PLL7_CTRL, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
+
+        clk[VF610_CLK_PLL1] = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll1", "pll1_bypass_src", PLL1_CTRL, 0x1);
+        clk[VF610_CLK_PLL2] = imx_clk_pllv3(IMX_PLLV3_GENERIC, "pll2", "pll2_bypass_src", PLL2_CTRL, 0x1);
+        clk[VF610_CLK_PLL3] = imx_clk_pllv3(IMX_PLLV3_USB,     "pll3", "pll3_bypass_src", PLL3_CTRL, 0x1);
+        clk[VF610_CLK_PLL4] = imx_clk_pllv3(IMX_PLLV3_AV,      "pll4", "pll4_bypass_src", PLL4_CTRL, 0x7f);
+        clk[VF610_CLK_PLL5] = imx_clk_pllv3(IMX_PLLV3_ENET,    "pll5", "pll5_bypass_src", PLL5_CTRL, 0x3);
+        clk[VF610_CLK_PLL6] = imx_clk_pllv3(IMX_PLLV3_AV,      "pll6", "pll6_bypass_src", PLL6_CTRL, 0x7f);
+        clk[VF610_CLK_PLL7] = imx_clk_pllv3(IMX_PLLV3_USB,     "pll7", "pll7_bypass_src", PLL7_CTRL, 0x1);
+
+        clk[VF610_PLL1_BYPASS] = imx_clk_mux_flags("pll1_bypass", PLL1_CTRL, 16, 1, pll1_bypass_sels, ARRAY_SIZE(pll1_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL2_BYPASS] = imx_clk_mux_flags("pll2_bypass", PLL2_CTRL, 16, 1, pll2_bypass_sels, ARRAY_SIZE(pll2_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL3_BYPASS] = imx_clk_mux_flags("pll3_bypass", PLL3_CTRL, 16, 1, pll3_bypass_sels, ARRAY_SIZE(pll3_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL4_BYPASS] = imx_clk_mux_flags("pll4_bypass", PLL4_CTRL, 16, 1, pll4_bypass_sels, ARRAY_SIZE(pll4_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL5_BYPASS] = imx_clk_mux_flags("pll5_bypass", PLL5_CTRL, 16, 1, pll5_bypass_sels, ARRAY_SIZE(pll5_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL6_BYPASS] = imx_clk_mux_flags("pll6_bypass", PLL6_CTRL, 16, 1, pll6_bypass_sels, ARRAY_SIZE(pll6_bypass_sels), CLK_SET_RATE_PARENT);
+        clk[VF610_PLL7_BYPASS] = imx_clk_mux_flags("pll7_bypass", PLL7_CTRL, 16, 1, pll7_bypass_sels, ARRAY_SIZE(pll7_bypass_sels), CLK_SET_RATE_PARENT);
+
+        /* Do not bypass PLLs initially */
+        clk_set_parent(clk[VF610_PLL1_BYPASS], clk[VF610_CLK_PLL1]);
+        clk_set_parent(clk[VF610_PLL2_BYPASS], clk[VF610_CLK_PLL2]);
+        clk_set_parent(clk[VF610_PLL3_BYPASS], clk[VF610_CLK_PLL3]);
+        clk_set_parent(clk[VF610_PLL4_BYPASS], clk[VF610_CLK_PLL4]);
+        clk_set_parent(clk[VF610_PLL5_BYPASS], clk[VF610_CLK_PLL5]);
+        clk_set_parent(clk[VF610_PLL6_BYPASS], clk[VF610_CLK_PLL6]);
+        clk_set_parent(clk[VF610_PLL7_BYPASS], clk[VF610_CLK_PLL7]);
+
+        clk[VF610_CLK_PLL1_SYS]      = imx_clk_gate("pll1_sys",      "pll1_bypass", PLL1_CTRL, 13);
+        clk[VF610_CLK_PLL2_BUS]      = imx_clk_gate("pll2_bus",      "pll2_bypass", PLL2_CTRL, 13);
+        clk[VF610_CLK_PLL3_USB_OTG]  = imx_clk_gate("pll3_usb_otg",  "pll3_bypass", PLL3_CTRL, 13);
+        clk[VF610_CLK_PLL4_AUDIO]    = imx_clk_gate("pll4_audio",    "pll4_bypass", PLL4_CTRL, 13);
+        clk[VF610_CLK_PLL5_ENET]     = imx_clk_gate("pll5_enet",     "pll5_bypass", PLL5_CTRL, 13);
+        clk[VF610_CLK_PLL6_VIDEO]    = imx_clk_gate("pll6_video",    "pll6_bypass", PLL6_CTRL, 13);
+        clk[VF610_CLK_PLL7_USB_HOST] = imx_clk_gate("pll7_usb_host", "pll7_bypass", PLL7_CTRL, 13);
+
+        clk[VF610_CLK_LVDS1_IN]  = imx_clk_gate_exclusive("lvds1_in", "anaclk1", ANA_MISC1, 12, BIT(10));
+
+        clk[VF610_CLK_PLL1_PFD1] = imx_clk_pfd("pll1_pfd1", "pll1_sys", PFD_PLL1_BASE, 0);
+        clk[VF610_CLK_PLL1_PFD2] = imx_clk_pfd("pll1_pfd2", "pll1_sys", PFD_PLL1_BASE, 1);
+        clk[VF610_CLK_PLL1_PFD3] = imx_clk_pfd("pll1_pfd3", "pll1_sys", PFD_PLL1_BASE, 2);
+        clk[VF610_CLK_PLL1_PFD4] = imx_clk_pfd("pll1_pfd4", "pll1_sys", PFD_PLL1_BASE, 3);
+
+        clk[VF610_CLK_PLL2_PFD1] = imx_clk_pfd("pll2_pfd1", "pll2_bus", PFD_PLL2_BASE, 0);
+        clk[VF610_CLK_PLL2_PFD2] = imx_clk_pfd("pll2_pfd2", "pll2_bus", PFD_PLL2_BASE, 1);
+        clk[VF610_CLK_PLL2_PFD3] = imx_clk_pfd("pll2_pfd3", "pll2_bus", PFD_PLL2_BASE, 2);
+        clk[VF610_CLK_PLL2_PFD4] = imx_clk_pfd("pll2_pfd4", "pll2_bus", PFD_PLL2_BASE, 3);
+
+        clk[VF610_CLK_PLL3_PFD1] = imx_clk_pfd("pll3_pfd1", "pll3_usb_otg", PFD_PLL3_BASE, 0);
+        clk[VF610_CLK_PLL3_PFD2] = imx_clk_pfd("pll3_pfd2", "pll3_usb_otg", PFD_PLL3_BASE, 1);
+        clk[VF610_CLK_PLL3_PFD3] = imx_clk_pfd("pll3_pfd3", "pll3_usb_otg", PFD_PLL3_BASE, 2);
+        clk[VF610_CLK_PLL3_PFD4] = imx_clk_pfd("pll3_pfd4", "pll3_usb_otg", PFD_PLL3_BASE, 3);
 
         clk[VF610_CLK_PLL1_PFD_SEL] = imx_clk_mux("pll1_pfd_sel", CCM_CCSR, 16, 3, pll1_sels, 5);
         clk[VF610_CLK_PLL2_PFD_SEL] = imx_clk_mux("pll2_pfd_sel", CCM_CCSR, 19, 3, pll2_sels, 5);
@@ -167,12 +217,12 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
         clk[VF610_CLK_PLATFORM_BUS] = imx_clk_divider("platform_bus", "sys_bus", CCM_CACRR, 3, 3);
         clk[VF610_CLK_IPG_BUS] = imx_clk_divider("ipg_bus", "platform_bus", CCM_CACRR, 11, 2);
 
-        clk[VF610_CLK_PLL3_MAIN_DIV] = imx_clk_divider("pll3_main_div", "pll3_main", CCM_CACRR, 20, 1);
-        clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_main_div", "pll4_main", 0, CCM_CACRR, 6, 3, 0, pll4_main_div_table, &imx_ccm_lock);
-        clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_main_div", "pll6_main", CCM_CACRR, 21, 1);
+        clk[VF610_CLK_PLL3_MAIN_DIV] = imx_clk_divider("pll3_usb_otg_div", "pll3_usb_otg", CCM_CACRR, 20, 1);
+        clk[VF610_CLK_PLL4_MAIN_DIV] = clk_register_divider_table(NULL, "pll4_audio_div", "pll4_audio", 0, CCM_CACRR, 6, 3, 0, pll4_audio_div_table, &imx_ccm_lock);
+        clk[VF610_CLK_PLL6_MAIN_DIV] = imx_clk_divider("pll6_video_div", "pll6_video", CCM_CACRR, 21, 1);
 
-        clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_main", PLL3_CTRL, 6);
-        clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_main", PLL7_CTRL, 6);
+        clk[VF610_CLK_USBPHY0] = imx_clk_gate("usbphy0", "pll3_usb_otg", PLL3_CTRL, 6);
+        clk[VF610_CLK_USBPHY1] = imx_clk_gate("usbphy1", "pll7_usb_host", PLL7_CTRL, 6);
 
         clk[VF610_CLK_USBC0] = imx_clk_gate2("usbc0", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(4));
         clk[VF610_CLK_USBC1] = imx_clk_gate2("usbc1", "ipg_bus", CCM_CCGR7, CCM_CCGRx_CGn(4));
@@ -191,8 +241,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
         clk[VF610_CLK_QSPI1_X1_DIV] = imx_clk_divider("qspi1_x1", "qspi1_x2", CCM_CSCDR3, 11, 1);
         clk[VF610_CLK_QSPI1] = imx_clk_gate2("qspi1", "qspi1_x1", CCM_CCGR8, CCM_CCGRx_CGn(4));
 
-        clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m", "pll5_main", 1, 10);
-        clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m", "pll5_main", 1, 20);
+        clk[VF610_CLK_ENET_50M] = imx_clk_fixed_factor("enet_50m", "pll5_enet", 1, 10);
+        clk[VF610_CLK_ENET_25M] = imx_clk_fixed_factor("enet_25m", "pll5_enet", 1, 20);
         clk[VF610_CLK_ENET_SEL] = imx_clk_mux("enet_sel", CCM_CSCMR2, 4, 2, rmii_sels, 4);
         clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
         clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 559c69a47731..7d11979da030 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -76,7 +76,7 @@ static inline void __indirect_writeb(u8 value, volatile void __iomem *p)
         u32 n, byte_enables, data;
 
         if (!is_pci_memory(addr)) {
-                __raw_writeb(value, addr);
+                __raw_writeb(value, p);
                 return;
         }
 
@@ -141,7 +141,7 @@ static inline unsigned char __indirect_readb(const volatile void __iomem *p)
         u32 n, byte_enables, data;
 
         if (!is_pci_memory(addr))
-                return __raw_readb(addr);
+                return __raw_readb(p);
 
         n = addr % 4;
         byte_enables = (0xf & ~BIT(n)) << IXP4XX_PCI_NP_CBE_BESL;
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index d22c30d3ccfa..8c58b71c2727 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -917,6 +917,10 @@ static int __init omap_device_late_idle(struct device *dev, void *data)
 static int __init omap_device_late_init(void)
 {
         bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
+
+        WARN(!of_have_populated_dt(),
+                "legacy booting deprecated, please update to boot with .dts\n");
+
         return 0;
 }
 omap_late_initcall_sync(omap_device_late_init);
diff --git a/arch/arm/mach-pxa/include/mach/addr-map.h b/arch/arm/mach-pxa/include/mach/addr-map.h
index bbf9df37ad4b..d28fe291233a 100644
--- a/arch/arm/mach-pxa/include/mach/addr-map.h
+++ b/arch/arm/mach-pxa/include/mach/addr-map.h
@@ -39,6 +39,11 @@
 #define DMEMC_SIZE              0x00100000
 
 /*
+ * Reserved space for low level debug virtual addresses within
+ * 0xf6200000..0xf6201000
+ */
+
+/*
  * Internal Memory Controller (PXA27x and later)
  */
 #define IMEMC_PHYS              0x58000000
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 4ce602c2c6de..dd301be89ecc 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -35,6 +35,9 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_ARCH_THUNDER=y
 CONFIG_ARCH_VEXPRESS=y
 CONFIG_ARCH_XGENE=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_XGENE=y
 CONFIG_SMP=y
 CONFIG_PREEMPT=y
 CONFIG_KSM=y
@@ -52,6 +55,7 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_IP_PNP_BOOTP=y
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
+CONFIG_BPF_JIT=y
 # CONFIG_WIRELESS is not set
 CONFIG_NET_9P=y
 CONFIG_NET_9P_VIRTIO=y
@@ -65,16 +69,17 @@ CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 # CONFIG_SCSI_LOWLEVEL is not set
 CONFIG_ATA=y
+CONFIG_SATA_AHCI=y
+CONFIG_SATA_AHCI_PLATFORM=y
 CONFIG_AHCI_XGENE=y
-CONFIG_PHY_XGENE=y
 CONFIG_PATA_PLATFORM=y
 CONFIG_PATA_OF_PLATFORM=y
 CONFIG_NETDEVICES=y
 CONFIG_TUN=y
 CONFIG_VIRTIO_NET=y
+CONFIG_NET_XGENE=y
 CONFIG_SMC91X=y
 CONFIG_SMSC911X=y
-CONFIG_NET_XGENE=y
 # CONFIG_WLAN is not set
 CONFIG_INPUT_EVDEV=y
 # CONFIG_SERIO_SERPORT is not set
@@ -87,6 +92,11 @@ CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_VIRTIO_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
+# CONFIG_HMC_DRV is not set
+CONFIG_SPI=y
+CONFIG_SPI_PL022=y
+CONFIG_GPIO_PL061=y
+CONFIG_GPIO_XGENE=y
 # CONFIG_HWMON is not set
 CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
@@ -97,13 +107,25 @@ CONFIG_LOGO=y
 # CONFIG_LOGO_LINUX_MONO is not set
 # CONFIG_LOGO_LINUX_VGA16 is not set
 CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_HCD_PLATFORM=y
 CONFIG_USB_ISP1760_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
+CONFIG_USB_ULPI=y
 CONFIG_MMC=y
 CONFIG_MMC_ARMMMCI=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SPI=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_EFI=y
+CONFIG_RTC_DRV_XGENE=y
 CONFIG_VIRTIO_BALLOON=y
 CONFIG_VIRTIO_MMIO=y
 # CONFIG_IOMMU_SUPPORT is not set
+CONFIG_PHY_XGENE=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/arm64/include/asm/unistd32.h b/arch/arm64/include/asm/unistd32.h
index da1f06b535e3..9dfdac4a74a1 100644
--- a/arch/arm64/include/asm/unistd32.h
+++ b/arch/arm64/include/asm/unistd32.h
@@ -792,3 +792,5 @@ __SYSCALL(__NR_renameat2, sys_renameat2)
 __SYSCALL(__NR_getrandom, sys_getrandom)
 #define __NR_memfd_create 385
 __SYSCALL(__NR_memfd_create, sys_memfd_create)
+#define __NR_bpf 386
+__SYSCALL(__NR_bpf, sys_bpf)
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 866c1c821860..663da771580a 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -528,7 +528,7 @@ static int __maybe_unused cpu_psci_cpu_suspend(unsigned long index)
         if (WARN_ON_ONCE(!index))
                 return -EINVAL;
 
-        if (state->type == PSCI_POWER_STATE_TYPE_STANDBY)
+        if (state[index - 1].type == PSCI_POWER_STATE_TYPE_STANDBY)
                 ret = psci_ops.cpu_suspend(state[index - 1], 0);
         else
                 ret = __cpu_suspend(index, psci_suspend_finisher);
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 4ef7a54813e6..75e75d7b1702 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
 #include <uapi/asm/unistd.h>
 
 
-#define NR_syscalls             354
+#define NR_syscalls             355
 
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index b419c6b7ac37..2c1bec9a14b6 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -359,5 +359,6 @@
 #define __NR_renameat2          351
 #define __NR_getrandom          352
 #define __NR_memfd_create       353
+#define __NR_bpf                354
 
 #endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 05b46c2b08b8..2ca219e184cd 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -374,4 +374,5 @@ ENTRY(sys_call_table)
         .long sys_renameat2
         .long sys_getrandom
         .long sys_memfd_create
+        .long sys_bpf
 
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 23cb94806fbc..58076472bdd8 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -93,6 +93,15 @@ LDFLAGS_vmlinux			+= -G 0 -static -n -nostdlib
 KBUILD_AFLAGS_MODULE            += -mlong-calls
 KBUILD_CFLAGS_MODULE            += -mlong-calls
 
+#
+# pass -msoft-float to GAS if it supports it.  However on newer binutils
+# (specifically newer than 2.24.51.20140728) we then also need to explicitly
+# set ".set hardfloat" in all files which manipulate floating point registers.
+#
+ifneq ($(call as-option,-Wa$(comma)-msoft-float,),)
+        cflags-y                += -DGAS_HAS_SET_HARDFLOAT -Wa,-msoft-float
+endif
+
 cflags-y += -ffreestanding
 
 #
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 741734049675..2bc4aa95944e 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -809,6 +809,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio_v2 = {
         .irq_set_type = octeon_irq_ciu_gpio_set_type,
 #ifdef CONFIG_SMP
         .irq_set_affinity = octeon_irq_ciu_set_affinity_v2,
+        .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
 #endif
         .flags = IRQCHIP_SET_TYPE_MASKED,
 };
@@ -823,6 +824,7 @@ static struct irq_chip octeon_irq_chip_ciu_gpio = {
         .irq_set_type = octeon_irq_ciu_gpio_set_type,
 #ifdef CONFIG_SMP
         .irq_set_affinity = octeon_irq_ciu_set_affinity,
+        .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
 #endif
         .flags = IRQCHIP_SET_TYPE_MASKED,
 };
diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h
index e38c2811d4e2..cdac7b3eeaf7 100644
--- a/arch/mips/include/asm/asmmacro-32.h
+++ b/arch/mips/include/asm/asmmacro-32.h
@@ -13,6 +13,8 @@
 #include <asm/mipsregs.h>
 
         .macro  fpu_save_single thread tmp=t0
+        .set push
+        SET_HARDFLOAT
         cfc1    \tmp,  fcr31
         swc1    $f0,  THREAD_FPR0_LS64(\thread)
         swc1    $f1,  THREAD_FPR1_LS64(\thread)
@@ -47,9 +49,12 @@
         swc1    $f30, THREAD_FPR30_LS64(\thread)
         swc1    $f31, THREAD_FPR31_LS64(\thread)
         sw      \tmp, THREAD_FCR31(\thread)
+        .set pop
         .endm
 
         .macro  fpu_restore_single thread tmp=t0
+        .set push
+        SET_HARDFLOAT
         lw      \tmp, THREAD_FCR31(\thread)
         lwc1    $f0,  THREAD_FPR0_LS64(\thread)
         lwc1    $f1,  THREAD_FPR1_LS64(\thread)
@@ -84,6 +89,7 @@
         lwc1    $f30, THREAD_FPR30_LS64(\thread)
         lwc1    $f31, THREAD_FPR31_LS64(\thread)
         ctc1    \tmp, fcr31
+        .set pop
         .endm
 
         .macro  cpu_save_nonscratch thread
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index cd9a98bc8f60..6caf8766b80f 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -57,6 +57,8 @@
 #endif /* CONFIG_CPU_MIPSR2 */
 
         .macro  fpu_save_16even thread tmp=t0
+        .set    push
+        SET_HARDFLOAT
         cfc1    \tmp, fcr31
         sdc1    $f0,  THREAD_FPR0_LS64(\thread)
         sdc1    $f2,  THREAD_FPR2_LS64(\thread)
@@ -75,11 +77,13 @@
         sdc1    $f28, THREAD_FPR28_LS64(\thread)
         sdc1    $f30, THREAD_FPR30_LS64(\thread)
         sw      \tmp, THREAD_FCR31(\thread)
+        .set    pop
         .endm
 
         .macro  fpu_save_16odd thread
         .set    push
         .set    mips64r2
+        SET_HARDFLOAT
         sdc1    $f1,  THREAD_FPR1_LS64(\thread)
         sdc1    $f3,  THREAD_FPR3_LS64(\thread)
         sdc1    $f5,  THREAD_FPR5_LS64(\thread)
@@ -110,6 +114,8 @@
         .endm
 
         .macro  fpu_restore_16even thread tmp=t0
+        .set    push
+        SET_HARDFLOAT
         lw      \tmp, THREAD_FCR31(\thread)
         ldc1    $f0,  THREAD_FPR0_LS64(\thread)
         ldc1    $f2,  THREAD_FPR2_LS64(\thread)
@@ -133,6 +139,7 @@
         .macro  fpu_restore_16odd thread
         .set    push
         .set    mips64r2
+        SET_HARDFLOAT
         ldc1    $f1,  THREAD_FPR1_LS64(\thread)
         ldc1    $f3,  THREAD_FPR3_LS64(\thread)
         ldc1    $f5,  THREAD_FPR5_LS64(\thread)
@@ -277,6 +284,7 @@
         .macro  cfcmsa  rd, cs
         .set    push
         .set    noat
+        SET_HARDFLOAT
         .insn
         .word   CFC_MSA_INSN | (\cs << 11)
         move    \rd, $1
@@ -286,6 +294,7 @@
         .macro  ctcmsa  cd, rs
         .set    push
         .set    noat
+        SET_HARDFLOAT
         move    $1, \rs
         .word   CTC_MSA_INSN | (\cd << 6)
         .set    pop
@@ -294,6 +303,7 @@
         .macro  ld_d    wd, off, base
         .set    push
         .set    noat
+        SET_HARDFLOAT
         add     $1, \base, \off
         .word   LDD_MSA_INSN | (\wd << 6)
         .set    pop
@@ -302,6 +312,7 @@
         .macro  st_d    wd, off, base
         .set    push
         .set    noat
+        SET_HARDFLOAT
         add     $1, \base, \off
         .word   STD_MSA_INSN | (\wd << 6)
         .set    pop
@@ -310,6 +321,7 @@
         .macro  copy_u_w        rd, ws, n
         .set    push
         .set    noat
+        SET_HARDFLOAT
         .insn
         .word   COPY_UW_MSA_INSN | (\n << 16) | (\ws << 11)
         /* move triggers an assembler bug... */
@@ -320,6 +332,7 @@
         .macro  copy_u_d        rd, ws, n
         .set    push
         .set    noat
+        SET_HARDFLOAT
         .insn
         .word   COPY_UD_MSA_INSN | (\n << 16) | (\ws << 11)
         /* move triggers an assembler bug... */
@@ -330,6 +343,7 @@
         .macro  insert_w        wd, n, rs
         .set    push
         .set    noat
+        SET_HARDFLOAT
         /* move triggers an assembler bug... */
         or      $1, \rs, zero
         .word   INSERT_W_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -339,6 +353,7 @@
         .macro  insert_d        wd, n, rs
         .set    push
         .set    noat
+        SET_HARDFLOAT
         /* move triggers an assembler bug... */
         or      $1, \rs, zero
         .word   INSERT_D_MSA_INSN | (\n << 16) | (\wd << 6)
@@ -381,6 +396,7 @@
         st_d    31, THREAD_FPR31, \thread
         .set    push
         .set    noat
+        SET_HARDFLOAT
         cfcmsa  $1, MSA_CSR
         sw      $1, THREAD_MSA_CSR(\thread)
         .set    pop
@@ -389,6 +405,7 @@
         .macro  msa_restore_all thread
         .set    push
         .set    noat
+        SET_HARDFLOAT
         lw      $1, THREAD_MSA_CSR(\thread)
         ctcmsa  MSA_CSR, $1
         .set    pop
@@ -441,6 +458,7 @@
         .macro  msa_init_all_upper
         .set    push
         .set    noat
+        SET_HARDFLOAT
         not     $1, zero
         msa_init_upper  0
         .set    pop
diff --git a/arch/mips/include/asm/fpregdef.h b/arch/mips/include/asm/fpregdef.h
index 429481f9028d..f184ba088532 100644
--- a/arch/mips/include/asm/fpregdef.h
+++ b/arch/mips/include/asm/fpregdef.h
@@ -14,6 +14,20 @@
 
 #include <asm/sgidefs.h>
 
+/*
+ * starting with binutils 2.24.51.20140729, MIPS binutils warn about mixing
+ * hardfloat and softfloat object files.  The kernel build uses soft-float by
+ * default, so we also need to pass -msoft-float along to GAS if it supports it.
+ * But this in turn causes assembler errors in files which access hardfloat
+ * registers.  We detect if GAS supports "-msoft-float" in the Makefile and
+ * explicitly put ".set hardfloat" where floating point registers are touched.
+ */
+#ifdef GAS_HAS_SET_HARDFLOAT
+#define SET_HARDFLOAT .set hardfloat
+#else
+#define SET_HARDFLOAT
+#endif
+
 #if _MIPS_SIM == _MIPS_SIM_ABI32
 
 /*
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index 4d0aeda68397..dd562414cd5e 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -145,8 +145,8 @@ static inline void lose_fpu(int save)
         if (is_msa_enabled()) {
                 if (save) {
                         save_msa(current);
-                        asm volatile("cfc1 %0, $31"
-                                : "=r"(current->thread.fpu.fcr31));
+                        current->thread.fpu.fcr31 =
+                                        read_32bit_cp1_register(CP1_STATUS);
                 }
                 disable_msa();
                 clear_thread_flag(TIF_USEDMSA);
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index cf3b580c3df6..b46cd220a018 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -1324,7 +1324,7 @@ do {									\
 /*
  * Macros to access the floating point coprocessor control registers
  */
-#define read_32bit_cp1_register(source)                                 \
+#define _read_32bit_cp1_register(source, gas_hardfloat)                 \
 ({                                                                      \
         int __res;                                                      \
                                                                         \
@@ -1334,12 +1334,21 @@ do {									\
         "       # gas fails to assemble cfc1 for some archs,    \n"     \
         "       # like Octeon.                                  \n"     \
         "       .set    mips1                                   \n"     \
+        "       "STR(gas_hardfloat)"                            \n"     \
         "       cfc1    %0,"STR(source)"                        \n"     \
         "       .set    pop                                     \n"     \
         : "=r" (__res));                                                \
         __res;                                                          \
 })
 
+#ifdef GAS_HAS_SET_HARDFLOAT
+#define read_32bit_cp1_register(source)                                 \
+        _read_32bit_cp1_register(source, .set hardfloat)
+#else
+#define read_32bit_cp1_register(source)                                 \
+        _read_32bit_cp1_register(source, )
+#endif
+
 #ifdef HAVE_AS_DSP
 #define rddsp(mask)                                                     \
 ({                                                                      \
diff --git a/arch/mips/include/uapi/asm/unistd.h b/arch/mips/include/uapi/asm/unistd.h
index fdb4923777d1..9dc58568f230 100644
--- a/arch/mips/include/uapi/asm/unistd.h
+++ b/arch/mips/include/uapi/asm/unistd.h
@@ -375,16 +375,17 @@
 #define __NR_seccomp                    (__NR_Linux + 352)
 #define __NR_getrandom                  (__NR_Linux + 353)
 #define __NR_memfd_create               (__NR_Linux + 354)
+#define __NR_bpf                        (__NR_Linux + 355)
 
 /*
  * Offset of the last Linux o32 flavoured syscall
  */
-#define __NR_Linux_syscalls             354
+#define __NR_Linux_syscalls             355
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
 
 #define __NR_O32_Linux                  4000
-#define __NR_O32_Linux_syscalls         354
+#define __NR_O32_Linux_syscalls         355
 
 #if _MIPS_SIM == _MIPS_SIM_ABI64
 
@@ -707,16 +708,17 @@
 #define __NR_seccomp                    (__NR_Linux + 312)
 #define __NR_getrandom                  (__NR_Linux + 313)
 #define __NR_memfd_create               (__NR_Linux + 314)
+#define __NR_bpf                        (__NR_Linux + 315)
 
 /*
  * Offset of the last Linux 64-bit flavoured syscall
  */
-#define __NR_Linux_syscalls             314
+#define __NR_Linux_syscalls             315
 
 #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
 
 #define __NR_64_Linux                   5000
-#define __NR_64_Linux_syscalls          314
+#define __NR_64_Linux_syscalls          315
 
 #if _MIPS_SIM == _MIPS_SIM_NABI32
 
@@ -1043,15 +1045,16 @@
 #define __NR_seccomp                    (__NR_Linux + 316)
 #define __NR_getrandom                  (__NR_Linux + 317)
 #define __NR_memfd_create               (__NR_Linux + 318)
+#define __NR_memfd_create               (__NR_Linux + 319)
 
 /*
  * Offset of the last N32 flavoured syscall
  */
-#define __NR_Linux_syscalls             318
+#define __NR_Linux_syscalls             319
 
 #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
 
 #define __NR_N32_Linux                  6000
-#define __NR_N32_Linux_syscalls         318
+#define __NR_N32_Linux_syscalls         319
 
 #endif /* _UAPI_ASM_UNISTD_H */
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 7b2df224f041..4d7d99d601cc 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -144,7 +144,7 @@ int __mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                 case mm_bc1t_op:
                         preempt_disable();
                         if (is_fpu_owner())
-                                asm volatile("cfc1\t%0,$31" : "=r" (fcr31));
+                                fcr31 = read_32bit_cp1_register(CP1_STATUS);
                         else
                                 fcr31 = current->thread.fpu.fcr31;
                         preempt_enable();
@@ -562,11 +562,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
         case cop1_op:
                 preempt_disable();
                 if (is_fpu_owner())
-                        asm volatile(
-                                ".set push\n"
-                                "\t.set mips1\n"
-                                "\tcfc1\t%0,$31\n"
-                                "\t.set pop" : "=r" (fcr31));
+                        fcr31 = read_32bit_cp1_register(CP1_STATUS);
                 else
                         fcr31 = current->thread.fpu.fcr31;
                 preempt_enable();
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index ac35e12cb1f3..a5e26dd90592 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -358,6 +358,7 @@ NESTED(nmi_handler, PT_SIZE, sp)
         .set    push
         /* gas fails to assemble cfc1 for some archs (octeon).*/ \
         .set    mips1
+        SET_HARDFLOAT
         cfc1    a1, fcr31
         li      a2, ~(0x3f << 12)
         and     a2, a1
diff --git a/arch/mips/kernel/r2300_fpu.S b/arch/mips/kernel/r2300_fpu.S
index f31063dbdaeb..5ce3b746cedc 100644
--- a/arch/mips/kernel/r2300_fpu.S
+++ b/arch/mips/kernel/r2300_fpu.S
@@ -28,6 +28,8 @@
         .set    mips1
         /* Save floating point context */
 LEAF(_save_fp_context)
+        .set    push
+        SET_HARDFLOAT
         li      v0, 0                                   # assume success
         cfc1    t1,fcr31
         EX(swc1 $f0,(SC_FPREGS+0)(a0))
@@ -65,6 +67,7 @@ LEAF(_save_fp_context)
         EX(sw   t1,(SC_FPC_CSR)(a0))
         cfc1    t0,$0                           # implementation/version
         jr      ra
+        .set    pop
         .set    nomacro
          EX(sw  t0,(SC_FPC_EIR)(a0))
         .set    macro
@@ -80,6 +83,8 @@ LEAF(_save_fp_context)
  * stack frame which might have been changed by the user.
  */
 LEAF(_restore_fp_context)
+        .set    push
+        SET_HARDFLOAT
         li      v0, 0                                   # assume success
         EX(lw t0,(SC_FPC_CSR)(a0))
         EX(lwc1 $f0,(SC_FPREGS+0)(a0))
@@ -116,6 +121,7 @@ LEAF(_restore_fp_context)
         EX(lwc1 $f31,(SC_FPREGS+248)(a0))
         jr      ra
          ctc1   t0,fcr31
+        .set    pop
         END(_restore_fp_context)
         .set    reorder
 
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 20b7b040e76f..435ea652f5fa 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -120,6 +120,9 @@ LEAF(_restore_fp)
 
 #define FPU_DEFAULT  0x00000000
 
+        .set push
+        SET_HARDFLOAT
+
 LEAF(_init_fpu)
         mfc0    t0, CP0_STATUS
         li      t1, ST0_CU1
@@ -165,3 +168,5 @@ LEAF(_init_fpu)
         mtc1    t0, $f31
         jr      ra
         END(_init_fpu)
+
+        .set pop
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 8352523568e6..6c160c67984c 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -19,8 +19,12 @@
 #include <asm/asm-offsets.h>
 #include <asm/regdef.h>
 
+/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
+#undef fp
+
         .macro  EX insn, reg, src
         .set    push
+        SET_HARDFLOAT
         .set    nomacro
 .ex\@:  \insn   \reg, \src
         .set    pop
@@ -33,12 +37,17 @@
         .set    arch=r4000
 
 LEAF(_save_fp_context)
+        .set    push
+        SET_HARDFLOAT
         cfc1    t1, fcr31
+        .set    pop
 
 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
         .set    push
+        SET_HARDFLOAT
 #ifdef CONFIG_CPU_MIPS32_R2
-        .set    mips64r2
+        .set    mips32r2
+        .set    fp=64
         mfc0    t0, CP0_STATUS
         sll     t0, t0, 5
         bgez    t0, 1f                  # skip storing odd if FR=0
@@ -64,6 +73,8 @@ LEAF(_save_fp_context)
 1:      .set    pop
 #endif
 
+        .set push
+        SET_HARDFLOAT
         /* Store the 16 even double precision registers */
         EX      sdc1 $f0, SC_FPREGS+0(a0)
         EX      sdc1 $f2, SC_FPREGS+16(a0)
@@ -84,11 +95,14 @@ LEAF(_save_fp_context)
         EX      sw t1, SC_FPC_CSR(a0)
         jr      ra
          li     v0, 0                                   # success
+        .set pop
         END(_save_fp_context)
 
 #ifdef CONFIG_MIPS32_COMPAT
         /* Save 32-bit process floating point context */
 LEAF(_save_fp_context32)
+        .set push
+        SET_HARDFLOAT
         cfc1    t1, fcr31
 
         mfc0    t0, CP0_STATUS
@@ -134,6 +148,7 @@ LEAF(_save_fp_context32)
         EX      sw t1, SC32_FPC_CSR(a0)
         cfc1    t0, $0                          # implementation/version
         EX      sw t0, SC32_FPC_EIR(a0)
+        .set pop
 
         jr      ra
          li     v0, 0                                   # success
@@ -150,8 +165,10 @@ LEAF(_restore_fp_context)
 
 #if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2)
         .set    push
+        SET_HARDFLOAT
 #ifdef CONFIG_CPU_MIPS32_R2
-        .set    mips64r2
+        .set    mips32r2
+        .set    fp=64
         mfc0    t0, CP0_STATUS
         sll     t0, t0, 5
         bgez    t0, 1f                  # skip loading odd if FR=0
@@ -175,6 +192,8 @@ LEAF(_restore_fp_context)
         EX      ldc1 $f31, SC_FPREGS+248(a0)
 1:      .set pop
 #endif
+        .set push
+        SET_HARDFLOAT
         EX      ldc1 $f0, SC_FPREGS+0(a0)
         EX      ldc1 $f2, SC_FPREGS+16(a0)
         EX      ldc1 $f4, SC_FPREGS+32(a0)
@@ -192,6 +211,7 @@ LEAF(_restore_fp_context)
         EX      ldc1 $f28, SC_FPREGS+224(a0)
         EX      ldc1 $f30, SC_FPREGS+240(a0)
         ctc1    t1, fcr31
+        .set pop
         jr      ra
          li     v0, 0                                   # success
         END(_restore_fp_context)
@@ -199,6 +219,8 @@ LEAF(_restore_fp_context)
 #ifdef CONFIG_MIPS32_COMPAT
 LEAF(_restore_fp_context32)
         /* Restore an o32 sigcontext.  */
+        .set push
+        SET_HARDFLOAT
         EX      lw t1, SC32_FPC_CSR(a0)
 
         mfc0    t0, CP0_STATUS
@@ -242,6 +264,7 @@ LEAF(_restore_fp_context32)
         ctc1    t1, fcr31
         jr      ra
          li     v0, 0                                   # success
+        .set pop
         END(_restore_fp_context32)
 #endif
 
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 4c4ec1812420..64591e671878 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -22,6 +22,9 @@
 
 #include <asm/asmmacro.h>
 
+/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
+#undef fp
+
 /*
  * Offset to the current process status flags, the first 32 bytes of the
  * stack are not used.
@@ -65,8 +68,12 @@
         bgtz    a3, 1f
 
         /* Save 128b MSA vector context + scalar FP control & status. */
+        .set push
+        SET_HARDFLOAT
         cfc1    t1, fcr31
         msa_save_all    a0
+        .set pop        /* SET_HARDFLOAT */
+
         sw      t1, THREAD_FCR31(a0)
         b       2f
 
@@ -161,6 +168,9 @@ LEAF(_init_msa_upper)
 
 #define FPU_DEFAULT  0x00000000
 
+        .set push
+        SET_HARDFLOAT
+
 LEAF(_init_fpu)
         mfc0    t0, CP0_STATUS
         li      t1, ST0_CU1
@@ -232,7 +242,8 @@ LEAF(_init_fpu)
 
 #ifdef CONFIG_CPU_MIPS32_R2
         .set    push
-        .set    mips64r2
+        .set    mips32r2
+        .set    fp=64
         sll     t0, t0, 5                       # is Status.FR set?
         bgez    t0, 1f                          # no: skip setting upper 32b
 
@@ -291,3 +302,5 @@ LEAF(_init_fpu)
 #endif
         jr      ra
         END(_init_fpu)
+
+        .set pop        /* SET_HARDFLOAT */
diff --git a/arch/mips/kernel/r6000_fpu.S b/arch/mips/kernel/r6000_fpu.S
index da0fbe46d83b..47077380c15c 100644
--- a/arch/mips/kernel/r6000_fpu.S
+++ b/arch/mips/kernel/r6000_fpu.S
@@ -18,6 +18,9 @@
 
         .set    noreorder
         .set    mips2
+        .set    push
+        SET_HARDFLOAT
+
         /* Save floating point context */
         LEAF(_save_fp_context)
         mfc0    t0,CP0_STATUS
@@ -85,3 +88,5 @@
 1:      jr      ra
          nop
         END(_restore_fp_context)
+
+        .set pop        /* SET_HARDFLOAT */
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S
index 744cd10ba599..00cad1005a16 100644
--- a/arch/mips/kernel/scall32-o32.S
+++ b/arch/mips/kernel/scall32-o32.S
@@ -579,3 +579,4 @@ EXPORT(sys_call_table)
         PTR     sys_seccomp
         PTR     sys_getrandom
         PTR     sys_memfd_create
+        PTR     sys_bpf                         /* 4355 */
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S
index 002b1bc09c38..5251565e344b 100644
--- a/arch/mips/kernel/scall64-64.S
+++ b/arch/mips/kernel/scall64-64.S
@@ -434,4 +434,5 @@ EXPORT(sys_call_table)
         PTR     sys_seccomp
         PTR     sys_getrandom
         PTR     sys_memfd_create
+        PTR     sys_bpf                         /* 5315 */
         .size   sys_call_table,.-sys_call_table
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S
index ca6cbbe9805b..77e74398b828 100644
--- a/arch/mips/kernel/scall64-n32.S
+++ b/arch/mips/kernel/scall64-n32.S
@@ -427,4 +427,5 @@ EXPORT(sysn32_call_table)
         PTR     sys_seccomp
         PTR     sys_getrandom
         PTR     sys_memfd_create
+        PTR     sys_bpf
         .size   sysn32_call_table,.-sysn32_call_table
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S
index 9e10d11fbb84..6f8db9f728e8 100644
--- a/arch/mips/kernel/scall64-o32.S
+++ b/arch/mips/kernel/scall64-o32.S
@@ -564,4 +564,5 @@ EXPORT(sys32_call_table)
         PTR     sys_seccomp
         PTR     sys_getrandom
         PTR     sys_memfd_create
+        PTR     sys_bpf                         /* 4355 */
         .size   sys32_call_table,.-sys32_call_table
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c
index b3b8f0d9d4a7..d21ec57b6e95 100644
--- a/arch/mips/kernel/setup.c
+++ b/arch/mips/kernel/setup.c
@@ -683,7 +683,8 @@ static void __init arch_mem_init(char **cmdline_p)
         dma_contiguous_reserve(PFN_PHYS(max_low_pfn));
         /* Tell bootmem about cma reserved memblock section */
         for_each_memblock(reserved, reg)
-                reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
+                if (reg->size != 0)
+                        reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
 }
 
 static void __init resource_init(void)
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c
index 91615c2ef0cf..1ef365ab3cd3 100644
--- a/arch/mips/lib/r3k_dump_tlb.c
+++ b/arch/mips/lib/r3k_dump_tlb.c
@@ -34,7 +34,7 @@ static void dump_tlb(int first, int last)
                 entrylo0 = read_c0_entrylo0();
 
                 /* Unused entries have a virtual address of KSEG0.  */
-                if ((entryhi & 0xffffe000) != 0x80000000
+                if ((entryhi & 0xfffff000) != 0x80000000
                     && (entryhi & 0xfc0) == asid) {
                         /*
                          * Only print entries in use
@@ -43,7 +43,7 @@ static void dump_tlb(int first, int last)
 
                         printk("va=%08lx asid=%08lx"
                                "  [pa=%06lx n=%d d=%d v=%d g=%d]",
-                               (entryhi & 0xffffe000),
+                               (entryhi & 0xfffff000),
                                entryhi & 0xfc0,
                                entrylo0 & PAGE_MASK,
                                (entrylo0 & (1 << 11)) ? 1 : 0,
diff --git a/arch/mips/lib/strnlen_user.S b/arch/mips/lib/strnlen_user.S
index f3af6995e2a6..7d12c0dded3d 100644
--- a/arch/mips/lib/strnlen_user.S
+++ b/arch/mips/lib/strnlen_user.S
@@ -40,9 +40,11 @@ FEXPORT(__strnlen_\func\()_nocheck_asm)
 .else
         EX(lbe, t0, (v0), .Lfault\@)
 .endif
-        PTR_ADDIU       v0, 1
+        .set            noreorder
         bnez            t0, 1b
-1:      PTR_SUBU        v0, a0
+1:       PTR_ADDIU      v0, 1
+        .set            reorder
+        PTR_SUBU        v0, a0
         jr              ra
         END(__strnlen_\func\()_asm)
 
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 51a0fde4bec1..cac529a405b8 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -584,11 +584,7 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
                 if (insn.i_format.rs == bc_op) {
                         preempt_disable();
                         if (is_fpu_owner())
-                                asm volatile(
-                                        ".set push\n"
-                                        "\t.set mips1\n"
-                                        "\tcfc1\t%0,$31\n"
-                                        "\t.set pop" : "=r" (fcr31));
+                                fcr31 = read_32bit_cp1_register(CP1_STATUS);
                         else
                                 fcr31 = current->thread.fpu.fcr31;
                         preempt_enable();
diff --git a/arch/mips/pci/msi-xlp.c b/arch/mips/pci/msi-xlp.c
index fa374fe3746b..f7ac3edda1b2 100644
--- a/arch/mips/pci/msi-xlp.c
+++ b/arch/mips/pci/msi-xlp.c
@@ -443,10 +443,8 @@ static int xlp_setup_msix(uint64_t lnkbase, int node, int link,
         msg.data = 0xc00 | msixvec;
 
         ret = irq_set_msi_desc(xirq, desc);
-        if (ret < 0) {
-                destroy_irq(xirq);
+        if (ret < 0)
                 return ret;
-        }
 
         write_msi_msg(xirq, &msg);
         return 0;
diff --git a/arch/powerpc/include/asm/fadump.h b/arch/powerpc/include/asm/fadump.h
index a6774560afe3..493e72f64b35 100644
--- a/arch/powerpc/include/asm/fadump.h
+++ b/arch/powerpc/include/asm/fadump.h
@@ -70,39 +70,39 @@
 #define CPU_UNKNOWN             (~((u32)0))
 
 /* Utility macros */
-#define SKIP_TO_NEXT_CPU(reg_entry)                     \
-({                                                      \
-        while (reg_entry->reg_id != REG_ID("CPUEND"))   \
-                reg_entry++;                            \
-        reg_entry++;                                    \
+#define SKIP_TO_NEXT_CPU(reg_entry)                                     \
+({                                                                      \
+        while (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUEND"))      \
+                reg_entry++;                                            \
+        reg_entry++;                                                    \
 })
 
 /* Kernel Dump section info */
 struct fadump_section {
-        u32     request_flag;
-        u16     source_data_type;
-        u16     error_flags;
-        u64     source_address;
-        u64     source_len;
-        u64     bytes_dumped;
-        u64     destination_address;
+        __be32  request_flag;
+        __be16  source_data_type;
+        __be16  error_flags;
+        __be64  source_address;
+        __be64  source_len;
+        __be64  bytes_dumped;
+        __be64  destination_address;
 };
 
 /* ibm,configure-kernel-dump header. */
 struct fadump_section_header {
-        u32     dump_format_version;
-        u16     dump_num_sections;
-        u16     dump_status_flag;
-        u32     offset_first_dump_section;
+        __be32  dump_format_version;
+        __be16  dump_num_sections;
+        __be16  dump_status_flag;
+        __be32  offset_first_dump_section;
 
         /* Fields for disk dump option. */
-        u32     dd_block_size;
-        u64     dd_block_offset;
-        u64     dd_num_blocks;
-        u32     dd_offset_disk_path;
+        __be32  dd_block_size;
+        __be64  dd_block_offset;
+        __be64  dd_num_blocks;
+        __be32  dd_offset_disk_path;
 
         /* Maximum time allowed to prevent an automatic dump-reboot. */
-        u32     max_time_auto;
+        __be32  max_time_auto;
 };
 
 /*
@@ -174,15 +174,15 @@ static inline u64 str_to_u64(const char *str)
 
 /* Register save area header. */
 struct fadump_reg_save_area_header {
-        u64             magic_number;
-        u32             version;
-        u32             num_cpu_offset;
+        __be64          magic_number;
+        __be32          version;
+        __be32          num_cpu_offset;
 };
 
 /* Register entry. */
 struct fadump_reg_entry {
-        u64             reg_id;
-        u64             reg_value;
+        __be64          reg_id;
+        __be64          reg_value;
 };
 
 /* fadump crash info structure */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 5bbd1bc8c3b0..0905c8da90f1 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -659,7 +659,13 @@ _GLOBAL(ret_from_except_lite)
 3:
 #endif
         bl      save_nvgprs
+        /*
+         * Use a non volatile GPR to save and restore our thread_info flags
+         * across the call to restore_interrupts.
+         */
+        mr      r30,r4
         bl      restore_interrupts
+        mr      r4,r30
         addi    r3,r1,STACK_FRAME_OVERHEAD
         bl      do_notify_resume
         b       ret_from_except
diff --git a/arch/powerpc/kernel/fadump.c b/arch/powerpc/kernel/fadump.c
index 742694c1d852..26d091a1a54c 100644
--- a/arch/powerpc/kernel/fadump.c
+++ b/arch/powerpc/kernel/fadump.c
@@ -58,7 +58,7 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
         const __be32 *sections;
         int i, num_sections;
         int size;
-        const int *token;
+        const __be32 *token;
 
         if (depth != 1 || strcmp(uname, "rtas") != 0)
                 return 0;
@@ -72,7 +72,7 @@ int __init early_init_dt_scan_fw_dump(unsigned long node,
                 return 1;
 
         fw_dump.fadump_supported = 1;
-        fw_dump.ibm_configure_kernel_dump = *token;
+        fw_dump.ibm_configure_kernel_dump = be32_to_cpu(*token);
 
         /*
          * The 'ibm,kernel-dump' rtas node is present only if there is
@@ -147,11 +147,11 @@ static unsigned long init_fadump_mem_struct(struct fadump_mem_struct *fdm,
         memset(fdm, 0, sizeof(struct fadump_mem_struct));
         addr = addr & PAGE_MASK;
 
-        fdm->header.dump_format_version = 0x00000001;
-        fdm->header.dump_num_sections = 3;
+        fdm->header.dump_format_version = cpu_to_be32(0x00000001);
+        fdm->header.dump_num_sections = cpu_to_be16(3);
         fdm->header.dump_status_flag = 0;
         fdm->header.offset_first_dump_section =
-                (u32)offsetof(struct fadump_mem_struct, cpu_state_data);
+                cpu_to_be32((u32)offsetof(struct fadump_mem_struct, cpu_state_data));
 
         /*
          * Fields for disk dump option.
@@ -167,27 +167,27 @@ static unsigned long init_fadump_mem_struct(struct fadump_mem_struct *fdm,
 
         /* Kernel dump sections */
         /* cpu state data section. */
-        fdm->cpu_state_data.request_flag = FADUMP_REQUEST_FLAG;
-        fdm->cpu_state_data.source_data_type = FADUMP_CPU_STATE_DATA;
+        fdm->cpu_state_data.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
+        fdm->cpu_state_data.source_data_type = cpu_to_be16(FADUMP_CPU_STATE_DATA);
         fdm->cpu_state_data.source_address = 0;
-        fdm->cpu_state_data.source_len = fw_dump.cpu_state_data_size;
-        fdm->cpu_state_data.destination_address = addr;
+        fdm->cpu_state_data.source_len = cpu_to_be64(fw_dump.cpu_state_data_size);
+        fdm->cpu_state_data.destination_address = cpu_to_be64(addr);
         addr += fw_dump.cpu_state_data_size;
 
         /* hpte region section */
-        fdm->hpte_region.request_flag = FADUMP_REQUEST_FLAG;
-        fdm->hpte_region.source_data_type = FADUMP_HPTE_REGION;
+        fdm->hpte_region.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
+        fdm->hpte_region.source_data_type = cpu_to_be16(FADUMP_HPTE_REGION);
         fdm->hpte_region.source_address = 0;
-        fdm->hpte_region.source_len = fw_dump.hpte_region_size;
-        fdm->hpte_region.destination_address = addr;
+        fdm->hpte_region.source_len = cpu_to_be64(fw_dump.hpte_region_size);
+        fdm->hpte_region.destination_address = cpu_to_be64(addr);
         addr += fw_dump.hpte_region_size;
 
         /* RMA region section */
-        fdm->rmr_region.request_flag = FADUMP_REQUEST_FLAG;
-        fdm->rmr_region.source_data_type = FADUMP_REAL_MODE_REGION;
-        fdm->rmr_region.source_address = RMA_START;
-        fdm->rmr_region.source_len = fw_dump.boot_memory_size;
-        fdm->rmr_region.destination_address = addr;
+        fdm->rmr_region.request_flag = cpu_to_be32(FADUMP_REQUEST_FLAG);
+        fdm->rmr_region.source_data_type = cpu_to_be16(FADUMP_REAL_MODE_REGION);
+        fdm->rmr_region.source_address = cpu_to_be64(RMA_START);
+        fdm->rmr_region.source_len = cpu_to_be64(fw_dump.boot_memory_size);
+        fdm->rmr_region.destination_address = cpu_to_be64(addr);
         addr += fw_dump.boot_memory_size;
 
         return addr;
@@ -272,7 +272,7 @@ int __init fadump_reserve_mem(void)
          * first kernel.
          */
         if (fdm_active)
-                fw_dump.boot_memory_size = fdm_active->rmr_region.source_len;
+                fw_dump.boot_memory_size = be64_to_cpu(fdm_active->rmr_region.source_len);
         else
                 fw_dump.boot_memory_size = fadump_calculate_reserve_size();
 
@@ -314,8 +314,8 @@ int __init fadump_reserve_mem(void)
                                 (unsigned long)(base >> 20));
 
                 fw_dump.fadumphdr_addr =
-                                fdm_active->rmr_region.destination_address +
-                                fdm_active->rmr_region.source_len;
+                                be64_to_cpu(fdm_active->rmr_region.destination_address) +
+                                be64_to_cpu(fdm_active->rmr_region.source_len);
                 pr_debug("fadumphdr_addr = %p\n",
                                 (void *) fw_dump.fadumphdr_addr);
         } else {
@@ -472,9 +472,9 @@ fadump_read_registers(struct fadump_reg_entry *reg_entry, struct pt_regs *regs)
 {
         memset(regs, 0, sizeof(struct pt_regs));
 
-        while (reg_entry->reg_id != REG_ID("CPUEND")) {
-                fadump_set_regval(regs, reg_entry->reg_id,
-                                        reg_entry->reg_value);
+        while (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUEND")) {
+                fadump_set_regval(regs, be64_to_cpu(reg_entry->reg_id),
+                                        be64_to_cpu(reg_entry->reg_value));
                 reg_entry++;
         }
         reg_entry++;
@@ -603,20 +603,20 @@ static int __init fadump_build_cpu_notes(const struct fadump_mem_struct *fdm)
         if (!fdm->cpu_state_data.bytes_dumped)
                 return -EINVAL;
 
-        addr = fdm->cpu_state_data.destination_address;
+        addr = be64_to_cpu(fdm->cpu_state_data.destination_address);
         vaddr = __va(addr);
 
         reg_header = vaddr;
-        if (reg_header->magic_number != REGSAVE_AREA_MAGIC) {
+        if (be64_to_cpu(reg_header->magic_number) != REGSAVE_AREA_MAGIC) {
                 printk(KERN_ERR "Unable to read register save area.\n");
                 return -ENOENT;
         }
         pr_debug("--------CPU State Data------------\n");
-        pr_debug("Magic Number: %llx\n", reg_header->magic_number);
-        pr_debug("NumCpuOffset: %x\n", reg_header->num_cpu_offset);
+        pr_debug("Magic Number: %llx\n", be64_to_cpu(reg_header->magic_number));
+        pr_debug("NumCpuOffset: %x\n", be32_to_cpu(reg_header->num_cpu_offset));
 
-        vaddr += reg_header->num_cpu_offset;
-        num_cpus = *((u32 *)(vaddr));
+        vaddr += be32_to_cpu(reg_header->num_cpu_offset);
+        num_cpus = be32_to_cpu(*((__be32 *)(vaddr)));
         pr_debug("NumCpus     : %u\n", num_cpus);
         vaddr += sizeof(u32);
         reg_entry = (struct fadump_reg_entry *)vaddr;
@@ -639,13 +639,13 @@ static int __init fadump_build_cpu_notes(const struct fadump_mem_struct *fdm)
                 fdh = __va(fw_dump.fadumphdr_addr);
 
         for (i = 0; i < num_cpus; i++) {
-                if (reg_entry->reg_id != REG_ID("CPUSTRT")) {
+                if (be64_to_cpu(reg_entry->reg_id) != REG_ID("CPUSTRT")) {
                         printk(KERN_ERR "Unable to read CPU state data\n");
                         rc = -ENOENT;
                         goto error_out;
                 }
                 /* Lower 4 bytes of reg_value contains logical cpu id */
-                cpu = reg_entry->reg_value & FADUMP_CPU_ID_MASK;
+                cpu = be64_to_cpu(reg_entry->reg_value) & FADUMP_CPU_ID_MASK;
                 if (fdh && !cpumask_test_cpu(cpu, &fdh->cpu_online_mask)) {
                         SKIP_TO_NEXT_CPU(reg_entry);
                         continue;
@@ -692,7 +692,7 @@ static int __init process_fadump(const struct fadump_mem_struct *fdm_active)
                 return -EINVAL;
 
         /* Check if the dump data is valid. */
-        if ((fdm_active->header.dump_status_flag == FADUMP_ERROR_FLAG) ||
+        if ((be16_to_cpu(fdm_active->header.dump_status_flag) == FADUMP_ERROR_FLAG) ||
                         (fdm_active->cpu_state_data.error_flags != 0) ||
                         (fdm_active->rmr_region.error_flags != 0)) {
                 printk(KERN_ERR "Dump taken by platform is not valid\n");
@@ -828,7 +828,7 @@ static void fadump_setup_crash_memory_ranges(void)
 static inline unsigned long fadump_relocate(unsigned long paddr)
 {
         if (paddr > RMA_START && paddr < fw_dump.boot_memory_size)
-                return fdm.rmr_region.destination_address + paddr;
+                return be64_to_cpu(fdm.rmr_region.destination_address) + paddr;
         else
                 return paddr;
 }
@@ -902,7 +902,7 @@ static int fadump_create_elfcore_headers(char *bufp)
                          * to the specified destination_address. Hence set
                          * the correct offset.
                          */
-                        phdr->p_offset = fdm.rmr_region.destination_address;
+                        phdr->p_offset = be64_to_cpu(fdm.rmr_region.destination_address);
                 }
 
                 phdr->p_paddr = mbase;
@@ -951,7 +951,7 @@ static void register_fadump(void)
 
         fadump_setup_crash_memory_ranges();
 
-        addr = fdm.rmr_region.destination_address + fdm.rmr_region.source_len;
+        addr = be64_to_cpu(fdm.rmr_region.destination_address) + be64_to_cpu(fdm.rmr_region.source_len);
         /* Initialize fadump crash info header. */
         addr = init_fadump_header(addr);
         vaddr = __va(addr);
@@ -1023,7 +1023,7 @@ void fadump_cleanup(void)
         /* Invalidate the registration only if dump is active. */
         if (fw_dump.dump_active) {
                 init_fadump_mem_struct(&fdm,
-                        fdm_active->cpu_state_data.destination_address);
+                        be64_to_cpu(fdm_active->cpu_state_data.destination_address));
                 fadump_invalidate_dump(&fdm);
         }
 }
@@ -1063,7 +1063,7 @@ static void fadump_invalidate_release_mem(void)
                 return;
         }
 
-        destination_address = fdm_active->cpu_state_data.destination_address;
+        destination_address = be64_to_cpu(fdm_active->cpu_state_data.destination_address);
         fadump_cleanup();
         mutex_unlock(&fadump_mutex);
 
@@ -1183,31 +1183,31 @@ static int fadump_region_show(struct seq_file *m, void *private)
         seq_printf(m,
                         "CPU : [%#016llx-%#016llx] %#llx bytes, "
                         "Dumped: %#llx\n",
-                        fdm_ptr->cpu_state_data.destination_address,
-                        fdm_ptr->cpu_state_data.destination_address +
-                        fdm_ptr->cpu_state_data.source_len - 1,
-                        fdm_ptr->cpu_state_data.source_len,
-                        fdm_ptr->cpu_state_data.bytes_dumped);
+                        be64_to_cpu(fdm_ptr->cpu_state_data.destination_address),
+                        be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) +
+                        be64_to_cpu(fdm_ptr->cpu_state_data.source_len) - 1,
+                        be64_to_cpu(fdm_ptr->cpu_state_data.source_len),
+                        be64_to_cpu(fdm_ptr->cpu_state_data.bytes_dumped));
         seq_printf(m,
                         "HPTE: [%#016llx-%#016llx] %#llx bytes, "
                         "Dumped: %#llx\n",
-                        fdm_ptr->hpte_region.destination_address,
-                        fdm_ptr->hpte_region.destination_address +
-                        fdm_ptr->hpte_region.source_len - 1,
-                        fdm_ptr->hpte_region.source_len,
-                        fdm_ptr->hpte_region.bytes_dumped);
+                        be64_to_cpu(fdm_ptr->hpte_region.destination_address),
+                        be64_to_cpu(fdm_ptr->hpte_region.destination_address) +
+                        be64_to_cpu(fdm_ptr->hpte_region.source_len) - 1,
+                        be64_to_cpu(fdm_ptr->hpte_region.source_len),
+                        be64_to_cpu(fdm_ptr->hpte_region.bytes_dumped));
         seq_printf(m,
                         "DUMP: [%#016llx-%#016llx] %#llx bytes, "
                         "Dumped: %#llx\n",
-                        fdm_ptr->rmr_region.destination_address,
-                        fdm_ptr->rmr_region.destination_address +
-                        fdm_ptr->rmr_region.source_len - 1,
-                        fdm_ptr->rmr_region.source_len,
-                        fdm_ptr->rmr_region.bytes_dumped);
+                        be64_to_cpu(fdm_ptr->rmr_region.destination_address),
+                        be64_to_cpu(fdm_ptr->rmr_region.destination_address) +
+                        be64_to_cpu(fdm_ptr->rmr_region.source_len) - 1,
+                        be64_to_cpu(fdm_ptr->rmr_region.source_len),
+                        be64_to_cpu(fdm_ptr->rmr_region.bytes_dumped));
 
         if (!fdm_active ||
                 (fw_dump.reserve_dump_area_start ==
-                fdm_ptr->cpu_state_data.destination_address))
+                be64_to_cpu(fdm_ptr->cpu_state_data.destination_address)))
                 goto out;
 
         /* Dump is active. Show reserved memory region. */
@@ -1215,10 +1215,10 @@ static int fadump_region_show(struct seq_file *m, void *private)
                         "    : [%#016llx-%#016llx] %#llx bytes, "
                         "Dumped: %#llx\n",
                         (unsigned long long)fw_dump.reserve_dump_area_start,
-                        fdm_ptr->cpu_state_data.destination_address - 1,
-                        fdm_ptr->cpu_state_data.destination_address -
+                        be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) - 1,
+                        be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) -
                         fw_dump.reserve_dump_area_start,
-                        fdm_ptr->cpu_state_data.destination_address -
+                        be64_to_cpu(fdm_ptr->cpu_state_data.destination_address) -
                         fw_dump.reserve_dump_area_start);
 out:
         if (fdm_active)
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index cad68ff8eca5..415a51b028b9 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -103,7 +103,7 @@ unsigned long __max_low_memory = MAX_LOW_MEM;
 /*
  * Check for command-line options that affect what MMU_init will do.
  */
-void MMU_setup(void)
+void __init MMU_setup(void)
 {
         /* Check for nobats option (used in mapin_ram). */
         if (strstr(boot_command_line, "nobats")) {
diff --git a/arch/powerpc/platforms/powernv/opal-lpc.c b/arch/powerpc/platforms/powernv/opal-lpc.c
index ad4b31df779a..e4169d68cb32 100644
--- a/arch/powerpc/platforms/powernv/opal-lpc.c
+++ b/arch/powerpc/platforms/powernv/opal-lpc.c
@@ -216,14 +216,54 @@ static ssize_t lpc_debug_read(struct file *filp, char __user *ubuf,
                                    &data, len);
                 if (rc)
                         return -ENXIO;
+
+                /*
+                 * Now there is some trickery with the data returned by OPAL
+                 * as it's the desired data right justified in a 32-bit BE
+                 * word.
+                 *
+                 * This is a very bad interface and I'm to blame for it :-(
+                 *
+                 * So we can't just apply a 32-bit swap to what comes from OPAL,
+                 * because user space expects the *bytes* to be in their proper
+                 * respective positions (ie, LPC position).
+                 *
+                 * So what we really want to do here is to shift data right
+                 * appropriately on a LE kernel.
+                 *
+                 * IE. If the LPC transaction has bytes B0, B1, B2 and B3 in that
+                 * order, we have in memory written to by OPAL at the "data"
+                 * pointer:
+                 *
+                 *               Bytes:      OPAL "data"   LE "data"
+                 *   32-bit:   B0 B1 B2 B3   B0B1B2B3      B3B2B1B0
+                 *   16-bit:   B0 B1         0000B0B1      B1B00000
+                 *    8-bit:   B0            000000B0      B0000000
+                 *
+                 * So a BE kernel will have the leftmost of the above in the MSB
+                 * and rightmost in the LSB and can just then "cast" the u32 "data"
+                 * down to the appropriate quantity and write it.
+                 *
+                 * However, an LE kernel can't. It doesn't need to swap because a
+                 * load from data followed by a store to user are going to preserve
+                 * the byte ordering which is the wire byte order which is what the
+                 * user wants, but in order to "crop" to the right size, we need to
+                 * shift right first.
+                 */
                 switch(len) {
                 case 4:
                         rc = __put_user((u32)data, (u32 __user *)ubuf);
                         break;
                 case 2:
+#ifdef __LITTLE_ENDIAN__
+                        data >>= 16;
+#endif
                         rc = __put_user((u16)data, (u16 __user *)ubuf);
                         break;
                 default:
+#ifdef __LITTLE_ENDIAN__
+                        data >>= 24;
+#endif
                         rc = __put_user((u8)data, (u8 __user *)ubuf);
                         break;
                 }
@@ -263,12 +303,31 @@ static ssize_t lpc_debug_write(struct file *filp, const char __user *ubuf,
                         else if (todo > 1 && (pos & 1) == 0)
                                 len = 2;
                 }
+
+                /*
+                 * Similarly to the read case, we have some trickery here but
+                 * it's different to handle. We need to pass the value to OPAL in
+                 * a register whose layout depends on the access size. We want
+                 * to reproduce the memory layout of the user, however we aren't
+                 * doing a load from user and a store to another memory location
+                 * which would achieve that. Here we pass the value to OPAL via
+                 * a register which is expected to contain the "BE" interpretation
+                 * of the byte sequence. IE: for a 32-bit access, byte 0 should be
+                 * in the MSB. So here we *do* need to byteswap on LE.
+                 *
+                 *           User bytes:    LE "data"  OPAL "data"
+                 *  32-bit:  B0 B1 B2 B3    B3B2B1B0   B0B1B2B3
+                 *  16-bit:  B0 B1          0000B1B0   0000B0B1
+                 *   8-bit:  B0             000000B0   000000B0
+                 */
                 switch(len) {
                 case 4:
                         rc = __get_user(data, (u32 __user *)ubuf);
+                        data = cpu_to_be32(data);
                         break;
                 case 2:
                         rc = __get_user(data, (u16 __user *)ubuf);
+                        data = cpu_to_be16(data);
                         break;
                 default:
                         rc = __get_user(data, (u8 __user *)ubuf);
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index 6ad83bd11fe2..c22bb1b4beb8 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -382,7 +382,7 @@ static int dlpar_online_cpu(struct device_node *dn)
                         BUG_ON(get_cpu_current_state(cpu)
                                         != CPU_STATE_OFFLINE);
                         cpu_maps_update_done();
-                        rc = cpu_up(cpu);
+                        rc = device_online(get_cpu_device(cpu));
                         if (rc)
                                 goto out;
                         cpu_maps_update_begin();
@@ -467,7 +467,7 @@ static int dlpar_offline_cpu(struct device_node *dn)
                         if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) {
                                 set_preferred_offline_state(cpu, CPU_STATE_OFFLINE);
                                 cpu_maps_update_done();
-                                rc = cpu_down(cpu);
+                                rc = device_offline(get_cpu_device(cpu));
                                 if (rc)
                                         goto out;
                                 cpu_maps_update_begin();
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 8c509d5397c6..f6880d2a40fb 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -43,6 +43,7 @@
 #include <asm/trace.h>
 #include <asm/firmware.h>
 #include <asm/plpar_wrappers.h>
+#include <asm/fadump.h>
 
 #include "pseries.h"
 
@@ -247,8 +248,17 @@ static void pSeries_lpar_hptab_clear(void)
         }
 
 #ifdef __LITTLE_ENDIAN__
-        /* Reset exceptions to big endian */
-        if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
+        /*
+         * Reset exceptions to big endian.
+         *
+         * FIXME this is a hack for kexec, we need to reset the exception
+         * endian before starting the new kernel and this is a convenient place
+         * to do it.
+         *
+         * This is also called on boot when a fadump happens. In that case we
+         * must not change the exception endian mode.
+         */
+        if (firmware_has_feature(FW_FEATURE_SET_MODE) && !is_fadump_active()) {
                 long rc;
 
                 rc = pseries_big_endian_exceptions();
diff --git a/arch/s390/configs/default_defconfig b/arch/s390/configs/default_defconfig
index 9d94fdd9f525..9432d0f202ef 100644
--- a/arch/s390/configs/default_defconfig
+++ b/arch/s390/configs/default_defconfig
@@ -35,7 +35,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_IBM_PARTITION=y
@@ -245,6 +244,7 @@ CONFIG_NF_TABLES_IPV4=m
 CONFIG_NFT_CHAIN_ROUTE_IPV4=m
 CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_NF_TABLES_ARP=m
+CONFIG_NF_NAT_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
@@ -252,11 +252,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT_IPV4=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_CLUSTERIP=m
 CONFIG_IP_NF_TARGET_ECN=m
@@ -270,6 +265,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_NF_TABLES_IPV6=m
 CONFIG_NFT_CHAIN_ROUTE_IPV6=m
 CONFIG_NFT_CHAIN_NAT_IPV6=m
+CONFIG_NF_NAT_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
@@ -286,9 +282,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
 CONFIG_IP6_NF_RAW=m
 CONFIG_IP6_NF_SECURITY=m
-CONFIG_NF_NAT_IPV6=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_IP6_NF_TARGET_NPT=m
 CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_NET_SCTPPROBE=m
 CONFIG_RDS=m
@@ -374,14 +367,13 @@ CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_SCH=m
 CONFIG_SCSI_ENCLOSURE=m
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_LOGGING=y
 CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SAS_LIBSAS=m
 CONFIG_SCSI_SRP_ATTRS=m
 CONFIG_ISCSI_TCP=m
-CONFIG_LIBFCOE=m
 CONFIG_SCSI_DEBUG=m
 CONFIG_ZFCP=y
 CONFIG_SCSI_VIRTIO=m
@@ -427,7 +419,6 @@ CONFIG_VIRTIO_NET=m
 CONFIG_NLMON=m
 CONFIG_VHOST_NET=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
@@ -481,14 +472,14 @@ CONFIG_JFS_FS=m
 CONFIG_JFS_POSIX_ACL=y
 CONFIG_JFS_SECURITY=y
 CONFIG_JFS_STATISTICS=y
-CONFIG_XFS_FS=m
+CONFIG_XFS_FS=y
 CONFIG_XFS_QUOTA=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_XFS_RT=y
 CONFIG_XFS_DEBUG=y
 CONFIG_GFS2_FS=m
 CONFIG_OCFS2_FS=m
-CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS=y
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_NILFS2_FS=m
 CONFIG_FANOTIFY=y
@@ -574,7 +565,6 @@ CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_TIMER_STATS=y
 CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_RT_MUTEX_TESTER=y
 CONFIG_DEBUG_WW_MUTEX_SLOWPATH=y
 CONFIG_PROVE_LOCKING=y
 CONFIG_LOCK_STAT=y
@@ -600,8 +590,13 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y
 CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
 CONFIG_LATENCYTOP=y
 CONFIG_DEBUG_STRICT_USER_COPY_CHECKS=y
+CONFIG_IRQSOFF_TRACER=y
+CONFIG_PREEMPT_TRACER=y
+CONFIG_SCHED_TRACER=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_STACK_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
-# CONFIG_KPROBE_EVENT is not set
+CONFIG_UPROBE_EVENT=y
 CONFIG_LKDTM=m
 CONFIG_TEST_LIST_SORT=y
 CONFIG_KPROBES_SANITY_TEST=y
@@ -609,7 +604,10 @@ CONFIG_RBTREE_TEST=y
 CONFIG_INTERVAL_TREE_TEST=m
 CONFIG_PERCPU_TEST=m
 CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_TEST_STRING_HELPERS=y
+CONFIG_TEST_KSTRTOX=y
 CONFIG_DMA_API_DEBUG=y
+CONFIG_TEST_BPF=m
 # CONFIG_STRICT_DEVMEM is not set
 CONFIG_S390_PTDUMP=y
 CONFIG_ENCRYPTED_KEYS=m
@@ -673,12 +671,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
 CONFIG_X509_CERTIFICATE_PARSER=m
 CONFIG_CRC7=m
 CONFIG_CRC8=m
-CONFIG_XZ_DEC_X86=y
-CONFIG_XZ_DEC_POWERPC=y
-CONFIG_XZ_DEC_IA64=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_SPARC=y
 CONFIG_CORDIC=m
 CONFIG_CMM=m
 CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/gcov_defconfig b/arch/s390/configs/gcov_defconfig
index 90f514baa37d..219dca6ea926 100644
--- a/arch/s390/configs/gcov_defconfig
+++ b/arch/s390/configs/gcov_defconfig
@@ -35,7 +35,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_IBM_PARTITION=y
@@ -243,6 +242,7 @@ CONFIG_NF_TABLES_IPV4=m
 CONFIG_NFT_CHAIN_ROUTE_IPV4=m
 CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_NF_TABLES_ARP=m
+CONFIG_NF_NAT_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
@@ -250,11 +250,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT_IPV4=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_CLUSTERIP=m
 CONFIG_IP_NF_TARGET_ECN=m
@@ -268,6 +263,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_NF_TABLES_IPV6=m
 CONFIG_NFT_CHAIN_ROUTE_IPV6=m
 CONFIG_NFT_CHAIN_NAT_IPV6=m
+CONFIG_NF_NAT_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
@@ -284,9 +280,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
 CONFIG_IP6_NF_RAW=m
 CONFIG_IP6_NF_SECURITY=m
-CONFIG_NF_NAT_IPV6=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_IP6_NF_TARGET_NPT=m
 CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_NET_SCTPPROBE=m
 CONFIG_RDS=m
@@ -371,14 +364,13 @@ CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_SCH=m
 CONFIG_SCSI_ENCLOSURE=m
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_LOGGING=y
 CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SAS_LIBSAS=m
 CONFIG_SCSI_SRP_ATTRS=m
 CONFIG_ISCSI_TCP=m
-CONFIG_LIBFCOE=m
 CONFIG_SCSI_DEBUG=m
 CONFIG_ZFCP=y
 CONFIG_SCSI_VIRTIO=m
@@ -424,7 +416,6 @@ CONFIG_VIRTIO_NET=m
 CONFIG_NLMON=m
 CONFIG_VHOST_NET=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
@@ -478,13 +469,13 @@ CONFIG_JFS_FS=m
 CONFIG_JFS_POSIX_ACL=y
 CONFIG_JFS_SECURITY=y
 CONFIG_JFS_STATISTICS=y
-CONFIG_XFS_FS=m
+CONFIG_XFS_FS=y
 CONFIG_XFS_QUOTA=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_XFS_RT=y
 CONFIG_GFS2_FS=m
 CONFIG_OCFS2_FS=m
-CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS=y
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_NILFS2_FS=m
 CONFIG_FANOTIFY=y
@@ -626,12 +617,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
 CONFIG_X509_CERTIFICATE_PARSER=m
 CONFIG_CRC7=m
 CONFIG_CRC8=m
-CONFIG_XZ_DEC_X86=y
-CONFIG_XZ_DEC_POWERPC=y
-CONFIG_XZ_DEC_IA64=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_SPARC=y
 CONFIG_CORDIC=m
 CONFIG_CMM=m
 CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/performance_defconfig b/arch/s390/configs/performance_defconfig
index 13559d32af69..822c2f2e0c25 100644
--- a/arch/s390/configs/performance_defconfig
+++ b/arch/s390/configs/performance_defconfig
@@ -33,7 +33,6 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_IBM_PARTITION=y
@@ -241,6 +240,7 @@ CONFIG_NF_TABLES_IPV4=m
 CONFIG_NFT_CHAIN_ROUTE_IPV4=m
 CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_NF_TABLES_ARP=m
+CONFIG_NF_NAT_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
@@ -248,11 +248,6 @@ CONFIG_IP_NF_MATCH_RPFILTER=m
 CONFIG_IP_NF_MATCH_TTL=m
 CONFIG_IP_NF_FILTER=m
 CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_NF_NAT_IPV4=m
-CONFIG_IP_NF_TARGET_MASQUERADE=m
-CONFIG_IP_NF_TARGET_NETMAP=m
-CONFIG_IP_NF_TARGET_REDIRECT=m
 CONFIG_IP_NF_MANGLE=m
 CONFIG_IP_NF_TARGET_CLUSTERIP=m
 CONFIG_IP_NF_TARGET_ECN=m
@@ -266,6 +261,7 @@ CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_NF_TABLES_IPV6=m
 CONFIG_NFT_CHAIN_ROUTE_IPV6=m
 CONFIG_NFT_CHAIN_NAT_IPV6=m
+CONFIG_NF_NAT_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
@@ -282,9 +278,6 @@ CONFIG_IP6_NF_TARGET_REJECT=m
 CONFIG_IP6_NF_MANGLE=m
 CONFIG_IP6_NF_RAW=m
 CONFIG_IP6_NF_SECURITY=m
-CONFIG_NF_NAT_IPV6=m
-CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_IP6_NF_TARGET_NPT=m
 CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_NET_SCTPPROBE=m
 CONFIG_RDS=m
@@ -369,14 +362,13 @@ CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_SCH=m
 CONFIG_SCSI_ENCLOSURE=m
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_LOGGING=y
 CONFIG_SCSI_SPI_ATTRS=m
+CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SAS_LIBSAS=m
 CONFIG_SCSI_SRP_ATTRS=m
 CONFIG_ISCSI_TCP=m
-CONFIG_LIBFCOE=m
 CONFIG_SCSI_DEBUG=m
 CONFIG_ZFCP=y
 CONFIG_SCSI_VIRTIO=m
@@ -422,7 +414,6 @@ CONFIG_VIRTIO_NET=m
 CONFIG_NLMON=m
 CONFIG_VHOST_NET=m
 # CONFIG_NET_VENDOR_ARC is not set
-# CONFIG_NET_CADENCE is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
@@ -476,13 +467,13 @@ CONFIG_JFS_FS=m
 CONFIG_JFS_POSIX_ACL=y
 CONFIG_JFS_SECURITY=y
 CONFIG_JFS_STATISTICS=y
-CONFIG_XFS_FS=m
+CONFIG_XFS_FS=y
 CONFIG_XFS_QUOTA=y
 CONFIG_XFS_POSIX_ACL=y
 CONFIG_XFS_RT=y
 CONFIG_GFS2_FS=m
 CONFIG_OCFS2_FS=m
-CONFIG_BTRFS_FS=m
+CONFIG_BTRFS_FS=y
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_NILFS2_FS=m
 CONFIG_FANOTIFY=y
@@ -550,8 +541,11 @@ CONFIG_TIMER_STATS=y
 CONFIG_RCU_TORTURE_TEST=m
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 CONFIG_LATENCYTOP=y
+CONFIG_SCHED_TRACER=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_STACK_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
-# CONFIG_KPROBE_EVENT is not set
+CONFIG_UPROBE_EVENT=y
 CONFIG_LKDTM=m
 CONFIG_PERCPU_TEST=m
 CONFIG_ATOMIC64_SELFTEST=y
@@ -618,12 +612,6 @@ CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=m
 CONFIG_X509_CERTIFICATE_PARSER=m
 CONFIG_CRC7=m
 CONFIG_CRC8=m
-CONFIG_XZ_DEC_X86=y
-CONFIG_XZ_DEC_POWERPC=y
-CONFIG_XZ_DEC_IA64=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_SPARC=y
 CONFIG_CORDIC=m
 CONFIG_CMM=m
 CONFIG_APPLDATA_BASE=y
diff --git a/arch/s390/configs/zfcpdump_defconfig b/arch/s390/configs/zfcpdump_defconfig
index e376789f2d8d..9d63051ebec4 100644
--- a/arch/s390/configs/zfcpdump_defconfig
+++ b/arch/s390/configs/zfcpdump_defconfig
@@ -22,8 +22,8 @@ CONFIG_HZ_100=y
 CONFIG_CRASH_DUMP=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 # CONFIG_SECCOMP is not set
-# CONFIG_IUCV is not set
 CONFIG_NET=y
+# CONFIG_IUCV is not set
 CONFIG_ATM=y
 CONFIG_ATM_LANE=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
@@ -36,9 +36,9 @@ CONFIG_ENCLOSURE_SERVICES=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SCSI_ENCLOSURE=y
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_LOGGING=y
+CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SRP_ATTRS=y
 CONFIG_ZFCP=y
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
@@ -75,12 +75,6 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 # CONFIG_FTRACE is not set
 # CONFIG_STRICT_DEVMEM is not set
-CONFIG_XZ_DEC_X86=y
-CONFIG_XZ_DEC_POWERPC=y
-CONFIG_XZ_DEC_IA64=y
-CONFIG_XZ_DEC_ARM=y
-CONFIG_XZ_DEC_ARMTHUMB=y
-CONFIG_XZ_DEC_SPARC=y
 # CONFIG_PFAULT is not set
 # CONFIG_S390_HYPFS_FS is not set
 # CONFIG_VIRTUALIZATION is not set
diff --git a/arch/s390/defconfig b/arch/s390/defconfig
index fab35a8efa4f..785c5f24d6f9 100644
--- a/arch/s390/defconfig
+++ b/arch/s390/defconfig
@@ -92,10 +92,10 @@ CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_BLK_DEV_SR_VENDOR=y
 CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_LOGGING=y
 CONFIG_SCSI_SCAN_ASYNC=y
+CONFIG_SCSI_FC_ATTRS=y
 CONFIG_ZFCP=y
 CONFIG_SCSI_VIRTIO=y
 CONFIG_NETDEVICES=y
@@ -164,14 +164,13 @@ CONFIG_CRYPTO_CMAC=m
 CONFIG_CRYPTO_XCBC=m
 CONFIG_CRYPTO_VMAC=m
 CONFIG_CRYPTO_CRC32=m
-CONFIG_CRYPTO_CRCT10DIF=m
 CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_RMD128=m
 CONFIG_CRYPTO_RMD160=m
 CONFIG_CRYPTO_RMD256=m
 CONFIG_CRYPTO_RMD320=m
-CONFIG_CRYPTO_SHA256=m
+CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=m
 CONFIG_CRYPTO_TGR192=m
 CONFIG_CRYPTO_WP512=m
diff --git a/arch/s390/kernel/ftrace.c b/arch/s390/kernel/ftrace.c
index 51d14fe5eb9a..ca1cabb3a96c 100644
--- a/arch/s390/kernel/ftrace.c
+++ b/arch/s390/kernel/ftrace.c
@@ -121,6 +121,8 @@ unsigned long __kprobes prepare_ftrace_return(unsigned long parent,
 {
         struct ftrace_graph_ent trace;
 
+        if (unlikely(ftrace_graph_is_dead()))
+                goto out;
         if (unlikely(atomic_read(&current->tracing_graph_pause)))
                 goto out;
         ip = (ip & PSW_ADDR_INSN) - MCOUNT_INSN_SIZE;
diff --git a/arch/s390/kernel/vdso32/clock_gettime.S b/arch/s390/kernel/vdso32/clock_gettime.S
index 48c2206a3956..5eec9afbb5b5 100644
--- a/arch/s390/kernel/vdso32/clock_gettime.S
+++ b/arch/s390/kernel/vdso32/clock_gettime.S
@@ -19,6 +19,7 @@
         .type  __kernel_clock_gettime,@function
 __kernel_clock_gettime:
         .cfi_startproc
+        ahi     %r15,-16
         basr    %r5,0
 0:      al      %r5,21f-0b(%r5)                 /* get &_vdso_data */
         chi     %r2,__CLOCK_REALTIME_COARSE
@@ -34,8 +35,8 @@ __kernel_clock_gettime:
 1:      l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
         tml     %r4,0x0001                      /* pending update ? loop */
         jnz     1b
-        stcke   24(%r15)                        /* Store TOD clock */
-        lm      %r0,%r1,25(%r15)
+        stcke   0(%r15)                         /* Store TOD clock */
+        lm      %r0,%r1,1(%r15)
         s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,2f
@@ -70,6 +71,7 @@ __kernel_clock_gettime:
 8:      st      %r2,0(%r3)                      /* store tp->tv_sec */
         st      %r1,4(%r3)                      /* store tp->tv_nsec */
         lhi     %r2,0
+        ahi     %r15,16
         br      %r14
 
         /* CLOCK_MONOTONIC_COARSE */
@@ -96,8 +98,8 @@ __kernel_clock_gettime:
 11:     l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
         tml     %r4,0x0001                      /* pending update ? loop */
         jnz     11b
-        stcke   24(%r15)                        /* Store TOD clock */
-        lm      %r0,%r1,25(%r15)
+        stcke   0(%r15)                         /* Store TOD clock */
+        lm      %r0,%r1,1(%r15)
         s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,12f
@@ -132,11 +134,13 @@ __kernel_clock_gettime:
 17:     st      %r2,0(%r3)                      /* store tp->tv_sec */
         st      %r1,4(%r3)                      /* store tp->tv_nsec */
         lhi     %r2,0
+        ahi     %r15,16
         br      %r14
 
         /* Fallback to system call */
 19:     lhi     %r1,__NR_clock_gettime
         svc     0
+        ahi     %r15,16
         br      %r14
 
 20:     .long   1000000000
diff --git a/arch/s390/kernel/vdso32/gettimeofday.S b/arch/s390/kernel/vdso32/gettimeofday.S
index 60def5f562db..719de6186b20 100644
--- a/arch/s390/kernel/vdso32/gettimeofday.S
+++ b/arch/s390/kernel/vdso32/gettimeofday.S
@@ -19,6 +19,7 @@
         .type  __kernel_gettimeofday,@function
 __kernel_gettimeofday:
         .cfi_startproc
+        ahi     %r15,-16
         basr    %r5,0
 0:      al      %r5,13f-0b(%r5)                 /* get &_vdso_data */
 1:      ltr     %r3,%r3                         /* check if tz is NULL */
@@ -29,30 +30,30 @@ __kernel_gettimeofday:
         l       %r4,__VDSO_UPD_COUNT+4(%r5)     /* load update counter */
         tml     %r4,0x0001                      /* pending update ? loop */
         jnz     1b
-        stcke   24(%r15)                        /* Store TOD clock */
-        lm      %r0,%r1,25(%r15)
+        stcke   0(%r15)                         /* Store TOD clock */
+        lm      %r0,%r1,1(%r15)
         s       %r0,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         sl      %r1,__VDSO_XTIME_STAMP+4(%r5)
         brc     3,3f
         ahi     %r0,-1
 3:      ms      %r0,__VDSO_TK_MULT(%r5)         /*  * tk->mult */
-        st      %r0,24(%r15)
+        st      %r0,0(%r15)
         l       %r0,__VDSO_TK_MULT(%r5)
         ltr     %r1,%r1
         mr      %r0,%r0
         jnm     4f
         a       %r0,__VDSO_TK_MULT(%r5)
-4:      al      %r0,24(%r15)
+4:      al      %r0,0(%r15)
         al      %r0,__VDSO_XTIME_NSEC(%r5)      /*  + xtime */
         al      %r1,__VDSO_XTIME_NSEC+4(%r5)
         brc     12,5f
         ahi     %r0,1
-5:      mvc     24(4,%r15),__VDSO_XTIME_SEC+4(%r5)
+5:      mvc     0(4,%r15),__VDSO_XTIME_SEC+4(%r5)
         cl      %r4,__VDSO_UPD_COUNT+4(%r5)     /* check update counter */
         jne     1b
         l       %r4,__VDSO_TK_SHIFT(%r5)        /* Timekeeper shift */
         srdl    %r0,0(%r4)                      /*  >> tk->shift */
-        l       %r4,24(%r15)                    /* get tv_sec from stack */
+        l       %r4,0(%r15)                     /* get tv_sec from stack */
         basr    %r5,0
 6:      ltr     %r0,%r0
         jnz     7f
@@ -71,6 +72,7 @@ __kernel_gettimeofday:
 9:      srl     %r0,6
         st      %r0,4(%r2)                      /* store tv->tv_usec */
 10:     slr     %r2,%r2
+        ahi     %r15,16
         br      %r14
 11:     .long   1000000000
 12:     .long   274877907
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
index 9d9761f8e110..7699e735ae28 100644
--- a/arch/s390/kernel/vdso64/clock_gettime.S
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -19,6 +19,7 @@
         .type  __kernel_clock_gettime,@function
 __kernel_clock_gettime:
         .cfi_startproc
+        aghi    %r15,-16
         larl    %r5,_vdso_data
         cghi    %r2,__CLOCK_REALTIME_COARSE
         je      4f
@@ -37,10 +38,10 @@ __kernel_clock_gettime:
 0:      lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
         tmll    %r4,0x0001                      /* pending update ? loop */
         jnz     0b
-        stcke   48(%r15)                        /* Store TOD clock */
+        stcke   0(%r15)                         /* Store TOD clock */
         lgf     %r2,__VDSO_TK_SHIFT(%r5)        /* Timekeeper shift */
         lg      %r0,__VDSO_WTOM_SEC(%r5)
-        lg      %r1,49(%r15)
+        lg      %r1,1(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         msgf    %r1,__VDSO_TK_MULT(%r5)         /*  * tk->mult */
         alg     %r1,__VDSO_WTOM_NSEC(%r5)
@@ -56,6 +57,7 @@ __kernel_clock_gettime:
 2:      stg     %r0,0(%r3)                      /* store tp->tv_sec */
         stg     %r1,8(%r3)                      /* store tp->tv_nsec */
         lghi    %r2,0
+        aghi    %r15,16
         br      %r14
 
         /* CLOCK_MONOTONIC_COARSE */
@@ -82,9 +84,9 @@ __kernel_clock_gettime:
 5:      lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
         tmll    %r4,0x0001                      /* pending update ? loop */
         jnz     5b
-        stcke   48(%r15)                        /* Store TOD clock */
+        stcke   0(%r15)                         /* Store TOD clock */
         lgf     %r2,__VDSO_TK_SHIFT(%r5)        /* Timekeeper shift */
-        lg      %r1,49(%r15)
+        lg      %r1,1(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         msgf    %r1,__VDSO_TK_MULT(%r5)         /*  * tk->mult */
         alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + tk->xtime_nsec */
@@ -101,6 +103,7 @@ __kernel_clock_gettime:
 7:      stg     %r0,0(%r3)                      /* store tp->tv_sec */
         stg     %r1,8(%r3)                      /* store tp->tv_nsec */
         lghi    %r2,0
+        aghi    %r15,16
         br      %r14
 
         /* CLOCK_THREAD_CPUTIME_ID for this thread */
@@ -134,11 +137,13 @@ __kernel_clock_gettime:
         slgr    %r4,%r0                         /* r4 = tv_nsec */
         stg     %r4,8(%r3)
         lghi    %r2,0
+        aghi    %r15,16
         br      %r14
 
         /* Fallback to system call */
 12:     lghi    %r1,__NR_clock_gettime
         svc     0
+        aghi    %r15,16
         br      %r14
 
 13:     .quad   1000000000
diff --git a/arch/s390/kernel/vdso64/gettimeofday.S b/arch/s390/kernel/vdso64/gettimeofday.S
index 7a344995a97f..6ce46707663c 100644
--- a/arch/s390/kernel/vdso64/gettimeofday.S
+++ b/arch/s390/kernel/vdso64/gettimeofday.S
@@ -19,6 +19,7 @@
         .type  __kernel_gettimeofday,@function
 __kernel_gettimeofday:
         .cfi_startproc
+        aghi    %r15,-16
         larl    %r5,_vdso_data
 0:      ltgr    %r3,%r3                         /* check if tz is NULL */
         je      1f
@@ -28,8 +29,8 @@ __kernel_gettimeofday:
         lg      %r4,__VDSO_UPD_COUNT(%r5)       /* load update counter */
         tmll    %r4,0x0001                      /* pending update ? loop */
         jnz     0b
-        stcke   48(%r15)                        /* Store TOD clock */
-        lg      %r1,49(%r15)
+        stcke   0(%r15)                         /* Store TOD clock */
+        lg      %r1,1(%r15)
         sg      %r1,__VDSO_XTIME_STAMP(%r5)     /* TOD - cycle_last */
         msgf    %r1,__VDSO_TK_MULT(%r5)         /*  * tk->mult */
         alg     %r1,__VDSO_XTIME_NSEC(%r5)      /*  + tk->xtime_nsec */
@@ -50,6 +51,7 @@ __kernel_gettimeofday:
         srlg    %r0,%r0,6
         stg     %r0,8(%r2)                      /* store tv->tv_usec */
 4:      lghi    %r2,0
+        aghi    %r15,16
         br      %r14
 5:      .quad   1000000000
         .long   274877907
diff --git a/arch/s390/kernel/vtime.c b/arch/s390/kernel/vtime.c
index 416f2a323ba5..7f0089d9a4aa 100644
--- a/arch/s390/kernel/vtime.c
+++ b/arch/s390/kernel/vtime.c
@@ -66,7 +66,11 @@ static int do_account_vtime(struct task_struct *tsk, int hardirq_offset)
         clock = S390_lowcore.last_update_clock;
         asm volatile(
                 "       stpt    %0\n"   /* Store current cpu timer value */
+#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
+                "       stckf   %1"     /* Store current tod clock value */
+#else
                 "       stck    %1"     /* Store current tod clock value */
+#endif
                 : "=m" (S390_lowcore.last_update_timer),
                   "=m" (S390_lowcore.last_update_clock));
         S390_lowcore.system_timer += timer - S390_lowcore.last_update_timer;