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authorBernd Schmidt <bernds_cb1@t-online.de>2008-04-23 14:56:36 -0400
committerBryan Wu <cooloney@kernel.org>2008-04-23 14:56:36 -0400
commitd56daae9bec92ae4b0c115db787a0fcc4c17b381 (patch)
tree502be06afc9116fa993807a758a998c23fc8d14a /arch
parent697a9d65aa799940da1c9145944c6b9bd0f442c5 (diff)
[Blackfin] arch: fix bug - a crash on bootup with CONFIG_MPU on the BF548
The function flush_switched_dcplbs was clearing the CPLB entries covering the process permission bitmasks. This means that the sequence flush_switched_dcplbs (); set_mask_dcplbs(mm->context.page_rwx_mask); has a problem: if kernel code (such as an interrupt) causes a CPLB miss before set_mask_dcplbs completes, the CPLB handler function causes a double fault, with an instantaneous reboot. This bug fix is dedicated to Michael Hennerich, the only person in the world capable of providing working JTAG hardware. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbmgr.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
index 6f1c053903c4..f23bba5c6e63 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbmgr.c
@@ -307,7 +307,7 @@ void flush_switched_cplbs(void)
307 enable_icplb(); 307 enable_icplb();
308 308
309 disable_dcplb(); 309 disable_dcplb();
310 for (i = first_mask_dcplb; i < MAX_CPLBS; i++) { 310 for (i = first_switched_dcplb; i < MAX_CPLBS; i++) {
311 dcplb_tbl[i].data = 0; 311 dcplb_tbl[i].data = 0;
312 bfin_write32(DCPLB_DATA0 + i * 4, 0); 312 bfin_write32(DCPLB_DATA0 + i * 4, 0);
313 } 313 }