Merge branch 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma

Pull slave-dmaengine updates from Vinod Koul:
 "Once you have some time from extended weekend celebrations please
  consider pulling the following to get:
   - Various fixes and PCI driver for dw_dmac by Andy
   - DT binding for imx-dma by Markus & imx-sdma by Shawn
   - DT fixes for dmaengine by Lars
   - jz4740 dmac driver by Lars
   - and various fixes across the drivers"

What "extended weekend celebrations"?  I'm in the merge window, who has
time for extended celebrations..

* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (40 commits)
  DMA: shdma: add DT support
  DMA: shdma: shdma_chan_filter() has to be in shdma-base.h
  DMA: shdma: (cosmetic) don't re-calculate a pointer
  dmaengine: at_hdmac: prepare clk before calling enable
  dmaengine/trivial: at_hdmac: add curly brackets to if/else expressions
  dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()
  dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
  ARM: at91: dt: add header to define at_hdmac configuration
  MIPS: jz4740: Correct clock gate bit for DMA controller
  MIPS: jz4740: Remove custom DMA API
  MIPS: jz4740: Register jz4740 DMA device
  dma: Add a jz4740 dmaengine driver
  MIPS: jz4740: Acquire and enable DMA controller clock
  dma: mmp_tdma: disable irq when disabling dma channel
  dmaengine: PL08x: Avoid collisions with get_signal() macro
  dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
  dma: dw: add PCI part of the driver
  dma: dw: split driver to library part and platform code
  dma: move dw_dmac driver to an own directory
  dw_dmac: don't check resource with devm_ioremap_resource
  ...

10 files changed, 31 insertions, 351 deletions

diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index c1cd5a943ab1..e54f87ec2e4a 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -182,8 +182,8 @@ static void pl08x_put_signal(const struct pl08x_channel_data *cd, int ch)
 static struct pl08x_platform_data pl08x_pd = {
         .slave_channels = &pl08x_slave_channels[0],
         .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels),
-        .get_signal = pl08x_get_signal,
-        .put_signal = pl08x_put_signal,
+        .get_xfer_signal = pl08x_get_signal,
+        .put_xfer_signal = pl08x_put_signal,
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
 };
diff --git a/arch/arm/mach-spear/spear3xx.c b/arch/arm/mach-spear/spear3xx.c
index 0227c97797cd..bf3b1fd8cb23 100644
--- a/arch/arm/mach-spear/spear3xx.c
+++ b/arch/arm/mach-spear/spear3xx.c
@@ -56,8 +56,8 @@ struct pl08x_platform_data pl080_plat_data = {
         },
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
-        .get_signal = pl080_get_signal,
-        .put_signal = pl080_put_signal,
+        .get_xfer_signal = pl080_get_signal,
+        .put_xfer_signal = pl080_put_signal,
 };
 
 /*
diff --git a/arch/arm/mach-spear/spear6xx.c b/arch/arm/mach-spear/spear6xx.c
index 8b0295a41226..da26fa5b68d7 100644
--- a/arch/arm/mach-spear/spear6xx.c
+++ b/arch/arm/mach-spear/spear6xx.c
@@ -334,8 +334,8 @@ static struct pl08x_platform_data spear6xx_pl080_plat_data = {
         },
         .lli_buses = PL08X_AHB1,
         .mem_buses = PL08X_AHB1,
-        .get_signal = pl080_get_signal,
-        .put_signal = pl080_put_signal,
+        .get_xfer_signal = pl080_get_signal,
+        .put_xfer_signal = pl080_put_signal,
         .slave_channels = spear600_dma_info,
         .num_slave_channels = ARRAY_SIZE(spear600_dma_info),
 };
diff --git a/arch/mips/include/asm/mach-jz4740/dma.h b/arch/mips/include/asm/mach-jz4740/dma.h
index 98b4e7c0dbae..509cd5828044 100644
--- a/arch/mips/include/asm/mach-jz4740/dma.h
+++ b/arch/mips/include/asm/mach-jz4740/dma.h
@@ -16,8 +16,6 @@
 #ifndef __ASM_MACH_JZ4740_DMA_H__
 #define __ASM_MACH_JZ4740_DMA_H__
 
-struct jz4740_dma_chan;
-
 enum jz4740_dma_request_type {
         JZ4740_DMA_TYPE_AUTO_REQUEST    = 8,
         JZ4740_DMA_TYPE_UART_TRANSMIT   = 20,
@@ -33,58 +31,4 @@ enum jz4740_dma_request_type {
         JZ4740_DMA_TYPE_SLCD            = 30,
 };
 
-enum jz4740_dma_width {
-        JZ4740_DMA_WIDTH_32BIT  = 0,
-        JZ4740_DMA_WIDTH_8BIT   = 1,
-        JZ4740_DMA_WIDTH_16BIT  = 2,
-};
-
-enum jz4740_dma_transfer_size {
-        JZ4740_DMA_TRANSFER_SIZE_4BYTE  = 0,
-        JZ4740_DMA_TRANSFER_SIZE_1BYTE  = 1,
-        JZ4740_DMA_TRANSFER_SIZE_2BYTE  = 2,
-        JZ4740_DMA_TRANSFER_SIZE_16BYTE = 3,
-        JZ4740_DMA_TRANSFER_SIZE_32BYTE = 4,
-};
-
-enum jz4740_dma_flags {
-        JZ4740_DMA_SRC_AUTOINC = 0x2,
-        JZ4740_DMA_DST_AUTOINC = 0x1,
-};
-
-enum jz4740_dma_mode {
-        JZ4740_DMA_MODE_SINGLE  = 0,
-        JZ4740_DMA_MODE_BLOCK   = 1,
-};
-
-struct jz4740_dma_config {
-        enum jz4740_dma_width src_width;
-        enum jz4740_dma_width dst_width;
-        enum jz4740_dma_transfer_size transfer_size;
-        enum jz4740_dma_request_type request_type;
-        enum jz4740_dma_flags flags;
-        enum jz4740_dma_mode mode;
-};
-
-typedef void (*jz4740_dma_complete_callback_t)(struct jz4740_dma_chan *, int, void *);
-
-struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name);
-void jz4740_dma_free(struct jz4740_dma_chan *dma);
-
-void jz4740_dma_configure(struct jz4740_dma_chan *dma,
-        const struct jz4740_dma_config *config);
-
-
-void jz4740_dma_enable(struct jz4740_dma_chan *dma);
-void jz4740_dma_disable(struct jz4740_dma_chan *dma);
-
-void jz4740_dma_set_src_addr(struct jz4740_dma_chan *dma, dma_addr_t src);
-void jz4740_dma_set_dst_addr(struct jz4740_dma_chan *dma, dma_addr_t dst);
-void jz4740_dma_set_transfer_count(struct jz4740_dma_chan *dma, uint32_t count);
-
-uint32_t jz4740_dma_get_residue(const struct jz4740_dma_chan *dma);
-
-void jz4740_dma_set_complete_cb(struct jz4740_dma_chan *dma,
-        jz4740_dma_complete_callback_t cb);
-
 #endif  /* __ASM_JZ4740_DMA_H__ */
diff --git a/arch/mips/include/asm/mach-jz4740/platform.h b/arch/mips/include/asm/mach-jz4740/platform.h
index 72cfebdb5a47..05988c2d6565 100644
--- a/arch/mips/include/asm/mach-jz4740/platform.h
+++ b/arch/mips/include/asm/mach-jz4740/platform.h
@@ -32,6 +32,7 @@ extern struct platform_device jz4740_codec_device;
 extern struct platform_device jz4740_adc_device;
 extern struct platform_device jz4740_wdt_device;
 extern struct platform_device jz4740_pwm_device;
+extern struct platform_device jz4740_dma_device;
 
 void jz4740_serial_device_register(void);
 
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index 63bad0e491d0..28e5535dfa9e 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -4,7 +4,7 @@
 
 # Object file lists.
 
-obj-y += prom.o irq.o time.o reset.o setup.o dma.o \
+obj-y += prom.o irq.o time.o reset.o setup.o \
         gpio.o clock.o platform.o timer.o serial.o
 
 obj-$(CONFIG_DEBUG_FS) += clock-debugfs.o
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index be2b3deeef1d..8a5ec0eedeb0 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -438,6 +438,7 @@ static struct platform_device *jz_platform_devices[] __initdata = {
         &jz4740_rtc_device,
         &jz4740_adc_device,
         &jz4740_pwm_device,
+        &jz4740_dma_device,
         &qi_lb60_gpio_keys,
         &qi_lb60_pwm_beeper,
         &qi_lb60_charger_device,
diff --git a/arch/mips/jz4740/clock.c b/arch/mips/jz4740/clock.c
index 484d38a0864f..1b5f55426cad 100644
--- a/arch/mips/jz4740/clock.c
+++ b/arch/mips/jz4740/clock.c
@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
         [3] = {
                 .name = "dma",
                 .parent = &jz_clk_high_speed_peripheral.clk,
-                .gate_bit = JZ_CLOCK_GATE_UART0,
+                .gate_bit = JZ_CLOCK_GATE_DMAC,
                 .ops = &jz_clk_simple_ops,
         },
         [4] = {
diff --git a/arch/mips/jz4740/dma.c b/arch/mips/jz4740/dma.c
deleted file mode 100644
index 317ec6fffb12..000000000000
--- a/arch/mips/jz4740/dma.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/*
- *  Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
- *  JZ4740 SoC DMA support
- *
- *  This program is free software; you can redistribute it and/or modify it
- *  under  the terms of the GNU General  Public License as published by the
- *  Free Software Foundation;  either version 2 of the License, or (at your
- *  option) any later version.
- *
- *  You should have received a copy of the GNU General Public License along
- *  with this program; if not, write to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-
-#include <linux/kernel.h>
-#include <linux/module.h>
-#include <linux/spinlock.h>
-#include <linux/interrupt.h>
-
-#include <linux/dma-mapping.h>
-#include <asm/mach-jz4740/dma.h>
-#include <asm/mach-jz4740/base.h>
-
-#define JZ_REG_DMA_SRC_ADDR(x)          (0x00 + (x) * 0x20)
-#define JZ_REG_DMA_DST_ADDR(x)          (0x04 + (x) * 0x20)
-#define JZ_REG_DMA_TRANSFER_COUNT(x)    (0x08 + (x) * 0x20)
-#define JZ_REG_DMA_REQ_TYPE(x)          (0x0C + (x) * 0x20)
-#define JZ_REG_DMA_STATUS_CTRL(x)       (0x10 + (x) * 0x20)
-#define JZ_REG_DMA_CMD(x)               (0x14 + (x) * 0x20)
-#define JZ_REG_DMA_DESC_ADDR(x)         (0x18 + (x) * 0x20)
-
-#define JZ_REG_DMA_CTRL                 0x300
-#define JZ_REG_DMA_IRQ                  0x304
-#define JZ_REG_DMA_DOORBELL             0x308
-#define JZ_REG_DMA_DOORBELL_SET         0x30C
-
-#define JZ_DMA_STATUS_CTRL_NO_DESC              BIT(31)
-#define JZ_DMA_STATUS_CTRL_DESC_INV             BIT(6)
-#define JZ_DMA_STATUS_CTRL_ADDR_ERR             BIT(4)
-#define JZ_DMA_STATUS_CTRL_TRANSFER_DONE        BIT(3)
-#define JZ_DMA_STATUS_CTRL_HALT                 BIT(2)
-#define JZ_DMA_STATUS_CTRL_COUNT_TERMINATE      BIT(1)
-#define JZ_DMA_STATUS_CTRL_ENABLE               BIT(0)
-
-#define JZ_DMA_CMD_SRC_INC                      BIT(23)
-#define JZ_DMA_CMD_DST_INC                      BIT(22)
-#define JZ_DMA_CMD_RDIL_MASK                    (0xf << 16)
-#define JZ_DMA_CMD_SRC_WIDTH_MASK               (0x3 << 14)
-#define JZ_DMA_CMD_DST_WIDTH_MASK               (0x3 << 12)
-#define JZ_DMA_CMD_INTERVAL_LENGTH_MASK         (0x7 << 8)
-#define JZ_DMA_CMD_BLOCK_MODE                   BIT(7)
-#define JZ_DMA_CMD_DESC_VALID                   BIT(4)
-#define JZ_DMA_CMD_DESC_VALID_MODE              BIT(3)
-#define JZ_DMA_CMD_VALID_IRQ_ENABLE             BIT(2)
-#define JZ_DMA_CMD_TRANSFER_IRQ_ENABLE          BIT(1)
-#define JZ_DMA_CMD_LINK_ENABLE                  BIT(0)
-
-#define JZ_DMA_CMD_FLAGS_OFFSET 22
-#define JZ_DMA_CMD_RDIL_OFFSET 16
-#define JZ_DMA_CMD_SRC_WIDTH_OFFSET 14
-#define JZ_DMA_CMD_DST_WIDTH_OFFSET 12
-#define JZ_DMA_CMD_TRANSFER_SIZE_OFFSET 8
-#define JZ_DMA_CMD_MODE_OFFSET 7
-
-#define JZ_DMA_CTRL_PRIORITY_MASK       (0x3 << 8)
-#define JZ_DMA_CTRL_HALT                BIT(3)
-#define JZ_DMA_CTRL_ADDRESS_ERROR       BIT(2)
-#define JZ_DMA_CTRL_ENABLE              BIT(0)
-
-
-static void __iomem *jz4740_dma_base;
-static spinlock_t jz4740_dma_lock;
-
-static inline uint32_t jz4740_dma_read(size_t reg)
-{
-        return readl(jz4740_dma_base + reg);
-}
-
-static inline void jz4740_dma_write(size_t reg, uint32_t val)
-{
-        writel(val, jz4740_dma_base + reg);
-}
-
-static inline void jz4740_dma_write_mask(size_t reg, uint32_t val, uint32_t mask)
-{
-        uint32_t val2;
-        val2 = jz4740_dma_read(reg);
-        val2 &= ~mask;
-        val2 |= val;
-        jz4740_dma_write(reg, val2);
-}
-
-struct jz4740_dma_chan {
-        unsigned int id;
-        void *dev;
-        const char *name;
-
-        enum jz4740_dma_flags flags;
-        uint32_t transfer_shift;
-
-        jz4740_dma_complete_callback_t complete_cb;
-
-        unsigned used:1;
-};
-
-#define JZ4740_DMA_CHANNEL(_id) { .id = _id }
-
-struct jz4740_dma_chan jz4740_dma_channels[] = {
-        JZ4740_DMA_CHANNEL(0),
-        JZ4740_DMA_CHANNEL(1),
-        JZ4740_DMA_CHANNEL(2),
-        JZ4740_DMA_CHANNEL(3),
-        JZ4740_DMA_CHANNEL(4),
-        JZ4740_DMA_CHANNEL(5),
-};
-
-struct jz4740_dma_chan *jz4740_dma_request(void *dev, const char *name)
-{
-        unsigned int i;
-        struct jz4740_dma_chan *dma = NULL;
-
-        spin_lock(&jz4740_dma_lock);
-
-        for (i = 0; i < ARRAY_SIZE(jz4740_dma_channels); ++i) {
-                if (!jz4740_dma_channels[i].used) {
-                        dma = &jz4740_dma_channels[i];
-                        dma->used = 1;
-                        break;
-                }
-        }
-
-        spin_unlock(&jz4740_dma_lock);
-
-        if (!dma)
-                return NULL;
-
-        dma->dev = dev;
-        dma->name = name;
-
-        return dma;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_request);
-
-void jz4740_dma_configure(struct jz4740_dma_chan *dma,
-        const struct jz4740_dma_config *config)
-{
-        uint32_t cmd;
-
-        switch (config->transfer_size) {
-        case JZ4740_DMA_TRANSFER_SIZE_2BYTE:
-                dma->transfer_shift = 1;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_4BYTE:
-                dma->transfer_shift = 2;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_16BYTE:
-                dma->transfer_shift = 4;
-                break;
-        case JZ4740_DMA_TRANSFER_SIZE_32BYTE:
-                dma->transfer_shift = 5;
-                break;
-        default:
-                dma->transfer_shift = 0;
-                break;
-        }
-
-        cmd = config->flags << JZ_DMA_CMD_FLAGS_OFFSET;
-        cmd |= config->src_width << JZ_DMA_CMD_SRC_WIDTH_OFFSET;
-        cmd |= config->dst_width << JZ_DMA_CMD_DST_WIDTH_OFFSET;
-        cmd |= config->transfer_size << JZ_DMA_CMD_TRANSFER_SIZE_OFFSET;
-        cmd |= config->mode << JZ_DMA_CMD_MODE_OFFSET;
-        cmd |= JZ_DMA_CMD_TRANSFER_IRQ_ENABLE;
-
-        jz4740_dma_write(JZ_REG_DMA_CMD(dma->id), cmd);
-        jz4740_dma_write(JZ_REG_DMA_STATUS_CTRL(dma->id), 0);
-        jz4740_dma_write(JZ_REG_DMA_REQ_TYPE(dma->id), config->request_type);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_configure);
-
-void jz4740_dma_set_src_addr(struct jz4740_dma_chan *dma, dma_addr_t src)
-{
-        jz4740_dma_write(JZ_REG_DMA_SRC_ADDR(dma->id), src);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_src_addr);
-
-void jz4740_dma_set_dst_addr(struct jz4740_dma_chan *dma, dma_addr_t dst)
-{
-        jz4740_dma_write(JZ_REG_DMA_DST_ADDR(dma->id), dst);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_dst_addr);
-
-void jz4740_dma_set_transfer_count(struct jz4740_dma_chan *dma, uint32_t count)
-{
-        count >>= dma->transfer_shift;
-        jz4740_dma_write(JZ_REG_DMA_TRANSFER_COUNT(dma->id), count);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_transfer_count);
-
-void jz4740_dma_set_complete_cb(struct jz4740_dma_chan *dma,
-        jz4740_dma_complete_callback_t cb)
-{
-        dma->complete_cb = cb;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_set_complete_cb);
-
-void jz4740_dma_free(struct jz4740_dma_chan *dma)
-{
-        dma->dev = NULL;
-        dma->complete_cb = NULL;
-        dma->used = 0;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_free);
-
-void jz4740_dma_enable(struct jz4740_dma_chan *dma)
-{
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id),
-                        JZ_DMA_STATUS_CTRL_NO_DESC | JZ_DMA_STATUS_CTRL_ENABLE,
-                        JZ_DMA_STATUS_CTRL_HALT | JZ_DMA_STATUS_CTRL_NO_DESC |
-                        JZ_DMA_STATUS_CTRL_ENABLE);
-
-        jz4740_dma_write_mask(JZ_REG_DMA_CTRL,
-                        JZ_DMA_CTRL_ENABLE,
-                        JZ_DMA_CTRL_HALT | JZ_DMA_CTRL_ENABLE);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_enable);
-
-void jz4740_dma_disable(struct jz4740_dma_chan *dma)
-{
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
-                        JZ_DMA_STATUS_CTRL_ENABLE);
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_disable);
-
-uint32_t jz4740_dma_get_residue(const struct jz4740_dma_chan *dma)
-{
-        uint32_t residue;
-        residue = jz4740_dma_read(JZ_REG_DMA_TRANSFER_COUNT(dma->id));
-        return residue << dma->transfer_shift;
-}
-EXPORT_SYMBOL_GPL(jz4740_dma_get_residue);
-
-static void jz4740_dma_chan_irq(struct jz4740_dma_chan *dma)
-{
-        (void) jz4740_dma_read(JZ_REG_DMA_STATUS_CTRL(dma->id));
-
-        jz4740_dma_write_mask(JZ_REG_DMA_STATUS_CTRL(dma->id), 0,
-                JZ_DMA_STATUS_CTRL_ENABLE | JZ_DMA_STATUS_CTRL_TRANSFER_DONE);
-
-        if (dma->complete_cb)
-                dma->complete_cb(dma, 0, dma->dev);
-}
-
-static irqreturn_t jz4740_dma_irq(int irq, void *dev_id)
-{
-        uint32_t irq_status;
-        unsigned int i;
-
-        irq_status = readl(jz4740_dma_base + JZ_REG_DMA_IRQ);
-
-        for (i = 0; i < 6; ++i) {
-                if (irq_status & (1 << i))
-                        jz4740_dma_chan_irq(&jz4740_dma_channels[i]);
-        }
-
-        return IRQ_HANDLED;
-}
-
-static int jz4740_dma_init(void)
-{
-        unsigned int ret;
-
-        jz4740_dma_base = ioremap(JZ4740_DMAC_BASE_ADDR, 0x400);
-
-        if (!jz4740_dma_base)
-                return -EBUSY;
-
-        spin_lock_init(&jz4740_dma_lock);
-
-        ret = request_irq(JZ4740_IRQ_DMAC, jz4740_dma_irq, 0, "DMA", NULL);
-
-        if (ret)
-                printk(KERN_ERR "JZ4740 DMA: Failed to request irq: %d\n", ret);
-
-        return ret;
-}
-arch_initcall(jz4740_dma_init);
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index e9348fd26a35..df65677f3d0b 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -329,3 +329,24 @@ struct platform_device jz4740_pwm_device = {
         .name = "jz4740-pwm",
         .id   = -1,
 };
+
+/* DMA */
+static struct resource jz4740_dma_resources[] = {
+        {
+                .start  = JZ4740_DMAC_BASE_ADDR,
+                .end    = JZ4740_DMAC_BASE_ADDR + 0x400 - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        {
+                .start  = JZ4740_IRQ_DMAC,
+                .end    = JZ4740_IRQ_DMAC,
+                .flags  = IORESOURCE_IRQ,
+        },
+};
+
+struct platform_device jz4740_dma_device = {
+        .name           = "jz4740-dma",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(jz4740_dma_resources),
+        .resource       = jz4740_dma_resources,
+};