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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-10-27 20:21:49 -0400
committerRafael J. Wysocki <rafael.j.wysocki@intel.com>2013-10-27 20:21:49 -0400
commitce6bceabae166c2100133d6306cf3a8b494f3540 (patch)
treea31b13c91ef4ca260b1517d2720976baa5241e4f /arch
parent5171f4fa744de840c2c20f5b65bd3ee1cd85d0e8 (diff)
parent9e3410b764b79670a59d6c1ccdcad483b92c058c (diff)
Merge branch 'powercap'
* powercap: PowerCap: Convert class code to use dev_groups PowerCap: Introduce Intel RAPL power capping driver bitops: Introduce BIT_ULL x86 / msr: add 64bit _on_cpu access functions PowerCap: Add to drivers Kconfig and Makefile PowerCap: Add class driver PowerCap: Documentation
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/msr.h22
-rw-r--r--arch/x86/lib/msr-smp.c62
2 files changed, 84 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index cb7502852acb..e139b13f2a33 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -218,10 +218,14 @@ void msrs_free(struct msr *msrs);
218#ifdef CONFIG_SMP 218#ifdef CONFIG_SMP
219int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); 219int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
220int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); 220int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
221int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
222int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
221void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); 223void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
222void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs); 224void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs);
223int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); 225int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
224int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); 226int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
227int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q);
228int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q);
225int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]); 229int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
226int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]); 230int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]);
227#else /* CONFIG_SMP */ 231#else /* CONFIG_SMP */
@@ -235,6 +239,16 @@ static inline int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
235 wrmsr(msr_no, l, h); 239 wrmsr(msr_no, l, h);
236 return 0; 240 return 0;
237} 241}
242static inline int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
243{
244 rdmsrl(msr_no, *q);
245 return 0;
246}
247static inline int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
248{
249 wrmsrl(msr_no, q);
250 return 0;
251}
238static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no, 252static inline void rdmsr_on_cpus(const struct cpumask *m, u32 msr_no,
239 struct msr *msrs) 253 struct msr *msrs)
240{ 254{
@@ -254,6 +268,14 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
254{ 268{
255 return wrmsr_safe(msr_no, l, h); 269 return wrmsr_safe(msr_no, l, h);
256} 270}
271static inline int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
272{
273 return rdmsrl_safe(msr_no, q);
274}
275static inline int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
276{
277 return wrmsrl_safe(msr_no, q);
278}
257static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]) 279static inline int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8])
258{ 280{
259 return rdmsr_safe_regs(regs); 281 return rdmsr_safe_regs(regs);
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c
index a6b1b86d2253..518532e6a3fa 100644
--- a/arch/x86/lib/msr-smp.c
+++ b/arch/x86/lib/msr-smp.c
@@ -47,6 +47,21 @@ int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
47} 47}
48EXPORT_SYMBOL(rdmsr_on_cpu); 48EXPORT_SYMBOL(rdmsr_on_cpu);
49 49
50int rdmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
51{
52 int err;
53 struct msr_info rv;
54
55 memset(&rv, 0, sizeof(rv));
56
57 rv.msr_no = msr_no;
58 err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1);
59 *q = rv.reg.q;
60
61 return err;
62}
63EXPORT_SYMBOL(rdmsrl_on_cpu);
64
50int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 65int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
51{ 66{
52 int err; 67 int err;
@@ -63,6 +78,22 @@ int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
63} 78}
64EXPORT_SYMBOL(wrmsr_on_cpu); 79EXPORT_SYMBOL(wrmsr_on_cpu);
65 80
81int wrmsrl_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
82{
83 int err;
84 struct msr_info rv;
85
86 memset(&rv, 0, sizeof(rv));
87
88 rv.msr_no = msr_no;
89 rv.reg.q = q;
90
91 err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1);
92
93 return err;
94}
95EXPORT_SYMBOL(wrmsrl_on_cpu);
96
66static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no, 97static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no,
67 struct msr *msrs, 98 struct msr *msrs,
68 void (*msr_func) (void *info)) 99 void (*msr_func) (void *info))
@@ -159,6 +190,37 @@ int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
159} 190}
160EXPORT_SYMBOL(wrmsr_safe_on_cpu); 191EXPORT_SYMBOL(wrmsr_safe_on_cpu);
161 192
193int wrmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 q)
194{
195 int err;
196 struct msr_info rv;
197
198 memset(&rv, 0, sizeof(rv));
199
200 rv.msr_no = msr_no;
201 rv.reg.q = q;
202
203 err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1);
204
205 return err ? err : rv.err;
206}
207EXPORT_SYMBOL(wrmsrl_safe_on_cpu);
208
209int rdmsrl_safe_on_cpu(unsigned int cpu, u32 msr_no, u64 *q)
210{
211 int err;
212 struct msr_info rv;
213
214 memset(&rv, 0, sizeof(rv));
215
216 rv.msr_no = msr_no;
217 err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1);
218 *q = rv.reg.q;
219
220 return err ? err : rv.err;
221}
222EXPORT_SYMBOL(rdmsrl_safe_on_cpu);
223
162/* 224/*
163 * These variants are significantly slower, but allows control over 225 * These variants are significantly slower, but allows control over
164 * the entire 32-bit GPR set. 226 * the entire 32-bit GPR set.