diff options
author | Michael Ellerman <mpe@ellerman.id.au> | 2014-07-08 03:10:45 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-07-10 22:55:05 -0400 |
commit | cd68098bcedd432f21013b2a3b0737b9222da363 (patch) | |
tree | 2052a5daaa56cdcccd3b0a6e78ebbf6cdafa117c /arch | |
parent | e623fbf1c4c140764e084e9159a352750c035d44 (diff) |
powerpc: Clean up MMU_FTRS_A2 and MMU_FTR_TYPE_3E
In fb5a515704d7 "powerpc: Remove platforms/wsp and associated pieces",
we removed the last user of MMU_FTRS_A2. So remove it.
MMU_FTRS_A2 was the last user of MMU_FTR_TYPE_3E, so remove it also.
This leaves some unreachable code in mmu_context_nohash.c, so remove
that also.
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/powerpc/include/asm/mmu.h | 10 | ||||
-rw-r--r-- | arch/powerpc/mm/mmu_context_nohash.c | 12 |
2 files changed, 2 insertions, 20 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h index f8d1d6dcf7db..e61f24ed4e65 100644 --- a/arch/powerpc/include/asm/mmu.h +++ b/arch/powerpc/include/asm/mmu.h | |||
@@ -19,8 +19,7 @@ | |||
19 | #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004) | 19 | #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004) |
20 | #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008) | 20 | #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008) |
21 | #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010) | 21 | #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010) |
22 | #define MMU_FTR_TYPE_3E ASM_CONST(0x00000020) | 22 | #define MMU_FTR_TYPE_47x ASM_CONST(0x00000020) |
23 | #define MMU_FTR_TYPE_47x ASM_CONST(0x00000040) | ||
24 | 23 | ||
25 | /* | 24 | /* |
26 | * This is individual features | 25 | * This is individual features |
@@ -106,13 +105,6 @@ | |||
106 | MMU_FTR_CI_LARGE_PAGE | 105 | MMU_FTR_CI_LARGE_PAGE |
107 | #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ | 106 | #define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ |
108 | MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B | 107 | MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B |
109 | #define MMU_FTRS_A2 MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | \ | ||
110 | MMU_FTR_USE_TLBIVAX_BCAST | \ | ||
111 | MMU_FTR_LOCK_BCAST_INVAL | \ | ||
112 | MMU_FTR_USE_TLBRSRV | \ | ||
113 | MMU_FTR_USE_PAIRED_MAS | \ | ||
114 | MMU_FTR_TLBIEL | \ | ||
115 | MMU_FTR_16M_PAGE | ||
116 | #ifndef __ASSEMBLY__ | 108 | #ifndef __ASSEMBLY__ |
117 | #include <asm/cputable.h> | 109 | #include <asm/cputable.h> |
118 | 110 | ||
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c index af3d78e19302..928ebe79668b 100644 --- a/arch/powerpc/mm/mmu_context_nohash.c +++ b/arch/powerpc/mm/mmu_context_nohash.c | |||
@@ -410,17 +410,7 @@ void __init mmu_context_init(void) | |||
410 | } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) { | 410 | } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) { |
411 | first_context = 1; | 411 | first_context = 1; |
412 | last_context = 65535; | 412 | last_context = 65535; |
413 | } else | 413 | } else { |
414 | #ifdef CONFIG_PPC_BOOK3E_MMU | ||
415 | if (mmu_has_feature(MMU_FTR_TYPE_3E)) { | ||
416 | u32 mmucfg = mfspr(SPRN_MMUCFG); | ||
417 | u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK) | ||
418 | >> MMUCFG_PIDSIZE_SHIFT; | ||
419 | first_context = 1; | ||
420 | last_context = (1UL << (pid_bits + 1)) - 1; | ||
421 | } else | ||
422 | #endif | ||
423 | { | ||
424 | first_context = 1; | 414 | first_context = 1; |
425 | last_context = 255; | 415 | last_context = 255; |
426 | } | 416 | } |