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authorTomasz Figa <t.figa@samsung.com>2013-06-14 19:58:54 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-06-14 20:32:32 -0400
commitca9143501c30a2ce5886757961408488fac2bb4c (patch)
tree8439fbfee8c39179b022cbaa1ac4e416ae1bf47d /arch
parent383ffda2fa8ff3c6380cc5be1eb6cde510de6fa8 (diff)
ARM: EXYNOS: Remove unused board files
Since commit 383ffda ARM: EXYNOS: no more support non-DT for EXYNOS SoCs all non-DT Exynos board files are not used anymore. This patch removes them. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-exynos/mach-armlex4210.c207
-rw-r--r--arch/arm/mach-exynos/mach-nuri.c1388
-rw-r--r--arch/arm/mach-exynos/mach-origen.c823
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c396
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c444
-rw-r--r--arch/arm/mach-exynos/mach-universal_c210.c1159
6 files changed, 0 insertions, 4417 deletions
diff --git a/arch/arm/mach-exynos/mach-armlex4210.c b/arch/arm/mach-exynos/mach-armlex4210.c
deleted file mode 100644
index 5f0f55701374..000000000000
--- a/arch/arm/mach-exynos/mach-armlex4210.c
+++ /dev/null
@@ -1,207 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-armlex4210.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/gpio.h>
12#include <linux/io.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/serial_core.h>
16#include <linux/smsc911x.h>
17
18#include <asm/mach/arch.h>
19#include <asm/mach-types.h>
20
21#include <plat/cpu.h>
22#include <plat/devs.h>
23#include <plat/gpio-cfg.h>
24#include <plat/regs-serial.h>
25#include <plat/regs-srom.h>
26#include <plat/sdhci.h>
27
28#include <mach/irqs.h>
29#include <mach/map.h>
30
31#include "common.h"
32
33/* Following are default values for UCON, ULCON and UFCON UART registers */
34#define ARMLEX4210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
35 S3C2410_UCON_RXILEVEL | \
36 S3C2410_UCON_TXIRQMODE | \
37 S3C2410_UCON_RXIRQMODE | \
38 S3C2410_UCON_RXFIFO_TOI | \
39 S3C2443_UCON_RXERR_IRQEN)
40
41#define ARMLEX4210_ULCON_DEFAULT S3C2410_LCON_CS8
42
43#define ARMLEX4210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
44 S5PV210_UFCON_TXTRIG4 | \
45 S5PV210_UFCON_RXTRIG4)
46
47static struct s3c2410_uartcfg armlex4210_uartcfgs[] __initdata = {
48 [0] = {
49 .hwport = 0,
50 .flags = 0,
51 .ucon = ARMLEX4210_UCON_DEFAULT,
52 .ulcon = ARMLEX4210_ULCON_DEFAULT,
53 .ufcon = ARMLEX4210_UFCON_DEFAULT,
54 },
55 [1] = {
56 .hwport = 1,
57 .flags = 0,
58 .ucon = ARMLEX4210_UCON_DEFAULT,
59 .ulcon = ARMLEX4210_ULCON_DEFAULT,
60 .ufcon = ARMLEX4210_UFCON_DEFAULT,
61 },
62 [2] = {
63 .hwport = 2,
64 .flags = 0,
65 .ucon = ARMLEX4210_UCON_DEFAULT,
66 .ulcon = ARMLEX4210_ULCON_DEFAULT,
67 .ufcon = ARMLEX4210_UFCON_DEFAULT,
68 },
69 [3] = {
70 .hwport = 3,
71 .flags = 0,
72 .ucon = ARMLEX4210_UCON_DEFAULT,
73 .ulcon = ARMLEX4210_ULCON_DEFAULT,
74 .ufcon = ARMLEX4210_UFCON_DEFAULT,
75 },
76};
77
78static struct s3c_sdhci_platdata armlex4210_hsmmc0_pdata __initdata = {
79 .cd_type = S3C_SDHCI_CD_PERMANENT,
80#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
81 .max_width = 8,
82 .host_caps = MMC_CAP_8_BIT_DATA,
83#endif
84};
85
86static struct s3c_sdhci_platdata armlex4210_hsmmc2_pdata __initdata = {
87 .cd_type = S3C_SDHCI_CD_GPIO,
88 .ext_cd_gpio = EXYNOS4_GPX2(5),
89 .ext_cd_gpio_invert = 1,
90 .max_width = 4,
91};
92
93static struct s3c_sdhci_platdata armlex4210_hsmmc3_pdata __initdata = {
94 .cd_type = S3C_SDHCI_CD_PERMANENT,
95 .max_width = 4,
96};
97
98static void __init armlex4210_sdhci_init(void)
99{
100 s3c_sdhci0_set_platdata(&armlex4210_hsmmc0_pdata);
101 s3c_sdhci2_set_platdata(&armlex4210_hsmmc2_pdata);
102 s3c_sdhci3_set_platdata(&armlex4210_hsmmc3_pdata);
103}
104
105static void __init armlex4210_wlan_init(void)
106{
107 /* enable */
108 s3c_gpio_cfgpin(EXYNOS4_GPX2(0), S3C_GPIO_SFN(0xf));
109 s3c_gpio_setpull(EXYNOS4_GPX2(0), S3C_GPIO_PULL_UP);
110
111 /* reset */
112 s3c_gpio_cfgpin(EXYNOS4_GPX1(6), S3C_GPIO_SFN(0xf));
113 s3c_gpio_setpull(EXYNOS4_GPX1(6), S3C_GPIO_PULL_UP);
114
115 /* wakeup */
116 s3c_gpio_cfgpin(EXYNOS4_GPX1(5), S3C_GPIO_SFN(0xf));
117 s3c_gpio_setpull(EXYNOS4_GPX1(5), S3C_GPIO_PULL_UP);
118}
119
120static struct resource armlex4210_smsc911x_resources[] = {
121 [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(3), SZ_64K),
122 [1] = DEFINE_RES_NAMED(IRQ_EINT(27), 1, NULL, IORESOURCE_IRQ \
123 | IRQF_TRIGGER_HIGH),
124};
125
126static struct smsc911x_platform_config smsc9215_config = {
127 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
128 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
129 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
130 .phy_interface = PHY_INTERFACE_MODE_MII,
131 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
132};
133
134static struct platform_device armlex4210_smsc911x = {
135 .name = "smsc911x",
136 .id = -1,
137 .num_resources = ARRAY_SIZE(armlex4210_smsc911x_resources),
138 .resource = armlex4210_smsc911x_resources,
139 .dev = {
140 .platform_data = &smsc9215_config,
141 },
142};
143
144static struct platform_device *armlex4210_devices[] __initdata = {
145 &s3c_device_hsmmc0,
146 &s3c_device_hsmmc2,
147 &s3c_device_hsmmc3,
148 &s3c_device_rtc,
149 &s3c_device_wdt,
150 &armlex4210_smsc911x,
151 &exynos4_device_ahci,
152};
153
154static void __init armlex4210_smsc911x_init(void)
155{
156 u32 cs1;
157
158 /* configure nCS1 width to 16 bits */
159 cs1 = __raw_readl(S5P_SROM_BW) &
160 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
161 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
162 (0 << S5P_SROM_BW__WAITENABLE__SHIFT) |
163 (1 << S5P_SROM_BW__ADDRMODE__SHIFT) |
164 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
165 S5P_SROM_BW__NCS1__SHIFT;
166 __raw_writel(cs1, S5P_SROM_BW);
167
168 /* set timing for nCS1 suitable for ethernet chip */
169 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
170 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
171 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
172 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
173 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
174 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
175 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
176}
177
178static void __init armlex4210_map_io(void)
179{
180 exynos_init_io(NULL, 0);
181 s3c24xx_init_uarts(armlex4210_uartcfgs,
182 ARRAY_SIZE(armlex4210_uartcfgs));
183}
184
185static void __init armlex4210_machine_init(void)
186{
187 armlex4210_smsc911x_init();
188
189 armlex4210_sdhci_init();
190
191 armlex4210_wlan_init();
192
193 platform_add_devices(armlex4210_devices,
194 ARRAY_SIZE(armlex4210_devices));
195}
196
197MACHINE_START(ARMLEX4210, "ARMLEX4210")
198 /* Maintainer: Alim Akhtar <alim.akhtar@samsung.com> */
199 .atag_offset = 0x100,
200 .smp = smp_ops(exynos_smp_ops),
201 .init_irq = exynos4_init_irq,
202 .map_io = armlex4210_map_io,
203 .init_machine = armlex4210_machine_init,
204 .init_late = exynos_init_late,
205 .init_time = exynos_init_time,
206 .restart = exynos4_restart,
207MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
deleted file mode 100644
index 5c8b2878dbbd..000000000000
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ /dev/null
@@ -1,1388 +0,0 @@
1/*
2 * linux/arch/arm/mach-exynos4/mach-nuri.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/platform_device.h>
12#include <linux/serial_core.h>
13#include <linux/input.h>
14#include <linux/i2c.h>
15#include <linux/i2c/atmel_mxt_ts.h>
16#include <linux/i2c-gpio.h>
17#include <linux/gpio_keys.h>
18#include <linux/gpio.h>
19#include <linux/power/max8903_charger.h>
20#include <linux/power/max17042_battery.h>
21#include <linux/regulator/machine.h>
22#include <linux/regulator/fixed.h>
23#include <linux/mfd/max8997.h>
24#include <linux/mfd/max8997-private.h>
25#include <linux/mmc/host.h>
26#include <linux/fb.h>
27#include <linux/pwm_backlight.h>
28#include <linux/platform_data/i2c-s3c2410.h>
29#include <linux/platform_data/mipi-csis.h>
30#include <linux/platform_data/s3c-hsotg.h>
31#include <linux/platform_data/usb-ehci-s5p.h>
32#include <drm/exynos_drm.h>
33
34#include <video/platform_lcd.h>
35#include <video/samsung_fimd.h>
36#include <media/m5mols.h>
37#include <media/s5k6aa.h>
38#include <media/s5p_fimc.h>
39#include <media/v4l2-mediabus.h>
40
41#include <asm/mach/arch.h>
42#include <asm/mach-types.h>
43
44#include <plat/adc.h>
45#include <plat/regs-serial.h>
46#include <plat/cpu.h>
47#include <plat/devs.h>
48#include <plat/fb.h>
49#include <plat/sdhci.h>
50#include <plat/clock.h>
51#include <plat/gpio-cfg.h>
52#include <plat/mfc.h>
53#include <plat/fimc-core.h>
54#include <plat/camport.h>
55
56#include <mach/irqs.h>
57#include <mach/map.h>
58
59#include "common.h"
60
61/* Following are default values for UCON, ULCON and UFCON UART registers */
62#define NURI_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
63 S3C2410_UCON_RXILEVEL | \
64 S3C2410_UCON_TXIRQMODE | \
65 S3C2410_UCON_RXIRQMODE | \
66 S3C2410_UCON_RXFIFO_TOI | \
67 S3C2443_UCON_RXERR_IRQEN)
68
69#define NURI_ULCON_DEFAULT S3C2410_LCON_CS8
70
71#define NURI_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
72 S5PV210_UFCON_TXTRIG256 | \
73 S5PV210_UFCON_RXTRIG256)
74
75enum fixed_regulator_id {
76 FIXED_REG_ID_MMC = 0,
77 FIXED_REG_ID_MAX8903,
78 FIXED_REG_ID_CAM_A28V,
79 FIXED_REG_ID_CAM_12V,
80 FIXED_REG_ID_CAM_VT_15V,
81};
82
83static struct s3c2410_uartcfg nuri_uartcfgs[] __initdata = {
84 {
85 .hwport = 0,
86 .ucon = NURI_UCON_DEFAULT,
87 .ulcon = NURI_ULCON_DEFAULT,
88 .ufcon = NURI_UFCON_DEFAULT,
89 },
90 {
91 .hwport = 1,
92 .ucon = NURI_UCON_DEFAULT,
93 .ulcon = NURI_ULCON_DEFAULT,
94 .ufcon = NURI_UFCON_DEFAULT,
95 },
96 {
97 .hwport = 2,
98 .ucon = NURI_UCON_DEFAULT,
99 .ulcon = NURI_ULCON_DEFAULT,
100 .ufcon = NURI_UFCON_DEFAULT,
101 },
102 {
103 .hwport = 3,
104 .ucon = NURI_UCON_DEFAULT,
105 .ulcon = NURI_ULCON_DEFAULT,
106 .ufcon = NURI_UFCON_DEFAULT,
107 },
108};
109
110/* eMMC */
111static struct s3c_sdhci_platdata nuri_hsmmc0_data __initdata = {
112 .max_width = 8,
113 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
114 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
115 MMC_CAP_ERASE),
116 .cd_type = S3C_SDHCI_CD_PERMANENT,
117};
118
119static struct regulator_consumer_supply emmc_supplies[] = {
120 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
121 REGULATOR_SUPPLY("vmmc", "dw_mmc"),
122};
123
124static struct regulator_init_data emmc_fixed_voltage_init_data = {
125 .constraints = {
126 .name = "VMEM_VDD_2.8V",
127 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
128 },
129 .num_consumer_supplies = ARRAY_SIZE(emmc_supplies),
130 .consumer_supplies = emmc_supplies,
131};
132
133static struct fixed_voltage_config emmc_fixed_voltage_config = {
134 .supply_name = "MASSMEMORY_EN (inverted)",
135 .microvolts = 2800000,
136 .gpio = EXYNOS4_GPL1(1),
137 .enable_high = false,
138 .init_data = &emmc_fixed_voltage_init_data,
139};
140
141static struct platform_device emmc_fixed_voltage = {
142 .name = "reg-fixed-voltage",
143 .id = FIXED_REG_ID_MMC,
144 .dev = {
145 .platform_data = &emmc_fixed_voltage_config,
146 },
147};
148
149/* SD */
150static struct s3c_sdhci_platdata nuri_hsmmc2_data __initdata = {
151 .max_width = 4,
152 .host_caps = MMC_CAP_4_BIT_DATA |
153 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
154 .ext_cd_gpio = EXYNOS4_GPX3(3), /* XEINT_27 */
155 .ext_cd_gpio_invert = 1,
156 .cd_type = S3C_SDHCI_CD_GPIO,
157};
158
159/* WLAN */
160static struct s3c_sdhci_platdata nuri_hsmmc3_data __initdata = {
161 .max_width = 4,
162 .host_caps = MMC_CAP_4_BIT_DATA |
163 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
164 .cd_type = S3C_SDHCI_CD_EXTERNAL,
165};
166
167static void __init nuri_sdhci_init(void)
168{
169 s3c_sdhci0_set_platdata(&nuri_hsmmc0_data);
170 s3c_sdhci2_set_platdata(&nuri_hsmmc2_data);
171 s3c_sdhci3_set_platdata(&nuri_hsmmc3_data);
172}
173
174/* GPIO KEYS */
175static struct gpio_keys_button nuri_gpio_keys_tables[] = {
176 {
177 .code = KEY_VOLUMEUP,
178 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
179 .desc = "gpio-keys: KEY_VOLUMEUP",
180 .type = EV_KEY,
181 .active_low = 1,
182 .debounce_interval = 1,
183 }, {
184 .code = KEY_VOLUMEDOWN,
185 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
186 .desc = "gpio-keys: KEY_VOLUMEDOWN",
187 .type = EV_KEY,
188 .active_low = 1,
189 .debounce_interval = 1,
190 }, {
191 .code = KEY_POWER,
192 .gpio = EXYNOS4_GPX2(7), /* XEINT23 */
193 .desc = "gpio-keys: KEY_POWER",
194 .type = EV_KEY,
195 .active_low = 1,
196 .wakeup = 1,
197 .debounce_interval = 1,
198 },
199};
200
201static struct gpio_keys_platform_data nuri_gpio_keys_data = {
202 .buttons = nuri_gpio_keys_tables,
203 .nbuttons = ARRAY_SIZE(nuri_gpio_keys_tables),
204};
205
206static struct platform_device nuri_gpio_keys = {
207 .name = "gpio-keys",
208 .dev = {
209 .platform_data = &nuri_gpio_keys_data,
210 },
211};
212
213#ifdef CONFIG_DRM_EXYNOS
214static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
215 .panel = {
216 .timing = {
217 .xres = 1024,
218 .yres = 600,
219 .hsync_len = 40,
220 .left_margin = 79,
221 .right_margin = 200,
222 .vsync_len = 10,
223 .upper_margin = 10,
224 .lower_margin = 11,
225 .refresh = 60,
226 },
227 },
228 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
229 VIDCON0_CLKSEL_LCD,
230 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
231 .default_win = 3,
232 .bpp = 32,
233};
234
235#else
236/* Frame Buffer */
237static struct s3c_fb_pd_win nuri_fb_win0 = {
238 .max_bpp = 24,
239 .default_bpp = 16,
240 .xres = 1024,
241 .yres = 600,
242 .virtual_x = 1024,
243 .virtual_y = 2 * 600,
244};
245
246static struct fb_videomode nuri_lcd_timing = {
247 .left_margin = 64,
248 .right_margin = 16,
249 .upper_margin = 64,
250 .lower_margin = 1,
251 .hsync_len = 48,
252 .vsync_len = 3,
253 .xres = 1024,
254 .yres = 600,
255 .refresh = 60,
256};
257
258static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
259 .win[0] = &nuri_fb_win0,
260 .vtiming = &nuri_lcd_timing,
261 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
262 VIDCON0_CLKSEL_LCD,
263 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
264 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
265};
266#endif
267
268static void nuri_lcd_power_on(struct plat_lcd_data *pd, unsigned int power)
269{
270 int gpio = EXYNOS4_GPE1(5);
271
272 gpio_request(gpio, "LVDS_nSHDN");
273 gpio_direction_output(gpio, power);
274 gpio_free(gpio);
275}
276
277static int nuri_bl_init(struct device *dev)
278{
279 return gpio_request_one(EXYNOS4_GPE2(3), GPIOF_OUT_INIT_LOW,
280 "LCD_LD0_EN");
281}
282
283static int nuri_bl_notify(struct device *dev, int brightness)
284{
285 if (brightness < 1)
286 brightness = 0;
287
288 gpio_set_value(EXYNOS4_GPE2(3), 1);
289
290 return brightness;
291}
292
293static void nuri_bl_exit(struct device *dev)
294{
295 gpio_free(EXYNOS4_GPE2(3));
296}
297
298/* nuri pwm backlight */
299static struct platform_pwm_backlight_data nuri_backlight_data = {
300 .pwm_id = 0,
301 .pwm_period_ns = 30000,
302 .max_brightness = 100,
303 .dft_brightness = 50,
304 .init = nuri_bl_init,
305 .notify = nuri_bl_notify,
306 .exit = nuri_bl_exit,
307};
308
309static struct platform_device nuri_backlight_device = {
310 .name = "pwm-backlight",
311 .id = -1,
312 .dev = {
313 .parent = &s3c_device_timer[0].dev,
314 .platform_data = &nuri_backlight_data,
315 },
316};
317
318static struct plat_lcd_data nuri_lcd_platform_data = {
319 .set_power = nuri_lcd_power_on,
320};
321
322static struct platform_device nuri_lcd_device = {
323 .name = "platform-lcd",
324 .id = -1,
325 .dev = {
326 .platform_data = &nuri_lcd_platform_data,
327 },
328};
329
330/* I2C1 */
331static struct i2c_board_info i2c1_devs[] __initdata = {
332 /* Gyro, To be updated */
333};
334
335/* TSP */
336static struct mxt_platform_data mxt_platform_data = {
337 .x_line = 18,
338 .y_line = 11,
339 .x_size = 1024,
340 .y_size = 600,
341 .blen = 0x1,
342 .threshold = 0x28,
343 .voltage = 2800000, /* 2.8V */
344 .orient = MXT_DIAGONAL_COUNTER,
345 .irqflags = IRQF_TRIGGER_FALLING,
346};
347
348static struct s3c2410_platform_i2c i2c3_data __initdata = {
349 .flags = 0,
350 .bus_num = 3,
351 .slave_addr = 0x10,
352 .frequency = 400 * 1000,
353 .sda_delay = 100,
354};
355
356static struct i2c_board_info i2c3_devs[] __initdata = {
357 {
358 I2C_BOARD_INFO("atmel_mxt_ts", 0x4a),
359 .platform_data = &mxt_platform_data,
360 .irq = IRQ_EINT(4),
361 },
362};
363
364static void __init nuri_tsp_init(void)
365{
366 int gpio;
367
368 /* TOUCH_INT: XEINT_4 */
369 gpio = EXYNOS4_GPX0(4);
370 gpio_request(gpio, "TOUCH_INT");
371 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
372 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
373}
374
375static struct regulator_consumer_supply __initdata max8997_ldo1_[] = {
376 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* Used by CPU's ADC drv */
377};
378static struct regulator_consumer_supply __initdata max8997_ldo3_[] = {
379 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* USB */
380 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
381};
382static struct regulator_consumer_supply __initdata max8997_ldo4_[] = {
383 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
384};
385static struct regulator_consumer_supply __initdata max8997_ldo5_[] = {
386 REGULATOR_SUPPLY("vhsic", "modemctl"), /* MODEM */
387};
388static struct regulator_consumer_supply nuri_max8997_ldo6_consumer[] = {
389 REGULATOR_SUPPLY("vdd_reg", "6-003c"), /* S5K6AA camera */
390};
391static struct regulator_consumer_supply __initdata max8997_ldo7_[] = {
392 REGULATOR_SUPPLY("dig_18", "0-001f"), /* HCD803 */
393};
394static struct regulator_consumer_supply __initdata max8997_ldo8_[] = {
395 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* USB */
396 REGULATOR_SUPPLY("vdac", NULL), /* Used by CPU */
397};
398static struct regulator_consumer_supply __initdata max8997_ldo11_[] = {
399 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* U804 LVDS */
400};
401static struct regulator_consumer_supply __initdata max8997_ldo12_[] = {
402 REGULATOR_SUPPLY("vddio", "6-003c"), /* HDC802 */
403};
404static struct regulator_consumer_supply __initdata max8997_ldo13_[] = {
405 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.2"), /* TFLASH */
406};
407static struct regulator_consumer_supply __initdata max8997_ldo14_[] = {
408 REGULATOR_SUPPLY("inmotor", "max8997-haptic"),
409};
410static struct regulator_consumer_supply __initdata max8997_ldo15_[] = {
411 REGULATOR_SUPPLY("avdd", "3-004a"), /* Touch Screen */
412};
413static struct regulator_consumer_supply __initdata max8997_ldo16_[] = {
414 REGULATOR_SUPPLY("d_sensor", "0-001f"), /* HDC803 */
415};
416static struct regulator_consumer_supply __initdata max8997_ldo18_[] = {
417 REGULATOR_SUPPLY("vdd", "3-004a"), /* Touch Screen */
418};
419static struct regulator_consumer_supply __initdata max8997_buck1_[] = {
420 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
421};
422static struct regulator_consumer_supply __initdata max8997_buck2_[] = {
423 REGULATOR_SUPPLY("vdd_int", "exynos4210-busfreq.0"), /* CPUFREQ */
424};
425static struct regulator_consumer_supply __initdata max8997_buck3_[] = {
426 REGULATOR_SUPPLY("vdd", "mali_dev.0"), /* G3D of Exynos 4 */
427};
428static struct regulator_consumer_supply __initdata max8997_buck4_[] = {
429 REGULATOR_SUPPLY("core", "0-001f"), /* HDC803 */
430};
431static struct regulator_consumer_supply __initdata max8997_buck6_[] = {
432 REGULATOR_SUPPLY("dig_28", "0-001f"), /* pin "7" of HDC803 */
433};
434static struct regulator_consumer_supply __initdata max8997_esafeout1_[] = {
435 REGULATOR_SUPPLY("usb_vbus", NULL), /* CPU's USB OTG */
436};
437static struct regulator_consumer_supply __initdata max8997_esafeout2_[] = {
438 REGULATOR_SUPPLY("usb_vbus", "modemctl"), /* VBUS of Modem */
439};
440
441static struct regulator_consumer_supply __initdata max8997_charger_[] = {
442 REGULATOR_SUPPLY("vinchg1", "charger-manager.0"),
443};
444static struct regulator_consumer_supply __initdata max8997_chg_toff_[] = {
445 REGULATOR_SUPPLY("vinchg_stop", NULL), /* for jack interrupt handlers */
446};
447
448static struct regulator_consumer_supply __initdata max8997_32khz_ap_[] = {
449 REGULATOR_SUPPLY("gps_clk", "bcm4751"),
450 REGULATOR_SUPPLY("bt_clk", "bcm4330-b1"),
451 REGULATOR_SUPPLY("wifi_clk", "bcm433-b1"),
452};
453
454static struct regulator_init_data __initdata max8997_ldo1_data = {
455 .constraints = {
456 .name = "VADC_3.3V_C210",
457 .min_uV = 3300000,
458 .max_uV = 3300000,
459 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
460 .apply_uV = 1,
461 .state_mem = {
462 .disabled = 1,
463 },
464 },
465 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo1_),
466 .consumer_supplies = max8997_ldo1_,
467};
468
469static struct regulator_init_data __initdata max8997_ldo2_data = {
470 .constraints = {
471 .name = "VALIVE_1.1V_C210",
472 .min_uV = 1100000,
473 .max_uV = 1100000,
474 .apply_uV = 1,
475 .always_on = 1,
476 .state_mem = {
477 .enabled = 1,
478 },
479 },
480};
481
482static struct regulator_init_data __initdata max8997_ldo3_data = {
483 .constraints = {
484 .name = "VUSB_1.1V_C210",
485 .min_uV = 1100000,
486 .max_uV = 1100000,
487 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
488 .apply_uV = 1,
489 .state_mem = {
490 .disabled = 1,
491 },
492 },
493 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo3_),
494 .consumer_supplies = max8997_ldo3_,
495};
496
497static struct regulator_init_data __initdata max8997_ldo4_data = {
498 .constraints = {
499 .name = "VMIPI_1.8V",
500 .min_uV = 1800000,
501 .max_uV = 1800000,
502 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
503 .apply_uV = 1,
504 .state_mem = {
505 .disabled = 1,
506 },
507 },
508 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo4_),
509 .consumer_supplies = max8997_ldo4_,
510};
511
512static struct regulator_init_data __initdata max8997_ldo5_data = {
513 .constraints = {
514 .name = "VHSIC_1.2V_C210",
515 .min_uV = 1200000,
516 .max_uV = 1200000,
517 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
518 .apply_uV = 1,
519 .state_mem = {
520 .disabled = 1,
521 },
522 },
523 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo5_),
524 .consumer_supplies = max8997_ldo5_,
525};
526
527static struct regulator_init_data __initdata max8997_ldo6_data = {
528 .constraints = {
529 .name = "VCC_1.8V_PDA",
530 .min_uV = 1800000,
531 .max_uV = 1800000,
532 .apply_uV = 1,
533 .always_on = 1,
534 .state_mem = {
535 .enabled = 1,
536 },
537 },
538 .num_consumer_supplies = ARRAY_SIZE(nuri_max8997_ldo6_consumer),
539 .consumer_supplies = nuri_max8997_ldo6_consumer,
540};
541
542static struct regulator_init_data __initdata max8997_ldo7_data = {
543 .constraints = {
544 .name = "CAM_ISP_1.8V",
545 .min_uV = 1800000,
546 .max_uV = 1800000,
547 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
548 .apply_uV = 1,
549 .state_mem = {
550 .disabled = 1,
551 },
552 },
553 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo7_),
554 .consumer_supplies = max8997_ldo7_,
555};
556
557static struct regulator_init_data __initdata max8997_ldo8_data = {
558 .constraints = {
559 .name = "VUSB+VDAC_3.3V_C210",
560 .min_uV = 3300000,
561 .max_uV = 3300000,
562 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
563 .apply_uV = 1,
564 .state_mem = {
565 .disabled = 1,
566 },
567 },
568 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo8_),
569 .consumer_supplies = max8997_ldo8_,
570};
571
572static struct regulator_init_data __initdata max8997_ldo9_data = {
573 .constraints = {
574 .name = "VCC_2.8V_PDA",
575 .min_uV = 2800000,
576 .max_uV = 2800000,
577 .apply_uV = 1,
578 .always_on = 1,
579 .state_mem = {
580 .enabled = 1,
581 },
582 },
583};
584
585static struct regulator_init_data __initdata max8997_ldo10_data = {
586 .constraints = {
587 .name = "VPLL_1.1V_C210",
588 .min_uV = 1100000,
589 .max_uV = 1100000,
590 .apply_uV = 1,
591 .always_on = 1,
592 .state_mem = {
593 .disabled = 1,
594 },
595 },
596};
597
598static struct regulator_init_data __initdata max8997_ldo11_data = {
599 .constraints = {
600 .name = "LVDS_VDD3.3V",
601 .min_uV = 3300000,
602 .max_uV = 3300000,
603 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
604 .apply_uV = 1,
605 .boot_on = 1,
606 .state_mem = {
607 .disabled = 1,
608 },
609 },
610 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo11_),
611 .consumer_supplies = max8997_ldo11_,
612};
613
614static struct regulator_init_data __initdata max8997_ldo12_data = {
615 .constraints = {
616 .name = "VT_CAM_1.8V",
617 .min_uV = 1800000,
618 .max_uV = 1800000,
619 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
620 .apply_uV = 1,
621 .state_mem = {
622 .disabled = 1,
623 },
624 },
625 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo12_),
626 .consumer_supplies = max8997_ldo12_,
627};
628
629static struct regulator_init_data __initdata max8997_ldo13_data = {
630 .constraints = {
631 .name = "VTF_2.8V",
632 .min_uV = 2800000,
633 .max_uV = 2800000,
634 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
635 .apply_uV = 1,
636 .state_mem = {
637 .disabled = 1,
638 },
639 },
640 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo13_),
641 .consumer_supplies = max8997_ldo13_,
642};
643
644static struct regulator_init_data __initdata max8997_ldo14_data = {
645 .constraints = {
646 .name = "VCC_3.0V_MOTOR",
647 .min_uV = 3000000,
648 .max_uV = 3000000,
649 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
650 .apply_uV = 1,
651 .state_mem = {
652 .disabled = 1,
653 },
654 },
655 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo14_),
656 .consumer_supplies = max8997_ldo14_,
657};
658
659static struct regulator_init_data __initdata max8997_ldo15_data = {
660 .constraints = {
661 .name = "VTOUCH_ADVV2.8V",
662 .min_uV = 2800000,
663 .max_uV = 2800000,
664 .apply_uV = 1,
665 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
666 .state_mem = {
667 .disabled = 1,
668 },
669 },
670 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo15_),
671 .consumer_supplies = max8997_ldo15_,
672};
673
674static struct regulator_init_data __initdata max8997_ldo16_data = {
675 .constraints = {
676 .name = "CAM_SENSOR_IO_1.8V",
677 .min_uV = 1800000,
678 .max_uV = 1800000,
679 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
680 .apply_uV = 1,
681 .state_mem = {
682 .disabled = 1,
683 },
684 },
685 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo16_),
686 .consumer_supplies = max8997_ldo16_,
687};
688
689static struct regulator_init_data __initdata max8997_ldo18_data = {
690 .constraints = {
691 .name = "VTOUCH_VDD2.8V",
692 .min_uV = 2800000,
693 .max_uV = 2800000,
694 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
695 .apply_uV = 1,
696 .state_mem = {
697 .disabled = 1,
698 },
699 },
700 .num_consumer_supplies = ARRAY_SIZE(max8997_ldo18_),
701 .consumer_supplies = max8997_ldo18_,
702};
703
704static struct regulator_init_data __initdata max8997_ldo21_data = {
705 .constraints = {
706 .name = "VDDQ_M1M2_1.2V",
707 .min_uV = 1200000,
708 .max_uV = 1200000,
709 .apply_uV = 1,
710 .always_on = 1,
711 .state_mem = {
712 .disabled = 1,
713 },
714 },
715};
716
717static struct regulator_init_data __initdata max8997_buck1_data = {
718 .constraints = {
719 .name = "VARM_1.2V_C210",
720 .min_uV = 900000,
721 .max_uV = 1350000,
722 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
723 .always_on = 1,
724 .state_mem = {
725 .disabled = 1,
726 },
727 },
728 .num_consumer_supplies = ARRAY_SIZE(max8997_buck1_),
729 .consumer_supplies = max8997_buck1_,
730};
731
732static struct regulator_init_data __initdata max8997_buck2_data = {
733 .constraints = {
734 .name = "VINT_1.1V_C210",
735 .min_uV = 900000,
736 .max_uV = 1200000,
737 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
738 .always_on = 1,
739 .state_mem = {
740 .disabled = 1,
741 },
742 },
743 .num_consumer_supplies = ARRAY_SIZE(max8997_buck2_),
744 .consumer_supplies = max8997_buck2_,
745};
746
747static struct regulator_init_data __initdata max8997_buck3_data = {
748 .constraints = {
749 .name = "VG3D_1.1V_C210",
750 .min_uV = 900000,
751 .max_uV = 1100000,
752 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
753 REGULATOR_CHANGE_STATUS,
754 .state_mem = {
755 .disabled = 1,
756 },
757 },
758 .num_consumer_supplies = ARRAY_SIZE(max8997_buck3_),
759 .consumer_supplies = max8997_buck3_,
760};
761
762static struct regulator_init_data __initdata max8997_buck4_data = {
763 .constraints = {
764 .name = "CAM_ISP_CORE_1.2V",
765 .min_uV = 1200000,
766 .max_uV = 1200000,
767 .apply_uV = 1,
768 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
769 .state_mem = {
770 .disabled = 1,
771 },
772 },
773 .num_consumer_supplies = ARRAY_SIZE(max8997_buck4_),
774 .consumer_supplies = max8997_buck4_,
775};
776
777static struct regulator_init_data __initdata max8997_buck5_data = {
778 .constraints = {
779 .name = "VMEM_1.2V_C210",
780 .min_uV = 1200000,
781 .max_uV = 1200000,
782 .apply_uV = 1,
783 .always_on = 1,
784 .state_mem = {
785 .enabled = 1,
786 },
787 },
788};
789
790static struct regulator_init_data __initdata max8997_buck6_data = {
791 .constraints = {
792 .name = "CAM_AF_2.8V",
793 .min_uV = 2800000,
794 .max_uV = 2800000,
795 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
796 .state_mem = {
797 .disabled = 1,
798 },
799 },
800 .num_consumer_supplies = ARRAY_SIZE(max8997_buck6_),
801 .consumer_supplies = max8997_buck6_,
802};
803
804static struct regulator_init_data __initdata max8997_buck7_data = {
805 .constraints = {
806 .name = "VCC_SUB_2.0V",
807 .min_uV = 2000000,
808 .max_uV = 2000000,
809 .apply_uV = 1,
810 .always_on = 1,
811 .state_mem = {
812 .enabled = 1,
813 },
814 },
815};
816
817static struct regulator_init_data __initdata max8997_32khz_ap_data = {
818 .constraints = {
819 .name = "32KHz AP",
820 .always_on = 1,
821 .state_mem = {
822 .enabled = 1,
823 },
824 },
825 .num_consumer_supplies = ARRAY_SIZE(max8997_32khz_ap_),
826 .consumer_supplies = max8997_32khz_ap_,
827};
828
829static struct regulator_init_data __initdata max8997_32khz_cp_data = {
830 .constraints = {
831 .name = "32KHz CP",
832 .state_mem = {
833 .disabled = 1,
834 },
835 },
836};
837
838static struct regulator_init_data __initdata max8997_vichg_data = {
839 .constraints = {
840 .name = "VICHG",
841 .state_mem = {
842 .disabled = 1,
843 },
844 },
845};
846
847static struct regulator_init_data __initdata max8997_esafeout1_data = {
848 .constraints = {
849 .name = "SAFEOUT1",
850 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
851 .always_on = 1,
852 .state_mem = {
853 .disabled = 1,
854 },
855 },
856 .num_consumer_supplies = ARRAY_SIZE(max8997_esafeout1_),
857 .consumer_supplies = max8997_esafeout1_,
858};
859
860static struct regulator_init_data __initdata max8997_esafeout2_data = {
861 .constraints = {
862 .name = "SAFEOUT2",
863 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
864 .state_mem = {
865 .disabled = 1,
866 },
867 },
868 .num_consumer_supplies = ARRAY_SIZE(max8997_esafeout2_),
869 .consumer_supplies = max8997_esafeout2_,
870};
871
872static struct regulator_init_data __initdata max8997_charger_cv_data = {
873 .constraints = {
874 .name = "CHARGER_CV",
875 .min_uV = 4200000,
876 .max_uV = 4200000,
877 .apply_uV = 1,
878 },
879};
880
881static struct regulator_init_data __initdata max8997_charger_data = {
882 .constraints = {
883 .name = "CHARGER",
884 .min_uA = 200000,
885 .max_uA = 950000,
886 .boot_on = 1,
887 .valid_ops_mask = REGULATOR_CHANGE_STATUS |
888 REGULATOR_CHANGE_CURRENT,
889 },
890 .num_consumer_supplies = ARRAY_SIZE(max8997_charger_),
891 .consumer_supplies = max8997_charger_,
892};
893
894static struct regulator_init_data __initdata max8997_charger_topoff_data = {
895 .constraints = {
896 .name = "CHARGER TOPOFF",
897 .min_uA = 50000,
898 .max_uA = 200000,
899 .valid_ops_mask = REGULATOR_CHANGE_CURRENT,
900 },
901 .num_consumer_supplies = ARRAY_SIZE(max8997_chg_toff_),
902 .consumer_supplies = max8997_chg_toff_,
903};
904
905static struct max8997_regulator_data __initdata nuri_max8997_regulators[] = {
906 { MAX8997_LDO1, &max8997_ldo1_data },
907 { MAX8997_LDO2, &max8997_ldo2_data },
908 { MAX8997_LDO3, &max8997_ldo3_data },
909 { MAX8997_LDO4, &max8997_ldo4_data },
910 { MAX8997_LDO5, &max8997_ldo5_data },
911 { MAX8997_LDO6, &max8997_ldo6_data },
912 { MAX8997_LDO7, &max8997_ldo7_data },
913 { MAX8997_LDO8, &max8997_ldo8_data },
914 { MAX8997_LDO9, &max8997_ldo9_data },
915 { MAX8997_LDO10, &max8997_ldo10_data },
916 { MAX8997_LDO11, &max8997_ldo11_data },
917 { MAX8997_LDO12, &max8997_ldo12_data },
918 { MAX8997_LDO13, &max8997_ldo13_data },
919 { MAX8997_LDO14, &max8997_ldo14_data },
920 { MAX8997_LDO15, &max8997_ldo15_data },
921 { MAX8997_LDO16, &max8997_ldo16_data },
922
923 { MAX8997_LDO18, &max8997_ldo18_data },
924 { MAX8997_LDO21, &max8997_ldo21_data },
925
926 { MAX8997_BUCK1, &max8997_buck1_data },
927 { MAX8997_BUCK2, &max8997_buck2_data },
928 { MAX8997_BUCK3, &max8997_buck3_data },
929 { MAX8997_BUCK4, &max8997_buck4_data },
930 { MAX8997_BUCK5, &max8997_buck5_data },
931 { MAX8997_BUCK6, &max8997_buck6_data },
932 { MAX8997_BUCK7, &max8997_buck7_data },
933
934 { MAX8997_EN32KHZ_AP, &max8997_32khz_ap_data },
935 { MAX8997_EN32KHZ_CP, &max8997_32khz_cp_data },
936
937 { MAX8997_ENVICHG, &max8997_vichg_data },
938 { MAX8997_ESAFEOUT1, &max8997_esafeout1_data },
939 { MAX8997_ESAFEOUT2, &max8997_esafeout2_data },
940 { MAX8997_CHARGER_CV, &max8997_charger_cv_data },
941 { MAX8997_CHARGER, &max8997_charger_data },
942 { MAX8997_CHARGER_TOPOFF, &max8997_charger_topoff_data },
943};
944
945static struct max8997_platform_data __initdata nuri_max8997_pdata = {
946 .wakeup = 1,
947
948 .num_regulators = ARRAY_SIZE(nuri_max8997_regulators),
949 .regulators = nuri_max8997_regulators,
950
951 .buck125_gpios = { EXYNOS4_GPX0(5), EXYNOS4_GPX0(6), EXYNOS4_GPL0(0) },
952
953 .buck1_voltage[0] = 1350000, /* 1.35V */
954 .buck1_voltage[1] = 1300000, /* 1.3V */
955 .buck1_voltage[2] = 1250000, /* 1.25V */
956 .buck1_voltage[3] = 1200000, /* 1.2V */
957 .buck1_voltage[4] = 1150000, /* 1.15V */
958 .buck1_voltage[5] = 1100000, /* 1.1V */
959 .buck1_voltage[6] = 1000000, /* 1.0V */
960 .buck1_voltage[7] = 950000, /* 0.95V */
961
962 .buck2_voltage[0] = 1100000, /* 1.1V */
963 .buck2_voltage[1] = 1000000, /* 1.0V */
964 .buck2_voltage[2] = 950000, /* 0.95V */
965 .buck2_voltage[3] = 900000, /* 0.9V */
966 .buck2_voltage[4] = 1100000, /* 1.1V */
967 .buck2_voltage[5] = 1000000, /* 1.0V */
968 .buck2_voltage[6] = 950000, /* 0.95V */
969 .buck2_voltage[7] = 900000, /* 0.9V */
970
971 .buck5_voltage[0] = 1200000, /* 1.2V */
972 .buck5_voltage[1] = 1200000, /* 1.2V */
973 .buck5_voltage[2] = 1200000, /* 1.2V */
974 .buck5_voltage[3] = 1200000, /* 1.2V */
975 .buck5_voltage[4] = 1200000, /* 1.2V */
976 .buck5_voltage[5] = 1200000, /* 1.2V */
977 .buck5_voltage[6] = 1200000, /* 1.2V */
978 .buck5_voltage[7] = 1200000, /* 1.2V */
979};
980
981/* GPIO I2C 5 (PMIC) */
982enum { I2C5_MAX8997 };
983static struct i2c_board_info i2c5_devs[] __initdata = {
984 [I2C5_MAX8997] = {
985 I2C_BOARD_INFO("max8997", 0xCC >> 1),
986 .platform_data = &nuri_max8997_pdata,
987 },
988};
989
990static struct max17042_platform_data nuri_battery_platform_data = {
991};
992
993/* GPIO I2C 9 (Fuel Gauge) */
994static struct i2c_gpio_platform_data i2c9_gpio_data = {
995 .sda_pin = EXYNOS4_GPY4(0), /* XM0ADDR_8 */
996 .scl_pin = EXYNOS4_GPY4(1), /* XM0ADDR_9 */
997};
998static struct platform_device i2c9_gpio = {
999 .name = "i2c-gpio",
1000 .id = 9,
1001 .dev = {
1002 .platform_data = &i2c9_gpio_data,
1003 },
1004};
1005enum { I2C9_MAX17042};
1006static struct i2c_board_info i2c9_devs[] __initdata = {
1007 [I2C9_MAX17042] = {
1008 I2C_BOARD_INFO("max17042", 0x36),
1009 .platform_data = &nuri_battery_platform_data,
1010 },
1011};
1012
1013/* MAX8903 Secondary Charger */
1014static struct regulator_consumer_supply supplies_max8903[] = {
1015 REGULATOR_SUPPLY("vinchg2", "charger-manager.0"),
1016};
1017
1018static struct regulator_init_data max8903_charger_en_data = {
1019 .constraints = {
1020 .name = "VOUT_CHARGER",
1021 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
1022 .boot_on = 1,
1023 },
1024 .num_consumer_supplies = ARRAY_SIZE(supplies_max8903),
1025 .consumer_supplies = supplies_max8903,
1026};
1027
1028static struct fixed_voltage_config max8903_charger_en = {
1029 .supply_name = "VOUT_CHARGER",
1030 .microvolts = 5000000, /* Assume 5VDC */
1031 .gpio = EXYNOS4_GPY4(5), /* TA_EN negaged */
1032 .enable_high = 0, /* Enable = Low */
1033 .enabled_at_boot = 1,
1034 .init_data = &max8903_charger_en_data,
1035};
1036
1037static struct platform_device max8903_fixed_reg_dev = {
1038 .name = "reg-fixed-voltage",
1039 .id = FIXED_REG_ID_MAX8903,
1040 .dev = { .platform_data = &max8903_charger_en },
1041};
1042
1043static struct max8903_pdata nuri_max8903 = {
1044 /*
1045 * cen: don't control with the driver, let it be
1046 * controlled by regulator above
1047 */
1048 .dok = EXYNOS4_GPX1(4), /* TA_nCONNECTED */
1049 /* uok, usus: not connected */
1050 .chg = EXYNOS4_GPE2(0), /* TA_nCHG */
1051 /* flt: vcc_1.8V_pda */
1052 .dcm = EXYNOS4_GPL0(1), /* CURR_ADJ */
1053
1054 .dc_valid = true,
1055 .usb_valid = false, /* USB is not wired to MAX8903 */
1056};
1057
1058static struct platform_device nuri_max8903_device = {
1059 .name = "max8903-charger",
1060 .dev = {
1061 .platform_data = &nuri_max8903,
1062 },
1063};
1064
1065static void __init nuri_power_init(void)
1066{
1067 int gpio;
1068 int ta_en = 0;
1069
1070 gpio = EXYNOS4_GPX0(7);
1071 gpio_request(gpio, "AP_PMIC_IRQ");
1072 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
1073 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
1074
1075 gpio = EXYNOS4_GPX2(3);
1076 gpio_request(gpio, "FUEL_ALERT");
1077 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
1078 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
1079
1080 gpio = nuri_max8903.dok;
1081 gpio_request(gpio, "TA_nCONNECTED");
1082 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
1083 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
1084 ta_en = gpio_get_value(gpio) ? 0 : 1;
1085
1086 gpio = nuri_max8903.chg;
1087 gpio_request(gpio, "TA_nCHG");
1088 gpio_direction_input(gpio);
1089
1090 gpio = nuri_max8903.dcm;
1091 gpio_request(gpio, "CURR_ADJ");
1092 gpio_direction_output(gpio, ta_en);
1093}
1094
1095/* USB EHCI */
1096static struct s5p_ehci_platdata nuri_ehci_pdata;
1097
1098static void __init nuri_ehci_init(void)
1099{
1100 struct s5p_ehci_platdata *pdata = &nuri_ehci_pdata;
1101
1102 s5p_ehci_set_platdata(pdata);
1103}
1104
1105/* USB OTG */
1106static struct s3c_hsotg_plat nuri_hsotg_pdata;
1107
1108/* CAMERA */
1109static struct regulator_consumer_supply cam_vt_cam15_supply =
1110 REGULATOR_SUPPLY("vdd_core", "6-003c");
1111
1112static struct regulator_init_data cam_vt_cam15_reg_init_data = {
1113 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
1114 .num_consumer_supplies = 1,
1115 .consumer_supplies = &cam_vt_cam15_supply,
1116};
1117
1118static struct fixed_voltage_config cam_vt_cam15_fixed_voltage_cfg = {
1119 .supply_name = "VT_CAM_1.5V",
1120 .microvolts = 1500000,
1121 .gpio = EXYNOS4_GPE2(2), /* VT_CAM_1.5V_EN */
1122 .enable_high = 1,
1123 .init_data = &cam_vt_cam15_reg_init_data,
1124};
1125
1126static struct platform_device cam_vt_cam15_fixed_rdev = {
1127 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_15V,
1128 .dev = { .platform_data = &cam_vt_cam15_fixed_voltage_cfg },
1129};
1130
1131static struct regulator_consumer_supply cam_vdda_supply[] = {
1132 REGULATOR_SUPPLY("vdda", "6-003c"),
1133 REGULATOR_SUPPLY("a_sensor", "0-001f"),
1134};
1135
1136static struct regulator_init_data cam_vdda_reg_init_data = {
1137 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
1138 .num_consumer_supplies = ARRAY_SIZE(cam_vdda_supply),
1139 .consumer_supplies = cam_vdda_supply,
1140};
1141
1142static struct fixed_voltage_config cam_vdda_fixed_voltage_cfg = {
1143 .supply_name = "CAM_IO_EN",
1144 .microvolts = 2800000,
1145 .gpio = EXYNOS4_GPE2(1), /* CAM_IO_EN */
1146 .enable_high = 1,
1147 .init_data = &cam_vdda_reg_init_data,
1148};
1149
1150static struct platform_device cam_vdda_fixed_rdev = {
1151 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_A28V,
1152 .dev = { .platform_data = &cam_vdda_fixed_voltage_cfg },
1153};
1154
1155static struct regulator_consumer_supply camera_8m_12v_supply =
1156 REGULATOR_SUPPLY("dig_12", "0-001f");
1157
1158static struct regulator_init_data cam_8m_12v_reg_init_data = {
1159 .num_consumer_supplies = 1,
1160 .consumer_supplies = &camera_8m_12v_supply,
1161 .constraints = {
1162 .valid_ops_mask = REGULATOR_CHANGE_STATUS
1163 },
1164};
1165
1166static struct fixed_voltage_config cam_8m_12v_fixed_voltage_cfg = {
1167 .supply_name = "8M_1.2V",
1168 .microvolts = 1200000,
1169 .gpio = EXYNOS4_GPE2(5), /* 8M_1.2V_EN */
1170 .enable_high = 1,
1171 .init_data = &cam_8m_12v_reg_init_data,
1172};
1173
1174static struct platform_device cam_8m_12v_fixed_rdev = {
1175 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_12V,
1176 .dev = { .platform_data = &cam_8m_12v_fixed_voltage_cfg },
1177};
1178
1179static struct s5p_platform_mipi_csis mipi_csis_platdata = {
1180 .clk_rate = 166000000UL,
1181 .lanes = 2,
1182 .hs_settle = 12,
1183};
1184
1185#define GPIO_CAM_MEGA_RST EXYNOS4_GPY3(7) /* ISP_RESET */
1186#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPL2(5)
1187#define GPIO_CAM_VT_NSTBY EXYNOS4_GPL2(0)
1188#define GPIO_CAM_VT_NRST EXYNOS4_GPL2(1)
1189
1190static struct s5k6aa_platform_data s5k6aa_pldata = {
1191 .mclk_frequency = 24000000UL,
1192 .gpio_reset = { GPIO_CAM_VT_NRST, 0 },
1193 .gpio_stby = { GPIO_CAM_VT_NSTBY, 0 },
1194 .bus_type = V4L2_MBUS_PARALLEL,
1195 .horiz_flip = 1,
1196};
1197
1198static struct i2c_board_info s5k6aa_board_info = {
1199 I2C_BOARD_INFO("S5K6AA", 0x3c),
1200 .platform_data = &s5k6aa_pldata,
1201};
1202
1203static struct m5mols_platform_data m5mols_platdata = {
1204 .gpio_reset = GPIO_CAM_MEGA_RST,
1205};
1206
1207static struct i2c_board_info m5mols_board_info = {
1208 I2C_BOARD_INFO("M5MOLS", 0x1F),
1209 .platform_data = &m5mols_platdata,
1210};
1211
1212static struct fimc_source_info nuri_camera_sensors[] = {
1213 {
1214 .flags = V4L2_MBUS_PCLK_SAMPLE_RISING |
1215 V4L2_MBUS_VSYNC_ACTIVE_LOW,
1216 .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
1217 .board_info = &s5k6aa_board_info,
1218 .clk_frequency = 24000000UL,
1219 .i2c_bus_num = 6,
1220 }, {
1221 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
1222 V4L2_MBUS_VSYNC_ACTIVE_LOW,
1223 .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2,
1224 .board_info = &m5mols_board_info,
1225 .clk_frequency = 24000000UL,
1226 },
1227};
1228
1229static struct s5p_platform_fimc fimc_md_platdata = {
1230 .source_info = nuri_camera_sensors,
1231 .num_clients = ARRAY_SIZE(nuri_camera_sensors),
1232};
1233
1234static struct gpio nuri_camera_gpios[] = {
1235 { GPIO_CAM_VT_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
1236 { GPIO_CAM_VT_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
1237 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
1238 { GPIO_CAM_MEGA_RST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
1239};
1240
1241static void __init nuri_camera_init(void)
1242{
1243 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1244 &s5p_device_mipi_csis0);
1245 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1246 &s5p_device_fimc_md);
1247
1248 if (gpio_request_array(nuri_camera_gpios,
1249 ARRAY_SIZE(nuri_camera_gpios))) {
1250 pr_err("%s: GPIO request failed\n", __func__);
1251 return;
1252 }
1253
1254 m5mols_board_info.irq = s5p_register_gpio_interrupt(GPIO_CAM_8M_ISP_INT);
1255 if (m5mols_board_info.irq >= 0)
1256 s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xF));
1257 else
1258 pr_err("%s: Failed to configure 8M_ISP_INT GPIO\n", __func__);
1259
1260 /* Free GPIOs controlled directly by the sensor drivers. */
1261 gpio_free(GPIO_CAM_VT_NRST);
1262 gpio_free(GPIO_CAM_VT_NSTBY);
1263 gpio_free(GPIO_CAM_MEGA_RST);
1264
1265 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A)) {
1266 pr_err("%s: Camera port A setup failed\n", __func__);
1267 return;
1268 }
1269 /* Increase drive strength of the sensor clock output */
1270 s5p_gpio_set_drvstr(EXYNOS4_GPJ1(3), S5P_GPIO_DRVSTR_LV4);
1271}
1272
1273static struct s3c2410_platform_i2c nuri_i2c6_platdata __initdata = {
1274 .frequency = 400000U,
1275 .sda_delay = 200,
1276 .bus_num = 6,
1277};
1278
1279static struct s3c2410_platform_i2c nuri_i2c0_platdata __initdata = {
1280 .frequency = 400000U,
1281 .sda_delay = 200,
1282};
1283
1284/* DEVFREQ controlling memory/bus */
1285static struct platform_device exynos4_bus_devfreq = {
1286 .name = "exynos4210-busfreq",
1287};
1288
1289static struct platform_device *nuri_devices[] __initdata = {
1290 /* Samsung Platform Devices */
1291 &s3c_device_i2c5, /* PMIC should initialize first */
1292 &s3c_device_i2c0,
1293 &s3c_device_i2c6,
1294 &emmc_fixed_voltage,
1295 &s5p_device_mipi_csis0,
1296 &s5p_device_fimc0,
1297 &s5p_device_fimc1,
1298 &s5p_device_fimc2,
1299 &s5p_device_fimc3,
1300 &s5p_device_fimd0,
1301 &s3c_device_hsmmc0,
1302 &s3c_device_hsmmc2,
1303 &s3c_device_hsmmc3,
1304 &s3c_device_wdt,
1305 &s3c_device_timer[0],
1306 &s5p_device_ehci,
1307 &s3c_device_i2c3,
1308 &i2c9_gpio,
1309 &s3c_device_adc,
1310 &s5p_device_g2d,
1311 &s5p_device_jpeg,
1312 &s3c_device_rtc,
1313 &s5p_device_mfc,
1314 &s5p_device_mfc_l,
1315 &s5p_device_mfc_r,
1316 &s5p_device_fimc_md,
1317 &s3c_device_usb_hsotg,
1318
1319 /* NURI Devices */
1320 &nuri_gpio_keys,
1321 &nuri_lcd_device,
1322 &nuri_backlight_device,
1323 &max8903_fixed_reg_dev,
1324 &nuri_max8903_device,
1325 &cam_vt_cam15_fixed_rdev,
1326 &cam_vdda_fixed_rdev,
1327 &cam_8m_12v_fixed_rdev,
1328 &exynos4_bus_devfreq,
1329};
1330
1331static void __init nuri_map_io(void)
1332{
1333 exynos_init_io(NULL, 0);
1334 s3c24xx_init_uarts(nuri_uartcfgs, ARRAY_SIZE(nuri_uartcfgs));
1335 xxti_f = 0;
1336 xusbxti_f = 24000000;
1337}
1338
1339static void __init nuri_reserve(void)
1340{
1341 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1342}
1343
1344static void __init nuri_machine_init(void)
1345{
1346 nuri_sdhci_init();
1347 nuri_tsp_init();
1348 nuri_power_init();
1349
1350 s3c_i2c0_set_platdata(&nuri_i2c0_platdata);
1351 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1352 s3c_i2c3_set_platdata(&i2c3_data);
1353 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1354 s3c_i2c5_set_platdata(NULL);
1355 i2c5_devs[I2C5_MAX8997].irq = gpio_to_irq(EXYNOS4_GPX0(7));
1356 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1357 i2c9_devs[I2C9_MAX17042].irq = gpio_to_irq(EXYNOS4_GPX2(3));
1358 i2c_register_board_info(9, i2c9_devs, ARRAY_SIZE(i2c9_devs));
1359 s3c_i2c6_set_platdata(&nuri_i2c6_platdata);
1360
1361#ifdef CONFIG_DRM_EXYNOS
1362 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
1363 exynos4_fimd0_gpio_setup_24bpp();
1364#else
1365 s5p_fimd0_set_platdata(&nuri_fb_pdata);
1366#endif
1367
1368 nuri_camera_init();
1369
1370 nuri_ehci_init();
1371 s3c_hsotg_set_platdata(&nuri_hsotg_pdata);
1372
1373 /* Last */
1374 platform_add_devices(nuri_devices, ARRAY_SIZE(nuri_devices));
1375}
1376
1377MACHINE_START(NURI, "NURI")
1378 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1379 .atag_offset = 0x100,
1380 .smp = smp_ops(exynos_smp_ops),
1381 .init_irq = exynos4_init_irq,
1382 .map_io = nuri_map_io,
1383 .init_machine = nuri_machine_init,
1384 .init_late = exynos_init_late,
1385 .init_time = exynos_init_time,
1386 .reserve = &nuri_reserve,
1387 .restart = exynos4_restart,
1388MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
deleted file mode 100644
index 27f03ed5d067..000000000000
--- a/arch/arm/mach-exynos/mach-origen.c
+++ /dev/null
@@ -1,823 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/leds.h>
13#include <linux/gpio.h>
14#include <linux/mmc/host.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/input.h>
18#include <linux/pwm.h>
19#include <linux/pwm_backlight.h>
20#include <linux/gpio_keys.h>
21#include <linux/i2c.h>
22#include <linux/regulator/machine.h>
23#include <linux/mfd/max8997.h>
24#include <linux/lcd.h>
25#include <linux/rfkill-gpio.h>
26#include <linux/platform_data/i2c-s3c2410.h>
27#include <linux/platform_data/s3c-hsotg.h>
28#include <linux/platform_data/usb-ehci-s5p.h>
29#include <linux/platform_data/usb-ohci-exynos.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach-types.h>
33
34#include <video/platform_lcd.h>
35#include <video/samsung_fimd.h>
36
37#include <plat/regs-serial.h>
38#include <plat/cpu.h>
39#include <plat/devs.h>
40#include <plat/sdhci.h>
41#include <plat/clock.h>
42#include <plat/gpio-cfg.h>
43#include <plat/backlight.h>
44#include <plat/fb.h>
45#include <plat/mfc.h>
46#include <plat/hdmi.h>
47
48#include <mach/map.h>
49#include <mach/irqs.h>
50
51#include <drm/exynos_drm.h>
52#include "common.h"
53
54/* Following are default values for UCON, ULCON and UFCON UART registers */
55#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
56 S3C2410_UCON_RXILEVEL | \
57 S3C2410_UCON_TXIRQMODE | \
58 S3C2410_UCON_RXIRQMODE | \
59 S3C2410_UCON_RXFIFO_TOI | \
60 S3C2443_UCON_RXERR_IRQEN)
61
62#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
63
64#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
65 S5PV210_UFCON_TXTRIG4 | \
66 S5PV210_UFCON_RXTRIG4)
67
68static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
69 [0] = {
70 .hwport = 0,
71 .flags = 0,
72 .ucon = ORIGEN_UCON_DEFAULT,
73 .ulcon = ORIGEN_ULCON_DEFAULT,
74 .ufcon = ORIGEN_UFCON_DEFAULT,
75 },
76 [1] = {
77 .hwport = 1,
78 .flags = 0,
79 .ucon = ORIGEN_UCON_DEFAULT,
80 .ulcon = ORIGEN_ULCON_DEFAULT,
81 .ufcon = ORIGEN_UFCON_DEFAULT,
82 },
83 [2] = {
84 .hwport = 2,
85 .flags = 0,
86 .ucon = ORIGEN_UCON_DEFAULT,
87 .ulcon = ORIGEN_ULCON_DEFAULT,
88 .ufcon = ORIGEN_UFCON_DEFAULT,
89 },
90 [3] = {
91 .hwport = 3,
92 .flags = 0,
93 .ucon = ORIGEN_UCON_DEFAULT,
94 .ulcon = ORIGEN_ULCON_DEFAULT,
95 .ufcon = ORIGEN_UFCON_DEFAULT,
96 },
97};
98
99static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
100 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"), /* MIPI */
101 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
102 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
103 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"), /* OTG */
104};
105static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
106 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"), /* MIPI */
107};
108static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
109 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
110};
111static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
112 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
113 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
114 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"), /* OTG */
115};
116static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
117 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
118};
119static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
120 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
121};
122static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
123 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
124};
125static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
126 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
127};
128static struct regulator_consumer_supply __initdata buck1_consumer[] = {
129 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
130};
131static struct regulator_consumer_supply __initdata buck2_consumer[] = {
132 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
133};
134static struct regulator_consumer_supply __initdata buck3_consumer[] = {
135 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
136};
137static struct regulator_consumer_supply __initdata buck7_consumer[] = {
138 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
139};
140
141static struct regulator_init_data __initdata max8997_ldo1_data = {
142 .constraints = {
143 .name = "VDD_ABB_3.3V",
144 .min_uV = 3300000,
145 .max_uV = 3300000,
146 .apply_uV = 1,
147 .state_mem = {
148 .disabled = 1,
149 },
150 },
151};
152
153static struct regulator_init_data __initdata max8997_ldo2_data = {
154 .constraints = {
155 .name = "VDD_ALIVE_1.1V",
156 .min_uV = 1100000,
157 .max_uV = 1100000,
158 .apply_uV = 1,
159 .always_on = 1,
160 .state_mem = {
161 .enabled = 1,
162 },
163 },
164};
165
166static struct regulator_init_data __initdata max8997_ldo3_data = {
167 .constraints = {
168 .name = "VMIPI_1.1V",
169 .min_uV = 1100000,
170 .max_uV = 1100000,
171 .apply_uV = 1,
172 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
173 .state_mem = {
174 .disabled = 1,
175 },
176 },
177 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
178 .consumer_supplies = ldo3_consumer,
179};
180
181static struct regulator_init_data __initdata max8997_ldo4_data = {
182 .constraints = {
183 .name = "VDD_RTC_1.8V",
184 .min_uV = 1800000,
185 .max_uV = 1800000,
186 .apply_uV = 1,
187 .always_on = 1,
188 .state_mem = {
189 .disabled = 1,
190 },
191 },
192};
193
194static struct regulator_init_data __initdata max8997_ldo6_data = {
195 .constraints = {
196 .name = "VMIPI_1.8V",
197 .min_uV = 1800000,
198 .max_uV = 1800000,
199 .apply_uV = 1,
200 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
201 .state_mem = {
202 .disabled = 1,
203 },
204 },
205 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
206 .consumer_supplies = ldo6_consumer,
207};
208
209static struct regulator_init_data __initdata max8997_ldo7_data = {
210 .constraints = {
211 .name = "VDD_AUD_1.8V",
212 .min_uV = 1800000,
213 .max_uV = 1800000,
214 .apply_uV = 1,
215 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
216 .state_mem = {
217 .disabled = 1,
218 },
219 },
220 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
221 .consumer_supplies = ldo7_consumer,
222};
223
224static struct regulator_init_data __initdata max8997_ldo8_data = {
225 .constraints = {
226 .name = "VADC_3.3V",
227 .min_uV = 3300000,
228 .max_uV = 3300000,
229 .apply_uV = 1,
230 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
231 .state_mem = {
232 .disabled = 1,
233 },
234 },
235 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
236 .consumer_supplies = ldo8_consumer,
237};
238
239static struct regulator_init_data __initdata max8997_ldo9_data = {
240 .constraints = {
241 .name = "DVDD_SWB_2.8V",
242 .min_uV = 2800000,
243 .max_uV = 2800000,
244 .apply_uV = 1,
245 .always_on = 1,
246 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
247 .state_mem = {
248 .disabled = 1,
249 },
250 },
251 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
252 .consumer_supplies = ldo9_consumer,
253};
254
255static struct regulator_init_data __initdata max8997_ldo10_data = {
256 .constraints = {
257 .name = "VDD_PLL_1.1V",
258 .min_uV = 1100000,
259 .max_uV = 1100000,
260 .apply_uV = 1,
261 .always_on = 1,
262 .state_mem = {
263 .disabled = 1,
264 },
265 },
266};
267
268static struct regulator_init_data __initdata max8997_ldo11_data = {
269 .constraints = {
270 .name = "VDD_AUD_3V",
271 .min_uV = 3000000,
272 .max_uV = 3000000,
273 .apply_uV = 1,
274 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
275 .state_mem = {
276 .disabled = 1,
277 },
278 },
279 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
280 .consumer_supplies = ldo11_consumer,
281};
282
283static struct regulator_init_data __initdata max8997_ldo14_data = {
284 .constraints = {
285 .name = "AVDD18_SWB_1.8V",
286 .min_uV = 1800000,
287 .max_uV = 1800000,
288 .apply_uV = 1,
289 .always_on = 1,
290 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
291 .state_mem = {
292 .disabled = 1,
293 },
294 },
295 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
296 .consumer_supplies = ldo14_consumer,
297};
298
299static struct regulator_init_data __initdata max8997_ldo17_data = {
300 .constraints = {
301 .name = "VDD_SWB_3.3V",
302 .min_uV = 3300000,
303 .max_uV = 3300000,
304 .apply_uV = 1,
305 .always_on = 1,
306 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
307 .state_mem = {
308 .disabled = 1,
309 },
310 },
311 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
312 .consumer_supplies = ldo17_consumer,
313};
314
315static struct regulator_init_data __initdata max8997_ldo21_data = {
316 .constraints = {
317 .name = "VDD_MIF_1.2V",
318 .min_uV = 1200000,
319 .max_uV = 1200000,
320 .apply_uV = 1,
321 .always_on = 1,
322 .state_mem = {
323 .disabled = 1,
324 },
325 },
326};
327
328static struct regulator_init_data __initdata max8997_buck1_data = {
329 .constraints = {
330 .name = "VDD_ARM_1.2V",
331 .min_uV = 950000,
332 .max_uV = 1350000,
333 .always_on = 1,
334 .boot_on = 1,
335 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
336 .state_mem = {
337 .disabled = 1,
338 },
339 },
340 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
341 .consumer_supplies = buck1_consumer,
342};
343
344static struct regulator_init_data __initdata max8997_buck2_data = {
345 .constraints = {
346 .name = "VDD_INT_1.1V",
347 .min_uV = 900000,
348 .max_uV = 1100000,
349 .always_on = 1,
350 .boot_on = 1,
351 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
352 .state_mem = {
353 .disabled = 1,
354 },
355 },
356 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
357 .consumer_supplies = buck2_consumer,
358};
359
360static struct regulator_init_data __initdata max8997_buck3_data = {
361 .constraints = {
362 .name = "VDD_G3D_1.1V",
363 .min_uV = 900000,
364 .max_uV = 1100000,
365 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
366 REGULATOR_CHANGE_STATUS,
367 .state_mem = {
368 .disabled = 1,
369 },
370 },
371 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
372 .consumer_supplies = buck3_consumer,
373};
374
375static struct regulator_init_data __initdata max8997_buck5_data = {
376 .constraints = {
377 .name = "VDDQ_M1M2_1.2V",
378 .min_uV = 1200000,
379 .max_uV = 1200000,
380 .apply_uV = 1,
381 .always_on = 1,
382 .state_mem = {
383 .disabled = 1,
384 },
385 },
386};
387
388static struct regulator_init_data __initdata max8997_buck7_data = {
389 .constraints = {
390 .name = "VDD_LCD_3.3V",
391 .min_uV = 3300000,
392 .max_uV = 3300000,
393 .boot_on = 1,
394 .apply_uV = 1,
395 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
396 .state_mem = {
397 .disabled = 1
398 },
399 },
400 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
401 .consumer_supplies = buck7_consumer,
402};
403
404static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
405 { MAX8997_LDO1, &max8997_ldo1_data },
406 { MAX8997_LDO2, &max8997_ldo2_data },
407 { MAX8997_LDO3, &max8997_ldo3_data },
408 { MAX8997_LDO4, &max8997_ldo4_data },
409 { MAX8997_LDO6, &max8997_ldo6_data },
410 { MAX8997_LDO7, &max8997_ldo7_data },
411 { MAX8997_LDO8, &max8997_ldo8_data },
412 { MAX8997_LDO9, &max8997_ldo9_data },
413 { MAX8997_LDO10, &max8997_ldo10_data },
414 { MAX8997_LDO11, &max8997_ldo11_data },
415 { MAX8997_LDO14, &max8997_ldo14_data },
416 { MAX8997_LDO17, &max8997_ldo17_data },
417 { MAX8997_LDO21, &max8997_ldo21_data },
418 { MAX8997_BUCK1, &max8997_buck1_data },
419 { MAX8997_BUCK2, &max8997_buck2_data },
420 { MAX8997_BUCK3, &max8997_buck3_data },
421 { MAX8997_BUCK5, &max8997_buck5_data },
422 { MAX8997_BUCK7, &max8997_buck7_data },
423};
424
425static struct max8997_platform_data __initdata origen_max8997_pdata = {
426 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
427 .regulators = origen_max8997_regulators,
428
429 .wakeup = true,
430 .buck1_gpiodvs = false,
431 .buck2_gpiodvs = false,
432 .buck5_gpiodvs = false,
433
434 .ignore_gpiodvs_side_effect = true,
435 .buck125_default_idx = 0x0,
436
437 .buck125_gpios[0] = EXYNOS4_GPX0(0),
438 .buck125_gpios[1] = EXYNOS4_GPX0(1),
439 .buck125_gpios[2] = EXYNOS4_GPX0(2),
440
441 .buck1_voltage[0] = 1350000,
442 .buck1_voltage[1] = 1300000,
443 .buck1_voltage[2] = 1250000,
444 .buck1_voltage[3] = 1200000,
445 .buck1_voltage[4] = 1150000,
446 .buck1_voltage[5] = 1100000,
447 .buck1_voltage[6] = 1000000,
448 .buck1_voltage[7] = 950000,
449
450 .buck2_voltage[0] = 1100000,
451 .buck2_voltage[1] = 1100000,
452 .buck2_voltage[2] = 1100000,
453 .buck2_voltage[3] = 1100000,
454 .buck2_voltage[4] = 1000000,
455 .buck2_voltage[5] = 1000000,
456 .buck2_voltage[6] = 1000000,
457 .buck2_voltage[7] = 1000000,
458
459 .buck5_voltage[0] = 1200000,
460 .buck5_voltage[1] = 1200000,
461 .buck5_voltage[2] = 1200000,
462 .buck5_voltage[3] = 1200000,
463 .buck5_voltage[4] = 1200000,
464 .buck5_voltage[5] = 1200000,
465 .buck5_voltage[6] = 1200000,
466 .buck5_voltage[7] = 1200000,
467};
468
469/* I2C0 */
470static struct i2c_board_info i2c0_devs[] __initdata = {
471 {
472 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
473 .platform_data = &origen_max8997_pdata,
474 .irq = IRQ_EINT(4),
475 },
476};
477
478static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
479 .cd_type = S3C_SDHCI_CD_INTERNAL,
480};
481
482static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
483 .cd_type = S3C_SDHCI_CD_INTERNAL,
484};
485
486/* USB EHCI */
487static struct s5p_ehci_platdata origen_ehci_pdata;
488
489static void __init origen_ehci_init(void)
490{
491 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
492
493 s5p_ehci_set_platdata(pdata);
494}
495
496/* USB OHCI */
497static struct exynos4_ohci_platdata origen_ohci_pdata;
498
499static void __init origen_ohci_init(void)
500{
501 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
502
503 exynos4_ohci_set_platdata(pdata);
504}
505
506/* USB OTG */
507static struct s3c_hsotg_plat origen_hsotg_pdata;
508
509static struct gpio_led origen_gpio_leds[] = {
510 {
511 .name = "origen::status1",
512 .default_trigger = "heartbeat",
513 .gpio = EXYNOS4_GPX1(3),
514 .active_low = 1,
515 },
516 {
517 .name = "origen::status2",
518 .default_trigger = "mmc0",
519 .gpio = EXYNOS4_GPX1(4),
520 .active_low = 1,
521 },
522};
523
524static struct gpio_led_platform_data origen_gpio_led_info = {
525 .leds = origen_gpio_leds,
526 .num_leds = ARRAY_SIZE(origen_gpio_leds),
527};
528
529static struct platform_device origen_leds_gpio = {
530 .name = "leds-gpio",
531 .id = -1,
532 .dev = {
533 .platform_data = &origen_gpio_led_info,
534 },
535};
536
537static struct gpio_keys_button origen_gpio_keys_table[] = {
538 {
539 .code = KEY_MENU,
540 .gpio = EXYNOS4_GPX1(5),
541 .desc = "gpio-keys: KEY_MENU",
542 .type = EV_KEY,
543 .active_low = 1,
544 .wakeup = 1,
545 .debounce_interval = 1,
546 }, {
547 .code = KEY_HOME,
548 .gpio = EXYNOS4_GPX1(6),
549 .desc = "gpio-keys: KEY_HOME",
550 .type = EV_KEY,
551 .active_low = 1,
552 .wakeup = 1,
553 .debounce_interval = 1,
554 }, {
555 .code = KEY_BACK,
556 .gpio = EXYNOS4_GPX1(7),
557 .desc = "gpio-keys: KEY_BACK",
558 .type = EV_KEY,
559 .active_low = 1,
560 .wakeup = 1,
561 .debounce_interval = 1,
562 }, {
563 .code = KEY_UP,
564 .gpio = EXYNOS4_GPX2(0),
565 .desc = "gpio-keys: KEY_UP",
566 .type = EV_KEY,
567 .active_low = 1,
568 .wakeup = 1,
569 .debounce_interval = 1,
570 }, {
571 .code = KEY_DOWN,
572 .gpio = EXYNOS4_GPX2(1),
573 .desc = "gpio-keys: KEY_DOWN",
574 .type = EV_KEY,
575 .active_low = 1,
576 .wakeup = 1,
577 .debounce_interval = 1,
578 },
579};
580
581static struct gpio_keys_platform_data origen_gpio_keys_data = {
582 .buttons = origen_gpio_keys_table,
583 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
584};
585
586static struct platform_device origen_device_gpiokeys = {
587 .name = "gpio-keys",
588 .dev = {
589 .platform_data = &origen_gpio_keys_data,
590 },
591};
592
593static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
594{
595 int ret;
596
597 if (power)
598 ret = gpio_request_one(EXYNOS4_GPE3(4),
599 GPIOF_OUT_INIT_HIGH, "GPE3_4");
600 else
601 ret = gpio_request_one(EXYNOS4_GPE3(4),
602 GPIOF_OUT_INIT_LOW, "GPE3_4");
603
604 gpio_free(EXYNOS4_GPE3(4));
605
606 if (ret)
607 pr_err("failed to request gpio for LCD power: %d\n", ret);
608}
609
610static struct plat_lcd_data origen_lcd_hv070wsa_data = {
611 .set_power = lcd_hv070wsa_set_power,
612};
613
614static struct platform_device origen_lcd_hv070wsa = {
615 .name = "platform-lcd",
616 .dev.parent = &s5p_device_fimd0.dev,
617 .dev.platform_data = &origen_lcd_hv070wsa_data,
618};
619
620static struct pwm_lookup origen_pwm_lookup[] = {
621 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
622};
623
624#ifdef CONFIG_DRM_EXYNOS_FIMD
625static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
626 .panel = {
627 .timing = {
628 .left_margin = 64,
629 .right_margin = 16,
630 .upper_margin = 64,
631 .lower_margin = 16,
632 .hsync_len = 48,
633 .vsync_len = 3,
634 .xres = 1024,
635 .yres = 600,
636 },
637 },
638 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
639 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
640 VIDCON1_INV_VCLK,
641 .default_win = 0,
642 .bpp = 32,
643};
644#else
645static struct s3c_fb_pd_win origen_fb_win0 = {
646 .xres = 1024,
647 .yres = 600,
648 .max_bpp = 32,
649 .default_bpp = 24,
650 .virtual_x = 1024,
651 .virtual_y = 2 * 600,
652};
653
654static struct fb_videomode origen_lcd_timing = {
655 .left_margin = 64,
656 .right_margin = 16,
657 .upper_margin = 64,
658 .lower_margin = 16,
659 .hsync_len = 48,
660 .vsync_len = 3,
661 .xres = 1024,
662 .yres = 600,
663};
664
665static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
666 .win[0] = &origen_fb_win0,
667 .vtiming = &origen_lcd_timing,
668 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
669 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
670 VIDCON1_INV_VCLK,
671 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
672};
673#endif
674
675/* Bluetooth rfkill gpio platform data */
676static struct rfkill_gpio_platform_data origen_bt_pdata = {
677 .reset_gpio = EXYNOS4_GPX2(2),
678 .shutdown_gpio = -1,
679 .type = RFKILL_TYPE_BLUETOOTH,
680 .name = "origen-bt",
681};
682
683/* Bluetooth Platform device */
684static struct platform_device origen_device_bluetooth = {
685 .name = "rfkill_gpio",
686 .id = -1,
687 .dev = {
688 .platform_data = &origen_bt_pdata,
689 },
690};
691
692static struct platform_device *origen_devices[] __initdata = {
693 &s3c_device_hsmmc2,
694 &s3c_device_hsmmc0,
695 &s3c_device_i2c0,
696 &s3c_device_rtc,
697 &s3c_device_usb_hsotg,
698 &s3c_device_wdt,
699 &s5p_device_ehci,
700 &s5p_device_fimc0,
701 &s5p_device_fimc1,
702 &s5p_device_fimc2,
703 &s5p_device_fimc3,
704 &s5p_device_fimc_md,
705 &s5p_device_fimd0,
706 &s5p_device_g2d,
707 &s5p_device_hdmi,
708 &s5p_device_i2c_hdmiphy,
709 &s5p_device_jpeg,
710 &s5p_device_mfc,
711 &s5p_device_mfc_l,
712 &s5p_device_mfc_r,
713 &s5p_device_mixer,
714 &exynos4_device_ohci,
715 &origen_device_gpiokeys,
716 &origen_lcd_hv070wsa,
717 &origen_leds_gpio,
718 &origen_device_bluetooth,
719};
720
721/* LCD Backlight data */
722static struct samsung_bl_gpio_info origen_bl_gpio_info = {
723 .no = EXYNOS4_GPD0(0),
724 .func = S3C_GPIO_SFN(2),
725};
726
727static struct platform_pwm_backlight_data origen_bl_data = {
728 .pwm_id = 0,
729 .pwm_period_ns = 1000,
730};
731
732static void __init origen_bt_setup(void)
733{
734 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
735 /* 4 UART Pins configuration */
736 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
737 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
738 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
739 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
740}
741
742/* I2C module and id for HDMIPHY */
743static struct i2c_board_info hdmiphy_info = {
744 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
745};
746
747static void s5p_tv_setup(void)
748{
749 /* Direct HPD to HDMI chip */
750 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
751 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
752 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
753}
754
755static void __init origen_map_io(void)
756{
757 exynos_init_io(NULL, 0);
758 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
759 xxti_f = 0;
760 xusbxti_f = 24000000;
761}
762
763static void __init origen_power_init(void)
764{
765 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
766 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
767 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
768}
769
770static void __init origen_reserve(void)
771{
772 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
773}
774
775static void __init origen_machine_init(void)
776{
777 origen_power_init();
778
779 s3c_i2c0_set_platdata(NULL);
780 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
781
782 /*
783 * Since sdhci instance 2 can contain a bootable media,
784 * sdhci instance 0 is registered after instance 2.
785 */
786 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
787 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
788
789 origen_ehci_init();
790 origen_ohci_init();
791 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
792
793 s5p_tv_setup();
794 s5p_i2c_hdmiphy_set_platdata(NULL);
795 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
796
797#ifdef CONFIG_DRM_EXYNOS_FIMD
798 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
799 exynos4_fimd0_gpio_setup_24bpp();
800#else
801 s5p_fimd0_set_platdata(&origen_lcd_pdata);
802#endif
803
804 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
805
806 pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
807 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
808
809 origen_bt_setup();
810}
811
812MACHINE_START(ORIGEN, "ORIGEN")
813 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
814 .atag_offset = 0x100,
815 .smp = smp_ops(exynos_smp_ops),
816 .init_irq = exynos4_init_irq,
817 .map_io = origen_map_io,
818 .init_machine = origen_machine_init,
819 .init_late = exynos_init_late,
820 .init_time = exynos_init_time,
821 .reserve = &origen_reserve,
822 .restart = exynos4_restart,
823MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
deleted file mode 100644
index 2c8af9617920..000000000000
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ /dev/null
@@ -1,396 +0,0 @@
1/*
2 * linux/arch/arm/mach-exynos4/mach-smdk4x12.c
3 *
4 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/gpio.h>
13#include <linux/i2c.h>
14#include <linux/input.h>
15#include <linux/io.h>
16#include <linux/lcd.h>
17#include <linux/mfd/max8997.h>
18#include <linux/mmc/host.h>
19#include <linux/platform_device.h>
20#include <linux/pwm.h>
21#include <linux/pwm_backlight.h>
22#include <linux/regulator/machine.h>
23#include <linux/serial_core.h>
24#include <linux/platform_data/i2c-s3c2410.h>
25#include <linux/platform_data/s3c-hsotg.h>
26
27#include <asm/mach/arch.h>
28#include <asm/mach-types.h>
29
30#include <video/samsung_fimd.h>
31#include <plat/backlight.h>
32#include <plat/clock.h>
33#include <plat/cpu.h>
34#include <plat/devs.h>
35#include <plat/fb.h>
36#include <plat/gpio-cfg.h>
37#include <plat/keypad.h>
38#include <plat/mfc.h>
39#include <plat/regs-serial.h>
40#include <plat/sdhci.h>
41
42#include <mach/irqs.h>
43#include <mach/map.h>
44
45#include <drm/exynos_drm.h>
46#include "common.h"
47
48/* Following are default values for UCON, ULCON and UFCON UART registers */
49#define SMDK4X12_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
50 S3C2410_UCON_RXILEVEL | \
51 S3C2410_UCON_TXIRQMODE | \
52 S3C2410_UCON_RXIRQMODE | \
53 S3C2410_UCON_RXFIFO_TOI | \
54 S3C2443_UCON_RXERR_IRQEN)
55
56#define SMDK4X12_ULCON_DEFAULT S3C2410_LCON_CS8
57
58#define SMDK4X12_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
59 S5PV210_UFCON_TXTRIG4 | \
60 S5PV210_UFCON_RXTRIG4)
61
62static struct s3c2410_uartcfg smdk4x12_uartcfgs[] __initdata = {
63 [0] = {
64 .hwport = 0,
65 .flags = 0,
66 .ucon = SMDK4X12_UCON_DEFAULT,
67 .ulcon = SMDK4X12_ULCON_DEFAULT,
68 .ufcon = SMDK4X12_UFCON_DEFAULT,
69 },
70 [1] = {
71 .hwport = 1,
72 .flags = 0,
73 .ucon = SMDK4X12_UCON_DEFAULT,
74 .ulcon = SMDK4X12_ULCON_DEFAULT,
75 .ufcon = SMDK4X12_UFCON_DEFAULT,
76 },
77 [2] = {
78 .hwport = 2,
79 .flags = 0,
80 .ucon = SMDK4X12_UCON_DEFAULT,
81 .ulcon = SMDK4X12_ULCON_DEFAULT,
82 .ufcon = SMDK4X12_UFCON_DEFAULT,
83 },
84 [3] = {
85 .hwport = 3,
86 .flags = 0,
87 .ucon = SMDK4X12_UCON_DEFAULT,
88 .ulcon = SMDK4X12_ULCON_DEFAULT,
89 .ufcon = SMDK4X12_UFCON_DEFAULT,
90 },
91};
92
93static struct s3c_sdhci_platdata smdk4x12_hsmmc2_pdata __initdata = {
94 .cd_type = S3C_SDHCI_CD_INTERNAL,
95#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
96 .max_width = 8,
97 .host_caps = MMC_CAP_8_BIT_DATA,
98#endif
99};
100
101static struct s3c_sdhci_platdata smdk4x12_hsmmc3_pdata __initdata = {
102 .cd_type = S3C_SDHCI_CD_INTERNAL,
103};
104
105static struct regulator_consumer_supply max8997_buck1 =
106 REGULATOR_SUPPLY("vdd_arm", NULL);
107
108static struct regulator_consumer_supply max8997_buck2 =
109 REGULATOR_SUPPLY("vdd_int", NULL);
110
111static struct regulator_consumer_supply max8997_buck3 =
112 REGULATOR_SUPPLY("vdd_g3d", NULL);
113
114static struct regulator_init_data max8997_buck1_data = {
115 .constraints = {
116 .name = "VDD_ARM_SMDK4X12",
117 .min_uV = 925000,
118 .max_uV = 1350000,
119 .always_on = 1,
120 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
121 .state_mem = {
122 .disabled = 1,
123 },
124 },
125 .num_consumer_supplies = 1,
126 .consumer_supplies = &max8997_buck1,
127};
128
129static struct regulator_init_data max8997_buck2_data = {
130 .constraints = {
131 .name = "VDD_INT_SMDK4X12",
132 .min_uV = 950000,
133 .max_uV = 1150000,
134 .always_on = 1,
135 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
136 .state_mem = {
137 .disabled = 1,
138 },
139 },
140 .num_consumer_supplies = 1,
141 .consumer_supplies = &max8997_buck2,
142};
143
144static struct regulator_init_data max8997_buck3_data = {
145 .constraints = {
146 .name = "VDD_G3D_SMDK4X12",
147 .min_uV = 950000,
148 .max_uV = 1150000,
149 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
150 REGULATOR_CHANGE_STATUS,
151 .state_mem = {
152 .disabled = 1,
153 },
154 },
155 .num_consumer_supplies = 1,
156 .consumer_supplies = &max8997_buck3,
157};
158
159static struct max8997_regulator_data smdk4x12_max8997_regulators[] = {
160 { MAX8997_BUCK1, &max8997_buck1_data },
161 { MAX8997_BUCK2, &max8997_buck2_data },
162 { MAX8997_BUCK3, &max8997_buck3_data },
163};
164
165static struct max8997_platform_data smdk4x12_max8997_pdata = {
166 .num_regulators = ARRAY_SIZE(smdk4x12_max8997_regulators),
167 .regulators = smdk4x12_max8997_regulators,
168
169 .buck1_voltage[0] = 1100000, /* 1.1V */
170 .buck1_voltage[1] = 1100000, /* 1.1V */
171 .buck1_voltage[2] = 1100000, /* 1.1V */
172 .buck1_voltage[3] = 1100000, /* 1.1V */
173 .buck1_voltage[4] = 1100000, /* 1.1V */
174 .buck1_voltage[5] = 1100000, /* 1.1V */
175 .buck1_voltage[6] = 1000000, /* 1.0V */
176 .buck1_voltage[7] = 950000, /* 0.95V */
177
178 .buck2_voltage[0] = 1100000, /* 1.1V */
179 .buck2_voltage[1] = 1000000, /* 1.0V */
180 .buck2_voltage[2] = 950000, /* 0.95V */
181 .buck2_voltage[3] = 900000, /* 0.9V */
182 .buck2_voltage[4] = 1100000, /* 1.1V */
183 .buck2_voltage[5] = 1000000, /* 1.0V */
184 .buck2_voltage[6] = 950000, /* 0.95V */
185 .buck2_voltage[7] = 900000, /* 0.9V */
186
187 .buck5_voltage[0] = 1100000, /* 1.1V */
188 .buck5_voltage[1] = 1100000, /* 1.1V */
189 .buck5_voltage[2] = 1100000, /* 1.1V */
190 .buck5_voltage[3] = 1100000, /* 1.1V */
191 .buck5_voltage[4] = 1100000, /* 1.1V */
192 .buck5_voltage[5] = 1100000, /* 1.1V */
193 .buck5_voltage[6] = 1100000, /* 1.1V */
194 .buck5_voltage[7] = 1100000, /* 1.1V */
195};
196
197static struct i2c_board_info smdk4x12_i2c_devs0[] __initdata = {
198 {
199 I2C_BOARD_INFO("max8997", 0x66),
200 .platform_data = &smdk4x12_max8997_pdata,
201 }
202};
203
204static struct i2c_board_info smdk4x12_i2c_devs1[] __initdata = {
205 { I2C_BOARD_INFO("wm8994", 0x1a), }
206};
207
208static struct i2c_board_info smdk4x12_i2c_devs3[] __initdata = {
209 /* nothing here yet */
210};
211
212static struct i2c_board_info smdk4x12_i2c_devs7[] __initdata = {
213 /* nothing here yet */
214};
215
216static struct samsung_bl_gpio_info smdk4x12_bl_gpio_info = {
217 .no = EXYNOS4_GPD0(1),
218 .func = S3C_GPIO_SFN(2),
219};
220
221static struct platform_pwm_backlight_data smdk4x12_bl_data = {
222 .pwm_id = 1,
223 .pwm_period_ns = 1000,
224};
225
226static struct pwm_lookup smdk4x12_pwm_lookup[] = {
227 PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
228};
229
230static uint32_t smdk4x12_keymap[] __initdata = {
231 /* KEY(row, col, keycode) */
232 KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
233 KEY(1, 6, KEY_4), KEY(1, 7, KEY_5),
234 KEY(2, 5, KEY_D), KEY(2, 6, KEY_A), KEY(2, 7, KEY_B),
235 KEY(0, 7, KEY_E), KEY(0, 5, KEY_C)
236};
237
238static struct matrix_keymap_data smdk4x12_keymap_data __initdata = {
239 .keymap = smdk4x12_keymap,
240 .keymap_size = ARRAY_SIZE(smdk4x12_keymap),
241};
242
243static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
244 .keymap_data = &smdk4x12_keymap_data,
245 .rows = 3,
246 .cols = 8,
247};
248
249#ifdef CONFIG_DRM_EXYNOS_FIMD
250static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
251 .panel = {
252 .timing = {
253 .left_margin = 8,
254 .right_margin = 8,
255 .upper_margin = 6,
256 .lower_margin = 6,
257 .hsync_len = 6,
258 .vsync_len = 4,
259 .xres = 480,
260 .yres = 800,
261 },
262 },
263 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
264 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
265 .default_win = 0,
266 .bpp = 32,
267};
268#else
269static struct s3c_fb_pd_win smdk4x12_fb_win0 = {
270 .xres = 480,
271 .yres = 800,
272 .virtual_x = 480,
273 .virtual_y = 800 * 2,
274 .max_bpp = 32,
275 .default_bpp = 24,
276};
277
278static struct fb_videomode smdk4x12_lcd_timing = {
279 .left_margin = 8,
280 .right_margin = 8,
281 .upper_margin = 6,
282 .lower_margin = 6,
283 .hsync_len = 6,
284 .vsync_len = 4,
285 .xres = 480,
286 .yres = 800,
287};
288
289static struct s3c_fb_platdata smdk4x12_lcd_pdata __initdata = {
290 .win[0] = &smdk4x12_fb_win0,
291 .vtiming = &smdk4x12_lcd_timing,
292 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
293 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
294 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
295};
296#endif
297
298/* USB OTG */
299static struct s3c_hsotg_plat smdk4x12_hsotg_pdata;
300
301static struct platform_device *smdk4x12_devices[] __initdata = {
302 &s3c_device_hsmmc2,
303 &s3c_device_hsmmc3,
304 &s3c_device_i2c0,
305 &s3c_device_i2c1,
306 &s3c_device_i2c3,
307 &s3c_device_i2c7,
308 &s3c_device_rtc,
309 &s3c_device_usb_hsotg,
310 &s3c_device_wdt,
311 &s5p_device_fimc0,
312 &s5p_device_fimc1,
313 &s5p_device_fimc2,
314 &s5p_device_fimc3,
315 &s5p_device_fimc_md,
316 &s5p_device_fimd0,
317 &s5p_device_mfc,
318 &s5p_device_mfc_l,
319 &s5p_device_mfc_r,
320 &samsung_device_keypad,
321};
322
323static void __init smdk4x12_map_io(void)
324{
325 exynos_init_io(NULL, 0);
326 s3c24xx_init_uarts(smdk4x12_uartcfgs, ARRAY_SIZE(smdk4x12_uartcfgs));
327}
328
329static void __init smdk4x12_reserve(void)
330{
331 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
332}
333
334static void __init smdk4x12_machine_init(void)
335{
336 s3c_i2c0_set_platdata(NULL);
337 i2c_register_board_info(0, smdk4x12_i2c_devs0,
338 ARRAY_SIZE(smdk4x12_i2c_devs0));
339
340 s3c_i2c1_set_platdata(NULL);
341 i2c_register_board_info(1, smdk4x12_i2c_devs1,
342 ARRAY_SIZE(smdk4x12_i2c_devs1));
343
344 s3c_i2c3_set_platdata(NULL);
345 i2c_register_board_info(3, smdk4x12_i2c_devs3,
346 ARRAY_SIZE(smdk4x12_i2c_devs3));
347
348 s3c_i2c7_set_platdata(NULL);
349 i2c_register_board_info(7, smdk4x12_i2c_devs7,
350 ARRAY_SIZE(smdk4x12_i2c_devs7));
351
352 samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
353 pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup));
354
355 samsung_keypad_set_platdata(&smdk4x12_keypad_data);
356
357 s3c_sdhci2_set_platdata(&smdk4x12_hsmmc2_pdata);
358 s3c_sdhci3_set_platdata(&smdk4x12_hsmmc3_pdata);
359
360 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
361
362#ifdef CONFIG_DRM_EXYNOS_FIMD
363 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
364 exynos4_fimd0_gpio_setup_24bpp();
365#else
366 s5p_fimd0_set_platdata(&smdk4x12_lcd_pdata);
367#endif
368
369 platform_add_devices(smdk4x12_devices, ARRAY_SIZE(smdk4x12_devices));
370}
371
372MACHINE_START(SMDK4212, "SMDK4212")
373 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
374 .atag_offset = 0x100,
375 .smp = smp_ops(exynos_smp_ops),
376 .init_irq = exynos4_init_irq,
377 .map_io = smdk4x12_map_io,
378 .init_machine = smdk4x12_machine_init,
379 .init_time = exynos_init_time,
380 .restart = exynos4_restart,
381 .reserve = &smdk4x12_reserve,
382MACHINE_END
383
384MACHINE_START(SMDK4412, "SMDK4412")
385 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
386 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
387 .atag_offset = 0x100,
388 .smp = smp_ops(exynos_smp_ops),
389 .init_irq = exynos4_init_irq,
390 .map_io = smdk4x12_map_io,
391 .init_machine = smdk4x12_machine_init,
392 .init_late = exynos_init_late,
393 .init_time = exynos_init_time,
394 .restart = exynos4_restart,
395 .reserve = &smdk4x12_reserve,
396MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
deleted file mode 100644
index d95b8cf85253..000000000000
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ /dev/null
@@ -1,444 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/delay.h>
13#include <linux/gpio.h>
14#include <linux/lcd.h>
15#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
17#include <linux/smsc911x.h>
18#include <linux/io.h>
19#include <linux/i2c.h>
20#include <linux/input.h>
21#include <linux/pwm.h>
22#include <linux/pwm_backlight.h>
23#include <linux/platform_data/i2c-s3c2410.h>
24#include <linux/platform_data/s3c-hsotg.h>
25#include <linux/platform_data/usb-ehci-s5p.h>
26#include <linux/platform_data/usb-ohci-exynos.h>
27
28#include <asm/mach/arch.h>
29#include <asm/mach-types.h>
30
31#include <video/platform_lcd.h>
32#include <video/samsung_fimd.h>
33#include <plat/regs-serial.h>
34#include <plat/regs-srom.h>
35#include <plat/cpu.h>
36#include <plat/devs.h>
37#include <plat/fb.h>
38#include <plat/keypad.h>
39#include <plat/sdhci.h>
40#include <plat/gpio-cfg.h>
41#include <plat/backlight.h>
42#include <plat/mfc.h>
43#include <plat/clock.h>
44#include <plat/hdmi.h>
45
46#include <mach/irqs.h>
47#include <mach/map.h>
48
49#include <drm/exynos_drm.h>
50#include "common.h"
51
52/* Following are default values for UCON, ULCON and UFCON UART registers */
53#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
54 S3C2410_UCON_RXILEVEL | \
55 S3C2410_UCON_TXIRQMODE | \
56 S3C2410_UCON_RXIRQMODE | \
57 S3C2410_UCON_RXFIFO_TOI | \
58 S3C2443_UCON_RXERR_IRQEN)
59
60#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
61
62#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
63 S5PV210_UFCON_TXTRIG4 | \
64 S5PV210_UFCON_RXTRIG4)
65
66static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
67 [0] = {
68 .hwport = 0,
69 .flags = 0,
70 .ucon = SMDKV310_UCON_DEFAULT,
71 .ulcon = SMDKV310_ULCON_DEFAULT,
72 .ufcon = SMDKV310_UFCON_DEFAULT,
73 },
74 [1] = {
75 .hwport = 1,
76 .flags = 0,
77 .ucon = SMDKV310_UCON_DEFAULT,
78 .ulcon = SMDKV310_ULCON_DEFAULT,
79 .ufcon = SMDKV310_UFCON_DEFAULT,
80 },
81 [2] = {
82 .hwport = 2,
83 .flags = 0,
84 .ucon = SMDKV310_UCON_DEFAULT,
85 .ulcon = SMDKV310_ULCON_DEFAULT,
86 .ufcon = SMDKV310_UFCON_DEFAULT,
87 },
88 [3] = {
89 .hwport = 3,
90 .flags = 0,
91 .ucon = SMDKV310_UCON_DEFAULT,
92 .ulcon = SMDKV310_ULCON_DEFAULT,
93 .ufcon = SMDKV310_UFCON_DEFAULT,
94 },
95};
96
97static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
98 .cd_type = S3C_SDHCI_CD_INTERNAL,
99#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
100 .max_width = 8,
101 .host_caps = MMC_CAP_8_BIT_DATA,
102#endif
103};
104
105static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
106 .cd_type = S3C_SDHCI_CD_GPIO,
107 .ext_cd_gpio = EXYNOS4_GPK0(2),
108 .ext_cd_gpio_invert = 1,
109};
110
111static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
112 .cd_type = S3C_SDHCI_CD_INTERNAL,
113#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
114 .max_width = 8,
115 .host_caps = MMC_CAP_8_BIT_DATA,
116#endif
117};
118
119static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
120 .cd_type = S3C_SDHCI_CD_GPIO,
121 .ext_cd_gpio = EXYNOS4_GPK2(2),
122 .ext_cd_gpio_invert = 1,
123};
124
125static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
126 unsigned int power)
127{
128 if (power) {
129#if !defined(CONFIG_BACKLIGHT_PWM)
130 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
131 gpio_free(EXYNOS4_GPD0(1));
132#endif
133 /* fire nRESET on power up */
134 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
135 mdelay(100);
136
137 gpio_set_value(EXYNOS4_GPX0(6), 0);
138 mdelay(10);
139
140 gpio_set_value(EXYNOS4_GPX0(6), 1);
141 mdelay(10);
142
143 gpio_free(EXYNOS4_GPX0(6));
144 } else {
145#if !defined(CONFIG_BACKLIGHT_PWM)
146 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
147 gpio_free(EXYNOS4_GPD0(1));
148#endif
149 }
150}
151
152static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
153 .set_power = lcd_lte480wv_set_power,
154};
155
156static struct platform_device smdkv310_lcd_lte480wv = {
157 .name = "platform-lcd",
158 .dev.parent = &s5p_device_fimd0.dev,
159 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
160};
161
162#ifdef CONFIG_DRM_EXYNOS_FIMD
163static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
164 .panel = {
165 .timing = {
166 .left_margin = 13,
167 .right_margin = 8,
168 .upper_margin = 7,
169 .lower_margin = 5,
170 .hsync_len = 3,
171 .vsync_len = 1,
172 .xres = 800,
173 .yres = 480,
174 },
175 },
176 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
177 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
178 .default_win = 0,
179 .bpp = 32,
180};
181#else
182static struct s3c_fb_pd_win smdkv310_fb_win0 = {
183 .max_bpp = 32,
184 .default_bpp = 24,
185 .xres = 800,
186 .yres = 480,
187};
188
189static struct fb_videomode smdkv310_lcd_timing = {
190 .left_margin = 13,
191 .right_margin = 8,
192 .upper_margin = 7,
193 .lower_margin = 5,
194 .hsync_len = 3,
195 .vsync_len = 1,
196 .xres = 800,
197 .yres = 480,
198};
199
200static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
201 .win[0] = &smdkv310_fb_win0,
202 .vtiming = &smdkv310_lcd_timing,
203 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
204 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
205 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
206};
207#endif
208
209static struct resource smdkv310_smsc911x_resources[] = {
210 [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
211 [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
212 | IRQF_TRIGGER_LOW),
213};
214
215static struct smsc911x_platform_config smsc9215_config = {
216 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
217 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
218 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
219 .phy_interface = PHY_INTERFACE_MODE_MII,
220 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
221};
222
223static struct platform_device smdkv310_smsc911x = {
224 .name = "smsc911x",
225 .id = -1,
226 .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
227 .resource = smdkv310_smsc911x_resources,
228 .dev = {
229 .platform_data = &smsc9215_config,
230 },
231};
232
233static uint32_t smdkv310_keymap[] __initdata = {
234 /* KEY(row, col, keycode) */
235 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
236 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
237 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
238 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
239};
240
241static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
242 .keymap = smdkv310_keymap,
243 .keymap_size = ARRAY_SIZE(smdkv310_keymap),
244};
245
246static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
247 .keymap_data = &smdkv310_keymap_data,
248 .rows = 2,
249 .cols = 8,
250};
251
252static struct i2c_board_info i2c_devs1[] __initdata = {
253 {I2C_BOARD_INFO("wm8994", 0x1a),},
254};
255
256/* USB EHCI */
257static struct s5p_ehci_platdata smdkv310_ehci_pdata;
258
259static void __init smdkv310_ehci_init(void)
260{
261 struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
262
263 s5p_ehci_set_platdata(pdata);
264}
265
266/* USB OHCI */
267static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
268
269static void __init smdkv310_ohci_init(void)
270{
271 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
272
273 exynos4_ohci_set_platdata(pdata);
274}
275
276/* USB OTG */
277static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
278
279/* Audio device */
280static struct platform_device smdkv310_device_audio = {
281 .name = "smdk-audio",
282 .id = -1,
283};
284
285static struct platform_device *smdkv310_devices[] __initdata = {
286 &s3c_device_hsmmc0,
287 &s3c_device_hsmmc1,
288 &s3c_device_hsmmc2,
289 &s3c_device_hsmmc3,
290 &s3c_device_i2c1,
291 &s5p_device_i2c_hdmiphy,
292 &s3c_device_rtc,
293 &s3c_device_usb_hsotg,
294 &s3c_device_wdt,
295 &s5p_device_ehci,
296 &s5p_device_fimc0,
297 &s5p_device_fimc1,
298 &s5p_device_fimc2,
299 &s5p_device_fimc3,
300 &s5p_device_fimc_md,
301 &s5p_device_g2d,
302 &s5p_device_jpeg,
303 &exynos4_device_ac97,
304 &exynos4_device_i2s0,
305 &exynos4_device_ohci,
306 &samsung_device_keypad,
307 &s5p_device_mfc,
308 &s5p_device_mfc_l,
309 &s5p_device_mfc_r,
310 &exynos4_device_spdif,
311 &samsung_asoc_idma,
312 &s5p_device_fimd0,
313 &smdkv310_device_audio,
314 &smdkv310_lcd_lte480wv,
315 &smdkv310_smsc911x,
316 &exynos4_device_ahci,
317 &s5p_device_hdmi,
318 &s5p_device_mixer,
319};
320
321static void __init smdkv310_smsc911x_init(void)
322{
323 u32 cs1;
324
325 /* configure nCS1 width to 16 bits */
326 cs1 = __raw_readl(S5P_SROM_BW) &
327 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
328 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
329 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
330 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
331 S5P_SROM_BW__NCS1__SHIFT;
332 __raw_writel(cs1, S5P_SROM_BW);
333
334 /* set timing for nCS1 suitable for ethernet chip */
335 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
336 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
337 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
338 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
339 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
340 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
341 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
342}
343
344/* LCD Backlight data */
345static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
346 .no = EXYNOS4_GPD0(1),
347 .func = S3C_GPIO_SFN(2),
348};
349
350static struct platform_pwm_backlight_data smdkv310_bl_data = {
351 .pwm_id = 1,
352 .pwm_period_ns = 1000,
353};
354
355/* I2C module and id for HDMIPHY */
356static struct i2c_board_info hdmiphy_info = {
357 I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
358};
359
360static struct pwm_lookup smdkv310_pwm_lookup[] = {
361 PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
362};
363
364static void s5p_tv_setup(void)
365{
366 /* direct HPD to HDMI chip */
367 WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
368 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
369 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
370}
371
372static void __init smdkv310_map_io(void)
373{
374 exynos_init_io(NULL, 0);
375 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
376 xxti_f = 12000000;
377 xusbxti_f = 24000000;
378}
379
380static void __init smdkv310_reserve(void)
381{
382 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
383}
384
385static void __init smdkv310_machine_init(void)
386{
387 s3c_i2c1_set_platdata(NULL);
388 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
389
390 smdkv310_smsc911x_init();
391
392 s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
393 s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
394 s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
395 s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
396
397 s5p_tv_setup();
398 s5p_i2c_hdmiphy_set_platdata(NULL);
399 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
400
401 samsung_keypad_set_platdata(&smdkv310_keypad_data);
402
403 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
404 pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
405
406#ifdef CONFIG_DRM_EXYNOS_FIMD
407 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
408 exynos4_fimd0_gpio_setup_24bpp();
409#else
410 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
411#endif
412
413 smdkv310_ehci_init();
414 smdkv310_ohci_init();
415 s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
416
417 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
418}
419
420MACHINE_START(SMDKV310, "SMDKV310")
421 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
422 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
423 .atag_offset = 0x100,
424 .smp = smp_ops(exynos_smp_ops),
425 .init_irq = exynos4_init_irq,
426 .map_io = smdkv310_map_io,
427 .init_machine = smdkv310_machine_init,
428 .init_time = exynos_init_time,
429 .reserve = &smdkv310_reserve,
430 .restart = exynos4_restart,
431MACHINE_END
432
433MACHINE_START(SMDKC210, "SMDKC210")
434 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
435 .atag_offset = 0x100,
436 .smp = smp_ops(exynos_smp_ops),
437 .init_irq = exynos4_init_irq,
438 .map_io = smdkv310_map_io,
439 .init_machine = smdkv310_machine_init,
440 .init_late = exynos_init_late,
441 .init_time = exynos_init_time,
442 .reserve = &smdkv310_reserve,
443 .restart = exynos4_restart,
444MACHINE_END
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
deleted file mode 100644
index 74ddb2b55614..000000000000
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ /dev/null
@@ -1,1159 +0,0 @@
1/* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10#include <linux/platform_device.h>
11#include <linux/serial_core.h>
12#include <linux/input.h>
13#include <linux/i2c.h>
14#include <linux/gpio_keys.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/fb.h>
18#include <linux/mfd/max8998.h>
19#include <linux/regulator/machine.h>
20#include <linux/regulator/fixed.h>
21#include <linux/regulator/max8952.h>
22#include <linux/mmc/host.h>
23#include <linux/i2c-gpio.h>
24#include <linux/i2c/mcs.h>
25#include <linux/i2c/atmel_mxt_ts.h>
26#include <linux/platform_data/i2c-s3c2410.h>
27#include <linux/platform_data/mipi-csis.h>
28#include <linux/platform_data/s3c-hsotg.h>
29#include <drm/exynos_drm.h>
30
31#include <asm/mach/arch.h>
32#include <asm/mach-types.h>
33
34#include <video/samsung_fimd.h>
35#include <plat/regs-serial.h>
36#include <plat/clock.h>
37#include <plat/cpu.h>
38#include <plat/devs.h>
39#include <plat/gpio-cfg.h>
40#include <plat/fb.h>
41#include <plat/mfc.h>
42#include <plat/sdhci.h>
43#include <plat/fimc-core.h>
44#include <plat/camport.h>
45
46#include <mach/map.h>
47
48#include <media/v4l2-mediabus.h>
49#include <media/s5p_fimc.h>
50#include <media/m5mols.h>
51#include <media/s5k6aa.h>
52
53#include "common.h"
54
55/* Following are default values for UCON, ULCON and UFCON UART registers */
56#define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
57 S3C2410_UCON_RXILEVEL | \
58 S3C2410_UCON_TXIRQMODE | \
59 S3C2410_UCON_RXIRQMODE | \
60 S3C2410_UCON_RXFIFO_TOI | \
61 S3C2443_UCON_RXERR_IRQEN)
62
63#define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
64
65#define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
66 S5PV210_UFCON_TXTRIG256 | \
67 S5PV210_UFCON_RXTRIG256)
68
69static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
70 [0] = {
71 .hwport = 0,
72 .ucon = UNIVERSAL_UCON_DEFAULT,
73 .ulcon = UNIVERSAL_ULCON_DEFAULT,
74 .ufcon = UNIVERSAL_UFCON_DEFAULT,
75 },
76 [1] = {
77 .hwport = 1,
78 .ucon = UNIVERSAL_UCON_DEFAULT,
79 .ulcon = UNIVERSAL_ULCON_DEFAULT,
80 .ufcon = UNIVERSAL_UFCON_DEFAULT,
81 },
82 [2] = {
83 .hwport = 2,
84 .ucon = UNIVERSAL_UCON_DEFAULT,
85 .ulcon = UNIVERSAL_ULCON_DEFAULT,
86 .ufcon = UNIVERSAL_UFCON_DEFAULT,
87 },
88 [3] = {
89 .hwport = 3,
90 .ucon = UNIVERSAL_UCON_DEFAULT,
91 .ulcon = UNIVERSAL_ULCON_DEFAULT,
92 .ufcon = UNIVERSAL_UFCON_DEFAULT,
93 },
94};
95
96static struct regulator_consumer_supply max8952_consumer =
97 REGULATOR_SUPPLY("vdd_arm", NULL);
98
99static struct regulator_init_data universal_max8952_reg_data = {
100 .constraints = {
101 .name = "VARM_1.2V",
102 .min_uV = 770000,
103 .max_uV = 1400000,
104 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
105 .always_on = 1,
106 .boot_on = 1,
107 },
108 .num_consumer_supplies = 1,
109 .consumer_supplies = &max8952_consumer,
110};
111
112static struct max8952_platform_data universal_max8952_pdata __initdata = {
113 .gpio_vid0 = EXYNOS4_GPX0(3),
114 .gpio_vid1 = EXYNOS4_GPX0(4),
115 .gpio_en = -1, /* Not controllable, set "Always High" */
116 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
117 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
118 .sync_freq = 0, /* default: fastest */
119 .ramp_speed = 0, /* default: fastest */
120 .reg_data = &universal_max8952_reg_data,
121};
122
123static struct regulator_consumer_supply lp3974_buck1_consumer =
124 REGULATOR_SUPPLY("vdd_int", NULL);
125
126static struct regulator_consumer_supply lp3974_buck2_consumer =
127 REGULATOR_SUPPLY("vddg3d", NULL);
128
129static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
130 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
131 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
132};
133
134static struct regulator_init_data lp3974_buck1_data = {
135 .constraints = {
136 .name = "VINT_1.1V",
137 .min_uV = 750000,
138 .max_uV = 1500000,
139 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
140 REGULATOR_CHANGE_STATUS,
141 .boot_on = 1,
142 .state_mem = {
143 .disabled = 1,
144 },
145 },
146 .num_consumer_supplies = 1,
147 .consumer_supplies = &lp3974_buck1_consumer,
148};
149
150static struct regulator_init_data lp3974_buck2_data = {
151 .constraints = {
152 .name = "VG3D_1.1V",
153 .min_uV = 750000,
154 .max_uV = 1500000,
155 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
156 REGULATOR_CHANGE_STATUS,
157 .boot_on = 1,
158 .state_mem = {
159 .disabled = 1,
160 },
161 },
162 .num_consumer_supplies = 1,
163 .consumer_supplies = &lp3974_buck2_consumer,
164};
165
166static struct regulator_init_data lp3974_buck3_data = {
167 .constraints = {
168 .name = "VCC_1.8V",
169 .min_uV = 1800000,
170 .max_uV = 1800000,
171 .apply_uV = 1,
172 .always_on = 1,
173 .state_mem = {
174 .enabled = 1,
175 },
176 },
177 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
178 .consumer_supplies = lp3974_buck3_consumer,
179};
180
181static struct regulator_init_data lp3974_buck4_data = {
182 .constraints = {
183 .name = "VMEM_1.2V",
184 .min_uV = 1200000,
185 .max_uV = 1200000,
186 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
187 .apply_uV = 1,
188 .state_mem = {
189 .disabled = 1,
190 },
191 },
192};
193
194static struct regulator_init_data lp3974_ldo2_data = {
195 .constraints = {
196 .name = "VALIVE_1.2V",
197 .min_uV = 1200000,
198 .max_uV = 1200000,
199 .apply_uV = 1,
200 .always_on = 1,
201 .state_mem = {
202 .enabled = 1,
203 },
204 },
205};
206
207static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
208 REGULATOR_SUPPLY("vusb_a", "s3c-hsotg"),
209 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
210 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
211 REGULATOR_SUPPLY("vddcore", "s5p-mipi-csis.0"),
212};
213
214static struct regulator_init_data lp3974_ldo3_data = {
215 .constraints = {
216 .name = "VUSB+MIPI_1.1V",
217 .min_uV = 1100000,
218 .max_uV = 1100000,
219 .apply_uV = 1,
220 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
221 .state_mem = {
222 .disabled = 1,
223 },
224 },
225 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
226 .consumer_supplies = lp3974_ldo3_consumer,
227};
228
229static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
230 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
231};
232
233static struct regulator_init_data lp3974_ldo4_data = {
234 .constraints = {
235 .name = "VADC_3.3V",
236 .min_uV = 3300000,
237 .max_uV = 3300000,
238 .apply_uV = 1,
239 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
240 .state_mem = {
241 .disabled = 1,
242 },
243 },
244 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
245 .consumer_supplies = lp3974_ldo4_consumer,
246};
247
248static struct regulator_init_data lp3974_ldo5_data = {
249 .constraints = {
250 .name = "VTF_2.8V",
251 .min_uV = 2800000,
252 .max_uV = 2800000,
253 .apply_uV = 1,
254 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
255 .state_mem = {
256 .disabled = 1,
257 },
258 },
259};
260
261static struct regulator_init_data lp3974_ldo6_data = {
262 .constraints = {
263 .name = "LDO6",
264 .min_uV = 2000000,
265 .max_uV = 2000000,
266 .apply_uV = 1,
267 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
268 .state_mem = {
269 .disabled = 1,
270 },
271 },
272};
273
274static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
275 REGULATOR_SUPPLY("vddio", "s5p-mipi-csis.0"),
276};
277
278static struct regulator_init_data lp3974_ldo7_data = {
279 .constraints = {
280 .name = "VLCD+VMIPI_1.8V",
281 .min_uV = 1800000,
282 .max_uV = 1800000,
283 .apply_uV = 1,
284 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
285 .state_mem = {
286 .disabled = 1,
287 },
288 },
289 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
290 .consumer_supplies = lp3974_ldo7_consumer,
291};
292
293static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
294 REGULATOR_SUPPLY("vusb_d", "s3c-hsotg"),
295 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
296};
297
298static struct regulator_init_data lp3974_ldo8_data = {
299 .constraints = {
300 .name = "VUSB+VDAC_3.3V",
301 .min_uV = 3300000,
302 .max_uV = 3300000,
303 .apply_uV = 1,
304 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
305 .state_mem = {
306 .disabled = 1,
307 },
308 },
309 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
310 .consumer_supplies = lp3974_ldo8_consumer,
311};
312
313static struct regulator_consumer_supply lp3974_ldo9_consumer =
314 REGULATOR_SUPPLY("vddio", "0-003c");
315
316static struct regulator_init_data lp3974_ldo9_data = {
317 .constraints = {
318 .name = "VCC_2.8V",
319 .min_uV = 2800000,
320 .max_uV = 2800000,
321 .apply_uV = 1,
322 .always_on = 1,
323 .state_mem = {
324 .enabled = 1,
325 },
326 },
327 .num_consumer_supplies = 1,
328 .consumer_supplies = &lp3974_ldo9_consumer,
329};
330
331static struct regulator_init_data lp3974_ldo10_data = {
332 .constraints = {
333 .name = "VPLL_1.1V",
334 .min_uV = 1100000,
335 .max_uV = 1100000,
336 .boot_on = 1,
337 .apply_uV = 1,
338 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
339 .state_mem = {
340 .disabled = 1,
341 },
342 },
343};
344
345static struct regulator_consumer_supply lp3974_ldo11_consumer =
346 REGULATOR_SUPPLY("dig_28", "0-001f");
347
348static struct regulator_init_data lp3974_ldo11_data = {
349 .constraints = {
350 .name = "CAM_AF_3.3V",
351 .min_uV = 3300000,
352 .max_uV = 3300000,
353 .apply_uV = 1,
354 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
355 .state_mem = {
356 .disabled = 1,
357 },
358 },
359 .num_consumer_supplies = 1,
360 .consumer_supplies = &lp3974_ldo11_consumer,
361};
362
363static struct regulator_init_data lp3974_ldo12_data = {
364 .constraints = {
365 .name = "PS_2.8V",
366 .min_uV = 2800000,
367 .max_uV = 2800000,
368 .apply_uV = 1,
369 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
370 .state_mem = {
371 .disabled = 1,
372 },
373 },
374};
375
376static struct regulator_init_data lp3974_ldo13_data = {
377 .constraints = {
378 .name = "VHIC_1.2V",
379 .min_uV = 1200000,
380 .max_uV = 1200000,
381 .apply_uV = 1,
382 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
383 .state_mem = {
384 .disabled = 1,
385 },
386 },
387};
388
389static struct regulator_consumer_supply lp3974_ldo14_consumer =
390 REGULATOR_SUPPLY("dig_18", "0-001f");
391
392static struct regulator_init_data lp3974_ldo14_data = {
393 .constraints = {
394 .name = "CAM_I_HOST_1.8V",
395 .min_uV = 1800000,
396 .max_uV = 1800000,
397 .apply_uV = 1,
398 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
399 .state_mem = {
400 .disabled = 1,
401 },
402 },
403 .num_consumer_supplies = 1,
404 .consumer_supplies = &lp3974_ldo14_consumer,
405};
406
407
408static struct regulator_consumer_supply lp3974_ldo15_consumer =
409 REGULATOR_SUPPLY("dig_12", "0-001f");
410
411static struct regulator_init_data lp3974_ldo15_data = {
412 .constraints = {
413 .name = "CAM_S_DIG+FM33_CORE_1.2V",
414 .min_uV = 1200000,
415 .max_uV = 1200000,
416 .apply_uV = 1,
417 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
418 .state_mem = {
419 .disabled = 1,
420 },
421 },
422 .num_consumer_supplies = 1,
423 .consumer_supplies = &lp3974_ldo15_consumer,
424};
425
426static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
427 REGULATOR_SUPPLY("vdda", "0-003c"),
428 REGULATOR_SUPPLY("a_sensor", "0-001f"),
429};
430
431static struct regulator_init_data lp3974_ldo16_data = {
432 .constraints = {
433 .name = "CAM_S_ANA_2.8V",
434 .min_uV = 2800000,
435 .max_uV = 2800000,
436 .apply_uV = 1,
437 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
438 .state_mem = {
439 .disabled = 1,
440 },
441 },
442 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
443 .consumer_supplies = lp3974_ldo16_consumer,
444};
445
446static struct regulator_init_data lp3974_ldo17_data = {
447 .constraints = {
448 .name = "VCC_3.0V_LCD",
449 .min_uV = 3000000,
450 .max_uV = 3000000,
451 .apply_uV = 1,
452 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
453 .boot_on = 1,
454 .state_mem = {
455 .disabled = 1,
456 },
457 },
458};
459
460static struct regulator_init_data lp3974_32khz_ap_data = {
461 .constraints = {
462 .name = "32KHz AP",
463 .always_on = 1,
464 .state_mem = {
465 .enabled = 1,
466 },
467 },
468};
469
470static struct regulator_init_data lp3974_32khz_cp_data = {
471 .constraints = {
472 .name = "32KHz CP",
473 .state_mem = {
474 .disabled = 1,
475 },
476 },
477};
478
479static struct regulator_init_data lp3974_vichg_data = {
480 .constraints = {
481 .name = "VICHG",
482 .state_mem = {
483 .disabled = 1,
484 },
485 },
486};
487
488static struct regulator_init_data lp3974_esafeout1_data = {
489 .constraints = {
490 .name = "SAFEOUT1",
491 .min_uV = 4800000,
492 .max_uV = 4800000,
493 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
494 .always_on = 1,
495 .state_mem = {
496 .enabled = 1,
497 },
498 },
499};
500
501static struct regulator_init_data lp3974_esafeout2_data = {
502 .constraints = {
503 .name = "SAFEOUT2",
504 .boot_on = 1,
505 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
506 .state_mem = {
507 .enabled = 1,
508 },
509 },
510};
511
512static struct max8998_regulator_data lp3974_regulators[] = {
513 { MAX8998_LDO2, &lp3974_ldo2_data },
514 { MAX8998_LDO3, &lp3974_ldo3_data },
515 { MAX8998_LDO4, &lp3974_ldo4_data },
516 { MAX8998_LDO5, &lp3974_ldo5_data },
517 { MAX8998_LDO6, &lp3974_ldo6_data },
518 { MAX8998_LDO7, &lp3974_ldo7_data },
519 { MAX8998_LDO8, &lp3974_ldo8_data },
520 { MAX8998_LDO9, &lp3974_ldo9_data },
521 { MAX8998_LDO10, &lp3974_ldo10_data },
522 { MAX8998_LDO11, &lp3974_ldo11_data },
523 { MAX8998_LDO12, &lp3974_ldo12_data },
524 { MAX8998_LDO13, &lp3974_ldo13_data },
525 { MAX8998_LDO14, &lp3974_ldo14_data },
526 { MAX8998_LDO15, &lp3974_ldo15_data },
527 { MAX8998_LDO16, &lp3974_ldo16_data },
528 { MAX8998_LDO17, &lp3974_ldo17_data },
529 { MAX8998_BUCK1, &lp3974_buck1_data },
530 { MAX8998_BUCK2, &lp3974_buck2_data },
531 { MAX8998_BUCK3, &lp3974_buck3_data },
532 { MAX8998_BUCK4, &lp3974_buck4_data },
533 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
534 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
535 { MAX8998_ENVICHG, &lp3974_vichg_data },
536 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
537 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
538};
539
540static struct max8998_platform_data universal_lp3974_pdata = {
541 .num_regulators = ARRAY_SIZE(lp3974_regulators),
542 .regulators = lp3974_regulators,
543 .buck1_voltage1 = 1100000, /* INT */
544 .buck1_voltage2 = 1000000,
545 .buck1_voltage3 = 1100000,
546 .buck1_voltage4 = 1000000,
547 .buck1_set1 = EXYNOS4_GPX0(5),
548 .buck1_set2 = EXYNOS4_GPX0(6),
549 .buck2_voltage1 = 1200000, /* G3D */
550 .buck2_voltage2 = 1100000,
551 .buck1_default_idx = 0,
552 .buck2_set3 = EXYNOS4_GPE2(0),
553 .buck2_default_idx = 0,
554 .wakeup = true,
555};
556
557
558enum fixed_regulator_id {
559 FIXED_REG_ID_MMC0,
560 FIXED_REG_ID_HDMI_5V,
561 FIXED_REG_ID_CAM_S_IF,
562 FIXED_REG_ID_CAM_I_CORE,
563 FIXED_REG_ID_CAM_VT_DIO,
564};
565
566static struct regulator_consumer_supply hdmi_fixed_consumer =
567 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
568
569static struct regulator_init_data hdmi_fixed_voltage_init_data = {
570 .constraints = {
571 .name = "HDMI_5V",
572 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
573 },
574 .num_consumer_supplies = 1,
575 .consumer_supplies = &hdmi_fixed_consumer,
576};
577
578static struct fixed_voltage_config hdmi_fixed_voltage_config = {
579 .supply_name = "HDMI_EN1",
580 .microvolts = 5000000,
581 .gpio = EXYNOS4_GPE0(1),
582 .enable_high = true,
583 .init_data = &hdmi_fixed_voltage_init_data,
584};
585
586static struct platform_device hdmi_fixed_voltage = {
587 .name = "reg-fixed-voltage",
588 .id = FIXED_REG_ID_HDMI_5V,
589 .dev = {
590 .platform_data = &hdmi_fixed_voltage_config,
591 },
592};
593
594/* GPIO I2C 5 (PMIC) */
595static struct i2c_board_info i2c5_devs[] __initdata = {
596 {
597 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
598 .platform_data = &universal_max8952_pdata,
599 }, {
600 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
601 .platform_data = &universal_lp3974_pdata,
602 },
603};
604
605/* I2C3 (TSP) */
606static struct mxt_platform_data qt602240_platform_data = {
607 .x_line = 19,
608 .y_line = 11,
609 .x_size = 800,
610 .y_size = 480,
611 .blen = 0x11,
612 .threshold = 0x28,
613 .voltage = 2800000, /* 2.8V */
614 .orient = MXT_DIAGONAL,
615 .irqflags = IRQF_TRIGGER_FALLING,
616};
617
618static struct i2c_board_info i2c3_devs[] __initdata = {
619 {
620 I2C_BOARD_INFO("qt602240_ts", 0x4a),
621 .platform_data = &qt602240_platform_data,
622 },
623};
624
625static void __init universal_tsp_init(void)
626{
627 int gpio;
628
629 /* TSP_LDO_ON: XMDMADDR_11 */
630 gpio = EXYNOS4_GPE2(3);
631 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
632 gpio_export(gpio, 0);
633
634 /* TSP_INT: XMDMADDR_7 */
635 gpio = EXYNOS4_GPE1(7);
636 gpio_request(gpio, "TSP_INT");
637
638 s5p_register_gpio_interrupt(gpio);
639 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
640 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
641 i2c3_devs[0].irq = gpio_to_irq(gpio);
642}
643
644
645/* GPIO I2C 12 (3 Touchkey) */
646static uint32_t touchkey_keymap[] = {
647 /* MCS_KEY_MAP(value, keycode) */
648 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
649 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
650};
651
652static struct mcs_platform_data touchkey_data = {
653 .keymap = touchkey_keymap,
654 .keymap_size = ARRAY_SIZE(touchkey_keymap),
655 .key_maxval = 2,
656};
657
658/* GPIO I2C 3_TOUCH 2.8V */
659#define I2C_GPIO_BUS_12 12
660static struct i2c_gpio_platform_data i2c_gpio12_data = {
661 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
662 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
663};
664
665static struct platform_device i2c_gpio12 = {
666 .name = "i2c-gpio",
667 .id = I2C_GPIO_BUS_12,
668 .dev = {
669 .platform_data = &i2c_gpio12_data,
670 },
671};
672
673static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
674 {
675 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
676 .platform_data = &touchkey_data,
677 },
678};
679
680static void __init universal_touchkey_init(void)
681{
682 int gpio;
683
684 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
685 gpio_request(gpio, "3_TOUCH_INT");
686 s5p_register_gpio_interrupt(gpio);
687 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
688 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
689
690 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
691 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
692}
693
694static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
695 .frequency = 300 * 1000,
696 .sda_delay = 200,
697};
698
699/* GPIO KEYS */
700static struct gpio_keys_button universal_gpio_keys_tables[] = {
701 {
702 .code = KEY_VOLUMEUP,
703 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
704 .desc = "gpio-keys: KEY_VOLUMEUP",
705 .type = EV_KEY,
706 .active_low = 1,
707 .debounce_interval = 1,
708 }, {
709 .code = KEY_VOLUMEDOWN,
710 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
711 .desc = "gpio-keys: KEY_VOLUMEDOWN",
712 .type = EV_KEY,
713 .active_low = 1,
714 .debounce_interval = 1,
715 }, {
716 .code = KEY_CONFIG,
717 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
718 .desc = "gpio-keys: KEY_CONFIG",
719 .type = EV_KEY,
720 .active_low = 1,
721 .debounce_interval = 1,
722 }, {
723 .code = KEY_CAMERA,
724 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
725 .desc = "gpio-keys: KEY_CAMERA",
726 .type = EV_KEY,
727 .active_low = 1,
728 .debounce_interval = 1,
729 }, {
730 .code = KEY_OK,
731 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
732 .desc = "gpio-keys: KEY_OK",
733 .type = EV_KEY,
734 .active_low = 1,
735 .debounce_interval = 1,
736 },
737};
738
739static struct gpio_keys_platform_data universal_gpio_keys_data = {
740 .buttons = universal_gpio_keys_tables,
741 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
742};
743
744static struct platform_device universal_gpio_keys = {
745 .name = "gpio-keys",
746 .dev = {
747 .platform_data = &universal_gpio_keys_data,
748 },
749};
750
751/* eMMC */
752static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
753 .max_width = 8,
754 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
755 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
756 .cd_type = S3C_SDHCI_CD_PERMANENT,
757};
758
759static struct regulator_consumer_supply mmc0_supplies[] = {
760 REGULATOR_SUPPLY("vmmc", "exynos4-sdhci.0"),
761};
762
763static struct regulator_init_data mmc0_fixed_voltage_init_data = {
764 .constraints = {
765 .name = "VMEM_VDD_2.8V",
766 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
767 },
768 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
769 .consumer_supplies = mmc0_supplies,
770};
771
772static struct fixed_voltage_config mmc0_fixed_voltage_config = {
773 .supply_name = "MASSMEMORY_EN",
774 .microvolts = 2800000,
775 .gpio = EXYNOS4_GPE1(3),
776 .enable_high = true,
777 .init_data = &mmc0_fixed_voltage_init_data,
778};
779
780static struct platform_device mmc0_fixed_voltage = {
781 .name = "reg-fixed-voltage",
782 .id = FIXED_REG_ID_MMC0,
783 .dev = {
784 .platform_data = &mmc0_fixed_voltage_config,
785 },
786};
787
788/* SD */
789static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
790 .max_width = 4,
791 .host_caps = MMC_CAP_4_BIT_DATA |
792 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
793 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
794 .ext_cd_gpio_invert = 1,
795 .cd_type = S3C_SDHCI_CD_GPIO,
796};
797
798/* WiFi */
799static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
800 .max_width = 4,
801 .host_caps = MMC_CAP_4_BIT_DATA |
802 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED,
803 .cd_type = S3C_SDHCI_CD_EXTERNAL,
804};
805
806static void __init universal_sdhci_init(void)
807{
808 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
809 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
810 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
811}
812
813/* I2C1 */
814static struct i2c_board_info i2c1_devs[] __initdata = {
815 /* Gyro, To be updated */
816};
817
818#ifdef CONFIG_DRM_EXYNOS
819static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
820 .panel = {
821 .timing = {
822 .left_margin = 16,
823 .right_margin = 16,
824 .upper_margin = 2,
825 .lower_margin = 28,
826 .hsync_len = 2,
827 .vsync_len = 1,
828 .xres = 480,
829 .yres = 800,
830 .refresh = 55,
831 },
832 },
833 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
834 VIDCON0_CLKSEL_LCD,
835 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
836 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
837 .default_win = 3,
838 .bpp = 32,
839};
840#else
841/* Frame Buffer */
842static struct s3c_fb_pd_win universal_fb_win0 = {
843 .max_bpp = 32,
844 .default_bpp = 16,
845 .xres = 480,
846 .yres = 800,
847 .virtual_x = 480,
848 .virtual_y = 2 * 800,
849};
850
851static struct fb_videomode universal_lcd_timing = {
852 .left_margin = 16,
853 .right_margin = 16,
854 .upper_margin = 2,
855 .lower_margin = 28,
856 .hsync_len = 2,
857 .vsync_len = 1,
858 .xres = 480,
859 .yres = 800,
860 .refresh = 55,
861};
862
863static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
864 .win[0] = &universal_fb_win0,
865 .vtiming = &universal_lcd_timing,
866 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
867 VIDCON0_CLKSEL_LCD,
868 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
869 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
870 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
871};
872#endif
873
874static struct regulator_consumer_supply cam_vt_dio_supply =
875 REGULATOR_SUPPLY("vdd_core", "0-003c");
876
877static struct regulator_init_data cam_vt_dio_reg_init_data = {
878 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
879 .num_consumer_supplies = 1,
880 .consumer_supplies = &cam_vt_dio_supply,
881};
882
883static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
884 .supply_name = "CAM_VT_D_IO",
885 .microvolts = 2800000,
886 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
887 .enable_high = 1,
888 .init_data = &cam_vt_dio_reg_init_data,
889};
890
891static struct platform_device cam_vt_dio_fixed_reg_dev = {
892 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
893 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
894};
895
896static struct regulator_consumer_supply cam_i_core_supply =
897 REGULATOR_SUPPLY("core", "0-001f");
898
899static struct regulator_init_data cam_i_core_reg_init_data = {
900 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
901 .num_consumer_supplies = 1,
902 .consumer_supplies = &cam_i_core_supply,
903};
904
905static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
906 .supply_name = "CAM_I_CORE_1.2V",
907 .microvolts = 1200000,
908 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
909 .enable_high = 1,
910 .init_data = &cam_i_core_reg_init_data,
911};
912
913static struct platform_device cam_i_core_fixed_reg_dev = {
914 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
915 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
916};
917
918static struct regulator_consumer_supply cam_s_if_supply =
919 REGULATOR_SUPPLY("d_sensor", "0-001f");
920
921static struct regulator_init_data cam_s_if_reg_init_data = {
922 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
923 .num_consumer_supplies = 1,
924 .consumer_supplies = &cam_s_if_supply,
925};
926
927static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
928 .supply_name = "CAM_S_IF_1.8V",
929 .microvolts = 1800000,
930 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
931 .enable_high = 1,
932 .init_data = &cam_s_if_reg_init_data,
933};
934
935static struct platform_device cam_s_if_fixed_reg_dev = {
936 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
937 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
938};
939
940static struct s5p_platform_mipi_csis mipi_csis_platdata = {
941 .clk_rate = 166000000UL,
942 .lanes = 2,
943 .hs_settle = 12,
944};
945
946#define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
947#define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
948#define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
949#define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
950#define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
951
952static int s5k6aa_set_power(int on)
953{
954 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
955 return 0;
956}
957
958static struct s5k6aa_platform_data s5k6aa_platdata = {
959 .mclk_frequency = 21600000UL,
960 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
961 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
962 .bus_type = V4L2_MBUS_PARALLEL,
963 .horiz_flip = 1,
964 .set_power = s5k6aa_set_power,
965};
966
967static struct i2c_board_info s5k6aa_board_info = {
968 I2C_BOARD_INFO("S5K6AA", 0x3C),
969 .platform_data = &s5k6aa_platdata,
970};
971
972static int m5mols_set_power(struct device *dev, int on)
973{
974 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
975 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
976 return 0;
977}
978
979static struct m5mols_platform_data m5mols_platdata = {
980 .gpio_reset = GPIO_CAM_MEGA_nRST,
981 .reset_polarity = 0,
982 .set_power = m5mols_set_power,
983};
984
985static struct i2c_board_info m5mols_board_info = {
986 I2C_BOARD_INFO("M5MOLS", 0x1F),
987 .platform_data = &m5mols_platdata,
988};
989
990static struct fimc_source_info universal_camera_sensors[] = {
991 {
992 .mux_id = 0,
993 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
994 V4L2_MBUS_VSYNC_ACTIVE_LOW,
995 .fimc_bus_type = FIMC_BUS_TYPE_ITU_601,
996 .board_info = &s5k6aa_board_info,
997 .i2c_bus_num = 0,
998 .clk_frequency = 24000000UL,
999 }, {
1000 .mux_id = 0,
1001 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
1002 V4L2_MBUS_VSYNC_ACTIVE_LOW,
1003 .fimc_bus_type = FIMC_BUS_TYPE_MIPI_CSI2,
1004 .board_info = &m5mols_board_info,
1005 .i2c_bus_num = 0,
1006 .clk_frequency = 24000000UL,
1007 },
1008};
1009
1010static struct s5p_platform_fimc fimc_md_platdata = {
1011 .source_info = universal_camera_sensors,
1012 .num_clients = ARRAY_SIZE(universal_camera_sensors),
1013};
1014
1015static struct gpio universal_camera_gpios[] = {
1016 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
1017 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
1018 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
1019 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
1020 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
1021 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
1022};
1023
1024/* USB OTG */
1025static struct s3c_hsotg_plat universal_hsotg_pdata;
1026
1027static void __init universal_camera_init(void)
1028{
1029 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1030 &s5p_device_mipi_csis0);
1031 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1032 &s5p_device_fimc_md);
1033
1034 if (gpio_request_array(universal_camera_gpios,
1035 ARRAY_SIZE(universal_camera_gpios))) {
1036 pr_err("%s: GPIO request failed\n", __func__);
1037 return;
1038 }
1039
1040 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1041 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1042 else
1043 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1044
1045 /* Free GPIOs controlled directly by the sensor drivers. */
1046 gpio_free(GPIO_CAM_MEGA_nRST);
1047 gpio_free(GPIO_CAM_8M_ISP_INT);
1048 gpio_free(GPIO_CAM_VGA_NRST);
1049 gpio_free(GPIO_CAM_VGA_NSTBY);
1050
1051 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1052 pr_err("Camera port A setup failed\n");
1053}
1054
1055static struct platform_device *universal_devices[] __initdata = {
1056 /* Samsung Platform Devices */
1057 &s5p_device_mipi_csis0,
1058 &s5p_device_fimc0,
1059 &s5p_device_fimc1,
1060 &s5p_device_fimc2,
1061 &s5p_device_fimc3,
1062 &s5p_device_g2d,
1063 &mmc0_fixed_voltage,
1064 &s3c_device_hsmmc0,
1065 &s3c_device_hsmmc2,
1066 &s3c_device_hsmmc3,
1067 &s3c_device_i2c0,
1068 &s3c_device_i2c3,
1069 &s3c_device_i2c5,
1070 &s5p_device_i2c_hdmiphy,
1071 &hdmi_fixed_voltage,
1072 &s5p_device_hdmi,
1073 &s5p_device_sdo,
1074 &s5p_device_mixer,
1075
1076 /* Universal Devices */
1077 &i2c_gpio12,
1078 &universal_gpio_keys,
1079 &s5p_device_onenand,
1080 &s5p_device_fimd0,
1081 &s5p_device_jpeg,
1082 &s3c_device_usb_hsotg,
1083 &s5p_device_mfc,
1084 &s5p_device_mfc_l,
1085 &s5p_device_mfc_r,
1086 &cam_vt_dio_fixed_reg_dev,
1087 &cam_i_core_fixed_reg_dev,
1088 &cam_s_if_fixed_reg_dev,
1089 &s5p_device_fimc_md,
1090};
1091
1092static void __init universal_map_io(void)
1093{
1094 exynos_init_io(NULL, 0);
1095 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1096 exynos_set_timer_source(BIT(2) | BIT(4));
1097 xxti_f = 0;
1098 xusbxti_f = 24000000;
1099}
1100
1101static void s5p_tv_setup(void)
1102{
1103 /* direct HPD to HDMI chip */
1104 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1105 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1106 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1107}
1108
1109static void __init universal_reserve(void)
1110{
1111 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1112}
1113
1114static void __init universal_machine_init(void)
1115{
1116 universal_sdhci_init();
1117 s5p_tv_setup();
1118
1119 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1120 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1121
1122 universal_tsp_init();
1123 s3c_i2c3_set_platdata(NULL);
1124 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1125
1126 s3c_i2c5_set_platdata(NULL);
1127 s5p_i2c_hdmiphy_set_platdata(NULL);
1128 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1129
1130#ifdef CONFIG_DRM_EXYNOS
1131 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
1132 exynos4_fimd0_gpio_setup_24bpp();
1133#else
1134 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1135#endif
1136
1137 universal_touchkey_init();
1138 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1139 ARRAY_SIZE(i2c_gpio12_devs));
1140
1141 s3c_hsotg_set_platdata(&universal_hsotg_pdata);
1142 universal_camera_init();
1143
1144 /* Last */
1145 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1146}
1147
1148MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1149 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1150 .atag_offset = 0x100,
1151 .smp = smp_ops(exynos_smp_ops),
1152 .init_irq = exynos4_init_irq,
1153 .map_io = universal_map_io,
1154 .init_machine = universal_machine_init,
1155 .init_late = exynos_init_late,
1156 .init_time = exynos_init_time,
1157 .reserve = &universal_reserve,
1158 .restart = exynos4_restart,
1159MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-13 06:23:08 -0500