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authorRob Herring <rob.herring@calxeda.com>2011-06-28 22:16:13 -0400
committerRob Herring <rob.herring@calxeda.com>2011-07-12 12:19:29 -0400
commitc9d95fbe59e426eed7f16e7cac812e46ac4772d0 (patch)
tree7e7c01255fb18932ee4f0c68b1501ab35db7c012 /arch
parentdc8d966bccde0b8b6c9e8c6e663c747030c17435 (diff)
ARM: convert PCI defines to variables
Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow multi-platform builds. This also removes the requirement for a platform to have a mach/hardware.h. The default values for i/o and mem are 0x1000 and 0x01000000, respectively. Per Arnd Bergmann, other values are likely to be incorrect, but this commit does not try to address that issue. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/include/asm/pci.h6
-rw-r--r--arch/arm/mach-cns3xxx/include/mach/hardware.h21
-rw-r--r--arch/arm/mach-cns3xxx/pcie.c3
-rw-r--r--arch/arm/mach-dove/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-footbridge/include/mach/hardware.h3
-rw-r--r--arch/arm/mach-integrator/include/mach/hardware.h3
-rw-r--r--arch/arm/mach-integrator/pci_v3.c3
-rw-r--r--arch/arm/mach-iop13xx/include/mach/hardware.h5
-rw-r--r--arch/arm/mach-iop13xx/pci.c5
-rw-r--r--arch/arm/mach-iop32x/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-iop33x/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ixp2000/include/mach/hardware.h6
-rw-r--r--arch/arm/mach-ixp2000/pci.c3
-rw-r--r--arch/arm/mach-ixp23xx/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-ixp23xx/pci.c3
-rw-r--r--arch/arm/mach-ixp4xx/common-pci.c5
-rw-r--r--arch/arm/mach-ixp4xx/include/mach/hardware.h3
-rw-r--r--arch/arm/mach-kirkwood/include/mach/hardware.h1
-rw-r--r--arch/arm/mach-ks8695/include/mach/hardware.h7
-rw-r--r--arch/arm/mach-ks8695/pci.c3
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-orion5x/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-pxa/cm-x2xx-pci.c3
-rw-r--r--arch/arm/mach-pxa/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-sa1100/include/mach/hardware.h7
-rw-r--r--arch/arm/mach-sa1100/pci-nanoengine.c3
-rw-r--r--arch/arm/mach-shark/include/mach/hardware.h2
-rw-r--r--arch/arm/mach-shark/pci.c10
-rw-r--r--arch/arm/mach-tegra/include/mach/hardware.h27
-rw-r--r--arch/arm/mach-tegra/pcie.c2
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-versatile/pci.c3
-rw-r--r--arch/arm/mm/iomap.c7
-rw-r--r--arch/arm/plat-iop/pci.c3
35 files changed, 57 insertions, 110 deletions
diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h
index cb77e66c969f..2b1f245db0c6 100644
--- a/arch/arm/include/asm/pci.h
+++ b/arch/arm/include/asm/pci.h
@@ -6,7 +6,11 @@
6#include <asm-generic/pci-bridge.h> 6#include <asm-generic/pci-bridge.h>
7 7
8#include <asm/mach/pci.h> /* for pci_sys_data */ 8#include <asm/mach/pci.h> /* for pci_sys_data */
9#include <mach/hardware.h> /* for PCIBIOS_MIN_* */ 9
10extern unsigned long pcibios_min_io;
11#define PCIBIOS_MIN_IO pcibios_min_io
12extern unsigned long pcibios_min_mem;
13#define PCIBIOS_MIN_MEM pcibios_min_mem
10 14
11static inline int pcibios_assign_all_busses(void) 15static inline int pcibios_assign_all_busses(void)
12{ 16{
diff --git a/arch/arm/mach-cns3xxx/include/mach/hardware.h b/arch/arm/mach-cns3xxx/include/mach/hardware.h
deleted file mode 100644
index 82a0d4e6bcc9..000000000000
--- a/arch/arm/mach-cns3xxx/include/mach/hardware.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * This file contains the hardware definitions of the Cavium Networks boards.
3 *
4 * Copyright 2003 ARM Limited.
5 * Copyright 2008 Cavium Networks
6 *
7 * This file is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License, Version 2, as
9 * published by the Free Software Foundation.
10 */
11
12#ifndef __MACH_HARDWARE_H
13#define __MACH_HARDWARE_H
14
15#include <asm/sizes.h>
16
17/* macro to get at IO space when running virtually */
18#define PCIBIOS_MIN_IO 0x00000000
19#define PCIBIOS_MIN_MEM 0x00000000
20
21#endif
diff --git a/arch/arm/mach-cns3xxx/pcie.c b/arch/arm/mach-cns3xxx/pcie.c
index 78defd71a829..a4ec080908b8 100644
--- a/arch/arm/mach-cns3xxx/pcie.c
+++ b/arch/arm/mach-cns3xxx/pcie.c
@@ -369,6 +369,9 @@ static int __init cns3xxx_pcie_init(void)
369{ 369{
370 int i; 370 int i;
371 371
372 pcibios_min_io = 0;
373 pcibios_min_mem = 0;
374
372 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0, 375 hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
373 "imprecise external abort"); 376 "imprecise external abort");
374 377
diff --git a/arch/arm/mach-dove/include/mach/hardware.h b/arch/arm/mach-dove/include/mach/hardware.h
index f619fb92eae6..94c5a2cf5481 100644
--- a/arch/arm/mach-dove/include/mach/hardware.h
+++ b/arch/arm/mach-dove/include/mach/hardware.h
@@ -11,8 +11,6 @@
11 11
12#include "dove.h" 12#include "dove.h"
13 13
14#define PCIBIOS_MIN_IO 0x1000
15#define PCIBIOS_MIN_MEM 0x01000000
16#define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE 14#define PCIMEM_BASE DOVE_PCIE0_MEM_PHYS_BASE
17 15
18 16
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index 3ffa54841ec5..a8dfa00e4596 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -295,6 +295,8 @@ void __init dc21285_preinit(void)
295 unsigned int mem_size, mem_mask; 295 unsigned int mem_size, mem_mask;
296 int cfn_mode; 296 int cfn_mode;
297 297
298 pcibios_min_mem = 0x81000000;
299
298 mem_size = (unsigned int)high_memory - PAGE_OFFSET; 300 mem_size = (unsigned int)high_memory - PAGE_OFFSET;
299 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1) 301 for (mem_mask = 0x00100000; mem_mask < 0x10000000; mem_mask <<= 1)
300 if (mem_mask >= mem_size) 302 if (mem_mask >= mem_size)
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index 082e6ce23579..15d54981674c 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -100,7 +100,4 @@ extern unsigned int nw_gpio_read(void);
100extern void nw_cpld_modify(unsigned int mask, unsigned int set); 100extern void nw_cpld_modify(unsigned int mask, unsigned int set);
101#endif 101#endif
102 102
103#define PCIBIOS_MIN_IO 0x1000
104#define PCIBIOS_MIN_MEM 0x81000000
105
106#endif 103#endif
diff --git a/arch/arm/mach-integrator/include/mach/hardware.h b/arch/arm/mach-integrator/include/mach/hardware.h
index 37323eabc1d3..0ce52121dabe 100644
--- a/arch/arm/mach-integrator/include/mach/hardware.h
+++ b/arch/arm/mach-integrator/include/mach/hardware.h
@@ -34,9 +34,6 @@
34 34
35#define PCIMEM_BASE PCI_MEMORY_VADDR 35#define PCIMEM_BASE PCI_MEMORY_VADDR
36 36
37#define PCIBIOS_MIN_IO 0x6000
38#define PCIBIOS_MIN_MEM 0x00100000
39
40/* macro to get at IO space when running virtually */ 37/* macro to get at IO space when running virtually */
41#ifdef CONFIG_MMU 38#ifdef CONFIG_MMU
42#define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE) 39#define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c
index 6467d99fa2ee..11b86e5b71c2 100644
--- a/arch/arm/mach-integrator/pci_v3.c
+++ b/arch/arm/mach-integrator/pci_v3.c
@@ -502,6 +502,9 @@ void __init pci_v3_preinit(void)
502 unsigned int temp; 502 unsigned int temp;
503 int ret; 503 int ret;
504 504
505 pcibios_min_io = 0x6000;
506 pcibios_min_mem = 0x00100000;
507
505 /* 508 /*
506 * Hook in our fault handler for PCI errors 509 * Hook in our fault handler for PCI errors
507 */ 510 */
diff --git a/arch/arm/mach-iop13xx/include/mach/hardware.h b/arch/arm/mach-iop13xx/include/mach/hardware.h
index ba81e504d714..786fa266fab3 100644
--- a/arch/arm/mach-iop13xx/include/mach/hardware.h
+++ b/arch/arm/mach-iop13xx/include/mach/hardware.h
@@ -3,15 +3,10 @@
3#include <asm/types.h> 3#include <asm/types.h>
4 4
5#ifndef __ASSEMBLY__ 5#ifndef __ASSEMBLY__
6extern unsigned long iop13xx_pcibios_min_io;
7extern unsigned long iop13xx_pcibios_min_mem;
8extern u16 iop13xx_dev_id(void); 6extern u16 iop13xx_dev_id(void);
9extern void iop13xx_set_atu_mmr_bases(void); 7extern void iop13xx_set_atu_mmr_bases(void);
10#endif 8#endif
11 9
12#define PCIBIOS_MIN_IO (iop13xx_pcibios_min_io)
13#define PCIBIOS_MIN_MEM (iop13xx_pcibios_min_mem)
14
15/* 10/*
16 * Generic chipset bits 11 * Generic chipset bits
17 * 12 *
diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c
index ba3dae352a2d..0690b1d7fd3e 100644
--- a/arch/arm/mach-iop13xx/pci.c
+++ b/arch/arm/mach-iop13xx/pci.c
@@ -39,8 +39,6 @@ u32 iop13xx_atue_mem_base;
39u32 iop13xx_atux_mem_base; 39u32 iop13xx_atux_mem_base;
40size_t iop13xx_atue_mem_size; 40size_t iop13xx_atue_mem_size;
41size_t iop13xx_atux_mem_size; 41size_t iop13xx_atux_mem_size;
42unsigned long iop13xx_pcibios_min_io = 0;
43unsigned long iop13xx_pcibios_min_mem = 0;
44 42
45EXPORT_SYMBOL(iop13xx_atue_mem_base); 43EXPORT_SYMBOL(iop13xx_atue_mem_base);
46EXPORT_SYMBOL(iop13xx_atux_mem_base); 44EXPORT_SYMBOL(iop13xx_atux_mem_base);
@@ -971,7 +969,8 @@ void __init iop13xx_pci_init(void)
971 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR); 969 __raw_writel(__raw_readl(IOP13XX_XBG_BECSR) & 3, IOP13XX_XBG_BECSR);
972 970
973 /* Setup the Min Address for PCI memory... */ 971 /* Setup the Min Address for PCI memory... */
974 iop13xx_pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA; 972 pcibios_min_io = 0;
973 pcibios_min_mem = IOP13XX_PCIX_LOWER_MEM_BA;
975 974
976 /* if Linux is given control of an ATU 975 /* if Linux is given control of an ATU
977 * clear out its prior configuration, 976 * clear out its prior configuration,
diff --git a/arch/arm/mach-iop32x/include/mach/hardware.h b/arch/arm/mach-iop32x/include/mach/hardware.h
index e68bf9779c8e..48cb1b20ba91 100644
--- a/arch/arm/mach-iop32x/include/mach/hardware.h
+++ b/arch/arm/mach-iop32x/include/mach/hardware.h
@@ -18,8 +18,6 @@
18 * but when we read them, we convert them to virtual addresses. See 18 * but when we read them, we convert them to virtual addresses. See
19 * arch/arm/plat-iop/pci.c. 19 * arch/arm/plat-iop/pci.c.
20 */ 20 */
21#define PCIBIOS_MIN_IO 0x00000000
22#define PCIBIOS_MIN_MEM 0x00000000
23 21
24#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
25void iop32x_init_irq(void); 23void iop32x_init_irq(void);
diff --git a/arch/arm/mach-iop33x/include/mach/hardware.h b/arch/arm/mach-iop33x/include/mach/hardware.h
index 215065b11017..839285315e4e 100644
--- a/arch/arm/mach-iop33x/include/mach/hardware.h
+++ b/arch/arm/mach-iop33x/include/mach/hardware.h
@@ -18,8 +18,6 @@
18 * but when we read them, we convert them to virtual addresses. See 18 * but when we read them, we convert them to virtual addresses. See
19 * arch/arm/mach-iop3xx/iop3xx-pci.c 19 * arch/arm/mach-iop3xx/iop3xx-pci.c
20 */ 20 */
21#define PCIBIOS_MIN_IO 0x00000000
22#define PCIBIOS_MIN_MEM 0x00000000
23 21
24#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
25void iop33x_init_irq(void); 23void iop33x_init_irq(void);
diff --git a/arch/arm/mach-ixp2000/include/mach/hardware.h b/arch/arm/mach-ixp2000/include/mach/hardware.h
index 6c92008aff45..cdaf1db84003 100644
--- a/arch/arm/mach-ixp2000/include/mach/hardware.h
+++ b/arch/arm/mach-ixp2000/include/mach/hardware.h
@@ -19,12 +19,6 @@
19#ifndef __ASM_ARCH_HARDWARE_H__ 19#ifndef __ASM_ARCH_HARDWARE_H__
20#define __ASM_ARCH_HARDWARE_H__ 20#define __ASM_ARCH_HARDWARE_H__
21 21
22/*
23 * This needs to be platform-specific?
24 */
25#define PCIBIOS_MIN_IO 0x00000000
26#define PCIBIOS_MIN_MEM 0x00000000
27
28#include "ixp2000-regs.h" /* Chipset Registers */ 22#include "ixp2000-regs.h" /* Chipset Registers */
29 23
30/* 24/*
diff --git a/arch/arm/mach-ixp2000/pci.c b/arch/arm/mach-ixp2000/pci.c
index 8888ed9429f8..f5098b306fd3 100644
--- a/arch/arm/mach-ixp2000/pci.c
+++ b/arch/arm/mach-ixp2000/pci.c
@@ -198,6 +198,9 @@ ixp2000_pci_preinit(void)
198{ 198{
199 pci_set_flags(0); 199 pci_set_flags(0);
200 200
201 pcibios_min_io = 0;
202 pcibios_min_mem = 0;
203
201#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO 204#ifndef CONFIG_IXP2000_SUPPORT_BROKEN_PCI_IO
202 /* 205 /*
203 * Configure the PCI unit to properly byteswap I/O transactions, 206 * Configure the PCI unit to properly byteswap I/O transactions,
diff --git a/arch/arm/mach-ixp23xx/include/mach/hardware.h b/arch/arm/mach-ixp23xx/include/mach/hardware.h
index b8bb781e54f0..60e55fa10238 100644
--- a/arch/arm/mach-ixp23xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp23xx/include/mach/hardware.h
@@ -15,8 +15,6 @@
15#define __ASM_ARCH_HARDWARE_H 15#define __ASM_ARCH_HARDWARE_H
16 16
17/* PCI IO info */ 17/* PCI IO info */
18#define PCIBIOS_MIN_IO 0x00000000
19#define PCIBIOS_MIN_MEM 0xe0000000
20 18
21#include "ixp23xx.h" 19#include "ixp23xx.h"
22 20
diff --git a/arch/arm/mach-ixp23xx/pci.c b/arch/arm/mach-ixp23xx/pci.c
index 72d145a2019a..e6be5711c700 100644
--- a/arch/arm/mach-ixp23xx/pci.c
+++ b/arch/arm/mach-ixp23xx/pci.c
@@ -227,6 +227,9 @@ static void __init ixp23xx_pci_common_init(void)
227 227
228void __init ixp23xx_pci_preinit(void) 228void __init ixp23xx_pci_preinit(void)
229{ 229{
230 pcibios_min_io = 0;
231 pcibios_min_mem = 0xe0000000;
232
230 pci_set_flags(0); 233 pci_set_flags(0);
231 234
232 ixp23xx_pci_common_init(); 235 ixp23xx_pci_common_init();
diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c
index e9a589395723..3e81000b3e92 100644
--- a/arch/arm/mach-ixp4xx/common-pci.c
+++ b/arch/arm/mach-ixp4xx/common-pci.c
@@ -346,6 +346,11 @@ void __init ixp4xx_pci_preinit(void)
346{ 346{
347 unsigned long cpuid = read_cpuid_id(); 347 unsigned long cpuid = read_cpuid_id();
348 348
349#ifdef CONFIG_IXP4XX_INDIRECT_PCI
350 pcibios_min_mem = 0x10000000; /* 1 GB of indirect PCI MMIO space */
351#else
352 pcibios_min_mem = 0x48000000; /* 64 MB of PCI MMIO space */
353#endif
349 /* 354 /*
350 * Determine which PCI read method to use. 355 * Determine which PCI read method to use.
351 * Rev 0 IXP425 requires workaround. 356 * Rev 0 IXP425 requires workaround.
diff --git a/arch/arm/mach-ixp4xx/include/mach/hardware.h b/arch/arm/mach-ixp4xx/include/mach/hardware.h
index 163e506764de..c30e7e923a73 100644
--- a/arch/arm/mach-ixp4xx/include/mach/hardware.h
+++ b/arch/arm/mach-ixp4xx/include/mach/hardware.h
@@ -17,12 +17,9 @@
17#ifndef __ASM_ARCH_HARDWARE_H__ 17#ifndef __ASM_ARCH_HARDWARE_H__
18#define __ASM_ARCH_HARDWARE_H__ 18#define __ASM_ARCH_HARDWARE_H__
19 19
20#define PCIBIOS_MIN_IO 0x00001000
21#ifdef CONFIG_IXP4XX_INDIRECT_PCI 20#ifdef CONFIG_IXP4XX_INDIRECT_PCI
22#define PCIBIOS_MIN_MEM 0x10000000 /* 1 GB of indirect PCI MMIO space */
23#define PCIBIOS_MAX_MEM 0x4FFFFFFF 21#define PCIBIOS_MAX_MEM 0x4FFFFFFF
24#else 22#else
25#define PCIBIOS_MIN_MEM 0x48000000 /* 64 MB of PCI MMIO space */
26#define PCIBIOS_MAX_MEM 0x4BFFFFFF 23#define PCIBIOS_MAX_MEM 0x4BFFFFFF
27#endif 24#endif
28 25
diff --git a/arch/arm/mach-kirkwood/include/mach/hardware.h b/arch/arm/mach-kirkwood/include/mach/hardware.h
index 31b81fefad59..470899b6a3f5 100644
--- a/arch/arm/mach-kirkwood/include/mach/hardware.h
+++ b/arch/arm/mach-kirkwood/include/mach/hardware.h
@@ -11,7 +11,6 @@
11 11
12#include "kirkwood.h" 12#include "kirkwood.h"
13 13
14#define PCIBIOS_MIN_MEM 0x01000000
15#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */ 14#define PCIMEM_BASE KIRKWOOD_PCIE_MEM_PHYS_BASE /* mem base for VGA */
16 15
17 16
diff --git a/arch/arm/mach-ks8695/include/mach/hardware.h b/arch/arm/mach-ks8695/include/mach/hardware.h
index a46be88d8965..5e0c388143da 100644
--- a/arch/arm/mach-ks8695/include/mach/hardware.h
+++ b/arch/arm/mach-ks8695/include/mach/hardware.h
@@ -42,11 +42,4 @@
42#define KS8695_PCIIO_PA 0x80000000 42#define KS8695_PCIIO_PA 0x80000000
43#define KS8695_PCIIO_SIZE SZ_64K 43#define KS8695_PCIIO_SIZE SZ_64K
44 44
45
46/*
47 * PCI support
48 */
49#define PCIBIOS_MIN_IO 0
50#define PCIBIOS_MIN_MEM 0
51
52#endif 45#endif
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c
index 5fcd082a17f9..c7c9a188d105 100644
--- a/arch/arm/mach-ks8695/pci.c
+++ b/arch/arm/mach-ks8695/pci.c
@@ -317,6 +317,9 @@ void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg)
317 return; 317 return;
318 } 318 }
319 319
320 pcibios_min_io = 0;
321 pcibios_min_mem = 0;
322
320 printk(KERN_INFO "PCI: Initialising\n"); 323 printk(KERN_INFO "PCI: Initialising\n");
321 ks8695_show_pciregs(); 324 ks8695_show_pciregs();
322 325
diff --git a/arch/arm/mach-mv78xx0/include/mach/hardware.h b/arch/arm/mach-mv78xx0/include/mach/hardware.h
index c76b93f1c164..29e37ed5f7f5 100644
--- a/arch/arm/mach-mv78xx0/include/mach/hardware.h
+++ b/arch/arm/mach-mv78xx0/include/mach/hardware.h
@@ -11,8 +11,6 @@
11 11
12#include "mv78xx0.h" 12#include "mv78xx0.h"
13 13
14#define PCIBIOS_MIN_IO 0x00001000
15#define PCIBIOS_MIN_MEM 0x01000000
16#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */ 14#define PCIMEM_BASE MV78XX0_PCIE_MEM_PHYS_BASE /* mem base for VGA */
17 15
18 16
diff --git a/arch/arm/mach-orion5x/include/mach/hardware.h b/arch/arm/mach-orion5x/include/mach/hardware.h
index a42b74389a44..b6d55bc3b2f8 100644
--- a/arch/arm/mach-orion5x/include/mach/hardware.h
+++ b/arch/arm/mach-orion5x/include/mach/hardware.h
@@ -11,8 +11,6 @@
11 11
12#include "orion5x.h" 12#include "orion5x.h"
13 13
14#define PCIBIOS_MIN_IO 0x00001000
15#define PCIBIOS_MIN_MEM 0x01000000
16#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE 14#define PCIMEM_BASE ORION5X_PCIE_MEM_PHYS_BASE
17 15
18 16
diff --git a/arch/arm/mach-pxa/cm-x2xx-pci.c b/arch/arm/mach-pxa/cm-x2xx-pci.c
index 1afc0fb7d6d5..4eb7660a279d 100644
--- a/arch/arm/mach-pxa/cm-x2xx-pci.c
+++ b/arch/arm/mach-pxa/cm-x2xx-pci.c
@@ -125,6 +125,9 @@ static void cmx2xx_pci_preinit(void)
125{ 125{
126 pr_info("Initializing CM-X2XX PCI subsystem\n"); 126 pr_info("Initializing CM-X2XX PCI subsystem\n");
127 127
128 pcibios_min_io = 0;
129 pcibios_min_mem = 0;
130
128 __raw_writel(0x800, IT8152_PCI_CFG_ADDR); 131 __raw_writel(0x800, IT8152_PCI_CFG_ADDR);
129 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) { 132 if (__raw_readl(IT8152_PCI_CFG_DATA) == 0x81521283) {
130 pr_info("PCI Bridge found.\n"); 133 pr_info("PCI Bridge found.\n");
diff --git a/arch/arm/mach-pxa/include/mach/hardware.h b/arch/arm/mach-pxa/include/mach/hardware.h
index b4ea3926a3f2..de63ca3016b4 100644
--- a/arch/arm/mach-pxa/include/mach/hardware.h
+++ b/arch/arm/mach-pxa/include/mach/hardware.h
@@ -337,8 +337,6 @@ extern unsigned long get_clock_tick_rate(void);
337#endif 337#endif
338 338
339#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI) 339#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
340#define PCIBIOS_MIN_IO 0
341#define PCIBIOS_MIN_MEM 0
342#define ARCH_HAS_DMA_SET_COHERENT_MASK 340#define ARCH_HAS_DMA_SET_COHERENT_MASK
343#endif 341#endif
344 342
diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h
index 5946af276dc7..99f5856d8de4 100644
--- a/arch/arm/mach-sa1100/include/mach/hardware.h
+++ b/arch/arm/mach-sa1100/include/mach/hardware.h
@@ -76,11 +76,4 @@ static inline unsigned long get_clock_tick_rate(void)
76#include "SA-1101.h" 76#include "SA-1101.h"
77#endif 77#endif
78 78
79#if defined(CONFIG_ARCH_SA1100) && defined(CONFIG_PCI)
80#define PCIBIOS_MIN_IO 0
81#define PCIBIOS_MIN_MEM 0
82#define HAVE_ARCH_PCI_SET_DMA_MASK 1
83#endif
84
85
86#endif /* _ASM_ARCH_HARDWARE_H */ 79#endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-sa1100/pci-nanoengine.c b/arch/arm/mach-sa1100/pci-nanoengine.c
index fba7a913f12b..5fc074fe3eee 100644
--- a/arch/arm/mach-sa1100/pci-nanoengine.c
+++ b/arch/arm/mach-sa1100/pci-nanoengine.c
@@ -252,6 +252,9 @@ int __init pci_nanoengine_setup(int nr, struct pci_sys_data *sys)
252{ 252{
253 int ret = 0; 253 int ret = 0;
254 254
255 pcibios_min_io = 0;
256 pcibios_min_mem = 0;
257
255 if (nr == 0) { 258 if (nr == 0) {
256 sys->mem_offset = NANO_PCI_MEM_RW_PHYS; 259 sys->mem_offset = NANO_PCI_MEM_RW_PHYS;
257 sys->io_offset = 0x400; 260 sys->io_offset = 0x400;
diff --git a/arch/arm/mach-shark/include/mach/hardware.h b/arch/arm/mach-shark/include/mach/hardware.h
index 24639ce5d308..4342931a1502 100644
--- a/arch/arm/mach-shark/include/mach/hardware.h
+++ b/arch/arm/mach-shark/include/mach/hardware.h
@@ -12,8 +12,6 @@
12 12
13#define UNCACHEABLE_ADDR 0xdf010000 13#define UNCACHEABLE_ADDR 0xdf010000
14 14
15#define PCIBIOS_MIN_IO 0x6000
16#define PCIBIOS_MIN_MEM 0x50000000
17#define PCIMEM_BASE 0xe8000000 15#define PCIMEM_BASE 0xe8000000
18 16
19#endif 17#endif
diff --git a/arch/arm/mach-shark/pci.c b/arch/arm/mach-shark/pci.c
index 89d175ce74d2..4aea637a2ddb 100644
--- a/arch/arm/mach-shark/pci.c
+++ b/arch/arm/mach-shark/pci.c
@@ -37,8 +37,14 @@ static struct hw_pci shark_pci __initdata = {
37 37
38static int __init shark_pci_init(void) 38static int __init shark_pci_init(void)
39{ 39{
40 if (machine_is_shark()) 40 if (!machine_is_shark())
41 pci_common_init(&shark_pci); 41 return;
42
43 pcibios_min_io = 0x6000;
44 pcibios_min_mem = 0x50000000;
45
46 pci_common_init(&shark_pci);
47
42 return 0; 48 return 0;
43} 49}
44 50
diff --git a/arch/arm/mach-tegra/include/mach/hardware.h b/arch/arm/mach-tegra/include/mach/hardware.h
deleted file mode 100644
index 84c2658427d4..000000000000
--- a/arch/arm/mach-tegra/include/mach/hardware.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * arch/arm/mach-tegra/include/mach/hardware.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 * Colin Cross <ccross@google.com>
8 * Erik Gilling <konkers@google.com>
9 *
10 * This software is licensed under the terms of the GNU General Public
11 * License version 2, as published by the Free Software Foundation, and
12 * may be copied, distributed, and modified under those terms.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#ifndef __MACH_TEGRA_HARDWARE_H
22#define __MACH_TEGRA_HARDWARE_H
23
24#define PCIBIOS_MIN_IO 0x1000
25#define PCIBIOS_MIN_MEM 0
26
27#endif
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c
index 2941212b853c..031cd0a7d71d 100644
--- a/arch/arm/mach-tegra/pcie.c
+++ b/arch/arm/mach-tegra/pcie.c
@@ -912,6 +912,8 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1)
912 if (!(init_port0 || init_port1)) 912 if (!(init_port0 || init_port1))
913 return -ENODEV; 913 return -ENODEV;
914 914
915 pcibios_min_mem = 0;
916
915 err = tegra_pcie_get_resources(); 917 err = tegra_pcie_get_resources();
916 if (err) 918 if (err)
917 return err; 919 return err;
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 8f60e9481fbb..4d4973dd8fba 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -30,10 +30,6 @@
30#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul 30#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul
31#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul 31#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul
32 32
33/* CIK guesswork */
34#define PCIBIOS_MIN_IO 0x44000000
35#define PCIBIOS_MIN_MEM 0x50000000
36
37/* macro to get at IO space when running virtually */ 33/* macro to get at IO space when running virtually */
38#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 34#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
39 35
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 13c7e5f90a82..7848a177b1f0 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -311,6 +311,9 @@ struct pci_bus * __init pci_versatile_scan_bus(int nr, struct pci_sys_data *sys)
311 311
312void __init pci_versatile_preinit(void) 312void __init pci_versatile_preinit(void)
313{ 313{
314 pcibios_min_io = 0x44000000;
315 pcibios_min_mem = 0x50000000;
316
314 __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0); 317 __raw_writel(VERSATILE_PCI_MEM_BASE0 >> 28, PCI_IMAP0);
315 __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28, PCI_IMAP1); 318 __raw_writel(VERSATILE_PCI_MEM_BASE1 >> 28, PCI_IMAP1);
316 __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28, PCI_IMAP2); 319 __raw_writel(VERSATILE_PCI_MEM_BASE2 >> 28, PCI_IMAP2);
diff --git a/arch/arm/mm/iomap.c b/arch/arm/mm/iomap.c
index ad41414c0280..3d46cf466c4c 100644
--- a/arch/arm/mm/iomap.c
+++ b/arch/arm/mm/iomap.c
@@ -8,7 +8,6 @@
8#include <linux/pci.h> 8#include <linux/pci.h>
9#include <linux/ioport.h> 9#include <linux/ioport.h>
10#include <linux/io.h> 10#include <linux/io.h>
11#include <asm/pci.h>
12 11
13#ifdef __io 12#ifdef __io
14void __iomem *ioport_map(unsigned long port, unsigned int nr) 13void __iomem *ioport_map(unsigned long port, unsigned int nr)
@@ -24,6 +23,12 @@ EXPORT_SYMBOL(ioport_unmap);
24#endif 23#endif
25 24
26#ifdef CONFIG_PCI 25#ifdef CONFIG_PCI
26unsigned long pcibios_min_io = 0x1000;
27EXPORT_SYMBOL(pcibios_min_io);
28
29unsigned long pcibios_min_mem = 0x01000000;
30EXPORT_SYMBOL(pcibios_min_mem);
31
27unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC; 32unsigned int pci_flags = PCI_REASSIGN_ALL_RSRC;
28EXPORT_SYMBOL(pci_flags); 33EXPORT_SYMBOL(pci_flags);
29 34
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 43f2b158237c..845549cbbb27 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -374,6 +374,9 @@ void __init iop3xx_pci_preinit_cond(void)
374 374
375void __init iop3xx_pci_preinit(void) 375void __init iop3xx_pci_preinit(void)
376{ 376{
377 pcibios_min_io = 0;
378 pcibios_min_mem = 0;
379
377 iop3xx_atu_disable(); 380 iop3xx_atu_disable();
378 iop3xx_atu_setup(); 381 iop3xx_atu_setup();
379 iop3xx_atu_debug(); 382 iop3xx_atu_debug();