diff options
author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 11:29:05 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-01-30 11:29:05 -0500 |
commit | c9cc8e771cb62e495765793e4b7d06016ae1b525 (patch) | |
tree | 42c3ae364cd8b22e3263403f0baa2b5e8070b5da /arch | |
parent | 59df3230fc57fa8900bebf3d2d68221d549f3c7c (diff) | |
parent | b9d1902cd281d9b829fb3d6ee9148d28c8c63382 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 4117/1: S3C2412: Fix writel() usage in selection code
[ARM] 4111/1: Allow VFP to work with thread migration on SMP
[ARM] 4112/1: Only ioremap to supersections if DOMAIN_IO is zero
[ARM] 4106/1: S3C2410: typo fixes in register definitions
[ARM] 4102/1: Allow for PHYS_OFFSET on any valid 2MiB address
[ARM] Fix AMBA serial drivers for non-first serial ports
[ARM] 4100/1: iop3xx: fix cpu mask for iop333
[ARM] Update mach-types
[ARM] Fix show_mem() for discontigmem
[ARM] 4096/1: S3C24XX: change return code form s3c2410_gpio_getcfg()
[ARM] 4095/1: S3C24XX: Fix GPIO set for Bank A
[ARM] 4092/1: i.MX/MX1 CPU Frequency scaling latency definition
[ARM] 4089/1: AT91: GPIO wake IRQ cleanup
[ARM] 4088/1: AT91: Unbalanced IRQ in serial driver suspend/resume
[ARM] 4087/1: AT91: CPU reset for SAM9x processors
[ARM] 4086/1: AT91: Whitespace cleanup
[ARM] 4085/1: AT91: Header fixes.
[ARM] 4084/1: Remove CONFIG_DEBUG_WAITQ
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/configs/at91sam9260ek_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/configs/at91sam9261ek_defconfig | 1 | ||||
-rw-r--r-- | arch/arm/kernel/head.S | 7 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/at91rm9200_devices.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/at91sam9260.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/at91sam9261.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-at91rm9200/gpio.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-imx/cpufreq.c | 14 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/gpio.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/pm.c | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c2410/s3c2412-dma.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/init.c | 11 | ||||
-rw-r--r-- | arch/arm/mm/ioremap.c | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 2 | ||||
-rw-r--r-- | arch/arm/tools/mach-types | 25 | ||||
-rw-r--r-- | arch/arm/vfp/entry.S | 1 | ||||
-rw-r--r-- | arch/arm/vfp/vfp.h | 4 | ||||
-rw-r--r-- | arch/arm/vfp/vfphw.S | 26 | ||||
-rw-r--r-- | arch/arm/vfp/vfpmodule.c | 30 |
19 files changed, 139 insertions, 56 deletions
diff --git a/arch/arm/configs/at91sam9260ek_defconfig b/arch/arm/configs/at91sam9260ek_defconfig index 79049206dfa5..46b0c734aeb9 100644 --- a/arch/arm/configs/at91sam9260ek_defconfig +++ b/arch/arm/configs/at91sam9260ek_defconfig | |||
@@ -923,7 +923,6 @@ CONFIG_FORCED_INLINING=y | |||
923 | # CONFIG_HEADERS_CHECK is not set | 923 | # CONFIG_HEADERS_CHECK is not set |
924 | # CONFIG_RCU_TORTURE_TEST is not set | 924 | # CONFIG_RCU_TORTURE_TEST is not set |
925 | CONFIG_DEBUG_USER=y | 925 | CONFIG_DEBUG_USER=y |
926 | # CONFIG_DEBUG_WAITQ is not set | ||
927 | # CONFIG_DEBUG_ERRORS is not set | 926 | # CONFIG_DEBUG_ERRORS is not set |
928 | CONFIG_DEBUG_LL=y | 927 | CONFIG_DEBUG_LL=y |
929 | # CONFIG_DEBUG_ICEDCC is not set | 928 | # CONFIG_DEBUG_ICEDCC is not set |
diff --git a/arch/arm/configs/at91sam9261ek_defconfig b/arch/arm/configs/at91sam9261ek_defconfig index 784ad7c0186d..fcd8fa091e9d 100644 --- a/arch/arm/configs/at91sam9261ek_defconfig +++ b/arch/arm/configs/at91sam9261ek_defconfig | |||
@@ -1079,7 +1079,6 @@ CONFIG_FORCED_INLINING=y | |||
1079 | # CONFIG_HEADERS_CHECK is not set | 1079 | # CONFIG_HEADERS_CHECK is not set |
1080 | # CONFIG_RCU_TORTURE_TEST is not set | 1080 | # CONFIG_RCU_TORTURE_TEST is not set |
1081 | CONFIG_DEBUG_USER=y | 1081 | CONFIG_DEBUG_USER=y |
1082 | # CONFIG_DEBUG_WAITQ is not set | ||
1083 | # CONFIG_DEBUG_ERRORS is not set | 1082 | # CONFIG_DEBUG_ERRORS is not set |
1084 | CONFIG_DEBUG_LL=y | 1083 | CONFIG_DEBUG_LL=y |
1085 | # CONFIG_DEBUG_ICEDCC is not set | 1084 | # CONFIG_DEBUG_ICEDCC is not set |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index d994561816a1..cf495a3084b3 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -22,6 +22,10 @@ | |||
22 | #include <asm/thread_info.h> | 22 | #include <asm/thread_info.h> |
23 | #include <asm/system.h> | 23 | #include <asm/system.h> |
24 | 24 | ||
25 | #if (PHYS_OFFSET & 0x001fffff) | ||
26 | #error "PHYS_OFFSET must be at an even 2MiB boundary!" | ||
27 | #endif | ||
28 | |||
25 | #define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET) | 29 | #define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET) |
26 | #define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET) | 30 | #define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET) |
27 | 31 | ||
@@ -251,7 +255,8 @@ __create_page_tables: | |||
251 | * Then map first 1MB of ram in case it contains our boot params. | 255 | * Then map first 1MB of ram in case it contains our boot params. |
252 | */ | 256 | */ |
253 | add r0, r4, #PAGE_OFFSET >> 18 | 257 | add r0, r4, #PAGE_OFFSET >> 18 |
254 | orr r6, r7, #PHYS_OFFSET | 258 | orr r6, r7, #(PHYS_OFFSET & 0xff000000) |
259 | orr r6, r6, #(PHYS_OFFSET & 0x00e00000) | ||
255 | str r6, [r0] | 260 | str r6, [r0] |
256 | 261 | ||
257 | #ifdef CONFIG_XIP_KERNEL | 262 | #ifdef CONFIG_XIP_KERNEL |
diff --git a/arch/arm/mach-at91rm9200/at91rm9200_devices.c b/arch/arm/mach-at91rm9200/at91rm9200_devices.c index 4641b99db0ee..57fac7203fe4 100644 --- a/arch/arm/mach-at91rm9200/at91rm9200_devices.c +++ b/arch/arm/mach-at91rm9200/at91rm9200_devices.c | |||
@@ -272,7 +272,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) | |||
272 | at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ | 272 | at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */ |
273 | 273 | ||
274 | /* nWAIT is _not_ a default setting */ | 274 | /* nWAIT is _not_ a default setting */ |
275 | at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */ | 275 | at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */ |
276 | 276 | ||
277 | cf_data = *data; | 277 | cf_data = *data; |
278 | platform_device_register(&at91rm9200_cf_device); | 278 | platform_device_register(&at91rm9200_cf_device); |
diff --git a/arch/arm/mach-at91rm9200/at91sam9260.c b/arch/arm/mach-at91rm9200/at91sam9260.c index 203f073a53e6..b14871adc300 100644 --- a/arch/arm/mach-at91rm9200/at91sam9260.c +++ b/arch/arm/mach-at91rm9200/at91sam9260.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | #include <asm/arch/at91sam9260.h> | 17 | #include <asm/arch/at91sam9260.h> |
18 | #include <asm/arch/at91_pmc.h> | 18 | #include <asm/arch/at91_pmc.h> |
19 | #include <asm/arch/at91_rstc.h> | ||
19 | 20 | ||
20 | #include "generic.h" | 21 | #include "generic.h" |
21 | #include "clock.h" | 22 | #include "clock.h" |
@@ -212,7 +213,7 @@ static struct at91_gpio_bank at91sam9260_gpio[] = { | |||
212 | 213 | ||
213 | static void at91sam9260_reset(void) | 214 | static void at91sam9260_reset(void) |
214 | { | 215 | { |
215 | #warning "Implement CPU reset" | 216 | at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
216 | } | 217 | } |
217 | 218 | ||
218 | 219 | ||
diff --git a/arch/arm/mach-at91rm9200/at91sam9261.c b/arch/arm/mach-at91rm9200/at91sam9261.c index 5a82f35da2e9..d242bb885c6d 100644 --- a/arch/arm/mach-at91rm9200/at91sam9261.c +++ b/arch/arm/mach-at91rm9200/at91sam9261.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/mach/map.h> | 16 | #include <asm/mach/map.h> |
17 | #include <asm/arch/at91sam9261.h> | 17 | #include <asm/arch/at91sam9261.h> |
18 | #include <asm/arch/at91_pmc.h> | 18 | #include <asm/arch/at91_pmc.h> |
19 | #include <asm/arch/at91_rstc.h> | ||
19 | 20 | ||
20 | #include "generic.h" | 21 | #include "generic.h" |
21 | #include "clock.h" | 22 | #include "clock.h" |
@@ -207,7 +208,7 @@ static struct at91_gpio_bank at91sam9261_gpio[] = { | |||
207 | 208 | ||
208 | static void at91sam9261_reset(void) | 209 | static void at91sam9261_reset(void) |
209 | { | 210 | { |
210 | #warning "Implement CPU reset" | 211 | at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
211 | } | 212 | } |
212 | 213 | ||
213 | 214 | ||
diff --git a/arch/arm/mach-at91rm9200/gpio.c b/arch/arm/mach-at91rm9200/gpio.c index 3f188508c391..af22659c8a28 100644 --- a/arch/arm/mach-at91rm9200/gpio.c +++ b/arch/arm/mach-at91rm9200/gpio.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <asm/io.h> | 20 | #include <asm/io.h> |
21 | #include <asm/hardware.h> | 21 | #include <asm/hardware.h> |
22 | #include <asm/arch/at91_pio.h> | 22 | #include <asm/arch/at91_pio.h> |
23 | #include <asm/arch/at91_pmc.h> | ||
24 | #include <asm/arch/gpio.h> | 23 | #include <asm/arch/gpio.h> |
25 | 24 | ||
26 | #include "generic.h" | 25 | #include "generic.h" |
@@ -224,17 +223,17 @@ static u32 backups[MAX_GPIO_BANKS]; | |||
224 | static int gpio_irq_set_wake(unsigned pin, unsigned state) | 223 | static int gpio_irq_set_wake(unsigned pin, unsigned state) |
225 | { | 224 | { |
226 | unsigned mask = pin_to_mask(pin); | 225 | unsigned mask = pin_to_mask(pin); |
226 | unsigned bank = (pin - PIN_BASE) / 32; | ||
227 | 227 | ||
228 | pin -= PIN_BASE; | 228 | if (unlikely(bank >= MAX_GPIO_BANKS)) |
229 | pin /= 32; | ||
230 | |||
231 | if (unlikely(pin >= MAX_GPIO_BANKS)) | ||
232 | return -EINVAL; | 229 | return -EINVAL; |
233 | 230 | ||
234 | if (state) | 231 | if (state) |
235 | wakeups[pin] |= mask; | 232 | wakeups[bank] |= mask; |
236 | else | 233 | else |
237 | wakeups[pin] &= ~mask; | 234 | wakeups[bank] &= ~mask; |
235 | |||
236 | set_irq_wake(gpio[bank].id, state); | ||
238 | 237 | ||
239 | return 0; | 238 | return 0; |
240 | } | 239 | } |
@@ -246,29 +245,15 @@ void at91_gpio_suspend(void) | |||
246 | for (i = 0; i < gpio_banks; i++) { | 245 | for (i = 0; i < gpio_banks; i++) { |
247 | u32 pio = gpio[i].offset; | 246 | u32 pio = gpio[i].offset; |
248 | 247 | ||
249 | /* | ||
250 | * Note: drivers should have disabled GPIO interrupts that | ||
251 | * aren't supposed to be wakeup sources. | ||
252 | * But that is not much good on ARM..... disable_irq() does | ||
253 | * not update the hardware immediately, so the hardware mask | ||
254 | * (IMR) has the wrong value (not current, too much is | ||
255 | * permitted). | ||
256 | * | ||
257 | * Our workaround is to disable all non-wakeup IRQs ... | ||
258 | * which is exactly what correct drivers asked for in the | ||
259 | * first place! | ||
260 | */ | ||
261 | backups[i] = at91_sys_read(pio + PIO_IMR); | 248 | backups[i] = at91_sys_read(pio + PIO_IMR); |
262 | at91_sys_write(pio + PIO_IDR, backups[i]); | 249 | at91_sys_write(pio + PIO_IDR, backups[i]); |
263 | at91_sys_write(pio + PIO_IER, wakeups[i]); | 250 | at91_sys_write(pio + PIO_IER, wakeups[i]); |
264 | 251 | ||
265 | if (!wakeups[i]) { | 252 | if (!wakeups[i]) |
266 | disable_irq_wake(gpio[i].id); | 253 | clk_disable(gpio[i].clock); |
267 | at91_sys_write(AT91_PMC_PCDR, 1 << gpio[i].id); | 254 | else { |
268 | } else { | ||
269 | enable_irq_wake(gpio[i].id); | ||
270 | #ifdef CONFIG_PM_DEBUG | 255 | #ifdef CONFIG_PM_DEBUG |
271 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]); | 256 | printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); |
272 | #endif | 257 | #endif |
273 | } | 258 | } |
274 | } | 259 | } |
@@ -281,9 +266,11 @@ void at91_gpio_resume(void) | |||
281 | for (i = 0; i < gpio_banks; i++) { | 266 | for (i = 0; i < gpio_banks; i++) { |
282 | u32 pio = gpio[i].offset; | 267 | u32 pio = gpio[i].offset; |
283 | 268 | ||
269 | if (!wakeups[i]) | ||
270 | clk_enable(gpio[i].clock); | ||
271 | |||
284 | at91_sys_write(pio + PIO_IDR, wakeups[i]); | 272 | at91_sys_write(pio + PIO_IDR, wakeups[i]); |
285 | at91_sys_write(pio + PIO_IER, backups[i]); | 273 | at91_sys_write(pio + PIO_IER, backups[i]); |
286 | at91_sys_write(AT91_PMC_PCER, 1 << gpio[i].id); | ||
287 | } | 274 | } |
288 | } | 275 | } |
289 | 276 | ||
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c index ac5f99895660..4f66e90db74f 100644 --- a/arch/arm/mach-imx/cpufreq.c +++ b/arch/arm/mach-imx/cpufreq.c | |||
@@ -184,6 +184,17 @@ static int imx_set_target(struct cpufreq_policy *policy, | |||
184 | long sysclk; | 184 | long sysclk; |
185 | unsigned int bclk_div = 1; | 185 | unsigned int bclk_div = 1; |
186 | 186 | ||
187 | /* | ||
188 | * Some governors do not respects CPU and policy lower limits | ||
189 | * which leads to bad things (division by zero etc), ensure | ||
190 | * that such things do not happen. | ||
191 | */ | ||
192 | if(target_freq < policy->cpuinfo.min_freq) | ||
193 | target_freq = policy->cpuinfo.min_freq; | ||
194 | |||
195 | if(target_freq < policy->min) | ||
196 | target_freq = policy->min; | ||
197 | |||
187 | freq = target_freq * 1000; | 198 | freq = target_freq * 1000; |
188 | 199 | ||
189 | pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", | 200 | pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", |
@@ -258,7 +269,8 @@ static int __init imx_cpufreq_driver_init(struct cpufreq_policy *policy) | |||
258 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | 269 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; |
259 | policy->cpuinfo.min_freq = 8000; | 270 | policy->cpuinfo.min_freq = 8000; |
260 | policy->cpuinfo.max_freq = 200000; | 271 | policy->cpuinfo.max_freq = 200000; |
261 | policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; | 272 | /* Manual states, that PLL stabilizes in two CLK32 periods */ |
273 | policy->cpuinfo.transition_latency = 4 * 1000000000LL / CLK32; | ||
262 | return 0; | 274 | return 0; |
263 | } | 275 | } |
264 | 276 | ||
diff --git a/arch/arm/mach-s3c2410/gpio.c b/arch/arm/mach-s3c2410/gpio.c index ba346546150b..f6fb215bb48c 100644 --- a/arch/arm/mach-s3c2410/gpio.c +++ b/arch/arm/mach-s3c2410/gpio.c | |||
@@ -57,6 +57,7 @@ void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function) | |||
57 | case S3C2410_GPIO_SFN2: | 57 | case S3C2410_GPIO_SFN2: |
58 | case S3C2410_GPIO_SFN3: | 58 | case S3C2410_GPIO_SFN3: |
59 | if (pin < S3C2410_GPIO_BANKB) { | 59 | if (pin < S3C2410_GPIO_BANKB) { |
60 | function -= 1; | ||
60 | function &= 1; | 61 | function &= 1; |
61 | function <<= S3C2410_GPIO_OFFSET(pin); | 62 | function <<= S3C2410_GPIO_OFFSET(pin); |
62 | } else { | 63 | } else { |
@@ -83,15 +84,18 @@ EXPORT_SYMBOL(s3c2410_gpio_cfgpin); | |||
83 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) | 84 | unsigned int s3c2410_gpio_getcfg(unsigned int pin) |
84 | { | 85 | { |
85 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | 86 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
86 | unsigned long mask; | 87 | unsigned long val = __raw_readl(base); |
87 | 88 | ||
88 | if (pin < S3C2410_GPIO_BANKB) { | 89 | if (pin < S3C2410_GPIO_BANKB) { |
89 | mask = 1 << S3C2410_GPIO_OFFSET(pin); | 90 | val >>= S3C2410_GPIO_OFFSET(pin); |
91 | val &= 1; | ||
92 | val += 1; | ||
90 | } else { | 93 | } else { |
91 | mask = 3 << S3C2410_GPIO_OFFSET(pin)*2; | 94 | val >>= S3C2410_GPIO_OFFSET(pin)*2; |
95 | val &= 3; | ||
92 | } | 96 | } |
93 | 97 | ||
94 | return __raw_readl(base) & mask; | 98 | return val | S3C2410_GPIO_INPUT; |
95 | } | 99 | } |
96 | 100 | ||
97 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); | 101 | EXPORT_SYMBOL(s3c2410_gpio_getcfg); |
diff --git a/arch/arm/mach-s3c2410/pm.c b/arch/arm/mach-s3c2410/pm.c index 00834097eb82..ebf294dd31da 100644 --- a/arch/arm/mach-s3c2410/pm.c +++ b/arch/arm/mach-s3c2410/pm.c | |||
@@ -451,15 +451,14 @@ static void s3c2410_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) | |||
451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); | 451 | irqstate = s3c_irqwake_eintmask & (1L<<irqoffs); |
452 | 452 | ||
453 | pinstate = s3c2410_gpio_getcfg(pin); | 453 | pinstate = s3c2410_gpio_getcfg(pin); |
454 | pinstate >>= S3C2410_GPIO_OFFSET(pin)*2; | ||
455 | 454 | ||
456 | if (!irqstate) { | 455 | if (!irqstate) { |
457 | if (pinstate == 0x02) | 456 | if (pinstate == S3C2410_GPIO_IRQ) |
458 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); | 457 | DBG("Leaving IRQ %d (pin %d) enabled\n", irq, pin); |
459 | } else { | 458 | } else { |
460 | if (pinstate == 0x02) { | 459 | if (pinstate == S3C2410_GPIO_IRQ) { |
461 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); | 460 | DBG("Disabling IRQ %d (pin %d)\n", irq, pin); |
462 | s3c2410_gpio_cfgpin(pin, 0x00); | 461 | s3c2410_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); |
463 | } | 462 | } |
464 | } | 463 | } |
465 | } | 464 | } |
diff --git a/arch/arm/mach-s3c2410/s3c2412-dma.c b/arch/arm/mach-s3c2410/s3c2412-dma.c index fe71a8fdb87c..138f726ac6bf 100644 --- a/arch/arm/mach-s3c2410/s3c2412-dma.c +++ b/arch/arm/mach-s3c2410/s3c2412-dma.c | |||
@@ -133,8 +133,8 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { | |||
133 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, | 133 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, |
134 | struct s3c24xx_dma_map *map) | 134 | struct s3c24xx_dma_map *map) |
135 | { | 135 | { |
136 | writel(chan->regs + S3C2412_DMA_DMAREQSEL, | 136 | writel(map->channels[0] | S3C2412_DMAREQSEL_HW, |
137 | map->channels[0] | S3C2412_DMAREQSEL_HW); | 137 | chan->regs + S3C2412_DMA_DMAREQSEL); |
138 | } | 138 | } |
139 | 139 | ||
140 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { | 140 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { |
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c index b5814b4b6f35..7760193e74cc 100644 --- a/arch/arm/mm/init.c +++ b/arch/arm/mm/init.c | |||
@@ -52,15 +52,18 @@ void show_mem(void) | |||
52 | printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); | 52 | printk("Free swap: %6ldkB\n", nr_swap_pages<<(PAGE_SHIFT-10)); |
53 | 53 | ||
54 | for_each_online_node(node) { | 54 | for_each_online_node(node) { |
55 | pg_data_t *n = NODE_DATA(node); | ||
56 | struct page *map = n->node_mem_map - n->node_start_pfn; | ||
57 | |||
55 | for_each_nodebank (i,mi,node) { | 58 | for_each_nodebank (i,mi,node) { |
56 | unsigned int pfn1, pfn2; | 59 | unsigned int pfn1, pfn2; |
57 | struct page *page, *end; | 60 | struct page *page, *end; |
58 | 61 | ||
59 | pfn1 = mi->bank[i].start >> PAGE_SHIFT; | 62 | pfn1 = __phys_to_pfn(mi->bank[i].start); |
60 | pfn2 = (mi->bank[i].size + mi->bank[i].start) >> PAGE_SHIFT; | 63 | pfn2 = __phys_to_pfn(mi->bank[i].size + mi->bank[i].start); |
61 | 64 | ||
62 | page = NODE_MEM_MAP(node) + pfn1; | 65 | page = map + pfn1; |
63 | end = NODE_MEM_MAP(node) + pfn2; | 66 | end = map + pfn2; |
64 | 67 | ||
65 | do { | 68 | do { |
66 | total++; | 69 | total++; |
diff --git a/arch/arm/mm/ioremap.c b/arch/arm/mm/ioremap.c index 251685fe73a8..0ac615c0f798 100644 --- a/arch/arm/mm/ioremap.c +++ b/arch/arm/mm/ioremap.c | |||
@@ -300,7 +300,8 @@ __ioremap_pfn(unsigned long pfn, unsigned long offset, size_t size, | |||
300 | addr = (unsigned long)area->addr; | 300 | addr = (unsigned long)area->addr; |
301 | 301 | ||
302 | #ifndef CONFIG_SMP | 302 | #ifndef CONFIG_SMP |
303 | if ((((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || | 303 | if (DOMAIN_IO == 0 && |
304 | (((cpu_architecture() >= CPU_ARCH_ARMv6) && (get_cr() & CR_XP)) || | ||
304 | cpu_is_xsc3()) && | 305 | cpu_is_xsc3()) && |
305 | !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { | 306 | !((__pfn_to_phys(pfn) | size | addr) & ~SUPERSECTION_MASK)) { |
306 | area->flags |= VM_ARM_SECTION_MAPPING; | 307 | area->flags |= VM_ARM_SECTION_MAPPING; |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index 490e11b34231..d29fe927ee9e 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -708,7 +708,7 @@ __8032x_proc_info: | |||
708 | .type __8033x_proc_info,#object | 708 | .type __8033x_proc_info,#object |
709 | __8033x_proc_info: | 709 | __8033x_proc_info: |
710 | .long 0x69054010 | 710 | .long 0x69054010 |
711 | .long 0xffffff30 | 711 | .long 0xfffffd30 |
712 | .long PMD_TYPE_SECT | \ | 712 | .long PMD_TYPE_SECT | \ |
713 | PMD_SECT_BUFFERABLE | \ | 713 | PMD_SECT_BUFFERABLE | \ |
714 | PMD_SECT_CACHEABLE | \ | 714 | PMD_SECT_CACHEABLE | \ |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 8bcb838e5444..bd78058b7178 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -12,7 +12,7 @@ | |||
12 | # | 12 | # |
13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | # | 14 | # |
15 | # Last update: Thu Dec 7 17:19:20 2006 | 15 | # Last update: Tue Jan 16 16:52:56 2007 |
16 | # | 16 | # |
17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | # | 18 | # |
@@ -1219,3 +1219,26 @@ zevio_1020 MACH_ZEVIO_1020 ZEVIO_1020 1207 | |||
1219 | hitrack MACH_HITRACK HITRACK 1208 | 1219 | hitrack MACH_HITRACK HITRACK 1208 |
1220 | syme1 MACH_SYME1 SYME1 1209 | 1220 | syme1 MACH_SYME1 SYME1 1209 |
1221 | syhl1 MACH_SYHL1 SYHL1 1210 | 1221 | syhl1 MACH_SYHL1 SYHL1 1210 |
1222 | empca400 MACH_EMPCA400 EMPCA400 1211 | ||
1223 | em7210 MACH_EM7210 EM7210 1212 | ||
1224 | htchermes MACH_HTCHERMES HTCHERMES 1213 | ||
1225 | eti_c1 MACH_ETI_C1 ETI_C1 1214 | ||
1226 | mach_dep2410 MACH_MACH_DEP2410 MACH_DEP2410 1215 | ||
1227 | ac100 MACH_AC100 AC100 1216 | ||
1228 | sneetch MACH_SNEETCH SNEETCH 1217 | ||
1229 | studentmate MACH_STUDENTMATE STUDENTMATE 1218 | ||
1230 | zir2410 MACH_ZIR2410 ZIR2410 1219 | ||
1231 | zir2413 MACH_ZIR2413 ZIR2413 1220 | ||
1232 | dlonip3 MACH_DLONIP3 DLONIP3 1221 | ||
1233 | instream MACH_INSTREAM INSTREAM 1222 | ||
1234 | ambarella MACH_AMBARELLA AMBARELLA 1223 | ||
1235 | nevis MACH_NEVIS NEVIS 1224 | ||
1236 | htc_trinity MACH_HTC_TRINITY HTC_TRINITY 1225 | ||
1237 | ql202b MACH_QL202B QL202B 1226 | ||
1238 | vpac270 MACH_VPAC270 VPAC270 1227 | ||
1239 | rd129 MACH_RD129 RD129 1228 | ||
1240 | htcwizard MACH_HTCWIZARD HTCWIZARD 1229 | ||
1241 | xscale_treo680 MACH_XSCALE_TREO680 XSCALE_TREO680 1230 | ||
1242 | tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231 | ||
1243 | zylonite MACH_ZYLONITE ZYLONITE 1233 | ||
1244 | gene1270 MACH_GENE1270 GENE1270 1234 | ||
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S index 7b595547c1c8..ca2a5ad19ea6 100644 --- a/arch/arm/vfp/entry.S +++ b/arch/arm/vfp/entry.S | |||
@@ -25,6 +25,7 @@ | |||
25 | do_vfp: | 25 | do_vfp: |
26 | enable_irq | 26 | enable_irq |
27 | ldr r4, .LCvfp | 27 | ldr r4, .LCvfp |
28 | ldr r11, [r10, #TI_CPU] @ CPU number | ||
28 | add r10, r10, #TI_VFPSTATE @ r10 = workspace | 29 | add r10, r10, #TI_VFPSTATE @ r10 = workspace |
29 | ldr pc, [r4] @ call VFP entry point | 30 | ldr pc, [r4] @ call VFP entry point |
30 | 31 | ||
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index f2797896e6d5..54a2ad6d9ca2 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
@@ -370,3 +370,7 @@ struct op { | |||
370 | u32 (* const fn)(int dd, int dn, int dm, u32 fpscr); | 370 | u32 (* const fn)(int dd, int dn, int dm, u32 fpscr); |
371 | u32 flags; | 371 | u32 flags; |
372 | }; | 372 | }; |
373 | |||
374 | #ifdef CONFIG_SMP | ||
375 | extern void vfp_save_state(void *location, u32 fpexc); | ||
376 | #endif | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index e51e6679c402..d4b7b229631d 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -65,6 +65,7 @@ | |||
65 | @ r2 = faulted PC+4 | 65 | @ r2 = faulted PC+4 |
66 | @ r9 = successful return | 66 | @ r9 = successful return |
67 | @ r10 = vfp_state union | 67 | @ r10 = vfp_state union |
68 | @ r11 = CPU number | ||
68 | @ lr = failure return | 69 | @ lr = failure return |
69 | 70 | ||
70 | .globl vfp_support_entry | 71 | .globl vfp_support_entry |
@@ -79,7 +80,7 @@ vfp_support_entry: | |||
79 | DBGSTR1 "enable %x", r10 | 80 | DBGSTR1 "enable %x", r10 |
80 | ldr r3, last_VFP_context_address | 81 | ldr r3, last_VFP_context_address |
81 | orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set | 82 | orr r1, r1, #FPEXC_ENABLE @ user FPEXC has the enable bit set |
82 | ldr r4, [r3] @ last_VFP_context pointer | 83 | ldr r4, [r3, r11, lsl #2] @ last_VFP_context pointer |
83 | bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled | 84 | bic r5, r1, #FPEXC_EXCEPTION @ make sure exceptions are disabled |
84 | cmp r4, r10 | 85 | cmp r4, r10 |
85 | beq check_for_exception @ we are returning to the same | 86 | beq check_for_exception @ we are returning to the same |
@@ -91,7 +92,9 @@ vfp_support_entry: | |||
91 | @ exceptions, so we can get at the | 92 | @ exceptions, so we can get at the |
92 | @ rest of it | 93 | @ rest of it |
93 | 94 | ||
95 | #ifndef CONFIG_SMP | ||
94 | @ Save out the current registers to the old thread state | 96 | @ Save out the current registers to the old thread state |
97 | @ No need for SMP since this is not done lazily | ||
95 | 98 | ||
96 | DBGSTR1 "save old state %p", r4 | 99 | DBGSTR1 "save old state %p", r4 |
97 | cmp r4, #0 | 100 | cmp r4, #0 |
@@ -105,10 +108,11 @@ vfp_support_entry: | |||
105 | stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 | 108 | stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 |
106 | @ and point r4 at the word at the | 109 | @ and point r4 at the word at the |
107 | @ start of the register dump | 110 | @ start of the register dump |
111 | #endif | ||
108 | 112 | ||
109 | no_old_VFP_process: | 113 | no_old_VFP_process: |
110 | DBGSTR1 "load state %p", r10 | 114 | DBGSTR1 "load state %p", r10 |
111 | str r10, [r3] @ update the last_VFP_context pointer | 115 | str r10, [r3, r11, lsl #2] @ update the last_VFP_context pointer |
112 | @ Load the saved state back into the VFP | 116 | @ Load the saved state back into the VFP |
113 | VFPFLDMIA r10 @ reload the working registers while | 117 | VFPFLDMIA r10 @ reload the working registers while |
114 | @ FPEXC is in a safe state | 118 | @ FPEXC is in a safe state |
@@ -162,6 +166,24 @@ process_exception: | |||
162 | @ required. If not, the user code will | 166 | @ required. If not, the user code will |
163 | @ retry the faulted instruction | 167 | @ retry the faulted instruction |
164 | 168 | ||
169 | #ifdef CONFIG_SMP | ||
170 | .globl vfp_save_state | ||
171 | .type vfp_save_state, %function | ||
172 | vfp_save_state: | ||
173 | @ Save the current VFP state | ||
174 | @ r0 - save location | ||
175 | @ r1 - FPEXC | ||
176 | DBGSTR1 "save VFP state %p", r0 | ||
177 | VFPFMRX r2, FPSCR @ current status | ||
178 | VFPFMRX r3, FPINST @ FPINST (always there, rev0 onwards) | ||
179 | tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? | ||
180 | VFPFMRX r12, FPINST2, NE @ FPINST2 if needed - avoids reading | ||
181 | @ nonexistant reg on rev0 | ||
182 | VFPFSTMIA r0 @ save the working registers | ||
183 | stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 | ||
184 | mov pc, lr | ||
185 | #endif | ||
186 | |||
165 | last_VFP_context_address: | 187 | last_VFP_context_address: |
166 | .word last_VFP_context | 188 | .word last_VFP_context |
167 | 189 | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 490d9d18a7d1..f1e5951dc721 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -28,7 +28,7 @@ void vfp_testing_entry(void); | |||
28 | void vfp_support_entry(void); | 28 | void vfp_support_entry(void); |
29 | 29 | ||
30 | void (*vfp_vector)(void) = vfp_testing_entry; | 30 | void (*vfp_vector)(void) = vfp_testing_entry; |
31 | union vfp_state *last_VFP_context; | 31 | union vfp_state *last_VFP_context[NR_CPUS]; |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * Dual-use variable. | 34 | * Dual-use variable. |
@@ -41,13 +41,35 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) | |||
41 | { | 41 | { |
42 | struct thread_info *thread = v; | 42 | struct thread_info *thread = v; |
43 | union vfp_state *vfp; | 43 | union vfp_state *vfp; |
44 | __u32 cpu = thread->cpu; | ||
44 | 45 | ||
45 | if (likely(cmd == THREAD_NOTIFY_SWITCH)) { | 46 | if (likely(cmd == THREAD_NOTIFY_SWITCH)) { |
47 | u32 fpexc = fmrx(FPEXC); | ||
48 | |||
49 | #ifdef CONFIG_SMP | ||
50 | /* | ||
51 | * On SMP, if VFP is enabled, save the old state in | ||
52 | * case the thread migrates to a different CPU. The | ||
53 | * restoring is done lazily. | ||
54 | */ | ||
55 | if ((fpexc & FPEXC_ENABLE) && last_VFP_context[cpu]) { | ||
56 | vfp_save_state(last_VFP_context[cpu], fpexc); | ||
57 | last_VFP_context[cpu]->hard.cpu = cpu; | ||
58 | } | ||
59 | /* | ||
60 | * Thread migration, just force the reloading of the | ||
61 | * state on the new CPU in case the VFP registers | ||
62 | * contain stale data. | ||
63 | */ | ||
64 | if (thread->vfpstate.hard.cpu != cpu) | ||
65 | last_VFP_context[cpu] = NULL; | ||
66 | #endif | ||
67 | |||
46 | /* | 68 | /* |
47 | * Always disable VFP so we can lazily save/restore the | 69 | * Always disable VFP so we can lazily save/restore the |
48 | * old state. | 70 | * old state. |
49 | */ | 71 | */ |
50 | fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_ENABLE); | 72 | fmxr(FPEXC, fpexc & ~FPEXC_ENABLE); |
51 | return NOTIFY_DONE; | 73 | return NOTIFY_DONE; |
52 | } | 74 | } |
53 | 75 | ||
@@ -68,8 +90,8 @@ static int vfp_notifier(struct notifier_block *self, unsigned long cmd, void *v) | |||
68 | } | 90 | } |
69 | 91 | ||
70 | /* flush and release case: Per-thread VFP cleanup. */ | 92 | /* flush and release case: Per-thread VFP cleanup. */ |
71 | if (last_VFP_context == vfp) | 93 | if (last_VFP_context[cpu] == vfp) |
72 | last_VFP_context = NULL; | 94 | last_VFP_context[cpu] = NULL; |
73 | 95 | ||
74 | return NOTIFY_DONE; | 96 | return NOTIFY_DONE; |
75 | } | 97 | } |