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authorMichael Hennerich <michael.hennerich@analog.com>2009-02-04 03:49:45 -0500
committerBryan Wu <cooloney@kernel.org>2009-02-04 03:49:45 -0500
commitc8e674125e03c5f36ccfd61d83b933e6956074b0 (patch)
tree65d77a6bc0da07db03c4e8e990162d1607cb99a3 /arch
parent4e653e04cc1c3553af539ffc81fb56d83d83c733 (diff)
Blackfin arch: Remove outdated code
The removed version with the loop registers saved on the stack was originally intended to workaround the missing toolchain support for LoopReg Clobbers. Since our toolchain now supports these there is no point in keeping this workaround. And since we don't touch LoopRegs anymore we're no longer subject for ANOMALY_05000312. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/include/asm/delay.h24
1 files changed, 1 insertions, 23 deletions
diff --git a/arch/blackfin/include/asm/delay.h b/arch/blackfin/include/asm/delay.h
index 47f98c5067b5..c31f91cc1d5d 100644
--- a/arch/blackfin/include/asm/delay.h
+++ b/arch/blackfin/include/asm/delay.h
@@ -13,29 +13,7 @@
13 13
14static inline void __delay(unsigned long loops) 14static inline void __delay(unsigned long loops)
15{ 15{
16 if (ANOMALY_05000312) { 16__asm__ __volatile__ (
17 /* Interrupted loads to loop registers -> bad */
18 unsigned long tmp;
19 __asm__ __volatile__(
20 "[--SP] = LC0;"
21 "[--SP] = LT0;"
22 "[--SP] = LB0;"
23 "LSETUP (1f,1f) LC0 = %1;"
24 "1: NOP;"
25 /* We take advantage of the fact that LC0 is 0 at
26 * the end of the loop. Otherwise we'd need some
27 * NOPs after the CLI here.
28 */
29 "CLI %0;"
30 "LB0 = [SP++];"
31 "LT0 = [SP++];"
32 "LC0 = [SP++];"
33 "STI %0;"
34 : "=d" (tmp)
35 : "a" (loops)
36 );
37 } else
38 __asm__ __volatile__ (
39 "LSETUP(1f, 1f) LC0 = %0;" 17 "LSETUP(1f, 1f) LC0 = %0;"
40 "1: NOP;" 18 "1: NOP;"
41 : 19 :