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authorOlof Johansson <olof@lixom.net>2015-01-23 17:20:10 -0500
committerOlof Johansson <olof@lixom.net>2015-01-23 17:20:10 -0500
commitc6b4916460e66fc6250d3a3c04ef23e2c178736f (patch)
treee4e40cf78a14291c55db03fbeb402d84578cc0bc /arch
parentfd10a2e4113971f42c05796b8a487fdf10d32c48 (diff)
parentb8be56634b247e5dc892d8ec6d785e77a5f23845 (diff)
Merge tag 'v3.20-next-dts2' of https://github.com/mbgg/linux-mediatek into next/dt
Merge "ARM: mediatek: DT changes for v3.20 (round 2)" from Matthias Brugger: This adds uart support for mt6592 SoC. * tag 'v3.20-next-dts2' of https://github.com/mbgg/linux-mediatek: ARM: mediatek: dts: Add uart to mt6592 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/mt6592.dtsi38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi
index 67c817418392..c69201ffff72 100644
--- a/arch/arm/boot/dts/mt6592.dtsi
+++ b/arch/arm/boot/dts/mt6592.dtsi
@@ -78,6 +78,12 @@
78 #clock-cells = <0>; 78 #clock-cells = <0>;
79 }; 79 };
80 80
81 uart_clk: dummy26m {
82 compatible = "fixed-clock";
83 clock-frequency = <26000000>;
84 #clock-cells = <0>;
85 };
86
81 timer: timer@10008000 { 87 timer: timer@10008000 {
82 compatible = "mediatek,mt6577-timer"; 88 compatible = "mediatek,mt6577-timer";
83 reg = <0x10008000 0x80>; 89 reg = <0x10008000 0x80>;
@@ -102,4 +108,36 @@
102 reg = <0x10211000 0x1000>, 108 reg = <0x10211000 0x1000>,
103 <0x10212000 0x1000>; 109 <0x10212000 0x1000>;
104 }; 110 };
111
112 uart0: serial@11002000 {
113 compatible = "mediatek,mt6577-uart";
114 reg = <0x11002000 0x400>;
115 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
116 clocks = <&uart_clk>;
117 status = "disabled";
118 };
119
120 uart1: serial@11003000 {
121 compatible = "mediatek,mt6577-uart";
122 reg = <0x11003000 0x400>;
123 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
124 clocks = <&uart_clk>;
125 status = "disabled";
126 };
127
128 uart2: serial@11004000 {
129 compatible = "mediatek,mt6577-uart";
130 reg = <0x11004000 0x400>;
131 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_LOW>;
132 clocks = <&uart_clk>;
133 status = "disabled";
134 };
135
136 uart3: serial@11005000 {
137 compatible = "mediatek,mt6577-uart";
138 reg = <0x11005000 0x400>;
139 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_LOW>;
140 clocks = <&uart_clk>;
141 status = "disabled";
142 };
105}; 143};