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authorBernd Schmidt <bernds_cb1@t-online.de>2009-02-04 03:49:45 -0500
committerBryan Wu <cooloney@kernel.org>2009-02-04 03:49:45 -0500
commitbf324cb81a2f7da357eba00b6b1ef1cf38c264b8 (patch)
tree499f8e81d595b0a16652429116587244330bf061 /arch
parent65319628db2c7a630daadfeec4d371aaca788482 (diff)
Blackfin arch: fix bug - traps test case 19 for exception 0x2d fails
Enable null pointer checking for ICPLBs. The code was there but for some reason I had commented it out at some stage during development. Should restrict this to 1K since atomic ops start there. Signed-off-by: Bernd Schmidt <bernds_cb1@t-online.de> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index bdb958486e76..3e329a6ce041 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -63,10 +63,8 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
63 dcplb_tbl[cpu][i_d].addr = 0; 63 dcplb_tbl[cpu][i_d].addr = 0;
64 dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB; 64 dcplb_tbl[cpu][i_d++].data = SDRAM_OOPS | PAGE_SIZE_1KB;
65 65
66#if 0
67 icplb_tbl[cpu][i_i].addr = 0; 66 icplb_tbl[cpu][i_i].addr = 0;
68 icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_4KB; 67 icplb_tbl[cpu][i_i++].data = i_cache | CPLB_USER_RD | PAGE_SIZE_1KB;
69#endif
70 68
71 /* Cover kernel memory with 4M pages. */ 69 /* Cover kernel memory with 4M pages. */
72 addr = 0; 70 addr = 0;