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authorPaul Mundt <lethal@linux-sh.org>2010-09-20 03:00:42 -0400
committerPaul Mundt <lethal@linux-sh.org>2010-09-20 03:00:42 -0400
commitbeb54ad9c6fb60901d9445056d40bdaccdc3e819 (patch)
tree711064a71a66afea852d47c81ecce8ff529ac105 /arch
parent2c65d75ec4dde5e619a462e70cdd7b67e0e64bb8 (diff)
sh: pci: Discard initial PCICONF4/5 settings for SH7786 PCIe.
These settings are properly propagated by the hardware already, so there's no need to bother with them manually. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index 3dfc250b897a..21854ebbaa7c 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -323,9 +323,6 @@ static int pcie_init(struct sh7786_pcie_port *port)
323 __raw_writel(memphys, chan->reg_base + SH4A_PCIELAR0); 323 __raw_writel(memphys, chan->reg_base + SH4A_PCIELAR0);
324 __raw_writel((memsize - SZ_256) | 1, chan->reg_base + SH4A_PCIELAMR0); 324 __raw_writel((memsize - SZ_256) | 1, chan->reg_base + SH4A_PCIELAMR0);
325 325
326 __raw_writel(memphys, chan->reg_base + SH4A_PCIEPCICONF4);
327 __raw_writel(0, chan->reg_base + SH4A_PCIEPCICONF5);
328
329 /* Finish initialization */ 326 /* Finish initialization */
330 data = pci_read_reg(chan, SH4A_PCIETCTLR); 327 data = pci_read_reg(chan, SH4A_PCIETCTLR);
331 data |= 0x1; 328 data |= 0x1;