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authorPaul Mundt <lethal@linux-sh.org>2009-04-20 06:26:45 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-04-20 06:26:45 -0400
commitbb3396477bf46c7cae6bd04b969580277957966e (patch)
tree8034e124b8da40d094af075e7531f5133703f6d2 /arch
parent5ba7205fc49ff72e88784c94fb661f93e7ae7d36 (diff)
sh: pci: Kill off superfluous lboxre2 pci fixups.
This is a verbatim copy of the r2d one, use that instead. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/sh/drivers/pci/Makefile2
-rw-r--r--arch/sh/drivers/pci/fixups-lboxre2.c42
2 files changed, 1 insertions, 43 deletions
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index c8eab14843e5..4cac866d55d4 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -22,5 +22,5 @@ obj-$(CONFIG_SH_SDK7780) += fixups-sdk7780.o
22obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += fixups-sdk7780.o 22obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += fixups-sdk7780.o
23obj-$(CONFIG_SH_TITAN) += ops-titan.o 23obj-$(CONFIG_SH_TITAN) += ops-titan.o
24obj-$(CONFIG_SH_LANDISK) += ops-landisk.o 24obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
25obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o 25obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-rts7751r2d.o
26obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o 26obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o
diff --git a/arch/sh/drivers/pci/fixups-lboxre2.c b/arch/sh/drivers/pci/fixups-lboxre2.c
deleted file mode 100644
index a82011d03cb0..000000000000
--- a/arch/sh/drivers/pci/fixups-lboxre2.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * arch/sh/drivers/pci/fixups-lboxre2.c
3 *
4 * L-BOX RE2 PCI fixups
5 *
6 * Copyright (C) 2007 Nobuhiro Iwamatsu
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/pci.h>
13#include "pci-sh4.h"
14
15#define PCIMCR_MRSET_OFF 0xBFFFFFFF
16#define PCIMCR_RFSH_OFF 0xFFFFFFFB
17
18int pci_fixup_pcic(struct pci_channel *chan)
19{
20 unsigned long bcr1, mcr;
21
22 bcr1 = ctrl_inl(SH7751_BCR1);
23 bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
24 pci_write_reg(chan, bcr1, SH4_PCIBCR1);
25
26 /* Enable all interrupts, so we known what to fix */
27 pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM);
28 pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
29 pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
30 pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
31
32 mcr = ctrl_inl(SH7751_MCR);
33 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
34 pci_write_reg(chan, mcr, SH4_PCIMCR);
35
36 pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
37 pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
38 pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
39 pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
40
41 return 0;
42}