diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 16:49:49 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-28 16:49:49 -0500 |
commit | bb04af0e2e5bcd8d1a5d7f7d5c704f7eb328f241 (patch) | |
tree | fd67625ba9758dceff28dfca39127d7f07dae981 /arch | |
parent | 0affa456cb6da51a31a6dd76b3d8827f467f807d (diff) | |
parent | 0ff66f0c7a5f1f4f5a0d91341b6f71fd2a49f0fa (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (176 commits)
[ARM] 4795/1: S3C244X: Add armclk and setparent call
[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
[ARM] 4793/1: S3C24XX: Add IRQ->GPIO pin mapping function
[ARM] 4792/1: S3C24XX: Remove warnings from debug-macro.S
[ARM] 4791/1: S3C2412: Make fclk a parent of msysclk
[ARM] 4790/1: S3C2412: Fix parent selection for msysclk.
[ARM] 4789/1: S3C2412: Add missing CLKDIVN register values
[ARM] 4788/1: S3C24XX: Fix paramet to s3c2410_dma_ctrl if S3C2410_DMAF_AUTOSTART used.
[ARM] 4787/1: S3C24XX: s3c2410_dma_request() should return the allocated channel number
[ARM] 4786/1: S3C2412: Add SPI FIFO controll constants
[ARM] 4785/1: S3C24XX: Add _SHIFT definitions for S3C2410_BANKCON registers
[ARM] 4784/1: S3C24XX: Fix GPIO restore glitches
[ARM] 4783/1: S3C24XX: Add s3c2410_gpio_getpull()
[ARM] 4782/1: S3C24XX: Define FIQ_START for any FIQ users
[ARM] 4781/1: S3C24XX: DMA suspend and resume support
[ARM] 4780/1: S3C2412: Allow for seperate DMA channels for TX and RX
[ARM] 4779/1: S3C2412: Add s3c2412_gpio_set_sleepcfg() call
[ARM] 4778/1: S3C2412: Add armclk and init from DVS state
[ARM] 4777/1: S3C24XX: Ensure clk_set_rate() checks the set_rate method for the clk
[ARM] 4775/1: s3c2410: fix compilation error if only s3c2442 cpu is selected
...
Diffstat (limited to 'arch')
195 files changed, 25158 insertions, 2148 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a04f507e7f2c..de211ac3853e 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -180,8 +180,8 @@ config ARCH_AT91 | |||
180 | bool "Atmel AT91" | 180 | bool "Atmel AT91" |
181 | select GENERIC_GPIO | 181 | select GENERIC_GPIO |
182 | help | 182 | help |
183 | This enables support for systems based on the Atmel AT91RM9200 | 183 | This enables support for systems based on the Atmel AT91RM9200, |
184 | and AT91SAM9xxx processors. | 184 | AT91SAM9 and AT91CAP9 processors. |
185 | 185 | ||
186 | config ARCH_CLPS7500 | 186 | config ARCH_CLPS7500 |
187 | bool "Cirrus CL-PS7500FE" | 187 | bool "Cirrus CL-PS7500FE" |
@@ -217,6 +217,7 @@ config ARCH_EP93XX | |||
217 | bool "EP93xx-based" | 217 | bool "EP93xx-based" |
218 | select ARM_AMBA | 218 | select ARM_AMBA |
219 | select ARM_VIC | 219 | select ARM_VIC |
220 | select GENERIC_GPIO | ||
220 | help | 221 | help |
221 | This enables support for the Cirrus EP93xx series of CPUs. | 222 | This enables support for the Cirrus EP93xx series of CPUs. |
222 | 223 | ||
@@ -333,6 +334,16 @@ config ARCH_MXC | |||
333 | help | 334 | help |
334 | Support for Freescale MXC/iMX-based family of processors | 335 | Support for Freescale MXC/iMX-based family of processors |
335 | 336 | ||
337 | config ARCH_ORION | ||
338 | bool "Marvell Orion" | ||
339 | depends on MMU | ||
340 | select PCI | ||
341 | select GENERIC_GPIO | ||
342 | select GENERIC_TIME | ||
343 | select GENERIC_CLOCKEVENTS | ||
344 | help | ||
345 | Support for Marvell Orion System on Chip family. | ||
346 | |||
336 | config ARCH_PNX4008 | 347 | config ARCH_PNX4008 |
337 | bool "Philips Nexperia PNX4008 Mobile" | 348 | bool "Philips Nexperia PNX4008 Mobile" |
338 | help | 349 | help |
@@ -345,6 +356,7 @@ config ARCH_PXA | |||
345 | select GENERIC_GPIO | 356 | select GENERIC_GPIO |
346 | select GENERIC_TIME | 357 | select GENERIC_TIME |
347 | select GENERIC_CLOCKEVENTS | 358 | select GENERIC_CLOCKEVENTS |
359 | select TICK_ONESHOT | ||
348 | help | 360 | help |
349 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. | 361 | Support for Intel/Marvell's PXA2xx/PXA3xx processor line. |
350 | 362 | ||
@@ -366,6 +378,7 @@ config ARCH_SA1100 | |||
366 | select ARCH_DISCONTIGMEM_ENABLE | 378 | select ARCH_DISCONTIGMEM_ENABLE |
367 | select ARCH_MTD_XIP | 379 | select ARCH_MTD_XIP |
368 | select GENERIC_GPIO | 380 | select GENERIC_GPIO |
381 | select GENERIC_TIME | ||
369 | help | 382 | help |
370 | Support for StrongARM 11x0 based boards. | 383 | Support for StrongARM 11x0 based boards. |
371 | 384 | ||
@@ -409,6 +422,17 @@ config ARCH_OMAP | |||
409 | help | 422 | help |
410 | Support for TI's OMAP platform (OMAP1 and OMAP2). | 423 | Support for TI's OMAP platform (OMAP1 and OMAP2). |
411 | 424 | ||
425 | config ARCH_MSM7X00A | ||
426 | bool "Qualcomm MSM7X00A" | ||
427 | select GENERIC_TIME | ||
428 | select GENERIC_CLOCKEVENTS | ||
429 | help | ||
430 | Support for Qualcomm MSM7X00A based systems. This runs on the ARM11 | ||
431 | apps processor of the MSM7X00A and depends on a shared memory | ||
432 | interface to the ARM9 modem processor which runs the baseband stack | ||
433 | and controls some vital subsystems (clock and power control, etc). | ||
434 | <http://www.cdmatech.com/products/msm7200_chipset_solution.jsp> | ||
435 | |||
412 | endchoice | 436 | endchoice |
413 | 437 | ||
414 | source "arch/arm/mach-clps711x/Kconfig" | 438 | source "arch/arm/mach-clps711x/Kconfig" |
@@ -441,6 +465,8 @@ source "arch/arm/mach-omap1/Kconfig" | |||
441 | 465 | ||
442 | source "arch/arm/mach-omap2/Kconfig" | 466 | source "arch/arm/mach-omap2/Kconfig" |
443 | 467 | ||
468 | source "arch/arm/mach-orion/Kconfig" | ||
469 | |||
444 | source "arch/arm/plat-s3c24xx/Kconfig" | 470 | source "arch/arm/plat-s3c24xx/Kconfig" |
445 | source "arch/arm/plat-s3c/Kconfig" | 471 | source "arch/arm/plat-s3c/Kconfig" |
446 | 472 | ||
@@ -477,6 +503,8 @@ source "arch/arm/mach-davinci/Kconfig" | |||
477 | 503 | ||
478 | source "arch/arm/mach-ks8695/Kconfig" | 504 | source "arch/arm/mach-ks8695/Kconfig" |
479 | 505 | ||
506 | source "arch/arm/mach-msm/Kconfig" | ||
507 | |||
480 | # Definitions to make life easier | 508 | # Definitions to make life easier |
481 | config ARCH_ACORN | 509 | config ARCH_ACORN |
482 | bool | 510 | bool |
@@ -657,6 +685,7 @@ config HZ | |||
657 | default 128 if ARCH_L7200 | 685 | default 128 if ARCH_L7200 |
658 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 | 686 | default 200 if ARCH_EBSA110 || ARCH_S3C2410 |
659 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER | 687 | default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER |
688 | default AT91_TIMER_HZ if ARCH_AT91 | ||
660 | default 100 | 689 | default 100 |
661 | 690 | ||
662 | config AEABI | 691 | config AEABI |
@@ -716,7 +745,7 @@ config LEDS | |||
716 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ | 745 | ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ |
717 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ | 746 | ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ |
718 | ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ | 747 | ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI || \ |
719 | ARCH_KS8695 | 748 | ARCH_KS8695 || MACH_RD88F5182 |
720 | help | 749 | help |
721 | If you say Y here, the LEDs on your machine will be used | 750 | If you say Y here, the LEDs on your machine will be used |
722 | to provide useful information about your current system status. | 751 | to provide useful information about your current system status. |
@@ -867,7 +896,7 @@ config KEXEC | |||
867 | 896 | ||
868 | endmenu | 897 | endmenu |
869 | 898 | ||
870 | if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX ) | 899 | if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX || ARCH_PXA) |
871 | 900 | ||
872 | menu "CPU Frequency scaling" | 901 | menu "CPU Frequency scaling" |
873 | 902 | ||
@@ -903,6 +932,12 @@ config CPU_FREQ_IMX | |||
903 | 932 | ||
904 | If in doubt, say N. | 933 | If in doubt, say N. |
905 | 934 | ||
935 | config CPU_FREQ_PXA | ||
936 | bool | ||
937 | depends on CPU_FREQ && ARCH_PXA && PXA25x | ||
938 | default y | ||
939 | select CPU_FREQ_DEFAULT_GOV_USERSPACE | ||
940 | |||
906 | endmenu | 941 | endmenu |
907 | 942 | ||
908 | endif | 943 | endif |
@@ -951,7 +986,7 @@ config FPE_FASTFPE | |||
951 | 986 | ||
952 | config VFP | 987 | config VFP |
953 | bool "VFP-format floating point maths" | 988 | bool "VFP-format floating point maths" |
954 | depends on CPU_V6 || CPU_ARM926T | 989 | depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON |
955 | help | 990 | help |
956 | Say Y to include VFP support code in the kernel. This is needed | 991 | Say Y to include VFP support code in the kernel. This is needed |
957 | if your hardware includes a VFP unit. | 992 | if your hardware includes a VFP unit. |
@@ -961,6 +996,18 @@ config VFP | |||
961 | 996 | ||
962 | Say N if your target does not have VFP hardware. | 997 | Say N if your target does not have VFP hardware. |
963 | 998 | ||
999 | config VFPv3 | ||
1000 | bool | ||
1001 | depends on VFP | ||
1002 | default y if CPU_V7 | ||
1003 | |||
1004 | config NEON | ||
1005 | bool "Advanced SIMD (NEON) Extension support" | ||
1006 | depends on VFPv3 && CPU_V7 | ||
1007 | help | ||
1008 | Say Y to include support code for NEON, the ARMv7 Advanced SIMD | ||
1009 | Extension. | ||
1010 | |||
964 | endmenu | 1011 | endmenu |
965 | 1012 | ||
966 | menu "Userspace binary formats" | 1013 | menu "Userspace binary formats" |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 18101f5f5f24..192ee01a9ba2 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -43,6 +43,12 @@ config DEBUG_ERRORS | |||
43 | you are concerned with the code size or don't want to see these | 43 | you are concerned with the code size or don't want to see these |
44 | messages. | 44 | messages. |
45 | 45 | ||
46 | config DEBUG_STACK_USAGE | ||
47 | bool "Enable stack utilization instrumentation" | ||
48 | depends on DEBUG_KERNEL | ||
49 | help | ||
50 | Enables the display of the minimum amount of free stack which each | ||
51 | task has ever had available in the sysrq-T output. | ||
46 | 52 | ||
47 | # These options are only for real kernel hackers who want to get their hands dirty. | 53 | # These options are only for real kernel hackers who want to get their hands dirty. |
48 | config DEBUG_LL | 54 | config DEBUG_LL |
diff --git a/arch/arm/Kconfig.instrumentation b/arch/arm/Kconfig.instrumentation index 63b8c6d5606a..453ad8e15d69 100644 --- a/arch/arm/Kconfig.instrumentation +++ b/arch/arm/Kconfig.instrumentation | |||
@@ -43,6 +43,16 @@ config OPROFILE_MPCORE | |||
43 | config OPROFILE_ARM11_CORE | 43 | config OPROFILE_ARM11_CORE |
44 | bool | 44 | bool |
45 | 45 | ||
46 | config KPROBES | ||
47 | bool "Kprobes" | ||
48 | depends on KALLSYMS && MODULES && !UML && !XIP_KERNEL | ||
49 | help | ||
50 | Kprobes allows you to trap at almost any kernel address and | ||
51 | execute a callback function. register_kprobe() establishes | ||
52 | a probepoint and specifies the callback. Kprobes is useful | ||
53 | for kernel debugging, non-intrusive instrumentation and testing. | ||
54 | If in doubt, say "N". | ||
55 | |||
46 | config MARKERS | 56 | config MARKERS |
47 | bool "Activate markers" | 57 | bool "Activate markers" |
48 | help | 58 | help |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 35e56c99ad1d..7b8ff66febe1 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -139,6 +139,8 @@ endif | |||
139 | machine-$(CONFIG_ARCH_KS8695) := ks8695 | 139 | machine-$(CONFIG_ARCH_KS8695) := ks8695 |
140 | incdir-$(CONFIG_ARCH_MXC) := mxc | 140 | incdir-$(CONFIG_ARCH_MXC) := mxc |
141 | machine-$(CONFIG_ARCH_MX3) := mx3 | 141 | machine-$(CONFIG_ARCH_MX3) := mx3 |
142 | machine-$(CONFIG_ARCH_ORION) := orion | ||
143 | machine-$(CONFIG_ARCH_MSM7X00A) := msm | ||
142 | 144 | ||
143 | ifeq ($(CONFIG_ARCH_EBSA110),y) | 145 | ifeq ($(CONFIG_ARCH_EBSA110),y) |
144 | # This is what happens if you forget the IOCS16 line. | 146 | # This is what happens if you forget the IOCS16 line. |
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile index 5fde99f9d9f9..de9d9ee50958 100644 --- a/arch/arm/boot/compressed/Makefile +++ b/arch/arm/boot/compressed/Makefile | |||
@@ -44,10 +44,6 @@ ifeq ($(CONFIG_PXA_SHARPSL),y) | |||
44 | OBJS += head-sharpsl.o | 44 | OBJS += head-sharpsl.o |
45 | endif | 45 | endif |
46 | 46 | ||
47 | ifeq ($(CONFIG_ARCH_AT91RM9200),y) | ||
48 | OBJS += head-at91rm9200.o | ||
49 | endif | ||
50 | |||
51 | ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) | 47 | ifeq ($(CONFIG_CPU_BIG_ENDIAN),y) |
52 | ifeq ($(CONFIG_CPU_CP15),y) | 48 | ifeq ($(CONFIG_CPU_CP15),y) |
53 | OBJS += big-endian.o | 49 | OBJS += big-endian.o |
diff --git a/arch/arm/boot/compressed/head-at91rm9200.S b/arch/arm/boot/compressed/head-at91rm9200.S deleted file mode 100644 index 11782ccd93a1..000000000000 --- a/arch/arm/boot/compressed/head-at91rm9200.S +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/boot/compressed/head-at91rm9200.S | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | #include <asm/mach-types.h> | ||
13 | |||
14 | .section ".start", "ax" | ||
15 | |||
16 | @ Atmel AT91RM9200-DK : 262 | ||
17 | mov r3, #(MACH_TYPE_AT91RM9200DK & 0xff) | ||
18 | orr r3, r3, #(MACH_TYPE_AT91RM9200DK & 0xff00) | ||
19 | cmp r7, r3 | ||
20 | beq 99f | ||
21 | |||
22 | @ Cogent CSB337 : 399 | ||
23 | mov r3, #(MACH_TYPE_CSB337 & 0xff) | ||
24 | orr r3, r3, #(MACH_TYPE_CSB337 & 0xff00) | ||
25 | cmp r7, r3 | ||
26 | beq 99f | ||
27 | |||
28 | @ Cogent CSB637 : 648 | ||
29 | mov r3, #(MACH_TYPE_CSB637 & 0xff) | ||
30 | orr r3, r3, #(MACH_TYPE_CSB637 & 0xff00) | ||
31 | cmp r7, r3 | ||
32 | beq 99f | ||
33 | |||
34 | @ Atmel AT91RM9200-EK : 705 | ||
35 | mov r3, #(MACH_TYPE_AT91RM9200EK & 0xff) | ||
36 | orr r3, r3, #(MACH_TYPE_AT91RM9200EK & 0xff00) | ||
37 | cmp r7, r3 | ||
38 | beq 99f | ||
39 | |||
40 | @ Conitec Carmeva : 769 | ||
41 | mov r3, #(MACH_TYPE_CARMEVA & 0xff) | ||
42 | orr r3, r3, #(MACH_TYPE_CARMEVA & 0xff00) | ||
43 | cmp r7, r3 | ||
44 | beq 99f | ||
45 | |||
46 | @ KwikByte KB920x : 612 | ||
47 | mov r3, #(MACH_TYPE_KB9200 & 0xff) | ||
48 | orr r3, r3, #(MACH_TYPE_KB9200 & 0xff00) | ||
49 | cmp r7, r3 | ||
50 | beq 99f | ||
51 | |||
52 | @ Embest ATEB9200 : 923 | ||
53 | mov r3, #(MACH_TYPE_ATEB9200 & 0xff) | ||
54 | orr r3, r3, #(MACH_TYPE_ATEB9200 & 0xff00) | ||
55 | cmp r7, r3 | ||
56 | beq 99f | ||
57 | |||
58 | @ Sperry-Sun KAFA : 662 | ||
59 | mov r3, #(MACH_TYPE_KAFA & 0xff) | ||
60 | orr r3, r3, #(MACH_TYPE_KAFA & 0xff00) | ||
61 | cmp r7, r3 | ||
62 | beq 99f | ||
63 | |||
64 | @ picotux 200 : 963 | ||
65 | mov r3, #(MACH_TYPE_PICOTUX2XX & 0xff) | ||
66 | orr r3, r3, #(MACH_TYPE_PICOTUX2XX & 0xff00) | ||
67 | cmp r7, r3 | ||
68 | beq 99f | ||
69 | |||
70 | @ Ajeco 1ARM : 1075 | ||
71 | mov r3, #(MACH_TYPE_ONEARM & 0xff) | ||
72 | orr r3, r3, #(MACH_TYPE_ONEARM & 0xff00) | ||
73 | cmp r7, r3 | ||
74 | beq 99f | ||
75 | |||
76 | @ Unknown board, use the AT91RM9200DK board | ||
77 | @ mov r7, #MACH_TYPE_AT91RM9200 | ||
78 | mov r7, #(MACH_TYPE_AT91RM9200DK & 0xff) | ||
79 | orr r7, r7, #(MACH_TYPE_AT91RM9200DK & 0xff00) | ||
80 | |||
81 | 99: | ||
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S index 5cac46a19bb7..3c2c8f2a1dc4 100644 --- a/arch/arm/boot/compressed/head.S +++ b/arch/arm/boot/compressed/head.S | |||
@@ -623,6 +623,12 @@ proc_types: | |||
623 | b __armv4_mmu_cache_off | 623 | b __armv4_mmu_cache_off |
624 | b __armv4_mmu_cache_flush | 624 | b __armv4_mmu_cache_flush |
625 | 625 | ||
626 | .word 0x56055310 @ Feroceon | ||
627 | .word 0xfffffff0 | ||
628 | b __armv4_mmu_cache_on | ||
629 | b __armv4_mmu_cache_off | ||
630 | b __armv5tej_mmu_cache_flush | ||
631 | |||
626 | @ These match on the architecture ID | 632 | @ These match on the architecture ID |
627 | 633 | ||
628 | .word 0x00020000 @ ARMv4T | 634 | .word 0x00020000 @ ARMv4T |
@@ -641,7 +647,7 @@ proc_types: | |||
641 | .word 0x000f0000 | 647 | .word 0x000f0000 |
642 | b __armv4_mmu_cache_on | 648 | b __armv4_mmu_cache_on |
643 | b __armv4_mmu_cache_off | 649 | b __armv4_mmu_cache_off |
644 | b __armv4_mmu_cache_flush | 650 | b __armv5tej_mmu_cache_flush |
645 | 651 | ||
646 | .word 0x0007b000 @ ARMv6 | 652 | .word 0x0007b000 @ ARMv6 |
647 | .word 0x000ff000 | 653 | .word 0x000ff000 |
@@ -821,6 +827,13 @@ iflush: | |||
821 | mcr p15, 0, r10, c7, c10, 4 @ drain WB | 827 | mcr p15, 0, r10, c7, c10, 4 @ drain WB |
822 | mov pc, lr | 828 | mov pc, lr |
823 | 829 | ||
830 | __armv5tej_mmu_cache_flush: | ||
831 | 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate D cache | ||
832 | bne 1b | ||
833 | mcr p15, 0, r0, c7, c5, 0 @ flush I cache | ||
834 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
835 | mov pc, lr | ||
836 | |||
824 | __armv4_mmu_cache_flush: | 837 | __armv4_mmu_cache_flush: |
825 | mov r2, #64*1024 @ default: 32K dcache size (*2) | 838 | mov r2, #64*1024 @ default: 32K dcache size (*2) |
826 | mov r11, #32 @ default: 32 byte line size | 839 | mov r11, #32 @ default: 32 byte line size |
diff --git a/arch/arm/common/rtctime.c b/arch/arm/common/rtctime.c index bf1075e1f571..f53bca46e23c 100644 --- a/arch/arm/common/rtctime.c +++ b/arch/arm/common/rtctime.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <linux/capability.h> | 20 | #include <linux/capability.h> |
21 | #include <linux/device.h> | 21 | #include <linux/device.h> |
22 | #include <linux/mutex.h> | 22 | #include <linux/mutex.h> |
23 | #include <linux/rtc.h> | ||
24 | 23 | ||
25 | #include <asm/rtc.h> | 24 | #include <asm/rtc.h> |
26 | #include <asm/semaphore.h> | 25 | #include <asm/semaphore.h> |
diff --git a/arch/arm/configs/at91cap9adk_defconfig b/arch/arm/configs/at91cap9adk_defconfig new file mode 100644 index 000000000000..e32e73648129 --- /dev/null +++ b/arch/arm/configs/at91cap9adk_defconfig | |||
@@ -0,0 +1,1143 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.24-rc8 | ||
4 | # Wed Jan 23 22:55:57 2008 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | # CONFIG_GENERIC_TIME is not set | ||
10 | # CONFIG_GENERIC_CLOCKEVENTS is not set | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_VECTORS_BASE=0xffff0000 | ||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
27 | |||
28 | # | ||
29 | # General setup | ||
30 | # | ||
31 | CONFIG_EXPERIMENTAL=y | ||
32 | CONFIG_BROKEN_ON_SMP=y | ||
33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
34 | CONFIG_LOCALVERSION="" | ||
35 | # CONFIG_LOCALVERSION_AUTO is not set | ||
36 | # CONFIG_SWAP is not set | ||
37 | CONFIG_SYSVIPC=y | ||
38 | CONFIG_SYSVIPC_SYSCTL=y | ||
39 | # CONFIG_POSIX_MQUEUE is not set | ||
40 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
41 | # CONFIG_TASKSTATS is not set | ||
42 | # CONFIG_USER_NS is not set | ||
43 | # CONFIG_PID_NS is not set | ||
44 | # CONFIG_AUDIT is not set | ||
45 | # CONFIG_IKCONFIG is not set | ||
46 | CONFIG_LOG_BUF_SHIFT=14 | ||
47 | # CONFIG_CGROUPS is not set | ||
48 | CONFIG_FAIR_GROUP_SCHED=y | ||
49 | CONFIG_FAIR_USER_SCHED=y | ||
50 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
51 | CONFIG_SYSFS_DEPRECATED=y | ||
52 | # CONFIG_RELAY is not set | ||
53 | CONFIG_BLK_DEV_INITRD=y | ||
54 | CONFIG_INITRAMFS_SOURCE="" | ||
55 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
56 | CONFIG_SYSCTL=y | ||
57 | # CONFIG_EMBEDDED is not set | ||
58 | CONFIG_UID16=y | ||
59 | CONFIG_SYSCTL_SYSCALL=y | ||
60 | CONFIG_KALLSYMS=y | ||
61 | # CONFIG_KALLSYMS_ALL is not set | ||
62 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
63 | CONFIG_HOTPLUG=y | ||
64 | CONFIG_PRINTK=y | ||
65 | CONFIG_BUG=y | ||
66 | CONFIG_ELF_CORE=y | ||
67 | CONFIG_BASE_FULL=y | ||
68 | CONFIG_FUTEX=y | ||
69 | CONFIG_ANON_INODES=y | ||
70 | CONFIG_EPOLL=y | ||
71 | CONFIG_SIGNALFD=y | ||
72 | CONFIG_EVENTFD=y | ||
73 | CONFIG_SHMEM=y | ||
74 | CONFIG_VM_EVENT_COUNTERS=y | ||
75 | CONFIG_SLAB=y | ||
76 | # CONFIG_SLUB is not set | ||
77 | # CONFIG_SLOB is not set | ||
78 | CONFIG_SLABINFO=y | ||
79 | CONFIG_RT_MUTEXES=y | ||
80 | # CONFIG_TINY_SHMEM is not set | ||
81 | CONFIG_BASE_SMALL=0 | ||
82 | CONFIG_MODULES=y | ||
83 | CONFIG_MODULE_UNLOAD=y | ||
84 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
85 | # CONFIG_MODVERSIONS is not set | ||
86 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
87 | CONFIG_KMOD=y | ||
88 | CONFIG_BLOCK=y | ||
89 | # CONFIG_LBD is not set | ||
90 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
91 | # CONFIG_LSF is not set | ||
92 | # CONFIG_BLK_DEV_BSG is not set | ||
93 | |||
94 | # | ||
95 | # IO Schedulers | ||
96 | # | ||
97 | CONFIG_IOSCHED_NOOP=y | ||
98 | CONFIG_IOSCHED_AS=y | ||
99 | # CONFIG_IOSCHED_DEADLINE is not set | ||
100 | # CONFIG_IOSCHED_CFQ is not set | ||
101 | CONFIG_DEFAULT_AS=y | ||
102 | # CONFIG_DEFAULT_DEADLINE is not set | ||
103 | # CONFIG_DEFAULT_CFQ is not set | ||
104 | # CONFIG_DEFAULT_NOOP is not set | ||
105 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
106 | |||
107 | # | ||
108 | # System Type | ||
109 | # | ||
110 | # CONFIG_ARCH_AAEC2000 is not set | ||
111 | # CONFIG_ARCH_INTEGRATOR is not set | ||
112 | # CONFIG_ARCH_REALVIEW is not set | ||
113 | # CONFIG_ARCH_VERSATILE is not set | ||
114 | CONFIG_ARCH_AT91=y | ||
115 | # CONFIG_ARCH_CLPS7500 is not set | ||
116 | # CONFIG_ARCH_CLPS711X is not set | ||
117 | # CONFIG_ARCH_CO285 is not set | ||
118 | # CONFIG_ARCH_EBSA110 is not set | ||
119 | # CONFIG_ARCH_EP93XX is not set | ||
120 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
121 | # CONFIG_ARCH_NETX is not set | ||
122 | # CONFIG_ARCH_H720X is not set | ||
123 | # CONFIG_ARCH_IMX is not set | ||
124 | # CONFIG_ARCH_IOP13XX is not set | ||
125 | # CONFIG_ARCH_IOP32X is not set | ||
126 | # CONFIG_ARCH_IOP33X is not set | ||
127 | # CONFIG_ARCH_IXP23XX is not set | ||
128 | # CONFIG_ARCH_IXP2000 is not set | ||
129 | # CONFIG_ARCH_IXP4XX is not set | ||
130 | # CONFIG_ARCH_L7200 is not set | ||
131 | # CONFIG_ARCH_KS8695 is not set | ||
132 | # CONFIG_ARCH_NS9XXX is not set | ||
133 | # CONFIG_ARCH_MXC is not set | ||
134 | # CONFIG_ARCH_PNX4008 is not set | ||
135 | # CONFIG_ARCH_PXA is not set | ||
136 | # CONFIG_ARCH_RPC is not set | ||
137 | # CONFIG_ARCH_SA1100 is not set | ||
138 | # CONFIG_ARCH_S3C2410 is not set | ||
139 | # CONFIG_ARCH_SHARK is not set | ||
140 | # CONFIG_ARCH_LH7A40X is not set | ||
141 | # CONFIG_ARCH_DAVINCI is not set | ||
142 | # CONFIG_ARCH_OMAP is not set | ||
143 | |||
144 | # | ||
145 | # Boot options | ||
146 | # | ||
147 | |||
148 | # | ||
149 | # Power management | ||
150 | # | ||
151 | |||
152 | # | ||
153 | # Atmel AT91 System-on-Chip | ||
154 | # | ||
155 | # CONFIG_ARCH_AT91RM9200 is not set | ||
156 | # CONFIG_ARCH_AT91SAM9260 is not set | ||
157 | # CONFIG_ARCH_AT91SAM9261 is not set | ||
158 | # CONFIG_ARCH_AT91SAM9263 is not set | ||
159 | # CONFIG_ARCH_AT91SAM9RL is not set | ||
160 | CONFIG_ARCH_AT91CAP9=y | ||
161 | # CONFIG_ARCH_AT91X40 is not set | ||
162 | CONFIG_AT91_PMC_UNIT=y | ||
163 | |||
164 | # | ||
165 | # AT91CAP9 Board Type | ||
166 | # | ||
167 | CONFIG_MACH_AT91CAP9ADK=y | ||
168 | |||
169 | # | ||
170 | # AT91 Board Options | ||
171 | # | ||
172 | CONFIG_MTD_AT91_DATAFLASH_CARD=y | ||
173 | # CONFIG_MTD_NAND_AT91_BUSWIDTH_16 is not set | ||
174 | |||
175 | # | ||
176 | # AT91 Feature Selections | ||
177 | # | ||
178 | CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | ||
179 | CONFIG_AT91_TIMER_HZ=100 | ||
180 | |||
181 | # | ||
182 | # Processor Type | ||
183 | # | ||
184 | CONFIG_CPU_32=y | ||
185 | CONFIG_CPU_ARM926T=y | ||
186 | CONFIG_CPU_32v5=y | ||
187 | CONFIG_CPU_ABRT_EV5TJ=y | ||
188 | CONFIG_CPU_CACHE_VIVT=y | ||
189 | CONFIG_CPU_COPY_V4WB=y | ||
190 | CONFIG_CPU_TLB_V4WBI=y | ||
191 | CONFIG_CPU_CP15=y | ||
192 | CONFIG_CPU_CP15_MMU=y | ||
193 | |||
194 | # | ||
195 | # Processor Features | ||
196 | # | ||
197 | # CONFIG_ARM_THUMB is not set | ||
198 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
199 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
200 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
201 | # CONFIG_CPU_CACHE_ROUND_ROBIN is not set | ||
202 | # CONFIG_OUTER_CACHE is not set | ||
203 | |||
204 | # | ||
205 | # Bus support | ||
206 | # | ||
207 | # CONFIG_PCI_SYSCALL is not set | ||
208 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
209 | # CONFIG_PCCARD is not set | ||
210 | |||
211 | # | ||
212 | # Kernel Features | ||
213 | # | ||
214 | # CONFIG_TICK_ONESHOT is not set | ||
215 | # CONFIG_PREEMPT is not set | ||
216 | # CONFIG_NO_IDLE_HZ is not set | ||
217 | CONFIG_HZ=100 | ||
218 | CONFIG_AEABI=y | ||
219 | CONFIG_OABI_COMPAT=y | ||
220 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
221 | CONFIG_SELECT_MEMORY_MODEL=y | ||
222 | CONFIG_FLATMEM_MANUAL=y | ||
223 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
224 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
225 | CONFIG_FLATMEM=y | ||
226 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
227 | # CONFIG_SPARSEMEM_STATIC is not set | ||
228 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
229 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
230 | # CONFIG_RESOURCES_64BIT is not set | ||
231 | CONFIG_ZONE_DMA_FLAG=1 | ||
232 | CONFIG_BOUNCE=y | ||
233 | CONFIG_VIRT_TO_BUS=y | ||
234 | CONFIG_LEDS=y | ||
235 | CONFIG_LEDS_TIMER=y | ||
236 | CONFIG_LEDS_CPU=y | ||
237 | CONFIG_ALIGNMENT_TRAP=y | ||
238 | |||
239 | # | ||
240 | # Boot options | ||
241 | # | ||
242 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
243 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
244 | CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw" | ||
245 | # CONFIG_XIP_KERNEL is not set | ||
246 | # CONFIG_KEXEC is not set | ||
247 | |||
248 | # | ||
249 | # Floating point emulation | ||
250 | # | ||
251 | |||
252 | # | ||
253 | # At least one emulation must be selected | ||
254 | # | ||
255 | CONFIG_FPE_NWFPE=y | ||
256 | # CONFIG_FPE_NWFPE_XP is not set | ||
257 | # CONFIG_FPE_FASTFPE is not set | ||
258 | # CONFIG_VFP is not set | ||
259 | |||
260 | # | ||
261 | # Userspace binary formats | ||
262 | # | ||
263 | CONFIG_BINFMT_ELF=y | ||
264 | # CONFIG_BINFMT_AOUT is not set | ||
265 | # CONFIG_BINFMT_MISC is not set | ||
266 | |||
267 | # | ||
268 | # Power management options | ||
269 | # | ||
270 | # CONFIG_PM is not set | ||
271 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
272 | |||
273 | # | ||
274 | # Networking | ||
275 | # | ||
276 | CONFIG_NET=y | ||
277 | |||
278 | # | ||
279 | # Networking options | ||
280 | # | ||
281 | CONFIG_PACKET=y | ||
282 | # CONFIG_PACKET_MMAP is not set | ||
283 | CONFIG_UNIX=y | ||
284 | # CONFIG_NET_KEY is not set | ||
285 | CONFIG_INET=y | ||
286 | # CONFIG_IP_MULTICAST is not set | ||
287 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
288 | CONFIG_IP_FIB_HASH=y | ||
289 | CONFIG_IP_PNP=y | ||
290 | # CONFIG_IP_PNP_DHCP is not set | ||
291 | CONFIG_IP_PNP_BOOTP=y | ||
292 | CONFIG_IP_PNP_RARP=y | ||
293 | # CONFIG_NET_IPIP is not set | ||
294 | # CONFIG_NET_IPGRE is not set | ||
295 | # CONFIG_ARPD is not set | ||
296 | # CONFIG_SYN_COOKIES is not set | ||
297 | # CONFIG_INET_AH is not set | ||
298 | # CONFIG_INET_ESP is not set | ||
299 | # CONFIG_INET_IPCOMP is not set | ||
300 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
301 | # CONFIG_INET_TUNNEL is not set | ||
302 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
303 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
304 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
305 | # CONFIG_INET_LRO is not set | ||
306 | # CONFIG_INET_DIAG is not set | ||
307 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
308 | CONFIG_TCP_CONG_CUBIC=y | ||
309 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
310 | # CONFIG_TCP_MD5SIG is not set | ||
311 | # CONFIG_IPV6 is not set | ||
312 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
313 | # CONFIG_INET6_TUNNEL is not set | ||
314 | # CONFIG_NETWORK_SECMARK is not set | ||
315 | # CONFIG_NETFILTER is not set | ||
316 | # CONFIG_IP_DCCP is not set | ||
317 | # CONFIG_IP_SCTP is not set | ||
318 | # CONFIG_TIPC is not set | ||
319 | # CONFIG_ATM is not set | ||
320 | # CONFIG_BRIDGE is not set | ||
321 | # CONFIG_VLAN_8021Q is not set | ||
322 | # CONFIG_DECNET is not set | ||
323 | # CONFIG_LLC2 is not set | ||
324 | # CONFIG_IPX is not set | ||
325 | # CONFIG_ATALK is not set | ||
326 | # CONFIG_X25 is not set | ||
327 | # CONFIG_LAPB is not set | ||
328 | # CONFIG_ECONET is not set | ||
329 | # CONFIG_WAN_ROUTER is not set | ||
330 | # CONFIG_NET_SCHED is not set | ||
331 | |||
332 | # | ||
333 | # Network testing | ||
334 | # | ||
335 | # CONFIG_NET_PKTGEN is not set | ||
336 | # CONFIG_HAMRADIO is not set | ||
337 | # CONFIG_IRDA is not set | ||
338 | # CONFIG_BT is not set | ||
339 | # CONFIG_AF_RXRPC is not set | ||
340 | |||
341 | # | ||
342 | # Wireless | ||
343 | # | ||
344 | # CONFIG_CFG80211 is not set | ||
345 | # CONFIG_WIRELESS_EXT is not set | ||
346 | # CONFIG_MAC80211 is not set | ||
347 | # CONFIG_IEEE80211 is not set | ||
348 | # CONFIG_RFKILL is not set | ||
349 | # CONFIG_NET_9P is not set | ||
350 | |||
351 | # | ||
352 | # Device Drivers | ||
353 | # | ||
354 | |||
355 | # | ||
356 | # Generic Driver Options | ||
357 | # | ||
358 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
359 | CONFIG_STANDALONE=y | ||
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
361 | # CONFIG_FW_LOADER is not set | ||
362 | # CONFIG_DEBUG_DRIVER is not set | ||
363 | # CONFIG_DEBUG_DEVRES is not set | ||
364 | # CONFIG_SYS_HYPERVISOR is not set | ||
365 | # CONFIG_CONNECTOR is not set | ||
366 | CONFIG_MTD=y | ||
367 | # CONFIG_MTD_DEBUG is not set | ||
368 | # CONFIG_MTD_CONCAT is not set | ||
369 | CONFIG_MTD_PARTITIONS=y | ||
370 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
371 | CONFIG_MTD_CMDLINE_PARTS=y | ||
372 | # CONFIG_MTD_AFS_PARTS is not set | ||
373 | |||
374 | # | ||
375 | # User Modules And Translation Layers | ||
376 | # | ||
377 | CONFIG_MTD_CHAR=y | ||
378 | CONFIG_MTD_BLKDEVS=y | ||
379 | CONFIG_MTD_BLOCK=y | ||
380 | # CONFIG_FTL is not set | ||
381 | # CONFIG_NFTL is not set | ||
382 | # CONFIG_INFTL is not set | ||
383 | # CONFIG_RFD_FTL is not set | ||
384 | # CONFIG_SSFDC is not set | ||
385 | # CONFIG_MTD_OOPS is not set | ||
386 | |||
387 | # | ||
388 | # RAM/ROM/Flash chip drivers | ||
389 | # | ||
390 | CONFIG_MTD_CFI=y | ||
391 | CONFIG_MTD_JEDECPROBE=y | ||
392 | CONFIG_MTD_GEN_PROBE=y | ||
393 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
394 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
395 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
396 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
397 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
398 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
399 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
400 | CONFIG_MTD_CFI_I1=y | ||
401 | CONFIG_MTD_CFI_I2=y | ||
402 | # CONFIG_MTD_CFI_I4 is not set | ||
403 | # CONFIG_MTD_CFI_I8 is not set | ||
404 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
405 | CONFIG_MTD_CFI_AMDSTD=y | ||
406 | # CONFIG_MTD_CFI_STAA is not set | ||
407 | CONFIG_MTD_CFI_UTIL=y | ||
408 | # CONFIG_MTD_RAM is not set | ||
409 | # CONFIG_MTD_ROM is not set | ||
410 | # CONFIG_MTD_ABSENT is not set | ||
411 | |||
412 | # | ||
413 | # Mapping drivers for chip access | ||
414 | # | ||
415 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
416 | CONFIG_MTD_PHYSMAP=y | ||
417 | CONFIG_MTD_PHYSMAP_START=0x0 | ||
418 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
419 | CONFIG_MTD_PHYSMAP_BANKWIDTH=0 | ||
420 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
421 | # CONFIG_MTD_IMPA7 is not set | ||
422 | # CONFIG_MTD_PLATRAM is not set | ||
423 | |||
424 | # | ||
425 | # Self-contained MTD device drivers | ||
426 | # | ||
427 | CONFIG_MTD_DATAFLASH=y | ||
428 | # CONFIG_MTD_M25P80 is not set | ||
429 | # CONFIG_MTD_SLRAM is not set | ||
430 | # CONFIG_MTD_PHRAM is not set | ||
431 | # CONFIG_MTD_MTDRAM is not set | ||
432 | # CONFIG_MTD_BLOCK2MTD is not set | ||
433 | |||
434 | # | ||
435 | # Disk-On-Chip Device Drivers | ||
436 | # | ||
437 | # CONFIG_MTD_DOC2000 is not set | ||
438 | # CONFIG_MTD_DOC2001 is not set | ||
439 | # CONFIG_MTD_DOC2001PLUS is not set | ||
440 | CONFIG_MTD_NAND=y | ||
441 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
442 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
443 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
444 | CONFIG_MTD_NAND_IDS=y | ||
445 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
446 | CONFIG_MTD_NAND_AT91=y | ||
447 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
448 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
449 | # CONFIG_MTD_ALAUDA is not set | ||
450 | # CONFIG_MTD_ONENAND is not set | ||
451 | |||
452 | # | ||
453 | # UBI - Unsorted block images | ||
454 | # | ||
455 | # CONFIG_MTD_UBI is not set | ||
456 | # CONFIG_PARPORT is not set | ||
457 | CONFIG_BLK_DEV=y | ||
458 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
459 | CONFIG_BLK_DEV_LOOP=y | ||
460 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
461 | # CONFIG_BLK_DEV_NBD is not set | ||
462 | # CONFIG_BLK_DEV_UB is not set | ||
463 | CONFIG_BLK_DEV_RAM=y | ||
464 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
465 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
466 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
467 | # CONFIG_CDROM_PKTCDVD is not set | ||
468 | # CONFIG_ATA_OVER_ETH is not set | ||
469 | CONFIG_MISC_DEVICES=y | ||
470 | # CONFIG_EEPROM_93CX6 is not set | ||
471 | CONFIG_ATMEL_SSC=y | ||
472 | |||
473 | # | ||
474 | # SCSI device support | ||
475 | # | ||
476 | # CONFIG_RAID_ATTRS is not set | ||
477 | CONFIG_SCSI=y | ||
478 | CONFIG_SCSI_DMA=y | ||
479 | # CONFIG_SCSI_TGT is not set | ||
480 | # CONFIG_SCSI_NETLINK is not set | ||
481 | CONFIG_SCSI_PROC_FS=y | ||
482 | |||
483 | # | ||
484 | # SCSI support type (disk, tape, CD-ROM) | ||
485 | # | ||
486 | CONFIG_BLK_DEV_SD=y | ||
487 | # CONFIG_CHR_DEV_ST is not set | ||
488 | # CONFIG_CHR_DEV_OSST is not set | ||
489 | # CONFIG_BLK_DEV_SR is not set | ||
490 | # CONFIG_CHR_DEV_SG is not set | ||
491 | # CONFIG_CHR_DEV_SCH is not set | ||
492 | |||
493 | # | ||
494 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
495 | # | ||
496 | CONFIG_SCSI_MULTI_LUN=y | ||
497 | # CONFIG_SCSI_CONSTANTS is not set | ||
498 | # CONFIG_SCSI_LOGGING is not set | ||
499 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
500 | CONFIG_SCSI_WAIT_SCAN=m | ||
501 | |||
502 | # | ||
503 | # SCSI Transports | ||
504 | # | ||
505 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
506 | # CONFIG_SCSI_FC_ATTRS is not set | ||
507 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
508 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
509 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
510 | CONFIG_SCSI_LOWLEVEL=y | ||
511 | # CONFIG_ISCSI_TCP is not set | ||
512 | # CONFIG_SCSI_DEBUG is not set | ||
513 | # CONFIG_ATA is not set | ||
514 | # CONFIG_MD is not set | ||
515 | CONFIG_NETDEVICES=y | ||
516 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
517 | # CONFIG_DUMMY is not set | ||
518 | # CONFIG_BONDING is not set | ||
519 | # CONFIG_MACVLAN is not set | ||
520 | # CONFIG_EQUALIZER is not set | ||
521 | # CONFIG_TUN is not set | ||
522 | # CONFIG_VETH is not set | ||
523 | CONFIG_PHYLIB=y | ||
524 | |||
525 | # | ||
526 | # MII PHY device drivers | ||
527 | # | ||
528 | # CONFIG_MARVELL_PHY is not set | ||
529 | # CONFIG_DAVICOM_PHY is not set | ||
530 | # CONFIG_QSEMI_PHY is not set | ||
531 | # CONFIG_LXT_PHY is not set | ||
532 | # CONFIG_CICADA_PHY is not set | ||
533 | # CONFIG_VITESSE_PHY is not set | ||
534 | # CONFIG_SMSC_PHY is not set | ||
535 | # CONFIG_BROADCOM_PHY is not set | ||
536 | # CONFIG_ICPLUS_PHY is not set | ||
537 | # CONFIG_FIXED_PHY is not set | ||
538 | # CONFIG_MDIO_BITBANG is not set | ||
539 | CONFIG_NET_ETHERNET=y | ||
540 | CONFIG_MII=y | ||
541 | CONFIG_MACB=y | ||
542 | # CONFIG_AX88796 is not set | ||
543 | # CONFIG_SMC91X is not set | ||
544 | # CONFIG_DM9000 is not set | ||
545 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
546 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
547 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
548 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
549 | # CONFIG_B44 is not set | ||
550 | # CONFIG_NETDEV_1000 is not set | ||
551 | # CONFIG_NETDEV_10000 is not set | ||
552 | |||
553 | # | ||
554 | # Wireless LAN | ||
555 | # | ||
556 | # CONFIG_WLAN_PRE80211 is not set | ||
557 | # CONFIG_WLAN_80211 is not set | ||
558 | |||
559 | # | ||
560 | # USB Network Adapters | ||
561 | # | ||
562 | # CONFIG_USB_CATC is not set | ||
563 | # CONFIG_USB_KAWETH is not set | ||
564 | # CONFIG_USB_PEGASUS is not set | ||
565 | # CONFIG_USB_RTL8150 is not set | ||
566 | # CONFIG_USB_USBNET is not set | ||
567 | # CONFIG_WAN is not set | ||
568 | # CONFIG_PPP is not set | ||
569 | # CONFIG_SLIP is not set | ||
570 | # CONFIG_SHAPER is not set | ||
571 | # CONFIG_NETCONSOLE is not set | ||
572 | # CONFIG_NETPOLL is not set | ||
573 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
574 | # CONFIG_ISDN is not set | ||
575 | |||
576 | # | ||
577 | # Input device support | ||
578 | # | ||
579 | CONFIG_INPUT=y | ||
580 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
581 | # CONFIG_INPUT_POLLDEV is not set | ||
582 | |||
583 | # | ||
584 | # Userland interfaces | ||
585 | # | ||
586 | CONFIG_INPUT_MOUSEDEV=y | ||
587 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
588 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
589 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
590 | # CONFIG_INPUT_JOYDEV is not set | ||
591 | CONFIG_INPUT_EVDEV=y | ||
592 | # CONFIG_INPUT_EVBUG is not set | ||
593 | |||
594 | # | ||
595 | # Input Device Drivers | ||
596 | # | ||
597 | # CONFIG_INPUT_KEYBOARD is not set | ||
598 | # CONFIG_INPUT_MOUSE is not set | ||
599 | # CONFIG_INPUT_JOYSTICK is not set | ||
600 | # CONFIG_INPUT_TABLET is not set | ||
601 | CONFIG_INPUT_TOUCHSCREEN=y | ||
602 | CONFIG_TOUCHSCREEN_ADS7846=y | ||
603 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
604 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
605 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
606 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
607 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
608 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
609 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
610 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
611 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
612 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
613 | # CONFIG_INPUT_MISC is not set | ||
614 | |||
615 | # | ||
616 | # Hardware I/O ports | ||
617 | # | ||
618 | # CONFIG_SERIO is not set | ||
619 | # CONFIG_GAMEPORT is not set | ||
620 | |||
621 | # | ||
622 | # Character devices | ||
623 | # | ||
624 | CONFIG_VT=y | ||
625 | CONFIG_VT_CONSOLE=y | ||
626 | CONFIG_HW_CONSOLE=y | ||
627 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
628 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
629 | |||
630 | # | ||
631 | # Serial drivers | ||
632 | # | ||
633 | # CONFIG_SERIAL_8250 is not set | ||
634 | |||
635 | # | ||
636 | # Non-8250 serial port support | ||
637 | # | ||
638 | CONFIG_SERIAL_ATMEL=y | ||
639 | CONFIG_SERIAL_ATMEL_CONSOLE=y | ||
640 | # CONFIG_SERIAL_ATMEL_TTYAT is not set | ||
641 | CONFIG_SERIAL_CORE=y | ||
642 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
643 | CONFIG_UNIX98_PTYS=y | ||
644 | CONFIG_LEGACY_PTYS=y | ||
645 | CONFIG_LEGACY_PTY_COUNT=256 | ||
646 | # CONFIG_IPMI_HANDLER is not set | ||
647 | CONFIG_HW_RANDOM=y | ||
648 | # CONFIG_NVRAM is not set | ||
649 | # CONFIG_R3964 is not set | ||
650 | # CONFIG_RAW_DRIVER is not set | ||
651 | # CONFIG_TCG_TPM is not set | ||
652 | CONFIG_I2C=y | ||
653 | CONFIG_I2C_BOARDINFO=y | ||
654 | CONFIG_I2C_CHARDEV=y | ||
655 | |||
656 | # | ||
657 | # I2C Algorithms | ||
658 | # | ||
659 | # CONFIG_I2C_ALGOBIT is not set | ||
660 | # CONFIG_I2C_ALGOPCF is not set | ||
661 | # CONFIG_I2C_ALGOPCA is not set | ||
662 | |||
663 | # | ||
664 | # I2C Hardware Bus support | ||
665 | # | ||
666 | # CONFIG_I2C_GPIO is not set | ||
667 | # CONFIG_I2C_OCORES is not set | ||
668 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
669 | # CONFIG_I2C_SIMTEC is not set | ||
670 | # CONFIG_I2C_TAOS_EVM is not set | ||
671 | # CONFIG_I2C_STUB is not set | ||
672 | # CONFIG_I2C_TINY_USB is not set | ||
673 | |||
674 | # | ||
675 | # Miscellaneous I2C Chip support | ||
676 | # | ||
677 | # CONFIG_SENSORS_DS1337 is not set | ||
678 | # CONFIG_SENSORS_DS1374 is not set | ||
679 | # CONFIG_DS1682 is not set | ||
680 | # CONFIG_SENSORS_EEPROM is not set | ||
681 | # CONFIG_SENSORS_PCF8574 is not set | ||
682 | # CONFIG_SENSORS_PCA9539 is not set | ||
683 | # CONFIG_SENSORS_PCF8591 is not set | ||
684 | # CONFIG_SENSORS_MAX6875 is not set | ||
685 | # CONFIG_SENSORS_TSL2550 is not set | ||
686 | # CONFIG_I2C_DEBUG_CORE is not set | ||
687 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
688 | # CONFIG_I2C_DEBUG_BUS is not set | ||
689 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
690 | |||
691 | # | ||
692 | # SPI support | ||
693 | # | ||
694 | CONFIG_SPI=y | ||
695 | # CONFIG_SPI_DEBUG is not set | ||
696 | CONFIG_SPI_MASTER=y | ||
697 | |||
698 | # | ||
699 | # SPI Master Controller Drivers | ||
700 | # | ||
701 | CONFIG_SPI_ATMEL=y | ||
702 | # CONFIG_SPI_BITBANG is not set | ||
703 | |||
704 | # | ||
705 | # SPI Protocol Masters | ||
706 | # | ||
707 | # CONFIG_SPI_AT25 is not set | ||
708 | # CONFIG_SPI_SPIDEV is not set | ||
709 | # CONFIG_SPI_TLE62X0 is not set | ||
710 | # CONFIG_W1 is not set | ||
711 | # CONFIG_POWER_SUPPLY is not set | ||
712 | # CONFIG_HWMON is not set | ||
713 | CONFIG_WATCHDOG=y | ||
714 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
715 | |||
716 | # | ||
717 | # Watchdog Device Drivers | ||
718 | # | ||
719 | # CONFIG_SOFT_WATCHDOG is not set | ||
720 | |||
721 | # | ||
722 | # USB-based Watchdog Cards | ||
723 | # | ||
724 | # CONFIG_USBPCWATCHDOG is not set | ||
725 | |||
726 | # | ||
727 | # Sonics Silicon Backplane | ||
728 | # | ||
729 | CONFIG_SSB_POSSIBLE=y | ||
730 | # CONFIG_SSB is not set | ||
731 | |||
732 | # | ||
733 | # Multifunction device drivers | ||
734 | # | ||
735 | # CONFIG_MFD_SM501 is not set | ||
736 | |||
737 | # | ||
738 | # Multimedia devices | ||
739 | # | ||
740 | # CONFIG_VIDEO_DEV is not set | ||
741 | # CONFIG_DVB_CORE is not set | ||
742 | # CONFIG_DAB is not set | ||
743 | |||
744 | # | ||
745 | # Graphics support | ||
746 | # | ||
747 | # CONFIG_VGASTATE is not set | ||
748 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
749 | CONFIG_FB=y | ||
750 | # CONFIG_FIRMWARE_EDID is not set | ||
751 | # CONFIG_FB_DDC is not set | ||
752 | CONFIG_FB_CFB_FILLRECT=y | ||
753 | CONFIG_FB_CFB_COPYAREA=y | ||
754 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
755 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
756 | # CONFIG_FB_SYS_FILLRECT is not set | ||
757 | # CONFIG_FB_SYS_COPYAREA is not set | ||
758 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
759 | # CONFIG_FB_SYS_FOPS is not set | ||
760 | CONFIG_FB_DEFERRED_IO=y | ||
761 | # CONFIG_FB_SVGALIB is not set | ||
762 | # CONFIG_FB_MACMODES is not set | ||
763 | # CONFIG_FB_BACKLIGHT is not set | ||
764 | # CONFIG_FB_MODE_HELPERS is not set | ||
765 | # CONFIG_FB_TILEBLITTING is not set | ||
766 | |||
767 | # | ||
768 | # Frame buffer hardware drivers | ||
769 | # | ||
770 | # CONFIG_FB_S1D13XXX is not set | ||
771 | CONFIG_FB_ATMEL=y | ||
772 | # CONFIG_FB_VIRTUAL is not set | ||
773 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
774 | |||
775 | # | ||
776 | # Display device support | ||
777 | # | ||
778 | # CONFIG_DISPLAY_SUPPORT is not set | ||
779 | |||
780 | # | ||
781 | # Console display driver support | ||
782 | # | ||
783 | # CONFIG_VGA_CONSOLE is not set | ||
784 | CONFIG_DUMMY_CONSOLE=y | ||
785 | # CONFIG_FRAMEBUFFER_CONSOLE is not set | ||
786 | CONFIG_LOGO=y | ||
787 | # CONFIG_LOGO_LINUX_MONO is not set | ||
788 | CONFIG_LOGO_LINUX_VGA16=y | ||
789 | # CONFIG_LOGO_LINUX_CLUT224 is not set | ||
790 | |||
791 | # | ||
792 | # Sound | ||
793 | # | ||
794 | # CONFIG_SOUND is not set | ||
795 | CONFIG_HID_SUPPORT=y | ||
796 | CONFIG_HID=y | ||
797 | CONFIG_HID_DEBUG=y | ||
798 | # CONFIG_HIDRAW is not set | ||
799 | |||
800 | # | ||
801 | # USB Input Devices | ||
802 | # | ||
803 | # CONFIG_USB_HID is not set | ||
804 | |||
805 | # | ||
806 | # USB HID Boot Protocol drivers | ||
807 | # | ||
808 | # CONFIG_USB_KBD is not set | ||
809 | # CONFIG_USB_MOUSE is not set | ||
810 | CONFIG_USB_SUPPORT=y | ||
811 | CONFIG_USB_ARCH_HAS_HCD=y | ||
812 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
813 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
814 | CONFIG_USB=y | ||
815 | # CONFIG_USB_DEBUG is not set | ||
816 | |||
817 | # | ||
818 | # Miscellaneous USB options | ||
819 | # | ||
820 | CONFIG_USB_DEVICEFS=y | ||
821 | CONFIG_USB_DEVICE_CLASS=y | ||
822 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
823 | # CONFIG_USB_OTG is not set | ||
824 | |||
825 | # | ||
826 | # USB Host Controller Drivers | ||
827 | # | ||
828 | # CONFIG_USB_ISP116X_HCD is not set | ||
829 | CONFIG_USB_OHCI_HCD=y | ||
830 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
831 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
832 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
833 | # CONFIG_USB_SL811_HCD is not set | ||
834 | # CONFIG_USB_R8A66597_HCD is not set | ||
835 | |||
836 | # | ||
837 | # USB Device Class drivers | ||
838 | # | ||
839 | # CONFIG_USB_ACM is not set | ||
840 | # CONFIG_USB_PRINTER is not set | ||
841 | |||
842 | # | ||
843 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
844 | # | ||
845 | |||
846 | # | ||
847 | # may also be needed; see USB_STORAGE Help for more information | ||
848 | # | ||
849 | CONFIG_USB_STORAGE=y | ||
850 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
851 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
852 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
853 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
854 | # CONFIG_USB_STORAGE_DPCM is not set | ||
855 | # CONFIG_USB_STORAGE_USBAT is not set | ||
856 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
857 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
858 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
859 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
860 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
861 | # CONFIG_USB_STORAGE_KARMA is not set | ||
862 | # CONFIG_USB_LIBUSUAL is not set | ||
863 | |||
864 | # | ||
865 | # USB Imaging devices | ||
866 | # | ||
867 | # CONFIG_USB_MDC800 is not set | ||
868 | # CONFIG_USB_MICROTEK is not set | ||
869 | CONFIG_USB_MON=y | ||
870 | |||
871 | # | ||
872 | # USB port drivers | ||
873 | # | ||
874 | |||
875 | # | ||
876 | # USB Serial Converter support | ||
877 | # | ||
878 | # CONFIG_USB_SERIAL is not set | ||
879 | |||
880 | # | ||
881 | # USB Miscellaneous drivers | ||
882 | # | ||
883 | # CONFIG_USB_EMI62 is not set | ||
884 | # CONFIG_USB_EMI26 is not set | ||
885 | # CONFIG_USB_ADUTUX is not set | ||
886 | # CONFIG_USB_AUERSWALD is not set | ||
887 | # CONFIG_USB_RIO500 is not set | ||
888 | # CONFIG_USB_LEGOTOWER is not set | ||
889 | # CONFIG_USB_LCD is not set | ||
890 | # CONFIG_USB_BERRY_CHARGE is not set | ||
891 | # CONFIG_USB_LED is not set | ||
892 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
893 | # CONFIG_USB_CYTHERM is not set | ||
894 | # CONFIG_USB_PHIDGET is not set | ||
895 | # CONFIG_USB_IDMOUSE is not set | ||
896 | # CONFIG_USB_FTDI_ELAN is not set | ||
897 | # CONFIG_USB_APPLEDISPLAY is not set | ||
898 | # CONFIG_USB_LD is not set | ||
899 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
900 | # CONFIG_USB_IOWARRIOR is not set | ||
901 | # CONFIG_USB_TEST is not set | ||
902 | |||
903 | # | ||
904 | # USB DSL modem support | ||
905 | # | ||
906 | |||
907 | # | ||
908 | # USB Gadget Support | ||
909 | # | ||
910 | # CONFIG_USB_GADGET is not set | ||
911 | CONFIG_MMC=y | ||
912 | # CONFIG_MMC_DEBUG is not set | ||
913 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
914 | |||
915 | # | ||
916 | # MMC/SD Card Drivers | ||
917 | # | ||
918 | CONFIG_MMC_BLOCK=y | ||
919 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
920 | # CONFIG_SDIO_UART is not set | ||
921 | |||
922 | # | ||
923 | # MMC/SD Host Controller Drivers | ||
924 | # | ||
925 | CONFIG_MMC_AT91=y | ||
926 | # CONFIG_MMC_SPI is not set | ||
927 | # CONFIG_NEW_LEDS is not set | ||
928 | CONFIG_RTC_LIB=y | ||
929 | # CONFIG_RTC_CLASS is not set | ||
930 | |||
931 | # | ||
932 | # File systems | ||
933 | # | ||
934 | CONFIG_EXT2_FS=y | ||
935 | # CONFIG_EXT2_FS_XATTR is not set | ||
936 | # CONFIG_EXT2_FS_XIP is not set | ||
937 | # CONFIG_EXT3_FS is not set | ||
938 | # CONFIG_EXT4DEV_FS is not set | ||
939 | # CONFIG_REISERFS_FS is not set | ||
940 | # CONFIG_JFS_FS is not set | ||
941 | # CONFIG_FS_POSIX_ACL is not set | ||
942 | # CONFIG_XFS_FS is not set | ||
943 | # CONFIG_GFS2_FS is not set | ||
944 | # CONFIG_OCFS2_FS is not set | ||
945 | # CONFIG_MINIX_FS is not set | ||
946 | # CONFIG_ROMFS_FS is not set | ||
947 | CONFIG_INOTIFY=y | ||
948 | CONFIG_INOTIFY_USER=y | ||
949 | # CONFIG_QUOTA is not set | ||
950 | CONFIG_DNOTIFY=y | ||
951 | # CONFIG_AUTOFS_FS is not set | ||
952 | # CONFIG_AUTOFS4_FS is not set | ||
953 | # CONFIG_FUSE_FS is not set | ||
954 | |||
955 | # | ||
956 | # CD-ROM/DVD Filesystems | ||
957 | # | ||
958 | # CONFIG_ISO9660_FS is not set | ||
959 | # CONFIG_UDF_FS is not set | ||
960 | |||
961 | # | ||
962 | # DOS/FAT/NT Filesystems | ||
963 | # | ||
964 | CONFIG_FAT_FS=y | ||
965 | # CONFIG_MSDOS_FS is not set | ||
966 | CONFIG_VFAT_FS=y | ||
967 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
968 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
969 | # CONFIG_NTFS_FS is not set | ||
970 | |||
971 | # | ||
972 | # Pseudo filesystems | ||
973 | # | ||
974 | CONFIG_PROC_FS=y | ||
975 | CONFIG_PROC_SYSCTL=y | ||
976 | CONFIG_SYSFS=y | ||
977 | CONFIG_TMPFS=y | ||
978 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
979 | # CONFIG_HUGETLB_PAGE is not set | ||
980 | # CONFIG_CONFIGFS_FS is not set | ||
981 | |||
982 | # | ||
983 | # Miscellaneous filesystems | ||
984 | # | ||
985 | # CONFIG_ADFS_FS is not set | ||
986 | # CONFIG_AFFS_FS is not set | ||
987 | # CONFIG_HFS_FS is not set | ||
988 | # CONFIG_HFSPLUS_FS is not set | ||
989 | # CONFIG_BEFS_FS is not set | ||
990 | # CONFIG_BFS_FS is not set | ||
991 | # CONFIG_EFS_FS is not set | ||
992 | CONFIG_JFFS2_FS=y | ||
993 | CONFIG_JFFS2_FS_DEBUG=0 | ||
994 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
995 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
996 | # CONFIG_JFFS2_SUMMARY is not set | ||
997 | # CONFIG_JFFS2_FS_XATTR is not set | ||
998 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
999 | CONFIG_JFFS2_ZLIB=y | ||
1000 | # CONFIG_JFFS2_LZO is not set | ||
1001 | CONFIG_JFFS2_RTIME=y | ||
1002 | # CONFIG_JFFS2_RUBIN is not set | ||
1003 | CONFIG_CRAMFS=y | ||
1004 | # CONFIG_VXFS_FS is not set | ||
1005 | # CONFIG_HPFS_FS is not set | ||
1006 | # CONFIG_QNX4FS_FS is not set | ||
1007 | # CONFIG_SYSV_FS is not set | ||
1008 | # CONFIG_UFS_FS is not set | ||
1009 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1010 | CONFIG_NFS_FS=y | ||
1011 | # CONFIG_NFS_V3 is not set | ||
1012 | # CONFIG_NFS_V4 is not set | ||
1013 | # CONFIG_NFS_DIRECTIO is not set | ||
1014 | # CONFIG_NFSD is not set | ||
1015 | CONFIG_ROOT_NFS=y | ||
1016 | CONFIG_LOCKD=y | ||
1017 | CONFIG_NFS_COMMON=y | ||
1018 | CONFIG_SUNRPC=y | ||
1019 | # CONFIG_SUNRPC_BIND34 is not set | ||
1020 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1021 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1022 | # CONFIG_SMB_FS is not set | ||
1023 | # CONFIG_CIFS is not set | ||
1024 | # CONFIG_NCP_FS is not set | ||
1025 | # CONFIG_CODA_FS is not set | ||
1026 | # CONFIG_AFS_FS is not set | ||
1027 | |||
1028 | # | ||
1029 | # Partition Types | ||
1030 | # | ||
1031 | # CONFIG_PARTITION_ADVANCED is not set | ||
1032 | CONFIG_MSDOS_PARTITION=y | ||
1033 | CONFIG_NLS=y | ||
1034 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1035 | CONFIG_NLS_CODEPAGE_437=y | ||
1036 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1037 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1038 | CONFIG_NLS_CODEPAGE_850=y | ||
1039 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1040 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1041 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1042 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1043 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1044 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1045 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1046 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1047 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1048 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1049 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1050 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1051 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1052 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1053 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1054 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1055 | # CONFIG_NLS_ISO8859_8 is not set | ||
1056 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1057 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1058 | # CONFIG_NLS_ASCII is not set | ||
1059 | CONFIG_NLS_ISO8859_1=y | ||
1060 | # CONFIG_NLS_ISO8859_2 is not set | ||
1061 | # CONFIG_NLS_ISO8859_3 is not set | ||
1062 | # CONFIG_NLS_ISO8859_4 is not set | ||
1063 | # CONFIG_NLS_ISO8859_5 is not set | ||
1064 | # CONFIG_NLS_ISO8859_6 is not set | ||
1065 | # CONFIG_NLS_ISO8859_7 is not set | ||
1066 | # CONFIG_NLS_ISO8859_9 is not set | ||
1067 | # CONFIG_NLS_ISO8859_13 is not set | ||
1068 | # CONFIG_NLS_ISO8859_14 is not set | ||
1069 | # CONFIG_NLS_ISO8859_15 is not set | ||
1070 | # CONFIG_NLS_KOI8_R is not set | ||
1071 | # CONFIG_NLS_KOI8_U is not set | ||
1072 | # CONFIG_NLS_UTF8 is not set | ||
1073 | # CONFIG_DLM is not set | ||
1074 | CONFIG_INSTRUMENTATION=y | ||
1075 | # CONFIG_PROFILING is not set | ||
1076 | # CONFIG_MARKERS is not set | ||
1077 | |||
1078 | # | ||
1079 | # Kernel hacking | ||
1080 | # | ||
1081 | # CONFIG_PRINTK_TIME is not set | ||
1082 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1083 | CONFIG_ENABLE_MUST_CHECK=y | ||
1084 | # CONFIG_MAGIC_SYSRQ is not set | ||
1085 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1086 | CONFIG_DEBUG_FS=y | ||
1087 | # CONFIG_HEADERS_CHECK is not set | ||
1088 | CONFIG_DEBUG_KERNEL=y | ||
1089 | # CONFIG_DEBUG_SHIRQ is not set | ||
1090 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1091 | CONFIG_SCHED_DEBUG=y | ||
1092 | # CONFIG_SCHEDSTATS is not set | ||
1093 | # CONFIG_TIMER_STATS is not set | ||
1094 | # CONFIG_DEBUG_SLAB is not set | ||
1095 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1096 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1097 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1098 | # CONFIG_DEBUG_MUTEXES is not set | ||
1099 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1100 | # CONFIG_PROVE_LOCKING is not set | ||
1101 | # CONFIG_LOCK_STAT is not set | ||
1102 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1103 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1104 | # CONFIG_DEBUG_KOBJECT is not set | ||
1105 | CONFIG_DEBUG_BUGVERBOSE=y | ||
1106 | CONFIG_DEBUG_INFO=y | ||
1107 | # CONFIG_DEBUG_VM is not set | ||
1108 | # CONFIG_DEBUG_LIST is not set | ||
1109 | # CONFIG_DEBUG_SG is not set | ||
1110 | CONFIG_FRAME_POINTER=y | ||
1111 | CONFIG_FORCED_INLINING=y | ||
1112 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1113 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1114 | # CONFIG_FAULT_INJECTION is not set | ||
1115 | # CONFIG_SAMPLES is not set | ||
1116 | CONFIG_DEBUG_USER=y | ||
1117 | # CONFIG_DEBUG_ERRORS is not set | ||
1118 | # CONFIG_DEBUG_LL is not set | ||
1119 | |||
1120 | # | ||
1121 | # Security options | ||
1122 | # | ||
1123 | # CONFIG_KEYS is not set | ||
1124 | # CONFIG_SECURITY is not set | ||
1125 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1126 | # CONFIG_CRYPTO is not set | ||
1127 | |||
1128 | # | ||
1129 | # Library routines | ||
1130 | # | ||
1131 | CONFIG_BITREVERSE=y | ||
1132 | # CONFIG_CRC_CCITT is not set | ||
1133 | # CONFIG_CRC16 is not set | ||
1134 | # CONFIG_CRC_ITU_T is not set | ||
1135 | CONFIG_CRC32=y | ||
1136 | # CONFIG_CRC7 is not set | ||
1137 | # CONFIG_LIBCRC32C is not set | ||
1138 | CONFIG_ZLIB_INFLATE=y | ||
1139 | CONFIG_ZLIB_DEFLATE=y | ||
1140 | CONFIG_PLIST=y | ||
1141 | CONFIG_HAS_IOMEM=y | ||
1142 | CONFIG_HAS_IOPORT=y | ||
1143 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/colibri_defconfig b/arch/arm/configs/colibri_defconfig new file mode 100644 index 000000000000..c3e3418ed4fe --- /dev/null +++ b/arch/arm/configs/colibri_defconfig | |||
@@ -0,0 +1,1481 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.24-rc3 | ||
4 | # Mon Dec 3 13:36:09 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_ARCH_MTD_XIP=y | ||
26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
28 | |||
29 | # | ||
30 | # General setup | ||
31 | # | ||
32 | CONFIG_EXPERIMENTAL=y | ||
33 | CONFIG_BROKEN_ON_SMP=y | ||
34 | CONFIG_LOCK_KERNEL=y | ||
35 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
36 | CONFIG_LOCALVERSION="" | ||
37 | CONFIG_LOCALVERSION_AUTO=y | ||
38 | CONFIG_SWAP=y | ||
39 | CONFIG_SYSVIPC=y | ||
40 | CONFIG_SYSVIPC_SYSCTL=y | ||
41 | CONFIG_POSIX_MQUEUE=y | ||
42 | CONFIG_BSD_PROCESS_ACCT=y | ||
43 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
44 | # CONFIG_TASKSTATS is not set | ||
45 | # CONFIG_USER_NS is not set | ||
46 | # CONFIG_PID_NS is not set | ||
47 | # CONFIG_AUDIT is not set | ||
48 | CONFIG_IKCONFIG=y | ||
49 | CONFIG_IKCONFIG_PROC=y | ||
50 | CONFIG_LOG_BUF_SHIFT=14 | ||
51 | # CONFIG_CGROUPS is not set | ||
52 | CONFIG_FAIR_GROUP_SCHED=y | ||
53 | CONFIG_FAIR_USER_SCHED=y | ||
54 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
55 | CONFIG_SYSFS_DEPRECATED=y | ||
56 | # CONFIG_RELAY is not set | ||
57 | CONFIG_BLK_DEV_INITRD=y | ||
58 | CONFIG_INITRAMFS_SOURCE="" | ||
59 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
60 | CONFIG_SYSCTL=y | ||
61 | CONFIG_EMBEDDED=y | ||
62 | CONFIG_UID16=y | ||
63 | CONFIG_SYSCTL_SYSCALL=y | ||
64 | CONFIG_KALLSYMS=y | ||
65 | # CONFIG_KALLSYMS_ALL is not set | ||
66 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
67 | CONFIG_HOTPLUG=y | ||
68 | CONFIG_PRINTK=y | ||
69 | CONFIG_BUG=y | ||
70 | CONFIG_ELF_CORE=y | ||
71 | CONFIG_BASE_FULL=y | ||
72 | CONFIG_FUTEX=y | ||
73 | CONFIG_ANON_INODES=y | ||
74 | CONFIG_EPOLL=y | ||
75 | CONFIG_SIGNALFD=y | ||
76 | CONFIG_EVENTFD=y | ||
77 | CONFIG_SHMEM=y | ||
78 | CONFIG_VM_EVENT_COUNTERS=y | ||
79 | CONFIG_SLAB=y | ||
80 | # CONFIG_SLUB is not set | ||
81 | # CONFIG_SLOB is not set | ||
82 | CONFIG_RT_MUTEXES=y | ||
83 | # CONFIG_TINY_SHMEM is not set | ||
84 | CONFIG_BASE_SMALL=0 | ||
85 | CONFIG_MODULES=y | ||
86 | CONFIG_MODULE_UNLOAD=y | ||
87 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
88 | CONFIG_MODVERSIONS=y | ||
89 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
90 | CONFIG_KMOD=y | ||
91 | CONFIG_BLOCK=y | ||
92 | CONFIG_LBD=y | ||
93 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
94 | CONFIG_LSF=y | ||
95 | # CONFIG_BLK_DEV_BSG is not set | ||
96 | |||
97 | # | ||
98 | # IO Schedulers | ||
99 | # | ||
100 | CONFIG_IOSCHED_NOOP=y | ||
101 | CONFIG_IOSCHED_AS=y | ||
102 | CONFIG_IOSCHED_DEADLINE=y | ||
103 | CONFIG_IOSCHED_CFQ=y | ||
104 | CONFIG_DEFAULT_AS=y | ||
105 | # CONFIG_DEFAULT_DEADLINE is not set | ||
106 | # CONFIG_DEFAULT_CFQ is not set | ||
107 | # CONFIG_DEFAULT_NOOP is not set | ||
108 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
109 | |||
110 | # | ||
111 | # System Type | ||
112 | # | ||
113 | # CONFIG_ARCH_AAEC2000 is not set | ||
114 | # CONFIG_ARCH_INTEGRATOR is not set | ||
115 | # CONFIG_ARCH_REALVIEW is not set | ||
116 | # CONFIG_ARCH_VERSATILE is not set | ||
117 | # CONFIG_ARCH_AT91 is not set | ||
118 | # CONFIG_ARCH_CLPS7500 is not set | ||
119 | # CONFIG_ARCH_CLPS711X is not set | ||
120 | # CONFIG_ARCH_CO285 is not set | ||
121 | # CONFIG_ARCH_EBSA110 is not set | ||
122 | # CONFIG_ARCH_EP93XX is not set | ||
123 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
124 | # CONFIG_ARCH_NETX is not set | ||
125 | # CONFIG_ARCH_H720X is not set | ||
126 | # CONFIG_ARCH_IMX is not set | ||
127 | # CONFIG_ARCH_IOP13XX is not set | ||
128 | # CONFIG_ARCH_IOP32X is not set | ||
129 | # CONFIG_ARCH_IOP33X is not set | ||
130 | # CONFIG_ARCH_IXP23XX is not set | ||
131 | # CONFIG_ARCH_IXP2000 is not set | ||
132 | # CONFIG_ARCH_IXP4XX is not set | ||
133 | # CONFIG_ARCH_L7200 is not set | ||
134 | # CONFIG_ARCH_KS8695 is not set | ||
135 | # CONFIG_ARCH_NS9XXX is not set | ||
136 | # CONFIG_ARCH_MXC is not set | ||
137 | # CONFIG_ARCH_PNX4008 is not set | ||
138 | CONFIG_ARCH_PXA=y | ||
139 | # CONFIG_ARCH_RPC is not set | ||
140 | # CONFIG_ARCH_SA1100 is not set | ||
141 | # CONFIG_ARCH_S3C2410 is not set | ||
142 | # CONFIG_ARCH_SHARK is not set | ||
143 | # CONFIG_ARCH_LH7A40X is not set | ||
144 | # CONFIG_ARCH_DAVINCI is not set | ||
145 | # CONFIG_ARCH_OMAP is not set | ||
146 | |||
147 | # | ||
148 | # Intel PXA2xx/PXA3xx Implementations | ||
149 | # | ||
150 | # CONFIG_ARCH_LUBBOCK is not set | ||
151 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
152 | # CONFIG_MACH_MAINSTONE is not set | ||
153 | # CONFIG_ARCH_PXA_IDP is not set | ||
154 | # CONFIG_PXA_SHARPSL is not set | ||
155 | # CONFIG_MACH_TRIZEPS4 is not set | ||
156 | # CONFIG_MACH_EM_X270 is not set | ||
157 | CONFIG_MACH_COLIBRI=y | ||
158 | # CONFIG_MACH_ZYLONITE is not set | ||
159 | # CONFIG_MACH_ARMCORE is not set | ||
160 | CONFIG_PXA27x=y | ||
161 | |||
162 | # | ||
163 | # Boot options | ||
164 | # | ||
165 | |||
166 | # | ||
167 | # Power management | ||
168 | # | ||
169 | |||
170 | # | ||
171 | # Processor Type | ||
172 | # | ||
173 | CONFIG_CPU_32=y | ||
174 | CONFIG_CPU_XSCALE=y | ||
175 | CONFIG_CPU_32v5=y | ||
176 | CONFIG_CPU_ABRT_EV5T=y | ||
177 | CONFIG_CPU_CACHE_VIVT=y | ||
178 | CONFIG_CPU_TLB_V4WBI=y | ||
179 | CONFIG_CPU_CP15=y | ||
180 | CONFIG_CPU_CP15_MMU=y | ||
181 | |||
182 | # | ||
183 | # Processor Features | ||
184 | # | ||
185 | CONFIG_ARM_THUMB=y | ||
186 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
187 | # CONFIG_OUTER_CACHE is not set | ||
188 | CONFIG_IWMMXT=y | ||
189 | CONFIG_XSCALE_PMU=y | ||
190 | |||
191 | # | ||
192 | # Bus support | ||
193 | # | ||
194 | # CONFIG_PCI_SYSCALL is not set | ||
195 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
196 | # CONFIG_PCCARD is not set | ||
197 | |||
198 | # | ||
199 | # Kernel Features | ||
200 | # | ||
201 | # CONFIG_TICK_ONESHOT is not set | ||
202 | # CONFIG_NO_HZ is not set | ||
203 | # CONFIG_HIGH_RES_TIMERS is not set | ||
204 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
205 | CONFIG_PREEMPT=y | ||
206 | CONFIG_HZ=100 | ||
207 | CONFIG_AEABI=y | ||
208 | CONFIG_OABI_COMPAT=y | ||
209 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
210 | CONFIG_SELECT_MEMORY_MODEL=y | ||
211 | CONFIG_FLATMEM_MANUAL=y | ||
212 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
213 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
214 | CONFIG_FLATMEM=y | ||
215 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
216 | # CONFIG_SPARSEMEM_STATIC is not set | ||
217 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
218 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
219 | # CONFIG_RESOURCES_64BIT is not set | ||
220 | CONFIG_ZONE_DMA_FLAG=1 | ||
221 | CONFIG_BOUNCE=y | ||
222 | CONFIG_VIRT_TO_BUS=y | ||
223 | CONFIG_ALIGNMENT_TRAP=y | ||
224 | |||
225 | # | ||
226 | # Boot options | ||
227 | # | ||
228 | CONFIG_ZBOOT_ROM_TEXT=0 | ||
229 | CONFIG_ZBOOT_ROM_BSS=0 | ||
230 | CONFIG_CMDLINE="" | ||
231 | # CONFIG_XIP_KERNEL is not set | ||
232 | # CONFIG_KEXEC is not set | ||
233 | |||
234 | # | ||
235 | # Floating point emulation | ||
236 | # | ||
237 | |||
238 | # | ||
239 | # At least one emulation must be selected | ||
240 | # | ||
241 | CONFIG_FPE_NWFPE=y | ||
242 | # CONFIG_FPE_NWFPE_XP is not set | ||
243 | # CONFIG_FPE_FASTFPE is not set | ||
244 | |||
245 | # | ||
246 | # Userspace binary formats | ||
247 | # | ||
248 | CONFIG_BINFMT_ELF=y | ||
249 | # CONFIG_BINFMT_AOUT is not set | ||
250 | # CONFIG_BINFMT_MISC is not set | ||
251 | |||
252 | # | ||
253 | # Power management options | ||
254 | # | ||
255 | CONFIG_PM=y | ||
256 | # CONFIG_PM_LEGACY is not set | ||
257 | # CONFIG_PM_DEBUG is not set | ||
258 | CONFIG_PM_SLEEP=y | ||
259 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
260 | CONFIG_SUSPEND=y | ||
261 | # CONFIG_APM_EMULATION is not set | ||
262 | |||
263 | # | ||
264 | # Networking | ||
265 | # | ||
266 | CONFIG_NET=y | ||
267 | |||
268 | # | ||
269 | # Networking options | ||
270 | # | ||
271 | CONFIG_PACKET=y | ||
272 | CONFIG_PACKET_MMAP=y | ||
273 | CONFIG_UNIX=y | ||
274 | CONFIG_XFRM=y | ||
275 | CONFIG_XFRM_USER=m | ||
276 | # CONFIG_XFRM_SUB_POLICY is not set | ||
277 | # CONFIG_XFRM_MIGRATE is not set | ||
278 | CONFIG_NET_KEY=y | ||
279 | # CONFIG_NET_KEY_MIGRATE is not set | ||
280 | CONFIG_INET=y | ||
281 | # CONFIG_IP_MULTICAST is not set | ||
282 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
283 | CONFIG_IP_FIB_HASH=y | ||
284 | CONFIG_IP_PNP=y | ||
285 | CONFIG_IP_PNP_DHCP=y | ||
286 | CONFIG_IP_PNP_BOOTP=y | ||
287 | # CONFIG_IP_PNP_RARP is not set | ||
288 | # CONFIG_NET_IPIP is not set | ||
289 | # CONFIG_NET_IPGRE is not set | ||
290 | # CONFIG_ARPD is not set | ||
291 | # CONFIG_SYN_COOKIES is not set | ||
292 | # CONFIG_INET_AH is not set | ||
293 | # CONFIG_INET_ESP is not set | ||
294 | # CONFIG_INET_IPCOMP is not set | ||
295 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
296 | # CONFIG_INET_TUNNEL is not set | ||
297 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
298 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
299 | CONFIG_INET_XFRM_MODE_BEET=y | ||
300 | # CONFIG_INET_LRO is not set | ||
301 | CONFIG_INET_DIAG=y | ||
302 | CONFIG_INET_TCP_DIAG=y | ||
303 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
304 | CONFIG_TCP_CONG_CUBIC=y | ||
305 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
306 | # CONFIG_TCP_MD5SIG is not set | ||
307 | # CONFIG_IP_VS is not set | ||
308 | # CONFIG_IPV6 is not set | ||
309 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
310 | # CONFIG_INET6_TUNNEL is not set | ||
311 | # CONFIG_NETLABEL is not set | ||
312 | # CONFIG_NETWORK_SECMARK is not set | ||
313 | CONFIG_NETFILTER=y | ||
314 | # CONFIG_NETFILTER_DEBUG is not set | ||
315 | |||
316 | # | ||
317 | # Core Netfilter Configuration | ||
318 | # | ||
319 | # CONFIG_NETFILTER_NETLINK is not set | ||
320 | # CONFIG_NF_CONNTRACK_ENABLED is not set | ||
321 | # CONFIG_NF_CONNTRACK is not set | ||
322 | # CONFIG_NETFILTER_XTABLES is not set | ||
323 | |||
324 | # | ||
325 | # IP: Netfilter Configuration | ||
326 | # | ||
327 | CONFIG_IP_NF_QUEUE=m | ||
328 | # CONFIG_IP_NF_IPTABLES is not set | ||
329 | # CONFIG_IP_NF_ARPTABLES is not set | ||
330 | # CONFIG_IP_DCCP is not set | ||
331 | # CONFIG_IP_SCTP is not set | ||
332 | # CONFIG_TIPC is not set | ||
333 | # CONFIG_ATM is not set | ||
334 | # CONFIG_BRIDGE is not set | ||
335 | CONFIG_VLAN_8021Q=m | ||
336 | # CONFIG_DECNET is not set | ||
337 | # CONFIG_LLC2 is not set | ||
338 | # CONFIG_IPX is not set | ||
339 | # CONFIG_ATALK is not set | ||
340 | # CONFIG_X25 is not set | ||
341 | # CONFIG_LAPB is not set | ||
342 | # CONFIG_ECONET is not set | ||
343 | # CONFIG_WAN_ROUTER is not set | ||
344 | # CONFIG_NET_SCHED is not set | ||
345 | |||
346 | # | ||
347 | # Network testing | ||
348 | # | ||
349 | # CONFIG_NET_PKTGEN is not set | ||
350 | # CONFIG_HAMRADIO is not set | ||
351 | CONFIG_IRDA=m | ||
352 | |||
353 | # | ||
354 | # IrDA protocols | ||
355 | # | ||
356 | CONFIG_IRLAN=m | ||
357 | CONFIG_IRCOMM=m | ||
358 | CONFIG_IRDA_ULTRA=y | ||
359 | |||
360 | # | ||
361 | # IrDA options | ||
362 | # | ||
363 | CONFIG_IRDA_CACHE_LAST_LSAP=y | ||
364 | CONFIG_IRDA_FAST_RR=y | ||
365 | # CONFIG_IRDA_DEBUG is not set | ||
366 | |||
367 | # | ||
368 | # Infrared-port device drivers | ||
369 | # | ||
370 | |||
371 | # | ||
372 | # SIR device drivers | ||
373 | # | ||
374 | CONFIG_IRTTY_SIR=m | ||
375 | |||
376 | # | ||
377 | # Dongle support | ||
378 | # | ||
379 | # CONFIG_DONGLE is not set | ||
380 | # CONFIG_KINGSUN_DONGLE is not set | ||
381 | # CONFIG_KSDAZZLE_DONGLE is not set | ||
382 | # CONFIG_KS959_DONGLE is not set | ||
383 | |||
384 | # | ||
385 | # Old SIR device drivers | ||
386 | # | ||
387 | # CONFIG_IRPORT_SIR is not set | ||
388 | |||
389 | # | ||
390 | # Old Serial dongle support | ||
391 | # | ||
392 | |||
393 | # | ||
394 | # FIR device drivers | ||
395 | # | ||
396 | # CONFIG_USB_IRDA is not set | ||
397 | # CONFIG_SIGMATEL_FIR is not set | ||
398 | # CONFIG_PXA_FICP is not set | ||
399 | # CONFIG_MCS_FIR is not set | ||
400 | CONFIG_BT=m | ||
401 | CONFIG_BT_L2CAP=m | ||
402 | CONFIG_BT_SCO=m | ||
403 | CONFIG_BT_RFCOMM=m | ||
404 | CONFIG_BT_RFCOMM_TTY=y | ||
405 | CONFIG_BT_BNEP=m | ||
406 | CONFIG_BT_BNEP_MC_FILTER=y | ||
407 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
408 | CONFIG_BT_HIDP=m | ||
409 | |||
410 | # | ||
411 | # Bluetooth device drivers | ||
412 | # | ||
413 | # CONFIG_BT_HCIUSB is not set | ||
414 | # CONFIG_BT_HCIBTUSB is not set | ||
415 | # CONFIG_BT_HCIBTSDIO is not set | ||
416 | # CONFIG_BT_HCIUART is not set | ||
417 | # CONFIG_BT_HCIBCM203X is not set | ||
418 | # CONFIG_BT_HCIBPA10X is not set | ||
419 | # CONFIG_BT_HCIBFUSB is not set | ||
420 | # CONFIG_BT_HCIVHCI is not set | ||
421 | # CONFIG_AF_RXRPC is not set | ||
422 | |||
423 | # | ||
424 | # Wireless | ||
425 | # | ||
426 | CONFIG_CFG80211=y | ||
427 | CONFIG_NL80211=y | ||
428 | CONFIG_WIRELESS_EXT=y | ||
429 | # CONFIG_MAC80211 is not set | ||
430 | CONFIG_IEEE80211=y | ||
431 | # CONFIG_IEEE80211_DEBUG is not set | ||
432 | CONFIG_IEEE80211_CRYPT_WEP=y | ||
433 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
434 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
435 | CONFIG_IEEE80211_SOFTMAC=m | ||
436 | # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set | ||
437 | # CONFIG_RFKILL is not set | ||
438 | # CONFIG_NET_9P is not set | ||
439 | |||
440 | # | ||
441 | # Device Drivers | ||
442 | # | ||
443 | |||
444 | # | ||
445 | # Generic Driver Options | ||
446 | # | ||
447 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
448 | CONFIG_STANDALONE=y | ||
449 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
450 | CONFIG_FW_LOADER=y | ||
451 | # CONFIG_DEBUG_DRIVER is not set | ||
452 | # CONFIG_DEBUG_DEVRES is not set | ||
453 | # CONFIG_SYS_HYPERVISOR is not set | ||
454 | CONFIG_CONNECTOR=y | ||
455 | CONFIG_PROC_EVENTS=y | ||
456 | CONFIG_MTD=y | ||
457 | # CONFIG_MTD_DEBUG is not set | ||
458 | CONFIG_MTD_CONCAT=y | ||
459 | CONFIG_MTD_PARTITIONS=y | ||
460 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
461 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
462 | # CONFIG_MTD_AFS_PARTS is not set | ||
463 | |||
464 | # | ||
465 | # User Modules And Translation Layers | ||
466 | # | ||
467 | CONFIG_MTD_CHAR=y | ||
468 | CONFIG_MTD_BLKDEVS=y | ||
469 | CONFIG_MTD_BLOCK=y | ||
470 | # CONFIG_FTL is not set | ||
471 | # CONFIG_NFTL is not set | ||
472 | # CONFIG_INFTL is not set | ||
473 | # CONFIG_RFD_FTL is not set | ||
474 | # CONFIG_SSFDC is not set | ||
475 | # CONFIG_MTD_OOPS is not set | ||
476 | |||
477 | # | ||
478 | # RAM/ROM/Flash chip drivers | ||
479 | # | ||
480 | CONFIG_MTD_CFI=y | ||
481 | CONFIG_MTD_JEDECPROBE=y | ||
482 | CONFIG_MTD_GEN_PROBE=y | ||
483 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
484 | # CONFIG_MTD_CFI_NOSWAP is not set | ||
485 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
486 | CONFIG_MTD_CFI_LE_BYTE_SWAP=y | ||
487 | CONFIG_MTD_CFI_GEOMETRY=y | ||
488 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
489 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
490 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
491 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
492 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
493 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
494 | CONFIG_MTD_CFI_I1=y | ||
495 | CONFIG_MTD_CFI_I2=y | ||
496 | # CONFIG_MTD_CFI_I4 is not set | ||
497 | # CONFIG_MTD_CFI_I8 is not set | ||
498 | # CONFIG_MTD_OTP is not set | ||
499 | CONFIG_MTD_CFI_INTELEXT=y | ||
500 | CONFIG_MTD_CFI_AMDSTD=y | ||
501 | # CONFIG_MTD_CFI_STAA is not set | ||
502 | CONFIG_MTD_CFI_UTIL=y | ||
503 | # CONFIG_MTD_RAM is not set | ||
504 | # CONFIG_MTD_ROM is not set | ||
505 | # CONFIG_MTD_ABSENT is not set | ||
506 | # CONFIG_MTD_XIP is not set | ||
507 | |||
508 | # | ||
509 | # Mapping drivers for chip access | ||
510 | # | ||
511 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
512 | CONFIG_MTD_PHYSMAP=y | ||
513 | CONFIG_MTD_PHYSMAP_START=0x0 | ||
514 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
515 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
516 | CONFIG_MTD_PXA2XX=y | ||
517 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
518 | # CONFIG_MTD_IMPA7 is not set | ||
519 | # CONFIG_MTD_SHARP_SL is not set | ||
520 | # CONFIG_MTD_PLATRAM is not set | ||
521 | |||
522 | # | ||
523 | # Self-contained MTD device drivers | ||
524 | # | ||
525 | # CONFIG_MTD_SLRAM is not set | ||
526 | # CONFIG_MTD_PHRAM is not set | ||
527 | # CONFIG_MTD_MTDRAM is not set | ||
528 | CONFIG_MTD_BLOCK2MTD=y | ||
529 | |||
530 | # | ||
531 | # Disk-On-Chip Device Drivers | ||
532 | # | ||
533 | # CONFIG_MTD_DOC2000 is not set | ||
534 | # CONFIG_MTD_DOC2001 is not set | ||
535 | # CONFIG_MTD_DOC2001PLUS is not set | ||
536 | CONFIG_MTD_NAND=y | ||
537 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
538 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
539 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
540 | # CONFIG_MTD_NAND_H1900 is not set | ||
541 | CONFIG_MTD_NAND_IDS=y | ||
542 | CONFIG_MTD_NAND_DISKONCHIP=y | ||
543 | CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y | ||
544 | CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000 | ||
545 | CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y | ||
546 | CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y | ||
547 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
548 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
549 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
550 | # CONFIG_MTD_ALAUDA is not set | ||
551 | CONFIG_MTD_ONENAND=y | ||
552 | # CONFIG_MTD_ONENAND_VERIFY_WRITE is not set | ||
553 | # CONFIG_MTD_ONENAND_GENERIC is not set | ||
554 | # CONFIG_MTD_ONENAND_OTP is not set | ||
555 | # CONFIG_MTD_ONENAND_2X_PROGRAM is not set | ||
556 | # CONFIG_MTD_ONENAND_SIM is not set | ||
557 | |||
558 | # | ||
559 | # UBI - Unsorted block images | ||
560 | # | ||
561 | # CONFIG_MTD_UBI is not set | ||
562 | # CONFIG_PARPORT is not set | ||
563 | CONFIG_BLK_DEV=y | ||
564 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
565 | CONFIG_BLK_DEV_LOOP=y | ||
566 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
567 | CONFIG_BLK_DEV_NBD=y | ||
568 | # CONFIG_BLK_DEV_UB is not set | ||
569 | CONFIG_BLK_DEV_RAM=y | ||
570 | CONFIG_BLK_DEV_RAM_COUNT=8 | ||
571 | CONFIG_BLK_DEV_RAM_SIZE=4096 | ||
572 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
573 | # CONFIG_CDROM_PKTCDVD is not set | ||
574 | # CONFIG_ATA_OVER_ETH is not set | ||
575 | CONFIG_MISC_DEVICES=y | ||
576 | # CONFIG_EEPROM_93CX6 is not set | ||
577 | CONFIG_IDE=y | ||
578 | CONFIG_IDE_MAX_HWIFS=4 | ||
579 | CONFIG_BLK_DEV_IDE=y | ||
580 | |||
581 | # | ||
582 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
583 | # | ||
584 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
585 | CONFIG_BLK_DEV_IDEDISK=y | ||
586 | CONFIG_IDEDISK_MULTI_MODE=y | ||
587 | # CONFIG_BLK_DEV_IDECD is not set | ||
588 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
589 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
590 | # CONFIG_IDE_TASK_IOCTL is not set | ||
591 | CONFIG_IDE_PROC_FS=y | ||
592 | |||
593 | # | ||
594 | # IDE chipset support/bugfixes | ||
595 | # | ||
596 | CONFIG_IDE_GENERIC=y | ||
597 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
598 | # CONFIG_IDE_ARM is not set | ||
599 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
600 | CONFIG_IDE_ARCH_OBSOLETE_INIT=y | ||
601 | # CONFIG_BLK_DEV_HD is not set | ||
602 | |||
603 | # | ||
604 | # SCSI device support | ||
605 | # | ||
606 | # CONFIG_RAID_ATTRS is not set | ||
607 | # CONFIG_SCSI is not set | ||
608 | # CONFIG_SCSI_DMA is not set | ||
609 | # CONFIG_SCSI_NETLINK is not set | ||
610 | # CONFIG_ATA is not set | ||
611 | # CONFIG_MD is not set | ||
612 | CONFIG_NETDEVICES=y | ||
613 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
614 | # CONFIG_DUMMY is not set | ||
615 | # CONFIG_BONDING is not set | ||
616 | # CONFIG_MACVLAN is not set | ||
617 | # CONFIG_EQUALIZER is not set | ||
618 | # CONFIG_TUN is not set | ||
619 | # CONFIG_VETH is not set | ||
620 | CONFIG_PHYLIB=y | ||
621 | |||
622 | # | ||
623 | # MII PHY device drivers | ||
624 | # | ||
625 | # CONFIG_MARVELL_PHY is not set | ||
626 | # CONFIG_DAVICOM_PHY is not set | ||
627 | # CONFIG_QSEMI_PHY is not set | ||
628 | # CONFIG_LXT_PHY is not set | ||
629 | # CONFIG_CICADA_PHY is not set | ||
630 | # CONFIG_VITESSE_PHY is not set | ||
631 | # CONFIG_SMSC_PHY is not set | ||
632 | # CONFIG_BROADCOM_PHY is not set | ||
633 | # CONFIG_ICPLUS_PHY is not set | ||
634 | # CONFIG_FIXED_PHY is not set | ||
635 | # CONFIG_MDIO_BITBANG is not set | ||
636 | CONFIG_NET_ETHERNET=y | ||
637 | CONFIG_MII=y | ||
638 | # CONFIG_AX88796 is not set | ||
639 | # CONFIG_SMC91X is not set | ||
640 | CONFIG_DM9000=y | ||
641 | # CONFIG_SMC911X is not set | ||
642 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
643 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
644 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
645 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
646 | # CONFIG_B44 is not set | ||
647 | # CONFIG_NETDEV_1000 is not set | ||
648 | # CONFIG_NETDEV_10000 is not set | ||
649 | |||
650 | # | ||
651 | # Wireless LAN | ||
652 | # | ||
653 | # CONFIG_WLAN_PRE80211 is not set | ||
654 | CONFIG_WLAN_80211=y | ||
655 | # CONFIG_LIBERTAS is not set | ||
656 | # CONFIG_USB_ZD1201 is not set | ||
657 | CONFIG_HOSTAP=y | ||
658 | CONFIG_HOSTAP_FIRMWARE=y | ||
659 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
660 | # CONFIG_ZD1211RW is not set | ||
661 | |||
662 | # | ||
663 | # USB Network Adapters | ||
664 | # | ||
665 | # CONFIG_USB_CATC is not set | ||
666 | # CONFIG_USB_KAWETH is not set | ||
667 | # CONFIG_USB_PEGASUS is not set | ||
668 | # CONFIG_USB_RTL8150 is not set | ||
669 | # CONFIG_USB_USBNET is not set | ||
670 | # CONFIG_WAN is not set | ||
671 | # CONFIG_PPP is not set | ||
672 | # CONFIG_SLIP is not set | ||
673 | # CONFIG_SHAPER is not set | ||
674 | # CONFIG_NETCONSOLE is not set | ||
675 | # CONFIG_NETPOLL is not set | ||
676 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
677 | # CONFIG_ISDN is not set | ||
678 | |||
679 | # | ||
680 | # Input device support | ||
681 | # | ||
682 | CONFIG_INPUT=y | ||
683 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
684 | # CONFIG_INPUT_POLLDEV is not set | ||
685 | |||
686 | # | ||
687 | # Userland interfaces | ||
688 | # | ||
689 | CONFIG_INPUT_MOUSEDEV=y | ||
690 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
691 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=640 | ||
692 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480 | ||
693 | # CONFIG_INPUT_JOYDEV is not set | ||
694 | CONFIG_INPUT_EVDEV=y | ||
695 | # CONFIG_INPUT_EVBUG is not set | ||
696 | |||
697 | # | ||
698 | # Input Device Drivers | ||
699 | # | ||
700 | CONFIG_INPUT_KEYBOARD=y | ||
701 | CONFIG_KEYBOARD_ATKBD=m | ||
702 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
703 | # CONFIG_KEYBOARD_LKKBD is not set | ||
704 | # CONFIG_KEYBOARD_XTKBD is not set | ||
705 | # CONFIG_KEYBOARD_NEWTON is not set | ||
706 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
707 | # CONFIG_KEYBOARD_PXA27x is not set | ||
708 | # CONFIG_KEYBOARD_GPIO is not set | ||
709 | CONFIG_INPUT_MOUSE=y | ||
710 | # CONFIG_MOUSE_PS2 is not set | ||
711 | CONFIG_MOUSE_SERIAL=m | ||
712 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
713 | # CONFIG_MOUSE_VSXXXAA is not set | ||
714 | # CONFIG_MOUSE_GPIO is not set | ||
715 | # CONFIG_INPUT_JOYSTICK is not set | ||
716 | # CONFIG_INPUT_TABLET is not set | ||
717 | CONFIG_INPUT_TOUCHSCREEN=y | ||
718 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
719 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
720 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
721 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
722 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
723 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
724 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
725 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
726 | CONFIG_TOUCHSCREEN_UCB1400=y | ||
727 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
728 | CONFIG_INPUT_MISC=y | ||
729 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
730 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
731 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
732 | # CONFIG_INPUT_POWERMATE is not set | ||
733 | # CONFIG_INPUT_YEALINK is not set | ||
734 | CONFIG_INPUT_UINPUT=m | ||
735 | |||
736 | # | ||
737 | # Hardware I/O ports | ||
738 | # | ||
739 | CONFIG_SERIO=y | ||
740 | CONFIG_SERIO_SERPORT=y | ||
741 | CONFIG_SERIO_LIBPS2=y | ||
742 | # CONFIG_SERIO_RAW is not set | ||
743 | # CONFIG_GAMEPORT is not set | ||
744 | |||
745 | # | ||
746 | # Character devices | ||
747 | # | ||
748 | CONFIG_VT=y | ||
749 | CONFIG_VT_CONSOLE=y | ||
750 | CONFIG_HW_CONSOLE=y | ||
751 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
752 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
753 | |||
754 | # | ||
755 | # Serial drivers | ||
756 | # | ||
757 | # CONFIG_SERIAL_8250 is not set | ||
758 | |||
759 | # | ||
760 | # Non-8250 serial port support | ||
761 | # | ||
762 | CONFIG_SERIAL_PXA=y | ||
763 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
764 | CONFIG_SERIAL_CORE=y | ||
765 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
766 | CONFIG_UNIX98_PTYS=y | ||
767 | CONFIG_LEGACY_PTYS=y | ||
768 | CONFIG_LEGACY_PTY_COUNT=256 | ||
769 | # CONFIG_IPMI_HANDLER is not set | ||
770 | CONFIG_HW_RANDOM=y | ||
771 | # CONFIG_NVRAM is not set | ||
772 | # CONFIG_R3964 is not set | ||
773 | # CONFIG_RAW_DRIVER is not set | ||
774 | # CONFIG_TCG_TPM is not set | ||
775 | CONFIG_I2C=y | ||
776 | CONFIG_I2C_BOARDINFO=y | ||
777 | CONFIG_I2C_CHARDEV=y | ||
778 | |||
779 | # | ||
780 | # I2C Algorithms | ||
781 | # | ||
782 | # CONFIG_I2C_ALGOBIT is not set | ||
783 | # CONFIG_I2C_ALGOPCF is not set | ||
784 | # CONFIG_I2C_ALGOPCA is not set | ||
785 | |||
786 | # | ||
787 | # I2C Hardware Bus support | ||
788 | # | ||
789 | # CONFIG_I2C_GPIO is not set | ||
790 | # CONFIG_I2C_PXA is not set | ||
791 | # CONFIG_I2C_OCORES is not set | ||
792 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
793 | # CONFIG_I2C_SIMTEC is not set | ||
794 | # CONFIG_I2C_TAOS_EVM is not set | ||
795 | # CONFIG_I2C_STUB is not set | ||
796 | # CONFIG_I2C_TINY_USB is not set | ||
797 | |||
798 | # | ||
799 | # Miscellaneous I2C Chip support | ||
800 | # | ||
801 | # CONFIG_SENSORS_DS1337 is not set | ||
802 | # CONFIG_SENSORS_DS1374 is not set | ||
803 | # CONFIG_DS1682 is not set | ||
804 | # CONFIG_SENSORS_EEPROM is not set | ||
805 | # CONFIG_SENSORS_PCF8574 is not set | ||
806 | # CONFIG_SENSORS_PCA9539 is not set | ||
807 | # CONFIG_SENSORS_PCF8591 is not set | ||
808 | # CONFIG_SENSORS_MAX6875 is not set | ||
809 | # CONFIG_SENSORS_TSL2550 is not set | ||
810 | # CONFIG_I2C_DEBUG_CORE is not set | ||
811 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
812 | # CONFIG_I2C_DEBUG_BUS is not set | ||
813 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
814 | |||
815 | # | ||
816 | # SPI support | ||
817 | # | ||
818 | # CONFIG_SPI is not set | ||
819 | # CONFIG_SPI_MASTER is not set | ||
820 | # CONFIG_W1 is not set | ||
821 | # CONFIG_POWER_SUPPLY is not set | ||
822 | CONFIG_HWMON=y | ||
823 | # CONFIG_HWMON_VID is not set | ||
824 | # CONFIG_SENSORS_AD7418 is not set | ||
825 | # CONFIG_SENSORS_ADM1021 is not set | ||
826 | # CONFIG_SENSORS_ADM1025 is not set | ||
827 | # CONFIG_SENSORS_ADM1026 is not set | ||
828 | # CONFIG_SENSORS_ADM1029 is not set | ||
829 | # CONFIG_SENSORS_ADM1031 is not set | ||
830 | # CONFIG_SENSORS_ADM9240 is not set | ||
831 | # CONFIG_SENSORS_ADT7470 is not set | ||
832 | # CONFIG_SENSORS_ATXP1 is not set | ||
833 | # CONFIG_SENSORS_DS1621 is not set | ||
834 | # CONFIG_SENSORS_F71805F is not set | ||
835 | # CONFIG_SENSORS_F71882FG is not set | ||
836 | # CONFIG_SENSORS_F75375S is not set | ||
837 | # CONFIG_SENSORS_GL518SM is not set | ||
838 | # CONFIG_SENSORS_GL520SM is not set | ||
839 | # CONFIG_SENSORS_IT87 is not set | ||
840 | # CONFIG_SENSORS_LM63 is not set | ||
841 | # CONFIG_SENSORS_LM75 is not set | ||
842 | # CONFIG_SENSORS_LM77 is not set | ||
843 | # CONFIG_SENSORS_LM78 is not set | ||
844 | # CONFIG_SENSORS_LM80 is not set | ||
845 | # CONFIG_SENSORS_LM83 is not set | ||
846 | # CONFIG_SENSORS_LM85 is not set | ||
847 | # CONFIG_SENSORS_LM87 is not set | ||
848 | # CONFIG_SENSORS_LM90 is not set | ||
849 | # CONFIG_SENSORS_LM92 is not set | ||
850 | # CONFIG_SENSORS_LM93 is not set | ||
851 | # CONFIG_SENSORS_MAX1619 is not set | ||
852 | # CONFIG_SENSORS_MAX6650 is not set | ||
853 | # CONFIG_SENSORS_PC87360 is not set | ||
854 | # CONFIG_SENSORS_PC87427 is not set | ||
855 | # CONFIG_SENSORS_DME1737 is not set | ||
856 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
857 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
858 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
859 | # CONFIG_SENSORS_THMC50 is not set | ||
860 | # CONFIG_SENSORS_VT1211 is not set | ||
861 | # CONFIG_SENSORS_W83781D is not set | ||
862 | # CONFIG_SENSORS_W83791D is not set | ||
863 | # CONFIG_SENSORS_W83792D is not set | ||
864 | # CONFIG_SENSORS_W83793 is not set | ||
865 | # CONFIG_SENSORS_W83L785TS is not set | ||
866 | # CONFIG_SENSORS_W83627HF is not set | ||
867 | # CONFIG_SENSORS_W83627EHF is not set | ||
868 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
869 | CONFIG_WATCHDOG=y | ||
870 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
871 | |||
872 | # | ||
873 | # Watchdog Device Drivers | ||
874 | # | ||
875 | # CONFIG_SOFT_WATCHDOG is not set | ||
876 | # CONFIG_SA1100_WATCHDOG is not set | ||
877 | |||
878 | # | ||
879 | # USB-based Watchdog Cards | ||
880 | # | ||
881 | # CONFIG_USBPCWATCHDOG is not set | ||
882 | |||
883 | # | ||
884 | # Sonics Silicon Backplane | ||
885 | # | ||
886 | CONFIG_SSB_POSSIBLE=y | ||
887 | # CONFIG_SSB is not set | ||
888 | |||
889 | # | ||
890 | # Multifunction device drivers | ||
891 | # | ||
892 | # CONFIG_MFD_SM501 is not set | ||
893 | |||
894 | # | ||
895 | # Multimedia devices | ||
896 | # | ||
897 | # CONFIG_VIDEO_DEV is not set | ||
898 | # CONFIG_DVB_CORE is not set | ||
899 | CONFIG_DAB=y | ||
900 | # CONFIG_USB_DABUSB is not set | ||
901 | |||
902 | # | ||
903 | # Graphics support | ||
904 | # | ||
905 | # CONFIG_VGASTATE is not set | ||
906 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
907 | CONFIG_FB=y | ||
908 | CONFIG_FIRMWARE_EDID=y | ||
909 | # CONFIG_FB_DDC is not set | ||
910 | CONFIG_FB_CFB_FILLRECT=y | ||
911 | CONFIG_FB_CFB_COPYAREA=y | ||
912 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
913 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
914 | # CONFIG_FB_SYS_FILLRECT is not set | ||
915 | # CONFIG_FB_SYS_COPYAREA is not set | ||
916 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
917 | # CONFIG_FB_SYS_FOPS is not set | ||
918 | CONFIG_FB_DEFERRED_IO=y | ||
919 | # CONFIG_FB_SVGALIB is not set | ||
920 | # CONFIG_FB_MACMODES is not set | ||
921 | # CONFIG_FB_BACKLIGHT is not set | ||
922 | # CONFIG_FB_MODE_HELPERS is not set | ||
923 | # CONFIG_FB_TILEBLITTING is not set | ||
924 | |||
925 | # | ||
926 | # Frame buffer hardware drivers | ||
927 | # | ||
928 | # CONFIG_FB_UVESA is not set | ||
929 | # CONFIG_FB_S1D13XXX is not set | ||
930 | CONFIG_FB_PXA=y | ||
931 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
932 | # CONFIG_FB_MBX is not set | ||
933 | # CONFIG_FB_VIRTUAL is not set | ||
934 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
935 | CONFIG_LCD_CLASS_DEVICE=y | ||
936 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
937 | # CONFIG_BACKLIGHT_CORGI is not set | ||
938 | |||
939 | # | ||
940 | # Display device support | ||
941 | # | ||
942 | # CONFIG_DISPLAY_SUPPORT is not set | ||
943 | |||
944 | # | ||
945 | # Console display driver support | ||
946 | # | ||
947 | # CONFIG_VGA_CONSOLE is not set | ||
948 | CONFIG_DUMMY_CONSOLE=y | ||
949 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
950 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
951 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
952 | CONFIG_FONTS=y | ||
953 | CONFIG_FONT_8x8=y | ||
954 | CONFIG_FONT_8x16=y | ||
955 | # CONFIG_FONT_6x11 is not set | ||
956 | # CONFIG_FONT_7x14 is not set | ||
957 | # CONFIG_FONT_PEARL_8x8 is not set | ||
958 | # CONFIG_FONT_ACORN_8x8 is not set | ||
959 | # CONFIG_FONT_MINI_4x6 is not set | ||
960 | # CONFIG_FONT_SUN8x16 is not set | ||
961 | # CONFIG_FONT_SUN12x22 is not set | ||
962 | # CONFIG_FONT_10x18 is not set | ||
963 | CONFIG_LOGO=y | ||
964 | CONFIG_LOGO_LINUX_MONO=y | ||
965 | CONFIG_LOGO_LINUX_VGA16=y | ||
966 | CONFIG_LOGO_LINUX_CLUT224=y | ||
967 | |||
968 | # | ||
969 | # Sound | ||
970 | # | ||
971 | # CONFIG_SOUND is not set | ||
972 | CONFIG_AC97_BUS=y | ||
973 | CONFIG_HID_SUPPORT=y | ||
974 | CONFIG_HID=y | ||
975 | # CONFIG_HID_DEBUG is not set | ||
976 | # CONFIG_HIDRAW is not set | ||
977 | |||
978 | # | ||
979 | # USB Input Devices | ||
980 | # | ||
981 | # CONFIG_USB_HID is not set | ||
982 | |||
983 | # | ||
984 | # USB HID Boot Protocol drivers | ||
985 | # | ||
986 | # CONFIG_USB_KBD is not set | ||
987 | # CONFIG_USB_MOUSE is not set | ||
988 | CONFIG_USB_SUPPORT=y | ||
989 | CONFIG_USB_ARCH_HAS_HCD=y | ||
990 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
991 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
992 | CONFIG_USB=y | ||
993 | # CONFIG_USB_DEBUG is not set | ||
994 | |||
995 | # | ||
996 | # Miscellaneous USB options | ||
997 | # | ||
998 | CONFIG_USB_DEVICEFS=y | ||
999 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1000 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1001 | # CONFIG_USB_SUSPEND is not set | ||
1002 | # CONFIG_USB_PERSIST is not set | ||
1003 | # CONFIG_USB_OTG is not set | ||
1004 | |||
1005 | # | ||
1006 | # USB Host Controller Drivers | ||
1007 | # | ||
1008 | # CONFIG_USB_ISP116X_HCD is not set | ||
1009 | # CONFIG_USB_OHCI_HCD is not set | ||
1010 | # CONFIG_USB_SL811_HCD is not set | ||
1011 | # CONFIG_USB_R8A66597_HCD is not set | ||
1012 | |||
1013 | # | ||
1014 | # USB Device Class drivers | ||
1015 | # | ||
1016 | # CONFIG_USB_ACM is not set | ||
1017 | # CONFIG_USB_PRINTER is not set | ||
1018 | |||
1019 | # | ||
1020 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1021 | # | ||
1022 | |||
1023 | # | ||
1024 | # may also be needed; see USB_STORAGE Help for more information | ||
1025 | # | ||
1026 | # CONFIG_USB_LIBUSUAL is not set | ||
1027 | |||
1028 | # | ||
1029 | # USB Imaging devices | ||
1030 | # | ||
1031 | # CONFIG_USB_MDC800 is not set | ||
1032 | # CONFIG_USB_MON is not set | ||
1033 | |||
1034 | # | ||
1035 | # USB port drivers | ||
1036 | # | ||
1037 | |||
1038 | # | ||
1039 | # USB Serial Converter support | ||
1040 | # | ||
1041 | CONFIG_USB_SERIAL=m | ||
1042 | # CONFIG_USB_SERIAL_GENERIC is not set | ||
1043 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
1044 | # CONFIG_USB_SERIAL_AIRPRIME is not set | ||
1045 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1046 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
1047 | # CONFIG_USB_SERIAL_CH341 is not set | ||
1048 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
1049 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
1050 | # CONFIG_USB_SERIAL_CP2101 is not set | ||
1051 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
1052 | # CONFIG_USB_SERIAL_EMPEG is not set | ||
1053 | # CONFIG_USB_SERIAL_FTDI_SIO is not set | ||
1054 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1055 | # CONFIG_USB_SERIAL_VISOR is not set | ||
1056 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
1057 | # CONFIG_USB_SERIAL_IR is not set | ||
1058 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
1059 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
1060 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
1061 | # CONFIG_USB_SERIAL_IPW is not set | ||
1062 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
1063 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
1064 | # CONFIG_USB_SERIAL_KLSI is not set | ||
1065 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
1066 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
1067 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
1068 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
1069 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
1070 | # CONFIG_USB_SERIAL_PL2303 is not set | ||
1071 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
1072 | # CONFIG_USB_SERIAL_HP4X is not set | ||
1073 | # CONFIG_USB_SERIAL_SAFE is not set | ||
1074 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1075 | # CONFIG_USB_SERIAL_TI is not set | ||
1076 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
1077 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
1078 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1079 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
1080 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
1081 | |||
1082 | # | ||
1083 | # USB Miscellaneous drivers | ||
1084 | # | ||
1085 | # CONFIG_USB_EMI62 is not set | ||
1086 | # CONFIG_USB_EMI26 is not set | ||
1087 | # CONFIG_USB_ADUTUX is not set | ||
1088 | # CONFIG_USB_AUERSWALD is not set | ||
1089 | # CONFIG_USB_RIO500 is not set | ||
1090 | # CONFIG_USB_LEGOTOWER is not set | ||
1091 | # CONFIG_USB_LCD is not set | ||
1092 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1093 | # CONFIG_USB_LED is not set | ||
1094 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1095 | # CONFIG_USB_CYTHERM is not set | ||
1096 | # CONFIG_USB_PHIDGET is not set | ||
1097 | # CONFIG_USB_IDMOUSE is not set | ||
1098 | # CONFIG_USB_FTDI_ELAN is not set | ||
1099 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1100 | # CONFIG_USB_LD is not set | ||
1101 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1102 | # CONFIG_USB_IOWARRIOR is not set | ||
1103 | # CONFIG_USB_TEST is not set | ||
1104 | |||
1105 | # | ||
1106 | # USB DSL modem support | ||
1107 | # | ||
1108 | |||
1109 | # | ||
1110 | # USB Gadget Support | ||
1111 | # | ||
1112 | CONFIG_USB_GADGET=m | ||
1113 | # CONFIG_USB_GADGET_DEBUG is not set | ||
1114 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1115 | # CONFIG_USB_GADGET_DEBUG_FS is not set | ||
1116 | CONFIG_USB_GADGET_SELECTED=y | ||
1117 | # CONFIG_USB_GADGET_AMD5536UDC is not set | ||
1118 | # CONFIG_USB_GADGET_ATMEL_USBA is not set | ||
1119 | # CONFIG_USB_GADGET_FSL_USB2 is not set | ||
1120 | # CONFIG_USB_GADGET_NET2280 is not set | ||
1121 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
1122 | # CONFIG_USB_GADGET_M66592 is not set | ||
1123 | # CONFIG_USB_GADGET_GOKU is not set | ||
1124 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1125 | # CONFIG_USB_GADGET_OMAP is not set | ||
1126 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
1127 | # CONFIG_USB_GADGET_AT91 is not set | ||
1128 | CONFIG_USB_GADGET_DUMMY_HCD=y | ||
1129 | CONFIG_USB_DUMMY_HCD=m | ||
1130 | CONFIG_USB_GADGET_DUALSPEED=y | ||
1131 | # CONFIG_USB_ZERO is not set | ||
1132 | # CONFIG_USB_ETH is not set | ||
1133 | # CONFIG_USB_GADGETFS is not set | ||
1134 | # CONFIG_USB_FILE_STORAGE is not set | ||
1135 | # CONFIG_USB_G_SERIAL is not set | ||
1136 | # CONFIG_USB_MIDI_GADGET is not set | ||
1137 | CONFIG_MMC=y | ||
1138 | # CONFIG_MMC_DEBUG is not set | ||
1139 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
1140 | |||
1141 | # | ||
1142 | # MMC/SD Card Drivers | ||
1143 | # | ||
1144 | CONFIG_MMC_BLOCK=y | ||
1145 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
1146 | # CONFIG_SDIO_UART is not set | ||
1147 | |||
1148 | # | ||
1149 | # MMC/SD Host Controller Drivers | ||
1150 | # | ||
1151 | # CONFIG_MMC_PXA is not set | ||
1152 | CONFIG_NEW_LEDS=y | ||
1153 | # CONFIG_LEDS_CLASS is not set | ||
1154 | |||
1155 | # | ||
1156 | # LED drivers | ||
1157 | # | ||
1158 | |||
1159 | # | ||
1160 | # LED Triggers | ||
1161 | # | ||
1162 | CONFIG_LEDS_TRIGGERS=y | ||
1163 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
1164 | # CONFIG_LEDS_TRIGGER_IDE_DISK is not set | ||
1165 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
1166 | CONFIG_RTC_LIB=y | ||
1167 | CONFIG_RTC_CLASS=y | ||
1168 | # CONFIG_RTC_HCTOSYS is not set | ||
1169 | # CONFIG_RTC_DEBUG is not set | ||
1170 | |||
1171 | # | ||
1172 | # RTC interfaces | ||
1173 | # | ||
1174 | CONFIG_RTC_INTF_SYSFS=y | ||
1175 | CONFIG_RTC_INTF_PROC=y | ||
1176 | CONFIG_RTC_INTF_DEV=y | ||
1177 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1178 | # CONFIG_RTC_DRV_TEST is not set | ||
1179 | |||
1180 | # | ||
1181 | # I2C RTC drivers | ||
1182 | # | ||
1183 | # CONFIG_RTC_DRV_DS1307 is not set | ||
1184 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1185 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1186 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1187 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1188 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1189 | # CONFIG_RTC_DRV_X1205 is not set | ||
1190 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1191 | CONFIG_RTC_DRV_PCF8583=m | ||
1192 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1193 | |||
1194 | # | ||
1195 | # SPI RTC drivers | ||
1196 | # | ||
1197 | |||
1198 | # | ||
1199 | # Platform RTC drivers | ||
1200 | # | ||
1201 | # CONFIG_RTC_DRV_CMOS is not set | ||
1202 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1203 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1204 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1205 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1206 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1207 | # CONFIG_RTC_DRV_V3020 is not set | ||
1208 | |||
1209 | # | ||
1210 | # on-CPU RTC drivers | ||
1211 | # | ||
1212 | # CONFIG_RTC_DRV_SA1100 is not set | ||
1213 | |||
1214 | # | ||
1215 | # File systems | ||
1216 | # | ||
1217 | # CONFIG_EXT2_FS is not set | ||
1218 | # CONFIG_EXT3_FS is not set | ||
1219 | # CONFIG_EXT4DEV_FS is not set | ||
1220 | # CONFIG_REISERFS_FS is not set | ||
1221 | # CONFIG_JFS_FS is not set | ||
1222 | CONFIG_FS_POSIX_ACL=y | ||
1223 | # CONFIG_XFS_FS is not set | ||
1224 | # CONFIG_GFS2_FS is not set | ||
1225 | # CONFIG_OCFS2_FS is not set | ||
1226 | # CONFIG_MINIX_FS is not set | ||
1227 | # CONFIG_ROMFS_FS is not set | ||
1228 | CONFIG_INOTIFY=y | ||
1229 | CONFIG_INOTIFY_USER=y | ||
1230 | # CONFIG_QUOTA is not set | ||
1231 | CONFIG_DNOTIFY=y | ||
1232 | # CONFIG_AUTOFS_FS is not set | ||
1233 | CONFIG_AUTOFS4_FS=y | ||
1234 | # CONFIG_FUSE_FS is not set | ||
1235 | |||
1236 | # | ||
1237 | # CD-ROM/DVD Filesystems | ||
1238 | # | ||
1239 | # CONFIG_ISO9660_FS is not set | ||
1240 | # CONFIG_UDF_FS is not set | ||
1241 | |||
1242 | # | ||
1243 | # DOS/FAT/NT Filesystems | ||
1244 | # | ||
1245 | CONFIG_FAT_FS=m | ||
1246 | CONFIG_MSDOS_FS=m | ||
1247 | CONFIG_VFAT_FS=m | ||
1248 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1249 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" | ||
1250 | # CONFIG_NTFS_FS is not set | ||
1251 | |||
1252 | # | ||
1253 | # Pseudo filesystems | ||
1254 | # | ||
1255 | CONFIG_PROC_FS=y | ||
1256 | CONFIG_PROC_SYSCTL=y | ||
1257 | CONFIG_SYSFS=y | ||
1258 | CONFIG_TMPFS=y | ||
1259 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1260 | # CONFIG_HUGETLB_PAGE is not set | ||
1261 | CONFIG_CONFIGFS_FS=y | ||
1262 | |||
1263 | # | ||
1264 | # Miscellaneous filesystems | ||
1265 | # | ||
1266 | # CONFIG_ADFS_FS is not set | ||
1267 | # CONFIG_AFFS_FS is not set | ||
1268 | # CONFIG_ECRYPT_FS is not set | ||
1269 | # CONFIG_HFS_FS is not set | ||
1270 | # CONFIG_HFSPLUS_FS is not set | ||
1271 | # CONFIG_BEFS_FS is not set | ||
1272 | # CONFIG_BFS_FS is not set | ||
1273 | # CONFIG_EFS_FS is not set | ||
1274 | CONFIG_JFFS2_FS=y | ||
1275 | CONFIG_JFFS2_FS_DEBUG=1 | ||
1276 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1277 | CONFIG_JFFS2_FS_WBUF_VERIFY=y | ||
1278 | # CONFIG_JFFS2_SUMMARY is not set | ||
1279 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1280 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1281 | CONFIG_JFFS2_ZLIB=y | ||
1282 | # CONFIG_JFFS2_LZO is not set | ||
1283 | CONFIG_JFFS2_RTIME=y | ||
1284 | # CONFIG_JFFS2_RUBIN is not set | ||
1285 | # CONFIG_CRAMFS is not set | ||
1286 | # CONFIG_VXFS_FS is not set | ||
1287 | # CONFIG_HPFS_FS is not set | ||
1288 | # CONFIG_QNX4FS_FS is not set | ||
1289 | # CONFIG_SYSV_FS is not set | ||
1290 | # CONFIG_UFS_FS is not set | ||
1291 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1292 | CONFIG_NFS_FS=y | ||
1293 | CONFIG_NFS_V3=y | ||
1294 | # CONFIG_NFS_V3_ACL is not set | ||
1295 | CONFIG_NFS_V4=y | ||
1296 | # CONFIG_NFS_DIRECTIO is not set | ||
1297 | CONFIG_NFSD=y | ||
1298 | CONFIG_NFSD_V3=y | ||
1299 | # CONFIG_NFSD_V3_ACL is not set | ||
1300 | CONFIG_NFSD_V4=y | ||
1301 | CONFIG_NFSD_TCP=y | ||
1302 | CONFIG_ROOT_NFS=y | ||
1303 | CONFIG_LOCKD=y | ||
1304 | CONFIG_LOCKD_V4=y | ||
1305 | CONFIG_EXPORTFS=y | ||
1306 | CONFIG_NFS_COMMON=y | ||
1307 | CONFIG_SUNRPC=y | ||
1308 | CONFIG_SUNRPC_GSS=y | ||
1309 | # CONFIG_SUNRPC_BIND34 is not set | ||
1310 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1311 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1312 | # CONFIG_SMB_FS is not set | ||
1313 | # CONFIG_CIFS is not set | ||
1314 | # CONFIG_NCP_FS is not set | ||
1315 | # CONFIG_CODA_FS is not set | ||
1316 | # CONFIG_AFS_FS is not set | ||
1317 | |||
1318 | # | ||
1319 | # Partition Types | ||
1320 | # | ||
1321 | # CONFIG_PARTITION_ADVANCED is not set | ||
1322 | CONFIG_MSDOS_PARTITION=y | ||
1323 | CONFIG_NLS=y | ||
1324 | CONFIG_NLS_DEFAULT="iso8859-15" | ||
1325 | CONFIG_NLS_CODEPAGE_437=y | ||
1326 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1327 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1328 | CONFIG_NLS_CODEPAGE_850=y | ||
1329 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1330 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1331 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1332 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1333 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1334 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1335 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1336 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1337 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1338 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1339 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1340 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1341 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1342 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1343 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1344 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1345 | # CONFIG_NLS_ISO8859_8 is not set | ||
1346 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1347 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1348 | CONFIG_NLS_ASCII=y | ||
1349 | CONFIG_NLS_ISO8859_1=m | ||
1350 | # CONFIG_NLS_ISO8859_2 is not set | ||
1351 | # CONFIG_NLS_ISO8859_3 is not set | ||
1352 | # CONFIG_NLS_ISO8859_4 is not set | ||
1353 | # CONFIG_NLS_ISO8859_5 is not set | ||
1354 | # CONFIG_NLS_ISO8859_6 is not set | ||
1355 | # CONFIG_NLS_ISO8859_7 is not set | ||
1356 | # CONFIG_NLS_ISO8859_9 is not set | ||
1357 | # CONFIG_NLS_ISO8859_13 is not set | ||
1358 | # CONFIG_NLS_ISO8859_14 is not set | ||
1359 | CONFIG_NLS_ISO8859_15=m | ||
1360 | # CONFIG_NLS_KOI8_R is not set | ||
1361 | # CONFIG_NLS_KOI8_U is not set | ||
1362 | CONFIG_NLS_UTF8=m | ||
1363 | # CONFIG_DLM is not set | ||
1364 | CONFIG_INSTRUMENTATION=y | ||
1365 | # CONFIG_PROFILING is not set | ||
1366 | # CONFIG_MARKERS is not set | ||
1367 | |||
1368 | # | ||
1369 | # Kernel hacking | ||
1370 | # | ||
1371 | CONFIG_PRINTK_TIME=y | ||
1372 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1373 | CONFIG_ENABLE_MUST_CHECK=y | ||
1374 | CONFIG_MAGIC_SYSRQ=y | ||
1375 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1376 | CONFIG_DEBUG_FS=y | ||
1377 | # CONFIG_HEADERS_CHECK is not set | ||
1378 | CONFIG_DEBUG_KERNEL=y | ||
1379 | # CONFIG_DEBUG_SHIRQ is not set | ||
1380 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1381 | CONFIG_SCHED_DEBUG=y | ||
1382 | # CONFIG_SCHEDSTATS is not set | ||
1383 | # CONFIG_TIMER_STATS is not set | ||
1384 | # CONFIG_DEBUG_SLAB is not set | ||
1385 | CONFIG_DEBUG_PREEMPT=y | ||
1386 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1387 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1388 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1389 | # CONFIG_DEBUG_MUTEXES is not set | ||
1390 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1391 | # CONFIG_PROVE_LOCKING is not set | ||
1392 | # CONFIG_LOCK_STAT is not set | ||
1393 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1394 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1395 | # CONFIG_DEBUG_KOBJECT is not set | ||
1396 | CONFIG_DEBUG_BUGVERBOSE=y | ||
1397 | CONFIG_DEBUG_INFO=y | ||
1398 | # CONFIG_DEBUG_VM is not set | ||
1399 | # CONFIG_DEBUG_LIST is not set | ||
1400 | # CONFIG_DEBUG_SG is not set | ||
1401 | CONFIG_FRAME_POINTER=y | ||
1402 | CONFIG_FORCED_INLINING=y | ||
1403 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1404 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1405 | # CONFIG_FAULT_INJECTION is not set | ||
1406 | # CONFIG_SAMPLES is not set | ||
1407 | CONFIG_DEBUG_USER=y | ||
1408 | CONFIG_DEBUG_ERRORS=y | ||
1409 | CONFIG_DEBUG_LL=y | ||
1410 | # CONFIG_DEBUG_ICEDCC is not set | ||
1411 | |||
1412 | # | ||
1413 | # Security options | ||
1414 | # | ||
1415 | CONFIG_KEYS=y | ||
1416 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
1417 | CONFIG_SECURITY=y | ||
1418 | # CONFIG_SECURITY_NETWORK is not set | ||
1419 | CONFIG_SECURITY_CAPABILITIES=y | ||
1420 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1421 | # CONFIG_SECURITY_ROOTPLUG is not set | ||
1422 | CONFIG_CRYPTO=y | ||
1423 | CONFIG_CRYPTO_ALGAPI=y | ||
1424 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1425 | CONFIG_CRYPTO_MANAGER=y | ||
1426 | # CONFIG_CRYPTO_HMAC is not set | ||
1427 | # CONFIG_CRYPTO_XCBC is not set | ||
1428 | # CONFIG_CRYPTO_NULL is not set | ||
1429 | # CONFIG_CRYPTO_MD4 is not set | ||
1430 | CONFIG_CRYPTO_MD5=y | ||
1431 | CONFIG_CRYPTO_SHA1=m | ||
1432 | CONFIG_CRYPTO_SHA256=m | ||
1433 | CONFIG_CRYPTO_SHA512=m | ||
1434 | # CONFIG_CRYPTO_WP512 is not set | ||
1435 | # CONFIG_CRYPTO_TGR192 is not set | ||
1436 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1437 | CONFIG_CRYPTO_ECB=y | ||
1438 | CONFIG_CRYPTO_CBC=y | ||
1439 | CONFIG_CRYPTO_PCBC=m | ||
1440 | # CONFIG_CRYPTO_LRW is not set | ||
1441 | # CONFIG_CRYPTO_XTS is not set | ||
1442 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1443 | CONFIG_CRYPTO_DES=y | ||
1444 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1445 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1446 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1447 | # CONFIG_CRYPTO_SERPENT is not set | ||
1448 | CONFIG_CRYPTO_AES=m | ||
1449 | # CONFIG_CRYPTO_CAST5 is not set | ||
1450 | # CONFIG_CRYPTO_CAST6 is not set | ||
1451 | # CONFIG_CRYPTO_TEA is not set | ||
1452 | CONFIG_CRYPTO_ARC4=y | ||
1453 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1454 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1455 | # CONFIG_CRYPTO_SEED is not set | ||
1456 | CONFIG_CRYPTO_DEFLATE=m | ||
1457 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
1458 | CONFIG_CRYPTO_CRC32C=y | ||
1459 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1460 | # CONFIG_CRYPTO_TEST is not set | ||
1461 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1462 | CONFIG_CRYPTO_HW=y | ||
1463 | |||
1464 | # | ||
1465 | # Library routines | ||
1466 | # | ||
1467 | CONFIG_BITREVERSE=y | ||
1468 | CONFIG_CRC_CCITT=y | ||
1469 | CONFIG_CRC16=y | ||
1470 | # CONFIG_CRC_ITU_T is not set | ||
1471 | CONFIG_CRC32=y | ||
1472 | # CONFIG_CRC7 is not set | ||
1473 | CONFIG_LIBCRC32C=y | ||
1474 | CONFIG_ZLIB_INFLATE=y | ||
1475 | CONFIG_ZLIB_DEFLATE=y | ||
1476 | CONFIG_REED_SOLOMON=y | ||
1477 | CONFIG_REED_SOLOMON_DEC16=y | ||
1478 | CONFIG_PLIST=y | ||
1479 | CONFIG_HAS_IOMEM=y | ||
1480 | CONFIG_HAS_IOPORT=y | ||
1481 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/collie_defconfig b/arch/arm/configs/collie_defconfig index 970c8c772eb7..4264e273202d 100644 --- a/arch/arm/configs/collie_defconfig +++ b/arch/arm/configs/collie_defconfig | |||
@@ -367,7 +367,6 @@ CONFIG_MTD_CFI_UTIL=y | |||
367 | # CONFIG_MTD_RAM is not set | 367 | # CONFIG_MTD_RAM is not set |
368 | # CONFIG_MTD_ROM is not set | 368 | # CONFIG_MTD_ROM is not set |
369 | # CONFIG_MTD_ABSENT is not set | 369 | # CONFIG_MTD_ABSENT is not set |
370 | CONFIG_MTD_OBSOLETE_CHIPS=y | ||
371 | CONFIG_MTD_SHARP=y | 370 | CONFIG_MTD_SHARP=y |
372 | # CONFIG_MTD_XIP is not set | 371 | # CONFIG_MTD_XIP is not set |
373 | 372 | ||
diff --git a/arch/arm/configs/eseries_pxa_defconfig b/arch/arm/configs/eseries_pxa_defconfig new file mode 100644 index 000000000000..ed487b90dbed --- /dev/null +++ b/arch/arm/configs/eseries_pxa_defconfig | |||
@@ -0,0 +1,1499 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.21-hh17 | ||
4 | # Fri Nov 9 20:23:03 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_MMU=y | ||
11 | # CONFIG_NO_IOPORT is not set | ||
12 | CONFIG_GENERIC_HARDIRQS=y | ||
13 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
14 | CONFIG_HARDIRQS_SW_RESEND=y | ||
15 | CONFIG_GENERIC_IRQ_PROBE=y | ||
16 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
17 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
18 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
19 | CONFIG_GENERIC_HWEIGHT=y | ||
20 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
21 | CONFIG_ZONE_DMA=y | ||
22 | CONFIG_ARCH_MTD_XIP=y | ||
23 | CONFIG_VECTORS_BASE=0xffff0000 | ||
24 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
25 | |||
26 | # | ||
27 | # Code maturity level options | ||
28 | # | ||
29 | CONFIG_EXPERIMENTAL=y | ||
30 | CONFIG_BROKEN_ON_SMP=y | ||
31 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
32 | |||
33 | # | ||
34 | # General setup | ||
35 | # | ||
36 | CONFIG_LOCALVERSION="" | ||
37 | CONFIG_LOCALVERSION_AUTO=y | ||
38 | CONFIG_SWAP=y | ||
39 | CONFIG_SYSVIPC=y | ||
40 | # CONFIG_IPC_NS is not set | ||
41 | CONFIG_SYSVIPC_SYSCTL=y | ||
42 | # CONFIG_POSIX_MQUEUE is not set | ||
43 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
44 | # CONFIG_TASKSTATS is not set | ||
45 | # CONFIG_UTS_NS is not set | ||
46 | # CONFIG_AUDIT is not set | ||
47 | # CONFIG_IKCONFIG is not set | ||
48 | CONFIG_SYSFS_DEPRECATED=y | ||
49 | # CONFIG_RELAY is not set | ||
50 | CONFIG_BLK_DEV_INITRD=y | ||
51 | CONFIG_INITRAMFS_SOURCE="" | ||
52 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
53 | CONFIG_SYSCTL=y | ||
54 | CONFIG_EMBEDDED=y | ||
55 | CONFIG_UID16=y | ||
56 | CONFIG_SYSCTL_SYSCALL=y | ||
57 | # CONFIG_KALLSYMS is not set | ||
58 | CONFIG_HOTPLUG=y | ||
59 | CONFIG_PRINTK=y | ||
60 | CONFIG_BUG=y | ||
61 | CONFIG_ELF_CORE=y | ||
62 | CONFIG_BASE_FULL=y | ||
63 | CONFIG_FUTEX=y | ||
64 | CONFIG_EPOLL=y | ||
65 | CONFIG_SHMEM=y | ||
66 | CONFIG_SLAB=y | ||
67 | CONFIG_VM_EVENT_COUNTERS=y | ||
68 | CONFIG_RT_MUTEXES=y | ||
69 | # CONFIG_TINY_SHMEM is not set | ||
70 | CONFIG_BASE_SMALL=0 | ||
71 | # CONFIG_SLOB is not set | ||
72 | |||
73 | # | ||
74 | # Loadable module support | ||
75 | # | ||
76 | CONFIG_MODULES=y | ||
77 | CONFIG_MODULE_UNLOAD=y | ||
78 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
79 | # CONFIG_MODVERSIONS is not set | ||
80 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
81 | CONFIG_KMOD=y | ||
82 | |||
83 | # | ||
84 | # Block layer | ||
85 | # | ||
86 | CONFIG_BLOCK=y | ||
87 | # CONFIG_LBD is not set | ||
88 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
89 | # CONFIG_LSF is not set | ||
90 | |||
91 | # | ||
92 | # IO Schedulers | ||
93 | # | ||
94 | CONFIG_IOSCHED_NOOP=y | ||
95 | CONFIG_IOSCHED_AS=y | ||
96 | CONFIG_IOSCHED_DEADLINE=y | ||
97 | CONFIG_IOSCHED_CFQ=y | ||
98 | CONFIG_DEFAULT_AS=y | ||
99 | # CONFIG_DEFAULT_DEADLINE is not set | ||
100 | # CONFIG_DEFAULT_CFQ is not set | ||
101 | # CONFIG_DEFAULT_NOOP is not set | ||
102 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
103 | |||
104 | # | ||
105 | # System Type | ||
106 | # | ||
107 | # CONFIG_ARCH_AAEC2000 is not set | ||
108 | # CONFIG_ARCH_INTEGRATOR is not set | ||
109 | # CONFIG_ARCH_REALVIEW is not set | ||
110 | # CONFIG_ARCH_VERSATILE is not set | ||
111 | # CONFIG_ARCH_AT91 is not set | ||
112 | # CONFIG_ARCH_CLPS7500 is not set | ||
113 | # CONFIG_ARCH_CLPS711X is not set | ||
114 | # CONFIG_ARCH_CO285 is not set | ||
115 | # CONFIG_ARCH_EBSA110 is not set | ||
116 | # CONFIG_ARCH_EP93XX is not set | ||
117 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
118 | # CONFIG_ARCH_NETX is not set | ||
119 | # CONFIG_ARCH_H720X is not set | ||
120 | # CONFIG_ARCH_IMX is not set | ||
121 | # CONFIG_ARCH_IOP32X is not set | ||
122 | # CONFIG_ARCH_IOP33X is not set | ||
123 | # CONFIG_ARCH_IOP13XX is not set | ||
124 | # CONFIG_ARCH_IXP4XX is not set | ||
125 | # CONFIG_ARCH_IXP2000 is not set | ||
126 | # CONFIG_ARCH_IXP23XX is not set | ||
127 | # CONFIG_ARCH_L7200 is not set | ||
128 | # CONFIG_ARCH_NS9XXX is not set | ||
129 | # CONFIG_ARCH_PNX4008 is not set | ||
130 | CONFIG_ARCH_PXA=y | ||
131 | # CONFIG_ARCH_RPC is not set | ||
132 | # CONFIG_ARCH_SA1100 is not set | ||
133 | # CONFIG_ARCH_S3C2410 is not set | ||
134 | # CONFIG_ARCH_SHARK is not set | ||
135 | # CONFIG_ARCH_LH7A40X is not set | ||
136 | # CONFIG_ARCH_OMAP is not set | ||
137 | # CONFIG_BOARD_IRQ_MAP_SMALL is not set | ||
138 | CONFIG_BOARD_IRQ_MAP_BIG=y | ||
139 | CONFIG_DMABOUNCE=y | ||
140 | |||
141 | # | ||
142 | # Intel PXA2xx Implementations | ||
143 | # | ||
144 | # CONFIG_ARCH_LUBBOCK is not set | ||
145 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
146 | # CONFIG_MACH_MAINSTONE is not set | ||
147 | # CONFIG_ARCH_PXA_IDP is not set | ||
148 | CONFIG_TOSHIBA_TMIO_OHCI=y | ||
149 | CONFIG_ARCH_ESERIES=y | ||
150 | CONFIG_MACH_E330=y | ||
151 | CONFIG_MACH_E740=y | ||
152 | CONFIG_MACH_E750=y | ||
153 | CONFIG_MACH_E400=y | ||
154 | CONFIG_MACH_E800=y | ||
155 | CONFIG_E330_LCD=y | ||
156 | CONFIG_E740_LCD=y | ||
157 | CONFIG_E750_LCD=y | ||
158 | CONFIG_E400_LCD=y | ||
159 | CONFIG_E800_LCD=y | ||
160 | CONFIG_ESERIES_UDC=y | ||
161 | CONFIG_E330_TC6387XB=y | ||
162 | CONFIG_E740_T7L66XB=y | ||
163 | CONFIG_E400_T7L66XB=y | ||
164 | CONFIG_E750_E800_TC6393XB=y | ||
165 | CONFIG_E740_PCMCIA=m | ||
166 | CONFIG_E750_PCMCIA=m | ||
167 | CONFIG_E800_PCMCIA=m | ||
168 | # CONFIG_MACH_A620 is not set | ||
169 | # CONFIG_MACH_A716 is not set | ||
170 | # CONFIG_MACH_A730 is not set | ||
171 | # CONFIG_ARCH_H1900 is not set | ||
172 | # CONFIG_ARCH_H2200 is not set | ||
173 | # CONFIG_MACH_H3900 is not set | ||
174 | # CONFIG_MACH_H4000 is not set | ||
175 | # CONFIG_MACH_H4700 is not set | ||
176 | # CONFIG_MACH_HX2750 is not set | ||
177 | # CONFIG_ARCH_H5400 is not set | ||
178 | # CONFIG_MACH_HIMALAYA is not set | ||
179 | # CONFIG_MACH_HTCUNIVERSAL is not set | ||
180 | # CONFIG_MACH_HTCALPINE is not set | ||
181 | # CONFIG_MACH_MAGICIAN is not set | ||
182 | # CONFIG_MACH_HTCAPACHE is not set | ||
183 | # CONFIG_MACH_BLUEANGEL is not set | ||
184 | |||
185 | # | ||
186 | # HTC_HW6X00 | ||
187 | # | ||
188 | # CONFIG_MACH_HTCBEETLES is not set | ||
189 | # CONFIG_MACH_HW6900 is not set | ||
190 | # CONFIG_MACH_HTCATHENA is not set | ||
191 | # CONFIG_ARCH_AXIMX3 is not set | ||
192 | # CONFIG_ARCH_AXIMX5 is not set | ||
193 | # CONFIG_MACH_X50 is not set | ||
194 | # CONFIG_ARCH_ROVERP1 is not set | ||
195 | # CONFIG_ARCH_ROVERP5P is not set | ||
196 | # CONFIG_MACH_XSCALE_PALMLD is not set | ||
197 | # CONFIG_MACH_T3XSCALE is not set | ||
198 | # CONFIG_MACH_RECON is not set | ||
199 | # CONFIG_MACH_GHI270HG is not set | ||
200 | # CONFIG_MACH_GHI270 is not set | ||
201 | # CONFIG_MACH_LOOXC550 is not set | ||
202 | # CONFIG_PXA_SHARPSL is not set | ||
203 | # CONFIG_MACH_TRIZEPS4 is not set | ||
204 | CONFIG_PXA25x=y | ||
205 | |||
206 | # | ||
207 | # Linux As Bootloader | ||
208 | # | ||
209 | # CONFIG_LAB is not set | ||
210 | |||
211 | # | ||
212 | # Processor Type | ||
213 | # | ||
214 | CONFIG_CPU_32=y | ||
215 | CONFIG_CPU_XSCALE=y | ||
216 | CONFIG_CPU_32v5=y | ||
217 | CONFIG_CPU_ABRT_EV5T=y | ||
218 | CONFIG_CPU_CACHE_VIVT=y | ||
219 | CONFIG_CPU_TLB_V4WBI=y | ||
220 | CONFIG_CPU_CP15=y | ||
221 | CONFIG_CPU_CP15_MMU=y | ||
222 | |||
223 | # | ||
224 | # Processor Features | ||
225 | # | ||
226 | # CONFIG_ARM_THUMB is not set | ||
227 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
228 | # CONFIG_OUTER_CACHE is not set | ||
229 | CONFIG_IWMMXT=y | ||
230 | CONFIG_XSCALE_PMU=y | ||
231 | |||
232 | # | ||
233 | # Bus support | ||
234 | # | ||
235 | |||
236 | # | ||
237 | # PCCARD (PCMCIA/CardBus) support | ||
238 | # | ||
239 | CONFIG_PCCARD=m | ||
240 | # CONFIG_PCMCIA_DEBUG is not set | ||
241 | CONFIG_PCMCIA=m | ||
242 | CONFIG_PCMCIA_LOAD_CIS=y | ||
243 | CONFIG_PCMCIA_IOCTL=y | ||
244 | |||
245 | # | ||
246 | # PC-card bridges | ||
247 | # | ||
248 | CONFIG_PCMCIA_PXA2XX=m | ||
249 | |||
250 | # | ||
251 | # Kernel Features | ||
252 | # | ||
253 | # CONFIG_PREEMPT is not set | ||
254 | # CONFIG_NO_IDLE_HZ is not set | ||
255 | CONFIG_HZ=100 | ||
256 | CONFIG_AEABI=y | ||
257 | CONFIG_OABI_COMPAT=y | ||
258 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
259 | CONFIG_SELECT_MEMORY_MODEL=y | ||
260 | CONFIG_FLATMEM_MANUAL=y | ||
261 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
262 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
263 | CONFIG_FLATMEM=y | ||
264 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
265 | # CONFIG_SPARSEMEM_STATIC is not set | ||
266 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
267 | # CONFIG_RESOURCES_64BIT is not set | ||
268 | CONFIG_ZONE_DMA_FLAG=1 | ||
269 | CONFIG_ALIGNMENT_TRAP=y | ||
270 | |||
271 | # | ||
272 | # Boot options | ||
273 | # | ||
274 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
275 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
276 | CONFIG_CMDLINE="" | ||
277 | # CONFIG_XIP_KERNEL is not set | ||
278 | CONFIG_KEXEC=y | ||
279 | # CONFIG_TXTOFFSET_DELTA is not set | ||
280 | |||
281 | # | ||
282 | # CPU Frequency scaling | ||
283 | # | ||
284 | # CONFIG_CPU_FREQ is not set | ||
285 | |||
286 | # | ||
287 | # Floating point emulation | ||
288 | # | ||
289 | |||
290 | # | ||
291 | # At least one emulation must be selected | ||
292 | # | ||
293 | CONFIG_FPE_NWFPE=y | ||
294 | # CONFIG_FPE_NWFPE_XP is not set | ||
295 | # CONFIG_FPE_FASTFPE is not set | ||
296 | |||
297 | # | ||
298 | # Userspace binary formats | ||
299 | # | ||
300 | CONFIG_BINFMT_ELF=y | ||
301 | # CONFIG_BINFMT_AOUT is not set | ||
302 | CONFIG_BINFMT_MISC=y | ||
303 | |||
304 | # | ||
305 | # Power management options | ||
306 | # | ||
307 | CONFIG_PM=y | ||
308 | CONFIG_PM_LEGACY=y | ||
309 | # CONFIG_PM_DEBUG is not set | ||
310 | # CONFIG_DPM_DEBUG is not set | ||
311 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
312 | # CONFIG_APM_EMULATION is not set | ||
313 | |||
314 | # | ||
315 | # Networking | ||
316 | # | ||
317 | CONFIG_NET=y | ||
318 | |||
319 | # | ||
320 | # Networking options | ||
321 | # | ||
322 | # CONFIG_NETDEBUG is not set | ||
323 | # CONFIG_PACKET is not set | ||
324 | CONFIG_UNIX=y | ||
325 | CONFIG_XFRM=y | ||
326 | # CONFIG_XFRM_USER is not set | ||
327 | # CONFIG_XFRM_SUB_POLICY is not set | ||
328 | # CONFIG_XFRM_MIGRATE is not set | ||
329 | # CONFIG_NET_KEY is not set | ||
330 | CONFIG_INET=y | ||
331 | # CONFIG_IP_MULTICAST is not set | ||
332 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
333 | CONFIG_IP_FIB_HASH=y | ||
334 | # CONFIG_IP_PNP is not set | ||
335 | # CONFIG_NET_IPIP is not set | ||
336 | # CONFIG_NET_IPGRE is not set | ||
337 | # CONFIG_ARPD is not set | ||
338 | # CONFIG_SYN_COOKIES is not set | ||
339 | # CONFIG_INET_AH is not set | ||
340 | # CONFIG_INET_ESP is not set | ||
341 | # CONFIG_INET_IPCOMP is not set | ||
342 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
343 | # CONFIG_INET_TUNNEL is not set | ||
344 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
345 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
346 | CONFIG_INET_XFRM_MODE_BEET=y | ||
347 | CONFIG_INET_DIAG=y | ||
348 | CONFIG_INET_TCP_DIAG=y | ||
349 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
350 | CONFIG_TCP_CONG_CUBIC=y | ||
351 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
352 | # CONFIG_TCP_MD5SIG is not set | ||
353 | # CONFIG_IPV6 is not set | ||
354 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
355 | # CONFIG_INET6_TUNNEL is not set | ||
356 | # CONFIG_NETWORK_SECMARK is not set | ||
357 | # CONFIG_NETFILTER is not set | ||
358 | |||
359 | # | ||
360 | # DCCP Configuration (EXPERIMENTAL) | ||
361 | # | ||
362 | # CONFIG_IP_DCCP is not set | ||
363 | |||
364 | # | ||
365 | # SCTP Configuration (EXPERIMENTAL) | ||
366 | # | ||
367 | # CONFIG_IP_SCTP is not set | ||
368 | |||
369 | # | ||
370 | # TIPC Configuration (EXPERIMENTAL) | ||
371 | # | ||
372 | # CONFIG_TIPC is not set | ||
373 | # CONFIG_ATM is not set | ||
374 | # CONFIG_BRIDGE is not set | ||
375 | # CONFIG_VLAN_8021Q is not set | ||
376 | # CONFIG_DECNET is not set | ||
377 | # CONFIG_LLC2 is not set | ||
378 | # CONFIG_IPX is not set | ||
379 | # CONFIG_ATALK is not set | ||
380 | # CONFIG_X25 is not set | ||
381 | # CONFIG_LAPB is not set | ||
382 | # CONFIG_ECONET is not set | ||
383 | # CONFIG_WAN_ROUTER is not set | ||
384 | |||
385 | # | ||
386 | # QoS and/or fair queueing | ||
387 | # | ||
388 | # CONFIG_NET_SCHED is not set | ||
389 | |||
390 | # | ||
391 | # Network testing | ||
392 | # | ||
393 | # CONFIG_NET_PKTGEN is not set | ||
394 | # CONFIG_HAMRADIO is not set | ||
395 | # CONFIG_IRDA is not set | ||
396 | # CONFIG_BT is not set | ||
397 | CONFIG_IEEE80211=m | ||
398 | # CONFIG_IEEE80211_DEBUG is not set | ||
399 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
400 | # CONFIG_IEEE80211_CRYPT_CCMP is not set | ||
401 | # CONFIG_IEEE80211_CRYPT_TKIP is not set | ||
402 | # CONFIG_IEEE80211_SOFTMAC is not set | ||
403 | CONFIG_WIRELESS_EXT=y | ||
404 | |||
405 | # | ||
406 | # Device Drivers | ||
407 | # | ||
408 | |||
409 | # | ||
410 | # Generic Driver Options | ||
411 | # | ||
412 | # CONFIG_STANDALONE is not set | ||
413 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
414 | CONFIG_FW_LOADER=y | ||
415 | # CONFIG_SYS_HYPERVISOR is not set | ||
416 | |||
417 | # | ||
418 | # Connector - unified userspace <-> kernelspace linker | ||
419 | # | ||
420 | # CONFIG_CONNECTOR is not set | ||
421 | |||
422 | # | ||
423 | # Memory Technology Devices (MTD) | ||
424 | # | ||
425 | CONFIG_MTD=m | ||
426 | # CONFIG_MTD_DEBUG is not set | ||
427 | # CONFIG_MTD_CONCAT is not set | ||
428 | CONFIG_MTD_PARTITIONS=y | ||
429 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
430 | # CONFIG_MTD_AFS_PARTS is not set | ||
431 | |||
432 | # | ||
433 | # User Modules And Translation Layers | ||
434 | # | ||
435 | CONFIG_MTD_CHAR=m | ||
436 | CONFIG_MTD_BLKDEVS=m | ||
437 | CONFIG_MTD_BLOCK=m | ||
438 | # CONFIG_MTD_BLOCK_RO is not set | ||
439 | # CONFIG_FTL is not set | ||
440 | # CONFIG_NFTL is not set | ||
441 | # CONFIG_INFTL is not set | ||
442 | # CONFIG_RFD_FTL is not set | ||
443 | # CONFIG_SSFDC is not set | ||
444 | |||
445 | # | ||
446 | # RAM/ROM/Flash chip drivers | ||
447 | # | ||
448 | # CONFIG_MTD_CFI is not set | ||
449 | # CONFIG_MTD_JEDECPROBE is not set | ||
450 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
451 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
452 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
453 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
454 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
455 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
456 | CONFIG_MTD_CFI_I1=y | ||
457 | CONFIG_MTD_CFI_I2=y | ||
458 | # CONFIG_MTD_CFI_I4 is not set | ||
459 | # CONFIG_MTD_CFI_I8 is not set | ||
460 | # CONFIG_MTD_RAM is not set | ||
461 | # CONFIG_MTD_ROM is not set | ||
462 | # CONFIG_MTD_ABSENT is not set | ||
463 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
464 | |||
465 | # | ||
466 | # Mapping drivers for chip access | ||
467 | # | ||
468 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
469 | # CONFIG_MTD_SHARP_SL is not set | ||
470 | # CONFIG_MTD_PLATRAM is not set | ||
471 | |||
472 | # | ||
473 | # Self-contained MTD device drivers | ||
474 | # | ||
475 | # CONFIG_MTD_SLRAM is not set | ||
476 | # CONFIG_MTD_PHRAM is not set | ||
477 | # CONFIG_MTD_MTDRAM is not set | ||
478 | # CONFIG_MTD_BLOCK2MTD is not set | ||
479 | |||
480 | # | ||
481 | # Disk-On-Chip Device Drivers | ||
482 | # | ||
483 | # CONFIG_MTD_DOC2000 is not set | ||
484 | # CONFIG_MTD_DOC2001 is not set | ||
485 | # CONFIG_MTD_DOC2001PLUS is not set | ||
486 | |||
487 | # | ||
488 | # NAND Flash Device Drivers | ||
489 | # | ||
490 | CONFIG_MTD_NAND=m | ||
491 | CONFIG_MTD_NAND_VERIFY_WRITE=y | ||
492 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
493 | # CONFIG_MTD_NAND_H1900 is not set | ||
494 | CONFIG_MTD_NAND_IDS=m | ||
495 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
496 | # CONFIG_MTD_NAND_SHARPSL is not set | ||
497 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
498 | |||
499 | # | ||
500 | # OneNAND Flash Device Drivers | ||
501 | # | ||
502 | # CONFIG_MTD_ONENAND is not set | ||
503 | |||
504 | # | ||
505 | # Parallel port support | ||
506 | # | ||
507 | # CONFIG_PARPORT is not set | ||
508 | |||
509 | # | ||
510 | # Plug and Play support | ||
511 | # | ||
512 | # CONFIG_PNPACPI is not set | ||
513 | |||
514 | # | ||
515 | # Block devices | ||
516 | # | ||
517 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
518 | CONFIG_BLK_DEV_LOOP=m | ||
519 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
520 | # CONFIG_BLK_DEV_NBD is not set | ||
521 | # CONFIG_BLK_DEV_UB is not set | ||
522 | CONFIG_BLK_DEV_RAM=y | ||
523 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
524 | CONFIG_BLK_DEV_RAM_SIZE=6144 | ||
525 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
526 | # CONFIG_CDROM_PKTCDVD is not set | ||
527 | # CONFIG_ATA_OVER_ETH is not set | ||
528 | |||
529 | # | ||
530 | # ATA/ATAPI/MFM/RLL support | ||
531 | # | ||
532 | CONFIG_IDE=m | ||
533 | CONFIG_IDE_MAX_HWIFS=4 | ||
534 | CONFIG_BLK_DEV_IDE=m | ||
535 | |||
536 | # | ||
537 | # Please see Documentation/ide.txt for help/info on IDE drives | ||
538 | # | ||
539 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
540 | CONFIG_BLK_DEV_IDEDISK=m | ||
541 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
542 | # CONFIG_BLK_DEV_IDECS is not set | ||
543 | # CONFIG_BLK_DEV_IDECD is not set | ||
544 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
545 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
546 | # CONFIG_BLK_DEV_IDESCSI is not set | ||
547 | # CONFIG_IDE_TASK_IOCTL is not set | ||
548 | |||
549 | # | ||
550 | # IDE chipset support/bugfixes | ||
551 | # | ||
552 | # CONFIG_IDE_GENERIC is not set | ||
553 | # CONFIG_IDE_ARM is not set | ||
554 | # CONFIG_BLK_DEV_IDEDMA is not set | ||
555 | # CONFIG_BLK_DEV_HD is not set | ||
556 | |||
557 | # | ||
558 | # SCSI device support | ||
559 | # | ||
560 | # CONFIG_RAID_ATTRS is not set | ||
561 | CONFIG_SCSI=m | ||
562 | # CONFIG_SCSI_TGT is not set | ||
563 | # CONFIG_SCSI_NETLINK is not set | ||
564 | # CONFIG_SCSI_PROC_FS is not set | ||
565 | |||
566 | # | ||
567 | # SCSI support type (disk, tape, CD-ROM) | ||
568 | # | ||
569 | # CONFIG_BLK_DEV_SD is not set | ||
570 | # CONFIG_CHR_DEV_ST is not set | ||
571 | # CONFIG_CHR_DEV_OSST is not set | ||
572 | # CONFIG_BLK_DEV_SR is not set | ||
573 | # CONFIG_CHR_DEV_SG is not set | ||
574 | # CONFIG_CHR_DEV_SCH is not set | ||
575 | |||
576 | # | ||
577 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
578 | # | ||
579 | # CONFIG_SCSI_MULTI_LUN is not set | ||
580 | # CONFIG_SCSI_CONSTANTS is not set | ||
581 | # CONFIG_SCSI_LOGGING is not set | ||
582 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
583 | |||
584 | # | ||
585 | # SCSI Transports | ||
586 | # | ||
587 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
588 | # CONFIG_SCSI_FC_ATTRS is not set | ||
589 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
590 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
591 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
592 | |||
593 | # | ||
594 | # SCSI low-level drivers | ||
595 | # | ||
596 | # CONFIG_ISCSI_TCP is not set | ||
597 | # CONFIG_SCSI_DEBUG is not set | ||
598 | |||
599 | # | ||
600 | # PCMCIA SCSI adapter support | ||
601 | # | ||
602 | # CONFIG_PCMCIA_AHA152X is not set | ||
603 | # CONFIG_PCMCIA_FDOMAIN is not set | ||
604 | # CONFIG_PCMCIA_NINJA_SCSI is not set | ||
605 | # CONFIG_PCMCIA_QLOGIC is not set | ||
606 | # CONFIG_PCMCIA_SYM53C500 is not set | ||
607 | |||
608 | # | ||
609 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
610 | # | ||
611 | # CONFIG_ATA is not set | ||
612 | |||
613 | # | ||
614 | # Multi-device support (RAID and LVM) | ||
615 | # | ||
616 | # CONFIG_MD is not set | ||
617 | |||
618 | # | ||
619 | # Fusion MPT device support | ||
620 | # | ||
621 | # CONFIG_FUSION is not set | ||
622 | |||
623 | # | ||
624 | # IEEE 1394 (FireWire) support | ||
625 | # | ||
626 | |||
627 | # | ||
628 | # I2O device support | ||
629 | # | ||
630 | |||
631 | # | ||
632 | # Network device support | ||
633 | # | ||
634 | CONFIG_NETDEVICES=y | ||
635 | # CONFIG_DUMMY is not set | ||
636 | # CONFIG_BONDING is not set | ||
637 | # CONFIG_EQUALIZER is not set | ||
638 | # CONFIG_TUN is not set | ||
639 | |||
640 | # | ||
641 | # PHY device support | ||
642 | # | ||
643 | |||
644 | # | ||
645 | # Ethernet (10 or 100Mbit) | ||
646 | # | ||
647 | # CONFIG_NET_ETHERNET is not set | ||
648 | |||
649 | # | ||
650 | # Ethernet (1000 Mbit) | ||
651 | # | ||
652 | |||
653 | # | ||
654 | # Ethernet (10000 Mbit) | ||
655 | # | ||
656 | |||
657 | # | ||
658 | # Token Ring devices | ||
659 | # | ||
660 | |||
661 | # | ||
662 | # Wireless LAN (non-hamradio) | ||
663 | # | ||
664 | CONFIG_NET_RADIO=y | ||
665 | # CONFIG_NET_WIRELESS_RTNETLINK is not set | ||
666 | |||
667 | # | ||
668 | # Obsolete Wireless cards support (pre-802.11) | ||
669 | # | ||
670 | # CONFIG_STRIP is not set | ||
671 | # CONFIG_PCMCIA_WAVELAN is not set | ||
672 | # CONFIG_PCMCIA_NETWAVE is not set | ||
673 | |||
674 | # | ||
675 | # Wireless 802.11 Frequency Hopping cards support | ||
676 | # | ||
677 | # CONFIG_PCMCIA_RAYCS is not set | ||
678 | |||
679 | # | ||
680 | # Wireless 802.11b ISA/PCI cards support | ||
681 | # | ||
682 | # CONFIG_HERMES is not set | ||
683 | # CONFIG_ATMEL is not set | ||
684 | |||
685 | # | ||
686 | # Wireless 802.11b Pcmcia/Cardbus cards support | ||
687 | # | ||
688 | # CONFIG_AIRO_CS is not set | ||
689 | # CONFIG_PCMCIA_WL3501 is not set | ||
690 | # CONFIG_USB_ZD1201 is not set | ||
691 | CONFIG_HOSTAP=m | ||
692 | # CONFIG_HOSTAP_FIRMWARE is not set | ||
693 | # CONFIG_HOSTAP_CS is not set | ||
694 | # CONFIG_ACX is not set | ||
695 | CONFIG_NET_WIRELESS=y | ||
696 | |||
697 | # | ||
698 | # PCMCIA network device support | ||
699 | # | ||
700 | # CONFIG_NET_PCMCIA is not set | ||
701 | |||
702 | # | ||
703 | # Wan interfaces | ||
704 | # | ||
705 | # CONFIG_WAN is not set | ||
706 | # CONFIG_PPP is not set | ||
707 | # CONFIG_SLIP is not set | ||
708 | # CONFIG_SHAPER is not set | ||
709 | # CONFIG_NETCONSOLE is not set | ||
710 | # CONFIG_NETPOLL is not set | ||
711 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
712 | |||
713 | # | ||
714 | # ISDN subsystem | ||
715 | # | ||
716 | # CONFIG_ISDN is not set | ||
717 | |||
718 | # | ||
719 | # Input device support | ||
720 | # | ||
721 | CONFIG_INPUT=y | ||
722 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
723 | |||
724 | # | ||
725 | # Userland interfaces | ||
726 | # | ||
727 | # CONFIG_INPUT_MOUSEDEV is not set | ||
728 | # CONFIG_INPUT_JOYDEV is not set | ||
729 | CONFIG_INPUT_TSDEV=m | ||
730 | CONFIG_INPUT_TSDEV_SCREEN_X=240 | ||
731 | CONFIG_INPUT_TSDEV_SCREEN_Y=320 | ||
732 | CONFIG_INPUT_EVDEV=m | ||
733 | # CONFIG_INPUT_EVBUG is not set | ||
734 | # CONFIG_INPUT_LED_TRIGGER is not set | ||
735 | |||
736 | # | ||
737 | # Input Device Drivers | ||
738 | # | ||
739 | # CONFIG_INPUT_KEYBOARD is not set | ||
740 | # CONFIG_INPUT_MOUSE is not set | ||
741 | # CONFIG_INPUT_JOYSTICK is not set | ||
742 | CONFIG_INPUT_TOUCHSCREEN=y | ||
743 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
744 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
745 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
746 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
747 | CONFIG_TOUCHSCREEN_WM97XX=m | ||
748 | CONFIG_TOUCHSCREEN_WM9705=y | ||
749 | CONFIG_TOUCHSCREEN_WM9712=y | ||
750 | CONFIG_TOUCHSCREEN_WM9713=y | ||
751 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
752 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
753 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
754 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
755 | # CONFIG_INPUT_MISC is not set | ||
756 | |||
757 | # | ||
758 | # Hardware I/O ports | ||
759 | # | ||
760 | # CONFIG_SERIO is not set | ||
761 | # CONFIG_GAMEPORT is not set | ||
762 | |||
763 | # | ||
764 | # Character devices | ||
765 | # | ||
766 | CONFIG_VT=y | ||
767 | CONFIG_VT_CONSOLE=y | ||
768 | CONFIG_HW_CONSOLE=y | ||
769 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
770 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
771 | |||
772 | # | ||
773 | # Serial drivers | ||
774 | # | ||
775 | # CONFIG_SERIAL_8250 is not set | ||
776 | |||
777 | # | ||
778 | # Non-8250 serial port support | ||
779 | # | ||
780 | # CONFIG_SERIAL_PXA is not set | ||
781 | # CONFIG_RS232_SERIAL is not set | ||
782 | CONFIG_UNIX98_PTYS=y | ||
783 | # CONFIG_LEGACY_PTYS is not set | ||
784 | |||
785 | # | ||
786 | # IPMI | ||
787 | # | ||
788 | # CONFIG_IPMI_HANDLER is not set | ||
789 | |||
790 | # | ||
791 | # Watchdog Cards | ||
792 | # | ||
793 | # CONFIG_WATCHDOG is not set | ||
794 | CONFIG_HW_RANDOM=m | ||
795 | # CONFIG_NVRAM is not set | ||
796 | # CONFIG_SA1100_RTC is not set | ||
797 | # CONFIG_DTLK is not set | ||
798 | # CONFIG_R3964 is not set | ||
799 | # CONFIG_TIHTC is not set | ||
800 | |||
801 | # | ||
802 | # PCMCIA character devices | ||
803 | # | ||
804 | # CONFIG_SYNCLINK_CS is not set | ||
805 | # CONFIG_CARDMAN_4000 is not set | ||
806 | # CONFIG_CARDMAN_4040 is not set | ||
807 | # CONFIG_RAW_DRIVER is not set | ||
808 | |||
809 | # | ||
810 | # TPM devices | ||
811 | # | ||
812 | # CONFIG_TCG_TPM is not set | ||
813 | |||
814 | # | ||
815 | # I2C support | ||
816 | # | ||
817 | # CONFIG_I2C is not set | ||
818 | |||
819 | # | ||
820 | # SPI support | ||
821 | # | ||
822 | # CONFIG_SPI is not set | ||
823 | # CONFIG_SPI_MASTER is not set | ||
824 | |||
825 | # | ||
826 | # Dallas's 1-wire bus | ||
827 | # | ||
828 | # CONFIG_W1 is not set | ||
829 | |||
830 | # | ||
831 | # Hardware Monitoring support | ||
832 | # | ||
833 | # CONFIG_HWMON is not set | ||
834 | # CONFIG_HWMON_VID is not set | ||
835 | # CONFIG_POWER_SUPPLY is not set | ||
836 | |||
837 | # | ||
838 | # L3 serial bus support | ||
839 | # | ||
840 | # CONFIG_L3 is not set | ||
841 | |||
842 | # | ||
843 | # Misc devices | ||
844 | # | ||
845 | |||
846 | # | ||
847 | # Multimedia Capabilities Port drivers | ||
848 | # | ||
849 | # CONFIG_ADC is not set | ||
850 | |||
851 | # | ||
852 | # Compaq/iPAQ Drivers | ||
853 | # | ||
854 | |||
855 | # | ||
856 | # Compaq/HP iPAQ Drivers | ||
857 | # | ||
858 | # CONFIG_IPAQ_SLEEVE is not set | ||
859 | # CONFIG_SLEEVE_DEBUG is not set | ||
860 | |||
861 | # | ||
862 | # Multifunction device drivers | ||
863 | # | ||
864 | # CONFIG_MFD_SM501 is not set | ||
865 | # CONFIG_HTC_ASIC2 is not set | ||
866 | # CONFIG_HTC_ASIC3 is not set | ||
867 | # CONFIG_HTC_PASIC3 is not set | ||
868 | # CONFIG_HTC_EGPIO is not set | ||
869 | # CONFIG_HTC_BBKEYS is not set | ||
870 | # CONFIG_HTC_ASIC3_DS1WM is not set | ||
871 | # CONFIG_SOC_SAMCOP is not set | ||
872 | # CONFIG_SOC_HAMCOP is not set | ||
873 | # CONFIG_SOC_MQ11XX is not set | ||
874 | CONFIG_SOC_T7L66XB=y | ||
875 | # CONFIG_SOC_TC6387XB is not set | ||
876 | CONFIG_SOC_TC6393XB=y | ||
877 | # CONFIG_SOC_TSC2101 is not set | ||
878 | # CONFIG_SOC_TSC2200 is not set | ||
879 | |||
880 | # | ||
881 | # LED devices | ||
882 | # | ||
883 | # CONFIG_NEW_LEDS is not set | ||
884 | |||
885 | # | ||
886 | # LED drivers | ||
887 | # | ||
888 | |||
889 | # | ||
890 | # LED Triggers | ||
891 | # | ||
892 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
893 | |||
894 | # | ||
895 | # Multimedia devices | ||
896 | # | ||
897 | # CONFIG_VIDEO_DEV is not set | ||
898 | |||
899 | # | ||
900 | # Digital Video Broadcasting Devices | ||
901 | # | ||
902 | # CONFIG_DVB is not set | ||
903 | # CONFIG_USB_DABUSB is not set | ||
904 | |||
905 | # | ||
906 | # Graphics support | ||
907 | # | ||
908 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
909 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
910 | CONFIG_LCD_CLASS_DEVICE=y | ||
911 | CONFIG_BACKLIGHT_CORGI=y | ||
912 | CONFIG_FB=y | ||
913 | # CONFIG_FIRMWARE_EDID is not set | ||
914 | # CONFIG_FB_DDC is not set | ||
915 | CONFIG_FB_CFB_FILLRECT=y | ||
916 | CONFIG_FB_CFB_COPYAREA=y | ||
917 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
918 | # CONFIG_FB_SVGALIB is not set | ||
919 | # CONFIG_FB_MACMODES is not set | ||
920 | # CONFIG_FB_BACKLIGHT is not set | ||
921 | # CONFIG_FB_MODE_HELPERS is not set | ||
922 | # CONFIG_FB_TILEBLITTING is not set | ||
923 | |||
924 | # | ||
925 | # Frame buffer hardware drivers | ||
926 | # | ||
927 | # CONFIG_FB_IMAGEON is not set | ||
928 | # CONFIG_FB_S1D13XXX is not set | ||
929 | CONFIG_FB_PXA=y | ||
930 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
931 | # CONFIG_FB_MBX is not set | ||
932 | CONFIG_FB_W100=y | ||
933 | # CONFIG_FB_VIRTUAL is not set | ||
934 | # CONFIG_FB_VSFB is not set | ||
935 | |||
936 | # | ||
937 | # Console display driver support | ||
938 | # | ||
939 | # CONFIG_VGA_CONSOLE is not set | ||
940 | CONFIG_DUMMY_CONSOLE=y | ||
941 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
942 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
943 | CONFIG_FONTS=y | ||
944 | # CONFIG_FONT_8x8 is not set | ||
945 | # CONFIG_FONT_8x16 is not set | ||
946 | # CONFIG_FONT_6x11 is not set | ||
947 | # CONFIG_FONT_7x14 is not set | ||
948 | # CONFIG_FONT_PEARL_8x8 is not set | ||
949 | CONFIG_FONT_ACORN_8x8=y | ||
950 | # CONFIG_FONT_MINI_4x6 is not set | ||
951 | # CONFIG_FONT_SUN8x16 is not set | ||
952 | # CONFIG_FONT_SUN12x22 is not set | ||
953 | # CONFIG_FONT_10x18 is not set | ||
954 | |||
955 | # | ||
956 | # Logo configuration | ||
957 | # | ||
958 | CONFIG_LOGO=y | ||
959 | # CONFIG_LOGO_LINUX_MONO is not set | ||
960 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
961 | CONFIG_LOGO_LINUX_CLUT224=y | ||
962 | |||
963 | # | ||
964 | # Sound | ||
965 | # | ||
966 | CONFIG_SOUND=y | ||
967 | |||
968 | # | ||
969 | # Advanced Linux Sound Architecture | ||
970 | # | ||
971 | CONFIG_SND=m | ||
972 | CONFIG_SND_TIMER=m | ||
973 | CONFIG_SND_PCM=m | ||
974 | # CONFIG_SND_SEQUENCER is not set | ||
975 | CONFIG_SND_OSSEMUL=y | ||
976 | CONFIG_SND_MIXER_OSS=m | ||
977 | CONFIG_SND_PCM_OSS=m | ||
978 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
979 | CONFIG_SND_DYNAMIC_MINORS=y | ||
980 | CONFIG_SND_SUPPORT_OLD_API=y | ||
981 | CONFIG_SND_VERBOSE_PROCFS=y | ||
982 | CONFIG_SND_VERBOSE_PRINTK=y | ||
983 | # CONFIG_SND_DEBUG is not set | ||
984 | |||
985 | # | ||
986 | # Generic devices | ||
987 | # | ||
988 | # CONFIG_SND_DUMMY is not set | ||
989 | # CONFIG_SND_MTPAV is not set | ||
990 | # CONFIG_SND_SERIAL_U16550 is not set | ||
991 | # CONFIG_SND_MPU401 is not set | ||
992 | |||
993 | # | ||
994 | # ALSA ARM devices | ||
995 | # | ||
996 | # CONFIG_SND_PXA2XX_AC97 is not set | ||
997 | # CONFIG_SND_RECON is not set | ||
998 | |||
999 | # | ||
1000 | # USB devices | ||
1001 | # | ||
1002 | # CONFIG_SND_USB_AUDIO is not set | ||
1003 | |||
1004 | # | ||
1005 | # PCMCIA devices | ||
1006 | # | ||
1007 | # CONFIG_SND_VXPOCKET is not set | ||
1008 | # CONFIG_SND_PDAUDIOCF is not set | ||
1009 | |||
1010 | # | ||
1011 | # SoC audio support | ||
1012 | # | ||
1013 | CONFIG_SND_SOC_AC97_BUS=y | ||
1014 | CONFIG_SND_SOC=m | ||
1015 | |||
1016 | # | ||
1017 | # SoC Platforms | ||
1018 | # | ||
1019 | |||
1020 | # | ||
1021 | # SoC Audio for the Atmel AT91 | ||
1022 | # | ||
1023 | |||
1024 | # | ||
1025 | # SoC Audio for the Intel PXA2xx | ||
1026 | # | ||
1027 | CONFIG_SND_PXA2XX_SOC=m | ||
1028 | CONFIG_SND_PXA2XX_SOC_AC97=m | ||
1029 | CONFIG_SND_PXA2XX_SOC_E740_WM9705=m | ||
1030 | CONFIG_SND_PXA2XX_SOC_E750_WM9705=m | ||
1031 | CONFIG_SND_PXA2XX_SOC_E800_WM9712=m | ||
1032 | # CONFIG_SND_PXA2XX_SOC_MAGICIAN is not set | ||
1033 | # CONFIG_SND_PXA2XX_SOC_BLUEANGEL is not set | ||
1034 | # CONFIG_SND_PXA2XX_SOC_H5000 is not set | ||
1035 | |||
1036 | # | ||
1037 | # SoC Audio for the Freescale i.MX | ||
1038 | # | ||
1039 | |||
1040 | # | ||
1041 | # SoC Audio for the Samsung S3C24XX | ||
1042 | # | ||
1043 | # CONFIG_SND_SOC_AC97_CODEC is not set | ||
1044 | # CONFIG_SND_SOC_WM8711 is not set | ||
1045 | # CONFIG_SND_SOC_WM8510 is not set | ||
1046 | # CONFIG_SND_SOC_WM8731 is not set | ||
1047 | # CONFIG_SND_SOC_WM8750 is not set | ||
1048 | # CONFIG_SND_SOC_WM8753 is not set | ||
1049 | # CONFIG_SND_SOC_WM8772 is not set | ||
1050 | # CONFIG_SND_SOC_WM8971 is not set | ||
1051 | # CONFIG_SND_SOC_WM8956 is not set | ||
1052 | # CONFIG_SND_SOC_WM8960 is not set | ||
1053 | # CONFIG_SND_SOC_WM8976 is not set | ||
1054 | # CONFIG_SND_SOC_WM8974 is not set | ||
1055 | # CONFIG_SND_SOC_WM8980 is not set | ||
1056 | CONFIG_SND_SOC_WM9705=m | ||
1057 | # CONFIG_SND_SOC_WM9713 is not set | ||
1058 | CONFIG_SND_SOC_WM9712=m | ||
1059 | # CONFIG_SND_SOC_UDA1380 is not set | ||
1060 | # CONFIG_SND_SOC_AK4535 is not set | ||
1061 | |||
1062 | # | ||
1063 | # Open Sound System | ||
1064 | # | ||
1065 | # CONFIG_SOUND_PRIME is not set | ||
1066 | CONFIG_AC97_BUS=m | ||
1067 | |||
1068 | # | ||
1069 | # HID Devices | ||
1070 | # | ||
1071 | CONFIG_HID=y | ||
1072 | # CONFIG_HID_DEBUG is not set | ||
1073 | |||
1074 | # | ||
1075 | # USB support | ||
1076 | # | ||
1077 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1078 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1079 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
1080 | CONFIG_USB=m | ||
1081 | CONFIG_USB_DEBUG=y | ||
1082 | |||
1083 | # | ||
1084 | # Miscellaneous USB options | ||
1085 | # | ||
1086 | CONFIG_USB_DEVICEFS=y | ||
1087 | CONFIG_USB_DYNAMIC_MINORS=y | ||
1088 | # CONFIG_USB_SUSPEND is not set | ||
1089 | # CONFIG_USB_OTG is not set | ||
1090 | |||
1091 | # | ||
1092 | # USB Host Controller Drivers | ||
1093 | # | ||
1094 | # CONFIG_USB_ISP116X_HCD is not set | ||
1095 | # CONFIG_USB_OHCI_HCD is not set | ||
1096 | # CONFIG_USB_SL811_HCD is not set | ||
1097 | |||
1098 | # | ||
1099 | # USB Device Class drivers | ||
1100 | # | ||
1101 | # CONFIG_USB_ACM is not set | ||
1102 | # CONFIG_USB_PRINTER is not set | ||
1103 | |||
1104 | # | ||
1105 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1106 | # | ||
1107 | |||
1108 | # | ||
1109 | # may also be needed; see USB_STORAGE Help for more information | ||
1110 | # | ||
1111 | CONFIG_USB_STORAGE=m | ||
1112 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1113 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1114 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1115 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1116 | # CONFIG_USB_STORAGE_DPCM is not set | ||
1117 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1118 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1119 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1120 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1121 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1122 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1123 | # CONFIG_USB_LIBUSUAL is not set | ||
1124 | |||
1125 | # | ||
1126 | # USB Input Devices | ||
1127 | # | ||
1128 | # CONFIG_USB_HID is not set | ||
1129 | |||
1130 | # | ||
1131 | # USB HID Boot Protocol drivers | ||
1132 | # | ||
1133 | # CONFIG_USB_KBD is not set | ||
1134 | # CONFIG_USB_MOUSE is not set | ||
1135 | # CONFIG_USB_AIPTEK is not set | ||
1136 | # CONFIG_USB_WACOM is not set | ||
1137 | # CONFIG_USB_ACECAD is not set | ||
1138 | # CONFIG_USB_KBTAB is not set | ||
1139 | # CONFIG_USB_POWERMATE is not set | ||
1140 | # CONFIG_USB_TOUCHSCREEN is not set | ||
1141 | # CONFIG_USB_YEALINK is not set | ||
1142 | # CONFIG_USB_XPAD is not set | ||
1143 | # CONFIG_USB_ATI_REMOTE is not set | ||
1144 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
1145 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
1146 | # CONFIG_USB_APPLETOUCH is not set | ||
1147 | # CONFIG_USB_GTCO is not set | ||
1148 | |||
1149 | # | ||
1150 | # USB Imaging devices | ||
1151 | # | ||
1152 | # CONFIG_USB_MDC800 is not set | ||
1153 | # CONFIG_USB_MICROTEK is not set | ||
1154 | |||
1155 | # | ||
1156 | # USB Network Adapters | ||
1157 | # | ||
1158 | # CONFIG_USB_CATC is not set | ||
1159 | # CONFIG_USB_KAWETH is not set | ||
1160 | # CONFIG_USB_PEGASUS is not set | ||
1161 | # CONFIG_USB_RTL8150 is not set | ||
1162 | # CONFIG_USB_USBNET_MII is not set | ||
1163 | # CONFIG_USB_USBNET is not set | ||
1164 | # CONFIG_USB_MON is not set | ||
1165 | |||
1166 | # | ||
1167 | # USB port drivers | ||
1168 | # | ||
1169 | |||
1170 | # | ||
1171 | # USB Serial Converter support | ||
1172 | # | ||
1173 | # CONFIG_USB_SERIAL is not set | ||
1174 | |||
1175 | # | ||
1176 | # USB Miscellaneous drivers | ||
1177 | # | ||
1178 | # CONFIG_USB_EMI62 is not set | ||
1179 | # CONFIG_USB_EMI26 is not set | ||
1180 | # CONFIG_USB_ADUTUX is not set | ||
1181 | # CONFIG_USB_AUERSWALD is not set | ||
1182 | # CONFIG_USB_RIO500 is not set | ||
1183 | # CONFIG_USB_LEGOTOWER is not set | ||
1184 | # CONFIG_USB_LCD is not set | ||
1185 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1186 | # CONFIG_USB_LED is not set | ||
1187 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1188 | # CONFIG_USB_CYTHERM is not set | ||
1189 | # CONFIG_USB_PHIDGET is not set | ||
1190 | # CONFIG_USB_IDMOUSE is not set | ||
1191 | # CONFIG_USB_FTDI_ELAN is not set | ||
1192 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1193 | # CONFIG_USB_LD is not set | ||
1194 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1195 | # CONFIG_USB_IOWARRIOR is not set | ||
1196 | # CONFIG_USB_TEST is not set | ||
1197 | |||
1198 | # | ||
1199 | # USB DSL modem support | ||
1200 | # | ||
1201 | |||
1202 | # | ||
1203 | # USB Gadget Support | ||
1204 | # | ||
1205 | CONFIG_USB_GADGET=y | ||
1206 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1207 | CONFIG_USB_GADGET_SELECTED=y | ||
1208 | # CONFIG_USB_GADGET_NET2280 is not set | ||
1209 | CONFIG_USB_GADGET_PXA2XX=y | ||
1210 | CONFIG_USB_PXA2XX=y | ||
1211 | # CONFIG_USB_PXA2XX_SMALL is not set | ||
1212 | # CONFIG_USB_GADGET_PXA27X is not set | ||
1213 | # CONFIG_USB_GADGET_GOKU is not set | ||
1214 | # CONFIG_USB_GADGET_MQ11XX is not set | ||
1215 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1216 | # CONFIG_USB_GADGET_S3C2410 is not set | ||
1217 | # CONFIG_USB_GADGET_OMAP is not set | ||
1218 | # CONFIG_USB_GADGET_AT91 is not set | ||
1219 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1220 | # CONFIG_USB_GADGET_DUALSPEED is not set | ||
1221 | # CONFIG_USB_ZERO is not set | ||
1222 | CONFIG_USB_ETH=y | ||
1223 | # CONFIG_USB_ETH_RNDIS is not set | ||
1224 | # CONFIG_USB_GADGETFS is not set | ||
1225 | # CONFIG_USB_FILE_STORAGE is not set | ||
1226 | # CONFIG_USB_G_SERIAL is not set | ||
1227 | # CONFIG_USB_MIDI_GADGET is not set | ||
1228 | # CONFIG_USB_G_CHAR is not set | ||
1229 | # CONFIG_USB_PXA2XX_GPIO is not set | ||
1230 | |||
1231 | # | ||
1232 | # MMC/SD Card support | ||
1233 | # | ||
1234 | CONFIG_MMC=y | ||
1235 | # CONFIG_MMC_DEBUG is not set | ||
1236 | CONFIG_MMC_BLOCK=y | ||
1237 | # CONFIG_MMC_PXA is not set | ||
1238 | CONFIG_MMC_TMIO=y | ||
1239 | # CONFIG_MMC_SAMCOP is not set | ||
1240 | |||
1241 | # | ||
1242 | # Real Time Clock | ||
1243 | # | ||
1244 | CONFIG_RTC_LIB=y | ||
1245 | # CONFIG_RTC_CLASS is not set | ||
1246 | |||
1247 | # | ||
1248 | # File systems | ||
1249 | # | ||
1250 | CONFIG_EXT2_FS=y | ||
1251 | # CONFIG_EXT2_FS_XATTR is not set | ||
1252 | # CONFIG_EXT2_FS_XIP is not set | ||
1253 | # CONFIG_EXT3_FS is not set | ||
1254 | # CONFIG_EXT4DEV_FS is not set | ||
1255 | # CONFIG_REISERFS_FS is not set | ||
1256 | # CONFIG_JFS_FS is not set | ||
1257 | # CONFIG_FS_POSIX_ACL is not set | ||
1258 | # CONFIG_XFS_FS is not set | ||
1259 | # CONFIG_GFS2_FS is not set | ||
1260 | # CONFIG_OCFS2_FS is not set | ||
1261 | # CONFIG_MINIX_FS is not set | ||
1262 | # CONFIG_ROMFS_FS is not set | ||
1263 | CONFIG_INOTIFY=y | ||
1264 | CONFIG_INOTIFY_USER=y | ||
1265 | # CONFIG_QUOTA is not set | ||
1266 | CONFIG_DNOTIFY=y | ||
1267 | # CONFIG_AUTOFS_FS is not set | ||
1268 | # CONFIG_AUTOFS4_FS is not set | ||
1269 | # CONFIG_FUSE_FS is not set | ||
1270 | |||
1271 | # | ||
1272 | # CD-ROM/DVD Filesystems | ||
1273 | # | ||
1274 | # CONFIG_ISO9660_FS is not set | ||
1275 | # CONFIG_UDF_FS is not set | ||
1276 | |||
1277 | # | ||
1278 | # DOS/FAT/NT Filesystems | ||
1279 | # | ||
1280 | CONFIG_FAT_FS=y | ||
1281 | # CONFIG_MSDOS_FS is not set | ||
1282 | CONFIG_VFAT_FS=y | ||
1283 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1284 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1285 | # CONFIG_NTFS_FS is not set | ||
1286 | |||
1287 | # | ||
1288 | # Pseudo filesystems | ||
1289 | # | ||
1290 | CONFIG_PROC_FS=y | ||
1291 | CONFIG_PROC_SYSCTL=y | ||
1292 | CONFIG_SYSFS=y | ||
1293 | CONFIG_TMPFS=y | ||
1294 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1295 | # CONFIG_HUGETLB_PAGE is not set | ||
1296 | CONFIG_RAMFS=y | ||
1297 | # CONFIG_CONFIGFS_FS is not set | ||
1298 | |||
1299 | # | ||
1300 | # Miscellaneous filesystems | ||
1301 | # | ||
1302 | # CONFIG_ADFS_FS is not set | ||
1303 | # CONFIG_AFFS_FS is not set | ||
1304 | # CONFIG_HFS_FS is not set | ||
1305 | # CONFIG_HFSPLUS_FS is not set | ||
1306 | # CONFIG_BEFS_FS is not set | ||
1307 | # CONFIG_BFS_FS is not set | ||
1308 | # CONFIG_EFS_FS is not set | ||
1309 | CONFIG_JFFS2_FS=m | ||
1310 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1311 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1312 | # CONFIG_JFFS2_SUMMARY is not set | ||
1313 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1314 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1315 | CONFIG_JFFS2_ZLIB=y | ||
1316 | CONFIG_JFFS2_RTIME=y | ||
1317 | # CONFIG_JFFS2_RUBIN is not set | ||
1318 | # CONFIG_CRAMFS is not set | ||
1319 | # CONFIG_VXFS_FS is not set | ||
1320 | # CONFIG_HPFS_FS is not set | ||
1321 | # CONFIG_QNX4FS_FS is not set | ||
1322 | # CONFIG_SYSV_FS is not set | ||
1323 | # CONFIG_UFS_FS is not set | ||
1324 | |||
1325 | # | ||
1326 | # Network File Systems | ||
1327 | # | ||
1328 | CONFIG_NFS_FS=y | ||
1329 | CONFIG_NFS_V3=y | ||
1330 | # CONFIG_NFS_V3_ACL is not set | ||
1331 | # CONFIG_NFS_V4 is not set | ||
1332 | # CONFIG_NFS_DIRECTIO is not set | ||
1333 | # CONFIG_NFSD is not set | ||
1334 | CONFIG_LOCKD=y | ||
1335 | CONFIG_LOCKD_V4=y | ||
1336 | CONFIG_NFS_COMMON=y | ||
1337 | CONFIG_SUNRPC=y | ||
1338 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1339 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1340 | # CONFIG_SMB_FS is not set | ||
1341 | # CONFIG_CIFS is not set | ||
1342 | # CONFIG_NCP_FS is not set | ||
1343 | # CONFIG_CODA_FS is not set | ||
1344 | # CONFIG_AFS_FS is not set | ||
1345 | # CONFIG_9P_FS is not set | ||
1346 | |||
1347 | # | ||
1348 | # Partition Types | ||
1349 | # | ||
1350 | CONFIG_PARTITION_ADVANCED=y | ||
1351 | # CONFIG_ACORN_PARTITION is not set | ||
1352 | # CONFIG_OSF_PARTITION is not set | ||
1353 | # CONFIG_AMIGA_PARTITION is not set | ||
1354 | # CONFIG_ATARI_PARTITION is not set | ||
1355 | # CONFIG_MAC_PARTITION is not set | ||
1356 | CONFIG_MSDOS_PARTITION=y | ||
1357 | # CONFIG_BSD_DISKLABEL is not set | ||
1358 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1359 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1360 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1361 | # CONFIG_LDM_PARTITION is not set | ||
1362 | # CONFIG_SGI_PARTITION is not set | ||
1363 | # CONFIG_ULTRIX_PARTITION is not set | ||
1364 | # CONFIG_SUN_PARTITION is not set | ||
1365 | # CONFIG_KARMA_PARTITION is not set | ||
1366 | # CONFIG_EFI_PARTITION is not set | ||
1367 | |||
1368 | # | ||
1369 | # Native Language Support | ||
1370 | # | ||
1371 | CONFIG_NLS=y | ||
1372 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1373 | CONFIG_NLS_CODEPAGE_437=y | ||
1374 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1375 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1376 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1377 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1378 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1379 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1380 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1381 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1382 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1383 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1384 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1385 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1386 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1387 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1388 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1389 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1390 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1391 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1392 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1393 | # CONFIG_NLS_ISO8859_8 is not set | ||
1394 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1395 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1396 | # CONFIG_NLS_ASCII is not set | ||
1397 | CONFIG_NLS_ISO8859_1=y | ||
1398 | # CONFIG_NLS_ISO8859_2 is not set | ||
1399 | # CONFIG_NLS_ISO8859_3 is not set | ||
1400 | # CONFIG_NLS_ISO8859_4 is not set | ||
1401 | # CONFIG_NLS_ISO8859_5 is not set | ||
1402 | # CONFIG_NLS_ISO8859_6 is not set | ||
1403 | # CONFIG_NLS_ISO8859_7 is not set | ||
1404 | # CONFIG_NLS_ISO8859_9 is not set | ||
1405 | # CONFIG_NLS_ISO8859_13 is not set | ||
1406 | # CONFIG_NLS_ISO8859_14 is not set | ||
1407 | # CONFIG_NLS_ISO8859_15 is not set | ||
1408 | # CONFIG_NLS_KOI8_R is not set | ||
1409 | # CONFIG_NLS_KOI8_U is not set | ||
1410 | # CONFIG_NLS_UTF8 is not set | ||
1411 | |||
1412 | # | ||
1413 | # Distributed Lock Manager | ||
1414 | # | ||
1415 | # CONFIG_DLM is not set | ||
1416 | |||
1417 | # | ||
1418 | # Profiling support | ||
1419 | # | ||
1420 | # CONFIG_PROFILING is not set | ||
1421 | |||
1422 | # | ||
1423 | # Kernel hacking | ||
1424 | # | ||
1425 | # CONFIG_PRINTK_TIME is not set | ||
1426 | CONFIG_ENABLE_MUST_CHECK=y | ||
1427 | # CONFIG_MAGIC_SYSRQ is not set | ||
1428 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1429 | # CONFIG_DEBUG_FS is not set | ||
1430 | # CONFIG_HEADERS_CHECK is not set | ||
1431 | # CONFIG_DEBUG_KERNEL is not set | ||
1432 | CONFIG_LOG_BUF_SHIFT=14 | ||
1433 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1434 | CONFIG_FRAME_POINTER=y | ||
1435 | # CONFIG_DEBUG_USER is not set | ||
1436 | |||
1437 | # | ||
1438 | # Security options | ||
1439 | # | ||
1440 | # CONFIG_KEYS is not set | ||
1441 | # CONFIG_SECURITY is not set | ||
1442 | |||
1443 | # | ||
1444 | # Cryptographic options | ||
1445 | # | ||
1446 | CONFIG_CRYPTO=y | ||
1447 | CONFIG_CRYPTO_ALGAPI=m | ||
1448 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1449 | CONFIG_CRYPTO_MANAGER=m | ||
1450 | # CONFIG_CRYPTO_HMAC is not set | ||
1451 | # CONFIG_CRYPTO_XCBC is not set | ||
1452 | # CONFIG_CRYPTO_NULL is not set | ||
1453 | # CONFIG_CRYPTO_MD4 is not set | ||
1454 | # CONFIG_CRYPTO_MD5 is not set | ||
1455 | # CONFIG_CRYPTO_SHA1 is not set | ||
1456 | # CONFIG_CRYPTO_SHA256 is not set | ||
1457 | # CONFIG_CRYPTO_SHA512 is not set | ||
1458 | # CONFIG_CRYPTO_WP512 is not set | ||
1459 | # CONFIG_CRYPTO_TGR192 is not set | ||
1460 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1461 | CONFIG_CRYPTO_ECB=m | ||
1462 | CONFIG_CRYPTO_CBC=m | ||
1463 | CONFIG_CRYPTO_PCBC=m | ||
1464 | # CONFIG_CRYPTO_LRW is not set | ||
1465 | # CONFIG_CRYPTO_DES is not set | ||
1466 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1467 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1468 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1469 | # CONFIG_CRYPTO_SERPENT is not set | ||
1470 | # CONFIG_CRYPTO_AES is not set | ||
1471 | # CONFIG_CRYPTO_CAST5 is not set | ||
1472 | # CONFIG_CRYPTO_CAST6 is not set | ||
1473 | # CONFIG_CRYPTO_TEA is not set | ||
1474 | CONFIG_CRYPTO_ARC4=m | ||
1475 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1476 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1477 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1478 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1479 | # CONFIG_CRYPTO_CRC32C is not set | ||
1480 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1481 | # CONFIG_CRYPTO_TEST is not set | ||
1482 | |||
1483 | # | ||
1484 | # Hardware crypto devices | ||
1485 | # | ||
1486 | |||
1487 | # | ||
1488 | # Library routines | ||
1489 | # | ||
1490 | CONFIG_BITREVERSE=y | ||
1491 | # CONFIG_CRC_CCITT is not set | ||
1492 | # CONFIG_CRC16 is not set | ||
1493 | CONFIG_CRC32=y | ||
1494 | # CONFIG_LIBCRC32C is not set | ||
1495 | CONFIG_ZLIB_INFLATE=m | ||
1496 | CONFIG_ZLIB_DEFLATE=m | ||
1497 | CONFIG_PLIST=y | ||
1498 | CONFIG_HAS_IOMEM=y | ||
1499 | CONFIG_HAS_IOPORT=y | ||
diff --git a/arch/arm/configs/iop13xx_defconfig b/arch/arm/configs/iop13xx_defconfig index add03c9e5553..988b4d13e76f 100644 --- a/arch/arm/configs/iop13xx_defconfig +++ b/arch/arm/configs/iop13xx_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.22 | 3 | # Linux kernel version: 2.6.24-rc5 |
4 | # Thu Jul 19 15:57:52 2007 | 4 | # Wed Dec 12 16:11:03 2007 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
@@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 | |||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
27 | 27 | ||
28 | # | 28 | # |
29 | # Code maturity level options | 29 | # General setup |
30 | # | 30 | # |
31 | CONFIG_EXPERIMENTAL=y | 31 | CONFIG_EXPERIMENTAL=y |
32 | CONFIG_BROKEN_ON_SMP=y | 32 | CONFIG_BROKEN_ON_SMP=y |
33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
34 | |||
35 | # | ||
36 | # General setup | ||
37 | # | ||
38 | CONFIG_LOCALVERSION="" | 34 | CONFIG_LOCALVERSION="" |
39 | # CONFIG_LOCALVERSION_AUTO is not set | 35 | # CONFIG_LOCALVERSION_AUTO is not set |
40 | CONFIG_SWAP=y | 36 | CONFIG_SWAP=y |
@@ -45,10 +41,15 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
45 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 41 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
46 | # CONFIG_TASKSTATS is not set | 42 | # CONFIG_TASKSTATS is not set |
47 | # CONFIG_USER_NS is not set | 43 | # CONFIG_USER_NS is not set |
44 | # CONFIG_PID_NS is not set | ||
48 | # CONFIG_AUDIT is not set | 45 | # CONFIG_AUDIT is not set |
49 | CONFIG_IKCONFIG=y | 46 | CONFIG_IKCONFIG=y |
50 | CONFIG_IKCONFIG_PROC=y | 47 | CONFIG_IKCONFIG_PROC=y |
51 | CONFIG_LOG_BUF_SHIFT=14 | 48 | CONFIG_LOG_BUF_SHIFT=14 |
49 | # CONFIG_CGROUPS is not set | ||
50 | CONFIG_FAIR_GROUP_SCHED=y | ||
51 | CONFIG_FAIR_USER_SCHED=y | ||
52 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
52 | CONFIG_SYSFS_DEPRECATED=y | 53 | CONFIG_SYSFS_DEPRECATED=y |
53 | # CONFIG_RELAY is not set | 54 | # CONFIG_RELAY is not set |
54 | CONFIG_BLK_DEV_INITRD=y | 55 | CONFIG_BLK_DEV_INITRD=y |
@@ -69,7 +70,6 @@ CONFIG_FUTEX=y | |||
69 | CONFIG_ANON_INODES=y | 70 | CONFIG_ANON_INODES=y |
70 | CONFIG_EPOLL=y | 71 | CONFIG_EPOLL=y |
71 | CONFIG_SIGNALFD=y | 72 | CONFIG_SIGNALFD=y |
72 | CONFIG_TIMERFD=y | ||
73 | CONFIG_EVENTFD=y | 73 | CONFIG_EVENTFD=y |
74 | CONFIG_SHMEM=y | 74 | CONFIG_SHMEM=y |
75 | CONFIG_VM_EVENT_COUNTERS=y | 75 | CONFIG_VM_EVENT_COUNTERS=y |
@@ -130,6 +130,7 @@ CONFIG_ARCH_IOP13XX=y | |||
130 | # CONFIG_ARCH_L7200 is not set | 130 | # CONFIG_ARCH_L7200 is not set |
131 | # CONFIG_ARCH_KS8695 is not set | 131 | # CONFIG_ARCH_KS8695 is not set |
132 | # CONFIG_ARCH_NS9XXX is not set | 132 | # CONFIG_ARCH_NS9XXX is not set |
133 | # CONFIG_ARCH_MXC is not set | ||
133 | # CONFIG_ARCH_PNX4008 is not set | 134 | # CONFIG_ARCH_PNX4008 is not set |
134 | # CONFIG_ARCH_PXA is not set | 135 | # CONFIG_ARCH_PXA is not set |
135 | # CONFIG_ARCH_RPC is not set | 136 | # CONFIG_ARCH_RPC is not set |
@@ -151,9 +152,12 @@ CONFIG_MACH_IQ81340SC=y | |||
151 | CONFIG_MACH_IQ81340MC=y | 152 | CONFIG_MACH_IQ81340MC=y |
152 | 153 | ||
153 | # | 154 | # |
154 | # IOP13XX IMU Support | 155 | # Boot options |
156 | # | ||
157 | |||
158 | # | ||
159 | # Power management | ||
155 | # | 160 | # |
156 | # CONFIG_IOP_IMU is not set | ||
157 | CONFIG_PLAT_IOP=y | 161 | CONFIG_PLAT_IOP=y |
158 | 162 | ||
159 | # | 163 | # |
@@ -185,10 +189,7 @@ CONFIG_PCI=y | |||
185 | CONFIG_PCI_SYSCALL=y | 189 | CONFIG_PCI_SYSCALL=y |
186 | CONFIG_ARCH_SUPPORTS_MSI=y | 190 | CONFIG_ARCH_SUPPORTS_MSI=y |
187 | # CONFIG_PCI_MSI is not set | 191 | # CONFIG_PCI_MSI is not set |
188 | 192 | CONFIG_PCI_LEGACY=y | |
189 | # | ||
190 | # PCCARD (PCMCIA/CardBus) support | ||
191 | # | ||
192 | # CONFIG_PCCARD is not set | 193 | # CONFIG_PCCARD is not set |
193 | 194 | ||
194 | # | 195 | # |
@@ -207,6 +208,7 @@ CONFIG_FLATMEM_MANUAL=y | |||
207 | CONFIG_FLATMEM=y | 208 | CONFIG_FLATMEM=y |
208 | CONFIG_FLAT_NODE_MEM_MAP=y | 209 | CONFIG_FLAT_NODE_MEM_MAP=y |
209 | # CONFIG_SPARSEMEM_STATIC is not set | 210 | # CONFIG_SPARSEMEM_STATIC is not set |
211 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
210 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 212 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
211 | # CONFIG_RESOURCES_64BIT is not set | 213 | # CONFIG_RESOURCES_64BIT is not set |
212 | CONFIG_ZONE_DMA_FLAG=1 | 214 | CONFIG_ZONE_DMA_FLAG=1 |
@@ -246,6 +248,7 @@ CONFIG_BINFMT_AOUT=y | |||
246 | # Power management options | 248 | # Power management options |
247 | # | 249 | # |
248 | # CONFIG_PM is not set | 250 | # CONFIG_PM is not set |
251 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
249 | 252 | ||
250 | # | 253 | # |
251 | # Networking | 254 | # Networking |
@@ -285,6 +288,7 @@ CONFIG_IP_PNP_BOOTP=y | |||
285 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 288 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
286 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 289 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
287 | CONFIG_INET_XFRM_MODE_BEET=y | 290 | CONFIG_INET_XFRM_MODE_BEET=y |
291 | # CONFIG_INET_LRO is not set | ||
288 | CONFIG_INET_DIAG=y | 292 | CONFIG_INET_DIAG=y |
289 | CONFIG_INET_TCP_DIAG=y | 293 | CONFIG_INET_TCP_DIAG=y |
290 | # CONFIG_TCP_CONG_ADVANCED is not set | 294 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -324,10 +328,6 @@ CONFIG_IPV6=y | |||
324 | # CONFIG_LAPB is not set | 328 | # CONFIG_LAPB is not set |
325 | # CONFIG_ECONET is not set | 329 | # CONFIG_ECONET is not set |
326 | # CONFIG_WAN_ROUTER is not set | 330 | # CONFIG_WAN_ROUTER is not set |
327 | |||
328 | # | ||
329 | # QoS and/or fair queueing | ||
330 | # | ||
331 | # CONFIG_NET_SCHED is not set | 331 | # CONFIG_NET_SCHED is not set |
332 | 332 | ||
333 | # | 333 | # |
@@ -356,6 +356,7 @@ CONFIG_IPV6=y | |||
356 | # | 356 | # |
357 | # Generic Driver Options | 357 | # Generic Driver Options |
358 | # | 358 | # |
359 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
359 | CONFIG_STANDALONE=y | 360 | CONFIG_STANDALONE=y |
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 361 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
361 | # CONFIG_FW_LOADER is not set | 362 | # CONFIG_FW_LOADER is not set |
@@ -383,6 +384,7 @@ CONFIG_MTD_BLOCK=y | |||
383 | # CONFIG_INFTL is not set | 384 | # CONFIG_INFTL is not set |
384 | # CONFIG_RFD_FTL is not set | 385 | # CONFIG_RFD_FTL is not set |
385 | # CONFIG_SSFDC is not set | 386 | # CONFIG_SSFDC is not set |
387 | # CONFIG_MTD_OOPS is not set | ||
386 | 388 | ||
387 | # | 389 | # |
388 | # RAM/ROM/Flash chip drivers | 390 | # RAM/ROM/Flash chip drivers |
@@ -423,6 +425,7 @@ CONFIG_MTD_PHYSMAP_START=0xfa000000 | |||
423 | CONFIG_MTD_PHYSMAP_LEN=0x0 | 425 | CONFIG_MTD_PHYSMAP_LEN=0x0 |
424 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | 426 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 |
425 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 427 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
428 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
426 | # CONFIG_MTD_PLATRAM is not set | 429 | # CONFIG_MTD_PLATRAM is not set |
427 | 430 | ||
428 | # | 431 | # |
@@ -463,6 +466,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 | |||
463 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 466 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 |
464 | # CONFIG_CDROM_PKTCDVD is not set | 467 | # CONFIG_CDROM_PKTCDVD is not set |
465 | # CONFIG_ATA_OVER_ETH is not set | 468 | # CONFIG_ATA_OVER_ETH is not set |
469 | CONFIG_MISC_DEVICES=y | ||
470 | # CONFIG_PHANTOM is not set | ||
471 | # CONFIG_EEPROM_93CX6 is not set | ||
472 | # CONFIG_SGI_IOC4 is not set | ||
473 | # CONFIG_TIFM_CORE is not set | ||
466 | 474 | ||
467 | # | 475 | # |
468 | # SCSI device support | 476 | # SCSI device support |
@@ -499,12 +507,9 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
499 | # CONFIG_SCSI_SPI_ATTRS is not set | 507 | # CONFIG_SCSI_SPI_ATTRS is not set |
500 | # CONFIG_SCSI_FC_ATTRS is not set | 508 | # CONFIG_SCSI_FC_ATTRS is not set |
501 | CONFIG_SCSI_ISCSI_ATTRS=y | 509 | CONFIG_SCSI_ISCSI_ATTRS=y |
502 | CONFIG_SCSI_SAS_ATTRS=y | ||
503 | # CONFIG_SCSI_SAS_LIBSAS is not set | 510 | # CONFIG_SCSI_SAS_LIBSAS is not set |
504 | 511 | # CONFIG_SCSI_SRP_ATTRS is not set | |
505 | # | 512 | CONFIG_SCSI_LOWLEVEL=y |
506 | # SCSI low-level drivers | ||
507 | # | ||
508 | # CONFIG_ISCSI_TCP is not set | 513 | # CONFIG_ISCSI_TCP is not set |
509 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 514 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
510 | # CONFIG_SCSI_3W_9XXX is not set | 515 | # CONFIG_SCSI_3W_9XXX is not set |
@@ -515,6 +520,7 @@ CONFIG_SCSI_SAS_ATTRS=y | |||
515 | # CONFIG_SCSI_AIC79XX is not set | 520 | # CONFIG_SCSI_AIC79XX is not set |
516 | # CONFIG_SCSI_AIC94XX is not set | 521 | # CONFIG_SCSI_AIC94XX is not set |
517 | # CONFIG_SCSI_DPT_I2O is not set | 522 | # CONFIG_SCSI_DPT_I2O is not set |
523 | # CONFIG_SCSI_ADVANSYS is not set | ||
518 | # CONFIG_SCSI_ARCMSR is not set | 524 | # CONFIG_SCSI_ARCMSR is not set |
519 | # CONFIG_MEGARAID_NEWGEN is not set | 525 | # CONFIG_MEGARAID_NEWGEN is not set |
520 | # CONFIG_MEGARAID_LEGACY is not set | 526 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -555,14 +561,8 @@ CONFIG_BLK_DEV_DM=y | |||
555 | # CONFIG_DM_ZERO is not set | 561 | # CONFIG_DM_ZERO is not set |
556 | # CONFIG_DM_MULTIPATH is not set | 562 | # CONFIG_DM_MULTIPATH is not set |
557 | # CONFIG_DM_DELAY is not set | 563 | # CONFIG_DM_DELAY is not set |
558 | 564 | # CONFIG_DM_UEVENT is not set | |
559 | # | ||
560 | # Fusion MPT device support | ||
561 | # | ||
562 | # CONFIG_FUSION is not set | 565 | # CONFIG_FUSION is not set |
563 | # CONFIG_FUSION_SPI is not set | ||
564 | # CONFIG_FUSION_FC is not set | ||
565 | # CONFIG_FUSION_SAS is not set | ||
566 | 566 | ||
567 | # | 567 | # |
568 | # IEEE 1394 (FireWire) support | 568 | # IEEE 1394 (FireWire) support |
@@ -577,6 +577,8 @@ CONFIG_NETDEVICES=y | |||
577 | # CONFIG_MACVLAN is not set | 577 | # CONFIG_MACVLAN is not set |
578 | # CONFIG_EQUALIZER is not set | 578 | # CONFIG_EQUALIZER is not set |
579 | # CONFIG_TUN is not set | 579 | # CONFIG_TUN is not set |
580 | # CONFIG_VETH is not set | ||
581 | # CONFIG_IP1000 is not set | ||
580 | # CONFIG_ARCNET is not set | 582 | # CONFIG_ARCNET is not set |
581 | # CONFIG_NET_ETHERNET is not set | 583 | # CONFIG_NET_ETHERNET is not set |
582 | CONFIG_NETDEV_1000=y | 584 | CONFIG_NETDEV_1000=y |
@@ -585,6 +587,7 @@ CONFIG_NETDEV_1000=y | |||
585 | CONFIG_E1000=y | 587 | CONFIG_E1000=y |
586 | CONFIG_E1000_NAPI=y | 588 | CONFIG_E1000_NAPI=y |
587 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | 589 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set |
590 | # CONFIG_E1000E is not set | ||
588 | # CONFIG_NS83820 is not set | 591 | # CONFIG_NS83820 is not set |
589 | # CONFIG_HAMACHI is not set | 592 | # CONFIG_HAMACHI is not set |
590 | # CONFIG_YELLOWFIN is not set | 593 | # CONFIG_YELLOWFIN is not set |
@@ -592,6 +595,7 @@ CONFIG_E1000_NAPI=y | |||
592 | # CONFIG_SIS190 is not set | 595 | # CONFIG_SIS190 is not set |
593 | # CONFIG_SKGE is not set | 596 | # CONFIG_SKGE is not set |
594 | # CONFIG_SKY2 is not set | 597 | # CONFIG_SKY2 is not set |
598 | # CONFIG_SK98LIN is not set | ||
595 | # CONFIG_VIA_VELOCITY is not set | 599 | # CONFIG_VIA_VELOCITY is not set |
596 | # CONFIG_TIGON3 is not set | 600 | # CONFIG_TIGON3 is not set |
597 | # CONFIG_BNX2 is not set | 601 | # CONFIG_BNX2 is not set |
@@ -600,11 +604,14 @@ CONFIG_E1000_NAPI=y | |||
600 | CONFIG_NETDEV_10000=y | 604 | CONFIG_NETDEV_10000=y |
601 | # CONFIG_CHELSIO_T1 is not set | 605 | # CONFIG_CHELSIO_T1 is not set |
602 | # CONFIG_CHELSIO_T3 is not set | 606 | # CONFIG_CHELSIO_T3 is not set |
607 | # CONFIG_IXGBE is not set | ||
603 | # CONFIG_IXGB is not set | 608 | # CONFIG_IXGB is not set |
604 | # CONFIG_S2IO is not set | 609 | # CONFIG_S2IO is not set |
605 | # CONFIG_MYRI10GE is not set | 610 | # CONFIG_MYRI10GE is not set |
606 | # CONFIG_NETXEN_NIC is not set | 611 | # CONFIG_NETXEN_NIC is not set |
612 | # CONFIG_NIU is not set | ||
607 | # CONFIG_MLX4_CORE is not set | 613 | # CONFIG_MLX4_CORE is not set |
614 | # CONFIG_TEHUTI is not set | ||
608 | # CONFIG_TR is not set | 615 | # CONFIG_TR is not set |
609 | 616 | ||
610 | # | 617 | # |
@@ -639,7 +646,6 @@ CONFIG_INPUT_MOUSEDEV=y | |||
639 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 646 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
640 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 647 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
641 | # CONFIG_INPUT_JOYDEV is not set | 648 | # CONFIG_INPUT_JOYDEV is not set |
642 | # CONFIG_INPUT_TSDEV is not set | ||
643 | # CONFIG_INPUT_EVDEV is not set | 649 | # CONFIG_INPUT_EVDEV is not set |
644 | # CONFIG_INPUT_EVBUG is not set | 650 | # CONFIG_INPUT_EVBUG is not set |
645 | 651 | ||
@@ -688,12 +694,10 @@ CONFIG_UNIX98_PTYS=y | |||
688 | CONFIG_LEGACY_PTYS=y | 694 | CONFIG_LEGACY_PTYS=y |
689 | CONFIG_LEGACY_PTY_COUNT=256 | 695 | CONFIG_LEGACY_PTY_COUNT=256 |
690 | # CONFIG_IPMI_HANDLER is not set | 696 | # CONFIG_IPMI_HANDLER is not set |
691 | # CONFIG_WATCHDOG is not set | ||
692 | CONFIG_HW_RANDOM=y | 697 | CONFIG_HW_RANDOM=y |
693 | # CONFIG_NVRAM is not set | 698 | # CONFIG_NVRAM is not set |
694 | # CONFIG_R3964 is not set | 699 | # CONFIG_R3964 is not set |
695 | # CONFIG_APPLICOM is not set | 700 | # CONFIG_APPLICOM is not set |
696 | # CONFIG_DRM is not set | ||
697 | # CONFIG_RAW_DRIVER is not set | 701 | # CONFIG_RAW_DRIVER is not set |
698 | # CONFIG_TCG_TPM is not set | 702 | # CONFIG_TCG_TPM is not set |
699 | CONFIG_DEVPORT=y | 703 | CONFIG_DEVPORT=y |
@@ -758,9 +762,9 @@ CONFIG_I2C_IOP3XX=y | |||
758 | # CONFIG_SPI is not set | 762 | # CONFIG_SPI is not set |
759 | # CONFIG_SPI_MASTER is not set | 763 | # CONFIG_SPI_MASTER is not set |
760 | # CONFIG_W1 is not set | 764 | # CONFIG_W1 is not set |
765 | # CONFIG_POWER_SUPPLY is not set | ||
761 | CONFIG_HWMON=y | 766 | CONFIG_HWMON=y |
762 | # CONFIG_HWMON_VID is not set | 767 | # CONFIG_HWMON_VID is not set |
763 | # CONFIG_SENSORS_ABITUGURU is not set | ||
764 | # CONFIG_SENSORS_AD7418 is not set | 768 | # CONFIG_SENSORS_AD7418 is not set |
765 | # CONFIG_SENSORS_ADM1021 is not set | 769 | # CONFIG_SENSORS_ADM1021 is not set |
766 | # CONFIG_SENSORS_ADM1025 is not set | 770 | # CONFIG_SENSORS_ADM1025 is not set |
@@ -768,12 +772,13 @@ CONFIG_HWMON=y | |||
768 | # CONFIG_SENSORS_ADM1029 is not set | 772 | # CONFIG_SENSORS_ADM1029 is not set |
769 | # CONFIG_SENSORS_ADM1031 is not set | 773 | # CONFIG_SENSORS_ADM1031 is not set |
770 | # CONFIG_SENSORS_ADM9240 is not set | 774 | # CONFIG_SENSORS_ADM9240 is not set |
771 | # CONFIG_SENSORS_ASB100 is not set | 775 | # CONFIG_SENSORS_ADT7470 is not set |
772 | # CONFIG_SENSORS_ATXP1 is not set | 776 | # CONFIG_SENSORS_ATXP1 is not set |
773 | # CONFIG_SENSORS_DS1621 is not set | 777 | # CONFIG_SENSORS_DS1621 is not set |
778 | # CONFIG_SENSORS_I5K_AMB is not set | ||
774 | # CONFIG_SENSORS_F71805F is not set | 779 | # CONFIG_SENSORS_F71805F is not set |
775 | # CONFIG_SENSORS_FSCHER is not set | 780 | # CONFIG_SENSORS_F71882FG is not set |
776 | # CONFIG_SENSORS_FSCPOS is not set | 781 | # CONFIG_SENSORS_F75375S is not set |
777 | # CONFIG_SENSORS_GL518SM is not set | 782 | # CONFIG_SENSORS_GL518SM is not set |
778 | # CONFIG_SENSORS_GL520SM is not set | 783 | # CONFIG_SENSORS_GL520SM is not set |
779 | # CONFIG_SENSORS_IT87 is not set | 784 | # CONFIG_SENSORS_IT87 is not set |
@@ -787,14 +792,17 @@ CONFIG_HWMON=y | |||
787 | # CONFIG_SENSORS_LM87 is not set | 792 | # CONFIG_SENSORS_LM87 is not set |
788 | # CONFIG_SENSORS_LM90 is not set | 793 | # CONFIG_SENSORS_LM90 is not set |
789 | # CONFIG_SENSORS_LM92 is not set | 794 | # CONFIG_SENSORS_LM92 is not set |
795 | # CONFIG_SENSORS_LM93 is not set | ||
790 | # CONFIG_SENSORS_MAX1619 is not set | 796 | # CONFIG_SENSORS_MAX1619 is not set |
791 | # CONFIG_SENSORS_MAX6650 is not set | 797 | # CONFIG_SENSORS_MAX6650 is not set |
792 | # CONFIG_SENSORS_PC87360 is not set | 798 | # CONFIG_SENSORS_PC87360 is not set |
793 | # CONFIG_SENSORS_PC87427 is not set | 799 | # CONFIG_SENSORS_PC87427 is not set |
794 | # CONFIG_SENSORS_SIS5595 is not set | 800 | # CONFIG_SENSORS_SIS5595 is not set |
801 | # CONFIG_SENSORS_DME1737 is not set | ||
795 | # CONFIG_SENSORS_SMSC47M1 is not set | 802 | # CONFIG_SENSORS_SMSC47M1 is not set |
796 | # CONFIG_SENSORS_SMSC47M192 is not set | 803 | # CONFIG_SENSORS_SMSC47M192 is not set |
797 | # CONFIG_SENSORS_SMSC47B397 is not set | 804 | # CONFIG_SENSORS_SMSC47B397 is not set |
805 | # CONFIG_SENSORS_THMC50 is not set | ||
798 | # CONFIG_SENSORS_VIA686A is not set | 806 | # CONFIG_SENSORS_VIA686A is not set |
799 | # CONFIG_SENSORS_VT1211 is not set | 807 | # CONFIG_SENSORS_VT1211 is not set |
800 | # CONFIG_SENSORS_VT8231 is not set | 808 | # CONFIG_SENSORS_VT8231 is not set |
@@ -806,29 +814,18 @@ CONFIG_HWMON=y | |||
806 | # CONFIG_SENSORS_W83627HF is not set | 814 | # CONFIG_SENSORS_W83627HF is not set |
807 | # CONFIG_SENSORS_W83627EHF is not set | 815 | # CONFIG_SENSORS_W83627EHF is not set |
808 | # CONFIG_HWMON_DEBUG_CHIP is not set | 816 | # CONFIG_HWMON_DEBUG_CHIP is not set |
809 | CONFIG_MISC_DEVICES=y | 817 | # CONFIG_WATCHDOG is not set |
810 | # CONFIG_PHANTOM is not set | ||
811 | # CONFIG_EEPROM_93CX6 is not set | ||
812 | # CONFIG_SGI_IOC4 is not set | ||
813 | # CONFIG_TIFM_CORE is not set | ||
814 | |||
815 | # | ||
816 | # Multifunction device drivers | ||
817 | # | ||
818 | # CONFIG_MFD_SM501 is not set | ||
819 | |||
820 | # | ||
821 | # LED devices | ||
822 | # | ||
823 | # CONFIG_NEW_LEDS is not set | ||
824 | 818 | ||
825 | # | 819 | # |
826 | # LED drivers | 820 | # Sonics Silicon Backplane |
827 | # | 821 | # |
822 | CONFIG_SSB_POSSIBLE=y | ||
823 | # CONFIG_SSB is not set | ||
828 | 824 | ||
829 | # | 825 | # |
830 | # LED Triggers | 826 | # Multifunction device drivers |
831 | # | 827 | # |
828 | # CONFIG_MFD_SM501 is not set | ||
832 | 829 | ||
833 | # | 830 | # |
834 | # Multimedia devices | 831 | # Multimedia devices |
@@ -840,14 +837,16 @@ CONFIG_DAB=y | |||
840 | # | 837 | # |
841 | # Graphics support | 838 | # Graphics support |
842 | # | 839 | # |
840 | # CONFIG_DRM is not set | ||
841 | # CONFIG_VGASTATE is not set | ||
842 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
843 | # CONFIG_FB is not set | ||
843 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 844 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
844 | 845 | ||
845 | # | 846 | # |
846 | # Display device support | 847 | # Display device support |
847 | # | 848 | # |
848 | # CONFIG_DISPLAY_SUPPORT is not set | 849 | # CONFIG_DISPLAY_SUPPORT is not set |
849 | # CONFIG_VGASTATE is not set | ||
850 | # CONFIG_FB is not set | ||
851 | 850 | ||
852 | # | 851 | # |
853 | # Console display driver support | 852 | # Console display driver support |
@@ -862,6 +861,7 @@ CONFIG_DUMMY_CONSOLE=y | |||
862 | CONFIG_HID_SUPPORT=y | 861 | CONFIG_HID_SUPPORT=y |
863 | CONFIG_HID=y | 862 | CONFIG_HID=y |
864 | # CONFIG_HID_DEBUG is not set | 863 | # CONFIG_HID_DEBUG is not set |
864 | # CONFIG_HIDRAW is not set | ||
865 | CONFIG_USB_SUPPORT=y | 865 | CONFIG_USB_SUPPORT=y |
866 | CONFIG_USB_ARCH_HAS_HCD=y | 866 | CONFIG_USB_ARCH_HAS_HCD=y |
867 | CONFIG_USB_ARCH_HAS_OHCI=y | 867 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -877,16 +877,15 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
877 | # | 877 | # |
878 | # CONFIG_USB_GADGET is not set | 878 | # CONFIG_USB_GADGET is not set |
879 | # CONFIG_MMC is not set | 879 | # CONFIG_MMC is not set |
880 | 880 | # CONFIG_NEW_LEDS is not set | |
881 | # | ||
882 | # Real Time Clock | ||
883 | # | ||
884 | CONFIG_RTC_LIB=y | 881 | CONFIG_RTC_LIB=y |
885 | # CONFIG_RTC_CLASS is not set | 882 | # CONFIG_RTC_CLASS is not set |
883 | CONFIG_DMADEVICES=y | ||
886 | 884 | ||
887 | # | 885 | # |
888 | # DMA Engine support | 886 | # DMA Devices |
889 | # | 887 | # |
888 | CONFIG_INTEL_IOP_ADMA=y | ||
890 | CONFIG_DMA_ENGINE=y | 889 | CONFIG_DMA_ENGINE=y |
891 | 890 | ||
892 | # | 891 | # |
@@ -895,12 +894,6 @@ CONFIG_DMA_ENGINE=y | |||
895 | # CONFIG_NET_DMA is not set | 894 | # CONFIG_NET_DMA is not set |
896 | 895 | ||
897 | # | 896 | # |
898 | # DMA Devices | ||
899 | # | ||
900 | # CONFIG_INTEL_IOATDMA is not set | ||
901 | CONFIG_INTEL_IOP_ADMA=y | ||
902 | |||
903 | # | ||
904 | # File systems | 897 | # File systems |
905 | # | 898 | # |
906 | CONFIG_EXT2_FS=y | 899 | CONFIG_EXT2_FS=y |
@@ -912,7 +905,6 @@ CONFIG_EXT3_FS_XATTR=y | |||
912 | # CONFIG_EXT3_FS_SECURITY is not set | 905 | # CONFIG_EXT3_FS_SECURITY is not set |
913 | # CONFIG_EXT4DEV_FS is not set | 906 | # CONFIG_EXT4DEV_FS is not set |
914 | CONFIG_JBD=y | 907 | CONFIG_JBD=y |
915 | # CONFIG_JBD_DEBUG is not set | ||
916 | CONFIG_FS_MBCACHE=y | 908 | CONFIG_FS_MBCACHE=y |
917 | # CONFIG_REISERFS_FS is not set | 909 | # CONFIG_REISERFS_FS is not set |
918 | # CONFIG_JFS_FS is not set | 910 | # CONFIG_JFS_FS is not set |
@@ -952,7 +944,6 @@ CONFIG_SYSFS=y | |||
952 | CONFIG_TMPFS=y | 944 | CONFIG_TMPFS=y |
953 | # CONFIG_TMPFS_POSIX_ACL is not set | 945 | # CONFIG_TMPFS_POSIX_ACL is not set |
954 | # CONFIG_HUGETLB_PAGE is not set | 946 | # CONFIG_HUGETLB_PAGE is not set |
955 | CONFIG_RAMFS=y | ||
956 | # CONFIG_CONFIGFS_FS is not set | 947 | # CONFIG_CONFIGFS_FS is not set |
957 | 948 | ||
958 | # | 949 | # |
@@ -969,10 +960,12 @@ CONFIG_ECRYPT_FS=y | |||
969 | CONFIG_JFFS2_FS=y | 960 | CONFIG_JFFS2_FS=y |
970 | CONFIG_JFFS2_FS_DEBUG=0 | 961 | CONFIG_JFFS2_FS_DEBUG=0 |
971 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 962 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
963 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
972 | # CONFIG_JFFS2_SUMMARY is not set | 964 | # CONFIG_JFFS2_SUMMARY is not set |
973 | # CONFIG_JFFS2_FS_XATTR is not set | 965 | # CONFIG_JFFS2_FS_XATTR is not set |
974 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | 966 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set |
975 | CONFIG_JFFS2_ZLIB=y | 967 | CONFIG_JFFS2_ZLIB=y |
968 | # CONFIG_JFFS2_LZO is not set | ||
976 | CONFIG_JFFS2_RTIME=y | 969 | CONFIG_JFFS2_RTIME=y |
977 | # CONFIG_JFFS2_RUBIN is not set | 970 | # CONFIG_JFFS2_RUBIN is not set |
978 | CONFIG_CRAMFS=y | 971 | CONFIG_CRAMFS=y |
@@ -981,10 +974,7 @@ CONFIG_CRAMFS=y | |||
981 | # CONFIG_QNX4FS_FS is not set | 974 | # CONFIG_QNX4FS_FS is not set |
982 | # CONFIG_SYSV_FS is not set | 975 | # CONFIG_SYSV_FS is not set |
983 | # CONFIG_UFS_FS is not set | 976 | # CONFIG_UFS_FS is not set |
984 | 977 | CONFIG_NETWORK_FILESYSTEMS=y | |
985 | # | ||
986 | # Network File Systems | ||
987 | # | ||
988 | CONFIG_NFS_FS=y | 978 | CONFIG_NFS_FS=y |
989 | CONFIG_NFS_V3=y | 979 | CONFIG_NFS_V3=y |
990 | # CONFIG_NFS_V3_ACL is not set | 980 | # CONFIG_NFS_V3_ACL is not set |
@@ -1037,10 +1027,6 @@ CONFIG_MSDOS_PARTITION=y | |||
1037 | # CONFIG_KARMA_PARTITION is not set | 1027 | # CONFIG_KARMA_PARTITION is not set |
1038 | # CONFIG_EFI_PARTITION is not set | 1028 | # CONFIG_EFI_PARTITION is not set |
1039 | # CONFIG_SYSV68_PARTITION is not set | 1029 | # CONFIG_SYSV68_PARTITION is not set |
1040 | |||
1041 | # | ||
1042 | # Native Language Support | ||
1043 | # | ||
1044 | CONFIG_NLS=y | 1030 | CONFIG_NLS=y |
1045 | CONFIG_NLS_DEFAULT="iso8859-1" | 1031 | CONFIG_NLS_DEFAULT="iso8859-1" |
1046 | # CONFIG_NLS_CODEPAGE_437 is not set | 1032 | # CONFIG_NLS_CODEPAGE_437 is not set |
@@ -1081,21 +1067,16 @@ CONFIG_NLS_DEFAULT="iso8859-1" | |||
1081 | # CONFIG_NLS_KOI8_R is not set | 1067 | # CONFIG_NLS_KOI8_R is not set |
1082 | # CONFIG_NLS_KOI8_U is not set | 1068 | # CONFIG_NLS_KOI8_U is not set |
1083 | # CONFIG_NLS_UTF8 is not set | 1069 | # CONFIG_NLS_UTF8 is not set |
1084 | |||
1085 | # | ||
1086 | # Distributed Lock Manager | ||
1087 | # | ||
1088 | # CONFIG_DLM is not set | 1070 | # CONFIG_DLM is not set |
1089 | 1071 | CONFIG_INSTRUMENTATION=y | |
1090 | # | ||
1091 | # Profiling support | ||
1092 | # | ||
1093 | # CONFIG_PROFILING is not set | 1072 | # CONFIG_PROFILING is not set |
1073 | # CONFIG_MARKERS is not set | ||
1094 | 1074 | ||
1095 | # | 1075 | # |
1096 | # Kernel hacking | 1076 | # Kernel hacking |
1097 | # | 1077 | # |
1098 | # CONFIG_PRINTK_TIME is not set | 1078 | # CONFIG_PRINTK_TIME is not set |
1079 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1099 | CONFIG_ENABLE_MUST_CHECK=y | 1080 | CONFIG_ENABLE_MUST_CHECK=y |
1100 | # CONFIG_MAGIC_SYSRQ is not set | 1081 | # CONFIG_MAGIC_SYSRQ is not set |
1101 | # CONFIG_UNUSED_SYMBOLS is not set | 1082 | # CONFIG_UNUSED_SYMBOLS is not set |
@@ -1104,6 +1085,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1104 | # CONFIG_DEBUG_KERNEL is not set | 1085 | # CONFIG_DEBUG_KERNEL is not set |
1105 | CONFIG_DEBUG_BUGVERBOSE=y | 1086 | CONFIG_DEBUG_BUGVERBOSE=y |
1106 | CONFIG_FRAME_POINTER=y | 1087 | CONFIG_FRAME_POINTER=y |
1088 | # CONFIG_SAMPLES is not set | ||
1107 | CONFIG_DEBUG_USER=y | 1089 | CONFIG_DEBUG_USER=y |
1108 | 1090 | ||
1109 | # | 1091 | # |
@@ -1112,6 +1094,7 @@ CONFIG_DEBUG_USER=y | |||
1112 | CONFIG_KEYS=y | 1094 | CONFIG_KEYS=y |
1113 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | 1095 | CONFIG_KEYS_DEBUG_PROC_KEYS=y |
1114 | # CONFIG_SECURITY is not set | 1096 | # CONFIG_SECURITY is not set |
1097 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1115 | CONFIG_XOR_BLOCKS=y | 1098 | CONFIG_XOR_BLOCKS=y |
1116 | CONFIG_ASYNC_CORE=y | 1099 | CONFIG_ASYNC_CORE=y |
1117 | CONFIG_ASYNC_MEMCPY=y | 1100 | CONFIG_ASYNC_MEMCPY=y |
@@ -1136,6 +1119,7 @@ CONFIG_CRYPTO_ECB=y | |||
1136 | CONFIG_CRYPTO_CBC=y | 1119 | CONFIG_CRYPTO_CBC=y |
1137 | CONFIG_CRYPTO_PCBC=m | 1120 | CONFIG_CRYPTO_PCBC=m |
1138 | CONFIG_CRYPTO_LRW=y | 1121 | CONFIG_CRYPTO_LRW=y |
1122 | # CONFIG_CRYPTO_XTS is not set | ||
1139 | # CONFIG_CRYPTO_CRYPTD is not set | 1123 | # CONFIG_CRYPTO_CRYPTD is not set |
1140 | CONFIG_CRYPTO_DES=y | 1124 | CONFIG_CRYPTO_DES=y |
1141 | # CONFIG_CRYPTO_FCRYPT is not set | 1125 | # CONFIG_CRYPTO_FCRYPT is not set |
@@ -1150,11 +1134,13 @@ CONFIG_CRYPTO_TEA=y | |||
1150 | CONFIG_CRYPTO_ARC4=y | 1134 | CONFIG_CRYPTO_ARC4=y |
1151 | CONFIG_CRYPTO_KHAZAD=y | 1135 | CONFIG_CRYPTO_KHAZAD=y |
1152 | CONFIG_CRYPTO_ANUBIS=y | 1136 | CONFIG_CRYPTO_ANUBIS=y |
1137 | # CONFIG_CRYPTO_SEED is not set | ||
1153 | CONFIG_CRYPTO_DEFLATE=y | 1138 | CONFIG_CRYPTO_DEFLATE=y |
1154 | CONFIG_CRYPTO_MICHAEL_MIC=y | 1139 | CONFIG_CRYPTO_MICHAEL_MIC=y |
1155 | CONFIG_CRYPTO_CRC32C=y | 1140 | CONFIG_CRYPTO_CRC32C=y |
1156 | # CONFIG_CRYPTO_CAMELLIA is not set | 1141 | # CONFIG_CRYPTO_CAMELLIA is not set |
1157 | # CONFIG_CRYPTO_TEST is not set | 1142 | # CONFIG_CRYPTO_TEST is not set |
1143 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1158 | CONFIG_CRYPTO_HW=y | 1144 | CONFIG_CRYPTO_HW=y |
1159 | 1145 | ||
1160 | # | 1146 | # |
diff --git a/arch/arm/configs/iop32x_defconfig b/arch/arm/configs/iop32x_defconfig index 027aef22b4d1..83f40d4041a6 100644 --- a/arch/arm/configs/iop32x_defconfig +++ b/arch/arm/configs/iop32x_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.22 | 3 | # Linux kernel version: 2.6.24-rc5 |
4 | # Thu Jul 19 16:00:36 2007 | 4 | # Wed Dec 12 15:49:08 2007 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
@@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 | |||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
27 | 27 | ||
28 | # | 28 | # |
29 | # Code maturity level options | 29 | # General setup |
30 | # | 30 | # |
31 | CONFIG_EXPERIMENTAL=y | 31 | CONFIG_EXPERIMENTAL=y |
32 | CONFIG_BROKEN_ON_SMP=y | 32 | CONFIG_BROKEN_ON_SMP=y |
33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
34 | |||
35 | # | ||
36 | # General setup | ||
37 | # | ||
38 | CONFIG_LOCALVERSION="" | 34 | CONFIG_LOCALVERSION="" |
39 | CONFIG_LOCALVERSION_AUTO=y | 35 | CONFIG_LOCALVERSION_AUTO=y |
40 | CONFIG_SWAP=y | 36 | CONFIG_SWAP=y |
@@ -45,9 +41,14 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
45 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 41 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
46 | # CONFIG_TASKSTATS is not set | 42 | # CONFIG_TASKSTATS is not set |
47 | # CONFIG_USER_NS is not set | 43 | # CONFIG_USER_NS is not set |
44 | # CONFIG_PID_NS is not set | ||
48 | # CONFIG_AUDIT is not set | 45 | # CONFIG_AUDIT is not set |
49 | # CONFIG_IKCONFIG is not set | 46 | # CONFIG_IKCONFIG is not set |
50 | CONFIG_LOG_BUF_SHIFT=14 | 47 | CONFIG_LOG_BUF_SHIFT=14 |
48 | # CONFIG_CGROUPS is not set | ||
49 | CONFIG_FAIR_GROUP_SCHED=y | ||
50 | CONFIG_FAIR_USER_SCHED=y | ||
51 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
51 | CONFIG_SYSFS_DEPRECATED=y | 52 | CONFIG_SYSFS_DEPRECATED=y |
52 | # CONFIG_RELAY is not set | 53 | # CONFIG_RELAY is not set |
53 | CONFIG_BLK_DEV_INITRD=y | 54 | CONFIG_BLK_DEV_INITRD=y |
@@ -69,7 +70,6 @@ CONFIG_FUTEX=y | |||
69 | CONFIG_ANON_INODES=y | 70 | CONFIG_ANON_INODES=y |
70 | CONFIG_EPOLL=y | 71 | CONFIG_EPOLL=y |
71 | CONFIG_SIGNALFD=y | 72 | CONFIG_SIGNALFD=y |
72 | CONFIG_TIMERFD=y | ||
73 | CONFIG_EVENTFD=y | 73 | CONFIG_EVENTFD=y |
74 | CONFIG_SHMEM=y | 74 | CONFIG_SHMEM=y |
75 | CONFIG_VM_EVENT_COUNTERS=y | 75 | CONFIG_VM_EVENT_COUNTERS=y |
@@ -130,6 +130,7 @@ CONFIG_ARCH_IOP32X=y | |||
130 | # CONFIG_ARCH_L7200 is not set | 130 | # CONFIG_ARCH_L7200 is not set |
131 | # CONFIG_ARCH_KS8695 is not set | 131 | # CONFIG_ARCH_KS8695 is not set |
132 | # CONFIG_ARCH_NS9XXX is not set | 132 | # CONFIG_ARCH_NS9XXX is not set |
133 | # CONFIG_ARCH_MXC is not set | ||
133 | # CONFIG_ARCH_PNX4008 is not set | 134 | # CONFIG_ARCH_PNX4008 is not set |
134 | # CONFIG_ARCH_PXA is not set | 135 | # CONFIG_ARCH_PXA is not set |
135 | # CONFIG_ARCH_RPC is not set | 136 | # CONFIG_ARCH_RPC is not set |
@@ -153,6 +154,15 @@ CONFIG_ARCH_IQ80321=y | |||
153 | CONFIG_ARCH_IQ31244=y | 154 | CONFIG_ARCH_IQ31244=y |
154 | CONFIG_MACH_N2100=y | 155 | CONFIG_MACH_N2100=y |
155 | CONFIG_IOP3XX_ATU=y | 156 | CONFIG_IOP3XX_ATU=y |
157 | # CONFIG_MACH_EM7210 is not set | ||
158 | |||
159 | # | ||
160 | # Boot options | ||
161 | # | ||
162 | |||
163 | # | ||
164 | # Power management | ||
165 | # | ||
156 | CONFIG_PLAT_IOP=y | 166 | CONFIG_PLAT_IOP=y |
157 | 167 | ||
158 | # | 168 | # |
@@ -182,11 +192,8 @@ CONFIG_XSCALE_PMU=y | |||
182 | CONFIG_PCI=y | 192 | CONFIG_PCI=y |
183 | CONFIG_PCI_SYSCALL=y | 193 | CONFIG_PCI_SYSCALL=y |
184 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 194 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
195 | CONFIG_PCI_LEGACY=y | ||
185 | # CONFIG_PCI_DEBUG is not set | 196 | # CONFIG_PCI_DEBUG is not set |
186 | |||
187 | # | ||
188 | # PCCARD (PCMCIA/CardBus) support | ||
189 | # | ||
190 | # CONFIG_PCCARD is not set | 197 | # CONFIG_PCCARD is not set |
191 | 198 | ||
192 | # | 199 | # |
@@ -205,6 +212,7 @@ CONFIG_FLATMEM_MANUAL=y | |||
205 | CONFIG_FLATMEM=y | 212 | CONFIG_FLATMEM=y |
206 | CONFIG_FLAT_NODE_MEM_MAP=y | 213 | CONFIG_FLAT_NODE_MEM_MAP=y |
207 | # CONFIG_SPARSEMEM_STATIC is not set | 214 | # CONFIG_SPARSEMEM_STATIC is not set |
215 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
208 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 216 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
209 | # CONFIG_RESOURCES_64BIT is not set | 217 | # CONFIG_RESOURCES_64BIT is not set |
210 | CONFIG_ZONE_DMA_FLAG=1 | 218 | CONFIG_ZONE_DMA_FLAG=1 |
@@ -244,6 +252,7 @@ CONFIG_BINFMT_AOUT=y | |||
244 | # Power management options | 252 | # Power management options |
245 | # | 253 | # |
246 | # CONFIG_PM is not set | 254 | # CONFIG_PM is not set |
255 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
247 | 256 | ||
248 | # | 257 | # |
249 | # Networking | 258 | # Networking |
@@ -282,6 +291,7 @@ CONFIG_IP_PNP_BOOTP=y | |||
282 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 291 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
283 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 292 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
284 | CONFIG_INET_XFRM_MODE_BEET=y | 293 | CONFIG_INET_XFRM_MODE_BEET=y |
294 | # CONFIG_INET_LRO is not set | ||
285 | CONFIG_INET_DIAG=y | 295 | CONFIG_INET_DIAG=y |
286 | CONFIG_INET_TCP_DIAG=y | 296 | CONFIG_INET_TCP_DIAG=y |
287 | # CONFIG_TCP_CONG_ADVANCED is not set | 297 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -321,10 +331,6 @@ CONFIG_IPV6=y | |||
321 | # CONFIG_LAPB is not set | 331 | # CONFIG_LAPB is not set |
322 | # CONFIG_ECONET is not set | 332 | # CONFIG_ECONET is not set |
323 | # CONFIG_WAN_ROUTER is not set | 333 | # CONFIG_WAN_ROUTER is not set |
324 | |||
325 | # | ||
326 | # QoS and/or fair queueing | ||
327 | # | ||
328 | # CONFIG_NET_SCHED is not set | 334 | # CONFIG_NET_SCHED is not set |
329 | 335 | ||
330 | # | 336 | # |
@@ -353,6 +359,7 @@ CONFIG_IPV6=y | |||
353 | # | 359 | # |
354 | # Generic Driver Options | 360 | # Generic Driver Options |
355 | # | 361 | # |
362 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
356 | CONFIG_STANDALONE=y | 363 | CONFIG_STANDALONE=y |
357 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 364 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
358 | # CONFIG_FW_LOADER is not set | 365 | # CONFIG_FW_LOADER is not set |
@@ -382,6 +389,7 @@ CONFIG_MTD_BLOCK=y | |||
382 | # CONFIG_INFTL is not set | 389 | # CONFIG_INFTL is not set |
383 | # CONFIG_RFD_FTL is not set | 390 | # CONFIG_RFD_FTL is not set |
384 | # CONFIG_SSFDC is not set | 391 | # CONFIG_SSFDC is not set |
392 | # CONFIG_MTD_OOPS is not set | ||
385 | 393 | ||
386 | # | 394 | # |
387 | # RAM/ROM/Flash chip drivers | 395 | # RAM/ROM/Flash chip drivers |
@@ -417,6 +425,7 @@ CONFIG_MTD_PHYSMAP_START=0x0 | |||
417 | CONFIG_MTD_PHYSMAP_LEN=0x0 | 425 | CONFIG_MTD_PHYSMAP_LEN=0x0 |
418 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 | 426 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 |
419 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 427 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
428 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
420 | # CONFIG_MTD_PLATRAM is not set | 429 | # CONFIG_MTD_PLATRAM is not set |
421 | 430 | ||
422 | # | 431 | # |
@@ -459,6 +468,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 | |||
459 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 468 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 |
460 | # CONFIG_CDROM_PKTCDVD is not set | 469 | # CONFIG_CDROM_PKTCDVD is not set |
461 | # CONFIG_ATA_OVER_ETH is not set | 470 | # CONFIG_ATA_OVER_ETH is not set |
471 | CONFIG_MISC_DEVICES=y | ||
472 | # CONFIG_PHANTOM is not set | ||
473 | # CONFIG_EEPROM_93CX6 is not set | ||
474 | # CONFIG_SGI_IOC4 is not set | ||
475 | # CONFIG_TIFM_CORE is not set | ||
462 | # CONFIG_IDE is not set | 476 | # CONFIG_IDE is not set |
463 | 477 | ||
464 | # | 478 | # |
@@ -496,12 +510,9 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
496 | # CONFIG_SCSI_SPI_ATTRS is not set | 510 | # CONFIG_SCSI_SPI_ATTRS is not set |
497 | # CONFIG_SCSI_FC_ATTRS is not set | 511 | # CONFIG_SCSI_FC_ATTRS is not set |
498 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 512 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
499 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
500 | # CONFIG_SCSI_SAS_LIBSAS is not set | 513 | # CONFIG_SCSI_SAS_LIBSAS is not set |
501 | 514 | # CONFIG_SCSI_SRP_ATTRS is not set | |
502 | # | 515 | CONFIG_SCSI_LOWLEVEL=y |
503 | # SCSI low-level drivers | ||
504 | # | ||
505 | # CONFIG_ISCSI_TCP is not set | 516 | # CONFIG_ISCSI_TCP is not set |
506 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 517 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
507 | # CONFIG_SCSI_3W_9XXX is not set | 518 | # CONFIG_SCSI_3W_9XXX is not set |
@@ -512,6 +523,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
512 | # CONFIG_SCSI_AIC79XX is not set | 523 | # CONFIG_SCSI_AIC79XX is not set |
513 | # CONFIG_SCSI_AIC94XX is not set | 524 | # CONFIG_SCSI_AIC94XX is not set |
514 | # CONFIG_SCSI_DPT_I2O is not set | 525 | # CONFIG_SCSI_DPT_I2O is not set |
526 | # CONFIG_SCSI_ADVANSYS is not set | ||
515 | # CONFIG_SCSI_ARCMSR is not set | 527 | # CONFIG_SCSI_ARCMSR is not set |
516 | # CONFIG_MEGARAID_NEWGEN is not set | 528 | # CONFIG_MEGARAID_NEWGEN is not set |
517 | # CONFIG_MEGARAID_LEGACY is not set | 529 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -576,6 +588,7 @@ CONFIG_SATA_VITESSE=y | |||
576 | # CONFIG_PATA_OLDPIIX is not set | 588 | # CONFIG_PATA_OLDPIIX is not set |
577 | # CONFIG_PATA_NETCELL is not set | 589 | # CONFIG_PATA_NETCELL is not set |
578 | # CONFIG_PATA_NS87410 is not set | 590 | # CONFIG_PATA_NS87410 is not set |
591 | # CONFIG_PATA_NS87415 is not set | ||
579 | # CONFIG_PATA_OPTI is not set | 592 | # CONFIG_PATA_OPTI is not set |
580 | # CONFIG_PATA_OPTIDMA is not set | 593 | # CONFIG_PATA_OPTIDMA is not set |
581 | # CONFIG_PATA_PDC_OLD is not set | 594 | # CONFIG_PATA_PDC_OLD is not set |
@@ -606,14 +619,8 @@ CONFIG_BLK_DEV_DM=y | |||
606 | # CONFIG_DM_ZERO is not set | 619 | # CONFIG_DM_ZERO is not set |
607 | # CONFIG_DM_MULTIPATH is not set | 620 | # CONFIG_DM_MULTIPATH is not set |
608 | # CONFIG_DM_DELAY is not set | 621 | # CONFIG_DM_DELAY is not set |
609 | 622 | # CONFIG_DM_UEVENT is not set | |
610 | # | ||
611 | # Fusion MPT device support | ||
612 | # | ||
613 | # CONFIG_FUSION is not set | 623 | # CONFIG_FUSION is not set |
614 | # CONFIG_FUSION_SPI is not set | ||
615 | # CONFIG_FUSION_FC is not set | ||
616 | # CONFIG_FUSION_SAS is not set | ||
617 | 624 | ||
618 | # | 625 | # |
619 | # IEEE 1394 (FireWire) support | 626 | # IEEE 1394 (FireWire) support |
@@ -628,6 +635,8 @@ CONFIG_NETDEVICES=y | |||
628 | # CONFIG_MACVLAN is not set | 635 | # CONFIG_MACVLAN is not set |
629 | # CONFIG_EQUALIZER is not set | 636 | # CONFIG_EQUALIZER is not set |
630 | # CONFIG_TUN is not set | 637 | # CONFIG_TUN is not set |
638 | # CONFIG_VETH is not set | ||
639 | # CONFIG_IP1000 is not set | ||
631 | # CONFIG_ARCNET is not set | 640 | # CONFIG_ARCNET is not set |
632 | # CONFIG_PHYLIB is not set | 641 | # CONFIG_PHYLIB is not set |
633 | CONFIG_NET_ETHERNET=y | 642 | CONFIG_NET_ETHERNET=y |
@@ -641,13 +650,16 @@ CONFIG_MII=y | |||
641 | # CONFIG_DM9000 is not set | 650 | # CONFIG_DM9000 is not set |
642 | # CONFIG_NET_TULIP is not set | 651 | # CONFIG_NET_TULIP is not set |
643 | # CONFIG_HP100 is not set | 652 | # CONFIG_HP100 is not set |
653 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
654 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
655 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
656 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
644 | CONFIG_NET_PCI=y | 657 | CONFIG_NET_PCI=y |
645 | # CONFIG_PCNET32 is not set | 658 | # CONFIG_PCNET32 is not set |
646 | # CONFIG_AMD8111_ETH is not set | 659 | # CONFIG_AMD8111_ETH is not set |
647 | # CONFIG_ADAPTEC_STARFIRE is not set | 660 | # CONFIG_ADAPTEC_STARFIRE is not set |
648 | # CONFIG_B44 is not set | 661 | # CONFIG_B44 is not set |
649 | # CONFIG_FORCEDETH is not set | 662 | # CONFIG_FORCEDETH is not set |
650 | # CONFIG_DGRS is not set | ||
651 | # CONFIG_EEPRO100 is not set | 663 | # CONFIG_EEPRO100 is not set |
652 | CONFIG_E100=y | 664 | CONFIG_E100=y |
653 | # CONFIG_FEALNX is not set | 665 | # CONFIG_FEALNX is not set |
@@ -667,6 +679,7 @@ CONFIG_NETDEV_1000=y | |||
667 | CONFIG_E1000=y | 679 | CONFIG_E1000=y |
668 | CONFIG_E1000_NAPI=y | 680 | CONFIG_E1000_NAPI=y |
669 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | 681 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set |
682 | # CONFIG_E1000E is not set | ||
670 | # CONFIG_NS83820 is not set | 683 | # CONFIG_NS83820 is not set |
671 | # CONFIG_HAMACHI is not set | 684 | # CONFIG_HAMACHI is not set |
672 | # CONFIG_YELLOWFIN is not set | 685 | # CONFIG_YELLOWFIN is not set |
@@ -675,6 +688,7 @@ CONFIG_R8169=y | |||
675 | # CONFIG_SIS190 is not set | 688 | # CONFIG_SIS190 is not set |
676 | # CONFIG_SKGE is not set | 689 | # CONFIG_SKGE is not set |
677 | # CONFIG_SKY2 is not set | 690 | # CONFIG_SKY2 is not set |
691 | # CONFIG_SK98LIN is not set | ||
678 | # CONFIG_VIA_VELOCITY is not set | 692 | # CONFIG_VIA_VELOCITY is not set |
679 | # CONFIG_TIGON3 is not set | 693 | # CONFIG_TIGON3 is not set |
680 | # CONFIG_BNX2 is not set | 694 | # CONFIG_BNX2 is not set |
@@ -683,11 +697,14 @@ CONFIG_R8169=y | |||
683 | CONFIG_NETDEV_10000=y | 697 | CONFIG_NETDEV_10000=y |
684 | # CONFIG_CHELSIO_T1 is not set | 698 | # CONFIG_CHELSIO_T1 is not set |
685 | # CONFIG_CHELSIO_T3 is not set | 699 | # CONFIG_CHELSIO_T3 is not set |
700 | # CONFIG_IXGBE is not set | ||
686 | # CONFIG_IXGB is not set | 701 | # CONFIG_IXGB is not set |
687 | # CONFIG_S2IO is not set | 702 | # CONFIG_S2IO is not set |
688 | # CONFIG_MYRI10GE is not set | 703 | # CONFIG_MYRI10GE is not set |
689 | # CONFIG_NETXEN_NIC is not set | 704 | # CONFIG_NETXEN_NIC is not set |
705 | # CONFIG_NIU is not set | ||
690 | # CONFIG_MLX4_CORE is not set | 706 | # CONFIG_MLX4_CORE is not set |
707 | # CONFIG_TEHUTI is not set | ||
691 | # CONFIG_TR is not set | 708 | # CONFIG_TR is not set |
692 | 709 | ||
693 | # | 710 | # |
@@ -703,7 +720,6 @@ CONFIG_NETDEV_10000=y | |||
703 | # CONFIG_USB_KAWETH is not set | 720 | # CONFIG_USB_KAWETH is not set |
704 | # CONFIG_USB_PEGASUS is not set | 721 | # CONFIG_USB_PEGASUS is not set |
705 | # CONFIG_USB_RTL8150 is not set | 722 | # CONFIG_USB_RTL8150 is not set |
706 | # CONFIG_USB_USBNET_MII is not set | ||
707 | # CONFIG_USB_USBNET is not set | 723 | # CONFIG_USB_USBNET is not set |
708 | # CONFIG_WAN is not set | 724 | # CONFIG_WAN is not set |
709 | # CONFIG_FDDI is not set | 725 | # CONFIG_FDDI is not set |
@@ -732,7 +748,6 @@ CONFIG_INPUT_MOUSEDEV=y | |||
732 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 748 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
733 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 749 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
734 | # CONFIG_INPUT_JOYDEV is not set | 750 | # CONFIG_INPUT_JOYDEV is not set |
735 | # CONFIG_INPUT_TSDEV is not set | ||
736 | # CONFIG_INPUT_EVDEV is not set | 751 | # CONFIG_INPUT_EVDEV is not set |
737 | # CONFIG_INPUT_EVBUG is not set | 752 | # CONFIG_INPUT_EVBUG is not set |
738 | 753 | ||
@@ -781,12 +796,10 @@ CONFIG_UNIX98_PTYS=y | |||
781 | CONFIG_LEGACY_PTYS=y | 796 | CONFIG_LEGACY_PTYS=y |
782 | CONFIG_LEGACY_PTY_COUNT=256 | 797 | CONFIG_LEGACY_PTY_COUNT=256 |
783 | # CONFIG_IPMI_HANDLER is not set | 798 | # CONFIG_IPMI_HANDLER is not set |
784 | # CONFIG_WATCHDOG is not set | ||
785 | CONFIG_HW_RANDOM=y | 799 | CONFIG_HW_RANDOM=y |
786 | # CONFIG_NVRAM is not set | 800 | # CONFIG_NVRAM is not set |
787 | # CONFIG_R3964 is not set | 801 | # CONFIG_R3964 is not set |
788 | # CONFIG_APPLICOM is not set | 802 | # CONFIG_APPLICOM is not set |
789 | # CONFIG_DRM is not set | ||
790 | # CONFIG_RAW_DRIVER is not set | 803 | # CONFIG_RAW_DRIVER is not set |
791 | # CONFIG_TCG_TPM is not set | 804 | # CONFIG_TCG_TPM is not set |
792 | CONFIG_DEVPORT=y | 805 | CONFIG_DEVPORT=y |
@@ -852,9 +865,9 @@ CONFIG_I2C_IOP3XX=y | |||
852 | # CONFIG_SPI is not set | 865 | # CONFIG_SPI is not set |
853 | # CONFIG_SPI_MASTER is not set | 866 | # CONFIG_SPI_MASTER is not set |
854 | # CONFIG_W1 is not set | 867 | # CONFIG_W1 is not set |
868 | # CONFIG_POWER_SUPPLY is not set | ||
855 | CONFIG_HWMON=y | 869 | CONFIG_HWMON=y |
856 | # CONFIG_HWMON_VID is not set | 870 | # CONFIG_HWMON_VID is not set |
857 | # CONFIG_SENSORS_ABITUGURU is not set | ||
858 | # CONFIG_SENSORS_AD7418 is not set | 871 | # CONFIG_SENSORS_AD7418 is not set |
859 | # CONFIG_SENSORS_ADM1021 is not set | 872 | # CONFIG_SENSORS_ADM1021 is not set |
860 | # CONFIG_SENSORS_ADM1025 is not set | 873 | # CONFIG_SENSORS_ADM1025 is not set |
@@ -862,12 +875,13 @@ CONFIG_HWMON=y | |||
862 | # CONFIG_SENSORS_ADM1029 is not set | 875 | # CONFIG_SENSORS_ADM1029 is not set |
863 | # CONFIG_SENSORS_ADM1031 is not set | 876 | # CONFIG_SENSORS_ADM1031 is not set |
864 | # CONFIG_SENSORS_ADM9240 is not set | 877 | # CONFIG_SENSORS_ADM9240 is not set |
865 | # CONFIG_SENSORS_ASB100 is not set | 878 | # CONFIG_SENSORS_ADT7470 is not set |
866 | # CONFIG_SENSORS_ATXP1 is not set | 879 | # CONFIG_SENSORS_ATXP1 is not set |
867 | # CONFIG_SENSORS_DS1621 is not set | 880 | # CONFIG_SENSORS_DS1621 is not set |
881 | # CONFIG_SENSORS_I5K_AMB is not set | ||
868 | # CONFIG_SENSORS_F71805F is not set | 882 | # CONFIG_SENSORS_F71805F is not set |
869 | # CONFIG_SENSORS_FSCHER is not set | 883 | # CONFIG_SENSORS_F71882FG is not set |
870 | # CONFIG_SENSORS_FSCPOS is not set | 884 | # CONFIG_SENSORS_F75375S is not set |
871 | # CONFIG_SENSORS_GL518SM is not set | 885 | # CONFIG_SENSORS_GL518SM is not set |
872 | # CONFIG_SENSORS_GL520SM is not set | 886 | # CONFIG_SENSORS_GL520SM is not set |
873 | # CONFIG_SENSORS_IT87 is not set | 887 | # CONFIG_SENSORS_IT87 is not set |
@@ -881,14 +895,17 @@ CONFIG_HWMON=y | |||
881 | # CONFIG_SENSORS_LM87 is not set | 895 | # CONFIG_SENSORS_LM87 is not set |
882 | # CONFIG_SENSORS_LM90 is not set | 896 | # CONFIG_SENSORS_LM90 is not set |
883 | # CONFIG_SENSORS_LM92 is not set | 897 | # CONFIG_SENSORS_LM92 is not set |
898 | # CONFIG_SENSORS_LM93 is not set | ||
884 | # CONFIG_SENSORS_MAX1619 is not set | 899 | # CONFIG_SENSORS_MAX1619 is not set |
885 | # CONFIG_SENSORS_MAX6650 is not set | 900 | # CONFIG_SENSORS_MAX6650 is not set |
886 | # CONFIG_SENSORS_PC87360 is not set | 901 | # CONFIG_SENSORS_PC87360 is not set |
887 | # CONFIG_SENSORS_PC87427 is not set | 902 | # CONFIG_SENSORS_PC87427 is not set |
888 | # CONFIG_SENSORS_SIS5595 is not set | 903 | # CONFIG_SENSORS_SIS5595 is not set |
904 | # CONFIG_SENSORS_DME1737 is not set | ||
889 | # CONFIG_SENSORS_SMSC47M1 is not set | 905 | # CONFIG_SENSORS_SMSC47M1 is not set |
890 | # CONFIG_SENSORS_SMSC47M192 is not set | 906 | # CONFIG_SENSORS_SMSC47M192 is not set |
891 | # CONFIG_SENSORS_SMSC47B397 is not set | 907 | # CONFIG_SENSORS_SMSC47B397 is not set |
908 | # CONFIG_SENSORS_THMC50 is not set | ||
892 | # CONFIG_SENSORS_VIA686A is not set | 909 | # CONFIG_SENSORS_VIA686A is not set |
893 | # CONFIG_SENSORS_VT1211 is not set | 910 | # CONFIG_SENSORS_VT1211 is not set |
894 | # CONFIG_SENSORS_VT8231 is not set | 911 | # CONFIG_SENSORS_VT8231 is not set |
@@ -900,29 +917,18 @@ CONFIG_HWMON=y | |||
900 | # CONFIG_SENSORS_W83627HF is not set | 917 | # CONFIG_SENSORS_W83627HF is not set |
901 | # CONFIG_SENSORS_W83627EHF is not set | 918 | # CONFIG_SENSORS_W83627EHF is not set |
902 | # CONFIG_HWMON_DEBUG_CHIP is not set | 919 | # CONFIG_HWMON_DEBUG_CHIP is not set |
903 | CONFIG_MISC_DEVICES=y | 920 | # CONFIG_WATCHDOG is not set |
904 | # CONFIG_PHANTOM is not set | ||
905 | # CONFIG_EEPROM_93CX6 is not set | ||
906 | # CONFIG_SGI_IOC4 is not set | ||
907 | # CONFIG_TIFM_CORE is not set | ||
908 | |||
909 | # | ||
910 | # Multifunction device drivers | ||
911 | # | ||
912 | # CONFIG_MFD_SM501 is not set | ||
913 | |||
914 | # | ||
915 | # LED devices | ||
916 | # | ||
917 | # CONFIG_NEW_LEDS is not set | ||
918 | 921 | ||
919 | # | 922 | # |
920 | # LED drivers | 923 | # Sonics Silicon Backplane |
921 | # | 924 | # |
925 | CONFIG_SSB_POSSIBLE=y | ||
926 | # CONFIG_SSB is not set | ||
922 | 927 | ||
923 | # | 928 | # |
924 | # LED Triggers | 929 | # Multifunction device drivers |
925 | # | 930 | # |
931 | # CONFIG_MFD_SM501 is not set | ||
926 | 932 | ||
927 | # | 933 | # |
928 | # Multimedia devices | 934 | # Multimedia devices |
@@ -935,14 +941,16 @@ CONFIG_DAB=y | |||
935 | # | 941 | # |
936 | # Graphics support | 942 | # Graphics support |
937 | # | 943 | # |
944 | # CONFIG_DRM is not set | ||
945 | # CONFIG_VGASTATE is not set | ||
946 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
947 | # CONFIG_FB is not set | ||
938 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 948 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
939 | 949 | ||
940 | # | 950 | # |
941 | # Display device support | 951 | # Display device support |
942 | # | 952 | # |
943 | # CONFIG_DISPLAY_SUPPORT is not set | 953 | # CONFIG_DISPLAY_SUPPORT is not set |
944 | # CONFIG_VGASTATE is not set | ||
945 | # CONFIG_FB is not set | ||
946 | 954 | ||
947 | # | 955 | # |
948 | # Console display driver support | 956 | # Console display driver support |
@@ -957,6 +965,7 @@ CONFIG_DUMMY_CONSOLE=y | |||
957 | CONFIG_HID_SUPPORT=y | 965 | CONFIG_HID_SUPPORT=y |
958 | CONFIG_HID=y | 966 | CONFIG_HID=y |
959 | # CONFIG_HID_DEBUG is not set | 967 | # CONFIG_HID_DEBUG is not set |
968 | # CONFIG_HIDRAW is not set | ||
960 | 969 | ||
961 | # | 970 | # |
962 | # USB Input Devices | 971 | # USB Input Devices |
@@ -1013,6 +1022,7 @@ CONFIG_USB_STORAGE=y | |||
1013 | # CONFIG_USB_STORAGE_DEBUG is not set | 1022 | # CONFIG_USB_STORAGE_DEBUG is not set |
1014 | # CONFIG_USB_STORAGE_DATAFAB is not set | 1023 | # CONFIG_USB_STORAGE_DATAFAB is not set |
1015 | # CONFIG_USB_STORAGE_FREECOM is not set | 1024 | # CONFIG_USB_STORAGE_FREECOM is not set |
1025 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1016 | # CONFIG_USB_STORAGE_DPCM is not set | 1026 | # CONFIG_USB_STORAGE_DPCM is not set |
1017 | # CONFIG_USB_STORAGE_USBAT is not set | 1027 | # CONFIG_USB_STORAGE_USBAT is not set |
1018 | # CONFIG_USB_STORAGE_SDDR09 is not set | 1028 | # CONFIG_USB_STORAGE_SDDR09 is not set |
@@ -1070,28 +1080,66 @@ CONFIG_USB_MON=y | |||
1070 | # | 1080 | # |
1071 | # CONFIG_USB_GADGET is not set | 1081 | # CONFIG_USB_GADGET is not set |
1072 | # CONFIG_MMC is not set | 1082 | # CONFIG_MMC is not set |
1083 | # CONFIG_NEW_LEDS is not set | ||
1084 | CONFIG_RTC_LIB=y | ||
1085 | CONFIG_RTC_CLASS=y | ||
1086 | CONFIG_RTC_HCTOSYS=y | ||
1087 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1088 | # CONFIG_RTC_DEBUG is not set | ||
1073 | 1089 | ||
1074 | # | 1090 | # |
1075 | # Real Time Clock | 1091 | # RTC interfaces |
1076 | # | 1092 | # |
1077 | CONFIG_RTC_LIB=y | 1093 | CONFIG_RTC_INTF_SYSFS=y |
1078 | # CONFIG_RTC_CLASS is not set | 1094 | CONFIG_RTC_INTF_PROC=y |
1095 | CONFIG_RTC_INTF_DEV=y | ||
1096 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1097 | # CONFIG_RTC_DRV_TEST is not set | ||
1079 | 1098 | ||
1080 | # | 1099 | # |
1081 | # DMA Engine support | 1100 | # I2C RTC drivers |
1082 | # | 1101 | # |
1083 | CONFIG_DMA_ENGINE=y | 1102 | # CONFIG_RTC_DRV_DS1307 is not set |
1103 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1104 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1105 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1106 | CONFIG_RTC_DRV_RS5C372=y | ||
1107 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1108 | # CONFIG_RTC_DRV_X1205 is not set | ||
1109 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1110 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1111 | # CONFIG_RTC_DRV_M41T80 is not set | ||
1084 | 1112 | ||
1085 | # | 1113 | # |
1086 | # DMA Clients | 1114 | # SPI RTC drivers |
1087 | # | 1115 | # |
1088 | CONFIG_NET_DMA=y | 1116 | |
1117 | # | ||
1118 | # Platform RTC drivers | ||
1119 | # | ||
1120 | # CONFIG_RTC_DRV_CMOS is not set | ||
1121 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1122 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1123 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1124 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1125 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1126 | # CONFIG_RTC_DRV_V3020 is not set | ||
1127 | |||
1128 | # | ||
1129 | # on-CPU RTC drivers | ||
1130 | # | ||
1131 | CONFIG_DMADEVICES=y | ||
1089 | 1132 | ||
1090 | # | 1133 | # |
1091 | # DMA Devices | 1134 | # DMA Devices |
1092 | # | 1135 | # |
1093 | # CONFIG_INTEL_IOATDMA is not set | ||
1094 | CONFIG_INTEL_IOP_ADMA=y | 1136 | CONFIG_INTEL_IOP_ADMA=y |
1137 | CONFIG_DMA_ENGINE=y | ||
1138 | |||
1139 | # | ||
1140 | # DMA Clients | ||
1141 | # | ||
1142 | CONFIG_NET_DMA=y | ||
1095 | 1143 | ||
1096 | # | 1144 | # |
1097 | # File systems | 1145 | # File systems |
@@ -1105,7 +1153,6 @@ CONFIG_EXT3_FS_XATTR=y | |||
1105 | # CONFIG_EXT3_FS_SECURITY is not set | 1153 | # CONFIG_EXT3_FS_SECURITY is not set |
1106 | # CONFIG_EXT4DEV_FS is not set | 1154 | # CONFIG_EXT4DEV_FS is not set |
1107 | CONFIG_JBD=y | 1155 | CONFIG_JBD=y |
1108 | # CONFIG_JBD_DEBUG is not set | ||
1109 | CONFIG_FS_MBCACHE=y | 1156 | CONFIG_FS_MBCACHE=y |
1110 | # CONFIG_REISERFS_FS is not set | 1157 | # CONFIG_REISERFS_FS is not set |
1111 | # CONFIG_JFS_FS is not set | 1158 | # CONFIG_JFS_FS is not set |
@@ -1145,7 +1192,6 @@ CONFIG_SYSFS=y | |||
1145 | CONFIG_TMPFS=y | 1192 | CONFIG_TMPFS=y |
1146 | # CONFIG_TMPFS_POSIX_ACL is not set | 1193 | # CONFIG_TMPFS_POSIX_ACL is not set |
1147 | # CONFIG_HUGETLB_PAGE is not set | 1194 | # CONFIG_HUGETLB_PAGE is not set |
1148 | CONFIG_RAMFS=y | ||
1149 | # CONFIG_CONFIGFS_FS is not set | 1195 | # CONFIG_CONFIGFS_FS is not set |
1150 | 1196 | ||
1151 | # | 1197 | # |
@@ -1162,10 +1208,12 @@ CONFIG_ECRYPT_FS=y | |||
1162 | CONFIG_JFFS2_FS=y | 1208 | CONFIG_JFFS2_FS=y |
1163 | CONFIG_JFFS2_FS_DEBUG=0 | 1209 | CONFIG_JFFS2_FS_DEBUG=0 |
1164 | CONFIG_JFFS2_FS_WRITEBUFFER=y | 1210 | CONFIG_JFFS2_FS_WRITEBUFFER=y |
1211 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1165 | # CONFIG_JFFS2_SUMMARY is not set | 1212 | # CONFIG_JFFS2_SUMMARY is not set |
1166 | # CONFIG_JFFS2_FS_XATTR is not set | 1213 | # CONFIG_JFFS2_FS_XATTR is not set |
1167 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | 1214 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set |
1168 | CONFIG_JFFS2_ZLIB=y | 1215 | CONFIG_JFFS2_ZLIB=y |
1216 | # CONFIG_JFFS2_LZO is not set | ||
1169 | CONFIG_JFFS2_RTIME=y | 1217 | CONFIG_JFFS2_RTIME=y |
1170 | # CONFIG_JFFS2_RUBIN is not set | 1218 | # CONFIG_JFFS2_RUBIN is not set |
1171 | CONFIG_CRAMFS=y | 1219 | CONFIG_CRAMFS=y |
@@ -1174,10 +1222,7 @@ CONFIG_CRAMFS=y | |||
1174 | # CONFIG_QNX4FS_FS is not set | 1222 | # CONFIG_QNX4FS_FS is not set |
1175 | # CONFIG_SYSV_FS is not set | 1223 | # CONFIG_SYSV_FS is not set |
1176 | # CONFIG_UFS_FS is not set | 1224 | # CONFIG_UFS_FS is not set |
1177 | 1225 | CONFIG_NETWORK_FILESYSTEMS=y | |
1178 | # | ||
1179 | # Network File Systems | ||
1180 | # | ||
1181 | CONFIG_NFS_FS=y | 1226 | CONFIG_NFS_FS=y |
1182 | CONFIG_NFS_V3=y | 1227 | CONFIG_NFS_V3=y |
1183 | # CONFIG_NFS_V3_ACL is not set | 1228 | # CONFIG_NFS_V3_ACL is not set |
@@ -1224,26 +1269,17 @@ CONFIG_MSDOS_PARTITION=y | |||
1224 | # CONFIG_KARMA_PARTITION is not set | 1269 | # CONFIG_KARMA_PARTITION is not set |
1225 | # CONFIG_EFI_PARTITION is not set | 1270 | # CONFIG_EFI_PARTITION is not set |
1226 | # CONFIG_SYSV68_PARTITION is not set | 1271 | # CONFIG_SYSV68_PARTITION is not set |
1227 | |||
1228 | # | ||
1229 | # Native Language Support | ||
1230 | # | ||
1231 | # CONFIG_NLS is not set | 1272 | # CONFIG_NLS is not set |
1232 | |||
1233 | # | ||
1234 | # Distributed Lock Manager | ||
1235 | # | ||
1236 | # CONFIG_DLM is not set | 1273 | # CONFIG_DLM is not set |
1237 | 1274 | CONFIG_INSTRUMENTATION=y | |
1238 | # | ||
1239 | # Profiling support | ||
1240 | # | ||
1241 | # CONFIG_PROFILING is not set | 1275 | # CONFIG_PROFILING is not set |
1276 | # CONFIG_MARKERS is not set | ||
1242 | 1277 | ||
1243 | # | 1278 | # |
1244 | # Kernel hacking | 1279 | # Kernel hacking |
1245 | # | 1280 | # |
1246 | # CONFIG_PRINTK_TIME is not set | 1281 | # CONFIG_PRINTK_TIME is not set |
1282 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1247 | CONFIG_ENABLE_MUST_CHECK=y | 1283 | CONFIG_ENABLE_MUST_CHECK=y |
1248 | CONFIG_MAGIC_SYSRQ=y | 1284 | CONFIG_MAGIC_SYSRQ=y |
1249 | # CONFIG_UNUSED_SYMBOLS is not set | 1285 | # CONFIG_UNUSED_SYMBOLS is not set |
@@ -1270,10 +1306,13 @@ CONFIG_DEBUG_BUGVERBOSE=y | |||
1270 | # CONFIG_DEBUG_INFO is not set | 1306 | # CONFIG_DEBUG_INFO is not set |
1271 | # CONFIG_DEBUG_VM is not set | 1307 | # CONFIG_DEBUG_VM is not set |
1272 | # CONFIG_DEBUG_LIST is not set | 1308 | # CONFIG_DEBUG_LIST is not set |
1309 | # CONFIG_DEBUG_SG is not set | ||
1273 | CONFIG_FRAME_POINTER=y | 1310 | CONFIG_FRAME_POINTER=y |
1274 | # CONFIG_FORCED_INLINING is not set | 1311 | # CONFIG_FORCED_INLINING is not set |
1312 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1275 | # CONFIG_RCU_TORTURE_TEST is not set | 1313 | # CONFIG_RCU_TORTURE_TEST is not set |
1276 | # CONFIG_FAULT_INJECTION is not set | 1314 | # CONFIG_FAULT_INJECTION is not set |
1315 | # CONFIG_SAMPLES is not set | ||
1277 | CONFIG_DEBUG_USER=y | 1316 | CONFIG_DEBUG_USER=y |
1278 | # CONFIG_DEBUG_ERRORS is not set | 1317 | # CONFIG_DEBUG_ERRORS is not set |
1279 | CONFIG_DEBUG_LL=y | 1318 | CONFIG_DEBUG_LL=y |
@@ -1285,6 +1324,7 @@ CONFIG_DEBUG_LL=y | |||
1285 | CONFIG_KEYS=y | 1324 | CONFIG_KEYS=y |
1286 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | 1325 | CONFIG_KEYS_DEBUG_PROC_KEYS=y |
1287 | # CONFIG_SECURITY is not set | 1326 | # CONFIG_SECURITY is not set |
1327 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1288 | CONFIG_XOR_BLOCKS=y | 1328 | CONFIG_XOR_BLOCKS=y |
1289 | CONFIG_ASYNC_CORE=y | 1329 | CONFIG_ASYNC_CORE=y |
1290 | CONFIG_ASYNC_MEMCPY=y | 1330 | CONFIG_ASYNC_MEMCPY=y |
@@ -1309,6 +1349,7 @@ CONFIG_CRYPTO_ECB=y | |||
1309 | CONFIG_CRYPTO_CBC=y | 1349 | CONFIG_CRYPTO_CBC=y |
1310 | CONFIG_CRYPTO_PCBC=m | 1350 | CONFIG_CRYPTO_PCBC=m |
1311 | CONFIG_CRYPTO_LRW=y | 1351 | CONFIG_CRYPTO_LRW=y |
1352 | # CONFIG_CRYPTO_XTS is not set | ||
1312 | # CONFIG_CRYPTO_CRYPTD is not set | 1353 | # CONFIG_CRYPTO_CRYPTD is not set |
1313 | CONFIG_CRYPTO_DES=y | 1354 | CONFIG_CRYPTO_DES=y |
1314 | # CONFIG_CRYPTO_FCRYPT is not set | 1355 | # CONFIG_CRYPTO_FCRYPT is not set |
@@ -1323,11 +1364,13 @@ CONFIG_CRYPTO_TEA=y | |||
1323 | CONFIG_CRYPTO_ARC4=y | 1364 | CONFIG_CRYPTO_ARC4=y |
1324 | CONFIG_CRYPTO_KHAZAD=y | 1365 | CONFIG_CRYPTO_KHAZAD=y |
1325 | CONFIG_CRYPTO_ANUBIS=y | 1366 | CONFIG_CRYPTO_ANUBIS=y |
1367 | # CONFIG_CRYPTO_SEED is not set | ||
1326 | CONFIG_CRYPTO_DEFLATE=y | 1368 | CONFIG_CRYPTO_DEFLATE=y |
1327 | CONFIG_CRYPTO_MICHAEL_MIC=y | 1369 | CONFIG_CRYPTO_MICHAEL_MIC=y |
1328 | CONFIG_CRYPTO_CRC32C=y | 1370 | CONFIG_CRYPTO_CRC32C=y |
1329 | # CONFIG_CRYPTO_CAMELLIA is not set | 1371 | # CONFIG_CRYPTO_CAMELLIA is not set |
1330 | # CONFIG_CRYPTO_TEST is not set | 1372 | # CONFIG_CRYPTO_TEST is not set |
1373 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1331 | CONFIG_CRYPTO_HW=y | 1374 | CONFIG_CRYPTO_HW=y |
1332 | 1375 | ||
1333 | # | 1376 | # |
diff --git a/arch/arm/configs/iop33x_defconfig b/arch/arm/configs/iop33x_defconfig index 721ee64a13f7..917afb5ccfac 100644 --- a/arch/arm/configs/iop33x_defconfig +++ b/arch/arm/configs/iop33x_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.22 | 3 | # Linux kernel version: 2.6.24-rc5 |
4 | # Thu Jul 19 16:05:59 2007 | 4 | # Wed Dec 12 16:11:27 2007 |
5 | # | 5 | # |
6 | CONFIG_ARM=y | 6 | CONFIG_ARM=y |
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
@@ -26,15 +26,11 @@ CONFIG_VECTORS_BASE=0xffff0000 | |||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | 26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
27 | 27 | ||
28 | # | 28 | # |
29 | # Code maturity level options | 29 | # General setup |
30 | # | 30 | # |
31 | CONFIG_EXPERIMENTAL=y | 31 | CONFIG_EXPERIMENTAL=y |
32 | CONFIG_BROKEN_ON_SMP=y | 32 | CONFIG_BROKEN_ON_SMP=y |
33 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
34 | |||
35 | # | ||
36 | # General setup | ||
37 | # | ||
38 | CONFIG_LOCALVERSION="" | 34 | CONFIG_LOCALVERSION="" |
39 | CONFIG_LOCALVERSION_AUTO=y | 35 | CONFIG_LOCALVERSION_AUTO=y |
40 | CONFIG_SWAP=y | 36 | CONFIG_SWAP=y |
@@ -45,9 +41,14 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
45 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | 41 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
46 | # CONFIG_TASKSTATS is not set | 42 | # CONFIG_TASKSTATS is not set |
47 | # CONFIG_USER_NS is not set | 43 | # CONFIG_USER_NS is not set |
44 | # CONFIG_PID_NS is not set | ||
48 | # CONFIG_AUDIT is not set | 45 | # CONFIG_AUDIT is not set |
49 | # CONFIG_IKCONFIG is not set | 46 | # CONFIG_IKCONFIG is not set |
50 | CONFIG_LOG_BUF_SHIFT=14 | 47 | CONFIG_LOG_BUF_SHIFT=14 |
48 | # CONFIG_CGROUPS is not set | ||
49 | CONFIG_FAIR_GROUP_SCHED=y | ||
50 | CONFIG_FAIR_USER_SCHED=y | ||
51 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
51 | CONFIG_SYSFS_DEPRECATED=y | 52 | CONFIG_SYSFS_DEPRECATED=y |
52 | # CONFIG_RELAY is not set | 53 | # CONFIG_RELAY is not set |
53 | CONFIG_BLK_DEV_INITRD=y | 54 | CONFIG_BLK_DEV_INITRD=y |
@@ -69,7 +70,6 @@ CONFIG_FUTEX=y | |||
69 | CONFIG_ANON_INODES=y | 70 | CONFIG_ANON_INODES=y |
70 | CONFIG_EPOLL=y | 71 | CONFIG_EPOLL=y |
71 | CONFIG_SIGNALFD=y | 72 | CONFIG_SIGNALFD=y |
72 | CONFIG_TIMERFD=y | ||
73 | CONFIG_EVENTFD=y | 73 | CONFIG_EVENTFD=y |
74 | CONFIG_SHMEM=y | 74 | CONFIG_SHMEM=y |
75 | CONFIG_VM_EVENT_COUNTERS=y | 75 | CONFIG_VM_EVENT_COUNTERS=y |
@@ -130,6 +130,7 @@ CONFIG_ARCH_IOP33X=y | |||
130 | # CONFIG_ARCH_L7200 is not set | 130 | # CONFIG_ARCH_L7200 is not set |
131 | # CONFIG_ARCH_KS8695 is not set | 131 | # CONFIG_ARCH_KS8695 is not set |
132 | # CONFIG_ARCH_NS9XXX is not set | 132 | # CONFIG_ARCH_NS9XXX is not set |
133 | # CONFIG_ARCH_MXC is not set | ||
133 | # CONFIG_ARCH_PNX4008 is not set | 134 | # CONFIG_ARCH_PNX4008 is not set |
134 | # CONFIG_ARCH_PXA is not set | 135 | # CONFIG_ARCH_PXA is not set |
135 | # CONFIG_ARCH_RPC is not set | 136 | # CONFIG_ARCH_RPC is not set |
@@ -150,6 +151,14 @@ CONFIG_IOP3XX_ATU=y | |||
150 | # | 151 | # |
151 | CONFIG_ARCH_IQ80331=y | 152 | CONFIG_ARCH_IQ80331=y |
152 | CONFIG_MACH_IQ80332=y | 153 | CONFIG_MACH_IQ80332=y |
154 | |||
155 | # | ||
156 | # Boot options | ||
157 | # | ||
158 | |||
159 | # | ||
160 | # Power management | ||
161 | # | ||
153 | CONFIG_PLAT_IOP=y | 162 | CONFIG_PLAT_IOP=y |
154 | 163 | ||
155 | # | 164 | # |
@@ -179,11 +188,8 @@ CONFIG_XSCALE_PMU=y | |||
179 | CONFIG_PCI=y | 188 | CONFIG_PCI=y |
180 | CONFIG_PCI_SYSCALL=y | 189 | CONFIG_PCI_SYSCALL=y |
181 | # CONFIG_ARCH_SUPPORTS_MSI is not set | 190 | # CONFIG_ARCH_SUPPORTS_MSI is not set |
191 | CONFIG_PCI_LEGACY=y | ||
182 | # CONFIG_PCI_DEBUG is not set | 192 | # CONFIG_PCI_DEBUG is not set |
183 | |||
184 | # | ||
185 | # PCCARD (PCMCIA/CardBus) support | ||
186 | # | ||
187 | # CONFIG_PCCARD is not set | 193 | # CONFIG_PCCARD is not set |
188 | 194 | ||
189 | # | 195 | # |
@@ -202,6 +208,7 @@ CONFIG_FLATMEM_MANUAL=y | |||
202 | CONFIG_FLATMEM=y | 208 | CONFIG_FLATMEM=y |
203 | CONFIG_FLAT_NODE_MEM_MAP=y | 209 | CONFIG_FLAT_NODE_MEM_MAP=y |
204 | # CONFIG_SPARSEMEM_STATIC is not set | 210 | # CONFIG_SPARSEMEM_STATIC is not set |
211 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
205 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | 212 | CONFIG_SPLIT_PTLOCK_CPUS=4096 |
206 | # CONFIG_RESOURCES_64BIT is not set | 213 | # CONFIG_RESOURCES_64BIT is not set |
207 | CONFIG_ZONE_DMA_FLAG=1 | 214 | CONFIG_ZONE_DMA_FLAG=1 |
@@ -241,6 +248,7 @@ CONFIG_BINFMT_AOUT=y | |||
241 | # Power management options | 248 | # Power management options |
242 | # | 249 | # |
243 | # CONFIG_PM is not set | 250 | # CONFIG_PM is not set |
251 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
244 | 252 | ||
245 | # | 253 | # |
246 | # Networking | 254 | # Networking |
@@ -279,6 +287,7 @@ CONFIG_IP_PNP_BOOTP=y | |||
279 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 287 | CONFIG_INET_XFRM_MODE_TRANSPORT=y |
280 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 288 | CONFIG_INET_XFRM_MODE_TUNNEL=y |
281 | CONFIG_INET_XFRM_MODE_BEET=y | 289 | CONFIG_INET_XFRM_MODE_BEET=y |
290 | # CONFIG_INET_LRO is not set | ||
282 | CONFIG_INET_DIAG=y | 291 | CONFIG_INET_DIAG=y |
283 | CONFIG_INET_TCP_DIAG=y | 292 | CONFIG_INET_TCP_DIAG=y |
284 | # CONFIG_TCP_CONG_ADVANCED is not set | 293 | # CONFIG_TCP_CONG_ADVANCED is not set |
@@ -318,10 +327,6 @@ CONFIG_IPV6=y | |||
318 | # CONFIG_LAPB is not set | 327 | # CONFIG_LAPB is not set |
319 | # CONFIG_ECONET is not set | 328 | # CONFIG_ECONET is not set |
320 | # CONFIG_WAN_ROUTER is not set | 329 | # CONFIG_WAN_ROUTER is not set |
321 | |||
322 | # | ||
323 | # QoS and/or fair queueing | ||
324 | # | ||
325 | # CONFIG_NET_SCHED is not set | 330 | # CONFIG_NET_SCHED is not set |
326 | 331 | ||
327 | # | 332 | # |
@@ -350,6 +355,7 @@ CONFIG_IPV6=y | |||
350 | # | 355 | # |
351 | # Generic Driver Options | 356 | # Generic Driver Options |
352 | # | 357 | # |
358 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
353 | CONFIG_STANDALONE=y | 359 | CONFIG_STANDALONE=y |
354 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 360 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
355 | # CONFIG_FW_LOADER is not set | 361 | # CONFIG_FW_LOADER is not set |
@@ -379,6 +385,7 @@ CONFIG_MTD_BLOCK=y | |||
379 | # CONFIG_INFTL is not set | 385 | # CONFIG_INFTL is not set |
380 | # CONFIG_RFD_FTL is not set | 386 | # CONFIG_RFD_FTL is not set |
381 | # CONFIG_SSFDC is not set | 387 | # CONFIG_SSFDC is not set |
388 | # CONFIG_MTD_OOPS is not set | ||
382 | 389 | ||
383 | # | 390 | # |
384 | # RAM/ROM/Flash chip drivers | 391 | # RAM/ROM/Flash chip drivers |
@@ -419,6 +426,7 @@ CONFIG_MTD_PHYSMAP_START=0x0 | |||
419 | CONFIG_MTD_PHYSMAP_LEN=0x0 | 426 | CONFIG_MTD_PHYSMAP_LEN=0x0 |
420 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 | 427 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 |
421 | # CONFIG_MTD_ARM_INTEGRATOR is not set | 428 | # CONFIG_MTD_ARM_INTEGRATOR is not set |
429 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
422 | # CONFIG_MTD_PLATRAM is not set | 430 | # CONFIG_MTD_PLATRAM is not set |
423 | 431 | ||
424 | # | 432 | # |
@@ -459,6 +467,11 @@ CONFIG_BLK_DEV_RAM_SIZE=8192 | |||
459 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | 467 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 |
460 | # CONFIG_CDROM_PKTCDVD is not set | 468 | # CONFIG_CDROM_PKTCDVD is not set |
461 | # CONFIG_ATA_OVER_ETH is not set | 469 | # CONFIG_ATA_OVER_ETH is not set |
470 | CONFIG_MISC_DEVICES=y | ||
471 | # CONFIG_PHANTOM is not set | ||
472 | # CONFIG_EEPROM_93CX6 is not set | ||
473 | # CONFIG_SGI_IOC4 is not set | ||
474 | # CONFIG_TIFM_CORE is not set | ||
462 | # CONFIG_IDE is not set | 475 | # CONFIG_IDE is not set |
463 | 476 | ||
464 | # | 477 | # |
@@ -496,12 +509,9 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
496 | # CONFIG_SCSI_SPI_ATTRS is not set | 509 | # CONFIG_SCSI_SPI_ATTRS is not set |
497 | # CONFIG_SCSI_FC_ATTRS is not set | 510 | # CONFIG_SCSI_FC_ATTRS is not set |
498 | # CONFIG_SCSI_ISCSI_ATTRS is not set | 511 | # CONFIG_SCSI_ISCSI_ATTRS is not set |
499 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
500 | # CONFIG_SCSI_SAS_LIBSAS is not set | 512 | # CONFIG_SCSI_SAS_LIBSAS is not set |
501 | 513 | # CONFIG_SCSI_SRP_ATTRS is not set | |
502 | # | 514 | CONFIG_SCSI_LOWLEVEL=y |
503 | # SCSI low-level drivers | ||
504 | # | ||
505 | # CONFIG_ISCSI_TCP is not set | 515 | # CONFIG_ISCSI_TCP is not set |
506 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | 516 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set |
507 | # CONFIG_SCSI_3W_9XXX is not set | 517 | # CONFIG_SCSI_3W_9XXX is not set |
@@ -512,6 +522,7 @@ CONFIG_SCSI_WAIT_SCAN=m | |||
512 | # CONFIG_SCSI_AIC79XX is not set | 522 | # CONFIG_SCSI_AIC79XX is not set |
513 | # CONFIG_SCSI_AIC94XX is not set | 523 | # CONFIG_SCSI_AIC94XX is not set |
514 | # CONFIG_SCSI_DPT_I2O is not set | 524 | # CONFIG_SCSI_DPT_I2O is not set |
525 | # CONFIG_SCSI_ADVANSYS is not set | ||
515 | # CONFIG_SCSI_ARCMSR is not set | 526 | # CONFIG_SCSI_ARCMSR is not set |
516 | # CONFIG_MEGARAID_NEWGEN is not set | 527 | # CONFIG_MEGARAID_NEWGEN is not set |
517 | # CONFIG_MEGARAID_LEGACY is not set | 528 | # CONFIG_MEGARAID_LEGACY is not set |
@@ -552,14 +563,8 @@ CONFIG_BLK_DEV_DM=y | |||
552 | # CONFIG_DM_ZERO is not set | 563 | # CONFIG_DM_ZERO is not set |
553 | # CONFIG_DM_MULTIPATH is not set | 564 | # CONFIG_DM_MULTIPATH is not set |
554 | # CONFIG_DM_DELAY is not set | 565 | # CONFIG_DM_DELAY is not set |
555 | 566 | # CONFIG_DM_UEVENT is not set | |
556 | # | ||
557 | # Fusion MPT device support | ||
558 | # | ||
559 | # CONFIG_FUSION is not set | 567 | # CONFIG_FUSION is not set |
560 | # CONFIG_FUSION_SPI is not set | ||
561 | # CONFIG_FUSION_FC is not set | ||
562 | # CONFIG_FUSION_SAS is not set | ||
563 | 568 | ||
564 | # | 569 | # |
565 | # IEEE 1394 (FireWire) support | 570 | # IEEE 1394 (FireWire) support |
@@ -574,6 +579,8 @@ CONFIG_NETDEVICES=y | |||
574 | # CONFIG_MACVLAN is not set | 579 | # CONFIG_MACVLAN is not set |
575 | # CONFIG_EQUALIZER is not set | 580 | # CONFIG_EQUALIZER is not set |
576 | # CONFIG_TUN is not set | 581 | # CONFIG_TUN is not set |
582 | # CONFIG_VETH is not set | ||
583 | # CONFIG_IP1000 is not set | ||
577 | # CONFIG_ARCNET is not set | 584 | # CONFIG_ARCNET is not set |
578 | # CONFIG_NET_ETHERNET is not set | 585 | # CONFIG_NET_ETHERNET is not set |
579 | CONFIG_NETDEV_1000=y | 586 | CONFIG_NETDEV_1000=y |
@@ -582,6 +589,7 @@ CONFIG_NETDEV_1000=y | |||
582 | CONFIG_E1000=y | 589 | CONFIG_E1000=y |
583 | CONFIG_E1000_NAPI=y | 590 | CONFIG_E1000_NAPI=y |
584 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | 591 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set |
592 | # CONFIG_E1000E is not set | ||
585 | # CONFIG_NS83820 is not set | 593 | # CONFIG_NS83820 is not set |
586 | # CONFIG_HAMACHI is not set | 594 | # CONFIG_HAMACHI is not set |
587 | # CONFIG_YELLOWFIN is not set | 595 | # CONFIG_YELLOWFIN is not set |
@@ -589,6 +597,7 @@ CONFIG_E1000_NAPI=y | |||
589 | # CONFIG_SIS190 is not set | 597 | # CONFIG_SIS190 is not set |
590 | # CONFIG_SKGE is not set | 598 | # CONFIG_SKGE is not set |
591 | # CONFIG_SKY2 is not set | 599 | # CONFIG_SKY2 is not set |
600 | # CONFIG_SK98LIN is not set | ||
592 | # CONFIG_VIA_VELOCITY is not set | 601 | # CONFIG_VIA_VELOCITY is not set |
593 | # CONFIG_TIGON3 is not set | 602 | # CONFIG_TIGON3 is not set |
594 | # CONFIG_BNX2 is not set | 603 | # CONFIG_BNX2 is not set |
@@ -597,11 +606,14 @@ CONFIG_E1000_NAPI=y | |||
597 | CONFIG_NETDEV_10000=y | 606 | CONFIG_NETDEV_10000=y |
598 | # CONFIG_CHELSIO_T1 is not set | 607 | # CONFIG_CHELSIO_T1 is not set |
599 | # CONFIG_CHELSIO_T3 is not set | 608 | # CONFIG_CHELSIO_T3 is not set |
609 | # CONFIG_IXGBE is not set | ||
600 | # CONFIG_IXGB is not set | 610 | # CONFIG_IXGB is not set |
601 | # CONFIG_S2IO is not set | 611 | # CONFIG_S2IO is not set |
602 | # CONFIG_MYRI10GE is not set | 612 | # CONFIG_MYRI10GE is not set |
603 | # CONFIG_NETXEN_NIC is not set | 613 | # CONFIG_NETXEN_NIC is not set |
614 | # CONFIG_NIU is not set | ||
604 | # CONFIG_MLX4_CORE is not set | 615 | # CONFIG_MLX4_CORE is not set |
616 | # CONFIG_TEHUTI is not set | ||
605 | # CONFIG_TR is not set | 617 | # CONFIG_TR is not set |
606 | 618 | ||
607 | # | 619 | # |
@@ -636,7 +648,6 @@ CONFIG_INPUT_MOUSEDEV=y | |||
636 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | 648 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 |
637 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | 649 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 |
638 | # CONFIG_INPUT_JOYDEV is not set | 650 | # CONFIG_INPUT_JOYDEV is not set |
639 | # CONFIG_INPUT_TSDEV is not set | ||
640 | # CONFIG_INPUT_EVDEV is not set | 651 | # CONFIG_INPUT_EVDEV is not set |
641 | # CONFIG_INPUT_EVBUG is not set | 652 | # CONFIG_INPUT_EVBUG is not set |
642 | 653 | ||
@@ -685,12 +696,10 @@ CONFIG_UNIX98_PTYS=y | |||
685 | CONFIG_LEGACY_PTYS=y | 696 | CONFIG_LEGACY_PTYS=y |
686 | CONFIG_LEGACY_PTY_COUNT=256 | 697 | CONFIG_LEGACY_PTY_COUNT=256 |
687 | # CONFIG_IPMI_HANDLER is not set | 698 | # CONFIG_IPMI_HANDLER is not set |
688 | # CONFIG_WATCHDOG is not set | ||
689 | CONFIG_HW_RANDOM=y | 699 | CONFIG_HW_RANDOM=y |
690 | # CONFIG_NVRAM is not set | 700 | # CONFIG_NVRAM is not set |
691 | # CONFIG_R3964 is not set | 701 | # CONFIG_R3964 is not set |
692 | # CONFIG_APPLICOM is not set | 702 | # CONFIG_APPLICOM is not set |
693 | # CONFIG_DRM is not set | ||
694 | # CONFIG_RAW_DRIVER is not set | 703 | # CONFIG_RAW_DRIVER is not set |
695 | # CONFIG_TCG_TPM is not set | 704 | # CONFIG_TCG_TPM is not set |
696 | CONFIG_DEVPORT=y | 705 | CONFIG_DEVPORT=y |
@@ -755,9 +764,9 @@ CONFIG_I2C_IOP3XX=y | |||
755 | # CONFIG_SPI is not set | 764 | # CONFIG_SPI is not set |
756 | # CONFIG_SPI_MASTER is not set | 765 | # CONFIG_SPI_MASTER is not set |
757 | # CONFIG_W1 is not set | 766 | # CONFIG_W1 is not set |
767 | # CONFIG_POWER_SUPPLY is not set | ||
758 | CONFIG_HWMON=y | 768 | CONFIG_HWMON=y |
759 | # CONFIG_HWMON_VID is not set | 769 | # CONFIG_HWMON_VID is not set |
760 | # CONFIG_SENSORS_ABITUGURU is not set | ||
761 | # CONFIG_SENSORS_AD7418 is not set | 770 | # CONFIG_SENSORS_AD7418 is not set |
762 | # CONFIG_SENSORS_ADM1021 is not set | 771 | # CONFIG_SENSORS_ADM1021 is not set |
763 | # CONFIG_SENSORS_ADM1025 is not set | 772 | # CONFIG_SENSORS_ADM1025 is not set |
@@ -765,12 +774,13 @@ CONFIG_HWMON=y | |||
765 | # CONFIG_SENSORS_ADM1029 is not set | 774 | # CONFIG_SENSORS_ADM1029 is not set |
766 | # CONFIG_SENSORS_ADM1031 is not set | 775 | # CONFIG_SENSORS_ADM1031 is not set |
767 | # CONFIG_SENSORS_ADM9240 is not set | 776 | # CONFIG_SENSORS_ADM9240 is not set |
768 | # CONFIG_SENSORS_ASB100 is not set | 777 | # CONFIG_SENSORS_ADT7470 is not set |
769 | # CONFIG_SENSORS_ATXP1 is not set | 778 | # CONFIG_SENSORS_ATXP1 is not set |
770 | # CONFIG_SENSORS_DS1621 is not set | 779 | # CONFIG_SENSORS_DS1621 is not set |
780 | # CONFIG_SENSORS_I5K_AMB is not set | ||
771 | # CONFIG_SENSORS_F71805F is not set | 781 | # CONFIG_SENSORS_F71805F is not set |
772 | # CONFIG_SENSORS_FSCHER is not set | 782 | # CONFIG_SENSORS_F71882FG is not set |
773 | # CONFIG_SENSORS_FSCPOS is not set | 783 | # CONFIG_SENSORS_F75375S is not set |
774 | # CONFIG_SENSORS_GL518SM is not set | 784 | # CONFIG_SENSORS_GL518SM is not set |
775 | # CONFIG_SENSORS_GL520SM is not set | 785 | # CONFIG_SENSORS_GL520SM is not set |
776 | # CONFIG_SENSORS_IT87 is not set | 786 | # CONFIG_SENSORS_IT87 is not set |
@@ -784,14 +794,17 @@ CONFIG_HWMON=y | |||
784 | # CONFIG_SENSORS_LM87 is not set | 794 | # CONFIG_SENSORS_LM87 is not set |
785 | # CONFIG_SENSORS_LM90 is not set | 795 | # CONFIG_SENSORS_LM90 is not set |
786 | # CONFIG_SENSORS_LM92 is not set | 796 | # CONFIG_SENSORS_LM92 is not set |
797 | # CONFIG_SENSORS_LM93 is not set | ||
787 | # CONFIG_SENSORS_MAX1619 is not set | 798 | # CONFIG_SENSORS_MAX1619 is not set |
788 | # CONFIG_SENSORS_MAX6650 is not set | 799 | # CONFIG_SENSORS_MAX6650 is not set |
789 | # CONFIG_SENSORS_PC87360 is not set | 800 | # CONFIG_SENSORS_PC87360 is not set |
790 | # CONFIG_SENSORS_PC87427 is not set | 801 | # CONFIG_SENSORS_PC87427 is not set |
791 | # CONFIG_SENSORS_SIS5595 is not set | 802 | # CONFIG_SENSORS_SIS5595 is not set |
803 | # CONFIG_SENSORS_DME1737 is not set | ||
792 | # CONFIG_SENSORS_SMSC47M1 is not set | 804 | # CONFIG_SENSORS_SMSC47M1 is not set |
793 | # CONFIG_SENSORS_SMSC47M192 is not set | 805 | # CONFIG_SENSORS_SMSC47M192 is not set |
794 | # CONFIG_SENSORS_SMSC47B397 is not set | 806 | # CONFIG_SENSORS_SMSC47B397 is not set |
807 | # CONFIG_SENSORS_THMC50 is not set | ||
795 | # CONFIG_SENSORS_VIA686A is not set | 808 | # CONFIG_SENSORS_VIA686A is not set |
796 | # CONFIG_SENSORS_VT1211 is not set | 809 | # CONFIG_SENSORS_VT1211 is not set |
797 | # CONFIG_SENSORS_VT8231 is not set | 810 | # CONFIG_SENSORS_VT8231 is not set |
@@ -803,29 +816,18 @@ CONFIG_HWMON=y | |||
803 | # CONFIG_SENSORS_W83627HF is not set | 816 | # CONFIG_SENSORS_W83627HF is not set |
804 | # CONFIG_SENSORS_W83627EHF is not set | 817 | # CONFIG_SENSORS_W83627EHF is not set |
805 | # CONFIG_HWMON_DEBUG_CHIP is not set | 818 | # CONFIG_HWMON_DEBUG_CHIP is not set |
806 | CONFIG_MISC_DEVICES=y | 819 | # CONFIG_WATCHDOG is not set |
807 | # CONFIG_PHANTOM is not set | ||
808 | # CONFIG_EEPROM_93CX6 is not set | ||
809 | # CONFIG_SGI_IOC4 is not set | ||
810 | # CONFIG_TIFM_CORE is not set | ||
811 | |||
812 | # | ||
813 | # Multifunction device drivers | ||
814 | # | ||
815 | # CONFIG_MFD_SM501 is not set | ||
816 | |||
817 | # | ||
818 | # LED devices | ||
819 | # | ||
820 | # CONFIG_NEW_LEDS is not set | ||
821 | 820 | ||
822 | # | 821 | # |
823 | # LED drivers | 822 | # Sonics Silicon Backplane |
824 | # | 823 | # |
824 | CONFIG_SSB_POSSIBLE=y | ||
825 | # CONFIG_SSB is not set | ||
825 | 826 | ||
826 | # | 827 | # |
827 | # LED Triggers | 828 | # Multifunction device drivers |
828 | # | 829 | # |
830 | # CONFIG_MFD_SM501 is not set | ||
829 | 831 | ||
830 | # | 832 | # |
831 | # Multimedia devices | 833 | # Multimedia devices |
@@ -837,14 +839,16 @@ CONFIG_DAB=y | |||
837 | # | 839 | # |
838 | # Graphics support | 840 | # Graphics support |
839 | # | 841 | # |
842 | # CONFIG_DRM is not set | ||
843 | # CONFIG_VGASTATE is not set | ||
844 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
845 | # CONFIG_FB is not set | ||
840 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 846 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
841 | 847 | ||
842 | # | 848 | # |
843 | # Display device support | 849 | # Display device support |
844 | # | 850 | # |
845 | # CONFIG_DISPLAY_SUPPORT is not set | 851 | # CONFIG_DISPLAY_SUPPORT is not set |
846 | # CONFIG_VGASTATE is not set | ||
847 | # CONFIG_FB is not set | ||
848 | 852 | ||
849 | # | 853 | # |
850 | # Console display driver support | 854 | # Console display driver support |
@@ -859,6 +863,7 @@ CONFIG_DUMMY_CONSOLE=y | |||
859 | CONFIG_HID_SUPPORT=y | 863 | CONFIG_HID_SUPPORT=y |
860 | CONFIG_HID=y | 864 | CONFIG_HID=y |
861 | # CONFIG_HID_DEBUG is not set | 865 | # CONFIG_HID_DEBUG is not set |
866 | # CONFIG_HIDRAW is not set | ||
862 | CONFIG_USB_SUPPORT=y | 867 | CONFIG_USB_SUPPORT=y |
863 | CONFIG_USB_ARCH_HAS_HCD=y | 868 | CONFIG_USB_ARCH_HAS_HCD=y |
864 | CONFIG_USB_ARCH_HAS_OHCI=y | 869 | CONFIG_USB_ARCH_HAS_OHCI=y |
@@ -874,16 +879,15 @@ CONFIG_USB_ARCH_HAS_EHCI=y | |||
874 | # | 879 | # |
875 | # CONFIG_USB_GADGET is not set | 880 | # CONFIG_USB_GADGET is not set |
876 | # CONFIG_MMC is not set | 881 | # CONFIG_MMC is not set |
877 | 882 | # CONFIG_NEW_LEDS is not set | |
878 | # | ||
879 | # Real Time Clock | ||
880 | # | ||
881 | CONFIG_RTC_LIB=y | 883 | CONFIG_RTC_LIB=y |
882 | # CONFIG_RTC_CLASS is not set | 884 | # CONFIG_RTC_CLASS is not set |
885 | CONFIG_DMADEVICES=y | ||
883 | 886 | ||
884 | # | 887 | # |
885 | # DMA Engine support | 888 | # DMA Devices |
886 | # | 889 | # |
890 | CONFIG_INTEL_IOP_ADMA=y | ||
887 | CONFIG_DMA_ENGINE=y | 891 | CONFIG_DMA_ENGINE=y |
888 | 892 | ||
889 | # | 893 | # |
@@ -892,12 +896,6 @@ CONFIG_DMA_ENGINE=y | |||
892 | CONFIG_NET_DMA=y | 896 | CONFIG_NET_DMA=y |
893 | 897 | ||
894 | # | 898 | # |
895 | # DMA Devices | ||
896 | # | ||
897 | # CONFIG_INTEL_IOATDMA is not set | ||
898 | CONFIG_INTEL_IOP_ADMA=y | ||
899 | |||
900 | # | ||
901 | # File systems | 899 | # File systems |
902 | # | 900 | # |
903 | CONFIG_EXT2_FS=y | 901 | CONFIG_EXT2_FS=y |
@@ -909,7 +907,6 @@ CONFIG_EXT3_FS_XATTR=y | |||
909 | # CONFIG_EXT3_FS_SECURITY is not set | 907 | # CONFIG_EXT3_FS_SECURITY is not set |
910 | # CONFIG_EXT4DEV_FS is not set | 908 | # CONFIG_EXT4DEV_FS is not set |
911 | CONFIG_JBD=y | 909 | CONFIG_JBD=y |
912 | # CONFIG_JBD_DEBUG is not set | ||
913 | CONFIG_FS_MBCACHE=y | 910 | CONFIG_FS_MBCACHE=y |
914 | # CONFIG_REISERFS_FS is not set | 911 | # CONFIG_REISERFS_FS is not set |
915 | # CONFIG_JFS_FS is not set | 912 | # CONFIG_JFS_FS is not set |
@@ -949,7 +946,6 @@ CONFIG_SYSFS=y | |||
949 | CONFIG_TMPFS=y | 946 | CONFIG_TMPFS=y |
950 | # CONFIG_TMPFS_POSIX_ACL is not set | 947 | # CONFIG_TMPFS_POSIX_ACL is not set |
951 | # CONFIG_HUGETLB_PAGE is not set | 948 | # CONFIG_HUGETLB_PAGE is not set |
952 | CONFIG_RAMFS=y | ||
953 | # CONFIG_CONFIGFS_FS is not set | 949 | # CONFIG_CONFIGFS_FS is not set |
954 | 950 | ||
955 | # | 951 | # |
@@ -969,10 +965,7 @@ CONFIG_CRAMFS=y | |||
969 | # CONFIG_QNX4FS_FS is not set | 965 | # CONFIG_QNX4FS_FS is not set |
970 | # CONFIG_SYSV_FS is not set | 966 | # CONFIG_SYSV_FS is not set |
971 | # CONFIG_UFS_FS is not set | 967 | # CONFIG_UFS_FS is not set |
972 | 968 | CONFIG_NETWORK_FILESYSTEMS=y | |
973 | # | ||
974 | # Network File Systems | ||
975 | # | ||
976 | CONFIG_NFS_FS=y | 969 | CONFIG_NFS_FS=y |
977 | CONFIG_NFS_V3=y | 970 | CONFIG_NFS_V3=y |
978 | # CONFIG_NFS_V3_ACL is not set | 971 | # CONFIG_NFS_V3_ACL is not set |
@@ -1019,26 +1012,17 @@ CONFIG_MSDOS_PARTITION=y | |||
1019 | # CONFIG_KARMA_PARTITION is not set | 1012 | # CONFIG_KARMA_PARTITION is not set |
1020 | # CONFIG_EFI_PARTITION is not set | 1013 | # CONFIG_EFI_PARTITION is not set |
1021 | # CONFIG_SYSV68_PARTITION is not set | 1014 | # CONFIG_SYSV68_PARTITION is not set |
1022 | |||
1023 | # | ||
1024 | # Native Language Support | ||
1025 | # | ||
1026 | # CONFIG_NLS is not set | 1015 | # CONFIG_NLS is not set |
1027 | |||
1028 | # | ||
1029 | # Distributed Lock Manager | ||
1030 | # | ||
1031 | # CONFIG_DLM is not set | 1016 | # CONFIG_DLM is not set |
1032 | 1017 | CONFIG_INSTRUMENTATION=y | |
1033 | # | ||
1034 | # Profiling support | ||
1035 | # | ||
1036 | # CONFIG_PROFILING is not set | 1018 | # CONFIG_PROFILING is not set |
1019 | # CONFIG_MARKERS is not set | ||
1037 | 1020 | ||
1038 | # | 1021 | # |
1039 | # Kernel hacking | 1022 | # Kernel hacking |
1040 | # | 1023 | # |
1041 | # CONFIG_PRINTK_TIME is not set | 1024 | # CONFIG_PRINTK_TIME is not set |
1025 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1042 | CONFIG_ENABLE_MUST_CHECK=y | 1026 | CONFIG_ENABLE_MUST_CHECK=y |
1043 | CONFIG_MAGIC_SYSRQ=y | 1027 | CONFIG_MAGIC_SYSRQ=y |
1044 | # CONFIG_UNUSED_SYMBOLS is not set | 1028 | # CONFIG_UNUSED_SYMBOLS is not set |
@@ -1065,10 +1049,13 @@ CONFIG_DEBUG_BUGVERBOSE=y | |||
1065 | # CONFIG_DEBUG_INFO is not set | 1049 | # CONFIG_DEBUG_INFO is not set |
1066 | # CONFIG_DEBUG_VM is not set | 1050 | # CONFIG_DEBUG_VM is not set |
1067 | # CONFIG_DEBUG_LIST is not set | 1051 | # CONFIG_DEBUG_LIST is not set |
1052 | # CONFIG_DEBUG_SG is not set | ||
1068 | CONFIG_FRAME_POINTER=y | 1053 | CONFIG_FRAME_POINTER=y |
1069 | # CONFIG_FORCED_INLINING is not set | 1054 | # CONFIG_FORCED_INLINING is not set |
1055 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1070 | # CONFIG_RCU_TORTURE_TEST is not set | 1056 | # CONFIG_RCU_TORTURE_TEST is not set |
1071 | # CONFIG_FAULT_INJECTION is not set | 1057 | # CONFIG_FAULT_INJECTION is not set |
1058 | # CONFIG_SAMPLES is not set | ||
1072 | CONFIG_DEBUG_USER=y | 1059 | CONFIG_DEBUG_USER=y |
1073 | # CONFIG_DEBUG_ERRORS is not set | 1060 | # CONFIG_DEBUG_ERRORS is not set |
1074 | CONFIG_DEBUG_LL=y | 1061 | CONFIG_DEBUG_LL=y |
@@ -1079,6 +1066,7 @@ CONFIG_DEBUG_LL=y | |||
1079 | # | 1066 | # |
1080 | # CONFIG_KEYS is not set | 1067 | # CONFIG_KEYS is not set |
1081 | # CONFIG_SECURITY is not set | 1068 | # CONFIG_SECURITY is not set |
1069 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1082 | CONFIG_XOR_BLOCKS=y | 1070 | CONFIG_XOR_BLOCKS=y |
1083 | CONFIG_ASYNC_CORE=y | 1071 | CONFIG_ASYNC_CORE=y |
1084 | CONFIG_ASYNC_MEMCPY=y | 1072 | CONFIG_ASYNC_MEMCPY=y |
diff --git a/arch/arm/configs/littleton_defconfig b/arch/arm/configs/littleton_defconfig new file mode 100644 index 000000000000..1db496908052 --- /dev/null +++ b/arch/arm/configs/littleton_defconfig | |||
@@ -0,0 +1,783 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.24-rc5 | ||
4 | # Fri Dec 21 11:06:19 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_ARCH_MTD_XIP=y | ||
26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
28 | |||
29 | # | ||
30 | # General setup | ||
31 | # | ||
32 | CONFIG_EXPERIMENTAL=y | ||
33 | CONFIG_BROKEN_ON_SMP=y | ||
34 | CONFIG_LOCK_KERNEL=y | ||
35 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
36 | CONFIG_LOCALVERSION="" | ||
37 | CONFIG_LOCALVERSION_AUTO=y | ||
38 | CONFIG_SWAP=y | ||
39 | CONFIG_SYSVIPC=y | ||
40 | CONFIG_SYSVIPC_SYSCTL=y | ||
41 | # CONFIG_POSIX_MQUEUE is not set | ||
42 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
43 | # CONFIG_TASKSTATS is not set | ||
44 | # CONFIG_USER_NS is not set | ||
45 | # CONFIG_PID_NS is not set | ||
46 | # CONFIG_AUDIT is not set | ||
47 | # CONFIG_IKCONFIG is not set | ||
48 | CONFIG_LOG_BUF_SHIFT=14 | ||
49 | # CONFIG_CGROUPS is not set | ||
50 | CONFIG_FAIR_GROUP_SCHED=y | ||
51 | CONFIG_FAIR_USER_SCHED=y | ||
52 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
53 | CONFIG_SYSFS_DEPRECATED=y | ||
54 | # CONFIG_RELAY is not set | ||
55 | CONFIG_BLK_DEV_INITRD=y | ||
56 | CONFIG_INITRAMFS_SOURCE="" | ||
57 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
58 | CONFIG_SYSCTL=y | ||
59 | # CONFIG_EMBEDDED is not set | ||
60 | CONFIG_UID16=y | ||
61 | CONFIG_SYSCTL_SYSCALL=y | ||
62 | CONFIG_KALLSYMS=y | ||
63 | # CONFIG_KALLSYMS_ALL is not set | ||
64 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
65 | CONFIG_HOTPLUG=y | ||
66 | CONFIG_PRINTK=y | ||
67 | CONFIG_BUG=y | ||
68 | CONFIG_ELF_CORE=y | ||
69 | CONFIG_BASE_FULL=y | ||
70 | CONFIG_FUTEX=y | ||
71 | CONFIG_ANON_INODES=y | ||
72 | CONFIG_EPOLL=y | ||
73 | CONFIG_SIGNALFD=y | ||
74 | CONFIG_EVENTFD=y | ||
75 | CONFIG_SHMEM=y | ||
76 | CONFIG_VM_EVENT_COUNTERS=y | ||
77 | CONFIG_SLAB=y | ||
78 | # CONFIG_SLUB is not set | ||
79 | # CONFIG_SLOB is not set | ||
80 | CONFIG_RT_MUTEXES=y | ||
81 | # CONFIG_TINY_SHMEM is not set | ||
82 | CONFIG_BASE_SMALL=0 | ||
83 | CONFIG_MODULES=y | ||
84 | CONFIG_MODULE_UNLOAD=y | ||
85 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
86 | # CONFIG_MODVERSIONS is not set | ||
87 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
88 | # CONFIG_KMOD is not set | ||
89 | CONFIG_BLOCK=y | ||
90 | # CONFIG_LBD is not set | ||
91 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
92 | # CONFIG_LSF is not set | ||
93 | # CONFIG_BLK_DEV_BSG is not set | ||
94 | |||
95 | # | ||
96 | # IO Schedulers | ||
97 | # | ||
98 | CONFIG_IOSCHED_NOOP=y | ||
99 | CONFIG_IOSCHED_AS=y | ||
100 | CONFIG_IOSCHED_DEADLINE=y | ||
101 | CONFIG_IOSCHED_CFQ=y | ||
102 | # CONFIG_DEFAULT_AS is not set | ||
103 | # CONFIG_DEFAULT_DEADLINE is not set | ||
104 | CONFIG_DEFAULT_CFQ=y | ||
105 | # CONFIG_DEFAULT_NOOP is not set | ||
106 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
107 | |||
108 | # | ||
109 | # System Type | ||
110 | # | ||
111 | # CONFIG_ARCH_AAEC2000 is not set | ||
112 | # CONFIG_ARCH_INTEGRATOR is not set | ||
113 | # CONFIG_ARCH_REALVIEW is not set | ||
114 | # CONFIG_ARCH_VERSATILE is not set | ||
115 | # CONFIG_ARCH_AT91 is not set | ||
116 | # CONFIG_ARCH_CLPS7500 is not set | ||
117 | # CONFIG_ARCH_CLPS711X is not set | ||
118 | # CONFIG_ARCH_CO285 is not set | ||
119 | # CONFIG_ARCH_EBSA110 is not set | ||
120 | # CONFIG_ARCH_EP93XX is not set | ||
121 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
122 | # CONFIG_ARCH_NETX is not set | ||
123 | # CONFIG_ARCH_H720X is not set | ||
124 | # CONFIG_ARCH_IMX is not set | ||
125 | # CONFIG_ARCH_IOP13XX is not set | ||
126 | # CONFIG_ARCH_IOP32X is not set | ||
127 | # CONFIG_ARCH_IOP33X is not set | ||
128 | # CONFIG_ARCH_IXP23XX is not set | ||
129 | # CONFIG_ARCH_IXP2000 is not set | ||
130 | # CONFIG_ARCH_IXP4XX is not set | ||
131 | # CONFIG_ARCH_L7200 is not set | ||
132 | # CONFIG_ARCH_KS8695 is not set | ||
133 | # CONFIG_ARCH_NS9XXX is not set | ||
134 | # CONFIG_ARCH_MXC is not set | ||
135 | # CONFIG_ARCH_PNX4008 is not set | ||
136 | CONFIG_ARCH_PXA=y | ||
137 | # CONFIG_ARCH_RPC is not set | ||
138 | # CONFIG_ARCH_SA1100 is not set | ||
139 | # CONFIG_ARCH_S3C2410 is not set | ||
140 | # CONFIG_ARCH_SHARK is not set | ||
141 | # CONFIG_ARCH_LH7A40X is not set | ||
142 | # CONFIG_ARCH_DAVINCI is not set | ||
143 | # CONFIG_ARCH_OMAP is not set | ||
144 | |||
145 | # | ||
146 | # Intel PXA2xx/PXA3xx Implementations | ||
147 | # | ||
148 | |||
149 | # | ||
150 | # Supported PXA3xx Processor Variants | ||
151 | # | ||
152 | CONFIG_CPU_PXA300=y | ||
153 | CONFIG_CPU_PXA310=y | ||
154 | # CONFIG_CPU_PXA320 is not set | ||
155 | # CONFIG_ARCH_LUBBOCK is not set | ||
156 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
157 | # CONFIG_MACH_MAINSTONE is not set | ||
158 | # CONFIG_ARCH_PXA_IDP is not set | ||
159 | # CONFIG_PXA_SHARPSL is not set | ||
160 | # CONFIG_MACH_TRIZEPS4 is not set | ||
161 | # CONFIG_MACH_EM_X270 is not set | ||
162 | # CONFIG_MACH_ZYLONITE is not set | ||
163 | CONFIG_MACH_LITTLETON=y | ||
164 | # CONFIG_MACH_ARMCORE is not set | ||
165 | CONFIG_PXA3xx=y | ||
166 | CONFIG_PXA_SSP=y | ||
167 | |||
168 | # | ||
169 | # Boot options | ||
170 | # | ||
171 | |||
172 | # | ||
173 | # Power management | ||
174 | # | ||
175 | |||
176 | # | ||
177 | # Processor Type | ||
178 | # | ||
179 | CONFIG_CPU_32=y | ||
180 | CONFIG_CPU_XSC3=y | ||
181 | CONFIG_CPU_32v5=y | ||
182 | CONFIG_CPU_ABRT_EV5T=y | ||
183 | CONFIG_CPU_CACHE_VIVT=y | ||
184 | CONFIG_CPU_TLB_V4WBI=y | ||
185 | CONFIG_CPU_CP15=y | ||
186 | CONFIG_CPU_CP15_MMU=y | ||
187 | CONFIG_IO_36=y | ||
188 | |||
189 | # | ||
190 | # Processor Features | ||
191 | # | ||
192 | # CONFIG_ARM_THUMB is not set | ||
193 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
194 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
195 | # CONFIG_OUTER_CACHE is not set | ||
196 | CONFIG_IWMMXT=y | ||
197 | |||
198 | # | ||
199 | # Bus support | ||
200 | # | ||
201 | # CONFIG_PCI_SYSCALL is not set | ||
202 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
203 | # CONFIG_PCCARD is not set | ||
204 | |||
205 | # | ||
206 | # Kernel Features | ||
207 | # | ||
208 | CONFIG_TICK_ONESHOT=y | ||
209 | # CONFIG_NO_HZ is not set | ||
210 | # CONFIG_HIGH_RES_TIMERS is not set | ||
211 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
212 | CONFIG_PREEMPT=y | ||
213 | CONFIG_HZ=100 | ||
214 | CONFIG_AEABI=y | ||
215 | CONFIG_OABI_COMPAT=y | ||
216 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
217 | CONFIG_SELECT_MEMORY_MODEL=y | ||
218 | CONFIG_FLATMEM_MANUAL=y | ||
219 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
220 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
221 | CONFIG_FLATMEM=y | ||
222 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
223 | # CONFIG_SPARSEMEM_STATIC is not set | ||
224 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
225 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
226 | # CONFIG_RESOURCES_64BIT is not set | ||
227 | CONFIG_ZONE_DMA_FLAG=1 | ||
228 | CONFIG_BOUNCE=y | ||
229 | CONFIG_VIRT_TO_BUS=y | ||
230 | CONFIG_ALIGNMENT_TRAP=y | ||
231 | |||
232 | # | ||
233 | # Boot options | ||
234 | # | ||
235 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
236 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
237 | CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=64M" | ||
238 | # CONFIG_XIP_KERNEL is not set | ||
239 | # CONFIG_KEXEC is not set | ||
240 | |||
241 | # | ||
242 | # CPU Frequency scaling | ||
243 | # | ||
244 | # CONFIG_CPU_FREQ is not set | ||
245 | |||
246 | # | ||
247 | # Floating point emulation | ||
248 | # | ||
249 | |||
250 | # | ||
251 | # At least one emulation must be selected | ||
252 | # | ||
253 | CONFIG_FPE_NWFPE=y | ||
254 | # CONFIG_FPE_NWFPE_XP is not set | ||
255 | # CONFIG_FPE_FASTFPE is not set | ||
256 | |||
257 | # | ||
258 | # Userspace binary formats | ||
259 | # | ||
260 | CONFIG_BINFMT_ELF=y | ||
261 | # CONFIG_BINFMT_AOUT is not set | ||
262 | # CONFIG_BINFMT_MISC is not set | ||
263 | |||
264 | # | ||
265 | # Power management options | ||
266 | # | ||
267 | # CONFIG_PM is not set | ||
268 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
269 | |||
270 | # | ||
271 | # Networking | ||
272 | # | ||
273 | CONFIG_NET=y | ||
274 | |||
275 | # | ||
276 | # Networking options | ||
277 | # | ||
278 | CONFIG_PACKET=y | ||
279 | # CONFIG_PACKET_MMAP is not set | ||
280 | CONFIG_UNIX=y | ||
281 | CONFIG_XFRM=y | ||
282 | # CONFIG_XFRM_USER is not set | ||
283 | # CONFIG_XFRM_SUB_POLICY is not set | ||
284 | # CONFIG_XFRM_MIGRATE is not set | ||
285 | # CONFIG_NET_KEY is not set | ||
286 | CONFIG_INET=y | ||
287 | # CONFIG_IP_MULTICAST is not set | ||
288 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
289 | CONFIG_IP_FIB_HASH=y | ||
290 | CONFIG_IP_PNP=y | ||
291 | # CONFIG_IP_PNP_DHCP is not set | ||
292 | # CONFIG_IP_PNP_BOOTP is not set | ||
293 | # CONFIG_IP_PNP_RARP is not set | ||
294 | # CONFIG_NET_IPIP is not set | ||
295 | # CONFIG_NET_IPGRE is not set | ||
296 | # CONFIG_ARPD is not set | ||
297 | # CONFIG_SYN_COOKIES is not set | ||
298 | # CONFIG_INET_AH is not set | ||
299 | # CONFIG_INET_ESP is not set | ||
300 | # CONFIG_INET_IPCOMP is not set | ||
301 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
302 | # CONFIG_INET_TUNNEL is not set | ||
303 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
304 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
305 | CONFIG_INET_XFRM_MODE_BEET=y | ||
306 | # CONFIG_INET_LRO is not set | ||
307 | CONFIG_INET_DIAG=y | ||
308 | CONFIG_INET_TCP_DIAG=y | ||
309 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
310 | CONFIG_TCP_CONG_CUBIC=y | ||
311 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
312 | # CONFIG_TCP_MD5SIG is not set | ||
313 | # CONFIG_IPV6 is not set | ||
314 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
315 | # CONFIG_INET6_TUNNEL is not set | ||
316 | # CONFIG_NETWORK_SECMARK is not set | ||
317 | # CONFIG_NETFILTER is not set | ||
318 | # CONFIG_IP_DCCP is not set | ||
319 | # CONFIG_IP_SCTP is not set | ||
320 | # CONFIG_TIPC is not set | ||
321 | # CONFIG_ATM is not set | ||
322 | # CONFIG_BRIDGE is not set | ||
323 | # CONFIG_VLAN_8021Q is not set | ||
324 | # CONFIG_DECNET is not set | ||
325 | # CONFIG_LLC2 is not set | ||
326 | # CONFIG_IPX is not set | ||
327 | # CONFIG_ATALK is not set | ||
328 | # CONFIG_X25 is not set | ||
329 | # CONFIG_LAPB is not set | ||
330 | # CONFIG_ECONET is not set | ||
331 | # CONFIG_WAN_ROUTER is not set | ||
332 | # CONFIG_NET_SCHED is not set | ||
333 | |||
334 | # | ||
335 | # Network testing | ||
336 | # | ||
337 | # CONFIG_NET_PKTGEN is not set | ||
338 | # CONFIG_HAMRADIO is not set | ||
339 | # CONFIG_IRDA is not set | ||
340 | # CONFIG_BT is not set | ||
341 | # CONFIG_AF_RXRPC is not set | ||
342 | |||
343 | # | ||
344 | # Wireless | ||
345 | # | ||
346 | # CONFIG_CFG80211 is not set | ||
347 | # CONFIG_WIRELESS_EXT is not set | ||
348 | # CONFIG_MAC80211 is not set | ||
349 | # CONFIG_IEEE80211 is not set | ||
350 | # CONFIG_RFKILL is not set | ||
351 | # CONFIG_NET_9P is not set | ||
352 | |||
353 | # | ||
354 | # Device Drivers | ||
355 | # | ||
356 | |||
357 | # | ||
358 | # Generic Driver Options | ||
359 | # | ||
360 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
361 | # CONFIG_STANDALONE is not set | ||
362 | # CONFIG_PREVENT_FIRMWARE_BUILD is not set | ||
363 | CONFIG_FW_LOADER=y | ||
364 | # CONFIG_DEBUG_DRIVER is not set | ||
365 | # CONFIG_DEBUG_DEVRES is not set | ||
366 | # CONFIG_SYS_HYPERVISOR is not set | ||
367 | # CONFIG_CONNECTOR is not set | ||
368 | # CONFIG_MTD is not set | ||
369 | # CONFIG_PARPORT is not set | ||
370 | # CONFIG_BLK_DEV is not set | ||
371 | # CONFIG_MISC_DEVICES is not set | ||
372 | # CONFIG_IDE is not set | ||
373 | |||
374 | # | ||
375 | # SCSI device support | ||
376 | # | ||
377 | # CONFIG_RAID_ATTRS is not set | ||
378 | # CONFIG_SCSI is not set | ||
379 | # CONFIG_SCSI_DMA is not set | ||
380 | # CONFIG_SCSI_NETLINK is not set | ||
381 | # CONFIG_ATA is not set | ||
382 | # CONFIG_MD is not set | ||
383 | CONFIG_NETDEVICES=y | ||
384 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
385 | # CONFIG_DUMMY is not set | ||
386 | # CONFIG_BONDING is not set | ||
387 | # CONFIG_MACVLAN is not set | ||
388 | # CONFIG_EQUALIZER is not set | ||
389 | # CONFIG_TUN is not set | ||
390 | # CONFIG_VETH is not set | ||
391 | # CONFIG_PHYLIB is not set | ||
392 | CONFIG_NET_ETHERNET=y | ||
393 | CONFIG_MII=y | ||
394 | # CONFIG_AX88796 is not set | ||
395 | CONFIG_SMC91X=y | ||
396 | # CONFIG_DM9000 is not set | ||
397 | # CONFIG_SMC911X is not set | ||
398 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
399 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
400 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
401 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
402 | # CONFIG_B44 is not set | ||
403 | # CONFIG_NETDEV_1000 is not set | ||
404 | # CONFIG_NETDEV_10000 is not set | ||
405 | |||
406 | # | ||
407 | # Wireless LAN | ||
408 | # | ||
409 | # CONFIG_WLAN_PRE80211 is not set | ||
410 | # CONFIG_WLAN_80211 is not set | ||
411 | # CONFIG_WAN is not set | ||
412 | # CONFIG_PPP is not set | ||
413 | # CONFIG_SLIP is not set | ||
414 | # CONFIG_SHAPER is not set | ||
415 | # CONFIG_NETCONSOLE is not set | ||
416 | # CONFIG_NETPOLL is not set | ||
417 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
418 | # CONFIG_ISDN is not set | ||
419 | |||
420 | # | ||
421 | # Input device support | ||
422 | # | ||
423 | CONFIG_INPUT=y | ||
424 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
425 | # CONFIG_INPUT_POLLDEV is not set | ||
426 | |||
427 | # | ||
428 | # Userland interfaces | ||
429 | # | ||
430 | CONFIG_INPUT_MOUSEDEV=y | ||
431 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
432 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
433 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
434 | # CONFIG_INPUT_JOYDEV is not set | ||
435 | # CONFIG_INPUT_EVDEV is not set | ||
436 | # CONFIG_INPUT_EVBUG is not set | ||
437 | |||
438 | # | ||
439 | # Input Device Drivers | ||
440 | # | ||
441 | # CONFIG_INPUT_KEYBOARD is not set | ||
442 | # CONFIG_INPUT_MOUSE is not set | ||
443 | # CONFIG_INPUT_JOYSTICK is not set | ||
444 | # CONFIG_INPUT_TABLET is not set | ||
445 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
446 | # CONFIG_INPUT_MISC is not set | ||
447 | |||
448 | # | ||
449 | # Hardware I/O ports | ||
450 | # | ||
451 | # CONFIG_SERIO is not set | ||
452 | # CONFIG_GAMEPORT is not set | ||
453 | |||
454 | # | ||
455 | # Character devices | ||
456 | # | ||
457 | CONFIG_VT=y | ||
458 | CONFIG_VT_CONSOLE=y | ||
459 | CONFIG_HW_CONSOLE=y | ||
460 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
461 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
462 | |||
463 | # | ||
464 | # Serial drivers | ||
465 | # | ||
466 | # CONFIG_SERIAL_8250 is not set | ||
467 | |||
468 | # | ||
469 | # Non-8250 serial port support | ||
470 | # | ||
471 | CONFIG_SERIAL_PXA=y | ||
472 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
473 | CONFIG_SERIAL_CORE=y | ||
474 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
475 | CONFIG_UNIX98_PTYS=y | ||
476 | # CONFIG_LEGACY_PTYS is not set | ||
477 | # CONFIG_IPMI_HANDLER is not set | ||
478 | # CONFIG_HW_RANDOM is not set | ||
479 | # CONFIG_NVRAM is not set | ||
480 | # CONFIG_R3964 is not set | ||
481 | # CONFIG_RAW_DRIVER is not set | ||
482 | # CONFIG_TCG_TPM is not set | ||
483 | # CONFIG_I2C is not set | ||
484 | |||
485 | # | ||
486 | # SPI support | ||
487 | # | ||
488 | # CONFIG_SPI is not set | ||
489 | # CONFIG_SPI_MASTER is not set | ||
490 | # CONFIG_W1 is not set | ||
491 | # CONFIG_POWER_SUPPLY is not set | ||
492 | # CONFIG_HWMON is not set | ||
493 | # CONFIG_WATCHDOG is not set | ||
494 | |||
495 | # | ||
496 | # Sonics Silicon Backplane | ||
497 | # | ||
498 | CONFIG_SSB_POSSIBLE=y | ||
499 | # CONFIG_SSB is not set | ||
500 | |||
501 | # | ||
502 | # Multifunction device drivers | ||
503 | # | ||
504 | # CONFIG_MFD_SM501 is not set | ||
505 | |||
506 | # | ||
507 | # Multimedia devices | ||
508 | # | ||
509 | # CONFIG_VIDEO_DEV is not set | ||
510 | # CONFIG_DVB_CORE is not set | ||
511 | # CONFIG_DAB is not set | ||
512 | |||
513 | # | ||
514 | # Graphics support | ||
515 | # | ||
516 | # CONFIG_VGASTATE is not set | ||
517 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
518 | CONFIG_FB=y | ||
519 | # CONFIG_FIRMWARE_EDID is not set | ||
520 | # CONFIG_FB_DDC is not set | ||
521 | CONFIG_FB_CFB_FILLRECT=y | ||
522 | CONFIG_FB_CFB_COPYAREA=y | ||
523 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
524 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
525 | # CONFIG_FB_SYS_FILLRECT is not set | ||
526 | # CONFIG_FB_SYS_COPYAREA is not set | ||
527 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
528 | # CONFIG_FB_SYS_FOPS is not set | ||
529 | CONFIG_FB_DEFERRED_IO=y | ||
530 | # CONFIG_FB_SVGALIB is not set | ||
531 | # CONFIG_FB_MACMODES is not set | ||
532 | # CONFIG_FB_BACKLIGHT is not set | ||
533 | # CONFIG_FB_MODE_HELPERS is not set | ||
534 | # CONFIG_FB_TILEBLITTING is not set | ||
535 | |||
536 | # | ||
537 | # Frame buffer hardware drivers | ||
538 | # | ||
539 | # CONFIG_FB_S1D13XXX is not set | ||
540 | CONFIG_FB_PXA=y | ||
541 | # CONFIG_FB_PXA_PARAMETERS is not set | ||
542 | # CONFIG_FB_MBX is not set | ||
543 | # CONFIG_FB_VIRTUAL is not set | ||
544 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
545 | |||
546 | # | ||
547 | # Display device support | ||
548 | # | ||
549 | # CONFIG_DISPLAY_SUPPORT is not set | ||
550 | |||
551 | # | ||
552 | # Console display driver support | ||
553 | # | ||
554 | # CONFIG_VGA_CONSOLE is not set | ||
555 | CONFIG_DUMMY_CONSOLE=y | ||
556 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
557 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
558 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
559 | CONFIG_FONTS=y | ||
560 | # CONFIG_FONT_8x8 is not set | ||
561 | CONFIG_FONT_8x16=y | ||
562 | # CONFIG_FONT_6x11 is not set | ||
563 | # CONFIG_FONT_7x14 is not set | ||
564 | # CONFIG_FONT_PEARL_8x8 is not set | ||
565 | # CONFIG_FONT_ACORN_8x8 is not set | ||
566 | # CONFIG_FONT_MINI_4x6 is not set | ||
567 | # CONFIG_FONT_SUN8x16 is not set | ||
568 | # CONFIG_FONT_SUN12x22 is not set | ||
569 | # CONFIG_FONT_10x18 is not set | ||
570 | CONFIG_LOGO=y | ||
571 | CONFIG_LOGO_LINUX_MONO=y | ||
572 | CONFIG_LOGO_LINUX_VGA16=y | ||
573 | CONFIG_LOGO_LINUX_CLUT224=y | ||
574 | |||
575 | # | ||
576 | # Sound | ||
577 | # | ||
578 | # CONFIG_SOUND is not set | ||
579 | # CONFIG_HID_SUPPORT is not set | ||
580 | # CONFIG_USB_SUPPORT is not set | ||
581 | # CONFIG_MMC is not set | ||
582 | # CONFIG_NEW_LEDS is not set | ||
583 | CONFIG_RTC_LIB=y | ||
584 | # CONFIG_RTC_CLASS is not set | ||
585 | |||
586 | # | ||
587 | # File systems | ||
588 | # | ||
589 | # CONFIG_EXT2_FS is not set | ||
590 | # CONFIG_EXT3_FS is not set | ||
591 | # CONFIG_EXT4DEV_FS is not set | ||
592 | # CONFIG_REISERFS_FS is not set | ||
593 | # CONFIG_JFS_FS is not set | ||
594 | CONFIG_FS_POSIX_ACL=y | ||
595 | # CONFIG_XFS_FS is not set | ||
596 | # CONFIG_GFS2_FS is not set | ||
597 | # CONFIG_OCFS2_FS is not set | ||
598 | # CONFIG_MINIX_FS is not set | ||
599 | # CONFIG_ROMFS_FS is not set | ||
600 | # CONFIG_INOTIFY is not set | ||
601 | # CONFIG_QUOTA is not set | ||
602 | # CONFIG_DNOTIFY is not set | ||
603 | # CONFIG_AUTOFS_FS is not set | ||
604 | # CONFIG_AUTOFS4_FS is not set | ||
605 | # CONFIG_FUSE_FS is not set | ||
606 | |||
607 | # | ||
608 | # CD-ROM/DVD Filesystems | ||
609 | # | ||
610 | # CONFIG_ISO9660_FS is not set | ||
611 | # CONFIG_UDF_FS is not set | ||
612 | |||
613 | # | ||
614 | # DOS/FAT/NT Filesystems | ||
615 | # | ||
616 | # CONFIG_MSDOS_FS is not set | ||
617 | # CONFIG_VFAT_FS is not set | ||
618 | # CONFIG_NTFS_FS is not set | ||
619 | |||
620 | # | ||
621 | # Pseudo filesystems | ||
622 | # | ||
623 | CONFIG_PROC_FS=y | ||
624 | CONFIG_PROC_SYSCTL=y | ||
625 | CONFIG_SYSFS=y | ||
626 | # CONFIG_TMPFS is not set | ||
627 | # CONFIG_HUGETLB_PAGE is not set | ||
628 | # CONFIG_CONFIGFS_FS is not set | ||
629 | |||
630 | # | ||
631 | # Miscellaneous filesystems | ||
632 | # | ||
633 | # CONFIG_ADFS_FS is not set | ||
634 | # CONFIG_AFFS_FS is not set | ||
635 | # CONFIG_HFS_FS is not set | ||
636 | # CONFIG_HFSPLUS_FS is not set | ||
637 | # CONFIG_BEFS_FS is not set | ||
638 | # CONFIG_BFS_FS is not set | ||
639 | # CONFIG_EFS_FS is not set | ||
640 | # CONFIG_CRAMFS is not set | ||
641 | # CONFIG_VXFS_FS is not set | ||
642 | # CONFIG_HPFS_FS is not set | ||
643 | # CONFIG_QNX4FS_FS is not set | ||
644 | # CONFIG_SYSV_FS is not set | ||
645 | # CONFIG_UFS_FS is not set | ||
646 | CONFIG_NETWORK_FILESYSTEMS=y | ||
647 | CONFIG_NFS_FS=y | ||
648 | CONFIG_NFS_V3=y | ||
649 | CONFIG_NFS_V3_ACL=y | ||
650 | CONFIG_NFS_V4=y | ||
651 | CONFIG_NFS_DIRECTIO=y | ||
652 | # CONFIG_NFSD is not set | ||
653 | CONFIG_ROOT_NFS=y | ||
654 | CONFIG_LOCKD=y | ||
655 | CONFIG_LOCKD_V4=y | ||
656 | CONFIG_NFS_ACL_SUPPORT=y | ||
657 | CONFIG_NFS_COMMON=y | ||
658 | CONFIG_SUNRPC=y | ||
659 | CONFIG_SUNRPC_GSS=y | ||
660 | # CONFIG_SUNRPC_BIND34 is not set | ||
661 | CONFIG_RPCSEC_GSS_KRB5=y | ||
662 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
663 | # CONFIG_SMB_FS is not set | ||
664 | # CONFIG_CIFS is not set | ||
665 | # CONFIG_NCP_FS is not set | ||
666 | # CONFIG_CODA_FS is not set | ||
667 | # CONFIG_AFS_FS is not set | ||
668 | |||
669 | # | ||
670 | # Partition Types | ||
671 | # | ||
672 | # CONFIG_PARTITION_ADVANCED is not set | ||
673 | CONFIG_MSDOS_PARTITION=y | ||
674 | # CONFIG_NLS is not set | ||
675 | # CONFIG_DLM is not set | ||
676 | # CONFIG_INSTRUMENTATION is not set | ||
677 | |||
678 | # | ||
679 | # Kernel hacking | ||
680 | # | ||
681 | CONFIG_PRINTK_TIME=y | ||
682 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
683 | CONFIG_ENABLE_MUST_CHECK=y | ||
684 | CONFIG_MAGIC_SYSRQ=y | ||
685 | # CONFIG_UNUSED_SYMBOLS is not set | ||
686 | # CONFIG_DEBUG_FS is not set | ||
687 | # CONFIG_HEADERS_CHECK is not set | ||
688 | CONFIG_DEBUG_KERNEL=y | ||
689 | # CONFIG_DEBUG_SHIRQ is not set | ||
690 | CONFIG_DETECT_SOFTLOCKUP=y | ||
691 | CONFIG_SCHED_DEBUG=y | ||
692 | # CONFIG_SCHEDSTATS is not set | ||
693 | # CONFIG_TIMER_STATS is not set | ||
694 | # CONFIG_DEBUG_SLAB is not set | ||
695 | # CONFIG_DEBUG_PREEMPT is not set | ||
696 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
697 | # CONFIG_RT_MUTEX_TESTER is not set | ||
698 | # CONFIG_DEBUG_SPINLOCK is not set | ||
699 | # CONFIG_DEBUG_MUTEXES is not set | ||
700 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
701 | # CONFIG_PROVE_LOCKING is not set | ||
702 | # CONFIG_LOCK_STAT is not set | ||
703 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
704 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
705 | # CONFIG_DEBUG_KOBJECT is not set | ||
706 | CONFIG_DEBUG_BUGVERBOSE=y | ||
707 | CONFIG_DEBUG_INFO=y | ||
708 | # CONFIG_DEBUG_VM is not set | ||
709 | # CONFIG_DEBUG_LIST is not set | ||
710 | # CONFIG_DEBUG_SG is not set | ||
711 | CONFIG_FRAME_POINTER=y | ||
712 | CONFIG_FORCED_INLINING=y | ||
713 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
714 | # CONFIG_RCU_TORTURE_TEST is not set | ||
715 | # CONFIG_FAULT_INJECTION is not set | ||
716 | # CONFIG_SAMPLES is not set | ||
717 | CONFIG_DEBUG_USER=y | ||
718 | CONFIG_DEBUG_ERRORS=y | ||
719 | CONFIG_DEBUG_LL=y | ||
720 | # CONFIG_DEBUG_ICEDCC is not set | ||
721 | |||
722 | # | ||
723 | # Security options | ||
724 | # | ||
725 | # CONFIG_KEYS is not set | ||
726 | # CONFIG_SECURITY is not set | ||
727 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
728 | CONFIG_CRYPTO=y | ||
729 | CONFIG_CRYPTO_ALGAPI=y | ||
730 | CONFIG_CRYPTO_BLKCIPHER=y | ||
731 | CONFIG_CRYPTO_MANAGER=y | ||
732 | # CONFIG_CRYPTO_HMAC is not set | ||
733 | # CONFIG_CRYPTO_XCBC is not set | ||
734 | # CONFIG_CRYPTO_NULL is not set | ||
735 | # CONFIG_CRYPTO_MD4 is not set | ||
736 | CONFIG_CRYPTO_MD5=y | ||
737 | # CONFIG_CRYPTO_SHA1 is not set | ||
738 | # CONFIG_CRYPTO_SHA256 is not set | ||
739 | # CONFIG_CRYPTO_SHA512 is not set | ||
740 | # CONFIG_CRYPTO_WP512 is not set | ||
741 | # CONFIG_CRYPTO_TGR192 is not set | ||
742 | # CONFIG_CRYPTO_GF128MUL is not set | ||
743 | # CONFIG_CRYPTO_ECB is not set | ||
744 | CONFIG_CRYPTO_CBC=y | ||
745 | # CONFIG_CRYPTO_PCBC is not set | ||
746 | # CONFIG_CRYPTO_LRW is not set | ||
747 | # CONFIG_CRYPTO_XTS is not set | ||
748 | # CONFIG_CRYPTO_CRYPTD is not set | ||
749 | CONFIG_CRYPTO_DES=y | ||
750 | # CONFIG_CRYPTO_FCRYPT is not set | ||
751 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
752 | # CONFIG_CRYPTO_TWOFISH is not set | ||
753 | # CONFIG_CRYPTO_SERPENT is not set | ||
754 | # CONFIG_CRYPTO_AES is not set | ||
755 | # CONFIG_CRYPTO_CAST5 is not set | ||
756 | # CONFIG_CRYPTO_CAST6 is not set | ||
757 | # CONFIG_CRYPTO_TEA is not set | ||
758 | # CONFIG_CRYPTO_ARC4 is not set | ||
759 | # CONFIG_CRYPTO_KHAZAD is not set | ||
760 | # CONFIG_CRYPTO_ANUBIS is not set | ||
761 | # CONFIG_CRYPTO_SEED is not set | ||
762 | # CONFIG_CRYPTO_DEFLATE is not set | ||
763 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
764 | # CONFIG_CRYPTO_CRC32C is not set | ||
765 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
766 | # CONFIG_CRYPTO_TEST is not set | ||
767 | # CONFIG_CRYPTO_AUTHENC is not set | ||
768 | CONFIG_CRYPTO_HW=y | ||
769 | |||
770 | # | ||
771 | # Library routines | ||
772 | # | ||
773 | CONFIG_BITREVERSE=y | ||
774 | CONFIG_CRC_CCITT=y | ||
775 | # CONFIG_CRC16 is not set | ||
776 | # CONFIG_CRC_ITU_T is not set | ||
777 | CONFIG_CRC32=y | ||
778 | # CONFIG_CRC7 is not set | ||
779 | # CONFIG_LIBCRC32C is not set | ||
780 | CONFIG_PLIST=y | ||
781 | CONFIG_HAS_IOMEM=y | ||
782 | CONFIG_HAS_IOPORT=y | ||
783 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/msm_defconfig b/arch/arm/configs/msm_defconfig new file mode 100644 index 000000000000..ae4c5e62086a --- /dev/null +++ b/arch/arm/configs/msm_defconfig | |||
@@ -0,0 +1,895 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.23 | ||
4 | # Wed Nov 7 01:36:45 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | # CONFIG_GENERIC_GPIO is not set | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_GENERIC_GPIOS=y | ||
15 | CONFIG_STACKTRACE_SUPPORT=y | ||
16 | CONFIG_LOCKDEP_SUPPORT=y | ||
17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
22 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
23 | CONFIG_GENERIC_HWEIGHT=y | ||
24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
25 | CONFIG_ZONE_DMA=y | ||
26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
28 | |||
29 | # | ||
30 | # General setup | ||
31 | # | ||
32 | CONFIG_EXPERIMENTAL=y | ||
33 | CONFIG_BROKEN_ON_SMP=y | ||
34 | CONFIG_LOCK_KERNEL=y | ||
35 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
36 | CONFIG_LOCALVERSION="" | ||
37 | CONFIG_LOCALVERSION_AUTO=y | ||
38 | CONFIG_SWAP=y | ||
39 | # CONFIG_SYSVIPC is not set | ||
40 | # CONFIG_POSIX_MQUEUE is not set | ||
41 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
42 | # CONFIG_TASKSTATS is not set | ||
43 | # CONFIG_USER_NS is not set | ||
44 | # CONFIG_AUDIT is not set | ||
45 | CONFIG_IKCONFIG=y | ||
46 | CONFIG_IKCONFIG_PROC=y | ||
47 | CONFIG_LOG_BUF_SHIFT=17 | ||
48 | CONFIG_SYSFS_DEPRECATED=y | ||
49 | # CONFIG_RELAY is not set | ||
50 | CONFIG_BLK_DEV_INITRD=y | ||
51 | CONFIG_INITRAMFS_SOURCE="" | ||
52 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
53 | CONFIG_SYSCTL=y | ||
54 | CONFIG_PANIC_TIMEOUT=0 | ||
55 | # CONFIG_EMBEDDED is not set | ||
56 | CONFIG_UID16=y | ||
57 | CONFIG_SYSCTL_SYSCALL=y | ||
58 | CONFIG_KALLSYMS=y | ||
59 | # CONFIG_KALLSYMS_ALL is not set | ||
60 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
61 | CONFIG_HOTPLUG=y | ||
62 | CONFIG_PRINTK=y | ||
63 | CONFIG_BUG=y | ||
64 | CONFIG_ELF_CORE=y | ||
65 | CONFIG_BASE_FULL=y | ||
66 | CONFIG_FUTEX=y | ||
67 | CONFIG_ANON_INODES=y | ||
68 | CONFIG_EPOLL=y | ||
69 | CONFIG_SIGNALFD=y | ||
70 | CONFIG_EVENTFD=y | ||
71 | CONFIG_SHMEM=y | ||
72 | CONFIG_VM_EVENT_COUNTERS=y | ||
73 | CONFIG_SLAB=y | ||
74 | # CONFIG_SLUB is not set | ||
75 | # CONFIG_SLOB is not set | ||
76 | CONFIG_RT_MUTEXES=y | ||
77 | # CONFIG_TINY_SHMEM is not set | ||
78 | CONFIG_BASE_SMALL=0 | ||
79 | # CONFIG_MODULES is not set | ||
80 | CONFIG_BLOCK=y | ||
81 | # CONFIG_LBD is not set | ||
82 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
83 | # CONFIG_LSF is not set | ||
84 | # CONFIG_BLK_DEV_BSG is not set | ||
85 | |||
86 | # | ||
87 | # IO Schedulers | ||
88 | # | ||
89 | CONFIG_IOSCHED_NOOP=y | ||
90 | CONFIG_IOSCHED_AS=y | ||
91 | # CONFIG_IOSCHED_DEADLINE is not set | ||
92 | # CONFIG_IOSCHED_CFQ is not set | ||
93 | CONFIG_DEFAULT_AS=y | ||
94 | # CONFIG_DEFAULT_DEADLINE is not set | ||
95 | # CONFIG_DEFAULT_CFQ is not set | ||
96 | # CONFIG_DEFAULT_NOOP is not set | ||
97 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
98 | |||
99 | # | ||
100 | # System Type | ||
101 | # | ||
102 | # CONFIG_ARCH_AAEC2000 is not set | ||
103 | # CONFIG_ARCH_GOLDFISH is not set | ||
104 | # CONFIG_ARCH_INTEGRATOR is not set | ||
105 | # CONFIG_ARCH_REALVIEW is not set | ||
106 | # CONFIG_ARCH_VERSATILE is not set | ||
107 | # CONFIG_ARCH_AT91 is not set | ||
108 | # CONFIG_ARCH_CLPS7500 is not set | ||
109 | # CONFIG_ARCH_CLPS711X is not set | ||
110 | # CONFIG_ARCH_CO285 is not set | ||
111 | # CONFIG_ARCH_EBSA110 is not set | ||
112 | # CONFIG_ARCH_EP93XX is not set | ||
113 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
114 | # CONFIG_ARCH_NETX is not set | ||
115 | # CONFIG_ARCH_H720X is not set | ||
116 | # CONFIG_ARCH_IMX is not set | ||
117 | # CONFIG_ARCH_IOP13XX is not set | ||
118 | # CONFIG_ARCH_IOP32X is not set | ||
119 | # CONFIG_ARCH_IOP33X is not set | ||
120 | # CONFIG_ARCH_IXP23XX is not set | ||
121 | # CONFIG_ARCH_IXP2000 is not set | ||
122 | # CONFIG_ARCH_IXP4XX is not set | ||
123 | # CONFIG_ARCH_L7200 is not set | ||
124 | # CONFIG_ARCH_KS8695 is not set | ||
125 | # CONFIG_ARCH_NS9XXX is not set | ||
126 | # CONFIG_ARCH_MXC is not set | ||
127 | # CONFIG_ARCH_PNX4008 is not set | ||
128 | # CONFIG_ARCH_PXA is not set | ||
129 | # CONFIG_ARCH_RPC is not set | ||
130 | # CONFIG_ARCH_SA1100 is not set | ||
131 | # CONFIG_ARCH_S3C2410 is not set | ||
132 | # CONFIG_ARCH_SHARK is not set | ||
133 | # CONFIG_ARCH_LH7A40X is not set | ||
134 | # CONFIG_ARCH_DAVINCI is not set | ||
135 | # CONFIG_ARCH_OMAP is not set | ||
136 | CONFIG_ARCH_MSM7X00A=y | ||
137 | |||
138 | # | ||
139 | # Boot options | ||
140 | # | ||
141 | |||
142 | # | ||
143 | # Power management | ||
144 | # | ||
145 | |||
146 | # | ||
147 | # MSM7200 Board Type | ||
148 | # | ||
149 | CONFIG_MACH_HALIBUT=y | ||
150 | CONFIG_SERIAL_MSM=y | ||
151 | CONFIG_SERIAL_MSM_CONSOLE=y | ||
152 | # CONFIG_SERIAL_MSM_NOINIT is not set | ||
153 | CONFIG_MSM_SMD=y | ||
154 | |||
155 | # | ||
156 | # Processor Type | ||
157 | # | ||
158 | CONFIG_CPU_32=y | ||
159 | CONFIG_CPU_V6=y | ||
160 | # CONFIG_CPU_32v6K is not set | ||
161 | CONFIG_CPU_32v6=y | ||
162 | CONFIG_CPU_ABRT_EV6=y | ||
163 | CONFIG_CPU_CACHE_V6=y | ||
164 | CONFIG_CPU_CACHE_VIPT=y | ||
165 | CONFIG_CPU_COPY_V6=y | ||
166 | CONFIG_CPU_TLB_V6=y | ||
167 | CONFIG_CPU_HAS_ASID=y | ||
168 | CONFIG_CPU_CP15=y | ||
169 | CONFIG_CPU_CP15_MMU=y | ||
170 | |||
171 | # | ||
172 | # Processor Features | ||
173 | # | ||
174 | CONFIG_ARM_THUMB=y | ||
175 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
176 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
177 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
178 | # CONFIG_OUTER_CACHE is not set | ||
179 | |||
180 | # | ||
181 | # Bus support | ||
182 | # | ||
183 | # CONFIG_PCI_SYSCALL is not set | ||
184 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
185 | |||
186 | # | ||
187 | # PCCARD (PCMCIA/CardBus) support | ||
188 | # | ||
189 | # CONFIG_PCCARD is not set | ||
190 | |||
191 | # | ||
192 | # Kernel Features | ||
193 | # | ||
194 | CONFIG_TICK_ONESHOT=y | ||
195 | CONFIG_NO_HZ=y | ||
196 | CONFIG_HIGH_RES_TIMERS=y | ||
197 | CONFIG_PREEMPT=y | ||
198 | CONFIG_HZ=100 | ||
199 | CONFIG_AEABI=y | ||
200 | # CONFIG_OABI_COMPAT is not set | ||
201 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
202 | CONFIG_SELECT_MEMORY_MODEL=y | ||
203 | CONFIG_FLATMEM_MANUAL=y | ||
204 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
205 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
206 | CONFIG_FLATMEM=y | ||
207 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
208 | # CONFIG_SPARSEMEM_STATIC is not set | ||
209 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
210 | CONFIG_RESOURCES_64BIT=y | ||
211 | CONFIG_ZONE_DMA_FLAG=1 | ||
212 | CONFIG_BOUNCE=y | ||
213 | CONFIG_VIRT_TO_BUS=y | ||
214 | CONFIG_ALIGNMENT_TRAP=y | ||
215 | |||
216 | # | ||
217 | # Boot options | ||
218 | # | ||
219 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
220 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
221 | CONFIG_CMDLINE="mem=64M console=ttyMSM,115200n8" | ||
222 | # CONFIG_XIP_KERNEL is not set | ||
223 | # CONFIG_KEXEC is not set | ||
224 | |||
225 | # | ||
226 | # Floating point emulation | ||
227 | # | ||
228 | |||
229 | # | ||
230 | # At least one emulation must be selected | ||
231 | # | ||
232 | # CONFIG_VFP is not set | ||
233 | |||
234 | # | ||
235 | # Userspace binary formats | ||
236 | # | ||
237 | CONFIG_BINFMT_ELF=y | ||
238 | # CONFIG_BINFMT_AOUT is not set | ||
239 | # CONFIG_BINFMT_MISC is not set | ||
240 | |||
241 | # | ||
242 | # Power management options | ||
243 | # | ||
244 | CONFIG_PM=y | ||
245 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
246 | |||
247 | # | ||
248 | # Networking | ||
249 | # | ||
250 | CONFIG_NET=y | ||
251 | |||
252 | # | ||
253 | # Networking options | ||
254 | # | ||
255 | # CONFIG_PACKET is not set | ||
256 | CONFIG_UNIX=y | ||
257 | # CONFIG_NET_KEY is not set | ||
258 | CONFIG_INET=y | ||
259 | # CONFIG_IP_MULTICAST is not set | ||
260 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
261 | CONFIG_IP_FIB_HASH=y | ||
262 | # CONFIG_IP_PNP is not set | ||
263 | # CONFIG_NET_IPIP is not set | ||
264 | # CONFIG_NET_IPGRE is not set | ||
265 | # CONFIG_ARPD is not set | ||
266 | # CONFIG_SYN_COOKIES is not set | ||
267 | # CONFIG_INET_AH is not set | ||
268 | # CONFIG_INET_ESP is not set | ||
269 | # CONFIG_INET_IPCOMP is not set | ||
270 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
271 | # CONFIG_INET_TUNNEL is not set | ||
272 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
273 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
274 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
275 | # CONFIG_INET_DIAG is not set | ||
276 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
277 | CONFIG_TCP_CONG_CUBIC=y | ||
278 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
279 | # CONFIG_TCP_MD5SIG is not set | ||
280 | # CONFIG_IPV6 is not set | ||
281 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
282 | # CONFIG_INET6_TUNNEL is not set | ||
283 | # CONFIG_NETWORK_SECMARK is not set | ||
284 | # CONFIG_NETFILTER is not set | ||
285 | # CONFIG_IP_DCCP is not set | ||
286 | # CONFIG_IP_SCTP is not set | ||
287 | # CONFIG_TIPC is not set | ||
288 | # CONFIG_ATM is not set | ||
289 | # CONFIG_BRIDGE is not set | ||
290 | # CONFIG_VLAN_8021Q is not set | ||
291 | # CONFIG_DECNET is not set | ||
292 | # CONFIG_LLC2 is not set | ||
293 | # CONFIG_IPX is not set | ||
294 | # CONFIG_ATALK is not set | ||
295 | # CONFIG_X25 is not set | ||
296 | # CONFIG_LAPB is not set | ||
297 | # CONFIG_ECONET is not set | ||
298 | # CONFIG_WAN_ROUTER is not set | ||
299 | |||
300 | # | ||
301 | # QoS and/or fair queueing | ||
302 | # | ||
303 | # CONFIG_NET_SCHED is not set | ||
304 | |||
305 | # | ||
306 | # Network testing | ||
307 | # | ||
308 | # CONFIG_NET_PKTGEN is not set | ||
309 | # CONFIG_HAMRADIO is not set | ||
310 | # CONFIG_IRDA is not set | ||
311 | # CONFIG_BT is not set | ||
312 | # CONFIG_AF_RXRPC is not set | ||
313 | |||
314 | # | ||
315 | # Wireless | ||
316 | # | ||
317 | # CONFIG_CFG80211 is not set | ||
318 | # CONFIG_WIRELESS_EXT is not set | ||
319 | # CONFIG_MAC80211 is not set | ||
320 | # CONFIG_IEEE80211 is not set | ||
321 | # CONFIG_RFKILL is not set | ||
322 | # CONFIG_NET_9P is not set | ||
323 | |||
324 | # | ||
325 | # Device Drivers | ||
326 | # | ||
327 | |||
328 | # | ||
329 | # Generic Driver Options | ||
330 | # | ||
331 | CONFIG_STANDALONE=y | ||
332 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
333 | CONFIG_FW_LOADER=y | ||
334 | # CONFIG_DEBUG_DRIVER is not set | ||
335 | # CONFIG_DEBUG_DEVRES is not set | ||
336 | # CONFIG_SYS_HYPERVISOR is not set | ||
337 | # CONFIG_CONNECTOR is not set | ||
338 | CONFIG_MTD=y | ||
339 | # CONFIG_MTD_DEBUG is not set | ||
340 | # CONFIG_MTD_CONCAT is not set | ||
341 | CONFIG_MTD_PARTITIONS=y | ||
342 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
343 | CONFIG_MTD_CMDLINE_PARTS=y | ||
344 | # CONFIG_MTD_AFS_PARTS is not set | ||
345 | |||
346 | # | ||
347 | # User Modules And Translation Layers | ||
348 | # | ||
349 | CONFIG_MTD_CHAR=y | ||
350 | CONFIG_MTD_BLKDEVS=y | ||
351 | CONFIG_MTD_BLOCK=y | ||
352 | # CONFIG_FTL is not set | ||
353 | # CONFIG_NFTL is not set | ||
354 | # CONFIG_INFTL is not set | ||
355 | # CONFIG_RFD_FTL is not set | ||
356 | # CONFIG_SSFDC is not set | ||
357 | |||
358 | # | ||
359 | # RAM/ROM/Flash chip drivers | ||
360 | # | ||
361 | # CONFIG_MTD_CFI is not set | ||
362 | # CONFIG_MTD_JEDECPROBE is not set | ||
363 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
364 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
365 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
366 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
367 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
368 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
369 | CONFIG_MTD_CFI_I1=y | ||
370 | CONFIG_MTD_CFI_I2=y | ||
371 | # CONFIG_MTD_CFI_I4 is not set | ||
372 | # CONFIG_MTD_CFI_I8 is not set | ||
373 | # CONFIG_MTD_RAM is not set | ||
374 | # CONFIG_MTD_ROM is not set | ||
375 | # CONFIG_MTD_ABSENT is not set | ||
376 | |||
377 | # | ||
378 | # Mapping drivers for chip access | ||
379 | # | ||
380 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
381 | # CONFIG_MTD_PLATRAM is not set | ||
382 | |||
383 | # | ||
384 | # Self-contained MTD device drivers | ||
385 | # | ||
386 | # CONFIG_MTD_SLRAM is not set | ||
387 | # CONFIG_MTD_PHRAM is not set | ||
388 | # CONFIG_MTD_MTDRAM is not set | ||
389 | # CONFIG_MTD_BLOCK2MTD is not set | ||
390 | CONFIG_MTD_MSM_NAND=y | ||
391 | |||
392 | # | ||
393 | # Disk-On-Chip Device Drivers | ||
394 | # | ||
395 | # CONFIG_MTD_DOC2000 is not set | ||
396 | # CONFIG_MTD_DOC2001 is not set | ||
397 | # CONFIG_MTD_DOC2001PLUS is not set | ||
398 | # CONFIG_MTD_GOLDFISH_NAND is not set | ||
399 | # CONFIG_MTD_NAND is not set | ||
400 | # CONFIG_MTD_ONENAND is not set | ||
401 | |||
402 | # | ||
403 | # UBI - Unsorted block images | ||
404 | # | ||
405 | # CONFIG_MTD_UBI is not set | ||
406 | # CONFIG_PARPORT is not set | ||
407 | CONFIG_BLK_DEV=y | ||
408 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
409 | # CONFIG_BLK_DEV_LOOP is not set | ||
410 | # CONFIG_BLK_DEV_NBD is not set | ||
411 | # CONFIG_BLK_DEV_RAM is not set | ||
412 | # CONFIG_CDROM_PKTCDVD is not set | ||
413 | # CONFIG_ATA_OVER_ETH is not set | ||
414 | |||
415 | # | ||
416 | # SCSI device support | ||
417 | # | ||
418 | # CONFIG_RAID_ATTRS is not set | ||
419 | # CONFIG_SCSI is not set | ||
420 | # CONFIG_SCSI_DMA is not set | ||
421 | # CONFIG_SCSI_NETLINK is not set | ||
422 | # CONFIG_ATA is not set | ||
423 | # CONFIG_MD is not set | ||
424 | CONFIG_NETDEVICES=y | ||
425 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
426 | CONFIG_DUMMY=y | ||
427 | # CONFIG_BONDING is not set | ||
428 | # CONFIG_MACVLAN is not set | ||
429 | # CONFIG_EQUALIZER is not set | ||
430 | # CONFIG_TUN is not set | ||
431 | # CONFIG_PHYLIB is not set | ||
432 | CONFIG_NET_ETHERNET=y | ||
433 | CONFIG_MII=y | ||
434 | # CONFIG_AX88796 is not set | ||
435 | CONFIG_SMC91X=y | ||
436 | # CONFIG_DM9000 is not set | ||
437 | CONFIG_NETDEV_1000=y | ||
438 | CONFIG_NETDEV_10000=y | ||
439 | |||
440 | # | ||
441 | # Wireless LAN | ||
442 | # | ||
443 | # CONFIG_WLAN_PRE80211 is not set | ||
444 | # CONFIG_WLAN_80211 is not set | ||
445 | # CONFIG_WAN is not set | ||
446 | CONFIG_PPP=y | ||
447 | # CONFIG_PPP_MULTILINK is not set | ||
448 | # CONFIG_PPP_FILTER is not set | ||
449 | CONFIG_PPP_ASYNC=y | ||
450 | # CONFIG_PPP_SYNC_TTY is not set | ||
451 | CONFIG_PPP_DEFLATE=y | ||
452 | CONFIG_PPP_BSDCOMP=y | ||
453 | # CONFIG_PPP_MPPE is not set | ||
454 | # CONFIG_PPPOE is not set | ||
455 | # CONFIG_PPPOL2TP is not set | ||
456 | # CONFIG_SLIP is not set | ||
457 | CONFIG_SLHC=y | ||
458 | # CONFIG_SHAPER is not set | ||
459 | # CONFIG_NETCONSOLE is not set | ||
460 | CONFIG_MSM_RMNET=y | ||
461 | # CONFIG_NETPOLL is not set | ||
462 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
463 | # CONFIG_ISDN is not set | ||
464 | |||
465 | # | ||
466 | # Input device support | ||
467 | # | ||
468 | CONFIG_INPUT=y | ||
469 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
470 | # CONFIG_INPUT_POLLDEV is not set | ||
471 | |||
472 | # | ||
473 | # Userland interfaces | ||
474 | # | ||
475 | CONFIG_INPUT_MOUSEDEV=y | ||
476 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
477 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
478 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
479 | # CONFIG_INPUT_JOYDEV is not set | ||
480 | # CONFIG_INPUT_TSDEV is not set | ||
481 | CONFIG_INPUT_EVDEV=y | ||
482 | # CONFIG_INPUT_EVBUG is not set | ||
483 | |||
484 | # | ||
485 | # Input Device Drivers | ||
486 | # | ||
487 | CONFIG_INPUT_KEYBOARD=y | ||
488 | # CONFIG_KEYBOARD_ATKBD is not set | ||
489 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
490 | # CONFIG_KEYBOARD_LKKBD is not set | ||
491 | # CONFIG_KEYBOARD_XTKBD is not set | ||
492 | # CONFIG_KEYBOARD_NEWTON is not set | ||
493 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
494 | # CONFIG_KEYBOARD_GOLDFISH_EVENTS is not set | ||
495 | # CONFIG_INPUT_MOUSE is not set | ||
496 | # CONFIG_INPUT_JOYSTICK is not set | ||
497 | # CONFIG_INPUT_TABLET is not set | ||
498 | CONFIG_INPUT_TOUCHSCREEN=y | ||
499 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
500 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
501 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
502 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
503 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
504 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
505 | # CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_MEP is not set | ||
506 | CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI=y | ||
507 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
508 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
509 | # CONFIG_TOUCHSCREEN_UCB1400 is not set | ||
510 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
511 | CONFIG_INPUT_MISC=y | ||
512 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
513 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
514 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
515 | # CONFIG_INPUT_POWERMATE is not set | ||
516 | # CONFIG_INPUT_YEALINK is not set | ||
517 | # CONFIG_INPUT_UINPUT is not set | ||
518 | CONFIG_INPUT_GPIO=y | ||
519 | |||
520 | # | ||
521 | # Hardware I/O ports | ||
522 | # | ||
523 | # CONFIG_SERIO is not set | ||
524 | # CONFIG_GAMEPORT is not set | ||
525 | |||
526 | # | ||
527 | # Character devices | ||
528 | # | ||
529 | CONFIG_VT=y | ||
530 | CONFIG_VT_CONSOLE=y | ||
531 | CONFIG_HW_CONSOLE=y | ||
532 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
533 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
534 | |||
535 | # | ||
536 | # Serial drivers | ||
537 | # | ||
538 | # CONFIG_SERIAL_8250 is not set | ||
539 | |||
540 | # | ||
541 | # Non-8250 serial port support | ||
542 | # | ||
543 | CONFIG_SERIAL_CORE=y | ||
544 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
545 | CONFIG_UNIX98_PTYS=y | ||
546 | # CONFIG_LEGACY_PTYS is not set | ||
547 | # CONFIG_IPMI_HANDLER is not set | ||
548 | # CONFIG_WATCHDOG is not set | ||
549 | # CONFIG_HW_RANDOM is not set | ||
550 | # CONFIG_NVRAM is not set | ||
551 | # CONFIG_R3964 is not set | ||
552 | # CONFIG_RAW_DRIVER is not set | ||
553 | # CONFIG_TCG_TPM is not set | ||
554 | CONFIG_DCC_TTY=y | ||
555 | # CONFIG_GOLDFISH_TTY is not set | ||
556 | CONFIG_BINDER=y | ||
557 | CONFIG_I2C=y | ||
558 | CONFIG_I2C_BOARDINFO=y | ||
559 | # CONFIG_I2C_CHARDEV is not set | ||
560 | |||
561 | # | ||
562 | # I2C Algorithms | ||
563 | # | ||
564 | # CONFIG_I2C_ALGOBIT is not set | ||
565 | # CONFIG_I2C_ALGOPCF is not set | ||
566 | # CONFIG_I2C_ALGOPCA is not set | ||
567 | |||
568 | # | ||
569 | # I2C Hardware Bus support | ||
570 | # | ||
571 | CONFIG_I2C_MSM=y | ||
572 | # CONFIG_I2C_OCORES is not set | ||
573 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
574 | # CONFIG_I2C_SIMTEC is not set | ||
575 | # CONFIG_I2C_TAOS_EVM is not set | ||
576 | |||
577 | # | ||
578 | # Miscellaneous I2C Chip support | ||
579 | # | ||
580 | # CONFIG_SENSORS_DS1337 is not set | ||
581 | # CONFIG_SENSORS_DS1374 is not set | ||
582 | # CONFIG_DS1682 is not set | ||
583 | # CONFIG_SENSORS_EEPROM is not set | ||
584 | # CONFIG_SENSORS_PCF8574 is not set | ||
585 | # CONFIG_SENSORS_PCA9539 is not set | ||
586 | CONFIG_SENSORS_PCA9633=y | ||
587 | # CONFIG_SENSORS_PCF8591 is not set | ||
588 | # CONFIG_SENSORS_MAX6875 is not set | ||
589 | CONFIG_SENSORS_AKM8976=y | ||
590 | # CONFIG_SENSORS_TSL2550 is not set | ||
591 | # CONFIG_I2C_DEBUG_CORE is not set | ||
592 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
593 | # CONFIG_I2C_DEBUG_BUS is not set | ||
594 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
595 | |||
596 | # | ||
597 | # SPI support | ||
598 | # | ||
599 | # CONFIG_SPI is not set | ||
600 | # CONFIG_SPI_MASTER is not set | ||
601 | # CONFIG_W1 is not set | ||
602 | # CONFIG_HWMON is not set | ||
603 | CONFIG_MISC_DEVICES=y | ||
604 | # CONFIG_EEPROM_93CX6 is not set | ||
605 | CONFIG_LOW_MEMORY_KILLER=y | ||
606 | |||
607 | # | ||
608 | # Multifunction device drivers | ||
609 | # | ||
610 | # CONFIG_MFD_SM501 is not set | ||
611 | CONFIG_NEW_LEDS=y | ||
612 | CONFIG_LEDS_CLASS=y | ||
613 | |||
614 | # | ||
615 | # Multimedia devices | ||
616 | # | ||
617 | # CONFIG_VIDEO_DEV is not set | ||
618 | # CONFIG_DVB_CORE is not set | ||
619 | CONFIG_DAB=y | ||
620 | |||
621 | # | ||
622 | # Graphics support | ||
623 | # | ||
624 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
625 | |||
626 | # | ||
627 | # Display device support | ||
628 | # | ||
629 | # CONFIG_DISPLAY_SUPPORT is not set | ||
630 | # CONFIG_VGASTATE is not set | ||
631 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
632 | CONFIG_FB=y | ||
633 | # CONFIG_FIRMWARE_EDID is not set | ||
634 | # CONFIG_FB_DDC is not set | ||
635 | CONFIG_FB_CFB_FILLRECT=y | ||
636 | CONFIG_FB_CFB_COPYAREA=y | ||
637 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
638 | # CONFIG_FB_SYS_FILLRECT is not set | ||
639 | # CONFIG_FB_SYS_COPYAREA is not set | ||
640 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
641 | # CONFIG_FB_SYS_FOPS is not set | ||
642 | CONFIG_FB_DEFERRED_IO=y | ||
643 | # CONFIG_FB_SVGALIB is not set | ||
644 | # CONFIG_FB_MACMODES is not set | ||
645 | # CONFIG_FB_BACKLIGHT is not set | ||
646 | CONFIG_FB_MODE_HELPERS=y | ||
647 | CONFIG_FB_TILEBLITTING=y | ||
648 | |||
649 | # | ||
650 | # Frame buffer hardware drivers | ||
651 | # | ||
652 | # CONFIG_FB_S1D13XXX is not set | ||
653 | CONFIG_FB_MSM=y | ||
654 | # CONFIG_FB_GOLDFISH is not set | ||
655 | # CONFIG_FB_VIRTUAL is not set | ||
656 | |||
657 | # | ||
658 | # Console display driver support | ||
659 | # | ||
660 | # CONFIG_VGA_CONSOLE is not set | ||
661 | CONFIG_DUMMY_CONSOLE=y | ||
662 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
663 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
664 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
665 | # CONFIG_FONTS is not set | ||
666 | CONFIG_FONT_8x8=y | ||
667 | CONFIG_FONT_8x16=y | ||
668 | # CONFIG_LOGO is not set | ||
669 | |||
670 | # | ||
671 | # Sound | ||
672 | # | ||
673 | # CONFIG_SOUND is not set | ||
674 | CONFIG_HID_SUPPORT=y | ||
675 | CONFIG_HID=y | ||
676 | # CONFIG_HID_DEBUG is not set | ||
677 | CONFIG_USB_SUPPORT=y | ||
678 | CONFIG_USB_ARCH_HAS_HCD=y | ||
679 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
680 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
681 | # CONFIG_USB is not set | ||
682 | |||
683 | # | ||
684 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
685 | # | ||
686 | |||
687 | # | ||
688 | # USB Gadget Support | ||
689 | # | ||
690 | # CONFIG_USB_GADGET is not set | ||
691 | |||
692 | # | ||
693 | # USB Function Support | ||
694 | # | ||
695 | CONFIG_USB_FUNCTION=y | ||
696 | CONFIG_USB_FUNCTION_MSM_HSUSB=y | ||
697 | # CONFIG_USB_FUNCTION_NULL is not set | ||
698 | # CONFIG_USB_FUNCTION_ZERO is not set | ||
699 | # CONFIG_USB_FUNCTION_LOOPBACK is not set | ||
700 | CONFIG_USB_FUNCTION_ADB=y | ||
701 | # CONFIG_MMC is not set | ||
702 | CONFIG_RTC_LIB=y | ||
703 | # CONFIG_RTC_CLASS is not set | ||
704 | |||
705 | # | ||
706 | # DMA Engine support | ||
707 | # | ||
708 | # CONFIG_DMA_ENGINE is not set | ||
709 | |||
710 | # | ||
711 | # DMA Clients | ||
712 | # | ||
713 | |||
714 | # | ||
715 | # DMA Devices | ||
716 | # | ||
717 | |||
718 | # | ||
719 | # Android | ||
720 | # | ||
721 | # CONFIG_ANDROID_GADGET is not set | ||
722 | # CONFIG_ANDROID_RAM_CONSOLE is not set | ||
723 | CONFIG_ANDROID_LOGGER=y | ||
724 | CONFIG_ANDROID_VIBRATOR=y | ||
725 | |||
726 | # | ||
727 | # File systems | ||
728 | # | ||
729 | # CONFIG_EXT2_FS is not set | ||
730 | # CONFIG_EXT3_FS is not set | ||
731 | # CONFIG_EXT4DEV_FS is not set | ||
732 | # CONFIG_REISERFS_FS is not set | ||
733 | # CONFIG_JFS_FS is not set | ||
734 | # CONFIG_FS_POSIX_ACL is not set | ||
735 | # CONFIG_XFS_FS is not set | ||
736 | # CONFIG_GFS2_FS is not set | ||
737 | # CONFIG_OCFS2_FS is not set | ||
738 | # CONFIG_MINIX_FS is not set | ||
739 | # CONFIG_ROMFS_FS is not set | ||
740 | CONFIG_INOTIFY=y | ||
741 | CONFIG_INOTIFY_USER=y | ||
742 | # CONFIG_QUOTA is not set | ||
743 | CONFIG_DNOTIFY=y | ||
744 | # CONFIG_AUTOFS_FS is not set | ||
745 | # CONFIG_AUTOFS4_FS is not set | ||
746 | # CONFIG_FUSE_FS is not set | ||
747 | |||
748 | # | ||
749 | # CD-ROM/DVD Filesystems | ||
750 | # | ||
751 | # CONFIG_ISO9660_FS is not set | ||
752 | # CONFIG_UDF_FS is not set | ||
753 | |||
754 | # | ||
755 | # DOS/FAT/NT Filesystems | ||
756 | # | ||
757 | # CONFIG_MSDOS_FS is not set | ||
758 | # CONFIG_VFAT_FS is not set | ||
759 | # CONFIG_NTFS_FS is not set | ||
760 | |||
761 | # | ||
762 | # Pseudo filesystems | ||
763 | # | ||
764 | CONFIG_PROC_FS=y | ||
765 | CONFIG_PROC_SYSCTL=y | ||
766 | CONFIG_SYSFS=y | ||
767 | CONFIG_TMPFS=y | ||
768 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
769 | # CONFIG_HUGETLB_PAGE is not set | ||
770 | CONFIG_RAMFS=y | ||
771 | # CONFIG_CONFIGFS_FS is not set | ||
772 | |||
773 | # | ||
774 | # Miscellaneous filesystems | ||
775 | # | ||
776 | # CONFIG_ADFS_FS is not set | ||
777 | # CONFIG_AFFS_FS is not set | ||
778 | # CONFIG_HFS_FS is not set | ||
779 | # CONFIG_HFSPLUS_FS is not set | ||
780 | # CONFIG_BEFS_FS is not set | ||
781 | # CONFIG_BFS_FS is not set | ||
782 | # CONFIG_EFS_FS is not set | ||
783 | CONFIG_YAFFS_FS=y | ||
784 | CONFIG_YAFFS_YAFFS1=y | ||
785 | # CONFIG_YAFFS_9BYTE_TAGS is not set | ||
786 | # CONFIG_YAFFS_DOES_ECC is not set | ||
787 | CONFIG_YAFFS_YAFFS2=y | ||
788 | CONFIG_YAFFS_AUTO_YAFFS2=y | ||
789 | # CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set | ||
790 | CONFIG_YAFFS_CHECKPOINT_RESERVED_BLOCKS=10 | ||
791 | # CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set | ||
792 | # CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set | ||
793 | CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y | ||
794 | # CONFIG_JFFS2_FS is not set | ||
795 | # CONFIG_CRAMFS is not set | ||
796 | # CONFIG_VXFS_FS is not set | ||
797 | # CONFIG_HPFS_FS is not set | ||
798 | # CONFIG_QNX4FS_FS is not set | ||
799 | # CONFIG_SYSV_FS is not set | ||
800 | # CONFIG_UFS_FS is not set | ||
801 | |||
802 | # | ||
803 | # Network File Systems | ||
804 | # | ||
805 | # CONFIG_NFS_FS is not set | ||
806 | # CONFIG_NFSD is not set | ||
807 | # CONFIG_SMB_FS is not set | ||
808 | # CONFIG_CIFS is not set | ||
809 | # CONFIG_NCP_FS is not set | ||
810 | # CONFIG_CODA_FS is not set | ||
811 | # CONFIG_AFS_FS is not set | ||
812 | |||
813 | # | ||
814 | # Partition Types | ||
815 | # | ||
816 | # CONFIG_PARTITION_ADVANCED is not set | ||
817 | CONFIG_MSDOS_PARTITION=y | ||
818 | |||
819 | # | ||
820 | # Native Language Support | ||
821 | # | ||
822 | # CONFIG_NLS is not set | ||
823 | |||
824 | # | ||
825 | # Distributed Lock Manager | ||
826 | # | ||
827 | # CONFIG_DLM is not set | ||
828 | |||
829 | # | ||
830 | # Profiling support | ||
831 | # | ||
832 | # CONFIG_PROFILING is not set | ||
833 | |||
834 | # | ||
835 | # Kernel hacking | ||
836 | # | ||
837 | # CONFIG_PRINTK_TIME is not set | ||
838 | CONFIG_ENABLE_MUST_CHECK=y | ||
839 | CONFIG_MAGIC_SYSRQ=y | ||
840 | # CONFIG_UNUSED_SYMBOLS is not set | ||
841 | # CONFIG_DEBUG_FS is not set | ||
842 | # CONFIG_HEADERS_CHECK is not set | ||
843 | CONFIG_DEBUG_KERNEL=y | ||
844 | # CONFIG_DEBUG_SHIRQ is not set | ||
845 | CONFIG_DETECT_SOFTLOCKUP=y | ||
846 | CONFIG_SCHED_DEBUG=y | ||
847 | CONFIG_SCHEDSTATS=y | ||
848 | # CONFIG_TIMER_STATS is not set | ||
849 | # CONFIG_DEBUG_SLAB is not set | ||
850 | CONFIG_DEBUG_PREEMPT=y | ||
851 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
852 | # CONFIG_RT_MUTEX_TESTER is not set | ||
853 | # CONFIG_DEBUG_SPINLOCK is not set | ||
854 | CONFIG_DEBUG_MUTEXES=y | ||
855 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
856 | # CONFIG_PROVE_LOCKING is not set | ||
857 | # CONFIG_LOCK_STAT is not set | ||
858 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
859 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
860 | # CONFIG_DEBUG_KOBJECT is not set | ||
861 | CONFIG_DEBUG_BUGVERBOSE=y | ||
862 | CONFIG_DEBUG_INFO=y | ||
863 | # CONFIG_DEBUG_VM is not set | ||
864 | # CONFIG_DEBUG_LIST is not set | ||
865 | CONFIG_FRAME_POINTER=y | ||
866 | # CONFIG_FORCED_INLINING is not set | ||
867 | # CONFIG_FAULT_INJECTION is not set | ||
868 | # CONFIG_DEBUG_USER is not set | ||
869 | # CONFIG_DEBUG_ERRORS is not set | ||
870 | CONFIG_DEBUG_LL=y | ||
871 | # CONFIG_DEBUG_ICEDCC is not set | ||
872 | |||
873 | # | ||
874 | # Security options | ||
875 | # | ||
876 | # CONFIG_KEYS is not set | ||
877 | # CONFIG_SECURITY is not set | ||
878 | # CONFIG_CRYPTO is not set | ||
879 | |||
880 | # | ||
881 | # Library routines | ||
882 | # | ||
883 | CONFIG_BITREVERSE=y | ||
884 | CONFIG_CRC_CCITT=y | ||
885 | # CONFIG_CRC16 is not set | ||
886 | # CONFIG_CRC_ITU_T is not set | ||
887 | CONFIG_CRC32=y | ||
888 | # CONFIG_CRC7 is not set | ||
889 | # CONFIG_LIBCRC32C is not set | ||
890 | CONFIG_ZLIB_INFLATE=y | ||
891 | CONFIG_ZLIB_DEFLATE=y | ||
892 | CONFIG_PLIST=y | ||
893 | CONFIG_HAS_IOMEM=y | ||
894 | CONFIG_HAS_IOPORT=y | ||
895 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/orion_defconfig b/arch/arm/configs/orion_defconfig new file mode 100644 index 000000000000..17a55def1103 --- /dev/null +++ b/arch/arm/configs/orion_defconfig | |||
@@ -0,0 +1,1384 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.24-rc3 | ||
4 | # Wed Nov 28 15:13:57 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_VECTORS_BASE=0xffff0000 | ||
26 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
27 | |||
28 | # | ||
29 | # General setup | ||
30 | # | ||
31 | CONFIG_EXPERIMENTAL=y | ||
32 | CONFIG_BROKEN_ON_SMP=y | ||
33 | CONFIG_LOCK_KERNEL=y | ||
34 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
35 | CONFIG_LOCALVERSION="" | ||
36 | CONFIG_LOCALVERSION_AUTO=y | ||
37 | CONFIG_SWAP=y | ||
38 | CONFIG_SYSVIPC=y | ||
39 | CONFIG_SYSVIPC_SYSCTL=y | ||
40 | # CONFIG_POSIX_MQUEUE is not set | ||
41 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
42 | # CONFIG_TASKSTATS is not set | ||
43 | # CONFIG_USER_NS is not set | ||
44 | # CONFIG_PID_NS is not set | ||
45 | # CONFIG_AUDIT is not set | ||
46 | # CONFIG_IKCONFIG is not set | ||
47 | CONFIG_LOG_BUF_SHIFT=14 | ||
48 | # CONFIG_CGROUPS is not set | ||
49 | CONFIG_FAIR_GROUP_SCHED=y | ||
50 | CONFIG_FAIR_USER_SCHED=y | ||
51 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
52 | CONFIG_SYSFS_DEPRECATED=y | ||
53 | # CONFIG_RELAY is not set | ||
54 | # CONFIG_BLK_DEV_INITRD is not set | ||
55 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
56 | CONFIG_SYSCTL=y | ||
57 | CONFIG_EMBEDDED=y | ||
58 | CONFIG_UID16=y | ||
59 | CONFIG_SYSCTL_SYSCALL=y | ||
60 | CONFIG_KALLSYMS=y | ||
61 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
62 | CONFIG_HOTPLUG=y | ||
63 | CONFIG_PRINTK=y | ||
64 | CONFIG_BUG=y | ||
65 | CONFIG_ELF_CORE=y | ||
66 | CONFIG_BASE_FULL=y | ||
67 | CONFIG_FUTEX=y | ||
68 | CONFIG_ANON_INODES=y | ||
69 | CONFIG_EPOLL=y | ||
70 | CONFIG_SIGNALFD=y | ||
71 | CONFIG_EVENTFD=y | ||
72 | CONFIG_SHMEM=y | ||
73 | CONFIG_VM_EVENT_COUNTERS=y | ||
74 | CONFIG_SLAB=y | ||
75 | # CONFIG_SLUB is not set | ||
76 | # CONFIG_SLOB is not set | ||
77 | CONFIG_RT_MUTEXES=y | ||
78 | # CONFIG_TINY_SHMEM is not set | ||
79 | CONFIG_BASE_SMALL=0 | ||
80 | CONFIG_MODULES=y | ||
81 | CONFIG_MODULE_UNLOAD=y | ||
82 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
83 | # CONFIG_MODVERSIONS is not set | ||
84 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
85 | # CONFIG_KMOD is not set | ||
86 | CONFIG_BLOCK=y | ||
87 | # CONFIG_LBD is not set | ||
88 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
89 | # CONFIG_LSF is not set | ||
90 | # CONFIG_BLK_DEV_BSG is not set | ||
91 | |||
92 | # | ||
93 | # IO Schedulers | ||
94 | # | ||
95 | CONFIG_IOSCHED_NOOP=y | ||
96 | CONFIG_IOSCHED_AS=y | ||
97 | CONFIG_IOSCHED_DEADLINE=y | ||
98 | CONFIG_IOSCHED_CFQ=y | ||
99 | # CONFIG_DEFAULT_AS is not set | ||
100 | # CONFIG_DEFAULT_DEADLINE is not set | ||
101 | CONFIG_DEFAULT_CFQ=y | ||
102 | # CONFIG_DEFAULT_NOOP is not set | ||
103 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
104 | |||
105 | # | ||
106 | # System Type | ||
107 | # | ||
108 | # CONFIG_ARCH_AAEC2000 is not set | ||
109 | # CONFIG_ARCH_INTEGRATOR is not set | ||
110 | # CONFIG_ARCH_REALVIEW is not set | ||
111 | # CONFIG_ARCH_VERSATILE is not set | ||
112 | # CONFIG_ARCH_AT91 is not set | ||
113 | # CONFIG_ARCH_CLPS7500 is not set | ||
114 | # CONFIG_ARCH_CLPS711X is not set | ||
115 | # CONFIG_ARCH_CO285 is not set | ||
116 | # CONFIG_ARCH_EBSA110 is not set | ||
117 | # CONFIG_ARCH_EP93XX is not set | ||
118 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
119 | # CONFIG_ARCH_NETX is not set | ||
120 | # CONFIG_ARCH_H720X is not set | ||
121 | # CONFIG_ARCH_IMX is not set | ||
122 | # CONFIG_ARCH_IOP13XX is not set | ||
123 | # CONFIG_ARCH_IOP32X is not set | ||
124 | # CONFIG_ARCH_IOP33X is not set | ||
125 | # CONFIG_ARCH_IXP23XX is not set | ||
126 | # CONFIG_ARCH_IXP2000 is not set | ||
127 | # CONFIG_ARCH_IXP4XX is not set | ||
128 | # CONFIG_ARCH_L7200 is not set | ||
129 | # CONFIG_ARCH_KS8695 is not set | ||
130 | # CONFIG_ARCH_NS9XXX is not set | ||
131 | # CONFIG_ARCH_MXC is not set | ||
132 | CONFIG_ARCH_ORION=y | ||
133 | # CONFIG_ARCH_PNX4008 is not set | ||
134 | # CONFIG_ARCH_PXA is not set | ||
135 | # CONFIG_ARCH_RPC is not set | ||
136 | # CONFIG_ARCH_SA1100 is not set | ||
137 | # CONFIG_ARCH_S3C2410 is not set | ||
138 | # CONFIG_ARCH_SHARK is not set | ||
139 | # CONFIG_ARCH_LH7A40X is not set | ||
140 | # CONFIG_ARCH_DAVINCI is not set | ||
141 | # CONFIG_ARCH_OMAP is not set | ||
142 | |||
143 | # | ||
144 | # Orion Implementations | ||
145 | # | ||
146 | CONFIG_MACH_DB88F5281=y | ||
147 | CONFIG_MACH_RD88F5182=y | ||
148 | CONFIG_MACH_KUROBOX_PRO=y | ||
149 | CONFIG_MACH_DNS323=y | ||
150 | CONFIG_MACH_TS209=y | ||
151 | |||
152 | # | ||
153 | # Boot options | ||
154 | # | ||
155 | |||
156 | # | ||
157 | # Power management | ||
158 | # | ||
159 | |||
160 | # | ||
161 | # Processor Type | ||
162 | # | ||
163 | CONFIG_CPU_32=y | ||
164 | CONFIG_CPU_FEROCEON=y | ||
165 | CONFIG_CPU_FEROCEON_OLD_ID=y | ||
166 | CONFIG_CPU_32v5=y | ||
167 | CONFIG_CPU_ABRT_EV5T=y | ||
168 | CONFIG_CPU_CACHE_VIVT=y | ||
169 | CONFIG_CPU_COPY_V4WB=y | ||
170 | CONFIG_CPU_TLB_V4WBI=y | ||
171 | CONFIG_CPU_CP15=y | ||
172 | CONFIG_CPU_CP15_MMU=y | ||
173 | |||
174 | # | ||
175 | # Processor Features | ||
176 | # | ||
177 | CONFIG_ARM_THUMB=y | ||
178 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
179 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
180 | # CONFIG_CPU_DCACHE_WRITETHROUGH is not set | ||
181 | # CONFIG_OUTER_CACHE is not set | ||
182 | |||
183 | # | ||
184 | # Bus support | ||
185 | # | ||
186 | CONFIG_PCI=y | ||
187 | CONFIG_PCI_SYSCALL=y | ||
188 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
189 | CONFIG_PCI_LEGACY=y | ||
190 | # CONFIG_PCCARD is not set | ||
191 | |||
192 | # | ||
193 | # Kernel Features | ||
194 | # | ||
195 | CONFIG_TICK_ONESHOT=y | ||
196 | CONFIG_NO_HZ=y | ||
197 | CONFIG_HIGH_RES_TIMERS=y | ||
198 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
199 | CONFIG_PREEMPT=y | ||
200 | CONFIG_HZ=100 | ||
201 | CONFIG_AEABI=y | ||
202 | CONFIG_OABI_COMPAT=y | ||
203 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
204 | CONFIG_SELECT_MEMORY_MODEL=y | ||
205 | CONFIG_FLATMEM_MANUAL=y | ||
206 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
207 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
208 | CONFIG_FLATMEM=y | ||
209 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
210 | # CONFIG_SPARSEMEM_STATIC is not set | ||
211 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
212 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
213 | # CONFIG_RESOURCES_64BIT is not set | ||
214 | CONFIG_ZONE_DMA_FLAG=1 | ||
215 | CONFIG_BOUNCE=y | ||
216 | CONFIG_VIRT_TO_BUS=y | ||
217 | CONFIG_LEDS=y | ||
218 | CONFIG_LEDS_CPU=y | ||
219 | CONFIG_ALIGNMENT_TRAP=y | ||
220 | |||
221 | # | ||
222 | # Boot options | ||
223 | # | ||
224 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
225 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
226 | CONFIG_CMDLINE="" | ||
227 | # CONFIG_XIP_KERNEL is not set | ||
228 | # CONFIG_KEXEC is not set | ||
229 | |||
230 | # | ||
231 | # Floating point emulation | ||
232 | # | ||
233 | |||
234 | # | ||
235 | # At least one emulation must be selected | ||
236 | # | ||
237 | CONFIG_FPE_NWFPE=y | ||
238 | # CONFIG_FPE_NWFPE_XP is not set | ||
239 | # CONFIG_FPE_FASTFPE is not set | ||
240 | CONFIG_VFP=y | ||
241 | |||
242 | # | ||
243 | # Userspace binary formats | ||
244 | # | ||
245 | CONFIG_BINFMT_ELF=y | ||
246 | # CONFIG_BINFMT_AOUT is not set | ||
247 | # CONFIG_BINFMT_MISC is not set | ||
248 | |||
249 | # | ||
250 | # Power management options | ||
251 | # | ||
252 | # CONFIG_PM is not set | ||
253 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
254 | |||
255 | # | ||
256 | # Networking | ||
257 | # | ||
258 | CONFIG_NET=y | ||
259 | |||
260 | # | ||
261 | # Networking options | ||
262 | # | ||
263 | CONFIG_PACKET=y | ||
264 | CONFIG_PACKET_MMAP=y | ||
265 | CONFIG_UNIX=y | ||
266 | CONFIG_XFRM=y | ||
267 | # CONFIG_XFRM_USER is not set | ||
268 | # CONFIG_XFRM_SUB_POLICY is not set | ||
269 | # CONFIG_XFRM_MIGRATE is not set | ||
270 | # CONFIG_NET_KEY is not set | ||
271 | CONFIG_INET=y | ||
272 | CONFIG_IP_MULTICAST=y | ||
273 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
274 | CONFIG_IP_FIB_HASH=y | ||
275 | CONFIG_IP_PNP=y | ||
276 | CONFIG_IP_PNP_DHCP=y | ||
277 | CONFIG_IP_PNP_BOOTP=y | ||
278 | # CONFIG_IP_PNP_RARP is not set | ||
279 | # CONFIG_NET_IPIP is not set | ||
280 | # CONFIG_NET_IPGRE is not set | ||
281 | # CONFIG_IP_MROUTE is not set | ||
282 | # CONFIG_ARPD is not set | ||
283 | # CONFIG_SYN_COOKIES is not set | ||
284 | # CONFIG_INET_AH is not set | ||
285 | # CONFIG_INET_ESP is not set | ||
286 | # CONFIG_INET_IPCOMP is not set | ||
287 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
288 | # CONFIG_INET_TUNNEL is not set | ||
289 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
290 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
291 | CONFIG_INET_XFRM_MODE_BEET=y | ||
292 | # CONFIG_INET_LRO is not set | ||
293 | CONFIG_INET_DIAG=y | ||
294 | CONFIG_INET_TCP_DIAG=y | ||
295 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
296 | CONFIG_TCP_CONG_CUBIC=y | ||
297 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
298 | # CONFIG_TCP_MD5SIG is not set | ||
299 | # CONFIG_IPV6 is not set | ||
300 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
301 | # CONFIG_INET6_TUNNEL is not set | ||
302 | # CONFIG_NETWORK_SECMARK is not set | ||
303 | # CONFIG_NETFILTER is not set | ||
304 | # CONFIG_IP_DCCP is not set | ||
305 | # CONFIG_IP_SCTP is not set | ||
306 | # CONFIG_TIPC is not set | ||
307 | # CONFIG_ATM is not set | ||
308 | # CONFIG_BRIDGE is not set | ||
309 | # CONFIG_VLAN_8021Q is not set | ||
310 | # CONFIG_DECNET is not set | ||
311 | # CONFIG_LLC2 is not set | ||
312 | # CONFIG_IPX is not set | ||
313 | # CONFIG_ATALK is not set | ||
314 | # CONFIG_X25 is not set | ||
315 | # CONFIG_LAPB is not set | ||
316 | # CONFIG_ECONET is not set | ||
317 | # CONFIG_WAN_ROUTER is not set | ||
318 | # CONFIG_NET_SCHED is not set | ||
319 | |||
320 | # | ||
321 | # Network testing | ||
322 | # | ||
323 | CONFIG_NET_PKTGEN=m | ||
324 | # CONFIG_HAMRADIO is not set | ||
325 | # CONFIG_IRDA is not set | ||
326 | # CONFIG_BT is not set | ||
327 | # CONFIG_AF_RXRPC is not set | ||
328 | |||
329 | # | ||
330 | # Wireless | ||
331 | # | ||
332 | # CONFIG_CFG80211 is not set | ||
333 | CONFIG_WIRELESS_EXT=y | ||
334 | # CONFIG_MAC80211 is not set | ||
335 | # CONFIG_IEEE80211 is not set | ||
336 | # CONFIG_RFKILL is not set | ||
337 | # CONFIG_NET_9P is not set | ||
338 | |||
339 | # | ||
340 | # Device Drivers | ||
341 | # | ||
342 | |||
343 | # | ||
344 | # Generic Driver Options | ||
345 | # | ||
346 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
347 | CONFIG_STANDALONE=y | ||
348 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
349 | CONFIG_FW_LOADER=y | ||
350 | # CONFIG_SYS_HYPERVISOR is not set | ||
351 | # CONFIG_CONNECTOR is not set | ||
352 | CONFIG_MTD=y | ||
353 | # CONFIG_MTD_DEBUG is not set | ||
354 | # CONFIG_MTD_CONCAT is not set | ||
355 | CONFIG_MTD_PARTITIONS=y | ||
356 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
357 | CONFIG_MTD_CMDLINE_PARTS=y | ||
358 | # CONFIG_MTD_AFS_PARTS is not set | ||
359 | |||
360 | # | ||
361 | # User Modules And Translation Layers | ||
362 | # | ||
363 | CONFIG_MTD_CHAR=y | ||
364 | CONFIG_MTD_BLKDEVS=y | ||
365 | CONFIG_MTD_BLOCK=y | ||
366 | CONFIG_FTL=y | ||
367 | CONFIG_NFTL=y | ||
368 | # CONFIG_NFTL_RW is not set | ||
369 | # CONFIG_INFTL is not set | ||
370 | # CONFIG_RFD_FTL is not set | ||
371 | # CONFIG_SSFDC is not set | ||
372 | # CONFIG_MTD_OOPS is not set | ||
373 | |||
374 | # | ||
375 | # RAM/ROM/Flash chip drivers | ||
376 | # | ||
377 | CONFIG_MTD_CFI=y | ||
378 | CONFIG_MTD_JEDECPROBE=y | ||
379 | CONFIG_MTD_GEN_PROBE=y | ||
380 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
381 | CONFIG_MTD_CFI_NOSWAP=y | ||
382 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
383 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
384 | CONFIG_MTD_CFI_GEOMETRY=y | ||
385 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
386 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
387 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
388 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
389 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
390 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
391 | CONFIG_MTD_CFI_I1=y | ||
392 | CONFIG_MTD_CFI_I2=y | ||
393 | CONFIG_MTD_CFI_I4=y | ||
394 | # CONFIG_MTD_CFI_I8 is not set | ||
395 | # CONFIG_MTD_OTP is not set | ||
396 | CONFIG_MTD_CFI_INTELEXT=y | ||
397 | CONFIG_MTD_CFI_AMDSTD=y | ||
398 | CONFIG_MTD_CFI_STAA=y | ||
399 | CONFIG_MTD_CFI_UTIL=y | ||
400 | # CONFIG_MTD_RAM is not set | ||
401 | # CONFIG_MTD_ROM is not set | ||
402 | # CONFIG_MTD_ABSENT is not set | ||
403 | |||
404 | # | ||
405 | # Mapping drivers for chip access | ||
406 | # | ||
407 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
408 | CONFIG_MTD_PHYSMAP=y | ||
409 | CONFIG_MTD_PHYSMAP_START=0x0 | ||
410 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
411 | CONFIG_MTD_PHYSMAP_BANKWIDTH=0 | ||
412 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
413 | # CONFIG_MTD_IMPA7 is not set | ||
414 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
415 | # CONFIG_MTD_PLATRAM is not set | ||
416 | |||
417 | # | ||
418 | # Self-contained MTD device drivers | ||
419 | # | ||
420 | # CONFIG_MTD_PMC551 is not set | ||
421 | # CONFIG_MTD_SLRAM is not set | ||
422 | # CONFIG_MTD_PHRAM is not set | ||
423 | # CONFIG_MTD_MTDRAM is not set | ||
424 | # CONFIG_MTD_BLOCK2MTD is not set | ||
425 | |||
426 | # | ||
427 | # Disk-On-Chip Device Drivers | ||
428 | # | ||
429 | # CONFIG_MTD_DOC2000 is not set | ||
430 | # CONFIG_MTD_DOC2001 is not set | ||
431 | # CONFIG_MTD_DOC2001PLUS is not set | ||
432 | CONFIG_MTD_NAND=y | ||
433 | CONFIG_MTD_NAND_VERIFY_WRITE=y | ||
434 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
435 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
436 | CONFIG_MTD_NAND_IDS=y | ||
437 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
438 | # CONFIG_MTD_NAND_CAFE is not set | ||
439 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
440 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
441 | # CONFIG_MTD_ALAUDA is not set | ||
442 | CONFIG_MTD_NAND_ORION=y | ||
443 | # CONFIG_MTD_ONENAND is not set | ||
444 | |||
445 | # | ||
446 | # UBI - Unsorted block images | ||
447 | # | ||
448 | # CONFIG_MTD_UBI is not set | ||
449 | # CONFIG_PARPORT is not set | ||
450 | CONFIG_BLK_DEV=y | ||
451 | # CONFIG_BLK_CPQ_DA is not set | ||
452 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
453 | # CONFIG_BLK_DEV_DAC960 is not set | ||
454 | # CONFIG_BLK_DEV_UMEM is not set | ||
455 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
456 | CONFIG_BLK_DEV_LOOP=y | ||
457 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
458 | # CONFIG_BLK_DEV_NBD is not set | ||
459 | # CONFIG_BLK_DEV_SX8 is not set | ||
460 | # CONFIG_BLK_DEV_UB is not set | ||
461 | # CONFIG_BLK_DEV_RAM is not set | ||
462 | # CONFIG_CDROM_PKTCDVD is not set | ||
463 | # CONFIG_ATA_OVER_ETH is not set | ||
464 | CONFIG_MISC_DEVICES=y | ||
465 | # CONFIG_PHANTOM is not set | ||
466 | # CONFIG_EEPROM_93CX6 is not set | ||
467 | # CONFIG_SGI_IOC4 is not set | ||
468 | # CONFIG_TIFM_CORE is not set | ||
469 | |||
470 | # | ||
471 | # SCSI device support | ||
472 | # | ||
473 | # CONFIG_RAID_ATTRS is not set | ||
474 | CONFIG_SCSI=y | ||
475 | CONFIG_SCSI_DMA=y | ||
476 | # CONFIG_SCSI_TGT is not set | ||
477 | # CONFIG_SCSI_NETLINK is not set | ||
478 | CONFIG_SCSI_PROC_FS=y | ||
479 | |||
480 | # | ||
481 | # SCSI support type (disk, tape, CD-ROM) | ||
482 | # | ||
483 | CONFIG_BLK_DEV_SD=y | ||
484 | # CONFIG_CHR_DEV_ST is not set | ||
485 | # CONFIG_CHR_DEV_OSST is not set | ||
486 | CONFIG_BLK_DEV_SR=y | ||
487 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
488 | CONFIG_CHR_DEV_SG=y | ||
489 | # CONFIG_CHR_DEV_SCH is not set | ||
490 | |||
491 | # | ||
492 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
493 | # | ||
494 | CONFIG_SCSI_MULTI_LUN=y | ||
495 | # CONFIG_SCSI_CONSTANTS is not set | ||
496 | # CONFIG_SCSI_LOGGING is not set | ||
497 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
498 | CONFIG_SCSI_WAIT_SCAN=m | ||
499 | |||
500 | # | ||
501 | # SCSI Transports | ||
502 | # | ||
503 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
504 | # CONFIG_SCSI_FC_ATTRS is not set | ||
505 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
506 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
507 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
508 | CONFIG_SCSI_LOWLEVEL=y | ||
509 | # CONFIG_ISCSI_TCP is not set | ||
510 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
511 | # CONFIG_SCSI_3W_9XXX is not set | ||
512 | # CONFIG_SCSI_ACARD is not set | ||
513 | # CONFIG_SCSI_AACRAID is not set | ||
514 | # CONFIG_SCSI_AIC7XXX is not set | ||
515 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
516 | # CONFIG_SCSI_AIC79XX is not set | ||
517 | # CONFIG_SCSI_AIC94XX is not set | ||
518 | # CONFIG_SCSI_DPT_I2O is not set | ||
519 | # CONFIG_SCSI_ADVANSYS is not set | ||
520 | # CONFIG_SCSI_ARCMSR is not set | ||
521 | # CONFIG_MEGARAID_NEWGEN is not set | ||
522 | # CONFIG_MEGARAID_LEGACY is not set | ||
523 | # CONFIG_MEGARAID_SAS is not set | ||
524 | # CONFIG_SCSI_HPTIOP is not set | ||
525 | # CONFIG_SCSI_DMX3191D is not set | ||
526 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
527 | # CONFIG_SCSI_IPS is not set | ||
528 | # CONFIG_SCSI_INITIO is not set | ||
529 | # CONFIG_SCSI_INIA100 is not set | ||
530 | # CONFIG_SCSI_STEX is not set | ||
531 | CONFIG_SCSI_MVSATA=y | ||
532 | |||
533 | # | ||
534 | # Sata options | ||
535 | # | ||
536 | # CONFIG_MV_SATA_SUPPORT_ATAPI is not set | ||
537 | # CONFIG_MV_SATA_ENABLE_1MB_IOS is not set | ||
538 | CONFIG_SATA_NO_DEBUG=y | ||
539 | # CONFIG_SATA_DEBUG_ON_ERROR is not set | ||
540 | # CONFIG_SATA_FULL_DEBUG is not set | ||
541 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
542 | # CONFIG_SCSI_IPR is not set | ||
543 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
544 | # CONFIG_SCSI_QLA_FC is not set | ||
545 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
546 | # CONFIG_SCSI_LPFC is not set | ||
547 | # CONFIG_SCSI_DC395x is not set | ||
548 | # CONFIG_SCSI_DC390T is not set | ||
549 | # CONFIG_SCSI_NSP32 is not set | ||
550 | # CONFIG_SCSI_DEBUG is not set | ||
551 | # CONFIG_SCSI_SRP is not set | ||
552 | CONFIG_ATA=m | ||
553 | # CONFIG_ATA_NONSTANDARD is not set | ||
554 | # CONFIG_SATA_AHCI is not set | ||
555 | # CONFIG_SATA_SVW is not set | ||
556 | # CONFIG_ATA_PIIX is not set | ||
557 | # CONFIG_SATA_MV is not set | ||
558 | # CONFIG_SATA_NV is not set | ||
559 | # CONFIG_PDC_ADMA is not set | ||
560 | # CONFIG_SATA_QSTOR is not set | ||
561 | # CONFIG_SATA_PROMISE is not set | ||
562 | # CONFIG_SATA_SX4 is not set | ||
563 | # CONFIG_SATA_SIL is not set | ||
564 | # CONFIG_SATA_SIL24 is not set | ||
565 | # CONFIG_SATA_SIS is not set | ||
566 | # CONFIG_SATA_ULI is not set | ||
567 | # CONFIG_SATA_VIA is not set | ||
568 | # CONFIG_SATA_VITESSE is not set | ||
569 | # CONFIG_SATA_INIC162X is not set | ||
570 | # CONFIG_PATA_ALI is not set | ||
571 | # CONFIG_PATA_AMD is not set | ||
572 | # CONFIG_PATA_ARTOP is not set | ||
573 | # CONFIG_PATA_ATIIXP is not set | ||
574 | # CONFIG_PATA_CMD640_PCI is not set | ||
575 | # CONFIG_PATA_CMD64X is not set | ||
576 | # CONFIG_PATA_CS5520 is not set | ||
577 | # CONFIG_PATA_CS5530 is not set | ||
578 | # CONFIG_PATA_CYPRESS is not set | ||
579 | # CONFIG_PATA_EFAR is not set | ||
580 | # CONFIG_ATA_GENERIC is not set | ||
581 | # CONFIG_PATA_HPT366 is not set | ||
582 | # CONFIG_PATA_HPT37X is not set | ||
583 | # CONFIG_PATA_HPT3X2N is not set | ||
584 | # CONFIG_PATA_HPT3X3 is not set | ||
585 | # CONFIG_PATA_IT821X is not set | ||
586 | # CONFIG_PATA_IT8213 is not set | ||
587 | # CONFIG_PATA_JMICRON is not set | ||
588 | # CONFIG_PATA_TRIFLEX is not set | ||
589 | # CONFIG_PATA_MARVELL is not set | ||
590 | # CONFIG_PATA_MPIIX is not set | ||
591 | # CONFIG_PATA_OLDPIIX is not set | ||
592 | # CONFIG_PATA_NETCELL is not set | ||
593 | # CONFIG_PATA_NS87410 is not set | ||
594 | # CONFIG_PATA_NS87415 is not set | ||
595 | # CONFIG_PATA_OPTI is not set | ||
596 | # CONFIG_PATA_OPTIDMA is not set | ||
597 | # CONFIG_PATA_PDC_OLD is not set | ||
598 | # CONFIG_PATA_RADISYS is not set | ||
599 | # CONFIG_PATA_RZ1000 is not set | ||
600 | # CONFIG_PATA_SC1200 is not set | ||
601 | # CONFIG_PATA_SERVERWORKS is not set | ||
602 | # CONFIG_PATA_PDC2027X is not set | ||
603 | # CONFIG_PATA_SIL680 is not set | ||
604 | # CONFIG_PATA_SIS is not set | ||
605 | # CONFIG_PATA_VIA is not set | ||
606 | # CONFIG_PATA_WINBOND is not set | ||
607 | # CONFIG_PATA_PLATFORM is not set | ||
608 | # CONFIG_MD is not set | ||
609 | # CONFIG_FUSION is not set | ||
610 | |||
611 | # | ||
612 | # IEEE 1394 (FireWire) support | ||
613 | # | ||
614 | # CONFIG_FIREWIRE is not set | ||
615 | # CONFIG_IEEE1394 is not set | ||
616 | # CONFIG_I2O is not set | ||
617 | CONFIG_NETDEVICES=y | ||
618 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
619 | # CONFIG_DUMMY is not set | ||
620 | # CONFIG_BONDING is not set | ||
621 | # CONFIG_MACVLAN is not set | ||
622 | # CONFIG_EQUALIZER is not set | ||
623 | # CONFIG_TUN is not set | ||
624 | # CONFIG_VETH is not set | ||
625 | # CONFIG_IP1000 is not set | ||
626 | # CONFIG_ARCNET is not set | ||
627 | # CONFIG_PHYLIB is not set | ||
628 | CONFIG_NET_ETHERNET=y | ||
629 | CONFIG_MII=y | ||
630 | # CONFIG_AX88796 is not set | ||
631 | # CONFIG_HAPPYMEAL is not set | ||
632 | # CONFIG_SUNGEM is not set | ||
633 | # CONFIG_CASSINI is not set | ||
634 | # CONFIG_NET_VENDOR_3COM is not set | ||
635 | # CONFIG_SMC91X is not set | ||
636 | # CONFIG_DM9000 is not set | ||
637 | # CONFIG_NET_TULIP is not set | ||
638 | # CONFIG_HP100 is not set | ||
639 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
640 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
641 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
642 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
643 | CONFIG_NET_PCI=y | ||
644 | # CONFIG_PCNET32 is not set | ||
645 | # CONFIG_AMD8111_ETH is not set | ||
646 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
647 | # CONFIG_B44 is not set | ||
648 | # CONFIG_FORCEDETH is not set | ||
649 | # CONFIG_EEPRO100 is not set | ||
650 | CONFIG_E100=y | ||
651 | # CONFIG_FEALNX is not set | ||
652 | # CONFIG_NATSEMI is not set | ||
653 | # CONFIG_NE2K_PCI is not set | ||
654 | # CONFIG_8139CP is not set | ||
655 | # CONFIG_8139TOO is not set | ||
656 | # CONFIG_SIS900 is not set | ||
657 | # CONFIG_EPIC100 is not set | ||
658 | # CONFIG_SUNDANCE is not set | ||
659 | # CONFIG_TLAN is not set | ||
660 | # CONFIG_VIA_RHINE is not set | ||
661 | # CONFIG_SC92031 is not set | ||
662 | CONFIG_NETDEV_1000=y | ||
663 | # CONFIG_ACENIC is not set | ||
664 | # CONFIG_DL2K is not set | ||
665 | CONFIG_E1000=y | ||
666 | CONFIG_E1000_NAPI=y | ||
667 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | ||
668 | # CONFIG_E1000E is not set | ||
669 | # CONFIG_NS83820 is not set | ||
670 | # CONFIG_HAMACHI is not set | ||
671 | # CONFIG_YELLOWFIN is not set | ||
672 | # CONFIG_R8169 is not set | ||
673 | # CONFIG_SIS190 is not set | ||
674 | CONFIG_SKGE=y | ||
675 | CONFIG_SKY2=y | ||
676 | # CONFIG_SK98LIN is not set | ||
677 | # CONFIG_VIA_VELOCITY is not set | ||
678 | CONFIG_TIGON3=y | ||
679 | # CONFIG_BNX2 is not set | ||
680 | CONFIG_MV643XX_ETH=y | ||
681 | # CONFIG_QLA3XXX is not set | ||
682 | # CONFIG_ATL1 is not set | ||
683 | CONFIG_NETDEV_10000=y | ||
684 | # CONFIG_CHELSIO_T1 is not set | ||
685 | # CONFIG_CHELSIO_T3 is not set | ||
686 | # CONFIG_IXGBE is not set | ||
687 | # CONFIG_IXGB is not set | ||
688 | # CONFIG_S2IO is not set | ||
689 | # CONFIG_MYRI10GE is not set | ||
690 | # CONFIG_NETXEN_NIC is not set | ||
691 | # CONFIG_NIU is not set | ||
692 | # CONFIG_MLX4_CORE is not set | ||
693 | # CONFIG_TEHUTI is not set | ||
694 | # CONFIG_TR is not set | ||
695 | |||
696 | # | ||
697 | # Wireless LAN | ||
698 | # | ||
699 | # CONFIG_WLAN_PRE80211 is not set | ||
700 | # CONFIG_WLAN_80211 is not set | ||
701 | |||
702 | # | ||
703 | # USB Network Adapters | ||
704 | # | ||
705 | # CONFIG_USB_CATC is not set | ||
706 | # CONFIG_USB_KAWETH is not set | ||
707 | # CONFIG_USB_PEGASUS is not set | ||
708 | # CONFIG_USB_RTL8150 is not set | ||
709 | # CONFIG_USB_USBNET is not set | ||
710 | # CONFIG_WAN is not set | ||
711 | # CONFIG_FDDI is not set | ||
712 | # CONFIG_HIPPI is not set | ||
713 | # CONFIG_PPP is not set | ||
714 | # CONFIG_SLIP is not set | ||
715 | # CONFIG_NET_FC is not set | ||
716 | # CONFIG_SHAPER is not set | ||
717 | # CONFIG_NETCONSOLE is not set | ||
718 | # CONFIG_NETPOLL is not set | ||
719 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
720 | # CONFIG_ISDN is not set | ||
721 | |||
722 | # | ||
723 | # Input device support | ||
724 | # | ||
725 | CONFIG_INPUT=y | ||
726 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
727 | # CONFIG_INPUT_POLLDEV is not set | ||
728 | |||
729 | # | ||
730 | # Userland interfaces | ||
731 | # | ||
732 | CONFIG_INPUT_MOUSEDEV=y | ||
733 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
734 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
735 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
736 | # CONFIG_INPUT_JOYDEV is not set | ||
737 | # CONFIG_INPUT_EVDEV is not set | ||
738 | # CONFIG_INPUT_EVBUG is not set | ||
739 | |||
740 | # | ||
741 | # Input Device Drivers | ||
742 | # | ||
743 | # CONFIG_INPUT_KEYBOARD is not set | ||
744 | # CONFIG_INPUT_MOUSE is not set | ||
745 | # CONFIG_INPUT_JOYSTICK is not set | ||
746 | # CONFIG_INPUT_TABLET is not set | ||
747 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
748 | # CONFIG_INPUT_MISC is not set | ||
749 | |||
750 | # | ||
751 | # Hardware I/O ports | ||
752 | # | ||
753 | # CONFIG_SERIO is not set | ||
754 | # CONFIG_GAMEPORT is not set | ||
755 | |||
756 | # | ||
757 | # Character devices | ||
758 | # | ||
759 | CONFIG_VT=y | ||
760 | CONFIG_VT_CONSOLE=y | ||
761 | CONFIG_HW_CONSOLE=y | ||
762 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
763 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
764 | |||
765 | # | ||
766 | # Serial drivers | ||
767 | # | ||
768 | CONFIG_SERIAL_8250=y | ||
769 | CONFIG_SERIAL_8250_CONSOLE=y | ||
770 | CONFIG_SERIAL_8250_PCI=y | ||
771 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
772 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
773 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
774 | |||
775 | # | ||
776 | # Non-8250 serial port support | ||
777 | # | ||
778 | CONFIG_SERIAL_CORE=y | ||
779 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
780 | # CONFIG_SERIAL_JSM is not set | ||
781 | CONFIG_UNIX98_PTYS=y | ||
782 | CONFIG_LEGACY_PTYS=y | ||
783 | CONFIG_LEGACY_PTY_COUNT=16 | ||
784 | # CONFIG_IPMI_HANDLER is not set | ||
785 | CONFIG_HW_RANDOM=m | ||
786 | # CONFIG_NVRAM is not set | ||
787 | # CONFIG_R3964 is not set | ||
788 | # CONFIG_APPLICOM is not set | ||
789 | # CONFIG_RAW_DRIVER is not set | ||
790 | # CONFIG_TCG_TPM is not set | ||
791 | CONFIG_DEVPORT=y | ||
792 | CONFIG_I2C=y | ||
793 | CONFIG_I2C_BOARDINFO=y | ||
794 | CONFIG_I2C_CHARDEV=y | ||
795 | |||
796 | # | ||
797 | # I2C Algorithms | ||
798 | # | ||
799 | # CONFIG_I2C_ALGOBIT is not set | ||
800 | # CONFIG_I2C_ALGOPCF is not set | ||
801 | # CONFIG_I2C_ALGOPCA is not set | ||
802 | |||
803 | # | ||
804 | # I2C Hardware Bus support | ||
805 | # | ||
806 | # CONFIG_I2C_ALI1535 is not set | ||
807 | # CONFIG_I2C_ALI1563 is not set | ||
808 | # CONFIG_I2C_ALI15X3 is not set | ||
809 | # CONFIG_I2C_AMD756 is not set | ||
810 | # CONFIG_I2C_AMD8111 is not set | ||
811 | # CONFIG_I2C_GPIO is not set | ||
812 | # CONFIG_I2C_I801 is not set | ||
813 | # CONFIG_I2C_I810 is not set | ||
814 | # CONFIG_I2C_PIIX4 is not set | ||
815 | # CONFIG_I2C_NFORCE2 is not set | ||
816 | # CONFIG_I2C_OCORES is not set | ||
817 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
818 | # CONFIG_I2C_PROSAVAGE is not set | ||
819 | # CONFIG_I2C_SAVAGE4 is not set | ||
820 | # CONFIG_I2C_SIMTEC is not set | ||
821 | # CONFIG_I2C_SIS5595 is not set | ||
822 | # CONFIG_I2C_SIS630 is not set | ||
823 | # CONFIG_I2C_SIS96X is not set | ||
824 | # CONFIG_I2C_TAOS_EVM is not set | ||
825 | # CONFIG_I2C_STUB is not set | ||
826 | # CONFIG_I2C_TINY_USB is not set | ||
827 | # CONFIG_I2C_VIA is not set | ||
828 | # CONFIG_I2C_VIAPRO is not set | ||
829 | # CONFIG_I2C_VOODOO3 is not set | ||
830 | CONFIG_I2C_MV64XXX=y | ||
831 | |||
832 | # | ||
833 | # Miscellaneous I2C Chip support | ||
834 | # | ||
835 | # CONFIG_SENSORS_DS1337 is not set | ||
836 | # CONFIG_SENSORS_DS1374 is not set | ||
837 | # CONFIG_DS1682 is not set | ||
838 | # CONFIG_SENSORS_EEPROM is not set | ||
839 | # CONFIG_SENSORS_PCF8574 is not set | ||
840 | # CONFIG_SENSORS_PCA9539 is not set | ||
841 | # CONFIG_SENSORS_PCF8591 is not set | ||
842 | # CONFIG_SENSORS_MAX6875 is not set | ||
843 | # CONFIG_SENSORS_TSL2550 is not set | ||
844 | # CONFIG_I2C_DEBUG_CORE is not set | ||
845 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
846 | # CONFIG_I2C_DEBUG_BUS is not set | ||
847 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
848 | |||
849 | # | ||
850 | # SPI support | ||
851 | # | ||
852 | # CONFIG_SPI is not set | ||
853 | # CONFIG_SPI_MASTER is not set | ||
854 | # CONFIG_W1 is not set | ||
855 | # CONFIG_POWER_SUPPLY is not set | ||
856 | CONFIG_HWMON=y | ||
857 | # CONFIG_HWMON_VID is not set | ||
858 | # CONFIG_SENSORS_AD7418 is not set | ||
859 | # CONFIG_SENSORS_ADM1021 is not set | ||
860 | # CONFIG_SENSORS_ADM1025 is not set | ||
861 | # CONFIG_SENSORS_ADM1026 is not set | ||
862 | # CONFIG_SENSORS_ADM1029 is not set | ||
863 | # CONFIG_SENSORS_ADM1031 is not set | ||
864 | # CONFIG_SENSORS_ADM9240 is not set | ||
865 | # CONFIG_SENSORS_ADT7470 is not set | ||
866 | # CONFIG_SENSORS_ATXP1 is not set | ||
867 | # CONFIG_SENSORS_DS1621 is not set | ||
868 | # CONFIG_SENSORS_I5K_AMB is not set | ||
869 | # CONFIG_SENSORS_F71805F is not set | ||
870 | # CONFIG_SENSORS_F71882FG is not set | ||
871 | # CONFIG_SENSORS_F75375S is not set | ||
872 | # CONFIG_SENSORS_GL518SM is not set | ||
873 | # CONFIG_SENSORS_GL520SM is not set | ||
874 | # CONFIG_SENSORS_IT87 is not set | ||
875 | # CONFIG_SENSORS_LM63 is not set | ||
876 | # CONFIG_SENSORS_LM75 is not set | ||
877 | # CONFIG_SENSORS_LM77 is not set | ||
878 | # CONFIG_SENSORS_LM78 is not set | ||
879 | # CONFIG_SENSORS_LM80 is not set | ||
880 | # CONFIG_SENSORS_LM83 is not set | ||
881 | # CONFIG_SENSORS_LM85 is not set | ||
882 | # CONFIG_SENSORS_LM87 is not set | ||
883 | # CONFIG_SENSORS_LM90 is not set | ||
884 | # CONFIG_SENSORS_LM92 is not set | ||
885 | # CONFIG_SENSORS_LM93 is not set | ||
886 | # CONFIG_SENSORS_MAX1619 is not set | ||
887 | # CONFIG_SENSORS_MAX6650 is not set | ||
888 | # CONFIG_SENSORS_PC87360 is not set | ||
889 | # CONFIG_SENSORS_PC87427 is not set | ||
890 | # CONFIG_SENSORS_SIS5595 is not set | ||
891 | # CONFIG_SENSORS_DME1737 is not set | ||
892 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
893 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
894 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
895 | # CONFIG_SENSORS_THMC50 is not set | ||
896 | # CONFIG_SENSORS_VIA686A is not set | ||
897 | # CONFIG_SENSORS_VT1211 is not set | ||
898 | # CONFIG_SENSORS_VT8231 is not set | ||
899 | # CONFIG_SENSORS_W83781D is not set | ||
900 | # CONFIG_SENSORS_W83791D is not set | ||
901 | # CONFIG_SENSORS_W83792D is not set | ||
902 | # CONFIG_SENSORS_W83793 is not set | ||
903 | # CONFIG_SENSORS_W83L785TS is not set | ||
904 | # CONFIG_SENSORS_W83627HF is not set | ||
905 | # CONFIG_SENSORS_W83627EHF is not set | ||
906 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
907 | # CONFIG_WATCHDOG is not set | ||
908 | |||
909 | # | ||
910 | # Sonics Silicon Backplane | ||
911 | # | ||
912 | CONFIG_SSB_POSSIBLE=y | ||
913 | # CONFIG_SSB is not set | ||
914 | |||
915 | # | ||
916 | # Multifunction device drivers | ||
917 | # | ||
918 | # CONFIG_MFD_SM501 is not set | ||
919 | |||
920 | # | ||
921 | # Multimedia devices | ||
922 | # | ||
923 | # CONFIG_VIDEO_DEV is not set | ||
924 | # CONFIG_DVB_CORE is not set | ||
925 | CONFIG_DAB=y | ||
926 | # CONFIG_USB_DABUSB is not set | ||
927 | |||
928 | # | ||
929 | # Graphics support | ||
930 | # | ||
931 | # CONFIG_DRM is not set | ||
932 | # CONFIG_VGASTATE is not set | ||
933 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
934 | # CONFIG_FB is not set | ||
935 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
936 | |||
937 | # | ||
938 | # Display device support | ||
939 | # | ||
940 | # CONFIG_DISPLAY_SUPPORT is not set | ||
941 | |||
942 | # | ||
943 | # Console display driver support | ||
944 | # | ||
945 | # CONFIG_VGA_CONSOLE is not set | ||
946 | CONFIG_DUMMY_CONSOLE=y | ||
947 | |||
948 | # | ||
949 | # Sound | ||
950 | # | ||
951 | # CONFIG_SOUND is not set | ||
952 | CONFIG_HID_SUPPORT=y | ||
953 | CONFIG_HID=y | ||
954 | # CONFIG_HID_DEBUG is not set | ||
955 | # CONFIG_HIDRAW is not set | ||
956 | |||
957 | # | ||
958 | # USB Input Devices | ||
959 | # | ||
960 | CONFIG_USB_HID=y | ||
961 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
962 | # CONFIG_HID_FF is not set | ||
963 | # CONFIG_USB_HIDDEV is not set | ||
964 | CONFIG_USB_SUPPORT=y | ||
965 | CONFIG_USB_ARCH_HAS_HCD=y | ||
966 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
967 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
968 | CONFIG_USB=y | ||
969 | # CONFIG_USB_DEBUG is not set | ||
970 | |||
971 | # | ||
972 | # Miscellaneous USB options | ||
973 | # | ||
974 | CONFIG_USB_DEVICEFS=y | ||
975 | CONFIG_USB_DEVICE_CLASS=y | ||
976 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
977 | # CONFIG_USB_OTG is not set | ||
978 | |||
979 | # | ||
980 | # USB Host Controller Drivers | ||
981 | # | ||
982 | CONFIG_USB_EHCI_HCD=y | ||
983 | CONFIG_USB_EHCI_SPLIT_ISO=y | ||
984 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
985 | CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
986 | # CONFIG_USB_ISP116X_HCD is not set | ||
987 | CONFIG_USB_OHCI_HCD=y | ||
988 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
989 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
990 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
991 | CONFIG_USB_UHCI_HCD=y | ||
992 | CONFIG_USB_SL811_HCD=y | ||
993 | # CONFIG_USB_R8A66597_HCD is not set | ||
994 | |||
995 | # | ||
996 | # USB Device Class drivers | ||
997 | # | ||
998 | # CONFIG_USB_ACM is not set | ||
999 | CONFIG_USB_PRINTER=y | ||
1000 | |||
1001 | # | ||
1002 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1003 | # | ||
1004 | |||
1005 | # | ||
1006 | # may also be needed; see USB_STORAGE Help for more information | ||
1007 | # | ||
1008 | CONFIG_USB_STORAGE=y | ||
1009 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1010 | CONFIG_USB_STORAGE_DATAFAB=y | ||
1011 | CONFIG_USB_STORAGE_FREECOM=y | ||
1012 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1013 | CONFIG_USB_STORAGE_DPCM=y | ||
1014 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1015 | CONFIG_USB_STORAGE_SDDR09=y | ||
1016 | CONFIG_USB_STORAGE_SDDR55=y | ||
1017 | CONFIG_USB_STORAGE_JUMPSHOT=y | ||
1018 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1019 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1020 | # CONFIG_USB_LIBUSUAL is not set | ||
1021 | |||
1022 | # | ||
1023 | # USB Imaging devices | ||
1024 | # | ||
1025 | # CONFIG_USB_MDC800 is not set | ||
1026 | # CONFIG_USB_MICROTEK is not set | ||
1027 | # CONFIG_USB_MON is not set | ||
1028 | |||
1029 | # | ||
1030 | # USB port drivers | ||
1031 | # | ||
1032 | |||
1033 | # | ||
1034 | # USB Serial Converter support | ||
1035 | # | ||
1036 | # CONFIG_USB_SERIAL is not set | ||
1037 | |||
1038 | # | ||
1039 | # USB Miscellaneous drivers | ||
1040 | # | ||
1041 | # CONFIG_USB_EMI62 is not set | ||
1042 | # CONFIG_USB_EMI26 is not set | ||
1043 | # CONFIG_USB_ADUTUX is not set | ||
1044 | # CONFIG_USB_AUERSWALD is not set | ||
1045 | # CONFIG_USB_RIO500 is not set | ||
1046 | # CONFIG_USB_LEGOTOWER is not set | ||
1047 | # CONFIG_USB_LCD is not set | ||
1048 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1049 | # CONFIG_USB_LED is not set | ||
1050 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1051 | # CONFIG_USB_CYTHERM is not set | ||
1052 | # CONFIG_USB_PHIDGET is not set | ||
1053 | # CONFIG_USB_IDMOUSE is not set | ||
1054 | # CONFIG_USB_FTDI_ELAN is not set | ||
1055 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1056 | # CONFIG_USB_SISUSBVGA is not set | ||
1057 | # CONFIG_USB_LD is not set | ||
1058 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1059 | # CONFIG_USB_IOWARRIOR is not set | ||
1060 | # CONFIG_USB_TEST is not set | ||
1061 | |||
1062 | # | ||
1063 | # USB DSL modem support | ||
1064 | # | ||
1065 | |||
1066 | # | ||
1067 | # USB Gadget Support | ||
1068 | # | ||
1069 | # CONFIG_USB_GADGET is not set | ||
1070 | # CONFIG_MMC is not set | ||
1071 | CONFIG_NEW_LEDS=y | ||
1072 | CONFIG_LEDS_CLASS=y | ||
1073 | |||
1074 | # | ||
1075 | # LED drivers | ||
1076 | # | ||
1077 | # CONFIG_LEDS_GPIO is not set | ||
1078 | |||
1079 | # | ||
1080 | # LED Triggers | ||
1081 | # | ||
1082 | CONFIG_LEDS_TRIGGERS=y | ||
1083 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
1084 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
1085 | CONFIG_RTC_LIB=y | ||
1086 | CONFIG_RTC_CLASS=y | ||
1087 | CONFIG_RTC_HCTOSYS=y | ||
1088 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1089 | # CONFIG_RTC_DEBUG is not set | ||
1090 | |||
1091 | # | ||
1092 | # RTC interfaces | ||
1093 | # | ||
1094 | CONFIG_RTC_INTF_SYSFS=y | ||
1095 | CONFIG_RTC_INTF_PROC=y | ||
1096 | CONFIG_RTC_INTF_DEV=y | ||
1097 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
1098 | # CONFIG_RTC_DRV_TEST is not set | ||
1099 | |||
1100 | # | ||
1101 | # I2C RTC drivers | ||
1102 | # | ||
1103 | CONFIG_RTC_DRV_DS1307=y | ||
1104 | # CONFIG_RTC_DRV_DS1374 is not set | ||
1105 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1106 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
1107 | CONFIG_RTC_DRV_RS5C372=y | ||
1108 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1109 | # CONFIG_RTC_DRV_X1205 is not set | ||
1110 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1111 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1112 | CONFIG_RTC_DRV_M41T80=y | ||
1113 | # CONFIG_RTC_DRV_M41T80_WDT is not set | ||
1114 | |||
1115 | # | ||
1116 | # SPI RTC drivers | ||
1117 | # | ||
1118 | |||
1119 | # | ||
1120 | # Platform RTC drivers | ||
1121 | # | ||
1122 | # CONFIG_RTC_DRV_CMOS is not set | ||
1123 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1124 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
1125 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1126 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1127 | # CONFIG_RTC_DRV_M48T59 is not set | ||
1128 | # CONFIG_RTC_DRV_V3020 is not set | ||
1129 | |||
1130 | # | ||
1131 | # on-CPU RTC drivers | ||
1132 | # | ||
1133 | |||
1134 | # | ||
1135 | # File systems | ||
1136 | # | ||
1137 | CONFIG_EXT2_FS=y | ||
1138 | # CONFIG_EXT2_FS_XATTR is not set | ||
1139 | # CONFIG_EXT2_FS_XIP is not set | ||
1140 | CONFIG_EXT3_FS=y | ||
1141 | # CONFIG_EXT3_FS_XATTR is not set | ||
1142 | # CONFIG_EXT4DEV_FS is not set | ||
1143 | CONFIG_JBD=y | ||
1144 | # CONFIG_REISERFS_FS is not set | ||
1145 | # CONFIG_JFS_FS is not set | ||
1146 | # CONFIG_FS_POSIX_ACL is not set | ||
1147 | # CONFIG_XFS_FS is not set | ||
1148 | # CONFIG_GFS2_FS is not set | ||
1149 | # CONFIG_OCFS2_FS is not set | ||
1150 | # CONFIG_MINIX_FS is not set | ||
1151 | # CONFIG_ROMFS_FS is not set | ||
1152 | CONFIG_INOTIFY=y | ||
1153 | CONFIG_INOTIFY_USER=y | ||
1154 | # CONFIG_QUOTA is not set | ||
1155 | CONFIG_DNOTIFY=y | ||
1156 | # CONFIG_AUTOFS_FS is not set | ||
1157 | # CONFIG_AUTOFS4_FS is not set | ||
1158 | # CONFIG_FUSE_FS is not set | ||
1159 | |||
1160 | # | ||
1161 | # CD-ROM/DVD Filesystems | ||
1162 | # | ||
1163 | CONFIG_ISO9660_FS=y | ||
1164 | # CONFIG_JOLIET is not set | ||
1165 | # CONFIG_ZISOFS is not set | ||
1166 | CONFIG_UDF_FS=m | ||
1167 | CONFIG_UDF_NLS=y | ||
1168 | |||
1169 | # | ||
1170 | # DOS/FAT/NT Filesystems | ||
1171 | # | ||
1172 | CONFIG_FAT_FS=y | ||
1173 | CONFIG_MSDOS_FS=y | ||
1174 | CONFIG_VFAT_FS=y | ||
1175 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1176 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1177 | # CONFIG_NTFS_FS is not set | ||
1178 | |||
1179 | # | ||
1180 | # Pseudo filesystems | ||
1181 | # | ||
1182 | CONFIG_PROC_FS=y | ||
1183 | CONFIG_PROC_SYSCTL=y | ||
1184 | CONFIG_SYSFS=y | ||
1185 | CONFIG_TMPFS=y | ||
1186 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1187 | # CONFIG_HUGETLB_PAGE is not set | ||
1188 | # CONFIG_CONFIGFS_FS is not set | ||
1189 | |||
1190 | # | ||
1191 | # Miscellaneous filesystems | ||
1192 | # | ||
1193 | # CONFIG_ADFS_FS is not set | ||
1194 | # CONFIG_AFFS_FS is not set | ||
1195 | # CONFIG_HFS_FS is not set | ||
1196 | # CONFIG_HFSPLUS_FS is not set | ||
1197 | # CONFIG_BEFS_FS is not set | ||
1198 | # CONFIG_BFS_FS is not set | ||
1199 | # CONFIG_EFS_FS is not set | ||
1200 | CONFIG_JFFS2_FS=y | ||
1201 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1202 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1203 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1204 | # CONFIG_JFFS2_SUMMARY is not set | ||
1205 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1206 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1207 | CONFIG_JFFS2_ZLIB=y | ||
1208 | # CONFIG_JFFS2_LZO is not set | ||
1209 | CONFIG_JFFS2_RTIME=y | ||
1210 | # CONFIG_JFFS2_RUBIN is not set | ||
1211 | CONFIG_CRAMFS=y | ||
1212 | # CONFIG_VXFS_FS is not set | ||
1213 | # CONFIG_HPFS_FS is not set | ||
1214 | # CONFIG_QNX4FS_FS is not set | ||
1215 | # CONFIG_SYSV_FS is not set | ||
1216 | # CONFIG_UFS_FS is not set | ||
1217 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1218 | CONFIG_NFS_FS=y | ||
1219 | CONFIG_NFS_V3=y | ||
1220 | # CONFIG_NFS_V3_ACL is not set | ||
1221 | # CONFIG_NFS_V4 is not set | ||
1222 | # CONFIG_NFS_DIRECTIO is not set | ||
1223 | # CONFIG_NFSD is not set | ||
1224 | CONFIG_ROOT_NFS=y | ||
1225 | CONFIG_LOCKD=y | ||
1226 | CONFIG_LOCKD_V4=y | ||
1227 | CONFIG_NFS_COMMON=y | ||
1228 | CONFIG_SUNRPC=y | ||
1229 | # CONFIG_SUNRPC_BIND34 is not set | ||
1230 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1231 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1232 | # CONFIG_SMB_FS is not set | ||
1233 | # CONFIG_CIFS is not set | ||
1234 | # CONFIG_NCP_FS is not set | ||
1235 | # CONFIG_CODA_FS is not set | ||
1236 | # CONFIG_AFS_FS is not set | ||
1237 | |||
1238 | # | ||
1239 | # Partition Types | ||
1240 | # | ||
1241 | CONFIG_PARTITION_ADVANCED=y | ||
1242 | # CONFIG_ACORN_PARTITION is not set | ||
1243 | # CONFIG_OSF_PARTITION is not set | ||
1244 | # CONFIG_AMIGA_PARTITION is not set | ||
1245 | # CONFIG_ATARI_PARTITION is not set | ||
1246 | # CONFIG_MAC_PARTITION is not set | ||
1247 | CONFIG_MSDOS_PARTITION=y | ||
1248 | CONFIG_BSD_DISKLABEL=y | ||
1249 | CONFIG_MINIX_SUBPARTITION=y | ||
1250 | CONFIG_SOLARIS_X86_PARTITION=y | ||
1251 | CONFIG_UNIXWARE_DISKLABEL=y | ||
1252 | CONFIG_LDM_PARTITION=y | ||
1253 | CONFIG_LDM_DEBUG=y | ||
1254 | # CONFIG_SGI_PARTITION is not set | ||
1255 | # CONFIG_ULTRIX_PARTITION is not set | ||
1256 | CONFIG_SUN_PARTITION=y | ||
1257 | # CONFIG_KARMA_PARTITION is not set | ||
1258 | # CONFIG_EFI_PARTITION is not set | ||
1259 | # CONFIG_SYSV68_PARTITION is not set | ||
1260 | CONFIG_NLS=y | ||
1261 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1262 | CONFIG_NLS_CODEPAGE_437=y | ||
1263 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1264 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1265 | CONFIG_NLS_CODEPAGE_850=y | ||
1266 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1267 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1268 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1269 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1270 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1271 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1272 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1273 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1274 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1275 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1276 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1277 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1278 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1279 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1280 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1281 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1282 | # CONFIG_NLS_ISO8859_8 is not set | ||
1283 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1284 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1285 | # CONFIG_NLS_ASCII is not set | ||
1286 | CONFIG_NLS_ISO8859_1=y | ||
1287 | CONFIG_NLS_ISO8859_2=y | ||
1288 | # CONFIG_NLS_ISO8859_3 is not set | ||
1289 | # CONFIG_NLS_ISO8859_4 is not set | ||
1290 | # CONFIG_NLS_ISO8859_5 is not set | ||
1291 | # CONFIG_NLS_ISO8859_6 is not set | ||
1292 | # CONFIG_NLS_ISO8859_7 is not set | ||
1293 | # CONFIG_NLS_ISO8859_9 is not set | ||
1294 | # CONFIG_NLS_ISO8859_13 is not set | ||
1295 | # CONFIG_NLS_ISO8859_14 is not set | ||
1296 | # CONFIG_NLS_ISO8859_15 is not set | ||
1297 | # CONFIG_NLS_KOI8_R is not set | ||
1298 | # CONFIG_NLS_KOI8_U is not set | ||
1299 | # CONFIG_NLS_UTF8 is not set | ||
1300 | # CONFIG_DLM is not set | ||
1301 | CONFIG_INSTRUMENTATION=y | ||
1302 | # CONFIG_PROFILING is not set | ||
1303 | # CONFIG_MARKERS is not set | ||
1304 | |||
1305 | # | ||
1306 | # Kernel hacking | ||
1307 | # | ||
1308 | # CONFIG_PRINTK_TIME is not set | ||
1309 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1310 | CONFIG_ENABLE_MUST_CHECK=y | ||
1311 | # CONFIG_MAGIC_SYSRQ is not set | ||
1312 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1313 | # CONFIG_DEBUG_FS is not set | ||
1314 | # CONFIG_HEADERS_CHECK is not set | ||
1315 | # CONFIG_DEBUG_KERNEL is not set | ||
1316 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1317 | CONFIG_FRAME_POINTER=y | ||
1318 | # CONFIG_SAMPLES is not set | ||
1319 | CONFIG_DEBUG_USER=y | ||
1320 | |||
1321 | # | ||
1322 | # Security options | ||
1323 | # | ||
1324 | # CONFIG_KEYS is not set | ||
1325 | # CONFIG_SECURITY is not set | ||
1326 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1327 | CONFIG_CRYPTO=y | ||
1328 | CONFIG_CRYPTO_ALGAPI=m | ||
1329 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1330 | CONFIG_CRYPTO_MANAGER=m | ||
1331 | # CONFIG_CRYPTO_HMAC is not set | ||
1332 | # CONFIG_CRYPTO_XCBC is not set | ||
1333 | # CONFIG_CRYPTO_NULL is not set | ||
1334 | # CONFIG_CRYPTO_MD4 is not set | ||
1335 | # CONFIG_CRYPTO_MD5 is not set | ||
1336 | # CONFIG_CRYPTO_SHA1 is not set | ||
1337 | # CONFIG_CRYPTO_SHA256 is not set | ||
1338 | # CONFIG_CRYPTO_SHA512 is not set | ||
1339 | # CONFIG_CRYPTO_WP512 is not set | ||
1340 | # CONFIG_CRYPTO_TGR192 is not set | ||
1341 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1342 | CONFIG_CRYPTO_ECB=m | ||
1343 | CONFIG_CRYPTO_CBC=m | ||
1344 | CONFIG_CRYPTO_PCBC=m | ||
1345 | # CONFIG_CRYPTO_LRW is not set | ||
1346 | # CONFIG_CRYPTO_XTS is not set | ||
1347 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1348 | # CONFIG_CRYPTO_DES is not set | ||
1349 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1350 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1351 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1352 | # CONFIG_CRYPTO_SERPENT is not set | ||
1353 | # CONFIG_CRYPTO_AES is not set | ||
1354 | # CONFIG_CRYPTO_CAST5 is not set | ||
1355 | # CONFIG_CRYPTO_CAST6 is not set | ||
1356 | # CONFIG_CRYPTO_TEA is not set | ||
1357 | # CONFIG_CRYPTO_ARC4 is not set | ||
1358 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1359 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1360 | # CONFIG_CRYPTO_SEED is not set | ||
1361 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1362 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1363 | # CONFIG_CRYPTO_CRC32C is not set | ||
1364 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1365 | # CONFIG_CRYPTO_TEST is not set | ||
1366 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1367 | CONFIG_CRYPTO_HW=y | ||
1368 | |||
1369 | # | ||
1370 | # Library routines | ||
1371 | # | ||
1372 | CONFIG_BITREVERSE=y | ||
1373 | CONFIG_CRC_CCITT=y | ||
1374 | CONFIG_CRC16=y | ||
1375 | # CONFIG_CRC_ITU_T is not set | ||
1376 | CONFIG_CRC32=y | ||
1377 | # CONFIG_CRC7 is not set | ||
1378 | CONFIG_LIBCRC32C=y | ||
1379 | CONFIG_ZLIB_INFLATE=y | ||
1380 | CONFIG_ZLIB_DEFLATE=y | ||
1381 | CONFIG_PLIST=y | ||
1382 | CONFIG_HAS_IOMEM=y | ||
1383 | CONFIG_HAS_IOPORT=y | ||
1384 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/configs/pcm027_defconfig b/arch/arm/configs/pcm027_defconfig new file mode 100644 index 000000000000..17b9b2469570 --- /dev/null +++ b/arch/arm/configs/pcm027_defconfig | |||
@@ -0,0 +1,1096 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.24-rc6 | ||
4 | # Fri Dec 21 10:52:09 2007 | ||
5 | # | ||
6 | CONFIG_ARM=y | ||
7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
8 | CONFIG_GENERIC_GPIO=y | ||
9 | CONFIG_GENERIC_TIME=y | ||
10 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
11 | CONFIG_MMU=y | ||
12 | # CONFIG_NO_IOPORT is not set | ||
13 | CONFIG_GENERIC_HARDIRQS=y | ||
14 | CONFIG_STACKTRACE_SUPPORT=y | ||
15 | CONFIG_LOCKDEP_SUPPORT=y | ||
16 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
17 | CONFIG_HARDIRQS_SW_RESEND=y | ||
18 | CONFIG_GENERIC_IRQ_PROBE=y | ||
19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
20 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
21 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
22 | CONFIG_GENERIC_HWEIGHT=y | ||
23 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
24 | CONFIG_ZONE_DMA=y | ||
25 | CONFIG_ARCH_MTD_XIP=y | ||
26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
28 | |||
29 | # | ||
30 | # General setup | ||
31 | # | ||
32 | CONFIG_EXPERIMENTAL=y | ||
33 | CONFIG_BROKEN_ON_SMP=y | ||
34 | CONFIG_LOCK_KERNEL=y | ||
35 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
36 | CONFIG_LOCALVERSION="" | ||
37 | CONFIG_LOCALVERSION_AUTO=y | ||
38 | # CONFIG_SWAP is not set | ||
39 | CONFIG_SYSVIPC=y | ||
40 | CONFIG_SYSVIPC_SYSCTL=y | ||
41 | CONFIG_POSIX_MQUEUE=y | ||
42 | CONFIG_BSD_PROCESS_ACCT=y | ||
43 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
44 | # CONFIG_TASKSTATS is not set | ||
45 | # CONFIG_USER_NS is not set | ||
46 | # CONFIG_PID_NS is not set | ||
47 | # CONFIG_AUDIT is not set | ||
48 | CONFIG_IKCONFIG=y | ||
49 | CONFIG_IKCONFIG_PROC=y | ||
50 | CONFIG_LOG_BUF_SHIFT=14 | ||
51 | # CONFIG_CGROUPS is not set | ||
52 | CONFIG_FAIR_GROUP_SCHED=y | ||
53 | CONFIG_FAIR_USER_SCHED=y | ||
54 | # CONFIG_FAIR_CGROUP_SCHED is not set | ||
55 | CONFIG_SYSFS_DEPRECATED=y | ||
56 | # CONFIG_RELAY is not set | ||
57 | # CONFIG_BLK_DEV_INITRD is not set | ||
58 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
59 | CONFIG_SYSCTL=y | ||
60 | CONFIG_EMBEDDED=y | ||
61 | CONFIG_UID16=y | ||
62 | CONFIG_SYSCTL_SYSCALL=y | ||
63 | # CONFIG_KALLSYMS is not set | ||
64 | CONFIG_HOTPLUG=y | ||
65 | CONFIG_PRINTK=y | ||
66 | CONFIG_BUG=y | ||
67 | CONFIG_ELF_CORE=y | ||
68 | CONFIG_BASE_FULL=y | ||
69 | CONFIG_FUTEX=y | ||
70 | CONFIG_ANON_INODES=y | ||
71 | CONFIG_EPOLL=y | ||
72 | CONFIG_SIGNALFD=y | ||
73 | CONFIG_EVENTFD=y | ||
74 | CONFIG_SHMEM=y | ||
75 | CONFIG_VM_EVENT_COUNTERS=y | ||
76 | CONFIG_SLAB=y | ||
77 | # CONFIG_SLUB is not set | ||
78 | # CONFIG_SLOB is not set | ||
79 | CONFIG_RT_MUTEXES=y | ||
80 | # CONFIG_TINY_SHMEM is not set | ||
81 | CONFIG_BASE_SMALL=0 | ||
82 | CONFIG_MODULES=y | ||
83 | CONFIG_MODULE_UNLOAD=y | ||
84 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
85 | # CONFIG_MODVERSIONS is not set | ||
86 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
87 | # CONFIG_KMOD is not set | ||
88 | CONFIG_BLOCK=y | ||
89 | # CONFIG_LBD is not set | ||
90 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
91 | # CONFIG_LSF is not set | ||
92 | # CONFIG_BLK_DEV_BSG is not set | ||
93 | |||
94 | # | ||
95 | # IO Schedulers | ||
96 | # | ||
97 | CONFIG_IOSCHED_NOOP=y | ||
98 | # CONFIG_IOSCHED_AS is not set | ||
99 | # CONFIG_IOSCHED_DEADLINE is not set | ||
100 | # CONFIG_IOSCHED_CFQ is not set | ||
101 | # CONFIG_DEFAULT_AS is not set | ||
102 | # CONFIG_DEFAULT_DEADLINE is not set | ||
103 | # CONFIG_DEFAULT_CFQ is not set | ||
104 | CONFIG_DEFAULT_NOOP=y | ||
105 | CONFIG_DEFAULT_IOSCHED="noop" | ||
106 | |||
107 | # | ||
108 | # System Type | ||
109 | # | ||
110 | # CONFIG_ARCH_AAEC2000 is not set | ||
111 | # CONFIG_ARCH_INTEGRATOR is not set | ||
112 | # CONFIG_ARCH_REALVIEW is not set | ||
113 | # CONFIG_ARCH_VERSATILE is not set | ||
114 | # CONFIG_ARCH_AT91 is not set | ||
115 | # CONFIG_ARCH_CLPS7500 is not set | ||
116 | # CONFIG_ARCH_CLPS711X is not set | ||
117 | # CONFIG_ARCH_CO285 is not set | ||
118 | # CONFIG_ARCH_EBSA110 is not set | ||
119 | # CONFIG_ARCH_EP93XX is not set | ||
120 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
121 | # CONFIG_ARCH_NETX is not set | ||
122 | # CONFIG_ARCH_H720X is not set | ||
123 | # CONFIG_ARCH_IMX is not set | ||
124 | # CONFIG_ARCH_IOP13XX is not set | ||
125 | # CONFIG_ARCH_IOP32X is not set | ||
126 | # CONFIG_ARCH_IOP33X is not set | ||
127 | # CONFIG_ARCH_IXP23XX is not set | ||
128 | # CONFIG_ARCH_IXP2000 is not set | ||
129 | # CONFIG_ARCH_IXP4XX is not set | ||
130 | # CONFIG_ARCH_L7200 is not set | ||
131 | # CONFIG_ARCH_KS8695 is not set | ||
132 | # CONFIG_ARCH_NS9XXX is not set | ||
133 | # CONFIG_ARCH_MXC is not set | ||
134 | # CONFIG_ARCH_PNX4008 is not set | ||
135 | CONFIG_ARCH_PXA=y | ||
136 | # CONFIG_ARCH_RPC is not set | ||
137 | # CONFIG_ARCH_SA1100 is not set | ||
138 | # CONFIG_ARCH_S3C2410 is not set | ||
139 | # CONFIG_ARCH_SHARK is not set | ||
140 | # CONFIG_ARCH_LH7A40X is not set | ||
141 | # CONFIG_ARCH_DAVINCI is not set | ||
142 | # CONFIG_ARCH_OMAP is not set | ||
143 | |||
144 | # | ||
145 | # Intel PXA2xx/PXA3xx Implementations | ||
146 | # | ||
147 | # CONFIG_ARCH_LUBBOCK is not set | ||
148 | # CONFIG_MACH_LOGICPD_PXA270 is not set | ||
149 | # CONFIG_MACH_MAINSTONE is not set | ||
150 | # CONFIG_ARCH_PXA_IDP is not set | ||
151 | # CONFIG_PXA_SHARPSL is not set | ||
152 | # CONFIG_MACH_TRIZEPS4 is not set | ||
153 | # CONFIG_MACH_EM_X270 is not set | ||
154 | # CONFIG_MACH_ZYLONITE is not set | ||
155 | # CONFIG_MACH_ARMCORE is not set | ||
156 | CONFIG_MACH_PCM027=y | ||
157 | CONFIG_MACH_PCM990_BASEBOARD=y | ||
158 | CONFIG_PXA27x=y | ||
159 | |||
160 | # | ||
161 | # Boot options | ||
162 | # | ||
163 | |||
164 | # | ||
165 | # Power management | ||
166 | # | ||
167 | |||
168 | # | ||
169 | # Processor Type | ||
170 | # | ||
171 | CONFIG_CPU_32=y | ||
172 | CONFIG_CPU_XSCALE=y | ||
173 | CONFIG_CPU_32v5=y | ||
174 | CONFIG_CPU_ABRT_EV5T=y | ||
175 | CONFIG_CPU_CACHE_VIVT=y | ||
176 | CONFIG_CPU_TLB_V4WBI=y | ||
177 | CONFIG_CPU_CP15=y | ||
178 | CONFIG_CPU_CP15_MMU=y | ||
179 | |||
180 | # | ||
181 | # Processor Features | ||
182 | # | ||
183 | CONFIG_ARM_THUMB=y | ||
184 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
185 | # CONFIG_OUTER_CACHE is not set | ||
186 | CONFIG_IWMMXT=y | ||
187 | CONFIG_XSCALE_PMU=y | ||
188 | |||
189 | # | ||
190 | # Bus support | ||
191 | # | ||
192 | # CONFIG_PCI_SYSCALL is not set | ||
193 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
194 | # CONFIG_PCCARD is not set | ||
195 | |||
196 | # | ||
197 | # Kernel Features | ||
198 | # | ||
199 | CONFIG_TICK_ONESHOT=y | ||
200 | CONFIG_NO_HZ=y | ||
201 | CONFIG_HIGH_RES_TIMERS=y | ||
202 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
203 | CONFIG_PREEMPT=y | ||
204 | CONFIG_HZ=100 | ||
205 | CONFIG_AEABI=y | ||
206 | # CONFIG_OABI_COMPAT is not set | ||
207 | # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set | ||
208 | CONFIG_SELECT_MEMORY_MODEL=y | ||
209 | CONFIG_FLATMEM_MANUAL=y | ||
210 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
211 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
212 | CONFIG_FLATMEM=y | ||
213 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
214 | # CONFIG_SPARSEMEM_STATIC is not set | ||
215 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
216 | CONFIG_SPLIT_PTLOCK_CPUS=4096 | ||
217 | # CONFIG_RESOURCES_64BIT is not set | ||
218 | CONFIG_ZONE_DMA_FLAG=1 | ||
219 | CONFIG_BOUNCE=y | ||
220 | CONFIG_VIRT_TO_BUS=y | ||
221 | CONFIG_ALIGNMENT_TRAP=y | ||
222 | |||
223 | # | ||
224 | # Boot options | ||
225 | # | ||
226 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
227 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
228 | CONFIG_CMDLINE="" | ||
229 | # CONFIG_XIP_KERNEL is not set | ||
230 | # CONFIG_KEXEC is not set | ||
231 | |||
232 | # | ||
233 | # Floating point emulation | ||
234 | # | ||
235 | |||
236 | # | ||
237 | # At least one emulation must be selected | ||
238 | # | ||
239 | |||
240 | # | ||
241 | # Userspace binary formats | ||
242 | # | ||
243 | CONFIG_BINFMT_ELF=y | ||
244 | # CONFIG_BINFMT_AOUT is not set | ||
245 | # CONFIG_BINFMT_MISC is not set | ||
246 | |||
247 | # | ||
248 | # Power management options | ||
249 | # | ||
250 | # CONFIG_PM is not set | ||
251 | CONFIG_SUSPEND_UP_POSSIBLE=y | ||
252 | |||
253 | # | ||
254 | # Networking | ||
255 | # | ||
256 | CONFIG_NET=y | ||
257 | |||
258 | # | ||
259 | # Networking options | ||
260 | # | ||
261 | CONFIG_PACKET=y | ||
262 | CONFIG_PACKET_MMAP=y | ||
263 | CONFIG_UNIX=y | ||
264 | # CONFIG_NET_KEY is not set | ||
265 | CONFIG_INET=y | ||
266 | # CONFIG_IP_MULTICAST is not set | ||
267 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
268 | CONFIG_IP_FIB_HASH=y | ||
269 | CONFIG_IP_PNP=y | ||
270 | # CONFIG_IP_PNP_DHCP is not set | ||
271 | # CONFIG_IP_PNP_BOOTP is not set | ||
272 | # CONFIG_IP_PNP_RARP is not set | ||
273 | # CONFIG_NET_IPIP is not set | ||
274 | # CONFIG_NET_IPGRE is not set | ||
275 | # CONFIG_ARPD is not set | ||
276 | # CONFIG_SYN_COOKIES is not set | ||
277 | # CONFIG_INET_AH is not set | ||
278 | # CONFIG_INET_ESP is not set | ||
279 | # CONFIG_INET_IPCOMP is not set | ||
280 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
281 | # CONFIG_INET_TUNNEL is not set | ||
282 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
283 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
284 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
285 | # CONFIG_INET_LRO is not set | ||
286 | # CONFIG_INET_DIAG is not set | ||
287 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
288 | CONFIG_TCP_CONG_CUBIC=y | ||
289 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
290 | # CONFIG_TCP_MD5SIG is not set | ||
291 | # CONFIG_IPV6 is not set | ||
292 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
293 | # CONFIG_INET6_TUNNEL is not set | ||
294 | # CONFIG_NETWORK_SECMARK is not set | ||
295 | # CONFIG_NETFILTER is not set | ||
296 | # CONFIG_IP_DCCP is not set | ||
297 | # CONFIG_IP_SCTP is not set | ||
298 | # CONFIG_TIPC is not set | ||
299 | # CONFIG_ATM is not set | ||
300 | # CONFIG_BRIDGE is not set | ||
301 | # CONFIG_VLAN_8021Q is not set | ||
302 | # CONFIG_DECNET is not set | ||
303 | # CONFIG_LLC2 is not set | ||
304 | # CONFIG_IPX is not set | ||
305 | # CONFIG_ATALK is not set | ||
306 | # CONFIG_X25 is not set | ||
307 | # CONFIG_LAPB is not set | ||
308 | # CONFIG_ECONET is not set | ||
309 | # CONFIG_WAN_ROUTER is not set | ||
310 | # CONFIG_NET_SCHED is not set | ||
311 | |||
312 | # | ||
313 | # Network testing | ||
314 | # | ||
315 | # CONFIG_NET_PKTGEN is not set | ||
316 | # CONFIG_HAMRADIO is not set | ||
317 | # CONFIG_IRDA is not set | ||
318 | # CONFIG_BT is not set | ||
319 | # CONFIG_AF_RXRPC is not set | ||
320 | |||
321 | # | ||
322 | # Wireless | ||
323 | # | ||
324 | # CONFIG_CFG80211 is not set | ||
325 | # CONFIG_WIRELESS_EXT is not set | ||
326 | # CONFIG_MAC80211 is not set | ||
327 | # CONFIG_IEEE80211 is not set | ||
328 | # CONFIG_RFKILL is not set | ||
329 | # CONFIG_NET_9P is not set | ||
330 | |||
331 | # | ||
332 | # Device Drivers | ||
333 | # | ||
334 | |||
335 | # | ||
336 | # Generic Driver Options | ||
337 | # | ||
338 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
339 | CONFIG_STANDALONE=y | ||
340 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
341 | CONFIG_FW_LOADER=y | ||
342 | # CONFIG_SYS_HYPERVISOR is not set | ||
343 | # CONFIG_CONNECTOR is not set | ||
344 | CONFIG_MTD=y | ||
345 | # CONFIG_MTD_DEBUG is not set | ||
346 | # CONFIG_MTD_CONCAT is not set | ||
347 | CONFIG_MTD_PARTITIONS=y | ||
348 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
349 | CONFIG_MTD_CMDLINE_PARTS=y | ||
350 | # CONFIG_MTD_AFS_PARTS is not set | ||
351 | |||
352 | # | ||
353 | # User Modules And Translation Layers | ||
354 | # | ||
355 | CONFIG_MTD_CHAR=y | ||
356 | CONFIG_MTD_BLKDEVS=y | ||
357 | CONFIG_MTD_BLOCK=y | ||
358 | # CONFIG_FTL is not set | ||
359 | # CONFIG_NFTL is not set | ||
360 | # CONFIG_INFTL is not set | ||
361 | # CONFIG_RFD_FTL is not set | ||
362 | # CONFIG_SSFDC is not set | ||
363 | # CONFIG_MTD_OOPS is not set | ||
364 | |||
365 | # | ||
366 | # RAM/ROM/Flash chip drivers | ||
367 | # | ||
368 | CONFIG_MTD_CFI=y | ||
369 | # CONFIG_MTD_JEDECPROBE is not set | ||
370 | CONFIG_MTD_GEN_PROBE=y | ||
371 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
372 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
373 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
374 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
375 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
376 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
377 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
378 | CONFIG_MTD_CFI_I1=y | ||
379 | CONFIG_MTD_CFI_I2=y | ||
380 | # CONFIG_MTD_CFI_I4 is not set | ||
381 | # CONFIG_MTD_CFI_I8 is not set | ||
382 | CONFIG_MTD_CFI_INTELEXT=y | ||
383 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
384 | # CONFIG_MTD_CFI_STAA is not set | ||
385 | CONFIG_MTD_CFI_UTIL=y | ||
386 | # CONFIG_MTD_RAM is not set | ||
387 | # CONFIG_MTD_ROM is not set | ||
388 | # CONFIG_MTD_ABSENT is not set | ||
389 | # CONFIG_MTD_XIP is not set | ||
390 | |||
391 | # | ||
392 | # Mapping drivers for chip access | ||
393 | # | ||
394 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
395 | CONFIG_MTD_PHYSMAP=y | ||
396 | CONFIG_MTD_PHYSMAP_START=0x00000000 | ||
397 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
398 | CONFIG_MTD_PHYSMAP_BANKWIDTH=0 | ||
399 | # CONFIG_MTD_PXA2XX is not set | ||
400 | # CONFIG_MTD_ARM_INTEGRATOR is not set | ||
401 | # CONFIG_MTD_SHARP_SL is not set | ||
402 | # CONFIG_MTD_PLATRAM is not set | ||
403 | |||
404 | # | ||
405 | # Self-contained MTD device drivers | ||
406 | # | ||
407 | # CONFIG_MTD_SLRAM is not set | ||
408 | # CONFIG_MTD_PHRAM is not set | ||
409 | # CONFIG_MTD_MTDRAM is not set | ||
410 | # CONFIG_MTD_BLOCK2MTD is not set | ||
411 | |||
412 | # | ||
413 | # Disk-On-Chip Device Drivers | ||
414 | # | ||
415 | # CONFIG_MTD_DOC2000 is not set | ||
416 | # CONFIG_MTD_DOC2001 is not set | ||
417 | # CONFIG_MTD_DOC2001PLUS is not set | ||
418 | # CONFIG_MTD_NAND is not set | ||
419 | # CONFIG_MTD_ONENAND is not set | ||
420 | |||
421 | # | ||
422 | # UBI - Unsorted block images | ||
423 | # | ||
424 | # CONFIG_MTD_UBI is not set | ||
425 | # CONFIG_PARPORT is not set | ||
426 | # CONFIG_BLK_DEV is not set | ||
427 | # CONFIG_MISC_DEVICES is not set | ||
428 | # CONFIG_IDE is not set | ||
429 | |||
430 | # | ||
431 | # SCSI device support | ||
432 | # | ||
433 | # CONFIG_RAID_ATTRS is not set | ||
434 | CONFIG_SCSI=y | ||
435 | CONFIG_SCSI_DMA=y | ||
436 | # CONFIG_SCSI_TGT is not set | ||
437 | # CONFIG_SCSI_NETLINK is not set | ||
438 | CONFIG_SCSI_PROC_FS=y | ||
439 | |||
440 | # | ||
441 | # SCSI support type (disk, tape, CD-ROM) | ||
442 | # | ||
443 | CONFIG_BLK_DEV_SD=y | ||
444 | # CONFIG_CHR_DEV_ST is not set | ||
445 | # CONFIG_CHR_DEV_OSST is not set | ||
446 | # CONFIG_BLK_DEV_SR is not set | ||
447 | # CONFIG_CHR_DEV_SG is not set | ||
448 | # CONFIG_CHR_DEV_SCH is not set | ||
449 | |||
450 | # | ||
451 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
452 | # | ||
453 | # CONFIG_SCSI_MULTI_LUN is not set | ||
454 | # CONFIG_SCSI_CONSTANTS is not set | ||
455 | # CONFIG_SCSI_LOGGING is not set | ||
456 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
457 | CONFIG_SCSI_WAIT_SCAN=m | ||
458 | |||
459 | # | ||
460 | # SCSI Transports | ||
461 | # | ||
462 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
463 | # CONFIG_SCSI_FC_ATTRS is not set | ||
464 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
465 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
466 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
467 | # CONFIG_SCSI_LOWLEVEL is not set | ||
468 | # CONFIG_ATA is not set | ||
469 | # CONFIG_MD is not set | ||
470 | CONFIG_NETDEVICES=y | ||
471 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
472 | # CONFIG_DUMMY is not set | ||
473 | # CONFIG_BONDING is not set | ||
474 | # CONFIG_MACVLAN is not set | ||
475 | # CONFIG_EQUALIZER is not set | ||
476 | # CONFIG_TUN is not set | ||
477 | # CONFIG_VETH is not set | ||
478 | # CONFIG_PHYLIB is not set | ||
479 | CONFIG_NET_ETHERNET=y | ||
480 | CONFIG_MII=y | ||
481 | # CONFIG_AX88796 is not set | ||
482 | CONFIG_SMC91X=y | ||
483 | # CONFIG_DM9000 is not set | ||
484 | # CONFIG_SMC911X is not set | ||
485 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
486 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
487 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
488 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
489 | # CONFIG_B44 is not set | ||
490 | # CONFIG_NETDEV_1000 is not set | ||
491 | # CONFIG_NETDEV_10000 is not set | ||
492 | |||
493 | # | ||
494 | # Wireless LAN | ||
495 | # | ||
496 | # CONFIG_WLAN_PRE80211 is not set | ||
497 | # CONFIG_WLAN_80211 is not set | ||
498 | |||
499 | # | ||
500 | # USB Network Adapters | ||
501 | # | ||
502 | # CONFIG_USB_CATC is not set | ||
503 | # CONFIG_USB_KAWETH is not set | ||
504 | # CONFIG_USB_PEGASUS is not set | ||
505 | # CONFIG_USB_RTL8150 is not set | ||
506 | # CONFIG_USB_USBNET is not set | ||
507 | # CONFIG_WAN is not set | ||
508 | # CONFIG_PPP is not set | ||
509 | # CONFIG_SLIP is not set | ||
510 | # CONFIG_SHAPER is not set | ||
511 | # CONFIG_NETCONSOLE is not set | ||
512 | # CONFIG_NETPOLL is not set | ||
513 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
514 | # CONFIG_ISDN is not set | ||
515 | |||
516 | # | ||
517 | # Input device support | ||
518 | # | ||
519 | CONFIG_INPUT=y | ||
520 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
521 | # CONFIG_INPUT_POLLDEV is not set | ||
522 | |||
523 | # | ||
524 | # Userland interfaces | ||
525 | # | ||
526 | CONFIG_INPUT_MOUSEDEV=y | ||
527 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
528 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
529 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
530 | # CONFIG_INPUT_JOYDEV is not set | ||
531 | # CONFIG_INPUT_EVDEV is not set | ||
532 | # CONFIG_INPUT_EVBUG is not set | ||
533 | |||
534 | # | ||
535 | # Input Device Drivers | ||
536 | # | ||
537 | # CONFIG_INPUT_KEYBOARD is not set | ||
538 | # CONFIG_INPUT_MOUSE is not set | ||
539 | # CONFIG_INPUT_JOYSTICK is not set | ||
540 | # CONFIG_INPUT_TABLET is not set | ||
541 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
542 | # CONFIG_INPUT_MISC is not set | ||
543 | |||
544 | # | ||
545 | # Hardware I/O ports | ||
546 | # | ||
547 | # CONFIG_SERIO is not set | ||
548 | # CONFIG_GAMEPORT is not set | ||
549 | |||
550 | # | ||
551 | # Character devices | ||
552 | # | ||
553 | CONFIG_VT=y | ||
554 | CONFIG_VT_CONSOLE=y | ||
555 | CONFIG_HW_CONSOLE=y | ||
556 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
557 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
558 | |||
559 | # | ||
560 | # Serial drivers | ||
561 | # | ||
562 | # CONFIG_SERIAL_8250 is not set | ||
563 | |||
564 | # | ||
565 | # Non-8250 serial port support | ||
566 | # | ||
567 | CONFIG_SERIAL_PXA=y | ||
568 | CONFIG_SERIAL_PXA_CONSOLE=y | ||
569 | CONFIG_SERIAL_CORE=y | ||
570 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
571 | CONFIG_UNIX98_PTYS=y | ||
572 | # CONFIG_LEGACY_PTYS is not set | ||
573 | # CONFIG_IPMI_HANDLER is not set | ||
574 | # CONFIG_HW_RANDOM is not set | ||
575 | # CONFIG_NVRAM is not set | ||
576 | # CONFIG_R3964 is not set | ||
577 | # CONFIG_RAW_DRIVER is not set | ||
578 | # CONFIG_TCG_TPM is not set | ||
579 | CONFIG_I2C=y | ||
580 | CONFIG_I2C_BOARDINFO=y | ||
581 | CONFIG_I2C_CHARDEV=y | ||
582 | |||
583 | # | ||
584 | # I2C Algorithms | ||
585 | # | ||
586 | # CONFIG_I2C_ALGOBIT is not set | ||
587 | # CONFIG_I2C_ALGOPCF is not set | ||
588 | # CONFIG_I2C_ALGOPCA is not set | ||
589 | |||
590 | # | ||
591 | # I2C Hardware Bus support | ||
592 | # | ||
593 | # CONFIG_I2C_GPIO is not set | ||
594 | CONFIG_I2C_PXA=y | ||
595 | # CONFIG_I2C_PXA_SLAVE is not set | ||
596 | # CONFIG_I2C_OCORES is not set | ||
597 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
598 | # CONFIG_I2C_SIMTEC is not set | ||
599 | # CONFIG_I2C_TAOS_EVM is not set | ||
600 | # CONFIG_I2C_STUB is not set | ||
601 | # CONFIG_I2C_TINY_USB is not set | ||
602 | |||
603 | # | ||
604 | # Miscellaneous I2C Chip support | ||
605 | # | ||
606 | # CONFIG_SENSORS_DS1337 is not set | ||
607 | # CONFIG_SENSORS_DS1374 is not set | ||
608 | # CONFIG_DS1682 is not set | ||
609 | CONFIG_SENSORS_EEPROM=y | ||
610 | # CONFIG_SENSORS_PCF8574 is not set | ||
611 | # CONFIG_SENSORS_PCA9539 is not set | ||
612 | # CONFIG_SENSORS_PCF8591 is not set | ||
613 | # CONFIG_SENSORS_MAX6875 is not set | ||
614 | # CONFIG_SENSORS_TSL2550 is not set | ||
615 | # CONFIG_I2C_DEBUG_CORE is not set | ||
616 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
617 | # CONFIG_I2C_DEBUG_BUS is not set | ||
618 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
619 | |||
620 | # | ||
621 | # SPI support | ||
622 | # | ||
623 | # CONFIG_SPI is not set | ||
624 | # CONFIG_SPI_MASTER is not set | ||
625 | # CONFIG_W1 is not set | ||
626 | # CONFIG_POWER_SUPPLY is not set | ||
627 | # CONFIG_HWMON is not set | ||
628 | # CONFIG_WATCHDOG is not set | ||
629 | |||
630 | # | ||
631 | # Sonics Silicon Backplane | ||
632 | # | ||
633 | CONFIG_SSB_POSSIBLE=y | ||
634 | # CONFIG_SSB is not set | ||
635 | |||
636 | # | ||
637 | # Multifunction device drivers | ||
638 | # | ||
639 | # CONFIG_MFD_SM501 is not set | ||
640 | |||
641 | # | ||
642 | # Multimedia devices | ||
643 | # | ||
644 | # CONFIG_VIDEO_DEV is not set | ||
645 | # CONFIG_DVB_CORE is not set | ||
646 | # CONFIG_DAB is not set | ||
647 | |||
648 | # | ||
649 | # Graphics support | ||
650 | # | ||
651 | # CONFIG_VGASTATE is not set | ||
652 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
653 | # CONFIG_FB is not set | ||
654 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
655 | |||
656 | # | ||
657 | # Display device support | ||
658 | # | ||
659 | # CONFIG_DISPLAY_SUPPORT is not set | ||
660 | |||
661 | # | ||
662 | # Console display driver support | ||
663 | # | ||
664 | # CONFIG_VGA_CONSOLE is not set | ||
665 | CONFIG_DUMMY_CONSOLE=y | ||
666 | |||
667 | # | ||
668 | # Sound | ||
669 | # | ||
670 | CONFIG_SOUND=y | ||
671 | |||
672 | # | ||
673 | # Advanced Linux Sound Architecture | ||
674 | # | ||
675 | CONFIG_SND=y | ||
676 | CONFIG_SND_TIMER=y | ||
677 | CONFIG_SND_PCM=y | ||
678 | # CONFIG_SND_SEQUENCER is not set | ||
679 | CONFIG_SND_OSSEMUL=y | ||
680 | CONFIG_SND_MIXER_OSS=y | ||
681 | CONFIG_SND_PCM_OSS=y | ||
682 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
683 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
684 | CONFIG_SND_SUPPORT_OLD_API=y | ||
685 | CONFIG_SND_VERBOSE_PROCFS=y | ||
686 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
687 | # CONFIG_SND_DEBUG is not set | ||
688 | |||
689 | # | ||
690 | # Generic devices | ||
691 | # | ||
692 | CONFIG_SND_AC97_CODEC=y | ||
693 | # CONFIG_SND_DUMMY is not set | ||
694 | # CONFIG_SND_MTPAV is not set | ||
695 | # CONFIG_SND_SERIAL_U16550 is not set | ||
696 | # CONFIG_SND_MPU401 is not set | ||
697 | |||
698 | # | ||
699 | # ALSA ARM devices | ||
700 | # | ||
701 | CONFIG_SND_PXA2XX_PCM=y | ||
702 | CONFIG_SND_PXA2XX_AC97=y | ||
703 | |||
704 | # | ||
705 | # USB devices | ||
706 | # | ||
707 | # CONFIG_SND_USB_AUDIO is not set | ||
708 | # CONFIG_SND_USB_CAIAQ is not set | ||
709 | |||
710 | # | ||
711 | # System on Chip audio support | ||
712 | # | ||
713 | # CONFIG_SND_SOC is not set | ||
714 | |||
715 | # | ||
716 | # SoC Audio support for SuperH | ||
717 | # | ||
718 | |||
719 | # | ||
720 | # Open Sound System | ||
721 | # | ||
722 | # CONFIG_SOUND_PRIME is not set | ||
723 | CONFIG_AC97_BUS=y | ||
724 | # CONFIG_HID_SUPPORT is not set | ||
725 | CONFIG_USB_SUPPORT=y | ||
726 | CONFIG_USB_ARCH_HAS_HCD=y | ||
727 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
728 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
729 | CONFIG_USB=y | ||
730 | # CONFIG_USB_DEBUG is not set | ||
731 | |||
732 | # | ||
733 | # Miscellaneous USB options | ||
734 | # | ||
735 | CONFIG_USB_DEVICEFS=y | ||
736 | CONFIG_USB_DEVICE_CLASS=y | ||
737 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
738 | # CONFIG_USB_OTG is not set | ||
739 | |||
740 | # | ||
741 | # USB Host Controller Drivers | ||
742 | # | ||
743 | # CONFIG_USB_ISP116X_HCD is not set | ||
744 | CONFIG_USB_OHCI_HCD=y | ||
745 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
746 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
747 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
748 | # CONFIG_USB_SL811_HCD is not set | ||
749 | # CONFIG_USB_R8A66597_HCD is not set | ||
750 | |||
751 | # | ||
752 | # USB Device Class drivers | ||
753 | # | ||
754 | # CONFIG_USB_ACM is not set | ||
755 | # CONFIG_USB_PRINTER is not set | ||
756 | |||
757 | # | ||
758 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
759 | # | ||
760 | |||
761 | # | ||
762 | # may also be needed; see USB_STORAGE Help for more information | ||
763 | # | ||
764 | CONFIG_USB_STORAGE=y | ||
765 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
766 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
767 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
768 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
769 | # CONFIG_USB_STORAGE_DPCM is not set | ||
770 | # CONFIG_USB_STORAGE_USBAT is not set | ||
771 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
772 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
773 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
774 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
775 | # CONFIG_USB_STORAGE_KARMA is not set | ||
776 | # CONFIG_USB_LIBUSUAL is not set | ||
777 | |||
778 | # | ||
779 | # USB Imaging devices | ||
780 | # | ||
781 | # CONFIG_USB_MDC800 is not set | ||
782 | # CONFIG_USB_MICROTEK is not set | ||
783 | # CONFIG_USB_MON is not set | ||
784 | |||
785 | # | ||
786 | # USB port drivers | ||
787 | # | ||
788 | |||
789 | # | ||
790 | # USB Serial Converter support | ||
791 | # | ||
792 | # CONFIG_USB_SERIAL is not set | ||
793 | |||
794 | # | ||
795 | # USB Miscellaneous drivers | ||
796 | # | ||
797 | # CONFIG_USB_EMI62 is not set | ||
798 | # CONFIG_USB_EMI26 is not set | ||
799 | # CONFIG_USB_ADUTUX is not set | ||
800 | # CONFIG_USB_AUERSWALD is not set | ||
801 | # CONFIG_USB_RIO500 is not set | ||
802 | # CONFIG_USB_LEGOTOWER is not set | ||
803 | # CONFIG_USB_LCD is not set | ||
804 | # CONFIG_USB_BERRY_CHARGE is not set | ||
805 | # CONFIG_USB_LED is not set | ||
806 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
807 | # CONFIG_USB_CYTHERM is not set | ||
808 | # CONFIG_USB_PHIDGET is not set | ||
809 | # CONFIG_USB_IDMOUSE is not set | ||
810 | # CONFIG_USB_FTDI_ELAN is not set | ||
811 | # CONFIG_USB_APPLEDISPLAY is not set | ||
812 | # CONFIG_USB_LD is not set | ||
813 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
814 | # CONFIG_USB_IOWARRIOR is not set | ||
815 | # CONFIG_USB_TEST is not set | ||
816 | |||
817 | # | ||
818 | # USB DSL modem support | ||
819 | # | ||
820 | |||
821 | # | ||
822 | # USB Gadget Support | ||
823 | # | ||
824 | # CONFIG_USB_GADGET is not set | ||
825 | CONFIG_MMC=y | ||
826 | # CONFIG_MMC_DEBUG is not set | ||
827 | # CONFIG_MMC_UNSAFE_RESUME is not set | ||
828 | |||
829 | # | ||
830 | # MMC/SD Card Drivers | ||
831 | # | ||
832 | CONFIG_MMC_BLOCK=y | ||
833 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
834 | # CONFIG_SDIO_UART is not set | ||
835 | |||
836 | # | ||
837 | # MMC/SD Host Controller Drivers | ||
838 | # | ||
839 | CONFIG_MMC_PXA=y | ||
840 | # CONFIG_NEW_LEDS is not set | ||
841 | CONFIG_RTC_LIB=y | ||
842 | CONFIG_RTC_CLASS=y | ||
843 | CONFIG_RTC_HCTOSYS=y | ||
844 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
845 | # CONFIG_RTC_DEBUG is not set | ||
846 | |||
847 | # | ||
848 | # RTC interfaces | ||
849 | # | ||
850 | CONFIG_RTC_INTF_SYSFS=y | ||
851 | CONFIG_RTC_INTF_PROC=y | ||
852 | CONFIG_RTC_INTF_DEV=y | ||
853 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
854 | # CONFIG_RTC_DRV_TEST is not set | ||
855 | |||
856 | # | ||
857 | # I2C RTC drivers | ||
858 | # | ||
859 | # CONFIG_RTC_DRV_DS1307 is not set | ||
860 | # CONFIG_RTC_DRV_DS1374 is not set | ||
861 | # CONFIG_RTC_DRV_DS1672 is not set | ||
862 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
863 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
864 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
865 | # CONFIG_RTC_DRV_X1205 is not set | ||
866 | CONFIG_RTC_DRV_PCF8563=m | ||
867 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
868 | # CONFIG_RTC_DRV_M41T80 is not set | ||
869 | |||
870 | # | ||
871 | # SPI RTC drivers | ||
872 | # | ||
873 | |||
874 | # | ||
875 | # Platform RTC drivers | ||
876 | # | ||
877 | # CONFIG_RTC_DRV_CMOS is not set | ||
878 | # CONFIG_RTC_DRV_DS1553 is not set | ||
879 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
880 | # CONFIG_RTC_DRV_DS1742 is not set | ||
881 | # CONFIG_RTC_DRV_M48T86 is not set | ||
882 | # CONFIG_RTC_DRV_M48T59 is not set | ||
883 | # CONFIG_RTC_DRV_V3020 is not set | ||
884 | |||
885 | # | ||
886 | # on-CPU RTC drivers | ||
887 | # | ||
888 | CONFIG_RTC_DRV_SA1100=m | ||
889 | |||
890 | # | ||
891 | # File systems | ||
892 | # | ||
893 | CONFIG_EXT2_FS=m | ||
894 | # CONFIG_EXT2_FS_XATTR is not set | ||
895 | # CONFIG_EXT2_FS_XIP is not set | ||
896 | CONFIG_EXT3_FS=m | ||
897 | CONFIG_EXT3_FS_XATTR=y | ||
898 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
899 | # CONFIG_EXT3_FS_SECURITY is not set | ||
900 | # CONFIG_EXT4DEV_FS is not set | ||
901 | CONFIG_JBD=m | ||
902 | CONFIG_FS_MBCACHE=m | ||
903 | # CONFIG_REISERFS_FS is not set | ||
904 | # CONFIG_JFS_FS is not set | ||
905 | # CONFIG_FS_POSIX_ACL is not set | ||
906 | # CONFIG_XFS_FS is not set | ||
907 | # CONFIG_GFS2_FS is not set | ||
908 | # CONFIG_OCFS2_FS is not set | ||
909 | # CONFIG_MINIX_FS is not set | ||
910 | # CONFIG_ROMFS_FS is not set | ||
911 | # CONFIG_INOTIFY is not set | ||
912 | # CONFIG_QUOTA is not set | ||
913 | # CONFIG_DNOTIFY is not set | ||
914 | # CONFIG_AUTOFS_FS is not set | ||
915 | # CONFIG_AUTOFS4_FS is not set | ||
916 | # CONFIG_FUSE_FS is not set | ||
917 | |||
918 | # | ||
919 | # CD-ROM/DVD Filesystems | ||
920 | # | ||
921 | # CONFIG_ISO9660_FS is not set | ||
922 | # CONFIG_UDF_FS is not set | ||
923 | |||
924 | # | ||
925 | # DOS/FAT/NT Filesystems | ||
926 | # | ||
927 | CONFIG_FAT_FS=m | ||
928 | # CONFIG_MSDOS_FS is not set | ||
929 | CONFIG_VFAT_FS=m | ||
930 | CONFIG_FAT_DEFAULT_CODEPAGE=850 | ||
931 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" | ||
932 | # CONFIG_NTFS_FS is not set | ||
933 | |||
934 | # | ||
935 | # Pseudo filesystems | ||
936 | # | ||
937 | CONFIG_PROC_FS=y | ||
938 | CONFIG_PROC_SYSCTL=y | ||
939 | CONFIG_SYSFS=y | ||
940 | CONFIG_TMPFS=y | ||
941 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
942 | # CONFIG_HUGETLB_PAGE is not set | ||
943 | # CONFIG_CONFIGFS_FS is not set | ||
944 | |||
945 | # | ||
946 | # Miscellaneous filesystems | ||
947 | # | ||
948 | # CONFIG_ADFS_FS is not set | ||
949 | # CONFIG_AFFS_FS is not set | ||
950 | # CONFIG_HFS_FS is not set | ||
951 | # CONFIG_HFSPLUS_FS is not set | ||
952 | # CONFIG_BEFS_FS is not set | ||
953 | # CONFIG_BFS_FS is not set | ||
954 | # CONFIG_EFS_FS is not set | ||
955 | CONFIG_JFFS2_FS=y | ||
956 | CONFIG_JFFS2_FS_DEBUG=0 | ||
957 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
958 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
959 | # CONFIG_JFFS2_SUMMARY is not set | ||
960 | # CONFIG_JFFS2_FS_XATTR is not set | ||
961 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
962 | CONFIG_JFFS2_ZLIB=y | ||
963 | # CONFIG_JFFS2_LZO is not set | ||
964 | CONFIG_JFFS2_RTIME=y | ||
965 | # CONFIG_JFFS2_RUBIN is not set | ||
966 | # CONFIG_CRAMFS is not set | ||
967 | # CONFIG_VXFS_FS is not set | ||
968 | # CONFIG_HPFS_FS is not set | ||
969 | # CONFIG_QNX4FS_FS is not set | ||
970 | # CONFIG_SYSV_FS is not set | ||
971 | # CONFIG_UFS_FS is not set | ||
972 | CONFIG_NETWORK_FILESYSTEMS=y | ||
973 | CONFIG_NFS_FS=y | ||
974 | CONFIG_NFS_V3=y | ||
975 | # CONFIG_NFS_V3_ACL is not set | ||
976 | # CONFIG_NFS_V4 is not set | ||
977 | CONFIG_NFS_DIRECTIO=y | ||
978 | # CONFIG_NFSD is not set | ||
979 | CONFIG_ROOT_NFS=y | ||
980 | CONFIG_LOCKD=y | ||
981 | CONFIG_LOCKD_V4=y | ||
982 | CONFIG_NFS_COMMON=y | ||
983 | CONFIG_SUNRPC=y | ||
984 | # CONFIG_SUNRPC_BIND34 is not set | ||
985 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
986 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
987 | # CONFIG_SMB_FS is not set | ||
988 | # CONFIG_CIFS is not set | ||
989 | # CONFIG_NCP_FS is not set | ||
990 | # CONFIG_CODA_FS is not set | ||
991 | # CONFIG_AFS_FS is not set | ||
992 | |||
993 | # | ||
994 | # Partition Types | ||
995 | # | ||
996 | CONFIG_PARTITION_ADVANCED=y | ||
997 | # CONFIG_ACORN_PARTITION is not set | ||
998 | # CONFIG_OSF_PARTITION is not set | ||
999 | # CONFIG_AMIGA_PARTITION is not set | ||
1000 | # CONFIG_ATARI_PARTITION is not set | ||
1001 | # CONFIG_MAC_PARTITION is not set | ||
1002 | CONFIG_MSDOS_PARTITION=y | ||
1003 | # CONFIG_BSD_DISKLABEL is not set | ||
1004 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1005 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1006 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1007 | # CONFIG_LDM_PARTITION is not set | ||
1008 | # CONFIG_SGI_PARTITION is not set | ||
1009 | # CONFIG_ULTRIX_PARTITION is not set | ||
1010 | # CONFIG_SUN_PARTITION is not set | ||
1011 | # CONFIG_KARMA_PARTITION is not set | ||
1012 | # CONFIG_EFI_PARTITION is not set | ||
1013 | # CONFIG_SYSV68_PARTITION is not set | ||
1014 | CONFIG_NLS=y | ||
1015 | CONFIG_NLS_DEFAULT="iso8859-15" | ||
1016 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1017 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1018 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1019 | CONFIG_NLS_CODEPAGE_850=y | ||
1020 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1021 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1022 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1023 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1024 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1025 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1026 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1027 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1028 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1029 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1030 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1031 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1032 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1033 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1034 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1035 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1036 | # CONFIG_NLS_ISO8859_8 is not set | ||
1037 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1038 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1039 | # CONFIG_NLS_ASCII is not set | ||
1040 | # CONFIG_NLS_ISO8859_1 is not set | ||
1041 | # CONFIG_NLS_ISO8859_2 is not set | ||
1042 | # CONFIG_NLS_ISO8859_3 is not set | ||
1043 | # CONFIG_NLS_ISO8859_4 is not set | ||
1044 | # CONFIG_NLS_ISO8859_5 is not set | ||
1045 | # CONFIG_NLS_ISO8859_6 is not set | ||
1046 | # CONFIG_NLS_ISO8859_7 is not set | ||
1047 | # CONFIG_NLS_ISO8859_9 is not set | ||
1048 | # CONFIG_NLS_ISO8859_13 is not set | ||
1049 | # CONFIG_NLS_ISO8859_14 is not set | ||
1050 | CONFIG_NLS_ISO8859_15=y | ||
1051 | # CONFIG_NLS_KOI8_R is not set | ||
1052 | # CONFIG_NLS_KOI8_U is not set | ||
1053 | # CONFIG_NLS_UTF8 is not set | ||
1054 | # CONFIG_DLM is not set | ||
1055 | # CONFIG_INSTRUMENTATION is not set | ||
1056 | |||
1057 | # | ||
1058 | # Kernel hacking | ||
1059 | # | ||
1060 | # CONFIG_PRINTK_TIME is not set | ||
1061 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1062 | CONFIG_ENABLE_MUST_CHECK=y | ||
1063 | CONFIG_MAGIC_SYSRQ=y | ||
1064 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1065 | # CONFIG_DEBUG_FS is not set | ||
1066 | # CONFIG_HEADERS_CHECK is not set | ||
1067 | # CONFIG_DEBUG_KERNEL is not set | ||
1068 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1069 | CONFIG_FRAME_POINTER=y | ||
1070 | # CONFIG_SAMPLES is not set | ||
1071 | # CONFIG_DEBUG_USER is not set | ||
1072 | |||
1073 | # | ||
1074 | # Security options | ||
1075 | # | ||
1076 | # CONFIG_KEYS is not set | ||
1077 | # CONFIG_SECURITY is not set | ||
1078 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1079 | # CONFIG_CRYPTO is not set | ||
1080 | |||
1081 | # | ||
1082 | # Library routines | ||
1083 | # | ||
1084 | CONFIG_BITREVERSE=y | ||
1085 | # CONFIG_CRC_CCITT is not set | ||
1086 | # CONFIG_CRC16 is not set | ||
1087 | # CONFIG_CRC_ITU_T is not set | ||
1088 | CONFIG_CRC32=y | ||
1089 | # CONFIG_CRC7 is not set | ||
1090 | # CONFIG_LIBCRC32C is not set | ||
1091 | CONFIG_ZLIB_INFLATE=y | ||
1092 | CONFIG_ZLIB_DEFLATE=y | ||
1093 | CONFIG_PLIST=y | ||
1094 | CONFIG_HAS_IOMEM=y | ||
1095 | CONFIG_HAS_IOPORT=y | ||
1096 | CONFIG_HAS_DMA=y | ||
diff --git a/arch/arm/kernel/Makefile b/arch/arm/kernel/Makefile index 593b56509f4f..faa761921153 100644 --- a/arch/arm/kernel/Makefile +++ b/arch/arm/kernel/Makefile | |||
@@ -19,6 +19,7 @@ obj-$(CONFIG_ISA_DMA) += dma-isa.o | |||
19 | obj-$(CONFIG_PCI) += bios32.o isa.o | 19 | obj-$(CONFIG_PCI) += bios32.o isa.o |
20 | obj-$(CONFIG_SMP) += smp.o | 20 | obj-$(CONFIG_SMP) += smp.o |
21 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o | 21 | obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o |
22 | obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o | ||
22 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o | 23 | obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o |
23 | 24 | ||
24 | obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o | 25 | obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o |
diff --git a/arch/arm/kernel/dma-isa.c b/arch/arm/kernel/dma-isa.c index 0a3e9ad297d8..2f080a35a2d9 100644 --- a/arch/arm/kernel/dma-isa.c +++ b/arch/arm/kernel/dma-isa.c | |||
@@ -216,7 +216,7 @@ void __init isa_init_dma(dma_t *dma) | |||
216 | 216 | ||
217 | request_dma(DMA_ISA_CASCADE, "cascade"); | 217 | request_dma(DMA_ISA_CASCADE, "cascade"); |
218 | 218 | ||
219 | for (i = 0; i < sizeof(dma_resources) / sizeof(dma_resources[0]); i++) | 219 | for (i = 0; i < ARRAY_SIZE(dma_resources); i++) |
220 | request_resource(&ioport_resource, dma_resources + i); | 220 | request_resource(&ioport_resource, dma_resources + i); |
221 | } | 221 | } |
222 | } | 222 | } |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 29dec080a604..a46d5b456765 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -11,8 +11,8 @@ | |||
11 | * | 11 | * |
12 | * Low-level vector interface routines | 12 | * Low-level vector interface routines |
13 | * | 13 | * |
14 | * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction that causes | 14 | * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction |
15 | * it to save wrong values... Be aware! | 15 | * that causes it to save wrong values... Be aware! |
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <asm/memory.h> | 18 | #include <asm/memory.h> |
@@ -58,6 +58,12 @@ | |||
58 | 58 | ||
59 | .endm | 59 | .endm |
60 | 60 | ||
61 | #ifdef CONFIG_KPROBES | ||
62 | .section .kprobes.text,"ax",%progbits | ||
63 | #else | ||
64 | .text | ||
65 | #endif | ||
66 | |||
61 | /* | 67 | /* |
62 | * Invalid mode handlers | 68 | * Invalid mode handlers |
63 | */ | 69 | */ |
@@ -112,8 +118,8 @@ common_invalid: | |||
112 | #define SPFIX(code...) | 118 | #define SPFIX(code...) |
113 | #endif | 119 | #endif |
114 | 120 | ||
115 | .macro svc_entry | 121 | .macro svc_entry, stack_hole=0 |
116 | sub sp, sp, #S_FRAME_SIZE | 122 | sub sp, sp, #(S_FRAME_SIZE + \stack_hole) |
117 | SPFIX( tst sp, #4 ) | 123 | SPFIX( tst sp, #4 ) |
118 | SPFIX( bicne sp, sp, #4 ) | 124 | SPFIX( bicne sp, sp, #4 ) |
119 | stmib sp, {r1 - r12} | 125 | stmib sp, {r1 - r12} |
@@ -121,7 +127,7 @@ common_invalid: | |||
121 | ldmia r0, {r1 - r3} | 127 | ldmia r0, {r1 - r3} |
122 | add r5, sp, #S_SP @ here for interlock avoidance | 128 | add r5, sp, #S_SP @ here for interlock avoidance |
123 | mov r4, #-1 @ "" "" "" "" | 129 | mov r4, #-1 @ "" "" "" "" |
124 | add r0, sp, #S_FRAME_SIZE @ "" "" "" "" | 130 | add r0, sp, #(S_FRAME_SIZE + \stack_hole) |
125 | SPFIX( addne r0, r0, #4 ) | 131 | SPFIX( addne r0, r0, #4 ) |
126 | str r1, [sp] @ save the "real" r0 copied | 132 | str r1, [sp] @ save the "real" r0 copied |
127 | @ from the exception stack | 133 | @ from the exception stack |
@@ -242,7 +248,14 @@ svc_preempt: | |||
242 | 248 | ||
243 | .align 5 | 249 | .align 5 |
244 | __und_svc: | 250 | __und_svc: |
251 | #ifdef CONFIG_KPROBES | ||
252 | @ If a kprobe is about to simulate a "stmdb sp..." instruction, | ||
253 | @ it obviously needs free stack space which then will belong to | ||
254 | @ the saved context. | ||
255 | svc_entry 64 | ||
256 | #else | ||
245 | svc_entry | 257 | svc_entry |
258 | #endif | ||
246 | 259 | ||
247 | @ | 260 | @ |
248 | @ call emulation code, which returns using r9 if it has emulated | 261 | @ call emulation code, which returns using r9 if it has emulated |
@@ -480,6 +493,13 @@ __und_usr: | |||
480 | * co-processor instructions. However, we have to watch out | 493 | * co-processor instructions. However, we have to watch out |
481 | * for the ARM6/ARM7 SWI bug. | 494 | * for the ARM6/ARM7 SWI bug. |
482 | * | 495 | * |
496 | * NEON is a special case that has to be handled here. Not all | ||
497 | * NEON instructions are co-processor instructions, so we have | ||
498 | * to make a special case of checking for them. Plus, there's | ||
499 | * five groups of them, so we have a table of mask/opcode pairs | ||
500 | * to check against, and if any match then we branch off into the | ||
501 | * NEON handler code. | ||
502 | * | ||
483 | * Emulators may wish to make use of the following registers: | 503 | * Emulators may wish to make use of the following registers: |
484 | * r0 = instruction opcode. | 504 | * r0 = instruction opcode. |
485 | * r2 = PC+4 | 505 | * r2 = PC+4 |
@@ -488,6 +508,23 @@ __und_usr: | |||
488 | * lr = unrecognised instruction return address | 508 | * lr = unrecognised instruction return address |
489 | */ | 509 | */ |
490 | call_fpe: | 510 | call_fpe: |
511 | #ifdef CONFIG_NEON | ||
512 | adr r6, .LCneon_opcodes | ||
513 | 2: | ||
514 | ldr r7, [r6], #4 @ mask value | ||
515 | cmp r7, #0 @ end mask? | ||
516 | beq 1f | ||
517 | and r8, r0, r7 | ||
518 | ldr r7, [r6], #4 @ opcode bits matching in mask | ||
519 | cmp r8, r7 @ NEON instruction? | ||
520 | bne 2b | ||
521 | get_thread_info r10 | ||
522 | mov r7, #1 | ||
523 | strb r7, [r10, #TI_USED_CP + 10] @ mark CP#10 as used | ||
524 | strb r7, [r10, #TI_USED_CP + 11] @ mark CP#11 as used | ||
525 | b do_vfp @ let VFP handler handle this | ||
526 | 1: | ||
527 | #endif | ||
491 | tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 | 528 | tst r0, #0x08000000 @ only CDP/CPRT/LDC/STC have bit 27 |
492 | #if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) | 529 | #if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) |
493 | and r8, r0, #0x0f000000 @ mask out op-code bits | 530 | and r8, r0, #0x0f000000 @ mask out op-code bits |
@@ -537,6 +574,20 @@ call_fpe: | |||
537 | mov pc, lr @ CP#14 (Debug) | 574 | mov pc, lr @ CP#14 (Debug) |
538 | mov pc, lr @ CP#15 (Control) | 575 | mov pc, lr @ CP#15 (Control) |
539 | 576 | ||
577 | #ifdef CONFIG_NEON | ||
578 | .align 6 | ||
579 | |||
580 | .LCneon_opcodes: | ||
581 | .word 0xfe000000 @ mask | ||
582 | .word 0xf2000000 @ opcode | ||
583 | |||
584 | .word 0xff100000 @ mask | ||
585 | .word 0xf4000000 @ opcode | ||
586 | |||
587 | .word 0x00000000 @ mask | ||
588 | .word 0x00000000 @ opcode | ||
589 | #endif | ||
590 | |||
540 | do_fpe: | 591 | do_fpe: |
541 | enable_irq | 592 | enable_irq |
542 | ldr r4, .LCfp | 593 | ldr r4, .LCfp |
@@ -555,7 +606,7 @@ do_fpe: | |||
555 | .data | 606 | .data |
556 | ENTRY(fp_enter) | 607 | ENTRY(fp_enter) |
557 | .word no_fp | 608 | .word no_fp |
558 | .text | 609 | .previous |
559 | 610 | ||
560 | no_fp: mov pc, lr | 611 | no_fp: mov pc, lr |
561 | 612 | ||
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 33e6cc2ffd3b..6c90c50a9ee3 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -72,7 +72,7 @@ no_work_pending: | |||
72 | ldr r1, [sp, #S_PSR] @ get calling cpsr | 72 | ldr r1, [sp, #S_PSR] @ get calling cpsr |
73 | ldr lr, [sp, #S_PC]! @ get pc | 73 | ldr lr, [sp, #S_PC]! @ get pc |
74 | msr spsr_cxsf, r1 @ save in spsr_svc | 74 | msr spsr_cxsf, r1 @ save in spsr_svc |
75 | ldmdb sp, {r0 - lr}^ @ get calling r1 - lr | 75 | ldmdb sp, {r0 - lr}^ @ get calling r0 - lr |
76 | mov r0, r0 | 76 | mov r0, r0 |
77 | add sp, sp, #S_FRAME_SIZE - S_PC | 77 | add sp, sp, #S_FRAME_SIZE - S_PC |
78 | movs pc, lr @ return & move spsr_svc into cpsr | 78 | movs pc, lr @ return & move spsr_svc into cpsr |
diff --git a/arch/arm/kernel/kprobes-decode.c b/arch/arm/kernel/kprobes-decode.c new file mode 100644 index 000000000000..d51bc8b60557 --- /dev/null +++ b/arch/arm/kernel/kprobes-decode.c | |||
@@ -0,0 +1,1529 @@ | |||
1 | /* | ||
2 | * arch/arm/kernel/kprobes-decode.c | ||
3 | * | ||
4 | * Copyright (C) 2006, 2007 Motorola Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | /* | ||
17 | * We do not have hardware single-stepping on ARM, This | ||
18 | * effort is further complicated by the ARM not having a | ||
19 | * "next PC" register. Instructions that change the PC | ||
20 | * can't be safely single-stepped in a MP environment, so | ||
21 | * we have a lot of work to do: | ||
22 | * | ||
23 | * In the prepare phase: | ||
24 | * *) If it is an instruction that does anything | ||
25 | * with the CPU mode, we reject it for a kprobe. | ||
26 | * (This is out of laziness rather than need. The | ||
27 | * instructions could be simulated.) | ||
28 | * | ||
29 | * *) Otherwise, decode the instruction rewriting its | ||
30 | * registers to take fixed, ordered registers and | ||
31 | * setting a handler for it to run the instruction. | ||
32 | * | ||
33 | * In the execution phase by an instruction's handler: | ||
34 | * | ||
35 | * *) If the PC is written to by the instruction, the | ||
36 | * instruction must be fully simulated in software. | ||
37 | * If it is a conditional instruction, the handler | ||
38 | * will use insn[0] to copy its condition code to | ||
39 | * set r0 to 1 and insn[1] to "mov pc, lr" to return. | ||
40 | * | ||
41 | * *) Otherwise, a modified form of the instruction is | ||
42 | * directly executed. Its handler calls the | ||
43 | * instruction in insn[0]. In insn[1] is a | ||
44 | * "mov pc, lr" to return. | ||
45 | * | ||
46 | * Before calling, load up the reordered registers | ||
47 | * from the original instruction's registers. If one | ||
48 | * of the original input registers is the PC, compute | ||
49 | * and adjust the appropriate input register. | ||
50 | * | ||
51 | * After call completes, copy the output registers to | ||
52 | * the original instruction's original registers. | ||
53 | * | ||
54 | * We don't use a real breakpoint instruction since that | ||
55 | * would have us in the kernel go from SVC mode to SVC | ||
56 | * mode losing the link register. Instead we use an | ||
57 | * undefined instruction. To simplify processing, the | ||
58 | * undefined instruction used for kprobes must be reserved | ||
59 | * exclusively for kprobes use. | ||
60 | * | ||
61 | * TODO: ifdef out some instruction decoding based on architecture. | ||
62 | */ | ||
63 | |||
64 | #include <linux/kernel.h> | ||
65 | #include <linux/kprobes.h> | ||
66 | |||
67 | #define sign_extend(x, signbit) ((x) | (0 - ((x) & (1 << (signbit))))) | ||
68 | |||
69 | #define branch_displacement(insn) sign_extend(((insn) & 0xffffff) << 2, 25) | ||
70 | |||
71 | #define PSR_fs (PSR_f|PSR_s) | ||
72 | |||
73 | #define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */ | ||
74 | #define SET_R0_TRUE_INSTRUCTION 0xe3a00001 /* mov r0, #1 */ | ||
75 | |||
76 | #define truecc_insn(insn) (((insn) & 0xf0000000) | \ | ||
77 | (SET_R0_TRUE_INSTRUCTION & 0x0fffffff)) | ||
78 | |||
79 | typedef long (insn_0arg_fn_t)(void); | ||
80 | typedef long (insn_1arg_fn_t)(long); | ||
81 | typedef long (insn_2arg_fn_t)(long, long); | ||
82 | typedef long (insn_3arg_fn_t)(long, long, long); | ||
83 | typedef long (insn_4arg_fn_t)(long, long, long, long); | ||
84 | typedef long long (insn_llret_0arg_fn_t)(void); | ||
85 | typedef long long (insn_llret_3arg_fn_t)(long, long, long); | ||
86 | typedef long long (insn_llret_4arg_fn_t)(long, long, long, long); | ||
87 | |||
88 | union reg_pair { | ||
89 | long long dr; | ||
90 | #ifdef __LITTLE_ENDIAN | ||
91 | struct { long r0, r1; }; | ||
92 | #else | ||
93 | struct { long r1, r0; }; | ||
94 | #endif | ||
95 | }; | ||
96 | |||
97 | /* | ||
98 | * For STR and STM instructions, an ARM core may choose to use either | ||
99 | * a +8 or a +12 displacement from the current instruction's address. | ||
100 | * Whichever value is chosen for a given core, it must be the same for | ||
101 | * both instructions and may not change. This function measures it. | ||
102 | */ | ||
103 | |||
104 | static int str_pc_offset; | ||
105 | |||
106 | static void __init find_str_pc_offset(void) | ||
107 | { | ||
108 | int addr, scratch, ret; | ||
109 | |||
110 | __asm__ ( | ||
111 | "sub %[ret], pc, #4 \n\t" | ||
112 | "str pc, %[addr] \n\t" | ||
113 | "ldr %[scr], %[addr] \n\t" | ||
114 | "sub %[ret], %[scr], %[ret] \n\t" | ||
115 | : [ret] "=r" (ret), [scr] "=r" (scratch), [addr] "+m" (addr)); | ||
116 | |||
117 | str_pc_offset = ret; | ||
118 | } | ||
119 | |||
120 | /* | ||
121 | * The insnslot_?arg_r[w]flags() functions below are to keep the | ||
122 | * msr -> *fn -> mrs instruction sequences indivisible so that | ||
123 | * the state of the CPSR flags aren't inadvertently modified | ||
124 | * just before or just after the call. | ||
125 | */ | ||
126 | |||
127 | static inline long __kprobes | ||
128 | insnslot_0arg_rflags(long cpsr, insn_0arg_fn_t *fn) | ||
129 | { | ||
130 | register long ret asm("r0"); | ||
131 | |||
132 | __asm__ __volatile__ ( | ||
133 | "msr cpsr_fs, %[cpsr] \n\t" | ||
134 | "mov lr, pc \n\t" | ||
135 | "mov pc, %[fn] \n\t" | ||
136 | : "=r" (ret) | ||
137 | : [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
138 | : "lr", "cc" | ||
139 | ); | ||
140 | return ret; | ||
141 | } | ||
142 | |||
143 | static inline long long __kprobes | ||
144 | insnslot_llret_0arg_rflags(long cpsr, insn_llret_0arg_fn_t *fn) | ||
145 | { | ||
146 | register long ret0 asm("r0"); | ||
147 | register long ret1 asm("r1"); | ||
148 | union reg_pair fnr; | ||
149 | |||
150 | __asm__ __volatile__ ( | ||
151 | "msr cpsr_fs, %[cpsr] \n\t" | ||
152 | "mov lr, pc \n\t" | ||
153 | "mov pc, %[fn] \n\t" | ||
154 | : "=r" (ret0), "=r" (ret1) | ||
155 | : [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
156 | : "lr", "cc" | ||
157 | ); | ||
158 | fnr.r0 = ret0; | ||
159 | fnr.r1 = ret1; | ||
160 | return fnr.dr; | ||
161 | } | ||
162 | |||
163 | static inline long __kprobes | ||
164 | insnslot_1arg_rflags(long r0, long cpsr, insn_1arg_fn_t *fn) | ||
165 | { | ||
166 | register long rr0 asm("r0") = r0; | ||
167 | register long ret asm("r0"); | ||
168 | |||
169 | __asm__ __volatile__ ( | ||
170 | "msr cpsr_fs, %[cpsr] \n\t" | ||
171 | "mov lr, pc \n\t" | ||
172 | "mov pc, %[fn] \n\t" | ||
173 | : "=r" (ret) | ||
174 | : "0" (rr0), [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
175 | : "lr", "cc" | ||
176 | ); | ||
177 | return ret; | ||
178 | } | ||
179 | |||
180 | static inline long __kprobes | ||
181 | insnslot_2arg_rflags(long r0, long r1, long cpsr, insn_2arg_fn_t *fn) | ||
182 | { | ||
183 | register long rr0 asm("r0") = r0; | ||
184 | register long rr1 asm("r1") = r1; | ||
185 | register long ret asm("r0"); | ||
186 | |||
187 | __asm__ __volatile__ ( | ||
188 | "msr cpsr_fs, %[cpsr] \n\t" | ||
189 | "mov lr, pc \n\t" | ||
190 | "mov pc, %[fn] \n\t" | ||
191 | : "=r" (ret) | ||
192 | : "0" (rr0), "r" (rr1), | ||
193 | [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
194 | : "lr", "cc" | ||
195 | ); | ||
196 | return ret; | ||
197 | } | ||
198 | |||
199 | static inline long __kprobes | ||
200 | insnslot_3arg_rflags(long r0, long r1, long r2, long cpsr, insn_3arg_fn_t *fn) | ||
201 | { | ||
202 | register long rr0 asm("r0") = r0; | ||
203 | register long rr1 asm("r1") = r1; | ||
204 | register long rr2 asm("r2") = r2; | ||
205 | register long ret asm("r0"); | ||
206 | |||
207 | __asm__ __volatile__ ( | ||
208 | "msr cpsr_fs, %[cpsr] \n\t" | ||
209 | "mov lr, pc \n\t" | ||
210 | "mov pc, %[fn] \n\t" | ||
211 | : "=r" (ret) | ||
212 | : "0" (rr0), "r" (rr1), "r" (rr2), | ||
213 | [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
214 | : "lr", "cc" | ||
215 | ); | ||
216 | return ret; | ||
217 | } | ||
218 | |||
219 | static inline long long __kprobes | ||
220 | insnslot_llret_3arg_rflags(long r0, long r1, long r2, long cpsr, | ||
221 | insn_llret_3arg_fn_t *fn) | ||
222 | { | ||
223 | register long rr0 asm("r0") = r0; | ||
224 | register long rr1 asm("r1") = r1; | ||
225 | register long rr2 asm("r2") = r2; | ||
226 | register long ret0 asm("r0"); | ||
227 | register long ret1 asm("r1"); | ||
228 | union reg_pair fnr; | ||
229 | |||
230 | __asm__ __volatile__ ( | ||
231 | "msr cpsr_fs, %[cpsr] \n\t" | ||
232 | "mov lr, pc \n\t" | ||
233 | "mov pc, %[fn] \n\t" | ||
234 | : "=r" (ret0), "=r" (ret1) | ||
235 | : "0" (rr0), "r" (rr1), "r" (rr2), | ||
236 | [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
237 | : "lr", "cc" | ||
238 | ); | ||
239 | fnr.r0 = ret0; | ||
240 | fnr.r1 = ret1; | ||
241 | return fnr.dr; | ||
242 | } | ||
243 | |||
244 | static inline long __kprobes | ||
245 | insnslot_4arg_rflags(long r0, long r1, long r2, long r3, long cpsr, | ||
246 | insn_4arg_fn_t *fn) | ||
247 | { | ||
248 | register long rr0 asm("r0") = r0; | ||
249 | register long rr1 asm("r1") = r1; | ||
250 | register long rr2 asm("r2") = r2; | ||
251 | register long rr3 asm("r3") = r3; | ||
252 | register long ret asm("r0"); | ||
253 | |||
254 | __asm__ __volatile__ ( | ||
255 | "msr cpsr_fs, %[cpsr] \n\t" | ||
256 | "mov lr, pc \n\t" | ||
257 | "mov pc, %[fn] \n\t" | ||
258 | : "=r" (ret) | ||
259 | : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), | ||
260 | [cpsr] "r" (cpsr), [fn] "r" (fn) | ||
261 | : "lr", "cc" | ||
262 | ); | ||
263 | return ret; | ||
264 | } | ||
265 | |||
266 | static inline long __kprobes | ||
267 | insnslot_1arg_rwflags(long r0, long *cpsr, insn_1arg_fn_t *fn) | ||
268 | { | ||
269 | register long rr0 asm("r0") = r0; | ||
270 | register long ret asm("r0"); | ||
271 | long oldcpsr = *cpsr; | ||
272 | long newcpsr; | ||
273 | |||
274 | __asm__ __volatile__ ( | ||
275 | "msr cpsr_fs, %[oldcpsr] \n\t" | ||
276 | "mov lr, pc \n\t" | ||
277 | "mov pc, %[fn] \n\t" | ||
278 | "mrs %[newcpsr], cpsr \n\t" | ||
279 | : "=r" (ret), [newcpsr] "=r" (newcpsr) | ||
280 | : "0" (rr0), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) | ||
281 | : "lr", "cc" | ||
282 | ); | ||
283 | *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); | ||
284 | return ret; | ||
285 | } | ||
286 | |||
287 | static inline long __kprobes | ||
288 | insnslot_2arg_rwflags(long r0, long r1, long *cpsr, insn_2arg_fn_t *fn) | ||
289 | { | ||
290 | register long rr0 asm("r0") = r0; | ||
291 | register long rr1 asm("r1") = r1; | ||
292 | register long ret asm("r0"); | ||
293 | long oldcpsr = *cpsr; | ||
294 | long newcpsr; | ||
295 | |||
296 | __asm__ __volatile__ ( | ||
297 | "msr cpsr_fs, %[oldcpsr] \n\t" | ||
298 | "mov lr, pc \n\t" | ||
299 | "mov pc, %[fn] \n\t" | ||
300 | "mrs %[newcpsr], cpsr \n\t" | ||
301 | : "=r" (ret), [newcpsr] "=r" (newcpsr) | ||
302 | : "0" (rr0), "r" (rr1), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) | ||
303 | : "lr", "cc" | ||
304 | ); | ||
305 | *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); | ||
306 | return ret; | ||
307 | } | ||
308 | |||
309 | static inline long __kprobes | ||
310 | insnslot_3arg_rwflags(long r0, long r1, long r2, long *cpsr, | ||
311 | insn_3arg_fn_t *fn) | ||
312 | { | ||
313 | register long rr0 asm("r0") = r0; | ||
314 | register long rr1 asm("r1") = r1; | ||
315 | register long rr2 asm("r2") = r2; | ||
316 | register long ret asm("r0"); | ||
317 | long oldcpsr = *cpsr; | ||
318 | long newcpsr; | ||
319 | |||
320 | __asm__ __volatile__ ( | ||
321 | "msr cpsr_fs, %[oldcpsr] \n\t" | ||
322 | "mov lr, pc \n\t" | ||
323 | "mov pc, %[fn] \n\t" | ||
324 | "mrs %[newcpsr], cpsr \n\t" | ||
325 | : "=r" (ret), [newcpsr] "=r" (newcpsr) | ||
326 | : "0" (rr0), "r" (rr1), "r" (rr2), | ||
327 | [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) | ||
328 | : "lr", "cc" | ||
329 | ); | ||
330 | *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); | ||
331 | return ret; | ||
332 | } | ||
333 | |||
334 | static inline long __kprobes | ||
335 | insnslot_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr, | ||
336 | insn_4arg_fn_t *fn) | ||
337 | { | ||
338 | register long rr0 asm("r0") = r0; | ||
339 | register long rr1 asm("r1") = r1; | ||
340 | register long rr2 asm("r2") = r2; | ||
341 | register long rr3 asm("r3") = r3; | ||
342 | register long ret asm("r0"); | ||
343 | long oldcpsr = *cpsr; | ||
344 | long newcpsr; | ||
345 | |||
346 | __asm__ __volatile__ ( | ||
347 | "msr cpsr_fs, %[oldcpsr] \n\t" | ||
348 | "mov lr, pc \n\t" | ||
349 | "mov pc, %[fn] \n\t" | ||
350 | "mrs %[newcpsr], cpsr \n\t" | ||
351 | : "=r" (ret), [newcpsr] "=r" (newcpsr) | ||
352 | : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), | ||
353 | [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) | ||
354 | : "lr", "cc" | ||
355 | ); | ||
356 | *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); | ||
357 | return ret; | ||
358 | } | ||
359 | |||
360 | static inline long long __kprobes | ||
361 | insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr, | ||
362 | insn_llret_4arg_fn_t *fn) | ||
363 | { | ||
364 | register long rr0 asm("r0") = r0; | ||
365 | register long rr1 asm("r1") = r1; | ||
366 | register long rr2 asm("r2") = r2; | ||
367 | register long rr3 asm("r3") = r3; | ||
368 | register long ret0 asm("r0"); | ||
369 | register long ret1 asm("r1"); | ||
370 | long oldcpsr = *cpsr; | ||
371 | long newcpsr; | ||
372 | union reg_pair fnr; | ||
373 | |||
374 | __asm__ __volatile__ ( | ||
375 | "msr cpsr_fs, %[oldcpsr] \n\t" | ||
376 | "mov lr, pc \n\t" | ||
377 | "mov pc, %[fn] \n\t" | ||
378 | "mrs %[newcpsr], cpsr \n\t" | ||
379 | : "=r" (ret0), "=r" (ret1), [newcpsr] "=r" (newcpsr) | ||
380 | : "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3), | ||
381 | [oldcpsr] "r" (oldcpsr), [fn] "r" (fn) | ||
382 | : "lr", "cc" | ||
383 | ); | ||
384 | *cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs); | ||
385 | fnr.r0 = ret0; | ||
386 | fnr.r1 = ret1; | ||
387 | return fnr.dr; | ||
388 | } | ||
389 | |||
390 | /* | ||
391 | * To avoid the complications of mimicing single-stepping on a | ||
392 | * processor without a Next-PC or a single-step mode, and to | ||
393 | * avoid having to deal with the side-effects of boosting, we | ||
394 | * simulate or emulate (almost) all ARM instructions. | ||
395 | * | ||
396 | * "Simulation" is where the instruction's behavior is duplicated in | ||
397 | * C code. "Emulation" is where the original instruction is rewritten | ||
398 | * and executed, often by altering its registers. | ||
399 | * | ||
400 | * By having all behavior of the kprobe'd instruction completed before | ||
401 | * returning from the kprobe_handler(), all locks (scheduler and | ||
402 | * interrupt) can safely be released. There is no need for secondary | ||
403 | * breakpoints, no race with MP or preemptable kernels, nor having to | ||
404 | * clean up resources counts at a later time impacting overall system | ||
405 | * performance. By rewriting the instruction, only the minimum registers | ||
406 | * need to be loaded and saved back optimizing performance. | ||
407 | * | ||
408 | * Calling the insnslot_*_rwflags version of a function doesn't hurt | ||
409 | * anything even when the CPSR flags aren't updated by the | ||
410 | * instruction. It's just a little slower in return for saving | ||
411 | * a little space by not having a duplicate function that doesn't | ||
412 | * update the flags. (The same optimization can be said for | ||
413 | * instructions that do or don't perform register writeback) | ||
414 | * Also, instructions can either read the flags, only write the | ||
415 | * flags, or read and write the flags. To save combinations | ||
416 | * rather than for sheer performance, flag functions just assume | ||
417 | * read and write of flags. | ||
418 | */ | ||
419 | |||
420 | static void __kprobes simulate_bbl(struct kprobe *p, struct pt_regs *regs) | ||
421 | { | ||
422 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
423 | kprobe_opcode_t insn = p->opcode; | ||
424 | long iaddr = (long)p->addr; | ||
425 | int disp = branch_displacement(insn); | ||
426 | |||
427 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
428 | return; | ||
429 | |||
430 | if (insn & (1 << 24)) | ||
431 | regs->ARM_lr = iaddr + 4; | ||
432 | |||
433 | regs->ARM_pc = iaddr + 8 + disp; | ||
434 | } | ||
435 | |||
436 | static void __kprobes simulate_blx1(struct kprobe *p, struct pt_regs *regs) | ||
437 | { | ||
438 | kprobe_opcode_t insn = p->opcode; | ||
439 | long iaddr = (long)p->addr; | ||
440 | int disp = branch_displacement(insn); | ||
441 | |||
442 | regs->ARM_lr = iaddr + 4; | ||
443 | regs->ARM_pc = iaddr + 8 + disp + ((insn >> 23) & 0x2); | ||
444 | regs->ARM_cpsr |= PSR_T_BIT; | ||
445 | } | ||
446 | |||
447 | static void __kprobes simulate_blx2bx(struct kprobe *p, struct pt_regs *regs) | ||
448 | { | ||
449 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
450 | kprobe_opcode_t insn = p->opcode; | ||
451 | int rm = insn & 0xf; | ||
452 | long rmv = regs->uregs[rm]; | ||
453 | |||
454 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
455 | return; | ||
456 | |||
457 | if (insn & (1 << 5)) | ||
458 | regs->ARM_lr = (long)p->addr + 4; | ||
459 | |||
460 | regs->ARM_pc = rmv & ~0x1; | ||
461 | regs->ARM_cpsr &= ~PSR_T_BIT; | ||
462 | if (rmv & 0x1) | ||
463 | regs->ARM_cpsr |= PSR_T_BIT; | ||
464 | } | ||
465 | |||
466 | static void __kprobes simulate_ldm1stm1(struct kprobe *p, struct pt_regs *regs) | ||
467 | { | ||
468 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
469 | kprobe_opcode_t insn = p->opcode; | ||
470 | int rn = (insn >> 16) & 0xf; | ||
471 | int lbit = insn & (1 << 20); | ||
472 | int wbit = insn & (1 << 21); | ||
473 | int ubit = insn & (1 << 23); | ||
474 | int pbit = insn & (1 << 24); | ||
475 | long *addr = (long *)regs->uregs[rn]; | ||
476 | int reg_bit_vector; | ||
477 | int reg_count; | ||
478 | |||
479 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
480 | return; | ||
481 | |||
482 | reg_count = 0; | ||
483 | reg_bit_vector = insn & 0xffff; | ||
484 | while (reg_bit_vector) { | ||
485 | reg_bit_vector &= (reg_bit_vector - 1); | ||
486 | ++reg_count; | ||
487 | } | ||
488 | |||
489 | if (!ubit) | ||
490 | addr -= reg_count; | ||
491 | addr += (!pbit ^ !ubit); | ||
492 | |||
493 | reg_bit_vector = insn & 0xffff; | ||
494 | while (reg_bit_vector) { | ||
495 | int reg = __ffs(reg_bit_vector); | ||
496 | reg_bit_vector &= (reg_bit_vector - 1); | ||
497 | if (lbit) | ||
498 | regs->uregs[reg] = *addr++; | ||
499 | else | ||
500 | *addr++ = regs->uregs[reg]; | ||
501 | } | ||
502 | |||
503 | if (wbit) { | ||
504 | if (!ubit) | ||
505 | addr -= reg_count; | ||
506 | addr -= (!pbit ^ !ubit); | ||
507 | regs->uregs[rn] = (long)addr; | ||
508 | } | ||
509 | } | ||
510 | |||
511 | static void __kprobes simulate_stm1_pc(struct kprobe *p, struct pt_regs *regs) | ||
512 | { | ||
513 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
514 | |||
515 | if (!insnslot_1arg_rflags(0, regs->ARM_cpsr, i_fn)) | ||
516 | return; | ||
517 | |||
518 | regs->ARM_pc = (long)p->addr + str_pc_offset; | ||
519 | simulate_ldm1stm1(p, regs); | ||
520 | regs->ARM_pc = (long)p->addr + 4; | ||
521 | } | ||
522 | |||
523 | static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs) | ||
524 | { | ||
525 | regs->uregs[12] = regs->uregs[13]; | ||
526 | } | ||
527 | |||
528 | static void __kprobes emulate_ldcstc(struct kprobe *p, struct pt_regs *regs) | ||
529 | { | ||
530 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
531 | kprobe_opcode_t insn = p->opcode; | ||
532 | int rn = (insn >> 16) & 0xf; | ||
533 | long rnv = regs->uregs[rn]; | ||
534 | |||
535 | /* Save Rn in case of writeback. */ | ||
536 | regs->uregs[rn] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); | ||
537 | } | ||
538 | |||
539 | static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs) | ||
540 | { | ||
541 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
542 | kprobe_opcode_t insn = p->opcode; | ||
543 | int rd = (insn >> 12) & 0xf; | ||
544 | int rn = (insn >> 16) & 0xf; | ||
545 | int rm = insn & 0xf; /* rm may be invalid, don't care. */ | ||
546 | |||
547 | /* Not following the C calling convention here, so need asm(). */ | ||
548 | __asm__ __volatile__ ( | ||
549 | "ldr r0, %[rn] \n\t" | ||
550 | "ldr r1, %[rm] \n\t" | ||
551 | "msr cpsr_fs, %[cpsr]\n\t" | ||
552 | "mov lr, pc \n\t" | ||
553 | "mov pc, %[i_fn] \n\t" | ||
554 | "str r0, %[rn] \n\t" /* in case of writeback */ | ||
555 | "str r2, %[rd0] \n\t" | ||
556 | "str r3, %[rd1] \n\t" | ||
557 | : [rn] "+m" (regs->uregs[rn]), | ||
558 | [rd0] "=m" (regs->uregs[rd]), | ||
559 | [rd1] "=m" (regs->uregs[rd+1]) | ||
560 | : [rm] "m" (regs->uregs[rm]), | ||
561 | [cpsr] "r" (regs->ARM_cpsr), | ||
562 | [i_fn] "r" (i_fn) | ||
563 | : "r0", "r1", "r2", "r3", "lr", "cc" | ||
564 | ); | ||
565 | } | ||
566 | |||
567 | static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs) | ||
568 | { | ||
569 | insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0]; | ||
570 | kprobe_opcode_t insn = p->opcode; | ||
571 | int rd = (insn >> 12) & 0xf; | ||
572 | int rn = (insn >> 16) & 0xf; | ||
573 | int rm = insn & 0xf; | ||
574 | long rnv = regs->uregs[rn]; | ||
575 | long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ | ||
576 | |||
577 | regs->uregs[rn] = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd], | ||
578 | regs->uregs[rd+1], | ||
579 | regs->ARM_cpsr, i_fn); | ||
580 | } | ||
581 | |||
582 | static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs) | ||
583 | { | ||
584 | insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0]; | ||
585 | kprobe_opcode_t insn = p->opcode; | ||
586 | union reg_pair fnr; | ||
587 | int rd = (insn >> 12) & 0xf; | ||
588 | int rn = (insn >> 16) & 0xf; | ||
589 | int rm = insn & 0xf; | ||
590 | long rdv; | ||
591 | long rnv = regs->uregs[rn]; | ||
592 | long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ | ||
593 | long cpsr = regs->ARM_cpsr; | ||
594 | |||
595 | fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn); | ||
596 | regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ | ||
597 | rdv = fnr.r1; | ||
598 | |||
599 | if (rd == 15) { | ||
600 | #if __LINUX_ARM_ARCH__ >= 5 | ||
601 | cpsr &= ~PSR_T_BIT; | ||
602 | if (rdv & 0x1) | ||
603 | cpsr |= PSR_T_BIT; | ||
604 | regs->ARM_cpsr = cpsr; | ||
605 | rdv &= ~0x1; | ||
606 | #else | ||
607 | rdv &= ~0x2; | ||
608 | #endif | ||
609 | } | ||
610 | regs->uregs[rd] = rdv; | ||
611 | } | ||
612 | |||
613 | static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs) | ||
614 | { | ||
615 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | ||
616 | kprobe_opcode_t insn = p->opcode; | ||
617 | long iaddr = (long)p->addr; | ||
618 | int rd = (insn >> 12) & 0xf; | ||
619 | int rn = (insn >> 16) & 0xf; | ||
620 | int rm = insn & 0xf; | ||
621 | long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd]; | ||
622 | long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn]; | ||
623 | long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ | ||
624 | |||
625 | /* Save Rn in case of writeback. */ | ||
626 | regs->uregs[rn] = | ||
627 | insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); | ||
628 | } | ||
629 | |||
630 | static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) | ||
631 | { | ||
632 | insn_llret_0arg_fn_t *i_fn = (insn_llret_0arg_fn_t *)&p->ainsn.insn[0]; | ||
633 | kprobe_opcode_t insn = p->opcode; | ||
634 | union reg_pair fnr; | ||
635 | int rd = (insn >> 12) & 0xf; | ||
636 | int rn = (insn >> 16) & 0xf; | ||
637 | |||
638 | fnr.dr = insnslot_llret_0arg_rflags(regs->ARM_cpsr, i_fn); | ||
639 | regs->uregs[rn] = fnr.r0; | ||
640 | regs->uregs[rd] = fnr.r1; | ||
641 | } | ||
642 | |||
643 | static void __kprobes emulate_mcrr(struct kprobe *p, struct pt_regs *regs) | ||
644 | { | ||
645 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
646 | kprobe_opcode_t insn = p->opcode; | ||
647 | int rd = (insn >> 12) & 0xf; | ||
648 | int rn = (insn >> 16) & 0xf; | ||
649 | long rnv = regs->uregs[rn]; | ||
650 | long rdv = regs->uregs[rd]; | ||
651 | |||
652 | insnslot_2arg_rflags(rnv, rdv, regs->ARM_cpsr, i_fn); | ||
653 | } | ||
654 | |||
655 | static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs) | ||
656 | { | ||
657 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
658 | kprobe_opcode_t insn = p->opcode; | ||
659 | int rd = (insn >> 12) & 0xf; | ||
660 | int rm = insn & 0xf; | ||
661 | long rmv = regs->uregs[rm]; | ||
662 | |||
663 | /* Writes Q flag */ | ||
664 | regs->uregs[rd] = insnslot_1arg_rwflags(rmv, ®s->ARM_cpsr, i_fn); | ||
665 | } | ||
666 | |||
667 | static void __kprobes emulate_sel(struct kprobe *p, struct pt_regs *regs) | ||
668 | { | ||
669 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
670 | kprobe_opcode_t insn = p->opcode; | ||
671 | int rd = (insn >> 12) & 0xf; | ||
672 | int rn = (insn >> 16) & 0xf; | ||
673 | int rm = insn & 0xf; | ||
674 | long rnv = regs->uregs[rn]; | ||
675 | long rmv = regs->uregs[rm]; | ||
676 | |||
677 | /* Reads GE bits */ | ||
678 | regs->uregs[rd] = insnslot_2arg_rflags(rnv, rmv, regs->ARM_cpsr, i_fn); | ||
679 | } | ||
680 | |||
681 | static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs) | ||
682 | { | ||
683 | insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0]; | ||
684 | |||
685 | insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); | ||
686 | } | ||
687 | |||
688 | static void __kprobes emulate_rd12(struct kprobe *p, struct pt_regs *regs) | ||
689 | { | ||
690 | insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0]; | ||
691 | kprobe_opcode_t insn = p->opcode; | ||
692 | int rd = (insn >> 12) & 0xf; | ||
693 | |||
694 | regs->uregs[rd] = insnslot_0arg_rflags(regs->ARM_cpsr, i_fn); | ||
695 | } | ||
696 | |||
697 | static void __kprobes emulate_ird12(struct kprobe *p, struct pt_regs *regs) | ||
698 | { | ||
699 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
700 | kprobe_opcode_t insn = p->opcode; | ||
701 | int ird = (insn >> 12) & 0xf; | ||
702 | |||
703 | insnslot_1arg_rflags(regs->uregs[ird], regs->ARM_cpsr, i_fn); | ||
704 | } | ||
705 | |||
706 | static void __kprobes emulate_rn16(struct kprobe *p, struct pt_regs *regs) | ||
707 | { | ||
708 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
709 | kprobe_opcode_t insn = p->opcode; | ||
710 | int rn = (insn >> 16) & 0xf; | ||
711 | long rnv = regs->uregs[rn]; | ||
712 | |||
713 | insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); | ||
714 | } | ||
715 | |||
716 | static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs) | ||
717 | { | ||
718 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
719 | kprobe_opcode_t insn = p->opcode; | ||
720 | int rd = (insn >> 12) & 0xf; | ||
721 | int rm = insn & 0xf; | ||
722 | long rmv = regs->uregs[rm]; | ||
723 | |||
724 | regs->uregs[rd] = insnslot_1arg_rflags(rmv, regs->ARM_cpsr, i_fn); | ||
725 | } | ||
726 | |||
727 | static void __kprobes | ||
728 | emulate_rd12rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
729 | { | ||
730 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
731 | kprobe_opcode_t insn = p->opcode; | ||
732 | int rd = (insn >> 12) & 0xf; | ||
733 | int rn = (insn >> 16) & 0xf; | ||
734 | int rm = insn & 0xf; | ||
735 | long rnv = regs->uregs[rn]; | ||
736 | long rmv = regs->uregs[rm]; | ||
737 | |||
738 | regs->uregs[rd] = | ||
739 | insnslot_2arg_rwflags(rnv, rmv, ®s->ARM_cpsr, i_fn); | ||
740 | } | ||
741 | |||
742 | static void __kprobes | ||
743 | emulate_rd16rn12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
744 | { | ||
745 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | ||
746 | kprobe_opcode_t insn = p->opcode; | ||
747 | int rd = (insn >> 16) & 0xf; | ||
748 | int rn = (insn >> 12) & 0xf; | ||
749 | int rs = (insn >> 8) & 0xf; | ||
750 | int rm = insn & 0xf; | ||
751 | long rnv = regs->uregs[rn]; | ||
752 | long rsv = regs->uregs[rs]; | ||
753 | long rmv = regs->uregs[rm]; | ||
754 | |||
755 | regs->uregs[rd] = | ||
756 | insnslot_3arg_rwflags(rnv, rsv, rmv, ®s->ARM_cpsr, i_fn); | ||
757 | } | ||
758 | |||
759 | static void __kprobes | ||
760 | emulate_rd16rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
761 | { | ||
762 | insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0]; | ||
763 | kprobe_opcode_t insn = p->opcode; | ||
764 | int rd = (insn >> 16) & 0xf; | ||
765 | int rs = (insn >> 8) & 0xf; | ||
766 | int rm = insn & 0xf; | ||
767 | long rsv = regs->uregs[rs]; | ||
768 | long rmv = regs->uregs[rm]; | ||
769 | |||
770 | regs->uregs[rd] = | ||
771 | insnslot_2arg_rwflags(rsv, rmv, ®s->ARM_cpsr, i_fn); | ||
772 | } | ||
773 | |||
774 | static void __kprobes | ||
775 | emulate_rdhi16rdlo12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
776 | { | ||
777 | insn_llret_4arg_fn_t *i_fn = (insn_llret_4arg_fn_t *)&p->ainsn.insn[0]; | ||
778 | kprobe_opcode_t insn = p->opcode; | ||
779 | union reg_pair fnr; | ||
780 | int rdhi = (insn >> 16) & 0xf; | ||
781 | int rdlo = (insn >> 12) & 0xf; | ||
782 | int rs = (insn >> 8) & 0xf; | ||
783 | int rm = insn & 0xf; | ||
784 | long rsv = regs->uregs[rs]; | ||
785 | long rmv = regs->uregs[rm]; | ||
786 | |||
787 | fnr.dr = insnslot_llret_4arg_rwflags(regs->uregs[rdhi], | ||
788 | regs->uregs[rdlo], rsv, rmv, | ||
789 | ®s->ARM_cpsr, i_fn); | ||
790 | regs->uregs[rdhi] = fnr.r0; | ||
791 | regs->uregs[rdlo] = fnr.r1; | ||
792 | } | ||
793 | |||
794 | static void __kprobes | ||
795 | emulate_alu_imm_rflags(struct kprobe *p, struct pt_regs *regs) | ||
796 | { | ||
797 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
798 | kprobe_opcode_t insn = p->opcode; | ||
799 | int rd = (insn >> 12) & 0xf; | ||
800 | int rn = (insn >> 16) & 0xf; | ||
801 | long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn]; | ||
802 | |||
803 | regs->uregs[rd] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn); | ||
804 | } | ||
805 | |||
806 | static void __kprobes | ||
807 | emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
808 | { | ||
809 | insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0]; | ||
810 | kprobe_opcode_t insn = p->opcode; | ||
811 | int rd = (insn >> 12) & 0xf; | ||
812 | int rn = (insn >> 16) & 0xf; | ||
813 | long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn]; | ||
814 | |||
815 | regs->uregs[rd] = insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn); | ||
816 | } | ||
817 | |||
818 | static void __kprobes | ||
819 | emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs) | ||
820 | { | ||
821 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | ||
822 | kprobe_opcode_t insn = p->opcode; | ||
823 | long ppc = (long)p->addr + 8; | ||
824 | int rd = (insn >> 12) & 0xf; | ||
825 | int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */ | ||
826 | int rs = (insn >> 8) & 0xf; /* invalid, don't care. */ | ||
827 | int rm = insn & 0xf; | ||
828 | long rnv = (rn == 15) ? ppc : regs->uregs[rn]; | ||
829 | long rmv = (rm == 15) ? ppc : regs->uregs[rm]; | ||
830 | long rsv = regs->uregs[rs]; | ||
831 | |||
832 | regs->uregs[rd] = | ||
833 | insnslot_3arg_rflags(rnv, rmv, rsv, regs->ARM_cpsr, i_fn); | ||
834 | } | ||
835 | |||
836 | static void __kprobes | ||
837 | emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs) | ||
838 | { | ||
839 | insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0]; | ||
840 | kprobe_opcode_t insn = p->opcode; | ||
841 | long ppc = (long)p->addr + 8; | ||
842 | int rd = (insn >> 12) & 0xf; | ||
843 | int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */ | ||
844 | int rs = (insn >> 8) & 0xf; /* invalid, don't care. */ | ||
845 | int rm = insn & 0xf; | ||
846 | long rnv = (rn == 15) ? ppc : regs->uregs[rn]; | ||
847 | long rmv = (rm == 15) ? ppc : regs->uregs[rm]; | ||
848 | long rsv = regs->uregs[rs]; | ||
849 | |||
850 | regs->uregs[rd] = | ||
851 | insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn); | ||
852 | } | ||
853 | |||
854 | static enum kprobe_insn __kprobes | ||
855 | prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
856 | { | ||
857 | int ibit = (insn & (1 << 26)) ? 25 : 22; | ||
858 | |||
859 | insn &= 0xfff00fff; | ||
860 | insn |= 0x00001000; /* Rn = r0, Rd = r1 */ | ||
861 | if (insn & (1 << ibit)) { | ||
862 | insn &= ~0xf; | ||
863 | insn |= 2; /* Rm = r2 */ | ||
864 | } | ||
865 | asi->insn[0] = insn; | ||
866 | asi->insn_handler = (insn & (1 << 20)) ? emulate_ldr : emulate_str; | ||
867 | return INSN_GOOD; | ||
868 | } | ||
869 | |||
870 | static enum kprobe_insn __kprobes | ||
871 | prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
872 | { | ||
873 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ | ||
874 | asi->insn[0] = insn; | ||
875 | asi->insn_handler = emulate_rd12rm0; | ||
876 | return INSN_GOOD; | ||
877 | } | ||
878 | |||
879 | static enum kprobe_insn __kprobes | ||
880 | prep_emulate_rd12(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
881 | { | ||
882 | insn &= 0xffff0fff; /* Rd = r0 */ | ||
883 | asi->insn[0] = insn; | ||
884 | asi->insn_handler = emulate_rd12; | ||
885 | return INSN_GOOD; | ||
886 | } | ||
887 | |||
888 | static enum kprobe_insn __kprobes | ||
889 | prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn, | ||
890 | struct arch_specific_insn *asi) | ||
891 | { | ||
892 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ | ||
893 | insn |= 0x00000001; /* Rm = r1 */ | ||
894 | asi->insn[0] = insn; | ||
895 | asi->insn_handler = emulate_rd12rn16rm0_rwflags; | ||
896 | return INSN_GOOD; | ||
897 | } | ||
898 | |||
899 | static enum kprobe_insn __kprobes | ||
900 | prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn, | ||
901 | struct arch_specific_insn *asi) | ||
902 | { | ||
903 | insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */ | ||
904 | insn |= 0x00000001; /* Rm = r1 */ | ||
905 | asi->insn[0] = insn; | ||
906 | asi->insn_handler = emulate_rd16rs8rm0_rwflags; | ||
907 | return INSN_GOOD; | ||
908 | } | ||
909 | |||
910 | static enum kprobe_insn __kprobes | ||
911 | prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn, | ||
912 | struct arch_specific_insn *asi) | ||
913 | { | ||
914 | insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */ | ||
915 | insn |= 0x00000102; /* Rs = r1, Rm = r2 */ | ||
916 | asi->insn[0] = insn; | ||
917 | asi->insn_handler = emulate_rd16rn12rs8rm0_rwflags; | ||
918 | return INSN_GOOD; | ||
919 | } | ||
920 | |||
921 | static enum kprobe_insn __kprobes | ||
922 | prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn, | ||
923 | struct arch_specific_insn *asi) | ||
924 | { | ||
925 | insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */ | ||
926 | insn |= 0x00001203; /* Rs = r2, Rm = r3 */ | ||
927 | asi->insn[0] = insn; | ||
928 | asi->insn_handler = emulate_rdhi16rdlo12rs8rm0_rwflags; | ||
929 | return INSN_GOOD; | ||
930 | } | ||
931 | |||
932 | /* | ||
933 | * For the instruction masking and comparisons in all the "space_*" | ||
934 | * functions below, Do _not_ rearrange the order of tests unless | ||
935 | * you're very, very sure of what you are doing. For the sake of | ||
936 | * efficiency, the masks for some tests sometimes assume other test | ||
937 | * have been done prior to them so the number of patterns to test | ||
938 | * for an instruction set can be as broad as possible to reduce the | ||
939 | * number of tests needed. | ||
940 | */ | ||
941 | |||
942 | static enum kprobe_insn __kprobes | ||
943 | space_1111(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
944 | { | ||
945 | /* CPS mmod == 1 : 1111 0001 0000 xx10 xxxx xxxx xx0x xxxx */ | ||
946 | /* RFE : 1111 100x x0x1 xxxx xxxx 1010 xxxx xxxx */ | ||
947 | /* SRS : 1111 100x x1x0 1101 xxxx 0101 xxxx xxxx */ | ||
948 | if ((insn & 0xfff30020) == 0xf1020000 || | ||
949 | (insn & 0xfe500f00) == 0xf8100a00 || | ||
950 | (insn & 0xfe5f0f00) == 0xf84d0500) | ||
951 | return INSN_REJECTED; | ||
952 | |||
953 | /* PLD : 1111 01x1 x101 xxxx xxxx xxxx xxxx xxxx : */ | ||
954 | if ((insn & 0xfd700000) == 0xf4500000) { | ||
955 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
956 | asi->insn[0] = insn; | ||
957 | asi->insn_handler = emulate_rn16; | ||
958 | return INSN_GOOD; | ||
959 | } | ||
960 | |||
961 | /* BLX(1) : 1111 101x xxxx xxxx xxxx xxxx xxxx xxxx : */ | ||
962 | if ((insn & 0xfe000000) == 0xfa000000) { | ||
963 | asi->insn_handler = simulate_blx1; | ||
964 | return INSN_GOOD_NO_SLOT; | ||
965 | } | ||
966 | |||
967 | /* SETEND : 1111 0001 0000 0001 xxxx xxxx 0000 xxxx */ | ||
968 | /* CDP2 : 1111 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ | ||
969 | if ((insn & 0xffff00f0) == 0xf1010000 || | ||
970 | (insn & 0xff000010) == 0xfe000000) { | ||
971 | asi->insn[0] = insn; | ||
972 | asi->insn_handler = emulate_none; | ||
973 | return INSN_GOOD; | ||
974 | } | ||
975 | |||
976 | /* MCRR2 : 1111 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ | ||
977 | /* MRRC2 : 1111 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd != Rn) */ | ||
978 | if ((insn & 0xffe00000) == 0xfc400000) { | ||
979 | insn &= 0xfff00fff; /* Rn = r0 */ | ||
980 | insn |= 0x00001000; /* Rd = r1 */ | ||
981 | asi->insn[0] = insn; | ||
982 | asi->insn_handler = | ||
983 | (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; | ||
984 | return INSN_GOOD; | ||
985 | } | ||
986 | |||
987 | /* LDC2 : 1111 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ | ||
988 | /* STC2 : 1111 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ | ||
989 | if ((insn & 0xfe000000) == 0xfc000000) { | ||
990 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
991 | asi->insn[0] = insn; | ||
992 | asi->insn_handler = emulate_ldcstc; | ||
993 | return INSN_GOOD; | ||
994 | } | ||
995 | |||
996 | /* MCR2 : 1111 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ | ||
997 | /* MRC2 : 1111 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ | ||
998 | insn &= 0xffff0fff; /* Rd = r0 */ | ||
999 | asi->insn[0] = insn; | ||
1000 | asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; | ||
1001 | return INSN_GOOD; | ||
1002 | } | ||
1003 | |||
1004 | static enum kprobe_insn __kprobes | ||
1005 | space_cccc_000x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1006 | { | ||
1007 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx xxx0 xxxx */ | ||
1008 | if ((insn & 0x0f900010) == 0x01000000) { | ||
1009 | |||
1010 | /* BXJ : cccc 0001 0010 xxxx xxxx xxxx 0010 xxxx */ | ||
1011 | /* MSR : cccc 0001 0x10 xxxx xxxx xxxx 0000 xxxx */ | ||
1012 | if ((insn & 0x0ff000f0) == 0x01200020 || | ||
1013 | (insn & 0x0fb000f0) == 0x01200000) | ||
1014 | return INSN_REJECTED; | ||
1015 | |||
1016 | /* MRS : cccc 0001 0x00 xxxx xxxx xxxx 0000 xxxx */ | ||
1017 | if ((insn & 0x0fb00010) == 0x01000000) | ||
1018 | return prep_emulate_rd12(insn, asi); | ||
1019 | |||
1020 | /* SMLALxy : cccc 0001 0100 xxxx xxxx xxxx 1xx0 xxxx */ | ||
1021 | if ((insn & 0x0ff00090) == 0x01400080) | ||
1022 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | ||
1023 | |||
1024 | /* SMULWy : cccc 0001 0010 xxxx xxxx xxxx 1x10 xxxx */ | ||
1025 | /* SMULxy : cccc 0001 0110 xxxx xxxx xxxx 1xx0 xxxx */ | ||
1026 | if ((insn & 0x0ff000b0) == 0x012000a0 || | ||
1027 | (insn & 0x0ff00090) == 0x01600080) | ||
1028 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | ||
1029 | |||
1030 | /* SMLAxy : cccc 0001 0000 xxxx xxxx xxxx 1xx0 xxxx : Q */ | ||
1031 | /* SMLAWy : cccc 0001 0010 xxxx xxxx xxxx 0x00 xxxx : Q */ | ||
1032 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
1033 | |||
1034 | } | ||
1035 | |||
1036 | /* cccc 0001 0xx0 xxxx xxxx xxxx xxxx 0xx1 xxxx */ | ||
1037 | else if ((insn & 0x0f900090) == 0x01000010) { | ||
1038 | |||
1039 | /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ | ||
1040 | if ((insn & 0xfff000f0) == 0xe1200070) | ||
1041 | return INSN_REJECTED; | ||
1042 | |||
1043 | /* BLX(2) : cccc 0001 0010 xxxx xxxx xxxx 0011 xxxx */ | ||
1044 | /* BX : cccc 0001 0010 xxxx xxxx xxxx 0001 xxxx */ | ||
1045 | if ((insn & 0x0ff000d0) == 0x01200010) { | ||
1046 | asi->insn[0] = truecc_insn(insn); | ||
1047 | asi->insn_handler = simulate_blx2bx; | ||
1048 | return INSN_GOOD; | ||
1049 | } | ||
1050 | |||
1051 | /* CLZ : cccc 0001 0110 xxxx xxxx xxxx 0001 xxxx */ | ||
1052 | if ((insn & 0x0ff000f0) == 0x01600010) | ||
1053 | return prep_emulate_rd12rm0(insn, asi); | ||
1054 | |||
1055 | /* QADD : cccc 0001 0000 xxxx xxxx xxxx 0101 xxxx :Q */ | ||
1056 | /* QSUB : cccc 0001 0010 xxxx xxxx xxxx 0101 xxxx :Q */ | ||
1057 | /* QDADD : cccc 0001 0100 xxxx xxxx xxxx 0101 xxxx :Q */ | ||
1058 | /* QDSUB : cccc 0001 0110 xxxx xxxx xxxx 0101 xxxx :Q */ | ||
1059 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
1060 | } | ||
1061 | |||
1062 | /* cccc 0000 xxxx xxxx xxxx xxxx xxxx 1001 xxxx */ | ||
1063 | else if ((insn & 0x0f000090) == 0x00000090) { | ||
1064 | |||
1065 | /* MUL : cccc 0000 0000 xxxx xxxx xxxx 1001 xxxx : */ | ||
1066 | /* MULS : cccc 0000 0001 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1067 | /* MLA : cccc 0000 0010 xxxx xxxx xxxx 1001 xxxx : */ | ||
1068 | /* MLAS : cccc 0000 0011 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1069 | /* UMAAL : cccc 0000 0100 xxxx xxxx xxxx 1001 xxxx : */ | ||
1070 | /* UMULL : cccc 0000 1000 xxxx xxxx xxxx 1001 xxxx : */ | ||
1071 | /* UMULLS : cccc 0000 1001 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1072 | /* UMLAL : cccc 0000 1010 xxxx xxxx xxxx 1001 xxxx : */ | ||
1073 | /* UMLALS : cccc 0000 1011 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1074 | /* SMULL : cccc 0000 1100 xxxx xxxx xxxx 1001 xxxx : */ | ||
1075 | /* SMULLS : cccc 0000 1101 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1076 | /* SMLAL : cccc 0000 1110 xxxx xxxx xxxx 1001 xxxx : */ | ||
1077 | /* SMLALS : cccc 0000 1111 xxxx xxxx xxxx 1001 xxxx :cc */ | ||
1078 | if ((insn & 0x0fe000f0) == 0x00000090) { | ||
1079 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | ||
1080 | } else if ((insn & 0x0fe000f0) == 0x00200090) { | ||
1081 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
1082 | } else { | ||
1083 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | ||
1084 | } | ||
1085 | } | ||
1086 | |||
1087 | /* cccc 000x xxxx xxxx xxxx xxxx xxxx 1xx1 xxxx */ | ||
1088 | else if ((insn & 0x0e000090) == 0x00000090) { | ||
1089 | |||
1090 | /* SWP : cccc 0001 0000 xxxx xxxx xxxx 1001 xxxx */ | ||
1091 | /* SWPB : cccc 0001 0100 xxxx xxxx xxxx 1001 xxxx */ | ||
1092 | /* LDRD : cccc 000x xxx0 xxxx xxxx xxxx 1101 xxxx */ | ||
1093 | /* STRD : cccc 000x xxx0 xxxx xxxx xxxx 1111 xxxx */ | ||
1094 | /* STREX : cccc 0001 1000 xxxx xxxx xxxx 1001 xxxx */ | ||
1095 | /* LDREX : cccc 0001 1001 xxxx xxxx xxxx 1001 xxxx */ | ||
1096 | /* LDRH : cccc 000x xxx1 xxxx xxxx xxxx 1011 xxxx */ | ||
1097 | /* STRH : cccc 000x xxx0 xxxx xxxx xxxx 1011 xxxx */ | ||
1098 | /* LDRSB : cccc 000x xxx1 xxxx xxxx xxxx 1101 xxxx */ | ||
1099 | /* LDRSH : cccc 000x xxx1 xxxx xxxx xxxx 1111 xxxx */ | ||
1100 | if ((insn & 0x0fb000f0) == 0x01000090) { | ||
1101 | /* SWP/SWPB */ | ||
1102 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
1103 | } else if ((insn & 0x0e1000d0) == 0x00000d0) { | ||
1104 | /* STRD/LDRD */ | ||
1105 | insn &= 0xfff00fff; | ||
1106 | insn |= 0x00002000; /* Rn = r0, Rd = r2 */ | ||
1107 | if (insn & (1 << 22)) { | ||
1108 | /* I bit */ | ||
1109 | insn &= ~0xf; | ||
1110 | insn |= 1; /* Rm = r1 */ | ||
1111 | } | ||
1112 | asi->insn[0] = insn; | ||
1113 | asi->insn_handler = | ||
1114 | (insn & (1 << 5)) ? emulate_strd : emulate_ldrd; | ||
1115 | return INSN_GOOD; | ||
1116 | } | ||
1117 | |||
1118 | return prep_emulate_ldr_str(insn, asi); | ||
1119 | } | ||
1120 | |||
1121 | /* cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx xxxx */ | ||
1122 | |||
1123 | /* | ||
1124 | * ALU op with S bit and Rd == 15 : | ||
1125 | * cccc 000x xxx1 xxxx 1111 xxxx xxxx xxxx | ||
1126 | */ | ||
1127 | if ((insn & 0x0e10f000) == 0x0010f000) | ||
1128 | return INSN_REJECTED; | ||
1129 | |||
1130 | /* | ||
1131 | * "mov ip, sp" is the most common kprobe'd instruction by far. | ||
1132 | * Check and optimize for it explicitly. | ||
1133 | */ | ||
1134 | if (insn == 0xe1a0c00d) { | ||
1135 | asi->insn_handler = simulate_mov_ipsp; | ||
1136 | return INSN_GOOD_NO_SLOT; | ||
1137 | } | ||
1138 | |||
1139 | /* | ||
1140 | * Data processing: Immediate-shift / Register-shift | ||
1141 | * ALU op : cccc 000x xxxx xxxx xxxx xxxx xxxx xxxx | ||
1142 | * CPY : cccc 0001 1010 xxxx xxxx 0000 0000 xxxx | ||
1143 | * MOV : cccc 0001 101x xxxx xxxx xxxx xxxx xxxx | ||
1144 | * *S (bit 20) updates condition codes | ||
1145 | * ADC/SBC/RSC reads the C flag | ||
1146 | */ | ||
1147 | insn &= 0xfff00ff0; /* Rn = r0, Rd = r0 */ | ||
1148 | insn |= 0x00000001; /* Rm = r1 */ | ||
1149 | if (insn & 0x010) { | ||
1150 | insn &= 0xfffff0ff; /* register shift */ | ||
1151 | insn |= 0x00000200; /* Rs = r2 */ | ||
1152 | } | ||
1153 | asi->insn[0] = insn; | ||
1154 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | ||
1155 | emulate_alu_rwflags : emulate_alu_rflags; | ||
1156 | return INSN_GOOD; | ||
1157 | } | ||
1158 | |||
1159 | static enum kprobe_insn __kprobes | ||
1160 | space_cccc_001x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1161 | { | ||
1162 | /* | ||
1163 | * MSR : cccc 0011 0x10 xxxx xxxx xxxx xxxx xxxx | ||
1164 | * Undef : cccc 0011 0x00 xxxx xxxx xxxx xxxx xxxx | ||
1165 | * ALU op with S bit and Rd == 15 : | ||
1166 | * cccc 001x xxx1 xxxx 1111 xxxx xxxx xxxx | ||
1167 | */ | ||
1168 | if ((insn & 0x0f900000) == 0x03200000 || /* MSR & Undef */ | ||
1169 | (insn & 0x0e10f000) == 0x0210f000) /* ALU s-bit, R15 */ | ||
1170 | return INSN_REJECTED; | ||
1171 | |||
1172 | /* | ||
1173 | * Data processing: 32-bit Immediate | ||
1174 | * ALU op : cccc 001x xxxx xxxx xxxx xxxx xxxx xxxx | ||
1175 | * MOV : cccc 0011 101x xxxx xxxx xxxx xxxx xxxx | ||
1176 | * *S (bit 20) updates condition codes | ||
1177 | * ADC/SBC/RSC reads the C flag | ||
1178 | */ | ||
1179 | insn &= 0xfff00ff0; /* Rn = r0, Rd = r0 */ | ||
1180 | asi->insn[0] = insn; | ||
1181 | asi->insn_handler = (insn & (1 << 20)) ? /* S-bit */ | ||
1182 | emulate_alu_imm_rwflags : emulate_alu_imm_rflags; | ||
1183 | return INSN_GOOD; | ||
1184 | } | ||
1185 | |||
1186 | static enum kprobe_insn __kprobes | ||
1187 | space_cccc_0110__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1188 | { | ||
1189 | /* SEL : cccc 0110 1000 xxxx xxxx xxxx 1011 xxxx GE: !!! */ | ||
1190 | if ((insn & 0x0ff000f0) == 0x068000b0) { | ||
1191 | insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */ | ||
1192 | insn |= 0x00000001; /* Rm = r1 */ | ||
1193 | asi->insn[0] = insn; | ||
1194 | asi->insn_handler = emulate_sel; | ||
1195 | return INSN_GOOD; | ||
1196 | } | ||
1197 | |||
1198 | /* SSAT : cccc 0110 101x xxxx xxxx xxxx xx01 xxxx :Q */ | ||
1199 | /* USAT : cccc 0110 111x xxxx xxxx xxxx xx01 xxxx :Q */ | ||
1200 | /* SSAT16 : cccc 0110 1010 xxxx xxxx xxxx 0011 xxxx :Q */ | ||
1201 | /* USAT16 : cccc 0110 1110 xxxx xxxx xxxx 0011 xxxx :Q */ | ||
1202 | if ((insn & 0x0fa00030) == 0x06a00010 || | ||
1203 | (insn & 0x0fb000f0) == 0x06a00030) { | ||
1204 | insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */ | ||
1205 | asi->insn[0] = insn; | ||
1206 | asi->insn_handler = emulate_sat; | ||
1207 | return INSN_GOOD; | ||
1208 | } | ||
1209 | |||
1210 | /* REV : cccc 0110 1011 xxxx xxxx xxxx 0011 xxxx */ | ||
1211 | /* REV16 : cccc 0110 1011 xxxx xxxx xxxx 1011 xxxx */ | ||
1212 | /* REVSH : cccc 0110 1111 xxxx xxxx xxxx 1011 xxxx */ | ||
1213 | if ((insn & 0x0ff00070) == 0x06b00030 || | ||
1214 | (insn & 0x0ff000f0) == 0x06f000b0) | ||
1215 | return prep_emulate_rd12rm0(insn, asi); | ||
1216 | |||
1217 | /* SADD16 : cccc 0110 0001 xxxx xxxx xxxx 0001 xxxx :GE */ | ||
1218 | /* SADDSUBX : cccc 0110 0001 xxxx xxxx xxxx 0011 xxxx :GE */ | ||
1219 | /* SSUBADDX : cccc 0110 0001 xxxx xxxx xxxx 0101 xxxx :GE */ | ||
1220 | /* SSUB16 : cccc 0110 0001 xxxx xxxx xxxx 0111 xxxx :GE */ | ||
1221 | /* SADD8 : cccc 0110 0001 xxxx xxxx xxxx 1001 xxxx :GE */ | ||
1222 | /* SSUB8 : cccc 0110 0001 xxxx xxxx xxxx 1111 xxxx :GE */ | ||
1223 | /* QADD16 : cccc 0110 0010 xxxx xxxx xxxx 0001 xxxx : */ | ||
1224 | /* QADDSUBX : cccc 0110 0010 xxxx xxxx xxxx 0011 xxxx : */ | ||
1225 | /* QSUBADDX : cccc 0110 0010 xxxx xxxx xxxx 0101 xxxx : */ | ||
1226 | /* QSUB16 : cccc 0110 0010 xxxx xxxx xxxx 0111 xxxx : */ | ||
1227 | /* QADD8 : cccc 0110 0010 xxxx xxxx xxxx 1001 xxxx : */ | ||
1228 | /* QSUB8 : cccc 0110 0010 xxxx xxxx xxxx 1111 xxxx : */ | ||
1229 | /* SHADD16 : cccc 0110 0011 xxxx xxxx xxxx 0001 xxxx : */ | ||
1230 | /* SHADDSUBX : cccc 0110 0011 xxxx xxxx xxxx 0011 xxxx : */ | ||
1231 | /* SHSUBADDX : cccc 0110 0011 xxxx xxxx xxxx 0101 xxxx : */ | ||
1232 | /* SHSUB16 : cccc 0110 0011 xxxx xxxx xxxx 0111 xxxx : */ | ||
1233 | /* SHADD8 : cccc 0110 0011 xxxx xxxx xxxx 1001 xxxx : */ | ||
1234 | /* SHSUB8 : cccc 0110 0011 xxxx xxxx xxxx 1111 xxxx : */ | ||
1235 | /* UADD16 : cccc 0110 0101 xxxx xxxx xxxx 0001 xxxx :GE */ | ||
1236 | /* UADDSUBX : cccc 0110 0101 xxxx xxxx xxxx 0011 xxxx :GE */ | ||
1237 | /* USUBADDX : cccc 0110 0101 xxxx xxxx xxxx 0101 xxxx :GE */ | ||
1238 | /* USUB16 : cccc 0110 0101 xxxx xxxx xxxx 0111 xxxx :GE */ | ||
1239 | /* UADD8 : cccc 0110 0101 xxxx xxxx xxxx 1001 xxxx :GE */ | ||
1240 | /* USUB8 : cccc 0110 0101 xxxx xxxx xxxx 1111 xxxx :GE */ | ||
1241 | /* UQADD16 : cccc 0110 0110 xxxx xxxx xxxx 0001 xxxx : */ | ||
1242 | /* UQADDSUBX : cccc 0110 0110 xxxx xxxx xxxx 0011 xxxx : */ | ||
1243 | /* UQSUBADDX : cccc 0110 0110 xxxx xxxx xxxx 0101 xxxx : */ | ||
1244 | /* UQSUB16 : cccc 0110 0110 xxxx xxxx xxxx 0111 xxxx : */ | ||
1245 | /* UQADD8 : cccc 0110 0110 xxxx xxxx xxxx 1001 xxxx : */ | ||
1246 | /* UQSUB8 : cccc 0110 0110 xxxx xxxx xxxx 1111 xxxx : */ | ||
1247 | /* UHADD16 : cccc 0110 0111 xxxx xxxx xxxx 0001 xxxx : */ | ||
1248 | /* UHADDSUBX : cccc 0110 0111 xxxx xxxx xxxx 0011 xxxx : */ | ||
1249 | /* UHSUBADDX : cccc 0110 0111 xxxx xxxx xxxx 0101 xxxx : */ | ||
1250 | /* UHSUB16 : cccc 0110 0111 xxxx xxxx xxxx 0111 xxxx : */ | ||
1251 | /* UHADD8 : cccc 0110 0111 xxxx xxxx xxxx 1001 xxxx : */ | ||
1252 | /* UHSUB8 : cccc 0110 0111 xxxx xxxx xxxx 1111 xxxx : */ | ||
1253 | /* PKHBT : cccc 0110 1000 xxxx xxxx xxxx x001 xxxx : */ | ||
1254 | /* PKHTB : cccc 0110 1000 xxxx xxxx xxxx x101 xxxx : */ | ||
1255 | /* SXTAB16 : cccc 0110 1000 xxxx xxxx xxxx 0111 xxxx : */ | ||
1256 | /* SXTB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ | ||
1257 | /* SXTAB : cccc 0110 1010 xxxx xxxx xxxx 0111 xxxx : */ | ||
1258 | /* SXTAH : cccc 0110 1011 xxxx xxxx xxxx 0111 xxxx : */ | ||
1259 | /* UXTAB16 : cccc 0110 1100 xxxx xxxx xxxx 0111 xxxx : */ | ||
1260 | /* UXTAB : cccc 0110 1110 xxxx xxxx xxxx 0111 xxxx : */ | ||
1261 | /* UXTAH : cccc 0110 1111 xxxx xxxx xxxx 0111 xxxx : */ | ||
1262 | return prep_emulate_rd12rn16rm0_wflags(insn, asi); | ||
1263 | } | ||
1264 | |||
1265 | static enum kprobe_insn __kprobes | ||
1266 | space_cccc_0111__1(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1267 | { | ||
1268 | /* Undef : cccc 0111 1111 xxxx xxxx xxxx 1111 xxxx */ | ||
1269 | if ((insn & 0x0ff000f0) == 0x03f000f0) | ||
1270 | return INSN_REJECTED; | ||
1271 | |||
1272 | /* USADA8 : cccc 0111 1000 xxxx xxxx xxxx 0001 xxxx */ | ||
1273 | /* USAD8 : cccc 0111 1000 xxxx 1111 xxxx 0001 xxxx */ | ||
1274 | if ((insn & 0x0ff000f0) == 0x07800010) | ||
1275 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
1276 | |||
1277 | /* SMLALD : cccc 0111 0100 xxxx xxxx xxxx 00x1 xxxx */ | ||
1278 | /* SMLSLD : cccc 0111 0100 xxxx xxxx xxxx 01x1 xxxx */ | ||
1279 | if ((insn & 0x0ff00090) == 0x07400010) | ||
1280 | return prep_emulate_rdhi16rdlo12rs8rm0_wflags(insn, asi); | ||
1281 | |||
1282 | /* SMLAD : cccc 0111 0000 xxxx xxxx xxxx 00x1 xxxx :Q */ | ||
1283 | /* SMLSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx :Q */ | ||
1284 | /* SMMLA : cccc 0111 0101 xxxx xxxx xxxx 00x1 xxxx : */ | ||
1285 | /* SMMLS : cccc 0111 0101 xxxx xxxx xxxx 11x1 xxxx : */ | ||
1286 | if ((insn & 0x0ff00090) == 0x07000010 || | ||
1287 | (insn & 0x0ff000d0) == 0x07500010 || | ||
1288 | (insn & 0x0ff000d0) == 0x075000d0) | ||
1289 | return prep_emulate_rd16rn12rs8rm0_wflags(insn, asi); | ||
1290 | |||
1291 | /* SMUSD : cccc 0111 0000 xxxx xxxx xxxx 01x1 xxxx : */ | ||
1292 | /* SMUAD : cccc 0111 0000 xxxx 1111 xxxx 00x1 xxxx :Q */ | ||
1293 | /* SMMUL : cccc 0111 0101 xxxx 1111 xxxx 00x1 xxxx : */ | ||
1294 | return prep_emulate_rd16rs8rm0_wflags(insn, asi); | ||
1295 | } | ||
1296 | |||
1297 | static enum kprobe_insn __kprobes | ||
1298 | space_cccc_01xx(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1299 | { | ||
1300 | /* LDR : cccc 01xx x0x1 xxxx xxxx xxxx xxxx xxxx */ | ||
1301 | /* LDRB : cccc 01xx x1x1 xxxx xxxx xxxx xxxx xxxx */ | ||
1302 | /* LDRBT : cccc 01x0 x111 xxxx xxxx xxxx xxxx xxxx */ | ||
1303 | /* LDRT : cccc 01x0 x011 xxxx xxxx xxxx xxxx xxxx */ | ||
1304 | /* STR : cccc 01xx x0x0 xxxx xxxx xxxx xxxx xxxx */ | ||
1305 | /* STRB : cccc 01xx x1x0 xxxx xxxx xxxx xxxx xxxx */ | ||
1306 | /* STRBT : cccc 01x0 x110 xxxx xxxx xxxx xxxx xxxx */ | ||
1307 | /* STRT : cccc 01x0 x010 xxxx xxxx xxxx xxxx xxxx */ | ||
1308 | return prep_emulate_ldr_str(insn, asi); | ||
1309 | } | ||
1310 | |||
1311 | static enum kprobe_insn __kprobes | ||
1312 | space_cccc_100x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1313 | { | ||
1314 | /* LDM(2) : cccc 100x x101 xxxx 0xxx xxxx xxxx xxxx */ | ||
1315 | /* LDM(3) : cccc 100x x1x1 xxxx 1xxx xxxx xxxx xxxx */ | ||
1316 | if ((insn & 0x0e708000) == 0x85000000 || | ||
1317 | (insn & 0x0e508000) == 0x85010000) | ||
1318 | return INSN_REJECTED; | ||
1319 | |||
1320 | /* LDM(1) : cccc 100x x0x1 xxxx xxxx xxxx xxxx xxxx */ | ||
1321 | /* STM(1) : cccc 100x x0x0 xxxx xxxx xxxx xxxx xxxx */ | ||
1322 | asi->insn[0] = truecc_insn(insn); | ||
1323 | asi->insn_handler = ((insn & 0x108000) == 0x008000) ? /* STM & R15 */ | ||
1324 | simulate_stm1_pc : simulate_ldm1stm1; | ||
1325 | return INSN_GOOD; | ||
1326 | } | ||
1327 | |||
1328 | static enum kprobe_insn __kprobes | ||
1329 | space_cccc_101x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1330 | { | ||
1331 | /* B : cccc 1010 xxxx xxxx xxxx xxxx xxxx xxxx */ | ||
1332 | /* BL : cccc 1011 xxxx xxxx xxxx xxxx xxxx xxxx */ | ||
1333 | asi->insn[0] = truecc_insn(insn); | ||
1334 | asi->insn_handler = simulate_bbl; | ||
1335 | return INSN_GOOD; | ||
1336 | } | ||
1337 | |||
1338 | static enum kprobe_insn __kprobes | ||
1339 | space_cccc_1100_010x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1340 | { | ||
1341 | /* MCRR : cccc 1100 0100 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ | ||
1342 | /* MRRC : cccc 1100 0101 xxxx xxxx xxxx xxxx xxxx : (Rd!=Rn) */ | ||
1343 | insn &= 0xfff00fff; | ||
1344 | insn |= 0x00001000; /* Rn = r0, Rd = r1 */ | ||
1345 | asi->insn[0] = insn; | ||
1346 | asi->insn_handler = (insn & (1 << 20)) ? emulate_mrrc : emulate_mcrr; | ||
1347 | return INSN_GOOD; | ||
1348 | } | ||
1349 | |||
1350 | static enum kprobe_insn __kprobes | ||
1351 | space_cccc_110x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1352 | { | ||
1353 | /* LDC : cccc 110x xxx1 xxxx xxxx xxxx xxxx xxxx */ | ||
1354 | /* STC : cccc 110x xxx0 xxxx xxxx xxxx xxxx xxxx */ | ||
1355 | insn &= 0xfff0ffff; /* Rn = r0 */ | ||
1356 | asi->insn[0] = insn; | ||
1357 | asi->insn_handler = emulate_ldcstc; | ||
1358 | return INSN_GOOD; | ||
1359 | } | ||
1360 | |||
1361 | static enum kprobe_insn __kprobes | ||
1362 | space_cccc_111x(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1363 | { | ||
1364 | /* BKPT : 1110 0001 0010 xxxx xxxx xxxx 0111 xxxx */ | ||
1365 | /* SWI : cccc 1111 xxxx xxxx xxxx xxxx xxxx xxxx */ | ||
1366 | if ((insn & 0xfff000f0) == 0xe1200070 || | ||
1367 | (insn & 0x0f000000) == 0x0f000000) | ||
1368 | return INSN_REJECTED; | ||
1369 | |||
1370 | /* CDP : cccc 1110 xxxx xxxx xxxx xxxx xxx0 xxxx */ | ||
1371 | if ((insn & 0x0f000010) == 0x0e000000) { | ||
1372 | asi->insn[0] = insn; | ||
1373 | asi->insn_handler = emulate_none; | ||
1374 | return INSN_GOOD; | ||
1375 | } | ||
1376 | |||
1377 | /* MCR : cccc 1110 xxx0 xxxx xxxx xxxx xxx1 xxxx */ | ||
1378 | /* MRC : cccc 1110 xxx1 xxxx xxxx xxxx xxx1 xxxx */ | ||
1379 | insn &= 0xffff0fff; /* Rd = r0 */ | ||
1380 | asi->insn[0] = insn; | ||
1381 | asi->insn_handler = (insn & (1 << 20)) ? emulate_rd12 : emulate_ird12; | ||
1382 | return INSN_GOOD; | ||
1383 | } | ||
1384 | |||
1385 | /* Return: | ||
1386 | * INSN_REJECTED If instruction is one not allowed to kprobe, | ||
1387 | * INSN_GOOD If instruction is supported and uses instruction slot, | ||
1388 | * INSN_GOOD_NO_SLOT If instruction is supported but doesn't use its slot. | ||
1389 | * | ||
1390 | * For instructions we don't want to kprobe (INSN_REJECTED return result): | ||
1391 | * These are generally ones that modify the processor state making | ||
1392 | * them "hard" to simulate such as switches processor modes or | ||
1393 | * make accesses in alternate modes. Any of these could be simulated | ||
1394 | * if the work was put into it, but low return considering they | ||
1395 | * should also be very rare. | ||
1396 | */ | ||
1397 | enum kprobe_insn __kprobes | ||
1398 | arm_kprobe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) | ||
1399 | { | ||
1400 | asi->insn[1] = KPROBE_RETURN_INSTRUCTION; | ||
1401 | |||
1402 | if ((insn & 0xf0000000) == 0xf0000000) { | ||
1403 | |||
1404 | return space_1111(insn, asi); | ||
1405 | |||
1406 | } else if ((insn & 0x0e000000) == 0x00000000) { | ||
1407 | |||
1408 | return space_cccc_000x(insn, asi); | ||
1409 | |||
1410 | } else if ((insn & 0x0e000000) == 0x02000000) { | ||
1411 | |||
1412 | return space_cccc_001x(insn, asi); | ||
1413 | |||
1414 | } else if ((insn & 0x0f000010) == 0x06000010) { | ||
1415 | |||
1416 | return space_cccc_0110__1(insn, asi); | ||
1417 | |||
1418 | } else if ((insn & 0x0f000010) == 0x07000010) { | ||
1419 | |||
1420 | return space_cccc_0111__1(insn, asi); | ||
1421 | |||
1422 | } else if ((insn & 0x0c000000) == 0x04000000) { | ||
1423 | |||
1424 | return space_cccc_01xx(insn, asi); | ||
1425 | |||
1426 | } else if ((insn & 0x0e000000) == 0x08000000) { | ||
1427 | |||
1428 | return space_cccc_100x(insn, asi); | ||
1429 | |||
1430 | } else if ((insn & 0x0e000000) == 0x0a000000) { | ||
1431 | |||
1432 | return space_cccc_101x(insn, asi); | ||
1433 | |||
1434 | } else if ((insn & 0x0fe00000) == 0x0c400000) { | ||
1435 | |||
1436 | return space_cccc_1100_010x(insn, asi); | ||
1437 | |||
1438 | } else if ((insn & 0x0e000000) == 0x0c400000) { | ||
1439 | |||
1440 | return space_cccc_110x(insn, asi); | ||
1441 | |||
1442 | } | ||
1443 | |||
1444 | return space_cccc_111x(insn, asi); | ||
1445 | } | ||
1446 | |||
1447 | void __init arm_kprobe_decode_init(void) | ||
1448 | { | ||
1449 | find_str_pc_offset(); | ||
1450 | } | ||
1451 | |||
1452 | |||
1453 | /* | ||
1454 | * All ARM instructions listed below. | ||
1455 | * | ||
1456 | * Instructions and their general purpose registers are given. | ||
1457 | * If a particular register may not use R15, it is prefixed with a "!". | ||
1458 | * If marked with a "*" means the value returned by reading R15 | ||
1459 | * is implementation defined. | ||
1460 | * | ||
1461 | * ADC/ADD/AND/BIC/CMN/CMP/EOR/MOV/MVN/ORR/RSB/RSC/SBC/SUB/TEQ | ||
1462 | * TST: Rd, Rn, Rm, !Rs | ||
1463 | * BX: Rm | ||
1464 | * BLX(2): !Rm | ||
1465 | * BX: Rm (R15 legal, but discouraged) | ||
1466 | * BXJ: !Rm, | ||
1467 | * CLZ: !Rd, !Rm | ||
1468 | * CPY: Rd, Rm | ||
1469 | * LDC/2,STC/2 immediate offset & unindex: Rn | ||
1470 | * LDC/2,STC/2 immediate pre/post-indexed: !Rn | ||
1471 | * LDM(1/3): !Rn, register_list | ||
1472 | * LDM(2): !Rn, !register_list | ||
1473 | * LDR,STR,PLD immediate offset: Rd, Rn | ||
1474 | * LDR,STR,PLD register offset: Rd, Rn, !Rm | ||
1475 | * LDR,STR,PLD scaled register offset: Rd, !Rn, !Rm | ||
1476 | * LDR,STR immediate pre/post-indexed: Rd, !Rn | ||
1477 | * LDR,STR register pre/post-indexed: Rd, !Rn, !Rm | ||
1478 | * LDR,STR scaled register pre/post-indexed: Rd, !Rn, !Rm | ||
1479 | * LDRB,STRB immediate offset: !Rd, Rn | ||
1480 | * LDRB,STRB register offset: !Rd, Rn, !Rm | ||
1481 | * LDRB,STRB scaled register offset: !Rd, !Rn, !Rm | ||
1482 | * LDRB,STRB immediate pre/post-indexed: !Rd, !Rn | ||
1483 | * LDRB,STRB register pre/post-indexed: !Rd, !Rn, !Rm | ||
1484 | * LDRB,STRB scaled register pre/post-indexed: !Rd, !Rn, !Rm | ||
1485 | * LDRT,LDRBT,STRBT immediate pre/post-indexed: !Rd, !Rn | ||
1486 | * LDRT,LDRBT,STRBT register pre/post-indexed: !Rd, !Rn, !Rm | ||
1487 | * LDRT,LDRBT,STRBT scaled register pre/post-indexed: !Rd, !Rn, !Rm | ||
1488 | * LDRH/SH/SB/D,STRH/SH/SB/D immediate offset: !Rd, Rn | ||
1489 | * LDRH/SH/SB/D,STRH/SH/SB/D register offset: !Rd, Rn, !Rm | ||
1490 | * LDRH/SH/SB/D,STRH/SH/SB/D immediate pre/post-indexed: !Rd, !Rn | ||
1491 | * LDRH/SH/SB/D,STRH/SH/SB/D register pre/post-indexed: !Rd, !Rn, !Rm | ||
1492 | * LDREX: !Rd, !Rn | ||
1493 | * MCR/2: !Rd | ||
1494 | * MCRR/2,MRRC/2: !Rd, !Rn | ||
1495 | * MLA: !Rd, !Rn, !Rm, !Rs | ||
1496 | * MOV: Rd | ||
1497 | * MRC/2: !Rd (if Rd==15, only changes cond codes, not the register) | ||
1498 | * MRS,MSR: !Rd | ||
1499 | * MUL: !Rd, !Rm, !Rs | ||
1500 | * PKH{BT,TB}: !Rd, !Rn, !Rm | ||
1501 | * QDADD,[U]QADD/16/8/SUBX: !Rd, !Rm, !Rn | ||
1502 | * QDSUB,[U]QSUB/16/8/ADDX: !Rd, !Rm, !Rn | ||
1503 | * REV/16/SH: !Rd, !Rm | ||
1504 | * RFE: !Rn | ||
1505 | * {S,U}[H]ADD{16,8,SUBX},{S,U}[H]SUB{16,8,ADDX}: !Rd, !Rn, !Rm | ||
1506 | * SEL: !Rd, !Rn, !Rm | ||
1507 | * SMLA<x><y>,SMLA{D,W<y>},SMLSD,SMML{A,S}: !Rd, !Rn, !Rm, !Rs | ||
1508 | * SMLAL<x><y>,SMLA{D,LD},SMLSLD,SMMULL,SMULW<y>: !RdHi, !RdLo, !Rm, !Rs | ||
1509 | * SMMUL,SMUAD,SMUL<x><y>,SMUSD: !Rd, !Rm, !Rs | ||
1510 | * SSAT/16: !Rd, !Rm | ||
1511 | * STM(1/2): !Rn, register_list* (R15 in reg list not recommended) | ||
1512 | * STRT immediate pre/post-indexed: Rd*, !Rn | ||
1513 | * STRT register pre/post-indexed: Rd*, !Rn, !Rm | ||
1514 | * STRT scaled register pre/post-indexed: Rd*, !Rn, !Rm | ||
1515 | * STREX: !Rd, !Rn, !Rm | ||
1516 | * SWP/B: !Rd, !Rn, !Rm | ||
1517 | * {S,U}XTA{B,B16,H}: !Rd, !Rn, !Rm | ||
1518 | * {S,U}XT{B,B16,H}: !Rd, !Rm | ||
1519 | * UM{AA,LA,UL}L: !RdHi, !RdLo, !Rm, !Rs | ||
1520 | * USA{D8,A8,T,T16}: !Rd, !Rm, !Rs | ||
1521 | * | ||
1522 | * May transfer control by writing R15 (possible mode changes or alternate | ||
1523 | * mode accesses marked by "*"): | ||
1524 | * ALU op (* with s-bit), B, BL, BKPT, BLX(1/2), BX, BXJ, CPS*, CPY, | ||
1525 | * LDM(1), LDM(2/3)*, LDR, MOV, RFE*, SWI* | ||
1526 | * | ||
1527 | * Instructions that do not take general registers, nor transfer control: | ||
1528 | * CDP/2, SETEND, SRS* | ||
1529 | */ | ||
diff --git a/arch/arm/kernel/kprobes.c b/arch/arm/kernel/kprobes.c new file mode 100644 index 000000000000..a22a98c43ca5 --- /dev/null +++ b/arch/arm/kernel/kprobes.c | |||
@@ -0,0 +1,447 @@ | |||
1 | /* | ||
2 | * arch/arm/kernel/kprobes.c | ||
3 | * | ||
4 | * Kprobes on ARM | ||
5 | * | ||
6 | * Abhishek Sagar <sagar.abhishek@gmail.com> | ||
7 | * Copyright (C) 2006, 2007 Motorola Inc. | ||
8 | * | ||
9 | * Nicolas Pitre <nico@marvell.com> | ||
10 | * Copyright (C) 2007 Marvell Ltd. | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License version 2 as | ||
14 | * published by the Free Software Foundation. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, | ||
17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
19 | * General Public License for more details. | ||
20 | */ | ||
21 | |||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/kprobes.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/stringify.h> | ||
26 | #include <asm/traps.h> | ||
27 | #include <asm/cacheflush.h> | ||
28 | |||
29 | #define MIN_STACK_SIZE(addr) \ | ||
30 | min((unsigned long)MAX_STACK_SIZE, \ | ||
31 | (unsigned long)current_thread_info() + THREAD_START_SP - (addr)) | ||
32 | |||
33 | #define flush_insns(addr, cnt) \ | ||
34 | flush_icache_range((unsigned long)(addr), \ | ||
35 | (unsigned long)(addr) + \ | ||
36 | sizeof(kprobe_opcode_t) * (cnt)) | ||
37 | |||
38 | /* Used as a marker in ARM_pc to note when we're in a jprobe. */ | ||
39 | #define JPROBE_MAGIC_ADDR 0xffffffff | ||
40 | |||
41 | DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; | ||
42 | DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); | ||
43 | |||
44 | |||
45 | int __kprobes arch_prepare_kprobe(struct kprobe *p) | ||
46 | { | ||
47 | kprobe_opcode_t insn; | ||
48 | kprobe_opcode_t tmp_insn[MAX_INSN_SIZE]; | ||
49 | unsigned long addr = (unsigned long)p->addr; | ||
50 | int is; | ||
51 | |||
52 | if (addr & 0x3 || in_exception_text(addr)) | ||
53 | return -EINVAL; | ||
54 | |||
55 | insn = *p->addr; | ||
56 | p->opcode = insn; | ||
57 | p->ainsn.insn = tmp_insn; | ||
58 | |||
59 | switch (arm_kprobe_decode_insn(insn, &p->ainsn)) { | ||
60 | case INSN_REJECTED: /* not supported */ | ||
61 | return -EINVAL; | ||
62 | |||
63 | case INSN_GOOD: /* instruction uses slot */ | ||
64 | p->ainsn.insn = get_insn_slot(); | ||
65 | if (!p->ainsn.insn) | ||
66 | return -ENOMEM; | ||
67 | for (is = 0; is < MAX_INSN_SIZE; ++is) | ||
68 | p->ainsn.insn[is] = tmp_insn[is]; | ||
69 | flush_insns(&p->ainsn.insn, MAX_INSN_SIZE); | ||
70 | break; | ||
71 | |||
72 | case INSN_GOOD_NO_SLOT: /* instruction doesn't need insn slot */ | ||
73 | p->ainsn.insn = NULL; | ||
74 | break; | ||
75 | } | ||
76 | |||
77 | return 0; | ||
78 | } | ||
79 | |||
80 | void __kprobes arch_arm_kprobe(struct kprobe *p) | ||
81 | { | ||
82 | *p->addr = KPROBE_BREAKPOINT_INSTRUCTION; | ||
83 | flush_insns(p->addr, 1); | ||
84 | } | ||
85 | |||
86 | void __kprobes arch_disarm_kprobe(struct kprobe *p) | ||
87 | { | ||
88 | *p->addr = p->opcode; | ||
89 | flush_insns(p->addr, 1); | ||
90 | } | ||
91 | |||
92 | void __kprobes arch_remove_kprobe(struct kprobe *p) | ||
93 | { | ||
94 | if (p->ainsn.insn) { | ||
95 | mutex_lock(&kprobe_mutex); | ||
96 | free_insn_slot(p->ainsn.insn, 0); | ||
97 | mutex_unlock(&kprobe_mutex); | ||
98 | p->ainsn.insn = NULL; | ||
99 | } | ||
100 | } | ||
101 | |||
102 | static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb) | ||
103 | { | ||
104 | kcb->prev_kprobe.kp = kprobe_running(); | ||
105 | kcb->prev_kprobe.status = kcb->kprobe_status; | ||
106 | } | ||
107 | |||
108 | static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb) | ||
109 | { | ||
110 | __get_cpu_var(current_kprobe) = kcb->prev_kprobe.kp; | ||
111 | kcb->kprobe_status = kcb->prev_kprobe.status; | ||
112 | } | ||
113 | |||
114 | static void __kprobes set_current_kprobe(struct kprobe *p) | ||
115 | { | ||
116 | __get_cpu_var(current_kprobe) = p; | ||
117 | } | ||
118 | |||
119 | static void __kprobes singlestep(struct kprobe *p, struct pt_regs *regs, | ||
120 | struct kprobe_ctlblk *kcb) | ||
121 | { | ||
122 | regs->ARM_pc += 4; | ||
123 | p->ainsn.insn_handler(p, regs); | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * Called with IRQs disabled. IRQs must remain disabled from that point | ||
128 | * all the way until processing this kprobe is complete. The current | ||
129 | * kprobes implementation cannot process more than one nested level of | ||
130 | * kprobe, and that level is reserved for user kprobe handlers, so we can't | ||
131 | * risk encountering a new kprobe in an interrupt handler. | ||
132 | */ | ||
133 | void __kprobes kprobe_handler(struct pt_regs *regs) | ||
134 | { | ||
135 | struct kprobe *p, *cur; | ||
136 | struct kprobe_ctlblk *kcb; | ||
137 | kprobe_opcode_t *addr = (kprobe_opcode_t *)regs->ARM_pc; | ||
138 | |||
139 | kcb = get_kprobe_ctlblk(); | ||
140 | cur = kprobe_running(); | ||
141 | p = get_kprobe(addr); | ||
142 | |||
143 | if (p) { | ||
144 | if (cur) { | ||
145 | /* Kprobe is pending, so we're recursing. */ | ||
146 | switch (kcb->kprobe_status) { | ||
147 | case KPROBE_HIT_ACTIVE: | ||
148 | case KPROBE_HIT_SSDONE: | ||
149 | /* A pre- or post-handler probe got us here. */ | ||
150 | kprobes_inc_nmissed_count(p); | ||
151 | save_previous_kprobe(kcb); | ||
152 | set_current_kprobe(p); | ||
153 | kcb->kprobe_status = KPROBE_REENTER; | ||
154 | singlestep(p, regs, kcb); | ||
155 | restore_previous_kprobe(kcb); | ||
156 | break; | ||
157 | default: | ||
158 | /* impossible cases */ | ||
159 | BUG(); | ||
160 | } | ||
161 | } else { | ||
162 | set_current_kprobe(p); | ||
163 | kcb->kprobe_status = KPROBE_HIT_ACTIVE; | ||
164 | |||
165 | /* | ||
166 | * If we have no pre-handler or it returned 0, we | ||
167 | * continue with normal processing. If we have a | ||
168 | * pre-handler and it returned non-zero, it prepped | ||
169 | * for calling the break_handler below on re-entry, | ||
170 | * so get out doing nothing more here. | ||
171 | */ | ||
172 | if (!p->pre_handler || !p->pre_handler(p, regs)) { | ||
173 | kcb->kprobe_status = KPROBE_HIT_SS; | ||
174 | singlestep(p, regs, kcb); | ||
175 | if (p->post_handler) { | ||
176 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | ||
177 | p->post_handler(p, regs, 0); | ||
178 | } | ||
179 | reset_current_kprobe(); | ||
180 | } | ||
181 | } | ||
182 | } else if (cur) { | ||
183 | /* We probably hit a jprobe. Call its break handler. */ | ||
184 | if (cur->break_handler && cur->break_handler(cur, regs)) { | ||
185 | kcb->kprobe_status = KPROBE_HIT_SS; | ||
186 | singlestep(cur, regs, kcb); | ||
187 | if (cur->post_handler) { | ||
188 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | ||
189 | cur->post_handler(cur, regs, 0); | ||
190 | } | ||
191 | } | ||
192 | reset_current_kprobe(); | ||
193 | } else { | ||
194 | /* | ||
195 | * The probe was removed and a race is in progress. | ||
196 | * There is nothing we can do about it. Let's restart | ||
197 | * the instruction. By the time we can restart, the | ||
198 | * real instruction will be there. | ||
199 | */ | ||
200 | } | ||
201 | } | ||
202 | |||
203 | int kprobe_trap_handler(struct pt_regs *regs, unsigned int instr) | ||
204 | { | ||
205 | kprobe_handler(regs); | ||
206 | return 0; | ||
207 | } | ||
208 | |||
209 | int __kprobes kprobe_fault_handler(struct pt_regs *regs, unsigned int fsr) | ||
210 | { | ||
211 | struct kprobe *cur = kprobe_running(); | ||
212 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | ||
213 | |||
214 | switch (kcb->kprobe_status) { | ||
215 | case KPROBE_HIT_SS: | ||
216 | case KPROBE_REENTER: | ||
217 | /* | ||
218 | * We are here because the instruction being single | ||
219 | * stepped caused a page fault. We reset the current | ||
220 | * kprobe and the PC to point back to the probe address | ||
221 | * and allow the page fault handler to continue as a | ||
222 | * normal page fault. | ||
223 | */ | ||
224 | regs->ARM_pc = (long)cur->addr; | ||
225 | if (kcb->kprobe_status == KPROBE_REENTER) { | ||
226 | restore_previous_kprobe(kcb); | ||
227 | } else { | ||
228 | reset_current_kprobe(); | ||
229 | } | ||
230 | break; | ||
231 | |||
232 | case KPROBE_HIT_ACTIVE: | ||
233 | case KPROBE_HIT_SSDONE: | ||
234 | /* | ||
235 | * We increment the nmissed count for accounting, | ||
236 | * we can also use npre/npostfault count for accounting | ||
237 | * these specific fault cases. | ||
238 | */ | ||
239 | kprobes_inc_nmissed_count(cur); | ||
240 | |||
241 | /* | ||
242 | * We come here because instructions in the pre/post | ||
243 | * handler caused the page_fault, this could happen | ||
244 | * if handler tries to access user space by | ||
245 | * copy_from_user(), get_user() etc. Let the | ||
246 | * user-specified handler try to fix it. | ||
247 | */ | ||
248 | if (cur->fault_handler && cur->fault_handler(cur, regs, fsr)) | ||
249 | return 1; | ||
250 | break; | ||
251 | |||
252 | default: | ||
253 | break; | ||
254 | } | ||
255 | |||
256 | return 0; | ||
257 | } | ||
258 | |||
259 | int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | ||
260 | unsigned long val, void *data) | ||
261 | { | ||
262 | /* | ||
263 | * notify_die() is currently never called on ARM, | ||
264 | * so this callback is currently empty. | ||
265 | */ | ||
266 | return NOTIFY_DONE; | ||
267 | } | ||
268 | |||
269 | /* | ||
270 | * When a retprobed function returns, trampoline_handler() is called, | ||
271 | * calling the kretprobe's handler. We construct a struct pt_regs to | ||
272 | * give a view of registers r0-r11 to the user return-handler. This is | ||
273 | * not a complete pt_regs structure, but that should be plenty sufficient | ||
274 | * for kretprobe handlers which should normally be interested in r0 only | ||
275 | * anyway. | ||
276 | */ | ||
277 | static void __attribute__((naked)) __kprobes kretprobe_trampoline(void) | ||
278 | { | ||
279 | __asm__ __volatile__ ( | ||
280 | "stmdb sp!, {r0 - r11} \n\t" | ||
281 | "mov r0, sp \n\t" | ||
282 | "bl trampoline_handler \n\t" | ||
283 | "mov lr, r0 \n\t" | ||
284 | "ldmia sp!, {r0 - r11} \n\t" | ||
285 | "mov pc, lr \n\t" | ||
286 | : : : "memory"); | ||
287 | } | ||
288 | |||
289 | /* Called from kretprobe_trampoline */ | ||
290 | static __used __kprobes void *trampoline_handler(struct pt_regs *regs) | ||
291 | { | ||
292 | struct kretprobe_instance *ri = NULL; | ||
293 | struct hlist_head *head, empty_rp; | ||
294 | struct hlist_node *node, *tmp; | ||
295 | unsigned long flags, orig_ret_address = 0; | ||
296 | unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; | ||
297 | |||
298 | INIT_HLIST_HEAD(&empty_rp); | ||
299 | spin_lock_irqsave(&kretprobe_lock, flags); | ||
300 | head = kretprobe_inst_table_head(current); | ||
301 | |||
302 | /* | ||
303 | * It is possible to have multiple instances associated with a given | ||
304 | * task either because multiple functions in the call path have | ||
305 | * a return probe installed on them, and/or more than one return | ||
306 | * probe was registered for a target function. | ||
307 | * | ||
308 | * We can handle this because: | ||
309 | * - instances are always inserted at the head of the list | ||
310 | * - when multiple return probes are registered for the same | ||
311 | * function, the first instance's ret_addr will point to the | ||
312 | * real return address, and all the rest will point to | ||
313 | * kretprobe_trampoline | ||
314 | */ | ||
315 | hlist_for_each_entry_safe(ri, node, tmp, head, hlist) { | ||
316 | if (ri->task != current) | ||
317 | /* another task is sharing our hash bucket */ | ||
318 | continue; | ||
319 | |||
320 | if (ri->rp && ri->rp->handler) { | ||
321 | __get_cpu_var(current_kprobe) = &ri->rp->kp; | ||
322 | get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE; | ||
323 | ri->rp->handler(ri, regs); | ||
324 | __get_cpu_var(current_kprobe) = NULL; | ||
325 | } | ||
326 | |||
327 | orig_ret_address = (unsigned long)ri->ret_addr; | ||
328 | recycle_rp_inst(ri, &empty_rp); | ||
329 | |||
330 | if (orig_ret_address != trampoline_address) | ||
331 | /* | ||
332 | * This is the real return address. Any other | ||
333 | * instances associated with this task are for | ||
334 | * other calls deeper on the call stack | ||
335 | */ | ||
336 | break; | ||
337 | } | ||
338 | |||
339 | kretprobe_assert(ri, orig_ret_address, trampoline_address); | ||
340 | spin_unlock_irqrestore(&kretprobe_lock, flags); | ||
341 | |||
342 | hlist_for_each_entry_safe(ri, node, tmp, &empty_rp, hlist) { | ||
343 | hlist_del(&ri->hlist); | ||
344 | kfree(ri); | ||
345 | } | ||
346 | |||
347 | return (void *)orig_ret_address; | ||
348 | } | ||
349 | |||
350 | /* Called with kretprobe_lock held. */ | ||
351 | void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri, | ||
352 | struct pt_regs *regs) | ||
353 | { | ||
354 | ri->ret_addr = (kprobe_opcode_t *)regs->ARM_lr; | ||
355 | |||
356 | /* Replace the return addr with trampoline addr. */ | ||
357 | regs->ARM_lr = (unsigned long)&kretprobe_trampoline; | ||
358 | } | ||
359 | |||
360 | int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) | ||
361 | { | ||
362 | struct jprobe *jp = container_of(p, struct jprobe, kp); | ||
363 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | ||
364 | long sp_addr = regs->ARM_sp; | ||
365 | |||
366 | kcb->jprobe_saved_regs = *regs; | ||
367 | memcpy(kcb->jprobes_stack, (void *)sp_addr, MIN_STACK_SIZE(sp_addr)); | ||
368 | regs->ARM_pc = (long)jp->entry; | ||
369 | regs->ARM_cpsr |= PSR_I_BIT; | ||
370 | preempt_disable(); | ||
371 | return 1; | ||
372 | } | ||
373 | |||
374 | void __kprobes jprobe_return(void) | ||
375 | { | ||
376 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | ||
377 | |||
378 | __asm__ __volatile__ ( | ||
379 | /* | ||
380 | * Setup an empty pt_regs. Fill SP and PC fields as | ||
381 | * they're needed by longjmp_break_handler. | ||
382 | */ | ||
383 | "sub sp, %0, %1 \n\t" | ||
384 | "ldr r0, ="__stringify(JPROBE_MAGIC_ADDR)"\n\t" | ||
385 | "str %0, [sp, %2] \n\t" | ||
386 | "str r0, [sp, %3] \n\t" | ||
387 | "mov r0, sp \n\t" | ||
388 | "bl kprobe_handler \n\t" | ||
389 | |||
390 | /* | ||
391 | * Return to the context saved by setjmp_pre_handler | ||
392 | * and restored by longjmp_break_handler. | ||
393 | */ | ||
394 | "ldr r0, [sp, %4] \n\t" | ||
395 | "msr cpsr_cxsf, r0 \n\t" | ||
396 | "ldmia sp, {r0 - pc} \n\t" | ||
397 | : | ||
398 | : "r" (kcb->jprobe_saved_regs.ARM_sp), | ||
399 | "I" (sizeof(struct pt_regs)), | ||
400 | "J" (offsetof(struct pt_regs, ARM_sp)), | ||
401 | "J" (offsetof(struct pt_regs, ARM_pc)), | ||
402 | "J" (offsetof(struct pt_regs, ARM_cpsr)) | ||
403 | : "memory", "cc"); | ||
404 | } | ||
405 | |||
406 | int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) | ||
407 | { | ||
408 | struct kprobe_ctlblk *kcb = get_kprobe_ctlblk(); | ||
409 | long stack_addr = kcb->jprobe_saved_regs.ARM_sp; | ||
410 | long orig_sp = regs->ARM_sp; | ||
411 | struct jprobe *jp = container_of(p, struct jprobe, kp); | ||
412 | |||
413 | if (regs->ARM_pc == JPROBE_MAGIC_ADDR) { | ||
414 | if (orig_sp != stack_addr) { | ||
415 | struct pt_regs *saved_regs = | ||
416 | (struct pt_regs *)kcb->jprobe_saved_regs.ARM_sp; | ||
417 | printk("current sp %lx does not match saved sp %lx\n", | ||
418 | orig_sp, stack_addr); | ||
419 | printk("Saved registers for jprobe %p\n", jp); | ||
420 | show_regs(saved_regs); | ||
421 | printk("Current registers\n"); | ||
422 | show_regs(regs); | ||
423 | BUG(); | ||
424 | } | ||
425 | *regs = kcb->jprobe_saved_regs; | ||
426 | memcpy((void *)stack_addr, kcb->jprobes_stack, | ||
427 | MIN_STACK_SIZE(stack_addr)); | ||
428 | preempt_enable_no_resched(); | ||
429 | return 1; | ||
430 | } | ||
431 | return 0; | ||
432 | } | ||
433 | |||
434 | static struct undef_hook kprobes_break_hook = { | ||
435 | .instr_mask = 0xffffffff, | ||
436 | .instr_val = KPROBE_BREAKPOINT_INSTRUCTION, | ||
437 | .cpsr_mask = MODE_MASK, | ||
438 | .cpsr_val = SVC_MODE, | ||
439 | .fn = kprobe_trap_handler, | ||
440 | }; | ||
441 | |||
442 | int __init arch_init_kprobes() | ||
443 | { | ||
444 | arm_kprobe_decode_init(); | ||
445 | register_undef_hook(&kprobes_break_hook); | ||
446 | return 0; | ||
447 | } | ||
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index e59b5b84168d..b5867eca1d0b 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -325,7 +325,9 @@ void timer_tick(void) | |||
325 | profile_tick(CPU_PROFILING); | 325 | profile_tick(CPU_PROFILING); |
326 | do_leds(); | 326 | do_leds(); |
327 | do_set_rtc(); | 327 | do_set_rtc(); |
328 | write_seqlock(&xtime_lock); | ||
328 | do_timer(1); | 329 | do_timer(1); |
330 | write_sequnlock(&xtime_lock); | ||
329 | #ifndef CONFIG_SMP | 331 | #ifndef CONFIG_SMP |
330 | update_process_times(user_mode(get_irq_regs())); | 332 | update_process_times(user_mode(get_irq_regs())); |
331 | #endif | 333 | #endif |
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index c34db4e868fa..5595fdd75e82 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/kallsyms.h> | 19 | #include <linux/kallsyms.h> |
20 | #include <linux/delay.h> | 20 | #include <linux/delay.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/kprobes.h> | ||
22 | 23 | ||
23 | #include <asm/atomic.h> | 24 | #include <asm/atomic.h> |
24 | #include <asm/cacheflush.h> | 25 | #include <asm/cacheflush.h> |
@@ -46,15 +47,6 @@ __setup("user_debug=", user_debug_setup); | |||
46 | 47 | ||
47 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top); | 48 | static void dump_mem(const char *str, unsigned long bottom, unsigned long top); |
48 | 49 | ||
49 | static inline int in_exception_text(unsigned long ptr) | ||
50 | { | ||
51 | extern char __exception_text_start[]; | ||
52 | extern char __exception_text_end[]; | ||
53 | |||
54 | return ptr >= (unsigned long)&__exception_text_start && | ||
55 | ptr < (unsigned long)&__exception_text_end; | ||
56 | } | ||
57 | |||
58 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) | 50 | void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) |
59 | { | 51 | { |
60 | #ifdef CONFIG_KALLSYMS | 52 | #ifdef CONFIG_KALLSYMS |
@@ -322,6 +314,17 @@ asmlinkage void __exception do_undefinstr(struct pt_regs *regs) | |||
322 | get_user(instr, (u32 __user *)pc); | 314 | get_user(instr, (u32 __user *)pc); |
323 | } | 315 | } |
324 | 316 | ||
317 | #ifdef CONFIG_KPROBES | ||
318 | /* | ||
319 | * It is possible to have recursive kprobes, so we can't call | ||
320 | * the kprobe trap handler with the undef_lock held. | ||
321 | */ | ||
322 | if (instr == KPROBE_BREAKPOINT_INSTRUCTION && !user_mode(regs)) { | ||
323 | kprobe_trap_handler(regs, instr); | ||
324 | return; | ||
325 | } | ||
326 | #endif | ||
327 | |||
325 | spin_lock_irqsave(&undef_lock, flags); | 328 | spin_lock_irqsave(&undef_lock, flags); |
326 | list_for_each_entry(hook, &undef_hook, node) { | 329 | list_for_each_entry(hook, &undef_hook, node) { |
327 | if ((instr & hook->instr_mask) == hook->instr_val && | 330 | if ((instr & hook->instr_mask) == hook->instr_val && |
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S index 5ff5406666b4..30f732c7fdb5 100644 --- a/arch/arm/kernel/vmlinux.lds.S +++ b/arch/arm/kernel/vmlinux.lds.S | |||
@@ -94,6 +94,7 @@ SECTIONS | |||
94 | TEXT_TEXT | 94 | TEXT_TEXT |
95 | SCHED_TEXT | 95 | SCHED_TEXT |
96 | LOCK_TEXT | 96 | LOCK_TEXT |
97 | KPROBES_TEXT | ||
97 | #ifdef CONFIG_MMU | 98 | #ifdef CONFIG_MMU |
98 | *(.fixup) | 99 | *(.fixup) |
99 | #endif | 100 | #endif |
diff --git a/arch/arm/mach-aaec2000/core.c b/arch/arm/mach-aaec2000/core.c index 0446ef2f5bd6..b016be2b0e35 100644 --- a/arch/arm/mach-aaec2000/core.c +++ b/arch/arm/mach-aaec2000/core.c | |||
@@ -130,13 +130,9 @@ static irqreturn_t | |||
130 | aaec2000_timer_interrupt(int irq, void *dev_id) | 130 | aaec2000_timer_interrupt(int irq, void *dev_id) |
131 | { | 131 | { |
132 | /* TODO: Check timer accuracy */ | 132 | /* TODO: Check timer accuracy */ |
133 | write_seqlock(&xtime_lock); | ||
134 | |||
135 | timer_tick(); | 133 | timer_tick(); |
136 | TIMER1_CLEAR = 1; | 134 | TIMER1_CLEAR = 1; |
137 | 135 | ||
138 | write_sequnlock(&xtime_lock); | ||
139 | |||
140 | return IRQ_HANDLED; | 136 | return IRQ_HANDLED; |
141 | } | 137 | } |
142 | 138 | ||
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 05a9f8a1b45e..5b0422cdde76 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig | |||
@@ -22,6 +22,9 @@ config ARCH_AT91SAM9263 | |||
22 | config ARCH_AT91SAM9RL | 22 | config ARCH_AT91SAM9RL |
23 | bool "AT91SAM9RL" | 23 | bool "AT91SAM9RL" |
24 | 24 | ||
25 | config ARCH_AT91CAP9 | ||
26 | bool "AT91CAP9" | ||
27 | |||
25 | config ARCH_AT91X40 | 28 | config ARCH_AT91X40 |
26 | bool "AT91x40" | 29 | bool "AT91x40" |
27 | 30 | ||
@@ -178,6 +181,21 @@ endif | |||
178 | 181 | ||
179 | # ---------------------------------------------------------- | 182 | # ---------------------------------------------------------- |
180 | 183 | ||
184 | if ARCH_AT91CAP9 | ||
185 | |||
186 | comment "AT91CAP9 Board Type" | ||
187 | |||
188 | config MACH_AT91CAP9ADK | ||
189 | bool "Atmel AT91CAP9A-DK Evaluation Kit" | ||
190 | depends on ARCH_AT91CAP9 | ||
191 | help | ||
192 | Select this if you are using Atmel's AT91CAP9A-DK Evaluation Kit. | ||
193 | <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4138> | ||
194 | |||
195 | endif | ||
196 | |||
197 | # ---------------------------------------------------------- | ||
198 | |||
181 | if ARCH_AT91X40 | 199 | if ARCH_AT91X40 |
182 | 200 | ||
183 | comment "AT91X40 Board Type" | 201 | comment "AT91X40 Board Type" |
@@ -198,13 +216,13 @@ comment "AT91 Board Options" | |||
198 | 216 | ||
199 | config MTD_AT91_DATAFLASH_CARD | 217 | config MTD_AT91_DATAFLASH_CARD |
200 | bool "Enable DataFlash Card support" | 218 | bool "Enable DataFlash Card support" |
201 | depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK) | 219 | depends on (ARCH_AT91RM9200DK || MACH_AT91RM9200EK || MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) |
202 | help | 220 | help |
203 | Enable support for the DataFlash card. | 221 | Enable support for the DataFlash card. |
204 | 222 | ||
205 | config MTD_NAND_AT91_BUSWIDTH_16 | 223 | config MTD_NAND_AT91_BUSWIDTH_16 |
206 | bool "Enable 16-bit data bus interface to NAND flash" | 224 | bool "Enable 16-bit data bus interface to NAND flash" |
207 | depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK) | 225 | depends on (MACH_AT91SAM9260EK || MACH_AT91SAM9261EK || MACH_AT91SAM9263EK || MACH_AT91CAP9ADK) |
208 | help | 226 | help |
209 | On AT91SAM926x boards both types of NAND flash can be present | 227 | On AT91SAM926x boards both types of NAND flash can be present |
210 | (8 and 16 bit data bus width). | 228 | (8 and 16 bit data bus width). |
@@ -219,6 +237,22 @@ config AT91_PROGRAMMABLE_CLOCKS | |||
219 | Select this if you need to program one or more of the PCK0..PCK3 | 237 | Select this if you need to program one or more of the PCK0..PCK3 |
220 | programmable clock outputs. | 238 | programmable clock outputs. |
221 | 239 | ||
240 | config AT91_TIMER_HZ | ||
241 | int "Kernel HZ (jiffies per second)" | ||
242 | range 32 1024 | ||
243 | depends on ARCH_AT91 | ||
244 | default "128" if ARCH_AT91RM9200 | ||
245 | default "100" | ||
246 | help | ||
247 | On AT91rm9200 chips where you're using a system clock derived | ||
248 | from the 32768 Hz hardware clock, this tick rate should divide | ||
249 | it exactly: use a power-of-two value, such as 128 or 256, to | ||
250 | reduce timing errors caused by rounding. | ||
251 | |||
252 | On AT91sam926x chips, or otherwise when using a higher precision | ||
253 | system clock (of at least several MHz), rounding is less of a | ||
254 | problem so it can be safer to use a decimal values like 100. | ||
255 | |||
222 | endmenu | 256 | endmenu |
223 | 257 | ||
224 | endif | 258 | endif |
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a21f08c64ea6..bf5f293dccf8 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile | |||
@@ -8,7 +8,6 @@ obj-n := | |||
8 | obj- := | 8 | obj- := |
9 | 9 | ||
10 | obj-$(CONFIG_AT91_PMC_UNIT) += clock.o | 10 | obj-$(CONFIG_AT91_PMC_UNIT) += clock.o |
11 | obj-$(CONFIG_PM) += pm.o | ||
12 | 11 | ||
13 | # CPU-specific support | 12 | # CPU-specific support |
14 | obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o | 13 | obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o |
@@ -16,6 +15,7 @@ obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_d | |||
16 | obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o | 15 | obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o |
17 | obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o | 16 | obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o |
18 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o | 17 | obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o |
18 | obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o | ||
19 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o | 19 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o |
20 | 20 | ||
21 | # AT91RM9200 board-specific support | 21 | # AT91RM9200 board-specific support |
@@ -29,7 +29,6 @@ obj-$(CONFIG_MACH_KB9200) += board-kb9202.o | |||
29 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o | 29 | obj-$(CONFIG_MACH_ATEB9200) += board-eb9200.o |
30 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o | 30 | obj-$(CONFIG_MACH_KAFA) += board-kafa.o |
31 | obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o | 31 | obj-$(CONFIG_MACH_PICOTUX2XX) += board-picotux200.o |
32 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o | ||
33 | 32 | ||
34 | # AT91SAM9260 board-specific support | 33 | # AT91SAM9260 board-specific support |
35 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o | 34 | obj-$(CONFIG_MACH_AT91SAM9260EK) += board-sam9260ek.o |
@@ -43,19 +42,17 @@ obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o | |||
43 | # AT91SAM9RL board-specific support | 42 | # AT91SAM9RL board-specific support |
44 | obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o | 43 | obj-$(CONFIG_MACH_AT91SAM9RLEK) += board-sam9rlek.o |
45 | 44 | ||
46 | # LEDs support | 45 | # AT91CAP9 board-specific support |
47 | led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o | 46 | obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o |
48 | led-$(CONFIG_MACH_AT91RM9200EK) += leds.o | ||
49 | led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o | ||
50 | led-$(CONFIG_MACH_CSB337) += leds.o | ||
51 | led-$(CONFIG_MACH_CSB637) += leds.o | ||
52 | led-$(CONFIG_MACH_KB9200) += leds.o | ||
53 | led-$(CONFIG_MACH_KAFA) += leds.o | ||
54 | obj-$(CONFIG_LEDS) += $(led-y) | ||
55 | 47 | ||
56 | # VGA support | 48 | # AT91X40 board-specific support |
57 | #obj-$(CONFIG_FB_S1D13XXX) += ics1523.o | 49 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o |
58 | 50 | ||
51 | # Drivers | ||
52 | obj-y += leds.o | ||
53 | |||
54 | # Power Management | ||
55 | obj-$(CONFIG_PM) += pm.o | ||
59 | 56 | ||
60 | ifeq ($(CONFIG_PM_DEBUG),y) | 57 | ifeq ($(CONFIG_PM_DEBUG),y) |
61 | CFLAGS_pm.o += -DDEBUG | 58 | CFLAGS_pm.o += -DDEBUG |
diff --git a/arch/arm/mach-at91/Makefile.boot b/arch/arm/mach-at91/Makefile.boot index e667dcc7cd34..071a2506a69f 100644 --- a/arch/arm/mach-at91/Makefile.boot +++ b/arch/arm/mach-at91/Makefile.boot | |||
@@ -3,7 +3,12 @@ | |||
3 | # PARAMS_PHYS must be within 4MB of ZRELADDR | 3 | # PARAMS_PHYS must be within 4MB of ZRELADDR |
4 | # INITRD_PHYS must be in RAM | 4 | # INITRD_PHYS must be in RAM |
5 | 5 | ||
6 | ifeq ($(CONFIG_ARCH_AT91CAP9),y) | ||
7 | zreladdr-y := 0x70008000 | ||
8 | params_phys-y := 0x70000100 | ||
9 | initrd_phys-y := 0x70410000 | ||
10 | else | ||
6 | zreladdr-y := 0x20008000 | 11 | zreladdr-y := 0x20008000 |
7 | params_phys-y := 0x20000100 | 12 | params_phys-y := 0x20000100 |
8 | initrd_phys-y := 0x20410000 | 13 | initrd_phys-y := 0x20410000 |
9 | 14 | endif | |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c new file mode 100644 index 000000000000..48d27d8000b0 --- /dev/null +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -0,0 +1,365 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at91cap9.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | |||
17 | #include <asm/mach/arch.h> | ||
18 | #include <asm/mach/map.h> | ||
19 | #include <asm/arch/at91cap9.h> | ||
20 | #include <asm/arch/at91_pmc.h> | ||
21 | #include <asm/arch/at91_rstc.h> | ||
22 | |||
23 | #include "generic.h" | ||
24 | #include "clock.h" | ||
25 | |||
26 | static struct map_desc at91cap9_io_desc[] __initdata = { | ||
27 | { | ||
28 | .virtual = AT91_VA_BASE_SYS, | ||
29 | .pfn = __phys_to_pfn(AT91_BASE_SYS), | ||
30 | .length = SZ_16K, | ||
31 | .type = MT_DEVICE, | ||
32 | }, { | ||
33 | .virtual = AT91_IO_VIRT_BASE - AT91CAP9_SRAM_SIZE, | ||
34 | .pfn = __phys_to_pfn(AT91CAP9_SRAM_BASE), | ||
35 | .length = AT91CAP9_SRAM_SIZE, | ||
36 | .type = MT_DEVICE, | ||
37 | }, | ||
38 | }; | ||
39 | |||
40 | /* -------------------------------------------------------------------- | ||
41 | * Clocks | ||
42 | * -------------------------------------------------------------------- */ | ||
43 | |||
44 | /* | ||
45 | * The peripheral clocks. | ||
46 | */ | ||
47 | static struct clk pioABCD_clk = { | ||
48 | .name = "pioABCD_clk", | ||
49 | .pmc_mask = 1 << AT91CAP9_ID_PIOABCD, | ||
50 | .type = CLK_TYPE_PERIPHERAL, | ||
51 | }; | ||
52 | static struct clk mpb0_clk = { | ||
53 | .name = "mpb0_clk", | ||
54 | .pmc_mask = 1 << AT91CAP9_ID_MPB0, | ||
55 | .type = CLK_TYPE_PERIPHERAL, | ||
56 | }; | ||
57 | static struct clk mpb1_clk = { | ||
58 | .name = "mpb1_clk", | ||
59 | .pmc_mask = 1 << AT91CAP9_ID_MPB1, | ||
60 | .type = CLK_TYPE_PERIPHERAL, | ||
61 | }; | ||
62 | static struct clk mpb2_clk = { | ||
63 | .name = "mpb2_clk", | ||
64 | .pmc_mask = 1 << AT91CAP9_ID_MPB2, | ||
65 | .type = CLK_TYPE_PERIPHERAL, | ||
66 | }; | ||
67 | static struct clk mpb3_clk = { | ||
68 | .name = "mpb3_clk", | ||
69 | .pmc_mask = 1 << AT91CAP9_ID_MPB3, | ||
70 | .type = CLK_TYPE_PERIPHERAL, | ||
71 | }; | ||
72 | static struct clk mpb4_clk = { | ||
73 | .name = "mpb4_clk", | ||
74 | .pmc_mask = 1 << AT91CAP9_ID_MPB4, | ||
75 | .type = CLK_TYPE_PERIPHERAL, | ||
76 | }; | ||
77 | static struct clk usart0_clk = { | ||
78 | .name = "usart0_clk", | ||
79 | .pmc_mask = 1 << AT91CAP9_ID_US0, | ||
80 | .type = CLK_TYPE_PERIPHERAL, | ||
81 | }; | ||
82 | static struct clk usart1_clk = { | ||
83 | .name = "usart1_clk", | ||
84 | .pmc_mask = 1 << AT91CAP9_ID_US1, | ||
85 | .type = CLK_TYPE_PERIPHERAL, | ||
86 | }; | ||
87 | static struct clk usart2_clk = { | ||
88 | .name = "usart2_clk", | ||
89 | .pmc_mask = 1 << AT91CAP9_ID_US2, | ||
90 | .type = CLK_TYPE_PERIPHERAL, | ||
91 | }; | ||
92 | static struct clk mmc0_clk = { | ||
93 | .name = "mci0_clk", | ||
94 | .pmc_mask = 1 << AT91CAP9_ID_MCI0, | ||
95 | .type = CLK_TYPE_PERIPHERAL, | ||
96 | }; | ||
97 | static struct clk mmc1_clk = { | ||
98 | .name = "mci1_clk", | ||
99 | .pmc_mask = 1 << AT91CAP9_ID_MCI1, | ||
100 | .type = CLK_TYPE_PERIPHERAL, | ||
101 | }; | ||
102 | static struct clk can_clk = { | ||
103 | .name = "can_clk", | ||
104 | .pmc_mask = 1 << AT91CAP9_ID_CAN, | ||
105 | .type = CLK_TYPE_PERIPHERAL, | ||
106 | }; | ||
107 | static struct clk twi_clk = { | ||
108 | .name = "twi_clk", | ||
109 | .pmc_mask = 1 << AT91CAP9_ID_TWI, | ||
110 | .type = CLK_TYPE_PERIPHERAL, | ||
111 | }; | ||
112 | static struct clk spi0_clk = { | ||
113 | .name = "spi0_clk", | ||
114 | .pmc_mask = 1 << AT91CAP9_ID_SPI0, | ||
115 | .type = CLK_TYPE_PERIPHERAL, | ||
116 | }; | ||
117 | static struct clk spi1_clk = { | ||
118 | .name = "spi1_clk", | ||
119 | .pmc_mask = 1 << AT91CAP9_ID_SPI1, | ||
120 | .type = CLK_TYPE_PERIPHERAL, | ||
121 | }; | ||
122 | static struct clk ssc0_clk = { | ||
123 | .name = "ssc0_clk", | ||
124 | .pmc_mask = 1 << AT91CAP9_ID_SSC0, | ||
125 | .type = CLK_TYPE_PERIPHERAL, | ||
126 | }; | ||
127 | static struct clk ssc1_clk = { | ||
128 | .name = "ssc1_clk", | ||
129 | .pmc_mask = 1 << AT91CAP9_ID_SSC1, | ||
130 | .type = CLK_TYPE_PERIPHERAL, | ||
131 | }; | ||
132 | static struct clk ac97_clk = { | ||
133 | .name = "ac97_clk", | ||
134 | .pmc_mask = 1 << AT91CAP9_ID_AC97C, | ||
135 | .type = CLK_TYPE_PERIPHERAL, | ||
136 | }; | ||
137 | static struct clk tcb_clk = { | ||
138 | .name = "tcb_clk", | ||
139 | .pmc_mask = 1 << AT91CAP9_ID_TCB, | ||
140 | .type = CLK_TYPE_PERIPHERAL, | ||
141 | }; | ||
142 | static struct clk pwmc_clk = { | ||
143 | .name = "pwmc_clk", | ||
144 | .pmc_mask = 1 << AT91CAP9_ID_PWMC, | ||
145 | .type = CLK_TYPE_PERIPHERAL, | ||
146 | }; | ||
147 | static struct clk macb_clk = { | ||
148 | .name = "macb_clk", | ||
149 | .pmc_mask = 1 << AT91CAP9_ID_EMAC, | ||
150 | .type = CLK_TYPE_PERIPHERAL, | ||
151 | }; | ||
152 | static struct clk aestdes_clk = { | ||
153 | .name = "aestdes_clk", | ||
154 | .pmc_mask = 1 << AT91CAP9_ID_AESTDES, | ||
155 | .type = CLK_TYPE_PERIPHERAL, | ||
156 | }; | ||
157 | static struct clk adc_clk = { | ||
158 | .name = "adc_clk", | ||
159 | .pmc_mask = 1 << AT91CAP9_ID_ADC, | ||
160 | .type = CLK_TYPE_PERIPHERAL, | ||
161 | }; | ||
162 | static struct clk isi_clk = { | ||
163 | .name = "isi_clk", | ||
164 | .pmc_mask = 1 << AT91CAP9_ID_ISI, | ||
165 | .type = CLK_TYPE_PERIPHERAL, | ||
166 | }; | ||
167 | static struct clk lcdc_clk = { | ||
168 | .name = "lcdc_clk", | ||
169 | .pmc_mask = 1 << AT91CAP9_ID_LCDC, | ||
170 | .type = CLK_TYPE_PERIPHERAL, | ||
171 | }; | ||
172 | static struct clk dma_clk = { | ||
173 | .name = "dma_clk", | ||
174 | .pmc_mask = 1 << AT91CAP9_ID_DMA, | ||
175 | .type = CLK_TYPE_PERIPHERAL, | ||
176 | }; | ||
177 | static struct clk udphs_clk = { | ||
178 | .name = "udphs_clk", | ||
179 | .pmc_mask = 1 << AT91CAP9_ID_UDPHS, | ||
180 | .type = CLK_TYPE_PERIPHERAL, | ||
181 | }; | ||
182 | static struct clk ohci_clk = { | ||
183 | .name = "ohci_clk", | ||
184 | .pmc_mask = 1 << AT91CAP9_ID_UHP, | ||
185 | .type = CLK_TYPE_PERIPHERAL, | ||
186 | }; | ||
187 | |||
188 | static struct clk *periph_clocks[] __initdata = { | ||
189 | &pioABCD_clk, | ||
190 | &mpb0_clk, | ||
191 | &mpb1_clk, | ||
192 | &mpb2_clk, | ||
193 | &mpb3_clk, | ||
194 | &mpb4_clk, | ||
195 | &usart0_clk, | ||
196 | &usart1_clk, | ||
197 | &usart2_clk, | ||
198 | &mmc0_clk, | ||
199 | &mmc1_clk, | ||
200 | &can_clk, | ||
201 | &twi_clk, | ||
202 | &spi0_clk, | ||
203 | &spi1_clk, | ||
204 | &ssc0_clk, | ||
205 | &ssc1_clk, | ||
206 | &ac97_clk, | ||
207 | &tcb_clk, | ||
208 | &pwmc_clk, | ||
209 | &macb_clk, | ||
210 | &aestdes_clk, | ||
211 | &adc_clk, | ||
212 | &isi_clk, | ||
213 | &lcdc_clk, | ||
214 | &dma_clk, | ||
215 | &udphs_clk, | ||
216 | &ohci_clk, | ||
217 | // irq0 .. irq1 | ||
218 | }; | ||
219 | |||
220 | /* | ||
221 | * The four programmable clocks. | ||
222 | * You must configure pin multiplexing to bring these signals out. | ||
223 | */ | ||
224 | static struct clk pck0 = { | ||
225 | .name = "pck0", | ||
226 | .pmc_mask = AT91_PMC_PCK0, | ||
227 | .type = CLK_TYPE_PROGRAMMABLE, | ||
228 | .id = 0, | ||
229 | }; | ||
230 | static struct clk pck1 = { | ||
231 | .name = "pck1", | ||
232 | .pmc_mask = AT91_PMC_PCK1, | ||
233 | .type = CLK_TYPE_PROGRAMMABLE, | ||
234 | .id = 1, | ||
235 | }; | ||
236 | static struct clk pck2 = { | ||
237 | .name = "pck2", | ||
238 | .pmc_mask = AT91_PMC_PCK2, | ||
239 | .type = CLK_TYPE_PROGRAMMABLE, | ||
240 | .id = 2, | ||
241 | }; | ||
242 | static struct clk pck3 = { | ||
243 | .name = "pck3", | ||
244 | .pmc_mask = AT91_PMC_PCK3, | ||
245 | .type = CLK_TYPE_PROGRAMMABLE, | ||
246 | .id = 3, | ||
247 | }; | ||
248 | |||
249 | static void __init at91cap9_register_clocks(void) | ||
250 | { | ||
251 | int i; | ||
252 | |||
253 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | ||
254 | clk_register(periph_clocks[i]); | ||
255 | |||
256 | clk_register(&pck0); | ||
257 | clk_register(&pck1); | ||
258 | clk_register(&pck2); | ||
259 | clk_register(&pck3); | ||
260 | } | ||
261 | |||
262 | /* -------------------------------------------------------------------- | ||
263 | * GPIO | ||
264 | * -------------------------------------------------------------------- */ | ||
265 | |||
266 | static struct at91_gpio_bank at91cap9_gpio[] = { | ||
267 | { | ||
268 | .id = AT91CAP9_ID_PIOABCD, | ||
269 | .offset = AT91_PIOA, | ||
270 | .clock = &pioABCD_clk, | ||
271 | }, { | ||
272 | .id = AT91CAP9_ID_PIOABCD, | ||
273 | .offset = AT91_PIOB, | ||
274 | .clock = &pioABCD_clk, | ||
275 | }, { | ||
276 | .id = AT91CAP9_ID_PIOABCD, | ||
277 | .offset = AT91_PIOC, | ||
278 | .clock = &pioABCD_clk, | ||
279 | }, { | ||
280 | .id = AT91CAP9_ID_PIOABCD, | ||
281 | .offset = AT91_PIOD, | ||
282 | .clock = &pioABCD_clk, | ||
283 | } | ||
284 | }; | ||
285 | |||
286 | static void at91cap9_reset(void) | ||
287 | { | ||
288 | at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | ||
289 | } | ||
290 | |||
291 | /* -------------------------------------------------------------------- | ||
292 | * AT91CAP9 processor initialization | ||
293 | * -------------------------------------------------------------------- */ | ||
294 | |||
295 | void __init at91cap9_initialize(unsigned long main_clock) | ||
296 | { | ||
297 | /* Map peripherals */ | ||
298 | iotable_init(at91cap9_io_desc, ARRAY_SIZE(at91cap9_io_desc)); | ||
299 | |||
300 | at91_arch_reset = at91cap9_reset; | ||
301 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | ||
302 | |||
303 | /* Init clock subsystem */ | ||
304 | at91_clock_init(main_clock); | ||
305 | |||
306 | /* Register the processor-specific clocks */ | ||
307 | at91cap9_register_clocks(); | ||
308 | |||
309 | /* Register GPIO subsystem */ | ||
310 | at91_gpio_init(at91cap9_gpio, 4); | ||
311 | } | ||
312 | |||
313 | /* -------------------------------------------------------------------- | ||
314 | * Interrupt initialization | ||
315 | * -------------------------------------------------------------------- */ | ||
316 | |||
317 | /* | ||
318 | * The default interrupt priority levels (0 = lowest, 7 = highest). | ||
319 | */ | ||
320 | static unsigned int at91cap9_default_irq_priority[NR_AIC_IRQS] __initdata = { | ||
321 | 7, /* Advanced Interrupt Controller (FIQ) */ | ||
322 | 7, /* System Peripherals */ | ||
323 | 1, /* Parallel IO Controller A, B, C and D */ | ||
324 | 0, /* MP Block Peripheral 0 */ | ||
325 | 0, /* MP Block Peripheral 1 */ | ||
326 | 0, /* MP Block Peripheral 2 */ | ||
327 | 0, /* MP Block Peripheral 3 */ | ||
328 | 0, /* MP Block Peripheral 4 */ | ||
329 | 5, /* USART 0 */ | ||
330 | 5, /* USART 1 */ | ||
331 | 5, /* USART 2 */ | ||
332 | 0, /* Multimedia Card Interface 0 */ | ||
333 | 0, /* Multimedia Card Interface 1 */ | ||
334 | 3, /* CAN */ | ||
335 | 6, /* Two-Wire Interface */ | ||
336 | 5, /* Serial Peripheral Interface 0 */ | ||
337 | 5, /* Serial Peripheral Interface 1 */ | ||
338 | 4, /* Serial Synchronous Controller 0 */ | ||
339 | 4, /* Serial Synchronous Controller 1 */ | ||
340 | 5, /* AC97 Controller */ | ||
341 | 0, /* Timer Counter 0, 1 and 2 */ | ||
342 | 0, /* Pulse Width Modulation Controller */ | ||
343 | 3, /* Ethernet */ | ||
344 | 0, /* Advanced Encryption Standard, Triple DES*/ | ||
345 | 0, /* Analog-to-Digital Converter */ | ||
346 | 0, /* Image Sensor Interface */ | ||
347 | 3, /* LCD Controller */ | ||
348 | 0, /* DMA Controller */ | ||
349 | 2, /* USB Device Port */ | ||
350 | 2, /* USB Host port */ | ||
351 | 0, /* Advanced Interrupt Controller (IRQ0) */ | ||
352 | 0, /* Advanced Interrupt Controller (IRQ1) */ | ||
353 | }; | ||
354 | |||
355 | void __init at91cap9_init_interrupts(unsigned int priority[NR_AIC_IRQS]) | ||
356 | { | ||
357 | if (!priority) | ||
358 | priority = at91cap9_default_irq_priority; | ||
359 | |||
360 | /* Initialize the AIC interrupt controller */ | ||
361 | at91_aic_init(priority); | ||
362 | |||
363 | /* Enable GPIO interrupts */ | ||
364 | at91_gpio_irq_setup(); | ||
365 | } | ||
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c new file mode 100644 index 000000000000..c50fad9cd143 --- /dev/null +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -0,0 +1,1066 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/at91cap9_devices.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2007 Atmel Corporation. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | #include <asm/mach/arch.h> | ||
15 | #include <asm/mach/map.h> | ||
16 | |||
17 | #include <linux/dma-mapping.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/mtd/physmap.h> | ||
20 | |||
21 | #include <video/atmel_lcdc.h> | ||
22 | |||
23 | #include <asm/arch/board.h> | ||
24 | #include <asm/arch/gpio.h> | ||
25 | #include <asm/arch/at91cap9.h> | ||
26 | #include <asm/arch/at91sam926x_mc.h> | ||
27 | #include <asm/arch/at91cap9_matrix.h> | ||
28 | |||
29 | #include "generic.h" | ||
30 | |||
31 | |||
32 | /* -------------------------------------------------------------------- | ||
33 | * USB Host | ||
34 | * -------------------------------------------------------------------- */ | ||
35 | |||
36 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | ||
37 | static u64 ohci_dmamask = DMA_BIT_MASK(32); | ||
38 | static struct at91_usbh_data usbh_data; | ||
39 | |||
40 | static struct resource usbh_resources[] = { | ||
41 | [0] = { | ||
42 | .start = AT91CAP9_UHP_BASE, | ||
43 | .end = AT91CAP9_UHP_BASE + SZ_1M - 1, | ||
44 | .flags = IORESOURCE_MEM, | ||
45 | }, | ||
46 | [1] = { | ||
47 | .start = AT91CAP9_ID_UHP, | ||
48 | .end = AT91CAP9_ID_UHP, | ||
49 | .flags = IORESOURCE_IRQ, | ||
50 | }, | ||
51 | }; | ||
52 | |||
53 | static struct platform_device at91_usbh_device = { | ||
54 | .name = "at91_ohci", | ||
55 | .id = -1, | ||
56 | .dev = { | ||
57 | .dma_mask = &ohci_dmamask, | ||
58 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
59 | .platform_data = &usbh_data, | ||
60 | }, | ||
61 | .resource = usbh_resources, | ||
62 | .num_resources = ARRAY_SIZE(usbh_resources), | ||
63 | }; | ||
64 | |||
65 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | ||
66 | { | ||
67 | int i; | ||
68 | |||
69 | if (!data) | ||
70 | return; | ||
71 | |||
72 | /* Enable VBus control for UHP ports */ | ||
73 | for (i = 0; i < data->ports; i++) { | ||
74 | if (data->vbus_pin[i]) | ||
75 | at91_set_gpio_output(data->vbus_pin[i], 0); | ||
76 | } | ||
77 | |||
78 | usbh_data = *data; | ||
79 | platform_device_register(&at91_usbh_device); | ||
80 | } | ||
81 | #else | ||
82 | void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | ||
83 | #endif | ||
84 | |||
85 | |||
86 | /* -------------------------------------------------------------------- | ||
87 | * Ethernet | ||
88 | * -------------------------------------------------------------------- */ | ||
89 | |||
90 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | ||
91 | static u64 eth_dmamask = DMA_BIT_MASK(32); | ||
92 | static struct at91_eth_data eth_data; | ||
93 | |||
94 | static struct resource eth_resources[] = { | ||
95 | [0] = { | ||
96 | .start = AT91CAP9_BASE_EMAC, | ||
97 | .end = AT91CAP9_BASE_EMAC + SZ_16K - 1, | ||
98 | .flags = IORESOURCE_MEM, | ||
99 | }, | ||
100 | [1] = { | ||
101 | .start = AT91CAP9_ID_EMAC, | ||
102 | .end = AT91CAP9_ID_EMAC, | ||
103 | .flags = IORESOURCE_IRQ, | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | static struct platform_device at91cap9_eth_device = { | ||
108 | .name = "macb", | ||
109 | .id = -1, | ||
110 | .dev = { | ||
111 | .dma_mask = ð_dmamask, | ||
112 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
113 | .platform_data = ð_data, | ||
114 | }, | ||
115 | .resource = eth_resources, | ||
116 | .num_resources = ARRAY_SIZE(eth_resources), | ||
117 | }; | ||
118 | |||
119 | void __init at91_add_device_eth(struct at91_eth_data *data) | ||
120 | { | ||
121 | if (!data) | ||
122 | return; | ||
123 | |||
124 | if (data->phy_irq_pin) { | ||
125 | at91_set_gpio_input(data->phy_irq_pin, 0); | ||
126 | at91_set_deglitch(data->phy_irq_pin, 1); | ||
127 | } | ||
128 | |||
129 | /* Pins used for MII and RMII */ | ||
130 | at91_set_A_periph(AT91_PIN_PB21, 0); /* ETXCK_EREFCK */ | ||
131 | at91_set_A_periph(AT91_PIN_PB22, 0); /* ERXDV */ | ||
132 | at91_set_A_periph(AT91_PIN_PB25, 0); /* ERX0 */ | ||
133 | at91_set_A_periph(AT91_PIN_PB26, 0); /* ERX1 */ | ||
134 | at91_set_A_periph(AT91_PIN_PB27, 0); /* ERXER */ | ||
135 | at91_set_A_periph(AT91_PIN_PB28, 0); /* ETXEN */ | ||
136 | at91_set_A_periph(AT91_PIN_PB23, 0); /* ETX0 */ | ||
137 | at91_set_A_periph(AT91_PIN_PB24, 0); /* ETX1 */ | ||
138 | at91_set_A_periph(AT91_PIN_PB30, 0); /* EMDIO */ | ||
139 | at91_set_A_periph(AT91_PIN_PB29, 0); /* EMDC */ | ||
140 | |||
141 | if (!data->is_rmii) { | ||
142 | at91_set_B_periph(AT91_PIN_PC25, 0); /* ECRS */ | ||
143 | at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ | ||
144 | at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ | ||
145 | at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ | ||
146 | at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ | ||
147 | at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ | ||
148 | at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ | ||
149 | at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ | ||
150 | } | ||
151 | |||
152 | eth_data = *data; | ||
153 | platform_device_register(&at91cap9_eth_device); | ||
154 | } | ||
155 | #else | ||
156 | void __init at91_add_device_eth(struct at91_eth_data *data) {} | ||
157 | #endif | ||
158 | |||
159 | |||
160 | /* -------------------------------------------------------------------- | ||
161 | * MMC / SD | ||
162 | * -------------------------------------------------------------------- */ | ||
163 | |||
164 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | ||
165 | static u64 mmc_dmamask = DMA_BIT_MASK(32); | ||
166 | static struct at91_mmc_data mmc0_data, mmc1_data; | ||
167 | |||
168 | static struct resource mmc0_resources[] = { | ||
169 | [0] = { | ||
170 | .start = AT91CAP9_BASE_MCI0, | ||
171 | .end = AT91CAP9_BASE_MCI0 + SZ_16K - 1, | ||
172 | .flags = IORESOURCE_MEM, | ||
173 | }, | ||
174 | [1] = { | ||
175 | .start = AT91CAP9_ID_MCI0, | ||
176 | .end = AT91CAP9_ID_MCI0, | ||
177 | .flags = IORESOURCE_IRQ, | ||
178 | }, | ||
179 | }; | ||
180 | |||
181 | static struct platform_device at91cap9_mmc0_device = { | ||
182 | .name = "at91_mci", | ||
183 | .id = 0, | ||
184 | .dev = { | ||
185 | .dma_mask = &mmc_dmamask, | ||
186 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
187 | .platform_data = &mmc0_data, | ||
188 | }, | ||
189 | .resource = mmc0_resources, | ||
190 | .num_resources = ARRAY_SIZE(mmc0_resources), | ||
191 | }; | ||
192 | |||
193 | static struct resource mmc1_resources[] = { | ||
194 | [0] = { | ||
195 | .start = AT91CAP9_BASE_MCI1, | ||
196 | .end = AT91CAP9_BASE_MCI1 + SZ_16K - 1, | ||
197 | .flags = IORESOURCE_MEM, | ||
198 | }, | ||
199 | [1] = { | ||
200 | .start = AT91CAP9_ID_MCI1, | ||
201 | .end = AT91CAP9_ID_MCI1, | ||
202 | .flags = IORESOURCE_IRQ, | ||
203 | }, | ||
204 | }; | ||
205 | |||
206 | static struct platform_device at91cap9_mmc1_device = { | ||
207 | .name = "at91_mci", | ||
208 | .id = 1, | ||
209 | .dev = { | ||
210 | .dma_mask = &mmc_dmamask, | ||
211 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
212 | .platform_data = &mmc1_data, | ||
213 | }, | ||
214 | .resource = mmc1_resources, | ||
215 | .num_resources = ARRAY_SIZE(mmc1_resources), | ||
216 | }; | ||
217 | |||
218 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | ||
219 | { | ||
220 | if (!data) | ||
221 | return; | ||
222 | |||
223 | /* input/irq */ | ||
224 | if (data->det_pin) { | ||
225 | at91_set_gpio_input(data->det_pin, 1); | ||
226 | at91_set_deglitch(data->det_pin, 1); | ||
227 | } | ||
228 | if (data->wp_pin) | ||
229 | at91_set_gpio_input(data->wp_pin, 1); | ||
230 | if (data->vcc_pin) | ||
231 | at91_set_gpio_output(data->vcc_pin, 0); | ||
232 | |||
233 | if (mmc_id == 0) { /* MCI0 */ | ||
234 | /* CLK */ | ||
235 | at91_set_A_periph(AT91_PIN_PA2, 0); | ||
236 | |||
237 | /* CMD */ | ||
238 | at91_set_A_periph(AT91_PIN_PA1, 1); | ||
239 | |||
240 | /* DAT0, maybe DAT1..DAT3 */ | ||
241 | at91_set_A_periph(AT91_PIN_PA0, 1); | ||
242 | if (data->wire4) { | ||
243 | at91_set_A_periph(AT91_PIN_PA3, 1); | ||
244 | at91_set_A_periph(AT91_PIN_PA4, 1); | ||
245 | at91_set_A_periph(AT91_PIN_PA5, 1); | ||
246 | } | ||
247 | |||
248 | mmc0_data = *data; | ||
249 | at91_clock_associate("mci0_clk", &at91cap9_mmc1_device.dev, "mci_clk"); | ||
250 | platform_device_register(&at91cap9_mmc0_device); | ||
251 | } else { /* MCI1 */ | ||
252 | /* CLK */ | ||
253 | at91_set_A_periph(AT91_PIN_PA16, 0); | ||
254 | |||
255 | /* CMD */ | ||
256 | at91_set_A_periph(AT91_PIN_PA17, 1); | ||
257 | |||
258 | /* DAT0, maybe DAT1..DAT3 */ | ||
259 | at91_set_A_periph(AT91_PIN_PA18, 1); | ||
260 | if (data->wire4) { | ||
261 | at91_set_A_periph(AT91_PIN_PA19, 1); | ||
262 | at91_set_A_periph(AT91_PIN_PA20, 1); | ||
263 | at91_set_A_periph(AT91_PIN_PA21, 1); | ||
264 | } | ||
265 | |||
266 | mmc1_data = *data; | ||
267 | at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk"); | ||
268 | platform_device_register(&at91cap9_mmc1_device); | ||
269 | } | ||
270 | } | ||
271 | #else | ||
272 | void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} | ||
273 | #endif | ||
274 | |||
275 | |||
276 | /* -------------------------------------------------------------------- | ||
277 | * NAND / SmartMedia | ||
278 | * -------------------------------------------------------------------- */ | ||
279 | |||
280 | #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE) | ||
281 | static struct at91_nand_data nand_data; | ||
282 | |||
283 | #define NAND_BASE AT91_CHIPSELECT_3 | ||
284 | |||
285 | static struct resource nand_resources[] = { | ||
286 | { | ||
287 | .start = NAND_BASE, | ||
288 | .end = NAND_BASE + SZ_256M - 1, | ||
289 | .flags = IORESOURCE_MEM, | ||
290 | } | ||
291 | }; | ||
292 | |||
293 | static struct platform_device at91cap9_nand_device = { | ||
294 | .name = "at91_nand", | ||
295 | .id = -1, | ||
296 | .dev = { | ||
297 | .platform_data = &nand_data, | ||
298 | }, | ||
299 | .resource = nand_resources, | ||
300 | .num_resources = ARRAY_SIZE(nand_resources), | ||
301 | }; | ||
302 | |||
303 | void __init at91_add_device_nand(struct at91_nand_data *data) | ||
304 | { | ||
305 | unsigned long csa, mode; | ||
306 | |||
307 | if (!data) | ||
308 | return; | ||
309 | |||
310 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
311 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | ||
312 | |||
313 | /* set the bus interface characteristics */ | ||
314 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1) | ||
315 | | AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1)); | ||
316 | |||
317 | at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6) | ||
318 | | AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6)); | ||
319 | |||
320 | at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8)); | ||
321 | |||
322 | if (data->bus_width_16) | ||
323 | mode = AT91_SMC_DBW_16; | ||
324 | else | ||
325 | mode = AT91_SMC_DBW_8; | ||
326 | at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1)); | ||
327 | |||
328 | /* enable pin */ | ||
329 | if (data->enable_pin) | ||
330 | at91_set_gpio_output(data->enable_pin, 1); | ||
331 | |||
332 | /* ready/busy pin */ | ||
333 | if (data->rdy_pin) | ||
334 | at91_set_gpio_input(data->rdy_pin, 1); | ||
335 | |||
336 | /* card detect pin */ | ||
337 | if (data->det_pin) | ||
338 | at91_set_gpio_input(data->det_pin, 1); | ||
339 | |||
340 | nand_data = *data; | ||
341 | platform_device_register(&at91cap9_nand_device); | ||
342 | } | ||
343 | #else | ||
344 | void __init at91_add_device_nand(struct at91_nand_data *data) {} | ||
345 | #endif | ||
346 | |||
347 | /* -------------------------------------------------------------------- | ||
348 | * TWI (i2c) | ||
349 | * -------------------------------------------------------------------- */ | ||
350 | |||
351 | /* | ||
352 | * Prefer the GPIO code since the TWI controller isn't robust | ||
353 | * (gets overruns and underruns under load) and can only issue | ||
354 | * repeated STARTs in one scenario (the driver doesn't yet handle them). | ||
355 | */ | ||
356 | #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | ||
357 | |||
358 | static struct i2c_gpio_platform_data pdata = { | ||
359 | .sda_pin = AT91_PIN_PB4, | ||
360 | .sda_is_open_drain = 1, | ||
361 | .scl_pin = AT91_PIN_PB5, | ||
362 | .scl_is_open_drain = 1, | ||
363 | .udelay = 2, /* ~100 kHz */ | ||
364 | }; | ||
365 | |||
366 | static struct platform_device at91cap9_twi_device = { | ||
367 | .name = "i2c-gpio", | ||
368 | .id = -1, | ||
369 | .dev.platform_data = &pdata, | ||
370 | }; | ||
371 | |||
372 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
373 | { | ||
374 | at91_set_GPIO_periph(AT91_PIN_PB4, 1); /* TWD (SDA) */ | ||
375 | at91_set_multi_drive(AT91_PIN_PB4, 1); | ||
376 | |||
377 | at91_set_GPIO_periph(AT91_PIN_PB5, 1); /* TWCK (SCL) */ | ||
378 | at91_set_multi_drive(AT91_PIN_PB5, 1); | ||
379 | |||
380 | i2c_register_board_info(0, devices, nr_devices); | ||
381 | platform_device_register(&at91cap9_twi_device); | ||
382 | } | ||
383 | |||
384 | #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) | ||
385 | |||
386 | static struct resource twi_resources[] = { | ||
387 | [0] = { | ||
388 | .start = AT91CAP9_BASE_TWI, | ||
389 | .end = AT91CAP9_BASE_TWI + SZ_16K - 1, | ||
390 | .flags = IORESOURCE_MEM, | ||
391 | }, | ||
392 | [1] = { | ||
393 | .start = AT91CAP9_ID_TWI, | ||
394 | .end = AT91CAP9_ID_TWI, | ||
395 | .flags = IORESOURCE_IRQ, | ||
396 | }, | ||
397 | }; | ||
398 | |||
399 | static struct platform_device at91cap9_twi_device = { | ||
400 | .name = "at91_i2c", | ||
401 | .id = -1, | ||
402 | .resource = twi_resources, | ||
403 | .num_resources = ARRAY_SIZE(twi_resources), | ||
404 | }; | ||
405 | |||
406 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | ||
407 | { | ||
408 | /* pins used for TWI interface */ | ||
409 | at91_set_B_periph(AT91_PIN_PB4, 0); /* TWD */ | ||
410 | at91_set_multi_drive(AT91_PIN_PB4, 1); | ||
411 | |||
412 | at91_set_B_periph(AT91_PIN_PB5, 0); /* TWCK */ | ||
413 | at91_set_multi_drive(AT91_PIN_PB5, 1); | ||
414 | |||
415 | i2c_register_board_info(0, devices, nr_devices); | ||
416 | platform_device_register(&at91cap9_twi_device); | ||
417 | } | ||
418 | #else | ||
419 | void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} | ||
420 | #endif | ||
421 | |||
422 | /* -------------------------------------------------------------------- | ||
423 | * SPI | ||
424 | * -------------------------------------------------------------------- */ | ||
425 | |||
426 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | ||
427 | static u64 spi_dmamask = DMA_BIT_MASK(32); | ||
428 | |||
429 | static struct resource spi0_resources[] = { | ||
430 | [0] = { | ||
431 | .start = AT91CAP9_BASE_SPI0, | ||
432 | .end = AT91CAP9_BASE_SPI0 + SZ_16K - 1, | ||
433 | .flags = IORESOURCE_MEM, | ||
434 | }, | ||
435 | [1] = { | ||
436 | .start = AT91CAP9_ID_SPI0, | ||
437 | .end = AT91CAP9_ID_SPI0, | ||
438 | .flags = IORESOURCE_IRQ, | ||
439 | }, | ||
440 | }; | ||
441 | |||
442 | static struct platform_device at91cap9_spi0_device = { | ||
443 | .name = "atmel_spi", | ||
444 | .id = 0, | ||
445 | .dev = { | ||
446 | .dma_mask = &spi_dmamask, | ||
447 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
448 | }, | ||
449 | .resource = spi0_resources, | ||
450 | .num_resources = ARRAY_SIZE(spi0_resources), | ||
451 | }; | ||
452 | |||
453 | static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PD0, AT91_PIN_PD1 }; | ||
454 | |||
455 | static struct resource spi1_resources[] = { | ||
456 | [0] = { | ||
457 | .start = AT91CAP9_BASE_SPI1, | ||
458 | .end = AT91CAP9_BASE_SPI1 + SZ_16K - 1, | ||
459 | .flags = IORESOURCE_MEM, | ||
460 | }, | ||
461 | [1] = { | ||
462 | .start = AT91CAP9_ID_SPI1, | ||
463 | .end = AT91CAP9_ID_SPI1, | ||
464 | .flags = IORESOURCE_IRQ, | ||
465 | }, | ||
466 | }; | ||
467 | |||
468 | static struct platform_device at91cap9_spi1_device = { | ||
469 | .name = "atmel_spi", | ||
470 | .id = 1, | ||
471 | .dev = { | ||
472 | .dma_mask = &spi_dmamask, | ||
473 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
474 | }, | ||
475 | .resource = spi1_resources, | ||
476 | .num_resources = ARRAY_SIZE(spi1_resources), | ||
477 | }; | ||
478 | |||
479 | static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 }; | ||
480 | |||
481 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | ||
482 | { | ||
483 | int i; | ||
484 | unsigned long cs_pin; | ||
485 | short enable_spi0 = 0; | ||
486 | short enable_spi1 = 0; | ||
487 | |||
488 | /* Choose SPI chip-selects */ | ||
489 | for (i = 0; i < nr_devices; i++) { | ||
490 | if (devices[i].controller_data) | ||
491 | cs_pin = (unsigned long) devices[i].controller_data; | ||
492 | else if (devices[i].bus_num == 0) | ||
493 | cs_pin = spi0_standard_cs[devices[i].chip_select]; | ||
494 | else | ||
495 | cs_pin = spi1_standard_cs[devices[i].chip_select]; | ||
496 | |||
497 | if (devices[i].bus_num == 0) | ||
498 | enable_spi0 = 1; | ||
499 | else | ||
500 | enable_spi1 = 1; | ||
501 | |||
502 | /* enable chip-select pin */ | ||
503 | at91_set_gpio_output(cs_pin, 1); | ||
504 | |||
505 | /* pass chip-select pin to driver */ | ||
506 | devices[i].controller_data = (void *) cs_pin; | ||
507 | } | ||
508 | |||
509 | spi_register_board_info(devices, nr_devices); | ||
510 | |||
511 | /* Configure SPI bus(es) */ | ||
512 | if (enable_spi0) { | ||
513 | at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ | ||
514 | at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | ||
515 | at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | ||
516 | |||
517 | at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk"); | ||
518 | platform_device_register(&at91cap9_spi0_device); | ||
519 | } | ||
520 | if (enable_spi1) { | ||
521 | at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */ | ||
522 | at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */ | ||
523 | at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */ | ||
524 | |||
525 | at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk"); | ||
526 | platform_device_register(&at91cap9_spi1_device); | ||
527 | } | ||
528 | } | ||
529 | #else | ||
530 | void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} | ||
531 | #endif | ||
532 | |||
533 | |||
534 | /* -------------------------------------------------------------------- | ||
535 | * RTT | ||
536 | * -------------------------------------------------------------------- */ | ||
537 | |||
538 | static struct platform_device at91cap9_rtt_device = { | ||
539 | .name = "at91_rtt", | ||
540 | .id = -1, | ||
541 | .num_resources = 0, | ||
542 | }; | ||
543 | |||
544 | static void __init at91_add_device_rtt(void) | ||
545 | { | ||
546 | platform_device_register(&at91cap9_rtt_device); | ||
547 | } | ||
548 | |||
549 | |||
550 | /* -------------------------------------------------------------------- | ||
551 | * Watchdog | ||
552 | * -------------------------------------------------------------------- */ | ||
553 | |||
554 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | ||
555 | static struct platform_device at91cap9_wdt_device = { | ||
556 | .name = "at91_wdt", | ||
557 | .id = -1, | ||
558 | .num_resources = 0, | ||
559 | }; | ||
560 | |||
561 | static void __init at91_add_device_watchdog(void) | ||
562 | { | ||
563 | platform_device_register(&at91cap9_wdt_device); | ||
564 | } | ||
565 | #else | ||
566 | static void __init at91_add_device_watchdog(void) {} | ||
567 | #endif | ||
568 | |||
569 | |||
570 | /* -------------------------------------------------------------------- | ||
571 | * AC97 | ||
572 | * -------------------------------------------------------------------- */ | ||
573 | |||
574 | #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) | ||
575 | static u64 ac97_dmamask = DMA_BIT_MASK(32); | ||
576 | static struct atmel_ac97_data ac97_data; | ||
577 | |||
578 | static struct resource ac97_resources[] = { | ||
579 | [0] = { | ||
580 | .start = AT91CAP9_BASE_AC97C, | ||
581 | .end = AT91CAP9_BASE_AC97C + SZ_16K - 1, | ||
582 | .flags = IORESOURCE_MEM, | ||
583 | }, | ||
584 | [1] = { | ||
585 | .start = AT91CAP9_ID_AC97C, | ||
586 | .end = AT91CAP9_ID_AC97C, | ||
587 | .flags = IORESOURCE_IRQ, | ||
588 | }, | ||
589 | }; | ||
590 | |||
591 | static struct platform_device at91cap9_ac97_device = { | ||
592 | .name = "ac97c", | ||
593 | .id = 1, | ||
594 | .dev = { | ||
595 | .dma_mask = &ac97_dmamask, | ||
596 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
597 | .platform_data = &ac97_data, | ||
598 | }, | ||
599 | .resource = ac97_resources, | ||
600 | .num_resources = ARRAY_SIZE(ac97_resources), | ||
601 | }; | ||
602 | |||
603 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) | ||
604 | { | ||
605 | if (!data) | ||
606 | return; | ||
607 | |||
608 | at91_set_A_periph(AT91_PIN_PA6, 0); /* AC97FS */ | ||
609 | at91_set_A_periph(AT91_PIN_PA7, 0); /* AC97CK */ | ||
610 | at91_set_A_periph(AT91_PIN_PA8, 0); /* AC97TX */ | ||
611 | at91_set_A_periph(AT91_PIN_PA9, 0); /* AC97RX */ | ||
612 | |||
613 | /* reset */ | ||
614 | if (data->reset_pin) | ||
615 | at91_set_gpio_output(data->reset_pin, 0); | ||
616 | |||
617 | ac97_data = *data; | ||
618 | platform_device_register(&at91cap9_ac97_device); | ||
619 | } | ||
620 | #else | ||
621 | void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} | ||
622 | #endif | ||
623 | |||
624 | |||
625 | /* -------------------------------------------------------------------- | ||
626 | * LCD Controller | ||
627 | * -------------------------------------------------------------------- */ | ||
628 | |||
629 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | ||
630 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); | ||
631 | static struct atmel_lcdfb_info lcdc_data; | ||
632 | |||
633 | static struct resource lcdc_resources[] = { | ||
634 | [0] = { | ||
635 | .start = AT91CAP9_LCDC_BASE, | ||
636 | .end = AT91CAP9_LCDC_BASE + SZ_4K - 1, | ||
637 | .flags = IORESOURCE_MEM, | ||
638 | }, | ||
639 | [1] = { | ||
640 | .start = AT91CAP9_ID_LCDC, | ||
641 | .end = AT91CAP9_ID_LCDC, | ||
642 | .flags = IORESOURCE_IRQ, | ||
643 | }, | ||
644 | }; | ||
645 | |||
646 | static struct platform_device at91_lcdc_device = { | ||
647 | .name = "atmel_lcdfb", | ||
648 | .id = 0, | ||
649 | .dev = { | ||
650 | .dma_mask = &lcdc_dmamask, | ||
651 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
652 | .platform_data = &lcdc_data, | ||
653 | }, | ||
654 | .resource = lcdc_resources, | ||
655 | .num_resources = ARRAY_SIZE(lcdc_resources), | ||
656 | }; | ||
657 | |||
658 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) | ||
659 | { | ||
660 | if (!data) | ||
661 | return; | ||
662 | |||
663 | at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ | ||
664 | at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ | ||
665 | at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ | ||
666 | at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ | ||
667 | at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ | ||
668 | at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ | ||
669 | at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ | ||
670 | at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ | ||
671 | at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ | ||
672 | at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ | ||
673 | at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ | ||
674 | at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ | ||
675 | at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ | ||
676 | at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ | ||
677 | at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ | ||
678 | at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ | ||
679 | at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ | ||
680 | at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ | ||
681 | at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ | ||
682 | at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ | ||
683 | at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ | ||
684 | at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ | ||
685 | |||
686 | lcdc_data = *data; | ||
687 | platform_device_register(&at91_lcdc_device); | ||
688 | } | ||
689 | #else | ||
690 | void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | ||
691 | #endif | ||
692 | |||
693 | |||
694 | /* -------------------------------------------------------------------- | ||
695 | * SSC -- Synchronous Serial Controller | ||
696 | * -------------------------------------------------------------------- */ | ||
697 | |||
698 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) | ||
699 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); | ||
700 | |||
701 | static struct resource ssc0_resources[] = { | ||
702 | [0] = { | ||
703 | .start = AT91CAP9_BASE_SSC0, | ||
704 | .end = AT91CAP9_BASE_SSC0 + SZ_16K - 1, | ||
705 | .flags = IORESOURCE_MEM, | ||
706 | }, | ||
707 | [1] = { | ||
708 | .start = AT91CAP9_ID_SSC0, | ||
709 | .end = AT91CAP9_ID_SSC0, | ||
710 | .flags = IORESOURCE_IRQ, | ||
711 | }, | ||
712 | }; | ||
713 | |||
714 | static struct platform_device at91cap9_ssc0_device = { | ||
715 | .name = "ssc", | ||
716 | .id = 0, | ||
717 | .dev = { | ||
718 | .dma_mask = &ssc0_dmamask, | ||
719 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
720 | }, | ||
721 | .resource = ssc0_resources, | ||
722 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
723 | }; | ||
724 | |||
725 | static inline void configure_ssc0_pins(unsigned pins) | ||
726 | { | ||
727 | if (pins & ATMEL_SSC_TF) | ||
728 | at91_set_A_periph(AT91_PIN_PB0, 1); | ||
729 | if (pins & ATMEL_SSC_TK) | ||
730 | at91_set_A_periph(AT91_PIN_PB1, 1); | ||
731 | if (pins & ATMEL_SSC_TD) | ||
732 | at91_set_A_periph(AT91_PIN_PB2, 1); | ||
733 | if (pins & ATMEL_SSC_RD) | ||
734 | at91_set_A_periph(AT91_PIN_PB3, 1); | ||
735 | if (pins & ATMEL_SSC_RK) | ||
736 | at91_set_A_periph(AT91_PIN_PB4, 1); | ||
737 | if (pins & ATMEL_SSC_RF) | ||
738 | at91_set_A_periph(AT91_PIN_PB5, 1); | ||
739 | } | ||
740 | |||
741 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
742 | |||
743 | static struct resource ssc1_resources[] = { | ||
744 | [0] = { | ||
745 | .start = AT91CAP9_BASE_SSC1, | ||
746 | .end = AT91CAP9_BASE_SSC1 + SZ_16K - 1, | ||
747 | .flags = IORESOURCE_MEM, | ||
748 | }, | ||
749 | [1] = { | ||
750 | .start = AT91CAP9_ID_SSC1, | ||
751 | .end = AT91CAP9_ID_SSC1, | ||
752 | .flags = IORESOURCE_IRQ, | ||
753 | }, | ||
754 | }; | ||
755 | |||
756 | static struct platform_device at91cap9_ssc1_device = { | ||
757 | .name = "ssc", | ||
758 | .id = 1, | ||
759 | .dev = { | ||
760 | .dma_mask = &ssc1_dmamask, | ||
761 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
762 | }, | ||
763 | .resource = ssc1_resources, | ||
764 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
765 | }; | ||
766 | |||
767 | static inline void configure_ssc1_pins(unsigned pins) | ||
768 | { | ||
769 | if (pins & ATMEL_SSC_TF) | ||
770 | at91_set_A_periph(AT91_PIN_PB6, 1); | ||
771 | if (pins & ATMEL_SSC_TK) | ||
772 | at91_set_A_periph(AT91_PIN_PB7, 1); | ||
773 | if (pins & ATMEL_SSC_TD) | ||
774 | at91_set_A_periph(AT91_PIN_PB8, 1); | ||
775 | if (pins & ATMEL_SSC_RD) | ||
776 | at91_set_A_periph(AT91_PIN_PB9, 1); | ||
777 | if (pins & ATMEL_SSC_RK) | ||
778 | at91_set_A_periph(AT91_PIN_PB10, 1); | ||
779 | if (pins & ATMEL_SSC_RF) | ||
780 | at91_set_A_periph(AT91_PIN_PB11, 1); | ||
781 | } | ||
782 | |||
783 | /* | ||
784 | * SSC controllers are accessed through library code, instead of any | ||
785 | * kind of all-singing/all-dancing driver. For example one could be | ||
786 | * used by a particular I2S audio codec's driver, while another one | ||
787 | * on the same system might be used by a custom data capture driver. | ||
788 | */ | ||
789 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
790 | { | ||
791 | struct platform_device *pdev; | ||
792 | |||
793 | /* | ||
794 | * NOTE: caller is responsible for passing information matching | ||
795 | * "pins" to whatever will be using each particular controller. | ||
796 | */ | ||
797 | switch (id) { | ||
798 | case AT91CAP9_ID_SSC0: | ||
799 | pdev = &at91cap9_ssc0_device; | ||
800 | configure_ssc0_pins(pins); | ||
801 | at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); | ||
802 | break; | ||
803 | case AT91CAP9_ID_SSC1: | ||
804 | pdev = &at91cap9_ssc1_device; | ||
805 | configure_ssc1_pins(pins); | ||
806 | at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); | ||
807 | break; | ||
808 | default: | ||
809 | return; | ||
810 | } | ||
811 | |||
812 | platform_device_register(pdev); | ||
813 | } | ||
814 | |||
815 | #else | ||
816 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | ||
817 | #endif | ||
818 | |||
819 | |||
820 | /* -------------------------------------------------------------------- | ||
821 | * UART | ||
822 | * -------------------------------------------------------------------- */ | ||
823 | |||
824 | #if defined(CONFIG_SERIAL_ATMEL) | ||
825 | static struct resource dbgu_resources[] = { | ||
826 | [0] = { | ||
827 | .start = AT91_VA_BASE_SYS + AT91_DBGU, | ||
828 | .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, | ||
829 | .flags = IORESOURCE_MEM, | ||
830 | }, | ||
831 | [1] = { | ||
832 | .start = AT91_ID_SYS, | ||
833 | .end = AT91_ID_SYS, | ||
834 | .flags = IORESOURCE_IRQ, | ||
835 | }, | ||
836 | }; | ||
837 | |||
838 | static struct atmel_uart_data dbgu_data = { | ||
839 | .use_dma_tx = 0, | ||
840 | .use_dma_rx = 0, /* DBGU not capable of receive DMA */ | ||
841 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | ||
842 | }; | ||
843 | |||
844 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
845 | |||
846 | static struct platform_device at91cap9_dbgu_device = { | ||
847 | .name = "atmel_usart", | ||
848 | .id = 0, | ||
849 | .dev = { | ||
850 | .dma_mask = &dbgu_dmamask, | ||
851 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
852 | .platform_data = &dbgu_data, | ||
853 | }, | ||
854 | .resource = dbgu_resources, | ||
855 | .num_resources = ARRAY_SIZE(dbgu_resources), | ||
856 | }; | ||
857 | |||
858 | static inline void configure_dbgu_pins(void) | ||
859 | { | ||
860 | at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ | ||
861 | at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ | ||
862 | } | ||
863 | |||
864 | static struct resource uart0_resources[] = { | ||
865 | [0] = { | ||
866 | .start = AT91CAP9_BASE_US0, | ||
867 | .end = AT91CAP9_BASE_US0 + SZ_16K - 1, | ||
868 | .flags = IORESOURCE_MEM, | ||
869 | }, | ||
870 | [1] = { | ||
871 | .start = AT91CAP9_ID_US0, | ||
872 | .end = AT91CAP9_ID_US0, | ||
873 | .flags = IORESOURCE_IRQ, | ||
874 | }, | ||
875 | }; | ||
876 | |||
877 | static struct atmel_uart_data uart0_data = { | ||
878 | .use_dma_tx = 1, | ||
879 | .use_dma_rx = 1, | ||
880 | }; | ||
881 | |||
882 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
883 | |||
884 | static struct platform_device at91cap9_uart0_device = { | ||
885 | .name = "atmel_usart", | ||
886 | .id = 1, | ||
887 | .dev = { | ||
888 | .dma_mask = &uart0_dmamask, | ||
889 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
890 | .platform_data = &uart0_data, | ||
891 | }, | ||
892 | .resource = uart0_resources, | ||
893 | .num_resources = ARRAY_SIZE(uart0_resources), | ||
894 | }; | ||
895 | |||
896 | static inline void configure_usart0_pins(unsigned pins) | ||
897 | { | ||
898 | at91_set_A_periph(AT91_PIN_PA22, 1); /* TXD0 */ | ||
899 | at91_set_A_periph(AT91_PIN_PA23, 0); /* RXD0 */ | ||
900 | |||
901 | if (pins & ATMEL_UART_RTS) | ||
902 | at91_set_A_periph(AT91_PIN_PA24, 0); /* RTS0 */ | ||
903 | if (pins & ATMEL_UART_CTS) | ||
904 | at91_set_A_periph(AT91_PIN_PA25, 0); /* CTS0 */ | ||
905 | } | ||
906 | |||
907 | static struct resource uart1_resources[] = { | ||
908 | [0] = { | ||
909 | .start = AT91CAP9_BASE_US1, | ||
910 | .end = AT91CAP9_BASE_US1 + SZ_16K - 1, | ||
911 | .flags = IORESOURCE_MEM, | ||
912 | }, | ||
913 | [1] = { | ||
914 | .start = AT91CAP9_ID_US1, | ||
915 | .end = AT91CAP9_ID_US1, | ||
916 | .flags = IORESOURCE_IRQ, | ||
917 | }, | ||
918 | }; | ||
919 | |||
920 | static struct atmel_uart_data uart1_data = { | ||
921 | .use_dma_tx = 1, | ||
922 | .use_dma_rx = 1, | ||
923 | }; | ||
924 | |||
925 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
926 | |||
927 | static struct platform_device at91cap9_uart1_device = { | ||
928 | .name = "atmel_usart", | ||
929 | .id = 2, | ||
930 | .dev = { | ||
931 | .dma_mask = &uart1_dmamask, | ||
932 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
933 | .platform_data = &uart1_data, | ||
934 | }, | ||
935 | .resource = uart1_resources, | ||
936 | .num_resources = ARRAY_SIZE(uart1_resources), | ||
937 | }; | ||
938 | |||
939 | static inline void configure_usart1_pins(unsigned pins) | ||
940 | { | ||
941 | at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ | ||
942 | at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ | ||
943 | |||
944 | if (pins & ATMEL_UART_RTS) | ||
945 | at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ | ||
946 | if (pins & ATMEL_UART_CTS) | ||
947 | at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ | ||
948 | } | ||
949 | |||
950 | static struct resource uart2_resources[] = { | ||
951 | [0] = { | ||
952 | .start = AT91CAP9_BASE_US2, | ||
953 | .end = AT91CAP9_BASE_US2 + SZ_16K - 1, | ||
954 | .flags = IORESOURCE_MEM, | ||
955 | }, | ||
956 | [1] = { | ||
957 | .start = AT91CAP9_ID_US2, | ||
958 | .end = AT91CAP9_ID_US2, | ||
959 | .flags = IORESOURCE_IRQ, | ||
960 | }, | ||
961 | }; | ||
962 | |||
963 | static struct atmel_uart_data uart2_data = { | ||
964 | .use_dma_tx = 1, | ||
965 | .use_dma_rx = 1, | ||
966 | }; | ||
967 | |||
968 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
969 | |||
970 | static struct platform_device at91cap9_uart2_device = { | ||
971 | .name = "atmel_usart", | ||
972 | .id = 3, | ||
973 | .dev = { | ||
974 | .dma_mask = &uart2_dmamask, | ||
975 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
976 | .platform_data = &uart2_data, | ||
977 | }, | ||
978 | .resource = uart2_resources, | ||
979 | .num_resources = ARRAY_SIZE(uart2_resources), | ||
980 | }; | ||
981 | |||
982 | static inline void configure_usart2_pins(unsigned pins) | ||
983 | { | ||
984 | at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ | ||
985 | at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ | ||
986 | |||
987 | if (pins & ATMEL_UART_RTS) | ||
988 | at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ | ||
989 | if (pins & ATMEL_UART_CTS) | ||
990 | at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ | ||
991 | } | ||
992 | |||
993 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | ||
994 | struct platform_device *atmel_default_console_device; /* the serial console device */ | ||
995 | |||
996 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
997 | { | ||
998 | struct platform_device *pdev; | ||
999 | |||
1000 | switch (id) { | ||
1001 | case 0: /* DBGU */ | ||
1002 | pdev = &at91cap9_dbgu_device; | ||
1003 | configure_dbgu_pins(); | ||
1004 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1005 | break; | ||
1006 | case AT91CAP9_ID_US0: | ||
1007 | pdev = &at91cap9_uart0_device; | ||
1008 | configure_usart0_pins(pins); | ||
1009 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1010 | break; | ||
1011 | case AT91CAP9_ID_US1: | ||
1012 | pdev = &at91cap9_uart1_device; | ||
1013 | configure_usart1_pins(pins); | ||
1014 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1015 | break; | ||
1016 | case AT91CAP9_ID_US2: | ||
1017 | pdev = &at91cap9_uart2_device; | ||
1018 | configure_usart2_pins(pins); | ||
1019 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1020 | break; | ||
1021 | default: | ||
1022 | return; | ||
1023 | } | ||
1024 | pdev->id = portnr; /* update to mapped ID */ | ||
1025 | |||
1026 | if (portnr < ATMEL_MAX_UART) | ||
1027 | at91_uarts[portnr] = pdev; | ||
1028 | } | ||
1029 | |||
1030 | void __init at91_set_serial_console(unsigned portnr) | ||
1031 | { | ||
1032 | if (portnr < ATMEL_MAX_UART) | ||
1033 | atmel_default_console_device = at91_uarts[portnr]; | ||
1034 | if (!atmel_default_console_device) | ||
1035 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1036 | } | ||
1037 | |||
1038 | void __init at91_add_device_serial(void) | ||
1039 | { | ||
1040 | int i; | ||
1041 | |||
1042 | for (i = 0; i < ATMEL_MAX_UART; i++) { | ||
1043 | if (at91_uarts[i]) | ||
1044 | platform_device_register(at91_uarts[i]); | ||
1045 | } | ||
1046 | } | ||
1047 | #else | ||
1048 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1049 | void __init at91_set_serial_console(unsigned portnr) {} | ||
1050 | void __init at91_add_device_serial(void) {} | ||
1051 | #endif | ||
1052 | |||
1053 | |||
1054 | /* -------------------------------------------------------------------- */ | ||
1055 | /* | ||
1056 | * These devices are always present and don't need any board-specific | ||
1057 | * setup. | ||
1058 | */ | ||
1059 | static int __init at91_add_standard_devices(void) | ||
1060 | { | ||
1061 | at91_add_device_rtt(); | ||
1062 | at91_add_device_watchdog(); | ||
1063 | return 0; | ||
1064 | } | ||
1065 | |||
1066 | arch_initcall(at91_add_standard_devices); | ||
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 2cad2bf864be..d688c1dbd925 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -301,28 +301,28 @@ void __init at91rm9200_initialize(unsigned long main_clock, unsigned short banks | |||
301 | static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { | 301 | static unsigned int at91rm9200_default_irq_priority[NR_AIC_IRQS] __initdata = { |
302 | 7, /* Advanced Interrupt Controller (FIQ) */ | 302 | 7, /* Advanced Interrupt Controller (FIQ) */ |
303 | 7, /* System Peripherals */ | 303 | 7, /* System Peripherals */ |
304 | 0, /* Parallel IO Controller A */ | 304 | 1, /* Parallel IO Controller A */ |
305 | 0, /* Parallel IO Controller B */ | 305 | 1, /* Parallel IO Controller B */ |
306 | 0, /* Parallel IO Controller C */ | 306 | 1, /* Parallel IO Controller C */ |
307 | 0, /* Parallel IO Controller D */ | 307 | 1, /* Parallel IO Controller D */ |
308 | 6, /* USART 0 */ | 308 | 5, /* USART 0 */ |
309 | 6, /* USART 1 */ | 309 | 5, /* USART 1 */ |
310 | 6, /* USART 2 */ | 310 | 5, /* USART 2 */ |
311 | 6, /* USART 3 */ | 311 | 5, /* USART 3 */ |
312 | 0, /* Multimedia Card Interface */ | 312 | 0, /* Multimedia Card Interface */ |
313 | 4, /* USB Device Port */ | 313 | 2, /* USB Device Port */ |
314 | 0, /* Two-Wire Interface */ | 314 | 6, /* Two-Wire Interface */ |
315 | 6, /* Serial Peripheral Interface */ | 315 | 5, /* Serial Peripheral Interface */ |
316 | 5, /* Serial Synchronous Controller 0 */ | 316 | 4, /* Serial Synchronous Controller 0 */ |
317 | 5, /* Serial Synchronous Controller 1 */ | 317 | 4, /* Serial Synchronous Controller 1 */ |
318 | 5, /* Serial Synchronous Controller 2 */ | 318 | 4, /* Serial Synchronous Controller 2 */ |
319 | 0, /* Timer Counter 0 */ | 319 | 0, /* Timer Counter 0 */ |
320 | 0, /* Timer Counter 1 */ | 320 | 0, /* Timer Counter 1 */ |
321 | 0, /* Timer Counter 2 */ | 321 | 0, /* Timer Counter 2 */ |
322 | 0, /* Timer Counter 3 */ | 322 | 0, /* Timer Counter 3 */ |
323 | 0, /* Timer Counter 4 */ | 323 | 0, /* Timer Counter 4 */ |
324 | 0, /* Timer Counter 5 */ | 324 | 0, /* Timer Counter 5 */ |
325 | 3, /* USB Host port */ | 325 | 2, /* USB Host port */ |
326 | 3, /* Ethernet MAC */ | 326 | 3, /* Ethernet MAC */ |
327 | 0, /* Advanced Interrupt Controller (IRQ0) */ | 327 | 0, /* Advanced Interrupt Controller (IRQ0) */ |
328 | 0, /* Advanced Interrupt Controller (IRQ1) */ | 328 | 0, /* Advanced Interrupt Controller (IRQ1) */ |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 9296833f91cc..ef6aeb86e980 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <asm/mach/arch.h> | 13 | #include <asm/mach/arch.h> |
14 | #include <asm/mach/map.h> | 14 | #include <asm/mach/map.h> |
15 | 15 | ||
16 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
17 | #include <linux/i2c-gpio.h> | 18 | #include <linux/i2c-gpio.h> |
18 | 19 | ||
@@ -29,7 +30,7 @@ | |||
29 | * -------------------------------------------------------------------- */ | 30 | * -------------------------------------------------------------------- */ |
30 | 31 | ||
31 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 32 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
32 | static u64 ohci_dmamask = 0xffffffffUL; | 33 | static u64 ohci_dmamask = DMA_BIT_MASK(32); |
33 | static struct at91_usbh_data usbh_data; | 34 | static struct at91_usbh_data usbh_data; |
34 | 35 | ||
35 | static struct resource usbh_resources[] = { | 36 | static struct resource usbh_resources[] = { |
@@ -50,7 +51,7 @@ static struct platform_device at91rm9200_usbh_device = { | |||
50 | .id = -1, | 51 | .id = -1, |
51 | .dev = { | 52 | .dev = { |
52 | .dma_mask = &ohci_dmamask, | 53 | .dma_mask = &ohci_dmamask, |
53 | .coherent_dma_mask = 0xffffffff, | 54 | .coherent_dma_mask = DMA_BIT_MASK(32), |
54 | .platform_data = &usbh_data, | 55 | .platform_data = &usbh_data, |
55 | }, | 56 | }, |
56 | .resource = usbh_resources, | 57 | .resource = usbh_resources, |
@@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
125 | * -------------------------------------------------------------------- */ | 126 | * -------------------------------------------------------------------- */ |
126 | 127 | ||
127 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) | 128 | #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE) |
128 | static u64 eth_dmamask = 0xffffffffUL; | 129 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
129 | static struct at91_eth_data eth_data; | 130 | static struct at91_eth_data eth_data; |
130 | 131 | ||
131 | static struct resource eth_resources[] = { | 132 | static struct resource eth_resources[] = { |
@@ -146,7 +147,7 @@ static struct platform_device at91rm9200_eth_device = { | |||
146 | .id = -1, | 147 | .id = -1, |
147 | .dev = { | 148 | .dev = { |
148 | .dma_mask = ð_dmamask, | 149 | .dma_mask = ð_dmamask, |
149 | .coherent_dma_mask = 0xffffffff, | 150 | .coherent_dma_mask = DMA_BIT_MASK(32), |
150 | .platform_data = ð_data, | 151 | .platform_data = ð_data, |
151 | }, | 152 | }, |
152 | .resource = eth_resources, | 153 | .resource = eth_resources, |
@@ -285,7 +286,7 @@ void __init at91_add_device_cf(struct at91_cf_data *data) {} | |||
285 | * -------------------------------------------------------------------- */ | 286 | * -------------------------------------------------------------------- */ |
286 | 287 | ||
287 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | 288 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
288 | static u64 mmc_dmamask = 0xffffffffUL; | 289 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
289 | static struct at91_mmc_data mmc_data; | 290 | static struct at91_mmc_data mmc_data; |
290 | 291 | ||
291 | static struct resource mmc_resources[] = { | 292 | static struct resource mmc_resources[] = { |
@@ -306,7 +307,7 @@ static struct platform_device at91rm9200_mmc_device = { | |||
306 | .id = -1, | 307 | .id = -1, |
307 | .dev = { | 308 | .dev = { |
308 | .dma_mask = &mmc_dmamask, | 309 | .dma_mask = &mmc_dmamask, |
309 | .coherent_dma_mask = 0xffffffff, | 310 | .coherent_dma_mask = DMA_BIT_MASK(32), |
310 | .platform_data = &mmc_data, | 311 | .platform_data = &mmc_data, |
311 | }, | 312 | }, |
312 | .resource = mmc_resources, | 313 | .resource = mmc_resources, |
@@ -375,7 +376,7 @@ static struct at91_nand_data nand_data; | |||
375 | static struct resource nand_resources[] = { | 376 | static struct resource nand_resources[] = { |
376 | { | 377 | { |
377 | .start = NAND_BASE, | 378 | .start = NAND_BASE, |
378 | .end = NAND_BASE + SZ_8M - 1, | 379 | .end = NAND_BASE + SZ_256M - 1, |
379 | .flags = IORESOURCE_MEM, | 380 | .flags = IORESOURCE_MEM, |
380 | } | 381 | } |
381 | }; | 382 | }; |
@@ -513,7 +514,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |||
513 | * -------------------------------------------------------------------- */ | 514 | * -------------------------------------------------------------------- */ |
514 | 515 | ||
515 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 516 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
516 | static u64 spi_dmamask = 0xffffffffUL; | 517 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
517 | 518 | ||
518 | static struct resource spi_resources[] = { | 519 | static struct resource spi_resources[] = { |
519 | [0] = { | 520 | [0] = { |
@@ -533,7 +534,7 @@ static struct platform_device at91rm9200_spi_device = { | |||
533 | .id = 0, | 534 | .id = 0, |
534 | .dev = { | 535 | .dev = { |
535 | .dma_mask = &spi_dmamask, | 536 | .dma_mask = &spi_dmamask, |
536 | .coherent_dma_mask = 0xffffffff, | 537 | .coherent_dma_mask = DMA_BIT_MASK(32), |
537 | }, | 538 | }, |
538 | .resource = spi_resources, | 539 | .resource = spi_resources, |
539 | .num_resources = ARRAY_SIZE(spi_resources), | 540 | .num_resources = ARRAY_SIZE(spi_resources), |
@@ -557,8 +558,11 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
557 | else | 558 | else |
558 | cs_pin = spi_standard_cs[devices[i].chip_select]; | 559 | cs_pin = spi_standard_cs[devices[i].chip_select]; |
559 | 560 | ||
560 | /* enable chip-select pin */ | 561 | if (devices[i].chip_select == 0) /* for CS0 errata */ |
561 | at91_set_gpio_output(cs_pin, 1); | 562 | at91_set_A_periph(cs_pin, 0); |
563 | else | ||
564 | at91_set_gpio_output(cs_pin, 1); | ||
565 | |||
562 | 566 | ||
563 | /* pass chip-select pin to driver */ | 567 | /* pass chip-select pin to driver */ |
564 | devices[i].controller_data = (void *) cs_pin; | 568 | devices[i].controller_data = (void *) cs_pin; |
@@ -613,24 +617,175 @@ static void __init at91_add_device_watchdog(void) {} | |||
613 | 617 | ||
614 | 618 | ||
615 | /* -------------------------------------------------------------------- | 619 | /* -------------------------------------------------------------------- |
616 | * LEDs | 620 | * SSC -- Synchronous Serial Controller |
617 | * -------------------------------------------------------------------- */ | 621 | * -------------------------------------------------------------------- */ |
618 | 622 | ||
619 | #if defined(CONFIG_LEDS) | 623 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) |
620 | u8 at91_leds_cpu; | 624 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); |
621 | u8 at91_leds_timer; | 625 | |
626 | static struct resource ssc0_resources[] = { | ||
627 | [0] = { | ||
628 | .start = AT91RM9200_BASE_SSC0, | ||
629 | .end = AT91RM9200_BASE_SSC0 + SZ_16K - 1, | ||
630 | .flags = IORESOURCE_MEM, | ||
631 | }, | ||
632 | [1] = { | ||
633 | .start = AT91RM9200_ID_SSC0, | ||
634 | .end = AT91RM9200_ID_SSC0, | ||
635 | .flags = IORESOURCE_IRQ, | ||
636 | }, | ||
637 | }; | ||
638 | |||
639 | static struct platform_device at91rm9200_ssc0_device = { | ||
640 | .name = "ssc", | ||
641 | .id = 0, | ||
642 | .dev = { | ||
643 | .dma_mask = &ssc0_dmamask, | ||
644 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
645 | }, | ||
646 | .resource = ssc0_resources, | ||
647 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
648 | }; | ||
649 | |||
650 | static inline void configure_ssc0_pins(unsigned pins) | ||
651 | { | ||
652 | if (pins & ATMEL_SSC_TF) | ||
653 | at91_set_A_periph(AT91_PIN_PB0, 1); | ||
654 | if (pins & ATMEL_SSC_TK) | ||
655 | at91_set_A_periph(AT91_PIN_PB1, 1); | ||
656 | if (pins & ATMEL_SSC_TD) | ||
657 | at91_set_A_periph(AT91_PIN_PB2, 1); | ||
658 | if (pins & ATMEL_SSC_RD) | ||
659 | at91_set_A_periph(AT91_PIN_PB3, 1); | ||
660 | if (pins & ATMEL_SSC_RK) | ||
661 | at91_set_A_periph(AT91_PIN_PB4, 1); | ||
662 | if (pins & ATMEL_SSC_RF) | ||
663 | at91_set_A_periph(AT91_PIN_PB5, 1); | ||
664 | } | ||
665 | |||
666 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
667 | |||
668 | static struct resource ssc1_resources[] = { | ||
669 | [0] = { | ||
670 | .start = AT91RM9200_BASE_SSC1, | ||
671 | .end = AT91RM9200_BASE_SSC1 + SZ_16K - 1, | ||
672 | .flags = IORESOURCE_MEM, | ||
673 | }, | ||
674 | [1] = { | ||
675 | .start = AT91RM9200_ID_SSC1, | ||
676 | .end = AT91RM9200_ID_SSC1, | ||
677 | .flags = IORESOURCE_IRQ, | ||
678 | }, | ||
679 | }; | ||
680 | |||
681 | static struct platform_device at91rm9200_ssc1_device = { | ||
682 | .name = "ssc", | ||
683 | .id = 1, | ||
684 | .dev = { | ||
685 | .dma_mask = &ssc1_dmamask, | ||
686 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
687 | }, | ||
688 | .resource = ssc1_resources, | ||
689 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
690 | }; | ||
691 | |||
692 | static inline void configure_ssc1_pins(unsigned pins) | ||
693 | { | ||
694 | if (pins & ATMEL_SSC_TF) | ||
695 | at91_set_A_periph(AT91_PIN_PB6, 1); | ||
696 | if (pins & ATMEL_SSC_TK) | ||
697 | at91_set_A_periph(AT91_PIN_PB7, 1); | ||
698 | if (pins & ATMEL_SSC_TD) | ||
699 | at91_set_A_periph(AT91_PIN_PB8, 1); | ||
700 | if (pins & ATMEL_SSC_RD) | ||
701 | at91_set_A_periph(AT91_PIN_PB9, 1); | ||
702 | if (pins & ATMEL_SSC_RK) | ||
703 | at91_set_A_periph(AT91_PIN_PB10, 1); | ||
704 | if (pins & ATMEL_SSC_RF) | ||
705 | at91_set_A_periph(AT91_PIN_PB11, 1); | ||
706 | } | ||
707 | |||
708 | static u64 ssc2_dmamask = DMA_BIT_MASK(32); | ||
709 | |||
710 | static struct resource ssc2_resources[] = { | ||
711 | [0] = { | ||
712 | .start = AT91RM9200_BASE_SSC2, | ||
713 | .end = AT91RM9200_BASE_SSC2 + SZ_16K - 1, | ||
714 | .flags = IORESOURCE_MEM, | ||
715 | }, | ||
716 | [1] = { | ||
717 | .start = AT91RM9200_ID_SSC2, | ||
718 | .end = AT91RM9200_ID_SSC2, | ||
719 | .flags = IORESOURCE_IRQ, | ||
720 | }, | ||
721 | }; | ||
722 | |||
723 | static struct platform_device at91rm9200_ssc2_device = { | ||
724 | .name = "ssc", | ||
725 | .id = 2, | ||
726 | .dev = { | ||
727 | .dma_mask = &ssc2_dmamask, | ||
728 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
729 | }, | ||
730 | .resource = ssc2_resources, | ||
731 | .num_resources = ARRAY_SIZE(ssc2_resources), | ||
732 | }; | ||
733 | |||
734 | static inline void configure_ssc2_pins(unsigned pins) | ||
735 | { | ||
736 | if (pins & ATMEL_SSC_TF) | ||
737 | at91_set_A_periph(AT91_PIN_PB12, 1); | ||
738 | if (pins & ATMEL_SSC_TK) | ||
739 | at91_set_A_periph(AT91_PIN_PB13, 1); | ||
740 | if (pins & ATMEL_SSC_TD) | ||
741 | at91_set_A_periph(AT91_PIN_PB14, 1); | ||
742 | if (pins & ATMEL_SSC_RD) | ||
743 | at91_set_A_periph(AT91_PIN_PB15, 1); | ||
744 | if (pins & ATMEL_SSC_RK) | ||
745 | at91_set_A_periph(AT91_PIN_PB16, 1); | ||
746 | if (pins & ATMEL_SSC_RF) | ||
747 | at91_set_A_periph(AT91_PIN_PB17, 1); | ||
748 | } | ||
622 | 749 | ||
623 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | 750 | /* |
751 | * SSC controllers are accessed through library code, instead of any | ||
752 | * kind of all-singing/all-dancing driver. For example one could be | ||
753 | * used by a particular I2S audio codec's driver, while another one | ||
754 | * on the same system might be used by a custom data capture driver. | ||
755 | */ | ||
756 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
624 | { | 757 | { |
625 | /* Enable GPIO to access the LEDs */ | 758 | struct platform_device *pdev; |
626 | at91_set_gpio_output(cpu_led, 1); | ||
627 | at91_set_gpio_output(timer_led, 1); | ||
628 | 759 | ||
629 | at91_leds_cpu = cpu_led; | 760 | /* |
630 | at91_leds_timer = timer_led; | 761 | * NOTE: caller is responsible for passing information matching |
762 | * "pins" to whatever will be using each particular controller. | ||
763 | */ | ||
764 | switch (id) { | ||
765 | case AT91RM9200_ID_SSC0: | ||
766 | pdev = &at91rm9200_ssc0_device; | ||
767 | configure_ssc0_pins(pins); | ||
768 | at91_clock_associate("ssc0_clk", &pdev->dev, "ssc"); | ||
769 | break; | ||
770 | case AT91RM9200_ID_SSC1: | ||
771 | pdev = &at91rm9200_ssc1_device; | ||
772 | configure_ssc1_pins(pins); | ||
773 | at91_clock_associate("ssc1_clk", &pdev->dev, "ssc"); | ||
774 | break; | ||
775 | case AT91RM9200_ID_SSC2: | ||
776 | pdev = &at91rm9200_ssc2_device; | ||
777 | configure_ssc2_pins(pins); | ||
778 | at91_clock_associate("ssc2_clk", &pdev->dev, "ssc"); | ||
779 | break; | ||
780 | default: | ||
781 | return; | ||
782 | } | ||
783 | |||
784 | platform_device_register(pdev); | ||
631 | } | 785 | } |
786 | |||
632 | #else | 787 | #else |
633 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | 788 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} |
634 | #endif | 789 | #endif |
635 | 790 | ||
636 | 791 | ||
@@ -658,12 +813,15 @@ static struct atmel_uart_data dbgu_data = { | |||
658 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | 813 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
659 | }; | 814 | }; |
660 | 815 | ||
816 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
817 | |||
661 | static struct platform_device at91rm9200_dbgu_device = { | 818 | static struct platform_device at91rm9200_dbgu_device = { |
662 | .name = "atmel_usart", | 819 | .name = "atmel_usart", |
663 | .id = 0, | 820 | .id = 0, |
664 | .dev = { | 821 | .dev = { |
665 | .platform_data = &dbgu_data, | 822 | .dma_mask = &dbgu_dmamask, |
666 | .coherent_dma_mask = 0xffffffff, | 823 | .coherent_dma_mask = DMA_BIT_MASK(32), |
824 | .platform_data = &dbgu_data, | ||
667 | }, | 825 | }, |
668 | .resource = dbgu_resources, | 826 | .resource = dbgu_resources, |
669 | .num_resources = ARRAY_SIZE(dbgu_resources), | 827 | .num_resources = ARRAY_SIZE(dbgu_resources), |
@@ -693,28 +851,35 @@ static struct atmel_uart_data uart0_data = { | |||
693 | .use_dma_rx = 1, | 851 | .use_dma_rx = 1, |
694 | }; | 852 | }; |
695 | 853 | ||
854 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
855 | |||
696 | static struct platform_device at91rm9200_uart0_device = { | 856 | static struct platform_device at91rm9200_uart0_device = { |
697 | .name = "atmel_usart", | 857 | .name = "atmel_usart", |
698 | .id = 1, | 858 | .id = 1, |
699 | .dev = { | 859 | .dev = { |
700 | .platform_data = &uart0_data, | 860 | .dma_mask = &uart0_dmamask, |
701 | .coherent_dma_mask = 0xffffffff, | 861 | .coherent_dma_mask = DMA_BIT_MASK(32), |
862 | .platform_data = &uart0_data, | ||
702 | }, | 863 | }, |
703 | .resource = uart0_resources, | 864 | .resource = uart0_resources, |
704 | .num_resources = ARRAY_SIZE(uart0_resources), | 865 | .num_resources = ARRAY_SIZE(uart0_resources), |
705 | }; | 866 | }; |
706 | 867 | ||
707 | static inline void configure_usart0_pins(void) | 868 | static inline void configure_usart0_pins(unsigned pins) |
708 | { | 869 | { |
709 | at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ | 870 | at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */ |
710 | at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ | 871 | at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */ |
711 | at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ | ||
712 | 872 | ||
713 | /* | 873 | if (pins & ATMEL_UART_CTS) |
714 | * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. | 874 | at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */ |
715 | * We need to drive the pin manually. Default is off (RTS is active low). | 875 | |
716 | */ | 876 | if (pins & ATMEL_UART_RTS) { |
717 | at91_set_gpio_output(AT91_PIN_PA21, 1); | 877 | /* |
878 | * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21. | ||
879 | * We need to drive the pin manually. Default is off (RTS is active low). | ||
880 | */ | ||
881 | at91_set_gpio_output(AT91_PIN_PA21, 1); | ||
882 | } | ||
718 | } | 883 | } |
719 | 884 | ||
720 | static struct resource uart1_resources[] = { | 885 | static struct resource uart1_resources[] = { |
@@ -735,27 +900,37 @@ static struct atmel_uart_data uart1_data = { | |||
735 | .use_dma_rx = 1, | 900 | .use_dma_rx = 1, |
736 | }; | 901 | }; |
737 | 902 | ||
903 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
904 | |||
738 | static struct platform_device at91rm9200_uart1_device = { | 905 | static struct platform_device at91rm9200_uart1_device = { |
739 | .name = "atmel_usart", | 906 | .name = "atmel_usart", |
740 | .id = 2, | 907 | .id = 2, |
741 | .dev = { | 908 | .dev = { |
742 | .platform_data = &uart1_data, | 909 | .dma_mask = &uart1_dmamask, |
743 | .coherent_dma_mask = 0xffffffff, | 910 | .coherent_dma_mask = DMA_BIT_MASK(32), |
911 | .platform_data = &uart1_data, | ||
744 | }, | 912 | }, |
745 | .resource = uart1_resources, | 913 | .resource = uart1_resources, |
746 | .num_resources = ARRAY_SIZE(uart1_resources), | 914 | .num_resources = ARRAY_SIZE(uart1_resources), |
747 | }; | 915 | }; |
748 | 916 | ||
749 | static inline void configure_usart1_pins(void) | 917 | static inline void configure_usart1_pins(unsigned pins) |
750 | { | 918 | { |
751 | at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ | ||
752 | at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ | ||
753 | at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ | 919 | at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */ |
754 | at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ | 920 | at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */ |
755 | at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ | 921 | |
756 | at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ | 922 | if (pins & ATMEL_UART_RI) |
757 | at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ | 923 | at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */ |
758 | at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ | 924 | if (pins & ATMEL_UART_DTR) |
925 | at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */ | ||
926 | if (pins & ATMEL_UART_DCD) | ||
927 | at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */ | ||
928 | if (pins & ATMEL_UART_CTS) | ||
929 | at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */ | ||
930 | if (pins & ATMEL_UART_DSR) | ||
931 | at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */ | ||
932 | if (pins & ATMEL_UART_RTS) | ||
933 | at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */ | ||
759 | } | 934 | } |
760 | 935 | ||
761 | static struct resource uart2_resources[] = { | 936 | static struct resource uart2_resources[] = { |
@@ -776,21 +951,29 @@ static struct atmel_uart_data uart2_data = { | |||
776 | .use_dma_rx = 1, | 951 | .use_dma_rx = 1, |
777 | }; | 952 | }; |
778 | 953 | ||
954 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
955 | |||
779 | static struct platform_device at91rm9200_uart2_device = { | 956 | static struct platform_device at91rm9200_uart2_device = { |
780 | .name = "atmel_usart", | 957 | .name = "atmel_usart", |
781 | .id = 3, | 958 | .id = 3, |
782 | .dev = { | 959 | .dev = { |
783 | .platform_data = &uart2_data, | 960 | .dma_mask = &uart2_dmamask, |
784 | .coherent_dma_mask = 0xffffffff, | 961 | .coherent_dma_mask = DMA_BIT_MASK(32), |
962 | .platform_data = &uart2_data, | ||
785 | }, | 963 | }, |
786 | .resource = uart2_resources, | 964 | .resource = uart2_resources, |
787 | .num_resources = ARRAY_SIZE(uart2_resources), | 965 | .num_resources = ARRAY_SIZE(uart2_resources), |
788 | }; | 966 | }; |
789 | 967 | ||
790 | static inline void configure_usart2_pins(void) | 968 | static inline void configure_usart2_pins(unsigned pins) |
791 | { | 969 | { |
792 | at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ | 970 | at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */ |
793 | at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ | 971 | at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */ |
972 | |||
973 | if (pins & ATMEL_UART_CTS) | ||
974 | at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */ | ||
975 | if (pins & ATMEL_UART_RTS) | ||
976 | at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */ | ||
794 | } | 977 | } |
795 | 978 | ||
796 | static struct resource uart3_resources[] = { | 979 | static struct resource uart3_resources[] = { |
@@ -811,27 +994,35 @@ static struct atmel_uart_data uart3_data = { | |||
811 | .use_dma_rx = 1, | 994 | .use_dma_rx = 1, |
812 | }; | 995 | }; |
813 | 996 | ||
997 | static u64 uart3_dmamask = DMA_BIT_MASK(32); | ||
998 | |||
814 | static struct platform_device at91rm9200_uart3_device = { | 999 | static struct platform_device at91rm9200_uart3_device = { |
815 | .name = "atmel_usart", | 1000 | .name = "atmel_usart", |
816 | .id = 4, | 1001 | .id = 4, |
817 | .dev = { | 1002 | .dev = { |
818 | .platform_data = &uart3_data, | 1003 | .dma_mask = &uart3_dmamask, |
819 | .coherent_dma_mask = 0xffffffff, | 1004 | .coherent_dma_mask = DMA_BIT_MASK(32), |
1005 | .platform_data = &uart3_data, | ||
820 | }, | 1006 | }, |
821 | .resource = uart3_resources, | 1007 | .resource = uart3_resources, |
822 | .num_resources = ARRAY_SIZE(uart3_resources), | 1008 | .num_resources = ARRAY_SIZE(uart3_resources), |
823 | }; | 1009 | }; |
824 | 1010 | ||
825 | static inline void configure_usart3_pins(void) | 1011 | static inline void configure_usart3_pins(unsigned pins) |
826 | { | 1012 | { |
827 | at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ | 1013 | at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ |
828 | at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ | 1014 | at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ |
1015 | |||
1016 | if (pins & ATMEL_UART_CTS) | ||
1017 | at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */ | ||
1018 | if (pins & ATMEL_UART_RTS) | ||
1019 | at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */ | ||
829 | } | 1020 | } |
830 | 1021 | ||
831 | struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 1022 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
832 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 1023 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
833 | 1024 | ||
834 | void __init at91_init_serial(struct at91_uart_config *config) | 1025 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) |
835 | { | 1026 | { |
836 | int i; | 1027 | int i; |
837 | 1028 | ||
@@ -839,22 +1030,22 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
839 | for (i = 0; i < config->nr_tty; i++) { | 1030 | for (i = 0; i < config->nr_tty; i++) { |
840 | switch (config->tty_map[i]) { | 1031 | switch (config->tty_map[i]) { |
841 | case 0: | 1032 | case 0: |
842 | configure_usart0_pins(); | 1033 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
843 | at91_uarts[i] = &at91rm9200_uart0_device; | 1034 | at91_uarts[i] = &at91rm9200_uart0_device; |
844 | at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); | 1035 | at91_clock_associate("usart0_clk", &at91rm9200_uart0_device.dev, "usart"); |
845 | break; | 1036 | break; |
846 | case 1: | 1037 | case 1: |
847 | configure_usart1_pins(); | 1038 | configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); |
848 | at91_uarts[i] = &at91rm9200_uart1_device; | 1039 | at91_uarts[i] = &at91rm9200_uart1_device; |
849 | at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); | 1040 | at91_clock_associate("usart1_clk", &at91rm9200_uart1_device.dev, "usart"); |
850 | break; | 1041 | break; |
851 | case 2: | 1042 | case 2: |
852 | configure_usart2_pins(); | 1043 | configure_usart2_pins(0); |
853 | at91_uarts[i] = &at91rm9200_uart2_device; | 1044 | at91_uarts[i] = &at91rm9200_uart2_device; |
854 | at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); | 1045 | at91_clock_associate("usart2_clk", &at91rm9200_uart2_device.dev, "usart"); |
855 | break; | 1046 | break; |
856 | case 3: | 1047 | case 3: |
857 | configure_usart3_pins(); | 1048 | configure_usart3_pins(0); |
858 | at91_uarts[i] = &at91rm9200_uart3_device; | 1049 | at91_uarts[i] = &at91rm9200_uart3_device; |
859 | at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); | 1050 | at91_clock_associate("usart3_clk", &at91rm9200_uart3_device.dev, "usart"); |
860 | break; | 1051 | break; |
@@ -876,6 +1067,53 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
876 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | 1067 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
877 | } | 1068 | } |
878 | 1069 | ||
1070 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
1071 | { | ||
1072 | struct platform_device *pdev; | ||
1073 | |||
1074 | switch (id) { | ||
1075 | case 0: /* DBGU */ | ||
1076 | pdev = &at91rm9200_dbgu_device; | ||
1077 | configure_dbgu_pins(); | ||
1078 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1079 | break; | ||
1080 | case AT91RM9200_ID_US0: | ||
1081 | pdev = &at91rm9200_uart0_device; | ||
1082 | configure_usart0_pins(pins); | ||
1083 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1084 | break; | ||
1085 | case AT91RM9200_ID_US1: | ||
1086 | pdev = &at91rm9200_uart1_device; | ||
1087 | configure_usart1_pins(pins); | ||
1088 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1089 | break; | ||
1090 | case AT91RM9200_ID_US2: | ||
1091 | pdev = &at91rm9200_uart2_device; | ||
1092 | configure_usart2_pins(pins); | ||
1093 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1094 | break; | ||
1095 | case AT91RM9200_ID_US3: | ||
1096 | pdev = &at91rm9200_uart3_device; | ||
1097 | configure_usart3_pins(pins); | ||
1098 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1099 | break; | ||
1100 | default: | ||
1101 | return; | ||
1102 | } | ||
1103 | pdev->id = portnr; /* update to mapped ID */ | ||
1104 | |||
1105 | if (portnr < ATMEL_MAX_UART) | ||
1106 | at91_uarts[portnr] = pdev; | ||
1107 | } | ||
1108 | |||
1109 | void __init at91_set_serial_console(unsigned portnr) | ||
1110 | { | ||
1111 | if (portnr < ATMEL_MAX_UART) | ||
1112 | atmel_default_console_device = at91_uarts[portnr]; | ||
1113 | if (!atmel_default_console_device) | ||
1114 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1115 | } | ||
1116 | |||
879 | void __init at91_add_device_serial(void) | 1117 | void __init at91_add_device_serial(void) |
880 | { | 1118 | { |
881 | int i; | 1119 | int i; |
@@ -886,7 +1124,9 @@ void __init at91_add_device_serial(void) | |||
886 | } | 1124 | } |
887 | } | 1125 | } |
888 | #else | 1126 | #else |
889 | void __init at91_init_serial(struct at91_uart_config *config) {} | 1127 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} |
1128 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1129 | void __init at91_set_serial_console(unsigned portnr) {} | ||
890 | void __init at91_add_device_serial(void) {} | 1130 | void __init at91_add_device_serial(void) {} |
891 | #endif | 1131 | #endif |
892 | 1132 | ||
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index e47381e8aaba..18d06612ce8a 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -327,30 +327,30 @@ void __init at91sam9260_initialize(unsigned long main_clock) | |||
327 | static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { | 327 | static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { |
328 | 7, /* Advanced Interrupt Controller */ | 328 | 7, /* Advanced Interrupt Controller */ |
329 | 7, /* System Peripherals */ | 329 | 7, /* System Peripherals */ |
330 | 0, /* Parallel IO Controller A */ | 330 | 1, /* Parallel IO Controller A */ |
331 | 0, /* Parallel IO Controller B */ | 331 | 1, /* Parallel IO Controller B */ |
332 | 0, /* Parallel IO Controller C */ | 332 | 1, /* Parallel IO Controller C */ |
333 | 0, /* Analog-to-Digital Converter */ | 333 | 0, /* Analog-to-Digital Converter */ |
334 | 6, /* USART 0 */ | 334 | 5, /* USART 0 */ |
335 | 6, /* USART 1 */ | 335 | 5, /* USART 1 */ |
336 | 6, /* USART 2 */ | 336 | 5, /* USART 2 */ |
337 | 0, /* Multimedia Card Interface */ | 337 | 0, /* Multimedia Card Interface */ |
338 | 4, /* USB Device Port */ | 338 | 2, /* USB Device Port */ |
339 | 0, /* Two-Wire Interface */ | 339 | 6, /* Two-Wire Interface */ |
340 | 6, /* Serial Peripheral Interface 0 */ | 340 | 5, /* Serial Peripheral Interface 0 */ |
341 | 6, /* Serial Peripheral Interface 1 */ | 341 | 5, /* Serial Peripheral Interface 1 */ |
342 | 5, /* Serial Synchronous Controller */ | 342 | 5, /* Serial Synchronous Controller */ |
343 | 0, | 343 | 0, |
344 | 0, | 344 | 0, |
345 | 0, /* Timer Counter 0 */ | 345 | 0, /* Timer Counter 0 */ |
346 | 0, /* Timer Counter 1 */ | 346 | 0, /* Timer Counter 1 */ |
347 | 0, /* Timer Counter 2 */ | 347 | 0, /* Timer Counter 2 */ |
348 | 3, /* USB Host port */ | 348 | 2, /* USB Host port */ |
349 | 3, /* Ethernet */ | 349 | 3, /* Ethernet */ |
350 | 0, /* Image Sensor Interface */ | 350 | 0, /* Image Sensor Interface */ |
351 | 6, /* USART 3 */ | 351 | 5, /* USART 3 */ |
352 | 6, /* USART 4 */ | 352 | 5, /* USART 4 */ |
353 | 6, /* USART 5 */ | 353 | 5, /* USART 5 */ |
354 | 0, /* Timer Counter 3 */ | 354 | 0, /* Timer Counter 3 */ |
355 | 0, /* Timer Counter 4 */ | 355 | 0, /* Timer Counter 4 */ |
356 | 0, /* Timer Counter 5 */ | 356 | 0, /* Timer Counter 5 */ |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 3091bf47d8c9..105f8403860b 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <asm/mach/arch.h> | 12 | #include <asm/mach/arch.h> |
13 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
14 | 14 | ||
15 | #include <linux/dma-mapping.h> | ||
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
16 | #include <linux/i2c-gpio.h> | 17 | #include <linux/i2c-gpio.h> |
17 | 18 | ||
@@ -29,7 +30,7 @@ | |||
29 | * -------------------------------------------------------------------- */ | 30 | * -------------------------------------------------------------------- */ |
30 | 31 | ||
31 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 32 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
32 | static u64 ohci_dmamask = 0xffffffffUL; | 33 | static u64 ohci_dmamask = DMA_BIT_MASK(32); |
33 | static struct at91_usbh_data usbh_data; | 34 | static struct at91_usbh_data usbh_data; |
34 | 35 | ||
35 | static struct resource usbh_resources[] = { | 36 | static struct resource usbh_resources[] = { |
@@ -50,7 +51,7 @@ static struct platform_device at91_usbh_device = { | |||
50 | .id = -1, | 51 | .id = -1, |
51 | .dev = { | 52 | .dev = { |
52 | .dma_mask = &ohci_dmamask, | 53 | .dma_mask = &ohci_dmamask, |
53 | .coherent_dma_mask = 0xffffffff, | 54 | .coherent_dma_mask = DMA_BIT_MASK(32), |
54 | .platform_data = &usbh_data, | 55 | .platform_data = &usbh_data, |
55 | }, | 56 | }, |
56 | .resource = usbh_resources, | 57 | .resource = usbh_resources, |
@@ -125,7 +126,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
125 | * -------------------------------------------------------------------- */ | 126 | * -------------------------------------------------------------------- */ |
126 | 127 | ||
127 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 128 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
128 | static u64 eth_dmamask = 0xffffffffUL; | 129 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
129 | static struct at91_eth_data eth_data; | 130 | static struct at91_eth_data eth_data; |
130 | 131 | ||
131 | static struct resource eth_resources[] = { | 132 | static struct resource eth_resources[] = { |
@@ -146,7 +147,7 @@ static struct platform_device at91sam9260_eth_device = { | |||
146 | .id = -1, | 147 | .id = -1, |
147 | .dev = { | 148 | .dev = { |
148 | .dma_mask = ð_dmamask, | 149 | .dma_mask = ð_dmamask, |
149 | .coherent_dma_mask = 0xffffffff, | 150 | .coherent_dma_mask = DMA_BIT_MASK(32), |
150 | .platform_data = ð_data, | 151 | .platform_data = ð_data, |
151 | }, | 152 | }, |
152 | .resource = eth_resources, | 153 | .resource = eth_resources, |
@@ -199,7 +200,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {} | |||
199 | * -------------------------------------------------------------------- */ | 200 | * -------------------------------------------------------------------- */ |
200 | 201 | ||
201 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | 202 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
202 | static u64 mmc_dmamask = 0xffffffffUL; | 203 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
203 | static struct at91_mmc_data mmc_data; | 204 | static struct at91_mmc_data mmc_data; |
204 | 205 | ||
205 | static struct resource mmc_resources[] = { | 206 | static struct resource mmc_resources[] = { |
@@ -220,7 +221,7 @@ static struct platform_device at91sam9260_mmc_device = { | |||
220 | .id = -1, | 221 | .id = -1, |
221 | .dev = { | 222 | .dev = { |
222 | .dma_mask = &mmc_dmamask, | 223 | .dma_mask = &mmc_dmamask, |
223 | .coherent_dma_mask = 0xffffffff, | 224 | .coherent_dma_mask = DMA_BIT_MASK(32), |
224 | .platform_data = &mmc_data, | 225 | .platform_data = &mmc_data, |
225 | }, | 226 | }, |
226 | .resource = mmc_resources, | 227 | .resource = mmc_resources, |
@@ -289,7 +290,7 @@ static struct at91_nand_data nand_data; | |||
289 | static struct resource nand_resources[] = { | 290 | static struct resource nand_resources[] = { |
290 | { | 291 | { |
291 | .start = NAND_BASE, | 292 | .start = NAND_BASE, |
292 | .end = NAND_BASE + SZ_8M - 1, | 293 | .end = NAND_BASE + SZ_256M - 1, |
293 | .flags = IORESOURCE_MEM, | 294 | .flags = IORESOURCE_MEM, |
294 | } | 295 | } |
295 | }; | 296 | }; |
@@ -312,7 +313,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) | |||
312 | return; | 313 | return; |
313 | 314 | ||
314 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | 315 | csa = at91_sys_read(AT91_MATRIX_EBICSA); |
315 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); | 316 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
316 | 317 | ||
317 | /* set the bus interface characteristics */ | 318 | /* set the bus interface characteristics */ |
318 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | 319 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
@@ -431,7 +432,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |||
431 | * -------------------------------------------------------------------- */ | 432 | * -------------------------------------------------------------------- */ |
432 | 433 | ||
433 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 434 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
434 | static u64 spi_dmamask = 0xffffffffUL; | 435 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
435 | 436 | ||
436 | static struct resource spi0_resources[] = { | 437 | static struct resource spi0_resources[] = { |
437 | [0] = { | 438 | [0] = { |
@@ -451,7 +452,7 @@ static struct platform_device at91sam9260_spi0_device = { | |||
451 | .id = 0, | 452 | .id = 0, |
452 | .dev = { | 453 | .dev = { |
453 | .dma_mask = &spi_dmamask, | 454 | .dma_mask = &spi_dmamask, |
454 | .coherent_dma_mask = 0xffffffff, | 455 | .coherent_dma_mask = DMA_BIT_MASK(32), |
455 | }, | 456 | }, |
456 | .resource = spi0_resources, | 457 | .resource = spi0_resources, |
457 | .num_resources = ARRAY_SIZE(spi0_resources), | 458 | .num_resources = ARRAY_SIZE(spi0_resources), |
@@ -477,7 +478,7 @@ static struct platform_device at91sam9260_spi1_device = { | |||
477 | .id = 1, | 478 | .id = 1, |
478 | .dev = { | 479 | .dev = { |
479 | .dma_mask = &spi_dmamask, | 480 | .dma_mask = &spi_dmamask, |
480 | .coherent_dma_mask = 0xffffffff, | 481 | .coherent_dma_mask = DMA_BIT_MASK(32), |
481 | }, | 482 | }, |
482 | .resource = spi1_resources, | 483 | .resource = spi1_resources, |
483 | .num_resources = ARRAY_SIZE(spi1_resources), | 484 | .num_resources = ARRAY_SIZE(spi1_resources), |
@@ -539,24 +540,126 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
539 | 540 | ||
540 | 541 | ||
541 | /* -------------------------------------------------------------------- | 542 | /* -------------------------------------------------------------------- |
542 | * LEDs | 543 | * RTT |
543 | * -------------------------------------------------------------------- */ | 544 | * -------------------------------------------------------------------- */ |
544 | 545 | ||
545 | #if defined(CONFIG_LEDS) | 546 | static struct resource rtt_resources[] = { |
546 | u8 at91_leds_cpu; | 547 | { |
547 | u8 at91_leds_timer; | 548 | .start = AT91_BASE_SYS + AT91_RTT, |
549 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | ||
550 | .flags = IORESOURCE_MEM, | ||
551 | } | ||
552 | }; | ||
548 | 553 | ||
549 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | 554 | static struct platform_device at91sam9260_rtt_device = { |
555 | .name = "at91_rtt", | ||
556 | .id = -1, | ||
557 | .resource = rtt_resources, | ||
558 | .num_resources = ARRAY_SIZE(rtt_resources), | ||
559 | }; | ||
560 | |||
561 | static void __init at91_add_device_rtt(void) | ||
550 | { | 562 | { |
551 | /* Enable GPIO to access the LEDs */ | 563 | platform_device_register(&at91sam9260_rtt_device); |
552 | at91_set_gpio_output(cpu_led, 1); | 564 | } |
553 | at91_set_gpio_output(timer_led, 1); | 565 | |
554 | 566 | ||
555 | at91_leds_cpu = cpu_led; | 567 | /* -------------------------------------------------------------------- |
556 | at91_leds_timer = timer_led; | 568 | * Watchdog |
569 | * -------------------------------------------------------------------- */ | ||
570 | |||
571 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | ||
572 | static struct platform_device at91sam9260_wdt_device = { | ||
573 | .name = "at91_wdt", | ||
574 | .id = -1, | ||
575 | .num_resources = 0, | ||
576 | }; | ||
577 | |||
578 | static void __init at91_add_device_watchdog(void) | ||
579 | { | ||
580 | platform_device_register(&at91sam9260_wdt_device); | ||
557 | } | 581 | } |
558 | #else | 582 | #else |
559 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | 583 | static void __init at91_add_device_watchdog(void) {} |
584 | #endif | ||
585 | |||
586 | |||
587 | /* -------------------------------------------------------------------- | ||
588 | * SSC -- Synchronous Serial Controller | ||
589 | * -------------------------------------------------------------------- */ | ||
590 | |||
591 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) | ||
592 | static u64 ssc_dmamask = DMA_BIT_MASK(32); | ||
593 | |||
594 | static struct resource ssc_resources[] = { | ||
595 | [0] = { | ||
596 | .start = AT91SAM9260_BASE_SSC, | ||
597 | .end = AT91SAM9260_BASE_SSC + SZ_16K - 1, | ||
598 | .flags = IORESOURCE_MEM, | ||
599 | }, | ||
600 | [1] = { | ||
601 | .start = AT91SAM9260_ID_SSC, | ||
602 | .end = AT91SAM9260_ID_SSC, | ||
603 | .flags = IORESOURCE_IRQ, | ||
604 | }, | ||
605 | }; | ||
606 | |||
607 | static struct platform_device at91sam9260_ssc_device = { | ||
608 | .name = "ssc", | ||
609 | .id = 0, | ||
610 | .dev = { | ||
611 | .dma_mask = &ssc_dmamask, | ||
612 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
613 | }, | ||
614 | .resource = ssc_resources, | ||
615 | .num_resources = ARRAY_SIZE(ssc_resources), | ||
616 | }; | ||
617 | |||
618 | static inline void configure_ssc_pins(unsigned pins) | ||
619 | { | ||
620 | if (pins & ATMEL_SSC_TF) | ||
621 | at91_set_A_periph(AT91_PIN_PB17, 1); | ||
622 | if (pins & ATMEL_SSC_TK) | ||
623 | at91_set_A_periph(AT91_PIN_PB16, 1); | ||
624 | if (pins & ATMEL_SSC_TD) | ||
625 | at91_set_A_periph(AT91_PIN_PB18, 1); | ||
626 | if (pins & ATMEL_SSC_RD) | ||
627 | at91_set_A_periph(AT91_PIN_PB19, 1); | ||
628 | if (pins & ATMEL_SSC_RK) | ||
629 | at91_set_A_periph(AT91_PIN_PB20, 1); | ||
630 | if (pins & ATMEL_SSC_RF) | ||
631 | at91_set_A_periph(AT91_PIN_PB21, 1); | ||
632 | } | ||
633 | |||
634 | /* | ||
635 | * SSC controllers are accessed through library code, instead of any | ||
636 | * kind of all-singing/all-dancing driver. For example one could be | ||
637 | * used by a particular I2S audio codec's driver, while another one | ||
638 | * on the same system might be used by a custom data capture driver. | ||
639 | */ | ||
640 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
641 | { | ||
642 | struct platform_device *pdev; | ||
643 | |||
644 | /* | ||
645 | * NOTE: caller is responsible for passing information matching | ||
646 | * "pins" to whatever will be using each particular controller. | ||
647 | */ | ||
648 | switch (id) { | ||
649 | case AT91SAM9260_ID_SSC: | ||
650 | pdev = &at91sam9260_ssc_device; | ||
651 | configure_ssc_pins(pins); | ||
652 | at91_clock_associate("ssc_clk", &pdev->dev, "pclk"); | ||
653 | break; | ||
654 | default: | ||
655 | return; | ||
656 | } | ||
657 | |||
658 | platform_device_register(pdev); | ||
659 | } | ||
660 | |||
661 | #else | ||
662 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | ||
560 | #endif | 663 | #endif |
561 | 664 | ||
562 | 665 | ||
@@ -583,12 +686,15 @@ static struct atmel_uart_data dbgu_data = { | |||
583 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | 686 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
584 | }; | 687 | }; |
585 | 688 | ||
689 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
690 | |||
586 | static struct platform_device at91sam9260_dbgu_device = { | 691 | static struct platform_device at91sam9260_dbgu_device = { |
587 | .name = "atmel_usart", | 692 | .name = "atmel_usart", |
588 | .id = 0, | 693 | .id = 0, |
589 | .dev = { | 694 | .dev = { |
590 | .platform_data = &dbgu_data, | 695 | .dma_mask = &dbgu_dmamask, |
591 | .coherent_dma_mask = 0xffffffff, | 696 | .coherent_dma_mask = DMA_BIT_MASK(32), |
697 | .platform_data = &dbgu_data, | ||
592 | }, | 698 | }, |
593 | .resource = dbgu_resources, | 699 | .resource = dbgu_resources, |
594 | .num_resources = ARRAY_SIZE(dbgu_resources), | 700 | .num_resources = ARRAY_SIZE(dbgu_resources), |
@@ -618,27 +724,37 @@ static struct atmel_uart_data uart0_data = { | |||
618 | .use_dma_rx = 1, | 724 | .use_dma_rx = 1, |
619 | }; | 725 | }; |
620 | 726 | ||
727 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
728 | |||
621 | static struct platform_device at91sam9260_uart0_device = { | 729 | static struct platform_device at91sam9260_uart0_device = { |
622 | .name = "atmel_usart", | 730 | .name = "atmel_usart", |
623 | .id = 1, | 731 | .id = 1, |
624 | .dev = { | 732 | .dev = { |
625 | .platform_data = &uart0_data, | 733 | .dma_mask = &uart0_dmamask, |
626 | .coherent_dma_mask = 0xffffffff, | 734 | .coherent_dma_mask = DMA_BIT_MASK(32), |
735 | .platform_data = &uart0_data, | ||
627 | }, | 736 | }, |
628 | .resource = uart0_resources, | 737 | .resource = uart0_resources, |
629 | .num_resources = ARRAY_SIZE(uart0_resources), | 738 | .num_resources = ARRAY_SIZE(uart0_resources), |
630 | }; | 739 | }; |
631 | 740 | ||
632 | static inline void configure_usart0_pins(void) | 741 | static inline void configure_usart0_pins(unsigned pins) |
633 | { | 742 | { |
634 | at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ | 743 | at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */ |
635 | at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ | 744 | at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */ |
636 | at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ | 745 | |
637 | at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ | 746 | if (pins & ATMEL_UART_RTS) |
638 | at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ | 747 | at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */ |
639 | at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ | 748 | if (pins & ATMEL_UART_CTS) |
640 | at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ | 749 | at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */ |
641 | at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ | 750 | if (pins & ATMEL_UART_DTR) |
751 | at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */ | ||
752 | if (pins & ATMEL_UART_DSR) | ||
753 | at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */ | ||
754 | if (pins & ATMEL_UART_DCD) | ||
755 | at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */ | ||
756 | if (pins & ATMEL_UART_RI) | ||
757 | at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */ | ||
642 | } | 758 | } |
643 | 759 | ||
644 | static struct resource uart1_resources[] = { | 760 | static struct resource uart1_resources[] = { |
@@ -659,23 +775,29 @@ static struct atmel_uart_data uart1_data = { | |||
659 | .use_dma_rx = 1, | 775 | .use_dma_rx = 1, |
660 | }; | 776 | }; |
661 | 777 | ||
778 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
779 | |||
662 | static struct platform_device at91sam9260_uart1_device = { | 780 | static struct platform_device at91sam9260_uart1_device = { |
663 | .name = "atmel_usart", | 781 | .name = "atmel_usart", |
664 | .id = 2, | 782 | .id = 2, |
665 | .dev = { | 783 | .dev = { |
666 | .platform_data = &uart1_data, | 784 | .dma_mask = &uart1_dmamask, |
667 | .coherent_dma_mask = 0xffffffff, | 785 | .coherent_dma_mask = DMA_BIT_MASK(32), |
786 | .platform_data = &uart1_data, | ||
668 | }, | 787 | }, |
669 | .resource = uart1_resources, | 788 | .resource = uart1_resources, |
670 | .num_resources = ARRAY_SIZE(uart1_resources), | 789 | .num_resources = ARRAY_SIZE(uart1_resources), |
671 | }; | 790 | }; |
672 | 791 | ||
673 | static inline void configure_usart1_pins(void) | 792 | static inline void configure_usart1_pins(unsigned pins) |
674 | { | 793 | { |
675 | at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ | 794 | at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */ |
676 | at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ | 795 | at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */ |
677 | at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ | 796 | |
678 | at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ | 797 | if (pins & ATMEL_UART_RTS) |
798 | at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */ | ||
799 | if (pins & ATMEL_UART_CTS) | ||
800 | at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */ | ||
679 | } | 801 | } |
680 | 802 | ||
681 | static struct resource uart2_resources[] = { | 803 | static struct resource uart2_resources[] = { |
@@ -696,21 +818,29 @@ static struct atmel_uart_data uart2_data = { | |||
696 | .use_dma_rx = 1, | 818 | .use_dma_rx = 1, |
697 | }; | 819 | }; |
698 | 820 | ||
821 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
822 | |||
699 | static struct platform_device at91sam9260_uart2_device = { | 823 | static struct platform_device at91sam9260_uart2_device = { |
700 | .name = "atmel_usart", | 824 | .name = "atmel_usart", |
701 | .id = 3, | 825 | .id = 3, |
702 | .dev = { | 826 | .dev = { |
703 | .platform_data = &uart2_data, | 827 | .dma_mask = &uart2_dmamask, |
704 | .coherent_dma_mask = 0xffffffff, | 828 | .coherent_dma_mask = DMA_BIT_MASK(32), |
829 | .platform_data = &uart2_data, | ||
705 | }, | 830 | }, |
706 | .resource = uart2_resources, | 831 | .resource = uart2_resources, |
707 | .num_resources = ARRAY_SIZE(uart2_resources), | 832 | .num_resources = ARRAY_SIZE(uart2_resources), |
708 | }; | 833 | }; |
709 | 834 | ||
710 | static inline void configure_usart2_pins(void) | 835 | static inline void configure_usart2_pins(unsigned pins) |
711 | { | 836 | { |
712 | at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ | 837 | at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */ |
713 | at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ | 838 | at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */ |
839 | |||
840 | if (pins & ATMEL_UART_RTS) | ||
841 | at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */ | ||
842 | if (pins & ATMEL_UART_CTS) | ||
843 | at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */ | ||
714 | } | 844 | } |
715 | 845 | ||
716 | static struct resource uart3_resources[] = { | 846 | static struct resource uart3_resources[] = { |
@@ -731,21 +861,29 @@ static struct atmel_uart_data uart3_data = { | |||
731 | .use_dma_rx = 1, | 861 | .use_dma_rx = 1, |
732 | }; | 862 | }; |
733 | 863 | ||
864 | static u64 uart3_dmamask = DMA_BIT_MASK(32); | ||
865 | |||
734 | static struct platform_device at91sam9260_uart3_device = { | 866 | static struct platform_device at91sam9260_uart3_device = { |
735 | .name = "atmel_usart", | 867 | .name = "atmel_usart", |
736 | .id = 4, | 868 | .id = 4, |
737 | .dev = { | 869 | .dev = { |
738 | .platform_data = &uart3_data, | 870 | .dma_mask = &uart3_dmamask, |
739 | .coherent_dma_mask = 0xffffffff, | 871 | .coherent_dma_mask = DMA_BIT_MASK(32), |
872 | .platform_data = &uart3_data, | ||
740 | }, | 873 | }, |
741 | .resource = uart3_resources, | 874 | .resource = uart3_resources, |
742 | .num_resources = ARRAY_SIZE(uart3_resources), | 875 | .num_resources = ARRAY_SIZE(uart3_resources), |
743 | }; | 876 | }; |
744 | 877 | ||
745 | static inline void configure_usart3_pins(void) | 878 | static inline void configure_usart3_pins(unsigned pins) |
746 | { | 879 | { |
747 | at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ | 880 | at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */ |
748 | at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ | 881 | at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */ |
882 | |||
883 | if (pins & ATMEL_UART_RTS) | ||
884 | at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */ | ||
885 | if (pins & ATMEL_UART_CTS) | ||
886 | at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */ | ||
749 | } | 887 | } |
750 | 888 | ||
751 | static struct resource uart4_resources[] = { | 889 | static struct resource uart4_resources[] = { |
@@ -766,12 +904,15 @@ static struct atmel_uart_data uart4_data = { | |||
766 | .use_dma_rx = 1, | 904 | .use_dma_rx = 1, |
767 | }; | 905 | }; |
768 | 906 | ||
907 | static u64 uart4_dmamask = DMA_BIT_MASK(32); | ||
908 | |||
769 | static struct platform_device at91sam9260_uart4_device = { | 909 | static struct platform_device at91sam9260_uart4_device = { |
770 | .name = "atmel_usart", | 910 | .name = "atmel_usart", |
771 | .id = 5, | 911 | .id = 5, |
772 | .dev = { | 912 | .dev = { |
773 | .platform_data = &uart4_data, | 913 | .dma_mask = &uart4_dmamask, |
774 | .coherent_dma_mask = 0xffffffff, | 914 | .coherent_dma_mask = DMA_BIT_MASK(32), |
915 | .platform_data = &uart4_data, | ||
775 | }, | 916 | }, |
776 | .resource = uart4_resources, | 917 | .resource = uart4_resources, |
777 | .num_resources = ARRAY_SIZE(uart4_resources), | 918 | .num_resources = ARRAY_SIZE(uart4_resources), |
@@ -801,12 +942,15 @@ static struct atmel_uart_data uart5_data = { | |||
801 | .use_dma_rx = 1, | 942 | .use_dma_rx = 1, |
802 | }; | 943 | }; |
803 | 944 | ||
945 | static u64 uart5_dmamask = DMA_BIT_MASK(32); | ||
946 | |||
804 | static struct platform_device at91sam9260_uart5_device = { | 947 | static struct platform_device at91sam9260_uart5_device = { |
805 | .name = "atmel_usart", | 948 | .name = "atmel_usart", |
806 | .id = 6, | 949 | .id = 6, |
807 | .dev = { | 950 | .dev = { |
808 | .platform_data = &uart5_data, | 951 | .dma_mask = &uart5_dmamask, |
809 | .coherent_dma_mask = 0xffffffff, | 952 | .coherent_dma_mask = DMA_BIT_MASK(32), |
953 | .platform_data = &uart5_data, | ||
810 | }, | 954 | }, |
811 | .resource = uart5_resources, | 955 | .resource = uart5_resources, |
812 | .num_resources = ARRAY_SIZE(uart5_resources), | 956 | .num_resources = ARRAY_SIZE(uart5_resources), |
@@ -818,10 +962,10 @@ static inline void configure_usart5_pins(void) | |||
818 | at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ | 962 | at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */ |
819 | } | 963 | } |
820 | 964 | ||
821 | struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 965 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
822 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 966 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
823 | 967 | ||
824 | void __init at91_init_serial(struct at91_uart_config *config) | 968 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) |
825 | { | 969 | { |
826 | int i; | 970 | int i; |
827 | 971 | ||
@@ -829,22 +973,22 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
829 | for (i = 0; i < config->nr_tty; i++) { | 973 | for (i = 0; i < config->nr_tty; i++) { |
830 | switch (config->tty_map[i]) { | 974 | switch (config->tty_map[i]) { |
831 | case 0: | 975 | case 0: |
832 | configure_usart0_pins(); | 976 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS | ATMEL_UART_DSR | ATMEL_UART_DTR | ATMEL_UART_DCD | ATMEL_UART_RI); |
833 | at91_uarts[i] = &at91sam9260_uart0_device; | 977 | at91_uarts[i] = &at91sam9260_uart0_device; |
834 | at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart"); | 978 | at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart"); |
835 | break; | 979 | break; |
836 | case 1: | 980 | case 1: |
837 | configure_usart1_pins(); | 981 | configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
838 | at91_uarts[i] = &at91sam9260_uart1_device; | 982 | at91_uarts[i] = &at91sam9260_uart1_device; |
839 | at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart"); | 983 | at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart"); |
840 | break; | 984 | break; |
841 | case 2: | 985 | case 2: |
842 | configure_usart2_pins(); | 986 | configure_usart2_pins(0); |
843 | at91_uarts[i] = &at91sam9260_uart2_device; | 987 | at91_uarts[i] = &at91sam9260_uart2_device; |
844 | at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart"); | 988 | at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart"); |
845 | break; | 989 | break; |
846 | case 3: | 990 | case 3: |
847 | configure_usart3_pins(); | 991 | configure_usart3_pins(0); |
848 | at91_uarts[i] = &at91sam9260_uart3_device; | 992 | at91_uarts[i] = &at91sam9260_uart3_device; |
849 | at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart"); | 993 | at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart"); |
850 | break; | 994 | break; |
@@ -876,6 +1020,63 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
876 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | 1020 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
877 | } | 1021 | } |
878 | 1022 | ||
1023 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
1024 | { | ||
1025 | struct platform_device *pdev; | ||
1026 | |||
1027 | switch (id) { | ||
1028 | case 0: /* DBGU */ | ||
1029 | pdev = &at91sam9260_dbgu_device; | ||
1030 | configure_dbgu_pins(); | ||
1031 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1032 | break; | ||
1033 | case AT91SAM9260_ID_US0: | ||
1034 | pdev = &at91sam9260_uart0_device; | ||
1035 | configure_usart0_pins(pins); | ||
1036 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1037 | break; | ||
1038 | case AT91SAM9260_ID_US1: | ||
1039 | pdev = &at91sam9260_uart1_device; | ||
1040 | configure_usart1_pins(pins); | ||
1041 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1042 | break; | ||
1043 | case AT91SAM9260_ID_US2: | ||
1044 | pdev = &at91sam9260_uart2_device; | ||
1045 | configure_usart2_pins(pins); | ||
1046 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1047 | break; | ||
1048 | case AT91SAM9260_ID_US3: | ||
1049 | pdev = &at91sam9260_uart3_device; | ||
1050 | configure_usart3_pins(pins); | ||
1051 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
1052 | break; | ||
1053 | case AT91SAM9260_ID_US4: | ||
1054 | pdev = &at91sam9260_uart4_device; | ||
1055 | configure_usart4_pins(); | ||
1056 | at91_clock_associate("usart4_clk", &pdev->dev, "usart"); | ||
1057 | break; | ||
1058 | case AT91SAM9260_ID_US5: | ||
1059 | pdev = &at91sam9260_uart5_device; | ||
1060 | configure_usart5_pins(); | ||
1061 | at91_clock_associate("usart5_clk", &pdev->dev, "usart"); | ||
1062 | break; | ||
1063 | default: | ||
1064 | return; | ||
1065 | } | ||
1066 | pdev->id = portnr; /* update to mapped ID */ | ||
1067 | |||
1068 | if (portnr < ATMEL_MAX_UART) | ||
1069 | at91_uarts[portnr] = pdev; | ||
1070 | } | ||
1071 | |||
1072 | void __init at91_set_serial_console(unsigned portnr) | ||
1073 | { | ||
1074 | if (portnr < ATMEL_MAX_UART) | ||
1075 | atmel_default_console_device = at91_uarts[portnr]; | ||
1076 | if (!atmel_default_console_device) | ||
1077 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1078 | } | ||
1079 | |||
879 | void __init at91_add_device_serial(void) | 1080 | void __init at91_add_device_serial(void) |
880 | { | 1081 | { |
881 | int i; | 1082 | int i; |
@@ -886,7 +1087,9 @@ void __init at91_add_device_serial(void) | |||
886 | } | 1087 | } |
887 | } | 1088 | } |
888 | #else | 1089 | #else |
889 | void __init at91_init_serial(struct at91_uart_config *config) {} | 1090 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} |
1091 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1092 | void __init at91_set_serial_console(unsigned portnr) {} | ||
890 | void __init at91_add_device_serial(void) {} | 1093 | void __init at91_add_device_serial(void) {} |
891 | #endif | 1094 | #endif |
892 | 1095 | ||
@@ -898,6 +1101,8 @@ void __init at91_add_device_serial(void) {} | |||
898 | */ | 1101 | */ |
899 | static int __init at91_add_standard_devices(void) | 1102 | static int __init at91_add_standard_devices(void) |
900 | { | 1103 | { |
1104 | at91_add_device_rtt(); | ||
1105 | at91_add_device_watchdog(); | ||
901 | return 0; | 1106 | return 0; |
902 | } | 1107 | } |
903 | 1108 | ||
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index dfe8c39c9fb9..90b87e1877d9 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -279,25 +279,25 @@ void __init at91sam9261_initialize(unsigned long main_clock) | |||
279 | static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { | 279 | static unsigned int at91sam9261_default_irq_priority[NR_AIC_IRQS] __initdata = { |
280 | 7, /* Advanced Interrupt Controller */ | 280 | 7, /* Advanced Interrupt Controller */ |
281 | 7, /* System Peripherals */ | 281 | 7, /* System Peripherals */ |
282 | 0, /* Parallel IO Controller A */ | 282 | 1, /* Parallel IO Controller A */ |
283 | 0, /* Parallel IO Controller B */ | 283 | 1, /* Parallel IO Controller B */ |
284 | 0, /* Parallel IO Controller C */ | 284 | 1, /* Parallel IO Controller C */ |
285 | 0, | 285 | 0, |
286 | 6, /* USART 0 */ | 286 | 5, /* USART 0 */ |
287 | 6, /* USART 1 */ | 287 | 5, /* USART 1 */ |
288 | 6, /* USART 2 */ | 288 | 5, /* USART 2 */ |
289 | 0, /* Multimedia Card Interface */ | 289 | 0, /* Multimedia Card Interface */ |
290 | 4, /* USB Device Port */ | 290 | 2, /* USB Device Port */ |
291 | 0, /* Two-Wire Interface */ | 291 | 6, /* Two-Wire Interface */ |
292 | 6, /* Serial Peripheral Interface 0 */ | 292 | 5, /* Serial Peripheral Interface 0 */ |
293 | 6, /* Serial Peripheral Interface 1 */ | 293 | 5, /* Serial Peripheral Interface 1 */ |
294 | 5, /* Serial Synchronous Controller 0 */ | 294 | 4, /* Serial Synchronous Controller 0 */ |
295 | 5, /* Serial Synchronous Controller 1 */ | 295 | 4, /* Serial Synchronous Controller 1 */ |
296 | 5, /* Serial Synchronous Controller 2 */ | 296 | 4, /* Serial Synchronous Controller 2 */ |
297 | 0, /* Timer Counter 0 */ | 297 | 0, /* Timer Counter 0 */ |
298 | 0, /* Timer Counter 1 */ | 298 | 0, /* Timer Counter 1 */ |
299 | 0, /* Timer Counter 2 */ | 299 | 0, /* Timer Counter 2 */ |
300 | 3, /* USB Host port */ | 300 | 2, /* USB Host port */ |
301 | 3, /* LCD Controller */ | 301 | 3, /* LCD Controller */ |
302 | 0, | 302 | 0, |
303 | 0, | 303 | 0, |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 64979a9023c2..245641263fce 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <asm/mach/arch.h> | 13 | #include <asm/mach/arch.h> |
14 | #include <asm/mach/map.h> | 14 | #include <asm/mach/map.h> |
15 | 15 | ||
16 | #include <linux/dma-mapping.h> | ||
16 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
17 | #include <linux/i2c-gpio.h> | 18 | #include <linux/i2c-gpio.h> |
18 | 19 | ||
@@ -33,7 +34,7 @@ | |||
33 | * -------------------------------------------------------------------- */ | 34 | * -------------------------------------------------------------------- */ |
34 | 35 | ||
35 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 36 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
36 | static u64 ohci_dmamask = 0xffffffffUL; | 37 | static u64 ohci_dmamask = DMA_BIT_MASK(32); |
37 | static struct at91_usbh_data usbh_data; | 38 | static struct at91_usbh_data usbh_data; |
38 | 39 | ||
39 | static struct resource usbh_resources[] = { | 40 | static struct resource usbh_resources[] = { |
@@ -54,7 +55,7 @@ static struct platform_device at91sam9261_usbh_device = { | |||
54 | .id = -1, | 55 | .id = -1, |
55 | .dev = { | 56 | .dev = { |
56 | .dma_mask = &ohci_dmamask, | 57 | .dma_mask = &ohci_dmamask, |
57 | .coherent_dma_mask = 0xffffffff, | 58 | .coherent_dma_mask = DMA_BIT_MASK(32), |
58 | .platform_data = &usbh_data, | 59 | .platform_data = &usbh_data, |
59 | }, | 60 | }, |
60 | .resource = usbh_resources, | 61 | .resource = usbh_resources, |
@@ -106,8 +107,6 @@ static struct platform_device at91sam9261_udc_device = { | |||
106 | 107 | ||
107 | void __init at91_add_device_udc(struct at91_udc_data *data) | 108 | void __init at91_add_device_udc(struct at91_udc_data *data) |
108 | { | 109 | { |
109 | unsigned long x; | ||
110 | |||
111 | if (!data) | 110 | if (!data) |
112 | return; | 111 | return; |
113 | 112 | ||
@@ -116,9 +115,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) | |||
116 | at91_set_deglitch(data->vbus_pin, 1); | 115 | at91_set_deglitch(data->vbus_pin, 1); |
117 | } | 116 | } |
118 | 117 | ||
119 | /* Pullup pin is handled internally */ | 118 | /* Pullup pin is handled internally by USB device peripheral */ |
120 | x = at91_sys_read(AT91_MATRIX_USBPUCR); | ||
121 | at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON); | ||
122 | 119 | ||
123 | udc_data = *data; | 120 | udc_data = *data; |
124 | platform_device_register(&at91sam9261_udc_device); | 121 | platform_device_register(&at91sam9261_udc_device); |
@@ -132,7 +129,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
132 | * -------------------------------------------------------------------- */ | 129 | * -------------------------------------------------------------------- */ |
133 | 130 | ||
134 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | 131 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
135 | static u64 mmc_dmamask = 0xffffffffUL; | 132 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
136 | static struct at91_mmc_data mmc_data; | 133 | static struct at91_mmc_data mmc_data; |
137 | 134 | ||
138 | static struct resource mmc_resources[] = { | 135 | static struct resource mmc_resources[] = { |
@@ -153,7 +150,7 @@ static struct platform_device at91sam9261_mmc_device = { | |||
153 | .id = -1, | 150 | .id = -1, |
154 | .dev = { | 151 | .dev = { |
155 | .dma_mask = &mmc_dmamask, | 152 | .dma_mask = &mmc_dmamask, |
156 | .coherent_dma_mask = 0xffffffff, | 153 | .coherent_dma_mask = DMA_BIT_MASK(32), |
157 | .platform_data = &mmc_data, | 154 | .platform_data = &mmc_data, |
158 | }, | 155 | }, |
159 | .resource = mmc_resources, | 156 | .resource = mmc_resources, |
@@ -232,7 +229,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) | |||
232 | return; | 229 | return; |
233 | 230 | ||
234 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | 231 | csa = at91_sys_read(AT91_MATRIX_EBICSA); |
235 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC); | 232 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); |
236 | 233 | ||
237 | /* set the bus interface characteristics */ | 234 | /* set the bus interface characteristics */ |
238 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | 235 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
@@ -354,7 +351,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |||
354 | * -------------------------------------------------------------------- */ | 351 | * -------------------------------------------------------------------- */ |
355 | 352 | ||
356 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 353 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
357 | static u64 spi_dmamask = 0xffffffffUL; | 354 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
358 | 355 | ||
359 | static struct resource spi0_resources[] = { | 356 | static struct resource spi0_resources[] = { |
360 | [0] = { | 357 | [0] = { |
@@ -374,7 +371,7 @@ static struct platform_device at91sam9261_spi0_device = { | |||
374 | .id = 0, | 371 | .id = 0, |
375 | .dev = { | 372 | .dev = { |
376 | .dma_mask = &spi_dmamask, | 373 | .dma_mask = &spi_dmamask, |
377 | .coherent_dma_mask = 0xffffffff, | 374 | .coherent_dma_mask = DMA_BIT_MASK(32), |
378 | }, | 375 | }, |
379 | .resource = spi0_resources, | 376 | .resource = spi0_resources, |
380 | .num_resources = ARRAY_SIZE(spi0_resources), | 377 | .num_resources = ARRAY_SIZE(spi0_resources), |
@@ -400,7 +397,7 @@ static struct platform_device at91sam9261_spi1_device = { | |||
400 | .id = 1, | 397 | .id = 1, |
401 | .dev = { | 398 | .dev = { |
402 | .dma_mask = &spi_dmamask, | 399 | .dma_mask = &spi_dmamask, |
403 | .coherent_dma_mask = 0xffffffff, | 400 | .coherent_dma_mask = DMA_BIT_MASK(32), |
404 | }, | 401 | }, |
405 | .resource = spi1_resources, | 402 | .resource = spi1_resources, |
406 | .num_resources = ARRAY_SIZE(spi1_resources), | 403 | .num_resources = ARRAY_SIZE(spi1_resources), |
@@ -466,7 +463,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
466 | * -------------------------------------------------------------------- */ | 463 | * -------------------------------------------------------------------- */ |
467 | 464 | ||
468 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | 465 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
469 | static u64 lcdc_dmamask = 0xffffffffUL; | 466 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); |
470 | static struct atmel_lcdfb_info lcdc_data; | 467 | static struct atmel_lcdfb_info lcdc_data; |
471 | 468 | ||
472 | static struct resource lcdc_resources[] = { | 469 | static struct resource lcdc_resources[] = { |
@@ -494,7 +491,7 @@ static struct platform_device at91_lcdc_device = { | |||
494 | .id = 0, | 491 | .id = 0, |
495 | .dev = { | 492 | .dev = { |
496 | .dma_mask = &lcdc_dmamask, | 493 | .dma_mask = &lcdc_dmamask, |
497 | .coherent_dma_mask = 0xffffffff, | 494 | .coherent_dma_mask = DMA_BIT_MASK(32), |
498 | .platform_data = &lcdc_data, | 495 | .platform_data = &lcdc_data, |
499 | }, | 496 | }, |
500 | .resource = lcdc_resources, | 497 | .resource = lcdc_resources, |
@@ -507,6 +504,17 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) | |||
507 | return; | 504 | return; |
508 | } | 505 | } |
509 | 506 | ||
507 | #if defined(CONFIG_FB_ATMEL_STN) | ||
508 | at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */ | ||
509 | at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ | ||
510 | at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ | ||
511 | at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ | ||
512 | at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ | ||
513 | at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */ | ||
514 | at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */ | ||
515 | at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ | ||
516 | at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ | ||
517 | #else | ||
510 | at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ | 518 | at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ |
511 | at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ | 519 | at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ |
512 | at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ | 520 | at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ |
@@ -529,6 +537,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) | |||
529 | at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ | 537 | at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ |
530 | at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ | 538 | at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ |
531 | at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ | 539 | at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ |
540 | #endif | ||
532 | 541 | ||
533 | lcdc_data = *data; | 542 | lcdc_data = *data; |
534 | platform_device_register(&at91_lcdc_device); | 543 | platform_device_register(&at91_lcdc_device); |
@@ -539,24 +548,220 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | |||
539 | 548 | ||
540 | 549 | ||
541 | /* -------------------------------------------------------------------- | 550 | /* -------------------------------------------------------------------- |
542 | * LEDs | 551 | * RTT |
552 | * -------------------------------------------------------------------- */ | ||
553 | |||
554 | static struct resource rtt_resources[] = { | ||
555 | { | ||
556 | .start = AT91_BASE_SYS + AT91_RTT, | ||
557 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | ||
558 | .flags = IORESOURCE_MEM, | ||
559 | } | ||
560 | }; | ||
561 | |||
562 | static struct platform_device at91sam9261_rtt_device = { | ||
563 | .name = "at91_rtt", | ||
564 | .id = -1, | ||
565 | .resource = rtt_resources, | ||
566 | .num_resources = ARRAY_SIZE(rtt_resources), | ||
567 | }; | ||
568 | |||
569 | static void __init at91_add_device_rtt(void) | ||
570 | { | ||
571 | platform_device_register(&at91sam9261_rtt_device); | ||
572 | } | ||
573 | |||
574 | |||
575 | /* -------------------------------------------------------------------- | ||
576 | * Watchdog | ||
577 | * -------------------------------------------------------------------- */ | ||
578 | |||
579 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | ||
580 | static struct platform_device at91sam9261_wdt_device = { | ||
581 | .name = "at91_wdt", | ||
582 | .id = -1, | ||
583 | .num_resources = 0, | ||
584 | }; | ||
585 | |||
586 | static void __init at91_add_device_watchdog(void) | ||
587 | { | ||
588 | platform_device_register(&at91sam9261_wdt_device); | ||
589 | } | ||
590 | #else | ||
591 | static void __init at91_add_device_watchdog(void) {} | ||
592 | #endif | ||
593 | |||
594 | |||
595 | /* -------------------------------------------------------------------- | ||
596 | * SSC -- Synchronous Serial Controller | ||
543 | * -------------------------------------------------------------------- */ | 597 | * -------------------------------------------------------------------- */ |
544 | 598 | ||
545 | #if defined(CONFIG_LEDS) | 599 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) |
546 | u8 at91_leds_cpu; | 600 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); |
547 | u8 at91_leds_timer; | 601 | |
602 | static struct resource ssc0_resources[] = { | ||
603 | [0] = { | ||
604 | .start = AT91SAM9261_BASE_SSC0, | ||
605 | .end = AT91SAM9261_BASE_SSC0 + SZ_16K - 1, | ||
606 | .flags = IORESOURCE_MEM, | ||
607 | }, | ||
608 | [1] = { | ||
609 | .start = AT91SAM9261_ID_SSC0, | ||
610 | .end = AT91SAM9261_ID_SSC0, | ||
611 | .flags = IORESOURCE_IRQ, | ||
612 | }, | ||
613 | }; | ||
614 | |||
615 | static struct platform_device at91sam9261_ssc0_device = { | ||
616 | .name = "ssc", | ||
617 | .id = 0, | ||
618 | .dev = { | ||
619 | .dma_mask = &ssc0_dmamask, | ||
620 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
621 | }, | ||
622 | .resource = ssc0_resources, | ||
623 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
624 | }; | ||
625 | |||
626 | static inline void configure_ssc0_pins(unsigned pins) | ||
627 | { | ||
628 | if (pins & ATMEL_SSC_TF) | ||
629 | at91_set_A_periph(AT91_PIN_PB21, 1); | ||
630 | if (pins & ATMEL_SSC_TK) | ||
631 | at91_set_A_periph(AT91_PIN_PB22, 1); | ||
632 | if (pins & ATMEL_SSC_TD) | ||
633 | at91_set_A_periph(AT91_PIN_PB23, 1); | ||
634 | if (pins & ATMEL_SSC_RD) | ||
635 | at91_set_A_periph(AT91_PIN_PB24, 1); | ||
636 | if (pins & ATMEL_SSC_RK) | ||
637 | at91_set_A_periph(AT91_PIN_PB25, 1); | ||
638 | if (pins & ATMEL_SSC_RF) | ||
639 | at91_set_A_periph(AT91_PIN_PB26, 1); | ||
640 | } | ||
641 | |||
642 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
643 | |||
644 | static struct resource ssc1_resources[] = { | ||
645 | [0] = { | ||
646 | .start = AT91SAM9261_BASE_SSC1, | ||
647 | .end = AT91SAM9261_BASE_SSC1 + SZ_16K - 1, | ||
648 | .flags = IORESOURCE_MEM, | ||
649 | }, | ||
650 | [1] = { | ||
651 | .start = AT91SAM9261_ID_SSC1, | ||
652 | .end = AT91SAM9261_ID_SSC1, | ||
653 | .flags = IORESOURCE_IRQ, | ||
654 | }, | ||
655 | }; | ||
656 | |||
657 | static struct platform_device at91sam9261_ssc1_device = { | ||
658 | .name = "ssc", | ||
659 | .id = 1, | ||
660 | .dev = { | ||
661 | .dma_mask = &ssc1_dmamask, | ||
662 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
663 | }, | ||
664 | .resource = ssc1_resources, | ||
665 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
666 | }; | ||
667 | |||
668 | static inline void configure_ssc1_pins(unsigned pins) | ||
669 | { | ||
670 | if (pins & ATMEL_SSC_TF) | ||
671 | at91_set_B_periph(AT91_PIN_PA17, 1); | ||
672 | if (pins & ATMEL_SSC_TK) | ||
673 | at91_set_B_periph(AT91_PIN_PA18, 1); | ||
674 | if (pins & ATMEL_SSC_TD) | ||
675 | at91_set_B_periph(AT91_PIN_PA19, 1); | ||
676 | if (pins & ATMEL_SSC_RD) | ||
677 | at91_set_B_periph(AT91_PIN_PA20, 1); | ||
678 | if (pins & ATMEL_SSC_RK) | ||
679 | at91_set_B_periph(AT91_PIN_PA21, 1); | ||
680 | if (pins & ATMEL_SSC_RF) | ||
681 | at91_set_B_periph(AT91_PIN_PA22, 1); | ||
682 | } | ||
683 | |||
684 | static u64 ssc2_dmamask = DMA_BIT_MASK(32); | ||
685 | |||
686 | static struct resource ssc2_resources[] = { | ||
687 | [0] = { | ||
688 | .start = AT91SAM9261_BASE_SSC2, | ||
689 | .end = AT91SAM9261_BASE_SSC2 + SZ_16K - 1, | ||
690 | .flags = IORESOURCE_MEM, | ||
691 | }, | ||
692 | [1] = { | ||
693 | .start = AT91SAM9261_ID_SSC2, | ||
694 | .end = AT91SAM9261_ID_SSC2, | ||
695 | .flags = IORESOURCE_IRQ, | ||
696 | }, | ||
697 | }; | ||
698 | |||
699 | static struct platform_device at91sam9261_ssc2_device = { | ||
700 | .name = "ssc", | ||
701 | .id = 2, | ||
702 | .dev = { | ||
703 | .dma_mask = &ssc2_dmamask, | ||
704 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
705 | }, | ||
706 | .resource = ssc2_resources, | ||
707 | .num_resources = ARRAY_SIZE(ssc2_resources), | ||
708 | }; | ||
709 | |||
710 | static inline void configure_ssc2_pins(unsigned pins) | ||
711 | { | ||
712 | if (pins & ATMEL_SSC_TF) | ||
713 | at91_set_B_periph(AT91_PIN_PC25, 1); | ||
714 | if (pins & ATMEL_SSC_TK) | ||
715 | at91_set_B_periph(AT91_PIN_PC26, 1); | ||
716 | if (pins & ATMEL_SSC_TD) | ||
717 | at91_set_B_periph(AT91_PIN_PC27, 1); | ||
718 | if (pins & ATMEL_SSC_RD) | ||
719 | at91_set_B_periph(AT91_PIN_PC28, 1); | ||
720 | if (pins & ATMEL_SSC_RK) | ||
721 | at91_set_B_periph(AT91_PIN_PC29, 1); | ||
722 | if (pins & ATMEL_SSC_RF) | ||
723 | at91_set_B_periph(AT91_PIN_PC30, 1); | ||
724 | } | ||
548 | 725 | ||
549 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | 726 | /* |
727 | * SSC controllers are accessed through library code, instead of any | ||
728 | * kind of all-singing/all-dancing driver. For example one could be | ||
729 | * used by a particular I2S audio codec's driver, while another one | ||
730 | * on the same system might be used by a custom data capture driver. | ||
731 | */ | ||
732 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
550 | { | 733 | { |
551 | /* Enable GPIO to access the LEDs */ | 734 | struct platform_device *pdev; |
552 | at91_set_gpio_output(cpu_led, 1); | 735 | |
553 | at91_set_gpio_output(timer_led, 1); | 736 | /* |
737 | * NOTE: caller is responsible for passing information matching | ||
738 | * "pins" to whatever will be using each particular controller. | ||
739 | */ | ||
740 | switch (id) { | ||
741 | case AT91SAM9261_ID_SSC0: | ||
742 | pdev = &at91sam9261_ssc0_device; | ||
743 | configure_ssc0_pins(pins); | ||
744 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
745 | break; | ||
746 | case AT91SAM9261_ID_SSC1: | ||
747 | pdev = &at91sam9261_ssc1_device; | ||
748 | configure_ssc1_pins(pins); | ||
749 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
750 | break; | ||
751 | case AT91SAM9261_ID_SSC2: | ||
752 | pdev = &at91sam9261_ssc2_device; | ||
753 | configure_ssc2_pins(pins); | ||
754 | at91_clock_associate("ssc2_clk", &pdev->dev, "pclk"); | ||
755 | break; | ||
756 | default: | ||
757 | return; | ||
758 | } | ||
554 | 759 | ||
555 | at91_leds_cpu = cpu_led; | 760 | platform_device_register(pdev); |
556 | at91_leds_timer = timer_led; | ||
557 | } | 761 | } |
762 | |||
558 | #else | 763 | #else |
559 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | 764 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} |
560 | #endif | 765 | #endif |
561 | 766 | ||
562 | 767 | ||
@@ -584,12 +789,15 @@ static struct atmel_uart_data dbgu_data = { | |||
584 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | 789 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
585 | }; | 790 | }; |
586 | 791 | ||
792 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
793 | |||
587 | static struct platform_device at91sam9261_dbgu_device = { | 794 | static struct platform_device at91sam9261_dbgu_device = { |
588 | .name = "atmel_usart", | 795 | .name = "atmel_usart", |
589 | .id = 0, | 796 | .id = 0, |
590 | .dev = { | 797 | .dev = { |
591 | .platform_data = &dbgu_data, | 798 | .dma_mask = &dbgu_dmamask, |
592 | .coherent_dma_mask = 0xffffffff, | 799 | .coherent_dma_mask = DMA_BIT_MASK(32), |
800 | .platform_data = &dbgu_data, | ||
593 | }, | 801 | }, |
594 | .resource = dbgu_resources, | 802 | .resource = dbgu_resources, |
595 | .num_resources = ARRAY_SIZE(dbgu_resources), | 803 | .num_resources = ARRAY_SIZE(dbgu_resources), |
@@ -619,23 +827,29 @@ static struct atmel_uart_data uart0_data = { | |||
619 | .use_dma_rx = 1, | 827 | .use_dma_rx = 1, |
620 | }; | 828 | }; |
621 | 829 | ||
830 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
831 | |||
622 | static struct platform_device at91sam9261_uart0_device = { | 832 | static struct platform_device at91sam9261_uart0_device = { |
623 | .name = "atmel_usart", | 833 | .name = "atmel_usart", |
624 | .id = 1, | 834 | .id = 1, |
625 | .dev = { | 835 | .dev = { |
626 | .platform_data = &uart0_data, | 836 | .dma_mask = &uart0_dmamask, |
627 | .coherent_dma_mask = 0xffffffff, | 837 | .coherent_dma_mask = DMA_BIT_MASK(32), |
838 | .platform_data = &uart0_data, | ||
628 | }, | 839 | }, |
629 | .resource = uart0_resources, | 840 | .resource = uart0_resources, |
630 | .num_resources = ARRAY_SIZE(uart0_resources), | 841 | .num_resources = ARRAY_SIZE(uart0_resources), |
631 | }; | 842 | }; |
632 | 843 | ||
633 | static inline void configure_usart0_pins(void) | 844 | static inline void configure_usart0_pins(unsigned pins) |
634 | { | 845 | { |
635 | at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ | 846 | at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ |
636 | at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ | 847 | at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ |
637 | at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ | 848 | |
638 | at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ | 849 | if (pins & ATMEL_UART_RTS) |
850 | at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */ | ||
851 | if (pins & ATMEL_UART_CTS) | ||
852 | at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */ | ||
639 | } | 853 | } |
640 | 854 | ||
641 | static struct resource uart1_resources[] = { | 855 | static struct resource uart1_resources[] = { |
@@ -656,21 +870,29 @@ static struct atmel_uart_data uart1_data = { | |||
656 | .use_dma_rx = 1, | 870 | .use_dma_rx = 1, |
657 | }; | 871 | }; |
658 | 872 | ||
873 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
874 | |||
659 | static struct platform_device at91sam9261_uart1_device = { | 875 | static struct platform_device at91sam9261_uart1_device = { |
660 | .name = "atmel_usart", | 876 | .name = "atmel_usart", |
661 | .id = 2, | 877 | .id = 2, |
662 | .dev = { | 878 | .dev = { |
663 | .platform_data = &uart1_data, | 879 | .dma_mask = &uart1_dmamask, |
664 | .coherent_dma_mask = 0xffffffff, | 880 | .coherent_dma_mask = DMA_BIT_MASK(32), |
881 | .platform_data = &uart1_data, | ||
665 | }, | 882 | }, |
666 | .resource = uart1_resources, | 883 | .resource = uart1_resources, |
667 | .num_resources = ARRAY_SIZE(uart1_resources), | 884 | .num_resources = ARRAY_SIZE(uart1_resources), |
668 | }; | 885 | }; |
669 | 886 | ||
670 | static inline void configure_usart1_pins(void) | 887 | static inline void configure_usart1_pins(unsigned pins) |
671 | { | 888 | { |
672 | at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ | 889 | at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ |
673 | at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ | 890 | at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ |
891 | |||
892 | if (pins & ATMEL_UART_RTS) | ||
893 | at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */ | ||
894 | if (pins & ATMEL_UART_CTS) | ||
895 | at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */ | ||
674 | } | 896 | } |
675 | 897 | ||
676 | static struct resource uart2_resources[] = { | 898 | static struct resource uart2_resources[] = { |
@@ -691,27 +913,35 @@ static struct atmel_uart_data uart2_data = { | |||
691 | .use_dma_rx = 1, | 913 | .use_dma_rx = 1, |
692 | }; | 914 | }; |
693 | 915 | ||
916 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
917 | |||
694 | static struct platform_device at91sam9261_uart2_device = { | 918 | static struct platform_device at91sam9261_uart2_device = { |
695 | .name = "atmel_usart", | 919 | .name = "atmel_usart", |
696 | .id = 3, | 920 | .id = 3, |
697 | .dev = { | 921 | .dev = { |
698 | .platform_data = &uart2_data, | 922 | .dma_mask = &uart2_dmamask, |
699 | .coherent_dma_mask = 0xffffffff, | 923 | .coherent_dma_mask = DMA_BIT_MASK(32), |
924 | .platform_data = &uart2_data, | ||
700 | }, | 925 | }, |
701 | .resource = uart2_resources, | 926 | .resource = uart2_resources, |
702 | .num_resources = ARRAY_SIZE(uart2_resources), | 927 | .num_resources = ARRAY_SIZE(uart2_resources), |
703 | }; | 928 | }; |
704 | 929 | ||
705 | static inline void configure_usart2_pins(void) | 930 | static inline void configure_usart2_pins(unsigned pins) |
706 | { | 931 | { |
707 | at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ | 932 | at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ |
708 | at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ | 933 | at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ |
934 | |||
935 | if (pins & ATMEL_UART_RTS) | ||
936 | at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/ | ||
937 | if (pins & ATMEL_UART_CTS) | ||
938 | at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */ | ||
709 | } | 939 | } |
710 | 940 | ||
711 | struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 941 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
712 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 942 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
713 | 943 | ||
714 | void __init at91_init_serial(struct at91_uart_config *config) | 944 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) |
715 | { | 945 | { |
716 | int i; | 946 | int i; |
717 | 947 | ||
@@ -719,17 +949,17 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
719 | for (i = 0; i < config->nr_tty; i++) { | 949 | for (i = 0; i < config->nr_tty; i++) { |
720 | switch (config->tty_map[i]) { | 950 | switch (config->tty_map[i]) { |
721 | case 0: | 951 | case 0: |
722 | configure_usart0_pins(); | 952 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
723 | at91_uarts[i] = &at91sam9261_uart0_device; | 953 | at91_uarts[i] = &at91sam9261_uart0_device; |
724 | at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart"); | 954 | at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart"); |
725 | break; | 955 | break; |
726 | case 1: | 956 | case 1: |
727 | configure_usart1_pins(); | 957 | configure_usart1_pins(0); |
728 | at91_uarts[i] = &at91sam9261_uart1_device; | 958 | at91_uarts[i] = &at91sam9261_uart1_device; |
729 | at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart"); | 959 | at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart"); |
730 | break; | 960 | break; |
731 | case 2: | 961 | case 2: |
732 | configure_usart2_pins(); | 962 | configure_usart2_pins(0); |
733 | at91_uarts[i] = &at91sam9261_uart2_device; | 963 | at91_uarts[i] = &at91sam9261_uart2_device; |
734 | at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart"); | 964 | at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart"); |
735 | break; | 965 | break; |
@@ -751,6 +981,48 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
751 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | 981 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
752 | } | 982 | } |
753 | 983 | ||
984 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
985 | { | ||
986 | struct platform_device *pdev; | ||
987 | |||
988 | switch (id) { | ||
989 | case 0: /* DBGU */ | ||
990 | pdev = &at91sam9261_dbgu_device; | ||
991 | configure_dbgu_pins(); | ||
992 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
993 | break; | ||
994 | case AT91SAM9261_ID_US0: | ||
995 | pdev = &at91sam9261_uart0_device; | ||
996 | configure_usart0_pins(pins); | ||
997 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
998 | break; | ||
999 | case AT91SAM9261_ID_US1: | ||
1000 | pdev = &at91sam9261_uart1_device; | ||
1001 | configure_usart1_pins(pins); | ||
1002 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1003 | break; | ||
1004 | case AT91SAM9261_ID_US2: | ||
1005 | pdev = &at91sam9261_uart2_device; | ||
1006 | configure_usart2_pins(pins); | ||
1007 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1008 | break; | ||
1009 | default: | ||
1010 | return; | ||
1011 | } | ||
1012 | pdev->id = portnr; /* update to mapped ID */ | ||
1013 | |||
1014 | if (portnr < ATMEL_MAX_UART) | ||
1015 | at91_uarts[portnr] = pdev; | ||
1016 | } | ||
1017 | |||
1018 | void __init at91_set_serial_console(unsigned portnr) | ||
1019 | { | ||
1020 | if (portnr < ATMEL_MAX_UART) | ||
1021 | atmel_default_console_device = at91_uarts[portnr]; | ||
1022 | if (!atmel_default_console_device) | ||
1023 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1024 | } | ||
1025 | |||
754 | void __init at91_add_device_serial(void) | 1026 | void __init at91_add_device_serial(void) |
755 | { | 1027 | { |
756 | int i; | 1028 | int i; |
@@ -761,7 +1033,9 @@ void __init at91_add_device_serial(void) | |||
761 | } | 1033 | } |
762 | } | 1034 | } |
763 | #else | 1035 | #else |
764 | void __init at91_init_serial(struct at91_uart_config *config) {} | 1036 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} |
1037 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1038 | void __init at91_set_serial_console(unsigned portnr) {} | ||
765 | void __init at91_add_device_serial(void) {} | 1039 | void __init at91_add_device_serial(void) {} |
766 | #endif | 1040 | #endif |
767 | 1041 | ||
@@ -774,6 +1048,8 @@ void __init at91_add_device_serial(void) {} | |||
774 | */ | 1048 | */ |
775 | static int __init at91_add_standard_devices(void) | 1049 | static int __init at91_add_standard_devices(void) |
776 | { | 1050 | { |
1051 | at91_add_device_rtt(); | ||
1052 | at91_add_device_watchdog(); | ||
777 | return 0; | 1053 | return 0; |
778 | } | 1054 | } |
779 | 1055 | ||
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 00e27b177857..a53ba0f74351 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -304,34 +304,34 @@ void __init at91sam9263_initialize(unsigned long main_clock) | |||
304 | static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { | 304 | static unsigned int at91sam9263_default_irq_priority[NR_AIC_IRQS] __initdata = { |
305 | 7, /* Advanced Interrupt Controller (FIQ) */ | 305 | 7, /* Advanced Interrupt Controller (FIQ) */ |
306 | 7, /* System Peripherals */ | 306 | 7, /* System Peripherals */ |
307 | 0, /* Parallel IO Controller A */ | 307 | 1, /* Parallel IO Controller A */ |
308 | 0, /* Parallel IO Controller B */ | 308 | 1, /* Parallel IO Controller B */ |
309 | 0, /* Parallel IO Controller C, D and E */ | 309 | 1, /* Parallel IO Controller C, D and E */ |
310 | 0, | 310 | 0, |
311 | 0, | 311 | 0, |
312 | 6, /* USART 0 */ | 312 | 5, /* USART 0 */ |
313 | 6, /* USART 1 */ | 313 | 5, /* USART 1 */ |
314 | 6, /* USART 2 */ | 314 | 5, /* USART 2 */ |
315 | 0, /* Multimedia Card Interface 0 */ | 315 | 0, /* Multimedia Card Interface 0 */ |
316 | 0, /* Multimedia Card Interface 1 */ | 316 | 0, /* Multimedia Card Interface 1 */ |
317 | 4, /* CAN */ | 317 | 3, /* CAN */ |
318 | 0, /* Two-Wire Interface */ | 318 | 6, /* Two-Wire Interface */ |
319 | 6, /* Serial Peripheral Interface 0 */ | 319 | 5, /* Serial Peripheral Interface 0 */ |
320 | 6, /* Serial Peripheral Interface 1 */ | 320 | 5, /* Serial Peripheral Interface 1 */ |
321 | 5, /* Serial Synchronous Controller 0 */ | 321 | 4, /* Serial Synchronous Controller 0 */ |
322 | 5, /* Serial Synchronous Controller 1 */ | 322 | 4, /* Serial Synchronous Controller 1 */ |
323 | 6, /* AC97 Controller */ | 323 | 5, /* AC97 Controller */ |
324 | 0, /* Timer Counter 0, 1 and 2 */ | 324 | 0, /* Timer Counter 0, 1 and 2 */ |
325 | 0, /* Pulse Width Modulation Controller */ | 325 | 0, /* Pulse Width Modulation Controller */ |
326 | 3, /* Ethernet */ | 326 | 3, /* Ethernet */ |
327 | 0, | 327 | 0, |
328 | 0, /* 2D Graphic Engine */ | 328 | 0, /* 2D Graphic Engine */ |
329 | 3, /* USB Device Port */ | 329 | 2, /* USB Device Port */ |
330 | 0, /* Image Sensor Interface */ | 330 | 0, /* Image Sensor Interface */ |
331 | 3, /* LDC Controller */ | 331 | 3, /* LDC Controller */ |
332 | 0, /* DMA Controller */ | 332 | 0, /* DMA Controller */ |
333 | 0, | 333 | 0, |
334 | 3, /* USB Host port */ | 334 | 2, /* USB Host port */ |
335 | 0, /* Advanced Interrupt Controller (IRQ0) */ | 335 | 0, /* Advanced Interrupt Controller (IRQ0) */ |
336 | 0, /* Advanced Interrupt Controller (IRQ1) */ | 336 | 0, /* Advanced Interrupt Controller (IRQ1) */ |
337 | }; | 337 | }; |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index ac329a98e959..0b12e1adcc8e 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <asm/mach/arch.h> | 12 | #include <asm/mach/arch.h> |
13 | #include <asm/mach/map.h> | 13 | #include <asm/mach/map.h> |
14 | 14 | ||
15 | #include <linux/dma-mapping.h> | ||
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
16 | #include <linux/i2c-gpio.h> | 17 | #include <linux/i2c-gpio.h> |
17 | 18 | ||
@@ -32,7 +33,7 @@ | |||
32 | * -------------------------------------------------------------------- */ | 33 | * -------------------------------------------------------------------- */ |
33 | 34 | ||
34 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | 35 | #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) |
35 | static u64 ohci_dmamask = 0xffffffffUL; | 36 | static u64 ohci_dmamask = DMA_BIT_MASK(32); |
36 | static struct at91_usbh_data usbh_data; | 37 | static struct at91_usbh_data usbh_data; |
37 | 38 | ||
38 | static struct resource usbh_resources[] = { | 39 | static struct resource usbh_resources[] = { |
@@ -53,7 +54,7 @@ static struct platform_device at91_usbh_device = { | |||
53 | .id = -1, | 54 | .id = -1, |
54 | .dev = { | 55 | .dev = { |
55 | .dma_mask = &ohci_dmamask, | 56 | .dma_mask = &ohci_dmamask, |
56 | .coherent_dma_mask = 0xffffffff, | 57 | .coherent_dma_mask = DMA_BIT_MASK(32), |
57 | .platform_data = &usbh_data, | 58 | .platform_data = &usbh_data, |
58 | }, | 59 | }, |
59 | .resource = usbh_resources, | 60 | .resource = usbh_resources, |
@@ -136,7 +137,7 @@ void __init at91_add_device_udc(struct at91_udc_data *data) {} | |||
136 | * -------------------------------------------------------------------- */ | 137 | * -------------------------------------------------------------------- */ |
137 | 138 | ||
138 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | 139 | #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) |
139 | static u64 eth_dmamask = 0xffffffffUL; | 140 | static u64 eth_dmamask = DMA_BIT_MASK(32); |
140 | static struct at91_eth_data eth_data; | 141 | static struct at91_eth_data eth_data; |
141 | 142 | ||
142 | static struct resource eth_resources[] = { | 143 | static struct resource eth_resources[] = { |
@@ -157,7 +158,7 @@ static struct platform_device at91sam9263_eth_device = { | |||
157 | .id = -1, | 158 | .id = -1, |
158 | .dev = { | 159 | .dev = { |
159 | .dma_mask = ð_dmamask, | 160 | .dma_mask = ð_dmamask, |
160 | .coherent_dma_mask = 0xffffffff, | 161 | .coherent_dma_mask = DMA_BIT_MASK(32), |
161 | .platform_data = ð_data, | 162 | .platform_data = ð_data, |
162 | }, | 163 | }, |
163 | .resource = eth_resources, | 164 | .resource = eth_resources, |
@@ -210,7 +211,7 @@ void __init at91_add_device_eth(struct at91_eth_data *data) {} | |||
210 | * -------------------------------------------------------------------- */ | 211 | * -------------------------------------------------------------------- */ |
211 | 212 | ||
212 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | 213 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
213 | static u64 mmc_dmamask = 0xffffffffUL; | 214 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
214 | static struct at91_mmc_data mmc0_data, mmc1_data; | 215 | static struct at91_mmc_data mmc0_data, mmc1_data; |
215 | 216 | ||
216 | static struct resource mmc0_resources[] = { | 217 | static struct resource mmc0_resources[] = { |
@@ -231,7 +232,7 @@ static struct platform_device at91sam9263_mmc0_device = { | |||
231 | .id = 0, | 232 | .id = 0, |
232 | .dev = { | 233 | .dev = { |
233 | .dma_mask = &mmc_dmamask, | 234 | .dma_mask = &mmc_dmamask, |
234 | .coherent_dma_mask = 0xffffffff, | 235 | .coherent_dma_mask = DMA_BIT_MASK(32), |
235 | .platform_data = &mmc0_data, | 236 | .platform_data = &mmc0_data, |
236 | }, | 237 | }, |
237 | .resource = mmc0_resources, | 238 | .resource = mmc0_resources, |
@@ -256,7 +257,7 @@ static struct platform_device at91sam9263_mmc1_device = { | |||
256 | .id = 1, | 257 | .id = 1, |
257 | .dev = { | 258 | .dev = { |
258 | .dma_mask = &mmc_dmamask, | 259 | .dma_mask = &mmc_dmamask, |
259 | .coherent_dma_mask = 0xffffffff, | 260 | .coherent_dma_mask = DMA_BIT_MASK(32), |
260 | .platform_data = &mmc1_data, | 261 | .platform_data = &mmc1_data, |
261 | }, | 262 | }, |
262 | .resource = mmc1_resources, | 263 | .resource = mmc1_resources, |
@@ -382,7 +383,7 @@ void __init at91_add_device_nand(struct at91_nand_data *data) | |||
382 | return; | 383 | return; |
383 | 384 | ||
384 | csa = at91_sys_read(AT91_MATRIX_EBI0CSA); | 385 | csa = at91_sys_read(AT91_MATRIX_EBI0CSA); |
385 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC); | 386 | at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); |
386 | 387 | ||
387 | /* set the bus interface characteristics */ | 388 | /* set the bus interface characteristics */ |
388 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | 389 | at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) |
@@ -500,7 +501,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |||
500 | * -------------------------------------------------------------------- */ | 501 | * -------------------------------------------------------------------- */ |
501 | 502 | ||
502 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 503 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
503 | static u64 spi_dmamask = 0xffffffffUL; | 504 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
504 | 505 | ||
505 | static struct resource spi0_resources[] = { | 506 | static struct resource spi0_resources[] = { |
506 | [0] = { | 507 | [0] = { |
@@ -520,7 +521,7 @@ static struct platform_device at91sam9263_spi0_device = { | |||
520 | .id = 0, | 521 | .id = 0, |
521 | .dev = { | 522 | .dev = { |
522 | .dma_mask = &spi_dmamask, | 523 | .dma_mask = &spi_dmamask, |
523 | .coherent_dma_mask = 0xffffffff, | 524 | .coherent_dma_mask = DMA_BIT_MASK(32), |
524 | }, | 525 | }, |
525 | .resource = spi0_resources, | 526 | .resource = spi0_resources, |
526 | .num_resources = ARRAY_SIZE(spi0_resources), | 527 | .num_resources = ARRAY_SIZE(spi0_resources), |
@@ -546,7 +547,7 @@ static struct platform_device at91sam9263_spi1_device = { | |||
546 | .id = 1, | 547 | .id = 1, |
547 | .dev = { | 548 | .dev = { |
548 | .dma_mask = &spi_dmamask, | 549 | .dma_mask = &spi_dmamask, |
549 | .coherent_dma_mask = 0xffffffff, | 550 | .coherent_dma_mask = DMA_BIT_MASK(32), |
550 | }, | 551 | }, |
551 | .resource = spi1_resources, | 552 | .resource = spi1_resources, |
552 | .num_resources = ARRAY_SIZE(spi1_resources), | 553 | .num_resources = ARRAY_SIZE(spi1_resources), |
@@ -612,7 +613,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
612 | * -------------------------------------------------------------------- */ | 613 | * -------------------------------------------------------------------- */ |
613 | 614 | ||
614 | #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) | 615 | #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE) |
615 | static u64 ac97_dmamask = 0xffffffffUL; | 616 | static u64 ac97_dmamask = DMA_BIT_MASK(32); |
616 | static struct atmel_ac97_data ac97_data; | 617 | static struct atmel_ac97_data ac97_data; |
617 | 618 | ||
618 | static struct resource ac97_resources[] = { | 619 | static struct resource ac97_resources[] = { |
@@ -633,7 +634,7 @@ static struct platform_device at91sam9263_ac97_device = { | |||
633 | .id = 1, | 634 | .id = 1, |
634 | .dev = { | 635 | .dev = { |
635 | .dma_mask = &ac97_dmamask, | 636 | .dma_mask = &ac97_dmamask, |
636 | .coherent_dma_mask = 0xffffffff, | 637 | .coherent_dma_mask = DMA_BIT_MASK(32), |
637 | .platform_data = &ac97_data, | 638 | .platform_data = &ac97_data, |
638 | }, | 639 | }, |
639 | .resource = ac97_resources, | 640 | .resource = ac97_resources, |
@@ -667,7 +668,7 @@ void __init at91_add_device_ac97(struct atmel_ac97_data *data) {} | |||
667 | * -------------------------------------------------------------------- */ | 668 | * -------------------------------------------------------------------- */ |
668 | 669 | ||
669 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | 670 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
670 | static u64 lcdc_dmamask = 0xffffffffUL; | 671 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); |
671 | static struct atmel_lcdfb_info lcdc_data; | 672 | static struct atmel_lcdfb_info lcdc_data; |
672 | 673 | ||
673 | static struct resource lcdc_resources[] = { | 674 | static struct resource lcdc_resources[] = { |
@@ -688,7 +689,7 @@ static struct platform_device at91_lcdc_device = { | |||
688 | .id = 0, | 689 | .id = 0, |
689 | .dev = { | 690 | .dev = { |
690 | .dma_mask = &lcdc_dmamask, | 691 | .dma_mask = &lcdc_dmamask, |
691 | .coherent_dma_mask = 0xffffffff, | 692 | .coherent_dma_mask = DMA_BIT_MASK(32), |
692 | .platform_data = &lcdc_data, | 693 | .platform_data = &lcdc_data, |
693 | }, | 694 | }, |
694 | .resource = lcdc_resources, | 695 | .resource = lcdc_resources, |
@@ -732,24 +733,242 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | |||
732 | 733 | ||
733 | 734 | ||
734 | /* -------------------------------------------------------------------- | 735 | /* -------------------------------------------------------------------- |
735 | * LEDs | 736 | * Image Sensor Interface |
736 | * -------------------------------------------------------------------- */ | 737 | * -------------------------------------------------------------------- */ |
737 | 738 | ||
738 | #if defined(CONFIG_LEDS) | 739 | #if defined(CONFIG_VIDEO_AT91_ISI) || defined(CONFIG_VIDEO_AT91_ISI_MODULE) |
739 | u8 at91_leds_cpu; | ||
740 | u8 at91_leds_timer; | ||
741 | 740 | ||
742 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | 741 | struct resource isi_resources[] = { |
742 | [0] = { | ||
743 | .start = AT91SAM9263_BASE_ISI, | ||
744 | .end = AT91SAM9263_BASE_ISI + SZ_16K - 1, | ||
745 | .flags = IORESOURCE_MEM, | ||
746 | }, | ||
747 | [1] = { | ||
748 | .start = AT91SAM9263_ID_ISI, | ||
749 | .end = AT91SAM9263_ID_ISI, | ||
750 | .flags = IORESOURCE_IRQ, | ||
751 | }, | ||
752 | }; | ||
753 | |||
754 | static struct platform_device at91sam9263_isi_device = { | ||
755 | .name = "at91_isi", | ||
756 | .id = -1, | ||
757 | .resource = isi_resources, | ||
758 | .num_resources = ARRAY_SIZE(isi_resources), | ||
759 | }; | ||
760 | |||
761 | void __init at91_add_device_isi(void) | ||
762 | { | ||
763 | at91_set_A_periph(AT91_PIN_PE0, 0); /* ISI_D0 */ | ||
764 | at91_set_A_periph(AT91_PIN_PE1, 0); /* ISI_D1 */ | ||
765 | at91_set_A_periph(AT91_PIN_PE2, 0); /* ISI_D2 */ | ||
766 | at91_set_A_periph(AT91_PIN_PE3, 0); /* ISI_D3 */ | ||
767 | at91_set_A_periph(AT91_PIN_PE4, 0); /* ISI_D4 */ | ||
768 | at91_set_A_periph(AT91_PIN_PE5, 0); /* ISI_D5 */ | ||
769 | at91_set_A_periph(AT91_PIN_PE6, 0); /* ISI_D6 */ | ||
770 | at91_set_A_periph(AT91_PIN_PE7, 0); /* ISI_D7 */ | ||
771 | at91_set_A_periph(AT91_PIN_PE8, 0); /* ISI_PCK */ | ||
772 | at91_set_A_periph(AT91_PIN_PE9, 0); /* ISI_HSYNC */ | ||
773 | at91_set_A_periph(AT91_PIN_PE10, 0); /* ISI_VSYNC */ | ||
774 | at91_set_B_periph(AT91_PIN_PE11, 0); /* ISI_MCK (PCK3) */ | ||
775 | at91_set_B_periph(AT91_PIN_PE12, 0); /* ISI_PD8 */ | ||
776 | at91_set_B_periph(AT91_PIN_PE13, 0); /* ISI_PD9 */ | ||
777 | at91_set_B_periph(AT91_PIN_PE14, 0); /* ISI_PD10 */ | ||
778 | at91_set_B_periph(AT91_PIN_PE15, 0); /* ISI_PD11 */ | ||
779 | } | ||
780 | #else | ||
781 | void __init at91_add_device_isi(void) {} | ||
782 | #endif | ||
783 | |||
784 | |||
785 | /* -------------------------------------------------------------------- | ||
786 | * RTT | ||
787 | * -------------------------------------------------------------------- */ | ||
788 | |||
789 | static struct resource rtt0_resources[] = { | ||
790 | { | ||
791 | .start = AT91_BASE_SYS + AT91_RTT0, | ||
792 | .end = AT91_BASE_SYS + AT91_RTT0 + SZ_16 - 1, | ||
793 | .flags = IORESOURCE_MEM, | ||
794 | } | ||
795 | }; | ||
796 | |||
797 | static struct platform_device at91sam9263_rtt0_device = { | ||
798 | .name = "at91_rtt", | ||
799 | .id = 0, | ||
800 | .resource = rtt0_resources, | ||
801 | .num_resources = ARRAY_SIZE(rtt0_resources), | ||
802 | }; | ||
803 | |||
804 | static struct resource rtt1_resources[] = { | ||
805 | { | ||
806 | .start = AT91_BASE_SYS + AT91_RTT1, | ||
807 | .end = AT91_BASE_SYS + AT91_RTT1 + SZ_16 - 1, | ||
808 | .flags = IORESOURCE_MEM, | ||
809 | } | ||
810 | }; | ||
811 | |||
812 | static struct platform_device at91sam9263_rtt1_device = { | ||
813 | .name = "at91_rtt", | ||
814 | .id = 1, | ||
815 | .resource = rtt1_resources, | ||
816 | .num_resources = ARRAY_SIZE(rtt1_resources), | ||
817 | }; | ||
818 | |||
819 | static void __init at91_add_device_rtt(void) | ||
820 | { | ||
821 | platform_device_register(&at91sam9263_rtt0_device); | ||
822 | platform_device_register(&at91sam9263_rtt1_device); | ||
823 | } | ||
824 | |||
825 | |||
826 | /* -------------------------------------------------------------------- | ||
827 | * Watchdog | ||
828 | * -------------------------------------------------------------------- */ | ||
829 | |||
830 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | ||
831 | static struct platform_device at91sam9263_wdt_device = { | ||
832 | .name = "at91_wdt", | ||
833 | .id = -1, | ||
834 | .num_resources = 0, | ||
835 | }; | ||
836 | |||
837 | static void __init at91_add_device_watchdog(void) | ||
838 | { | ||
839 | platform_device_register(&at91sam9263_wdt_device); | ||
840 | } | ||
841 | #else | ||
842 | static void __init at91_add_device_watchdog(void) {} | ||
843 | #endif | ||
844 | |||
845 | |||
846 | /* -------------------------------------------------------------------- | ||
847 | * SSC -- Synchronous Serial Controller | ||
848 | * -------------------------------------------------------------------- */ | ||
849 | |||
850 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) | ||
851 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); | ||
852 | |||
853 | static struct resource ssc0_resources[] = { | ||
854 | [0] = { | ||
855 | .start = AT91SAM9263_BASE_SSC0, | ||
856 | .end = AT91SAM9263_BASE_SSC0 + SZ_16K - 1, | ||
857 | .flags = IORESOURCE_MEM, | ||
858 | }, | ||
859 | [1] = { | ||
860 | .start = AT91SAM9263_ID_SSC0, | ||
861 | .end = AT91SAM9263_ID_SSC0, | ||
862 | .flags = IORESOURCE_IRQ, | ||
863 | }, | ||
864 | }; | ||
865 | |||
866 | static struct platform_device at91sam9263_ssc0_device = { | ||
867 | .name = "ssc", | ||
868 | .id = 0, | ||
869 | .dev = { | ||
870 | .dma_mask = &ssc0_dmamask, | ||
871 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
872 | }, | ||
873 | .resource = ssc0_resources, | ||
874 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
875 | }; | ||
876 | |||
877 | static inline void configure_ssc0_pins(unsigned pins) | ||
878 | { | ||
879 | if (pins & ATMEL_SSC_TF) | ||
880 | at91_set_B_periph(AT91_PIN_PB0, 1); | ||
881 | if (pins & ATMEL_SSC_TK) | ||
882 | at91_set_B_periph(AT91_PIN_PB1, 1); | ||
883 | if (pins & ATMEL_SSC_TD) | ||
884 | at91_set_B_periph(AT91_PIN_PB2, 1); | ||
885 | if (pins & ATMEL_SSC_RD) | ||
886 | at91_set_B_periph(AT91_PIN_PB3, 1); | ||
887 | if (pins & ATMEL_SSC_RK) | ||
888 | at91_set_B_periph(AT91_PIN_PB4, 1); | ||
889 | if (pins & ATMEL_SSC_RF) | ||
890 | at91_set_B_periph(AT91_PIN_PB5, 1); | ||
891 | } | ||
892 | |||
893 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
894 | |||
895 | static struct resource ssc1_resources[] = { | ||
896 | [0] = { | ||
897 | .start = AT91SAM9263_BASE_SSC1, | ||
898 | .end = AT91SAM9263_BASE_SSC1 + SZ_16K - 1, | ||
899 | .flags = IORESOURCE_MEM, | ||
900 | }, | ||
901 | [1] = { | ||
902 | .start = AT91SAM9263_ID_SSC1, | ||
903 | .end = AT91SAM9263_ID_SSC1, | ||
904 | .flags = IORESOURCE_IRQ, | ||
905 | }, | ||
906 | }; | ||
907 | |||
908 | static struct platform_device at91sam9263_ssc1_device = { | ||
909 | .name = "ssc", | ||
910 | .id = 1, | ||
911 | .dev = { | ||
912 | .dma_mask = &ssc1_dmamask, | ||
913 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
914 | }, | ||
915 | .resource = ssc1_resources, | ||
916 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
917 | }; | ||
918 | |||
919 | static inline void configure_ssc1_pins(unsigned pins) | ||
920 | { | ||
921 | if (pins & ATMEL_SSC_TF) | ||
922 | at91_set_A_periph(AT91_PIN_PB6, 1); | ||
923 | if (pins & ATMEL_SSC_TK) | ||
924 | at91_set_A_periph(AT91_PIN_PB7, 1); | ||
925 | if (pins & ATMEL_SSC_TD) | ||
926 | at91_set_A_periph(AT91_PIN_PB8, 1); | ||
927 | if (pins & ATMEL_SSC_RD) | ||
928 | at91_set_A_periph(AT91_PIN_PB9, 1); | ||
929 | if (pins & ATMEL_SSC_RK) | ||
930 | at91_set_A_periph(AT91_PIN_PB10, 1); | ||
931 | if (pins & ATMEL_SSC_RF) | ||
932 | at91_set_A_periph(AT91_PIN_PB11, 1); | ||
933 | } | ||
934 | |||
935 | /* | ||
936 | * Return the device node so that board init code can use it as the | ||
937 | * parent for the device node reflecting how it's used on this board. | ||
938 | * | ||
939 | * SSC controllers are accessed through library code, instead of any | ||
940 | * kind of all-singing/all-dancing driver. For example one could be | ||
941 | * used by a particular I2S audio codec's driver, while another one | ||
942 | * on the same system might be used by a custom data capture driver. | ||
943 | */ | ||
944 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
743 | { | 945 | { |
744 | /* Enable GPIO to access the LEDs */ | 946 | struct platform_device *pdev; |
745 | at91_set_gpio_output(cpu_led, 1); | 947 | |
746 | at91_set_gpio_output(timer_led, 1); | 948 | /* |
949 | * NOTE: caller is responsible for passing information matching | ||
950 | * "pins" to whatever will be using each particular controller. | ||
951 | */ | ||
952 | switch (id) { | ||
953 | case AT91SAM9263_ID_SSC0: | ||
954 | pdev = &at91sam9263_ssc0_device; | ||
955 | configure_ssc0_pins(pins); | ||
956 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
957 | break; | ||
958 | case AT91SAM9263_ID_SSC1: | ||
959 | pdev = &at91sam9263_ssc1_device; | ||
960 | configure_ssc1_pins(pins); | ||
961 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
962 | break; | ||
963 | default: | ||
964 | return; | ||
965 | } | ||
747 | 966 | ||
748 | at91_leds_cpu = cpu_led; | 967 | platform_device_register(pdev); |
749 | at91_leds_timer = timer_led; | ||
750 | } | 968 | } |
969 | |||
751 | #else | 970 | #else |
752 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | 971 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} |
753 | #endif | 972 | #endif |
754 | 973 | ||
755 | 974 | ||
@@ -778,12 +997,15 @@ static struct atmel_uart_data dbgu_data = { | |||
778 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | 997 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
779 | }; | 998 | }; |
780 | 999 | ||
1000 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
1001 | |||
781 | static struct platform_device at91sam9263_dbgu_device = { | 1002 | static struct platform_device at91sam9263_dbgu_device = { |
782 | .name = "atmel_usart", | 1003 | .name = "atmel_usart", |
783 | .id = 0, | 1004 | .id = 0, |
784 | .dev = { | 1005 | .dev = { |
785 | .platform_data = &dbgu_data, | 1006 | .dma_mask = &dbgu_dmamask, |
786 | .coherent_dma_mask = 0xffffffff, | 1007 | .coherent_dma_mask = DMA_BIT_MASK(32), |
1008 | .platform_data = &dbgu_data, | ||
787 | }, | 1009 | }, |
788 | .resource = dbgu_resources, | 1010 | .resource = dbgu_resources, |
789 | .num_resources = ARRAY_SIZE(dbgu_resources), | 1011 | .num_resources = ARRAY_SIZE(dbgu_resources), |
@@ -813,23 +1035,29 @@ static struct atmel_uart_data uart0_data = { | |||
813 | .use_dma_rx = 1, | 1035 | .use_dma_rx = 1, |
814 | }; | 1036 | }; |
815 | 1037 | ||
1038 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
1039 | |||
816 | static struct platform_device at91sam9263_uart0_device = { | 1040 | static struct platform_device at91sam9263_uart0_device = { |
817 | .name = "atmel_usart", | 1041 | .name = "atmel_usart", |
818 | .id = 1, | 1042 | .id = 1, |
819 | .dev = { | 1043 | .dev = { |
820 | .platform_data = &uart0_data, | 1044 | .dma_mask = &uart0_dmamask, |
821 | .coherent_dma_mask = 0xffffffff, | 1045 | .coherent_dma_mask = DMA_BIT_MASK(32), |
1046 | .platform_data = &uart0_data, | ||
822 | }, | 1047 | }, |
823 | .resource = uart0_resources, | 1048 | .resource = uart0_resources, |
824 | .num_resources = ARRAY_SIZE(uart0_resources), | 1049 | .num_resources = ARRAY_SIZE(uart0_resources), |
825 | }; | 1050 | }; |
826 | 1051 | ||
827 | static inline void configure_usart0_pins(void) | 1052 | static inline void configure_usart0_pins(unsigned pins) |
828 | { | 1053 | { |
829 | at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ | 1054 | at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ |
830 | at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ | 1055 | at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ |
831 | at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */ | 1056 | |
832 | at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */ | 1057 | if (pins & ATMEL_UART_RTS) |
1058 | at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */ | ||
1059 | if (pins & ATMEL_UART_CTS) | ||
1060 | at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */ | ||
833 | } | 1061 | } |
834 | 1062 | ||
835 | static struct resource uart1_resources[] = { | 1063 | static struct resource uart1_resources[] = { |
@@ -850,23 +1078,29 @@ static struct atmel_uart_data uart1_data = { | |||
850 | .use_dma_rx = 1, | 1078 | .use_dma_rx = 1, |
851 | }; | 1079 | }; |
852 | 1080 | ||
1081 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
1082 | |||
853 | static struct platform_device at91sam9263_uart1_device = { | 1083 | static struct platform_device at91sam9263_uart1_device = { |
854 | .name = "atmel_usart", | 1084 | .name = "atmel_usart", |
855 | .id = 2, | 1085 | .id = 2, |
856 | .dev = { | 1086 | .dev = { |
857 | .platform_data = &uart1_data, | 1087 | .dma_mask = &uart1_dmamask, |
858 | .coherent_dma_mask = 0xffffffff, | 1088 | .coherent_dma_mask = DMA_BIT_MASK(32), |
1089 | .platform_data = &uart1_data, | ||
859 | }, | 1090 | }, |
860 | .resource = uart1_resources, | 1091 | .resource = uart1_resources, |
861 | .num_resources = ARRAY_SIZE(uart1_resources), | 1092 | .num_resources = ARRAY_SIZE(uart1_resources), |
862 | }; | 1093 | }; |
863 | 1094 | ||
864 | static inline void configure_usart1_pins(void) | 1095 | static inline void configure_usart1_pins(unsigned pins) |
865 | { | 1096 | { |
866 | at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ | 1097 | at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ |
867 | at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ | 1098 | at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ |
868 | at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ | 1099 | |
869 | at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ | 1100 | if (pins & ATMEL_UART_RTS) |
1101 | at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */ | ||
1102 | if (pins & ATMEL_UART_CTS) | ||
1103 | at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */ | ||
870 | } | 1104 | } |
871 | 1105 | ||
872 | static struct resource uart2_resources[] = { | 1106 | static struct resource uart2_resources[] = { |
@@ -887,29 +1121,35 @@ static struct atmel_uart_data uart2_data = { | |||
887 | .use_dma_rx = 1, | 1121 | .use_dma_rx = 1, |
888 | }; | 1122 | }; |
889 | 1123 | ||
1124 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
1125 | |||
890 | static struct platform_device at91sam9263_uart2_device = { | 1126 | static struct platform_device at91sam9263_uart2_device = { |
891 | .name = "atmel_usart", | 1127 | .name = "atmel_usart", |
892 | .id = 3, | 1128 | .id = 3, |
893 | .dev = { | 1129 | .dev = { |
894 | .platform_data = &uart2_data, | 1130 | .dma_mask = &uart2_dmamask, |
895 | .coherent_dma_mask = 0xffffffff, | 1131 | .coherent_dma_mask = DMA_BIT_MASK(32), |
1132 | .platform_data = &uart2_data, | ||
896 | }, | 1133 | }, |
897 | .resource = uart2_resources, | 1134 | .resource = uart2_resources, |
898 | .num_resources = ARRAY_SIZE(uart2_resources), | 1135 | .num_resources = ARRAY_SIZE(uart2_resources), |
899 | }; | 1136 | }; |
900 | 1137 | ||
901 | static inline void configure_usart2_pins(void) | 1138 | static inline void configure_usart2_pins(unsigned pins) |
902 | { | 1139 | { |
903 | at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ | 1140 | at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ |
904 | at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ | 1141 | at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ |
905 | at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ | 1142 | |
906 | at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ | 1143 | if (pins & ATMEL_UART_RTS) |
1144 | at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */ | ||
1145 | if (pins & ATMEL_UART_CTS) | ||
1146 | at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */ | ||
907 | } | 1147 | } |
908 | 1148 | ||
909 | struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 1149 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
910 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 1150 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
911 | 1151 | ||
912 | void __init at91_init_serial(struct at91_uart_config *config) | 1152 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) |
913 | { | 1153 | { |
914 | int i; | 1154 | int i; |
915 | 1155 | ||
@@ -917,17 +1157,17 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
917 | for (i = 0; i < config->nr_tty; i++) { | 1157 | for (i = 0; i < config->nr_tty; i++) { |
918 | switch (config->tty_map[i]) { | 1158 | switch (config->tty_map[i]) { |
919 | case 0: | 1159 | case 0: |
920 | configure_usart0_pins(); | 1160 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
921 | at91_uarts[i] = &at91sam9263_uart0_device; | 1161 | at91_uarts[i] = &at91sam9263_uart0_device; |
922 | at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart"); | 1162 | at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart"); |
923 | break; | 1163 | break; |
924 | case 1: | 1164 | case 1: |
925 | configure_usart1_pins(); | 1165 | configure_usart1_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
926 | at91_uarts[i] = &at91sam9263_uart1_device; | 1166 | at91_uarts[i] = &at91sam9263_uart1_device; |
927 | at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart"); | 1167 | at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart"); |
928 | break; | 1168 | break; |
929 | case 2: | 1169 | case 2: |
930 | configure_usart2_pins(); | 1170 | configure_usart2_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
931 | at91_uarts[i] = &at91sam9263_uart2_device; | 1171 | at91_uarts[i] = &at91sam9263_uart2_device; |
932 | at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart"); | 1172 | at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart"); |
933 | break; | 1173 | break; |
@@ -949,6 +1189,48 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
949 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | 1189 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
950 | } | 1190 | } |
951 | 1191 | ||
1192 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
1193 | { | ||
1194 | struct platform_device *pdev; | ||
1195 | |||
1196 | switch (id) { | ||
1197 | case 0: /* DBGU */ | ||
1198 | pdev = &at91sam9263_dbgu_device; | ||
1199 | configure_dbgu_pins(); | ||
1200 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
1201 | break; | ||
1202 | case AT91SAM9263_ID_US0: | ||
1203 | pdev = &at91sam9263_uart0_device; | ||
1204 | configure_usart0_pins(pins); | ||
1205 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
1206 | break; | ||
1207 | case AT91SAM9263_ID_US1: | ||
1208 | pdev = &at91sam9263_uart1_device; | ||
1209 | configure_usart1_pins(pins); | ||
1210 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
1211 | break; | ||
1212 | case AT91SAM9263_ID_US2: | ||
1213 | pdev = &at91sam9263_uart2_device; | ||
1214 | configure_usart2_pins(pins); | ||
1215 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
1216 | break; | ||
1217 | default: | ||
1218 | return; | ||
1219 | } | ||
1220 | pdev->id = portnr; /* update to mapped ID */ | ||
1221 | |||
1222 | if (portnr < ATMEL_MAX_UART) | ||
1223 | at91_uarts[portnr] = pdev; | ||
1224 | } | ||
1225 | |||
1226 | void __init at91_set_serial_console(unsigned portnr) | ||
1227 | { | ||
1228 | if (portnr < ATMEL_MAX_UART) | ||
1229 | atmel_default_console_device = at91_uarts[portnr]; | ||
1230 | if (!atmel_default_console_device) | ||
1231 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
1232 | } | ||
1233 | |||
952 | void __init at91_add_device_serial(void) | 1234 | void __init at91_add_device_serial(void) |
953 | { | 1235 | { |
954 | int i; | 1236 | int i; |
@@ -960,6 +1242,8 @@ void __init at91_add_device_serial(void) | |||
960 | } | 1242 | } |
961 | #else | 1243 | #else |
962 | void __init at91_init_serial(struct at91_uart_config *config) {} | 1244 | void __init at91_init_serial(struct at91_uart_config *config) {} |
1245 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
1246 | void __init at91_set_serial_console(unsigned portnr) {} | ||
963 | void __init at91_add_device_serial(void) {} | 1247 | void __init at91_add_device_serial(void) {} |
964 | #endif | 1248 | #endif |
965 | 1249 | ||
@@ -971,6 +1255,8 @@ void __init at91_add_device_serial(void) {} | |||
971 | */ | 1255 | */ |
972 | static int __init at91_add_standard_devices(void) | 1256 | static int __init at91_add_standard_devices(void) |
973 | { | 1257 | { |
1258 | at91_add_device_rtt(); | ||
1259 | at91_add_device_watchdog(); | ||
974 | return 0; | 1260 | return 0; |
975 | } | 1261 | } |
976 | 1262 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 2bd60a3dc623..f43b5c33e45d 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c | |||
@@ -9,6 +9,7 @@ | |||
9 | #include <asm/mach/arch.h> | 9 | #include <asm/mach/arch.h> |
10 | #include <asm/mach/map.h> | 10 | #include <asm/mach/map.h> |
11 | 11 | ||
12 | #include <linux/dma-mapping.h> | ||
12 | #include <linux/platform_device.h> | 13 | #include <linux/platform_device.h> |
13 | #include <linux/i2c-gpio.h> | 14 | #include <linux/i2c-gpio.h> |
14 | 15 | ||
@@ -29,7 +30,7 @@ | |||
29 | * -------------------------------------------------------------------- */ | 30 | * -------------------------------------------------------------------- */ |
30 | 31 | ||
31 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | 32 | #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) |
32 | static u64 mmc_dmamask = 0xffffffffUL; | 33 | static u64 mmc_dmamask = DMA_BIT_MASK(32); |
33 | static struct at91_mmc_data mmc_data; | 34 | static struct at91_mmc_data mmc_data; |
34 | 35 | ||
35 | static struct resource mmc_resources[] = { | 36 | static struct resource mmc_resources[] = { |
@@ -50,7 +51,7 @@ static struct platform_device at91sam9rl_mmc_device = { | |||
50 | .id = -1, | 51 | .id = -1, |
51 | .dev = { | 52 | .dev = { |
52 | .dma_mask = &mmc_dmamask, | 53 | .dma_mask = &mmc_dmamask, |
53 | .coherent_dma_mask = 0xffffffff, | 54 | .coherent_dma_mask = DMA_BIT_MASK(32), |
54 | .platform_data = &mmc_data, | 55 | .platform_data = &mmc_data, |
55 | }, | 56 | }, |
56 | .resource = mmc_resources, | 57 | .resource = mmc_resources, |
@@ -247,7 +248,7 @@ void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |||
247 | * -------------------------------------------------------------------- */ | 248 | * -------------------------------------------------------------------- */ |
248 | 249 | ||
249 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | 250 | #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) |
250 | static u64 spi_dmamask = 0xffffffffUL; | 251 | static u64 spi_dmamask = DMA_BIT_MASK(32); |
251 | 252 | ||
252 | static struct resource spi_resources[] = { | 253 | static struct resource spi_resources[] = { |
253 | [0] = { | 254 | [0] = { |
@@ -267,7 +268,7 @@ static struct platform_device at91sam9rl_spi_device = { | |||
267 | .id = 0, | 268 | .id = 0, |
268 | .dev = { | 269 | .dev = { |
269 | .dma_mask = &spi_dmamask, | 270 | .dma_mask = &spi_dmamask, |
270 | .coherent_dma_mask = 0xffffffff, | 271 | .coherent_dma_mask = DMA_BIT_MASK(32), |
271 | }, | 272 | }, |
272 | .resource = spi_resources, | 273 | .resource = spi_resources, |
273 | .num_resources = ARRAY_SIZE(spi_resources), | 274 | .num_resources = ARRAY_SIZE(spi_resources), |
@@ -312,7 +313,7 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |||
312 | * -------------------------------------------------------------------- */ | 313 | * -------------------------------------------------------------------- */ |
313 | 314 | ||
314 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | 315 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
315 | static u64 lcdc_dmamask = 0xffffffffUL; | 316 | static u64 lcdc_dmamask = DMA_BIT_MASK(32); |
316 | static struct atmel_lcdfb_info lcdc_data; | 317 | static struct atmel_lcdfb_info lcdc_data; |
317 | 318 | ||
318 | static struct resource lcdc_resources[] = { | 319 | static struct resource lcdc_resources[] = { |
@@ -340,7 +341,7 @@ static struct platform_device at91_lcdc_device = { | |||
340 | .id = 0, | 341 | .id = 0, |
341 | .dev = { | 342 | .dev = { |
342 | .dma_mask = &lcdc_dmamask, | 343 | .dma_mask = &lcdc_dmamask, |
343 | .coherent_dma_mask = 0xffffffff, | 344 | .coherent_dma_mask = DMA_BIT_MASK(32), |
344 | .platform_data = &lcdc_data, | 345 | .platform_data = &lcdc_data, |
345 | }, | 346 | }, |
346 | .resource = lcdc_resources, | 347 | .resource = lcdc_resources, |
@@ -384,24 +385,196 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {} | |||
384 | 385 | ||
385 | 386 | ||
386 | /* -------------------------------------------------------------------- | 387 | /* -------------------------------------------------------------------- |
387 | * LEDs | 388 | * RTC |
388 | * -------------------------------------------------------------------- */ | 389 | * -------------------------------------------------------------------- */ |
389 | 390 | ||
390 | #if defined(CONFIG_LEDS) | 391 | #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE) |
391 | u8 at91_leds_cpu; | 392 | static struct platform_device at91sam9rl_rtc_device = { |
392 | u8 at91_leds_timer; | 393 | .name = "at91_rtc", |
394 | .id = -1, | ||
395 | .num_resources = 0, | ||
396 | }; | ||
393 | 397 | ||
394 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | 398 | static void __init at91_add_device_rtc(void) |
395 | { | 399 | { |
396 | /* Enable GPIO to access the LEDs */ | 400 | platform_device_register(&at91sam9rl_rtc_device); |
397 | at91_set_gpio_output(cpu_led, 1); | 401 | } |
398 | at91_set_gpio_output(timer_led, 1); | 402 | #else |
403 | static void __init at91_add_device_rtc(void) {} | ||
404 | #endif | ||
405 | |||
406 | |||
407 | /* -------------------------------------------------------------------- | ||
408 | * RTT | ||
409 | * -------------------------------------------------------------------- */ | ||
410 | |||
411 | static struct resource rtt_resources[] = { | ||
412 | { | ||
413 | .start = AT91_BASE_SYS + AT91_RTT, | ||
414 | .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | ||
415 | .flags = IORESOURCE_MEM, | ||
416 | } | ||
417 | }; | ||
418 | |||
419 | static struct platform_device at91sam9rl_rtt_device = { | ||
420 | .name = "at91_rtt", | ||
421 | .id = -1, | ||
422 | .resource = rtt_resources, | ||
423 | .num_resources = ARRAY_SIZE(rtt_resources), | ||
424 | }; | ||
399 | 425 | ||
400 | at91_leds_cpu = cpu_led; | 426 | static void __init at91_add_device_rtt(void) |
401 | at91_leds_timer = timer_led; | 427 | { |
428 | platform_device_register(&at91sam9rl_rtt_device); | ||
429 | } | ||
430 | |||
431 | |||
432 | /* -------------------------------------------------------------------- | ||
433 | * Watchdog | ||
434 | * -------------------------------------------------------------------- */ | ||
435 | |||
436 | #if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) | ||
437 | static struct platform_device at91sam9rl_wdt_device = { | ||
438 | .name = "at91_wdt", | ||
439 | .id = -1, | ||
440 | .num_resources = 0, | ||
441 | }; | ||
442 | |||
443 | static void __init at91_add_device_watchdog(void) | ||
444 | { | ||
445 | platform_device_register(&at91sam9rl_wdt_device); | ||
402 | } | 446 | } |
403 | #else | 447 | #else |
404 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | 448 | static void __init at91_add_device_watchdog(void) {} |
449 | #endif | ||
450 | |||
451 | |||
452 | /* -------------------------------------------------------------------- | ||
453 | * SSC -- Synchronous Serial Controller | ||
454 | * -------------------------------------------------------------------- */ | ||
455 | |||
456 | #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE) | ||
457 | static u64 ssc0_dmamask = DMA_BIT_MASK(32); | ||
458 | |||
459 | static struct resource ssc0_resources[] = { | ||
460 | [0] = { | ||
461 | .start = AT91SAM9RL_BASE_SSC0, | ||
462 | .end = AT91SAM9RL_BASE_SSC0 + SZ_16K - 1, | ||
463 | .flags = IORESOURCE_MEM, | ||
464 | }, | ||
465 | [1] = { | ||
466 | .start = AT91SAM9RL_ID_SSC0, | ||
467 | .end = AT91SAM9RL_ID_SSC0, | ||
468 | .flags = IORESOURCE_IRQ, | ||
469 | }, | ||
470 | }; | ||
471 | |||
472 | static struct platform_device at91sam9rl_ssc0_device = { | ||
473 | .name = "ssc", | ||
474 | .id = 0, | ||
475 | .dev = { | ||
476 | .dma_mask = &ssc0_dmamask, | ||
477 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
478 | }, | ||
479 | .resource = ssc0_resources, | ||
480 | .num_resources = ARRAY_SIZE(ssc0_resources), | ||
481 | }; | ||
482 | |||
483 | static inline void configure_ssc0_pins(unsigned pins) | ||
484 | { | ||
485 | if (pins & ATMEL_SSC_TF) | ||
486 | at91_set_A_periph(AT91_PIN_PC0, 1); | ||
487 | if (pins & ATMEL_SSC_TK) | ||
488 | at91_set_A_periph(AT91_PIN_PC1, 1); | ||
489 | if (pins & ATMEL_SSC_TD) | ||
490 | at91_set_A_periph(AT91_PIN_PA15, 1); | ||
491 | if (pins & ATMEL_SSC_RD) | ||
492 | at91_set_A_periph(AT91_PIN_PA16, 1); | ||
493 | if (pins & ATMEL_SSC_RK) | ||
494 | at91_set_B_periph(AT91_PIN_PA10, 1); | ||
495 | if (pins & ATMEL_SSC_RF) | ||
496 | at91_set_B_periph(AT91_PIN_PA22, 1); | ||
497 | } | ||
498 | |||
499 | static u64 ssc1_dmamask = DMA_BIT_MASK(32); | ||
500 | |||
501 | static struct resource ssc1_resources[] = { | ||
502 | [0] = { | ||
503 | .start = AT91SAM9RL_BASE_SSC1, | ||
504 | .end = AT91SAM9RL_BASE_SSC1 + SZ_16K - 1, | ||
505 | .flags = IORESOURCE_MEM, | ||
506 | }, | ||
507 | [1] = { | ||
508 | .start = AT91SAM9RL_ID_SSC1, | ||
509 | .end = AT91SAM9RL_ID_SSC1, | ||
510 | .flags = IORESOURCE_IRQ, | ||
511 | }, | ||
512 | }; | ||
513 | |||
514 | static struct platform_device at91sam9rl_ssc1_device = { | ||
515 | .name = "ssc", | ||
516 | .id = 1, | ||
517 | .dev = { | ||
518 | .dma_mask = &ssc1_dmamask, | ||
519 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
520 | }, | ||
521 | .resource = ssc1_resources, | ||
522 | .num_resources = ARRAY_SIZE(ssc1_resources), | ||
523 | }; | ||
524 | |||
525 | static inline void configure_ssc1_pins(unsigned pins) | ||
526 | { | ||
527 | if (pins & ATMEL_SSC_TF) | ||
528 | at91_set_B_periph(AT91_PIN_PA29, 1); | ||
529 | if (pins & ATMEL_SSC_TK) | ||
530 | at91_set_B_periph(AT91_PIN_PA30, 1); | ||
531 | if (pins & ATMEL_SSC_TD) | ||
532 | at91_set_B_periph(AT91_PIN_PA13, 1); | ||
533 | if (pins & ATMEL_SSC_RD) | ||
534 | at91_set_B_periph(AT91_PIN_PA14, 1); | ||
535 | if (pins & ATMEL_SSC_RK) | ||
536 | at91_set_B_periph(AT91_PIN_PA9, 1); | ||
537 | if (pins & ATMEL_SSC_RF) | ||
538 | at91_set_B_periph(AT91_PIN_PA8, 1); | ||
539 | } | ||
540 | |||
541 | /* | ||
542 | * Return the device node so that board init code can use it as the | ||
543 | * parent for the device node reflecting how it's used on this board. | ||
544 | * | ||
545 | * SSC controllers are accessed through library code, instead of any | ||
546 | * kind of all-singing/all-dancing driver. For example one could be | ||
547 | * used by a particular I2S audio codec's driver, while another one | ||
548 | * on the same system might be used by a custom data capture driver. | ||
549 | */ | ||
550 | void __init at91_add_device_ssc(unsigned id, unsigned pins) | ||
551 | { | ||
552 | struct platform_device *pdev; | ||
553 | |||
554 | /* | ||
555 | * NOTE: caller is responsible for passing information matching | ||
556 | * "pins" to whatever will be using each particular controller. | ||
557 | */ | ||
558 | switch (id) { | ||
559 | case AT91SAM9RL_ID_SSC0: | ||
560 | pdev = &at91sam9rl_ssc0_device; | ||
561 | configure_ssc0_pins(pins); | ||
562 | at91_clock_associate("ssc0_clk", &pdev->dev, "pclk"); | ||
563 | break; | ||
564 | case AT91SAM9RL_ID_SSC1: | ||
565 | pdev = &at91sam9rl_ssc1_device; | ||
566 | configure_ssc1_pins(pins); | ||
567 | at91_clock_associate("ssc1_clk", &pdev->dev, "pclk"); | ||
568 | break; | ||
569 | default: | ||
570 | return; | ||
571 | } | ||
572 | |||
573 | platform_device_register(pdev); | ||
574 | } | ||
575 | |||
576 | #else | ||
577 | void __init at91_add_device_ssc(unsigned id, unsigned pins) {} | ||
405 | #endif | 578 | #endif |
406 | 579 | ||
407 | 580 | ||
@@ -429,12 +602,15 @@ static struct atmel_uart_data dbgu_data = { | |||
429 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | 602 | .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), |
430 | }; | 603 | }; |
431 | 604 | ||
605 | static u64 dbgu_dmamask = DMA_BIT_MASK(32); | ||
606 | |||
432 | static struct platform_device at91sam9rl_dbgu_device = { | 607 | static struct platform_device at91sam9rl_dbgu_device = { |
433 | .name = "atmel_usart", | 608 | .name = "atmel_usart", |
434 | .id = 0, | 609 | .id = 0, |
435 | .dev = { | 610 | .dev = { |
436 | .platform_data = &dbgu_data, | 611 | .dma_mask = &dbgu_dmamask, |
437 | .coherent_dma_mask = 0xffffffff, | 612 | .coherent_dma_mask = DMA_BIT_MASK(32), |
613 | .platform_data = &dbgu_data, | ||
438 | }, | 614 | }, |
439 | .resource = dbgu_resources, | 615 | .resource = dbgu_resources, |
440 | .num_resources = ARRAY_SIZE(dbgu_resources), | 616 | .num_resources = ARRAY_SIZE(dbgu_resources), |
@@ -464,23 +640,37 @@ static struct atmel_uart_data uart0_data = { | |||
464 | .use_dma_rx = 1, | 640 | .use_dma_rx = 1, |
465 | }; | 641 | }; |
466 | 642 | ||
643 | static u64 uart0_dmamask = DMA_BIT_MASK(32); | ||
644 | |||
467 | static struct platform_device at91sam9rl_uart0_device = { | 645 | static struct platform_device at91sam9rl_uart0_device = { |
468 | .name = "atmel_usart", | 646 | .name = "atmel_usart", |
469 | .id = 1, | 647 | .id = 1, |
470 | .dev = { | 648 | .dev = { |
471 | .platform_data = &uart0_data, | 649 | .dma_mask = &uart0_dmamask, |
472 | .coherent_dma_mask = 0xffffffff, | 650 | .coherent_dma_mask = DMA_BIT_MASK(32), |
651 | .platform_data = &uart0_data, | ||
473 | }, | 652 | }, |
474 | .resource = uart0_resources, | 653 | .resource = uart0_resources, |
475 | .num_resources = ARRAY_SIZE(uart0_resources), | 654 | .num_resources = ARRAY_SIZE(uart0_resources), |
476 | }; | 655 | }; |
477 | 656 | ||
478 | static inline void configure_usart0_pins(void) | 657 | static inline void configure_usart0_pins(unsigned pins) |
479 | { | 658 | { |
480 | at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ | 659 | at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ |
481 | at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ | 660 | at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ |
482 | at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */ | 661 | |
483 | at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */ | 662 | if (pins & ATMEL_UART_RTS) |
663 | at91_set_A_periph(AT91_PIN_PA9, 0); /* RTS0 */ | ||
664 | if (pins & ATMEL_UART_CTS) | ||
665 | at91_set_A_periph(AT91_PIN_PA10, 0); /* CTS0 */ | ||
666 | if (pins & ATMEL_UART_DSR) | ||
667 | at91_set_A_periph(AT91_PIN_PD14, 0); /* DSR0 */ | ||
668 | if (pins & ATMEL_UART_DTR) | ||
669 | at91_set_A_periph(AT91_PIN_PD15, 0); /* DTR0 */ | ||
670 | if (pins & ATMEL_UART_DCD) | ||
671 | at91_set_A_periph(AT91_PIN_PD16, 0); /* DCD0 */ | ||
672 | if (pins & ATMEL_UART_RI) | ||
673 | at91_set_A_periph(AT91_PIN_PD17, 0); /* RI0 */ | ||
484 | } | 674 | } |
485 | 675 | ||
486 | static struct resource uart1_resources[] = { | 676 | static struct resource uart1_resources[] = { |
@@ -501,21 +691,29 @@ static struct atmel_uart_data uart1_data = { | |||
501 | .use_dma_rx = 1, | 691 | .use_dma_rx = 1, |
502 | }; | 692 | }; |
503 | 693 | ||
694 | static u64 uart1_dmamask = DMA_BIT_MASK(32); | ||
695 | |||
504 | static struct platform_device at91sam9rl_uart1_device = { | 696 | static struct platform_device at91sam9rl_uart1_device = { |
505 | .name = "atmel_usart", | 697 | .name = "atmel_usart", |
506 | .id = 2, | 698 | .id = 2, |
507 | .dev = { | 699 | .dev = { |
508 | .platform_data = &uart1_data, | 700 | .dma_mask = &uart1_dmamask, |
509 | .coherent_dma_mask = 0xffffffff, | 701 | .coherent_dma_mask = DMA_BIT_MASK(32), |
702 | .platform_data = &uart1_data, | ||
510 | }, | 703 | }, |
511 | .resource = uart1_resources, | 704 | .resource = uart1_resources, |
512 | .num_resources = ARRAY_SIZE(uart1_resources), | 705 | .num_resources = ARRAY_SIZE(uart1_resources), |
513 | }; | 706 | }; |
514 | 707 | ||
515 | static inline void configure_usart1_pins(void) | 708 | static inline void configure_usart1_pins(unsigned pins) |
516 | { | 709 | { |
517 | at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ | 710 | at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ |
518 | at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ | 711 | at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ |
712 | |||
713 | if (pins & ATMEL_UART_RTS) | ||
714 | at91_set_B_periph(AT91_PIN_PA18, 0); /* RTS1 */ | ||
715 | if (pins & ATMEL_UART_CTS) | ||
716 | at91_set_B_periph(AT91_PIN_PA19, 0); /* CTS1 */ | ||
519 | } | 717 | } |
520 | 718 | ||
521 | static struct resource uart2_resources[] = { | 719 | static struct resource uart2_resources[] = { |
@@ -536,21 +734,29 @@ static struct atmel_uart_data uart2_data = { | |||
536 | .use_dma_rx = 1, | 734 | .use_dma_rx = 1, |
537 | }; | 735 | }; |
538 | 736 | ||
737 | static u64 uart2_dmamask = DMA_BIT_MASK(32); | ||
738 | |||
539 | static struct platform_device at91sam9rl_uart2_device = { | 739 | static struct platform_device at91sam9rl_uart2_device = { |
540 | .name = "atmel_usart", | 740 | .name = "atmel_usart", |
541 | .id = 3, | 741 | .id = 3, |
542 | .dev = { | 742 | .dev = { |
543 | .platform_data = &uart2_data, | 743 | .dma_mask = &uart2_dmamask, |
544 | .coherent_dma_mask = 0xffffffff, | 744 | .coherent_dma_mask = DMA_BIT_MASK(32), |
745 | .platform_data = &uart2_data, | ||
545 | }, | 746 | }, |
546 | .resource = uart2_resources, | 747 | .resource = uart2_resources, |
547 | .num_resources = ARRAY_SIZE(uart2_resources), | 748 | .num_resources = ARRAY_SIZE(uart2_resources), |
548 | }; | 749 | }; |
549 | 750 | ||
550 | static inline void configure_usart2_pins(void) | 751 | static inline void configure_usart2_pins(unsigned pins) |
551 | { | 752 | { |
552 | at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ | 753 | at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ |
553 | at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ | 754 | at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ |
755 | |||
756 | if (pins & ATMEL_UART_RTS) | ||
757 | at91_set_A_periph(AT91_PIN_PA29, 0); /* RTS2 */ | ||
758 | if (pins & ATMEL_UART_CTS) | ||
759 | at91_set_A_periph(AT91_PIN_PA30, 0); /* CTS2 */ | ||
554 | } | 760 | } |
555 | 761 | ||
556 | static struct resource uart3_resources[] = { | 762 | static struct resource uart3_resources[] = { |
@@ -571,27 +777,35 @@ static struct atmel_uart_data uart3_data = { | |||
571 | .use_dma_rx = 1, | 777 | .use_dma_rx = 1, |
572 | }; | 778 | }; |
573 | 779 | ||
780 | static u64 uart3_dmamask = DMA_BIT_MASK(32); | ||
781 | |||
574 | static struct platform_device at91sam9rl_uart3_device = { | 782 | static struct platform_device at91sam9rl_uart3_device = { |
575 | .name = "atmel_usart", | 783 | .name = "atmel_usart", |
576 | .id = 4, | 784 | .id = 4, |
577 | .dev = { | 785 | .dev = { |
578 | .platform_data = &uart3_data, | 786 | .dma_mask = &uart3_dmamask, |
579 | .coherent_dma_mask = 0xffffffff, | 787 | .coherent_dma_mask = DMA_BIT_MASK(32), |
788 | .platform_data = &uart3_data, | ||
580 | }, | 789 | }, |
581 | .resource = uart3_resources, | 790 | .resource = uart3_resources, |
582 | .num_resources = ARRAY_SIZE(uart3_resources), | 791 | .num_resources = ARRAY_SIZE(uart3_resources), |
583 | }; | 792 | }; |
584 | 793 | ||
585 | static inline void configure_usart3_pins(void) | 794 | static inline void configure_usart3_pins(unsigned pins) |
586 | { | 795 | { |
587 | at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */ | 796 | at91_set_A_periph(AT91_PIN_PB0, 1); /* TXD3 */ |
588 | at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */ | 797 | at91_set_A_periph(AT91_PIN_PB1, 0); /* RXD3 */ |
798 | |||
799 | if (pins & ATMEL_UART_RTS) | ||
800 | at91_set_B_periph(AT91_PIN_PD4, 0); /* RTS3 */ | ||
801 | if (pins & ATMEL_UART_CTS) | ||
802 | at91_set_B_periph(AT91_PIN_PD3, 0); /* CTS3 */ | ||
589 | } | 803 | } |
590 | 804 | ||
591 | struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | 805 | static struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |
592 | struct platform_device *atmel_default_console_device; /* the serial console device */ | 806 | struct platform_device *atmel_default_console_device; /* the serial console device */ |
593 | 807 | ||
594 | void __init at91_init_serial(struct at91_uart_config *config) | 808 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) |
595 | { | 809 | { |
596 | int i; | 810 | int i; |
597 | 811 | ||
@@ -599,22 +813,22 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
599 | for (i = 0; i < config->nr_tty; i++) { | 813 | for (i = 0; i < config->nr_tty; i++) { |
600 | switch (config->tty_map[i]) { | 814 | switch (config->tty_map[i]) { |
601 | case 0: | 815 | case 0: |
602 | configure_usart0_pins(); | 816 | configure_usart0_pins(ATMEL_UART_CTS | ATMEL_UART_RTS); |
603 | at91_uarts[i] = &at91sam9rl_uart0_device; | 817 | at91_uarts[i] = &at91sam9rl_uart0_device; |
604 | at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart"); | 818 | at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart"); |
605 | break; | 819 | break; |
606 | case 1: | 820 | case 1: |
607 | configure_usart1_pins(); | 821 | configure_usart1_pins(0); |
608 | at91_uarts[i] = &at91sam9rl_uart1_device; | 822 | at91_uarts[i] = &at91sam9rl_uart1_device; |
609 | at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart"); | 823 | at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart"); |
610 | break; | 824 | break; |
611 | case 2: | 825 | case 2: |
612 | configure_usart2_pins(); | 826 | configure_usart2_pins(0); |
613 | at91_uarts[i] = &at91sam9rl_uart2_device; | 827 | at91_uarts[i] = &at91sam9rl_uart2_device; |
614 | at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart"); | 828 | at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart"); |
615 | break; | 829 | break; |
616 | case 3: | 830 | case 3: |
617 | configure_usart3_pins(); | 831 | configure_usart3_pins(0); |
618 | at91_uarts[i] = &at91sam9rl_uart3_device; | 832 | at91_uarts[i] = &at91sam9rl_uart3_device; |
619 | at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart"); | 833 | at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart"); |
620 | break; | 834 | break; |
@@ -636,6 +850,53 @@ void __init at91_init_serial(struct at91_uart_config *config) | |||
636 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | 850 | printk(KERN_INFO "AT91: No default serial console defined.\n"); |
637 | } | 851 | } |
638 | 852 | ||
853 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | ||
854 | { | ||
855 | struct platform_device *pdev; | ||
856 | |||
857 | switch (id) { | ||
858 | case 0: /* DBGU */ | ||
859 | pdev = &at91sam9rl_dbgu_device; | ||
860 | configure_dbgu_pins(); | ||
861 | at91_clock_associate("mck", &pdev->dev, "usart"); | ||
862 | break; | ||
863 | case AT91SAM9RL_ID_US0: | ||
864 | pdev = &at91sam9rl_uart0_device; | ||
865 | configure_usart0_pins(pins); | ||
866 | at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | ||
867 | break; | ||
868 | case AT91SAM9RL_ID_US1: | ||
869 | pdev = &at91sam9rl_uart1_device; | ||
870 | configure_usart1_pins(pins); | ||
871 | at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | ||
872 | break; | ||
873 | case AT91SAM9RL_ID_US2: | ||
874 | pdev = &at91sam9rl_uart2_device; | ||
875 | configure_usart2_pins(pins); | ||
876 | at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | ||
877 | break; | ||
878 | case AT91SAM9RL_ID_US3: | ||
879 | pdev = &at91sam9rl_uart3_device; | ||
880 | configure_usart3_pins(pins); | ||
881 | at91_clock_associate("usart3_clk", &pdev->dev, "usart"); | ||
882 | break; | ||
883 | default: | ||
884 | return; | ||
885 | } | ||
886 | pdev->id = portnr; /* update to mapped ID */ | ||
887 | |||
888 | if (portnr < ATMEL_MAX_UART) | ||
889 | at91_uarts[portnr] = pdev; | ||
890 | } | ||
891 | |||
892 | void __init at91_set_serial_console(unsigned portnr) | ||
893 | { | ||
894 | if (portnr < ATMEL_MAX_UART) | ||
895 | atmel_default_console_device = at91_uarts[portnr]; | ||
896 | if (!atmel_default_console_device) | ||
897 | printk(KERN_INFO "AT91: No default serial console defined.\n"); | ||
898 | } | ||
899 | |||
639 | void __init at91_add_device_serial(void) | 900 | void __init at91_add_device_serial(void) |
640 | { | 901 | { |
641 | int i; | 902 | int i; |
@@ -646,7 +907,9 @@ void __init at91_add_device_serial(void) | |||
646 | } | 907 | } |
647 | } | 908 | } |
648 | #else | 909 | #else |
649 | void __init at91_init_serial(struct at91_uart_config *config) {} | 910 | void __init __deprecated at91_init_serial(struct at91_uart_config *config) {} |
911 | void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | ||
912 | void __init at91_set_serial_console(unsigned portnr) {} | ||
650 | void __init at91_add_device_serial(void) {} | 913 | void __init at91_add_device_serial(void) {} |
651 | #endif | 914 | #endif |
652 | 915 | ||
@@ -659,6 +922,9 @@ void __init at91_add_device_serial(void) {} | |||
659 | */ | 922 | */ |
660 | static int __init at91_add_standard_devices(void) | 923 | static int __init at91_add_standard_devices(void) |
661 | { | 924 | { |
925 | at91_add_device_rtc(); | ||
926 | at91_add_device_rtt(); | ||
927 | at91_add_device_watchdog(); | ||
662 | return 0; | 928 | return 0; |
663 | } | 929 | } |
664 | 930 | ||
diff --git a/arch/arm/mach-at91/board-cap9adk.c b/arch/arm/mach-at91/board-cap9adk.c new file mode 100644 index 000000000000..185437131541 --- /dev/null +++ b/arch/arm/mach-at91/board-cap9adk.c | |||
@@ -0,0 +1,359 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-at91/board-cap9adk.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Stelian Pop <stelian.pop@leadtechdesign.com> | ||
5 | * Copyright (C) 2007 Lead Tech Design <www.leadtechdesign.com> | ||
6 | * Copyright (C) 2005 SAN People | ||
7 | * Copyright (C) 2007 Atmel Corporation. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/types.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/mm.h> | ||
27 | #include <linux/module.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | #include <linux/spi/spi.h> | ||
30 | #include <linux/spi/ads7846.h> | ||
31 | #include <linux/fb.h> | ||
32 | #include <linux/mtd/physmap.h> | ||
33 | |||
34 | #include <video/atmel_lcdc.h> | ||
35 | |||
36 | #include <asm/hardware.h> | ||
37 | #include <asm/setup.h> | ||
38 | #include <asm/mach-types.h> | ||
39 | #include <asm/irq.h> | ||
40 | |||
41 | #include <asm/mach/arch.h> | ||
42 | #include <asm/mach/map.h> | ||
43 | #include <asm/mach/irq.h> | ||
44 | |||
45 | #include <asm/arch/board.h> | ||
46 | #include <asm/arch/gpio.h> | ||
47 | #include <asm/arch/at91cap9_matrix.h> | ||
48 | #include <asm/arch/at91sam926x_mc.h> | ||
49 | |||
50 | #include "generic.h" | ||
51 | |||
52 | |||
53 | static void __init cap9adk_map_io(void) | ||
54 | { | ||
55 | /* Initialize processor: 12 MHz crystal */ | ||
56 | at91cap9_initialize(12000000); | ||
57 | |||
58 | /* Setup the LEDs: USER1 and USER2 LED for cpu/timer... */ | ||
59 | at91_init_leds(AT91_PIN_PA10, AT91_PIN_PA11); | ||
60 | /* ... POWER LED always on */ | ||
61 | at91_set_gpio_output(AT91_PIN_PC29, 1); | ||
62 | |||
63 | /* Setup the serial ports and console */ | ||
64 | at91_register_uart(0, 0, 0); /* DBGU = ttyS0 */ | ||
65 | at91_set_serial_console(0); | ||
66 | } | ||
67 | |||
68 | static void __init cap9adk_init_irq(void) | ||
69 | { | ||
70 | at91cap9_init_interrupts(NULL); | ||
71 | } | ||
72 | |||
73 | |||
74 | /* | ||
75 | * USB Host port | ||
76 | */ | ||
77 | static struct at91_usbh_data __initdata cap9adk_usbh_data = { | ||
78 | .ports = 2, | ||
79 | }; | ||
80 | |||
81 | |||
82 | /* | ||
83 | * ADS7846 Touchscreen | ||
84 | */ | ||
85 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
86 | static int ads7843_pendown_state(void) | ||
87 | { | ||
88 | return !at91_get_gpio_value(AT91_PIN_PC4); /* Touchscreen PENIRQ */ | ||
89 | } | ||
90 | |||
91 | static struct ads7846_platform_data ads_info = { | ||
92 | .model = 7843, | ||
93 | .x_min = 150, | ||
94 | .x_max = 3830, | ||
95 | .y_min = 190, | ||
96 | .y_max = 3830, | ||
97 | .vref_delay_usecs = 100, | ||
98 | .x_plate_ohms = 450, | ||
99 | .y_plate_ohms = 250, | ||
100 | .pressure_max = 15000, | ||
101 | .debounce_max = 1, | ||
102 | .debounce_rep = 0, | ||
103 | .debounce_tol = (~0), | ||
104 | .get_pendown_state = ads7843_pendown_state, | ||
105 | }; | ||
106 | |||
107 | static void __init cap9adk_add_device_ts(void) | ||
108 | { | ||
109 | at91_set_gpio_input(AT91_PIN_PC4, 1); /* Touchscreen PENIRQ */ | ||
110 | at91_set_gpio_input(AT91_PIN_PC5, 1); /* Touchscreen BUSY */ | ||
111 | } | ||
112 | #else | ||
113 | static void __init cap9adk_add_device_ts(void) {} | ||
114 | #endif | ||
115 | |||
116 | |||
117 | /* | ||
118 | * SPI devices. | ||
119 | */ | ||
120 | static struct spi_board_info cap9adk_spi_devices[] = { | ||
121 | #if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | ||
122 | { /* DataFlash card */ | ||
123 | .modalias = "mtd_dataflash", | ||
124 | .chip_select = 0, | ||
125 | .max_speed_hz = 15 * 1000 * 1000, | ||
126 | .bus_num = 0, | ||
127 | }, | ||
128 | #endif | ||
129 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
130 | { | ||
131 | .modalias = "ads7846", | ||
132 | .chip_select = 3, /* can be 2 or 3, depending on J2 jumper */ | ||
133 | .max_speed_hz = 125000 * 26, /* (max sample rate @ 3V) * (cmd + data + overhead) */ | ||
134 | .bus_num = 0, | ||
135 | .platform_data = &ads_info, | ||
136 | .irq = AT91_PIN_PC4, | ||
137 | }, | ||
138 | #endif | ||
139 | }; | ||
140 | |||
141 | |||
142 | /* | ||
143 | * MCI (SD/MMC) | ||
144 | */ | ||
145 | static struct at91_mmc_data __initdata cap9adk_mmc_data = { | ||
146 | .wire4 = 1, | ||
147 | // .det_pin = ... not connected | ||
148 | // .wp_pin = ... not connected | ||
149 | // .vcc_pin = ... not connected | ||
150 | }; | ||
151 | |||
152 | |||
153 | /* | ||
154 | * MACB Ethernet device | ||
155 | */ | ||
156 | static struct at91_eth_data __initdata cap9adk_macb_data = { | ||
157 | .is_rmii = 1, | ||
158 | }; | ||
159 | |||
160 | |||
161 | /* | ||
162 | * NAND flash | ||
163 | */ | ||
164 | static struct mtd_partition __initdata cap9adk_nand_partitions[] = { | ||
165 | { | ||
166 | .name = "NAND partition", | ||
167 | .offset = 0, | ||
168 | .size = MTDPART_SIZ_FULL, | ||
169 | }, | ||
170 | }; | ||
171 | |||
172 | static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) | ||
173 | { | ||
174 | *num_partitions = ARRAY_SIZE(cap9adk_nand_partitions); | ||
175 | return cap9adk_nand_partitions; | ||
176 | } | ||
177 | |||
178 | static struct at91_nand_data __initdata cap9adk_nand_data = { | ||
179 | .ale = 21, | ||
180 | .cle = 22, | ||
181 | // .det_pin = ... not connected | ||
182 | // .rdy_pin = ... not connected | ||
183 | .enable_pin = AT91_PIN_PD15, | ||
184 | .partition_info = nand_partitions, | ||
185 | #if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) | ||
186 | .bus_width_16 = 1, | ||
187 | #else | ||
188 | .bus_width_16 = 0, | ||
189 | #endif | ||
190 | }; | ||
191 | |||
192 | |||
193 | /* | ||
194 | * NOR flash | ||
195 | */ | ||
196 | static struct mtd_partition cap9adk_nor_partitions[] = { | ||
197 | { | ||
198 | .name = "NOR partition", | ||
199 | .offset = 0, | ||
200 | .size = MTDPART_SIZ_FULL, | ||
201 | }, | ||
202 | }; | ||
203 | |||
204 | static struct physmap_flash_data cap9adk_nor_data = { | ||
205 | .width = 2, | ||
206 | .parts = cap9adk_nor_partitions, | ||
207 | .nr_parts = ARRAY_SIZE(cap9adk_nor_partitions), | ||
208 | }; | ||
209 | |||
210 | #define NOR_BASE AT91_CHIPSELECT_0 | ||
211 | #define NOR_SIZE 0x800000 | ||
212 | |||
213 | static struct resource nor_flash_resources[] = { | ||
214 | { | ||
215 | .start = NOR_BASE, | ||
216 | .end = NOR_BASE + NOR_SIZE - 1, | ||
217 | .flags = IORESOURCE_MEM, | ||
218 | } | ||
219 | }; | ||
220 | |||
221 | static struct platform_device cap9adk_nor_flash = { | ||
222 | .name = "physmap-flash", | ||
223 | .id = 0, | ||
224 | .dev = { | ||
225 | .platform_data = &cap9adk_nor_data, | ||
226 | }, | ||
227 | .resource = nor_flash_resources, | ||
228 | .num_resources = ARRAY_SIZE(nor_flash_resources), | ||
229 | }; | ||
230 | |||
231 | static __init void cap9adk_add_device_nor(void) | ||
232 | { | ||
233 | unsigned long csa; | ||
234 | |||
235 | csa = at91_sys_read(AT91_MATRIX_EBICSA); | ||
236 | at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); | ||
237 | |||
238 | /* set the bus interface characteristics */ | ||
239 | at91_sys_write(AT91_SMC_SETUP(0), AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) | ||
240 | | AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2)); | ||
241 | |||
242 | at91_sys_write(AT91_SMC_PULSE(0), AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10) | ||
243 | | AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10)); | ||
244 | |||
245 | at91_sys_write(AT91_SMC_CYCLE(0), AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); | ||
246 | |||
247 | at91_sys_write(AT91_SMC_MODE(0), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | ||
248 | | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | ||
249 | | AT91_SMC_DBW_16 | AT91_SMC_TDF_(1)); | ||
250 | |||
251 | platform_device_register(&cap9adk_nor_flash); | ||
252 | } | ||
253 | |||
254 | |||
255 | /* | ||
256 | * LCD Controller | ||
257 | */ | ||
258 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | ||
259 | static struct fb_videomode at91_tft_vga_modes[] = { | ||
260 | { | ||
261 | .name = "TX09D50VM1CCA @ 60", | ||
262 | .refresh = 60, | ||
263 | .xres = 240, .yres = 320, | ||
264 | .pixclock = KHZ2PICOS(4965), | ||
265 | |||
266 | .left_margin = 1, .right_margin = 33, | ||
267 | .upper_margin = 1, .lower_margin = 0, | ||
268 | .hsync_len = 5, .vsync_len = 1, | ||
269 | |||
270 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
271 | .vmode = FB_VMODE_NONINTERLACED, | ||
272 | }, | ||
273 | }; | ||
274 | |||
275 | static struct fb_monspecs at91fb_default_monspecs = { | ||
276 | .manufacturer = "HIT", | ||
277 | .monitor = "TX09D70VM1CCA", | ||
278 | |||
279 | .modedb = at91_tft_vga_modes, | ||
280 | .modedb_len = ARRAY_SIZE(at91_tft_vga_modes), | ||
281 | .hfmin = 15000, | ||
282 | .hfmax = 64000, | ||
283 | .vfmin = 50, | ||
284 | .vfmax = 150, | ||
285 | }; | ||
286 | |||
287 | #define AT91CAP9_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | ||
288 | | ATMEL_LCDC_DISTYPE_TFT \ | ||
289 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) | ||
290 | |||
291 | static void at91_lcdc_power_control(int on) | ||
292 | { | ||
293 | if (on) | ||
294 | at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ | ||
295 | else | ||
296 | at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ | ||
297 | } | ||
298 | |||
299 | /* Driver datas */ | ||
300 | static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data = { | ||
301 | .default_bpp = 16, | ||
302 | .default_dmacon = ATMEL_LCDC_DMAEN, | ||
303 | .default_lcdcon2 = AT91CAP9_DEFAULT_LCDCON2, | ||
304 | .default_monspecs = &at91fb_default_monspecs, | ||
305 | .atmel_lcdfb_power_control = at91_lcdc_power_control, | ||
306 | .guard_time = 1, | ||
307 | }; | ||
308 | |||
309 | #else | ||
310 | static struct atmel_lcdfb_info __initdata cap9adk_lcdc_data; | ||
311 | #endif | ||
312 | |||
313 | |||
314 | /* | ||
315 | * AC97 | ||
316 | */ | ||
317 | static struct atmel_ac97_data cap9adk_ac97_data = { | ||
318 | // .reset_pin = ... not connected | ||
319 | }; | ||
320 | |||
321 | |||
322 | static void __init cap9adk_board_init(void) | ||
323 | { | ||
324 | /* Serial */ | ||
325 | at91_add_device_serial(); | ||
326 | /* USB Host */ | ||
327 | set_irq_type(AT91CAP9_ID_UHP, IRQT_HIGH); | ||
328 | at91_add_device_usbh(&cap9adk_usbh_data); | ||
329 | /* SPI */ | ||
330 | at91_add_device_spi(cap9adk_spi_devices, ARRAY_SIZE(cap9adk_spi_devices)); | ||
331 | /* Touchscreen */ | ||
332 | cap9adk_add_device_ts(); | ||
333 | /* MMC */ | ||
334 | at91_add_device_mmc(1, &cap9adk_mmc_data); | ||
335 | /* Ethernet */ | ||
336 | at91_add_device_eth(&cap9adk_macb_data); | ||
337 | /* NAND */ | ||
338 | at91_add_device_nand(&cap9adk_nand_data); | ||
339 | /* NOR Flash */ | ||
340 | cap9adk_add_device_nor(); | ||
341 | /* I2C */ | ||
342 | at91_add_device_i2c(NULL, 0); | ||
343 | /* LCD Controller */ | ||
344 | set_irq_type(AT91CAP9_ID_LCDC, IRQT_HIGH); | ||
345 | at91_add_device_lcdc(&cap9adk_lcdc_data); | ||
346 | /* AC97 */ | ||
347 | at91_add_device_ac97(&cap9adk_ac97_data); | ||
348 | } | ||
349 | |||
350 | MACHINE_START(AT91CAP9ADK, "Atmel AT91CAP9A-DK") | ||
351 | /* Maintainer: Stelian Pop <stelian.pop@leadtechdesign.com> */ | ||
352 | .phys_io = AT91_BASE_SYS, | ||
353 | .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, | ||
354 | .boot_params = AT91_SDRAM_BASE + 0x100, | ||
355 | .timer = &at91sam926x_timer, | ||
356 | .map_io = cap9adk_map_io, | ||
357 | .init_irq = cap9adk_init_irq, | ||
358 | .init_machine = cap9adk_board_init, | ||
359 | MACHINE_END | ||
diff --git a/arch/arm/mach-at91/board-csb337.c b/arch/arm/mach-at91/board-csb337.c index d0aa20c9383e..0e2a11fc5bbd 100644 --- a/arch/arm/mach-at91/board-csb337.c +++ b/arch/arm/mach-at91/board-csb337.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/spi/spi.h> | 26 | #include <linux/spi/spi.h> |
27 | #include <linux/mtd/physmap.h> | 27 | #include <linux/mtd/physmap.h> |
28 | #include <linux/input.h> | ||
29 | #include <linux/gpio_keys.h> | ||
28 | 30 | ||
29 | #include <asm/hardware.h> | 31 | #include <asm/hardware.h> |
30 | #include <asm/setup.h> | 32 | #include <asm/setup.h> |
@@ -156,6 +158,85 @@ static struct platform_device csb_flash = { | |||
156 | .num_resources = ARRAY_SIZE(csb_flash_resources), | 158 | .num_resources = ARRAY_SIZE(csb_flash_resources), |
157 | }; | 159 | }; |
158 | 160 | ||
161 | /* | ||
162 | * GPIO Buttons (on CSB300) | ||
163 | */ | ||
164 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
165 | static struct gpio_keys_button csb300_buttons[] = { | ||
166 | { | ||
167 | .gpio = AT91_PIN_PB29, | ||
168 | .code = BTN_0, | ||
169 | .desc = "sw0", | ||
170 | .active_low = 1, | ||
171 | .wakeup = 1, | ||
172 | }, | ||
173 | { | ||
174 | .gpio = AT91_PIN_PB28, | ||
175 | .code = BTN_1, | ||
176 | .desc = "sw1", | ||
177 | .active_low = 1, | ||
178 | .wakeup = 1, | ||
179 | }, | ||
180 | { | ||
181 | .gpio = AT91_PIN_PA21, | ||
182 | .code = BTN_2, | ||
183 | .desc = "sw2", | ||
184 | .active_low = 1, | ||
185 | .wakeup = 1, | ||
186 | } | ||
187 | }; | ||
188 | |||
189 | static struct gpio_keys_platform_data csb300_button_data = { | ||
190 | .buttons = csb300_buttons, | ||
191 | .nbuttons = ARRAY_SIZE(csb300_buttons), | ||
192 | }; | ||
193 | |||
194 | static struct platform_device csb300_button_device = { | ||
195 | .name = "gpio-keys", | ||
196 | .id = -1, | ||
197 | .num_resources = 0, | ||
198 | .dev = { | ||
199 | .platform_data = &csb300_button_data, | ||
200 | } | ||
201 | }; | ||
202 | |||
203 | static void __init csb300_add_device_buttons(void) | ||
204 | { | ||
205 | at91_set_gpio_input(AT91_PIN_PB29, 0); /* sw0 */ | ||
206 | at91_set_deglitch(AT91_PIN_PB29, 1); | ||
207 | at91_set_gpio_input(AT91_PIN_PB28, 0); /* sw1 */ | ||
208 | at91_set_deglitch(AT91_PIN_PB28, 1); | ||
209 | at91_set_gpio_input(AT91_PIN_PA21, 0); /* sw2 */ | ||
210 | at91_set_deglitch(AT91_PIN_PA21, 1); | ||
211 | |||
212 | platform_device_register(&csb300_button_device); | ||
213 | } | ||
214 | #else | ||
215 | static void __init csb300_add_device_buttons(void) {} | ||
216 | #endif | ||
217 | |||
218 | static struct gpio_led csb_leds[] = { | ||
219 | { /* "led0", yellow */ | ||
220 | .name = "led0", | ||
221 | .gpio = AT91_PIN_PB2, | ||
222 | .active_low = 1, | ||
223 | .default_trigger = "heartbeat", | ||
224 | }, | ||
225 | { /* "led1", green */ | ||
226 | .name = "led1", | ||
227 | .gpio = AT91_PIN_PB1, | ||
228 | .active_low = 1, | ||
229 | .default_trigger = "mmc0", | ||
230 | }, | ||
231 | { /* "led2", yellow */ | ||
232 | .name = "led2", | ||
233 | .gpio = AT91_PIN_PB0, | ||
234 | .active_low = 1, | ||
235 | .default_trigger = "ide-disk", | ||
236 | }, | ||
237 | }; | ||
238 | |||
239 | |||
159 | static void __init csb337_board_init(void) | 240 | static void __init csb337_board_init(void) |
160 | { | 241 | { |
161 | /* Serial */ | 242 | /* Serial */ |
@@ -177,6 +258,10 @@ static void __init csb337_board_init(void) | |||
177 | at91_add_device_mmc(0, &csb337_mmc_data); | 258 | at91_add_device_mmc(0, &csb337_mmc_data); |
178 | /* NOR flash */ | 259 | /* NOR flash */ |
179 | platform_device_register(&csb_flash); | 260 | platform_device_register(&csb_flash); |
261 | /* LEDs */ | ||
262 | at91_gpio_leds(csb_leds, ARRAY_SIZE(csb_leds)); | ||
263 | /* Switches on CSB300 */ | ||
264 | csb300_add_device_buttons(); | ||
180 | } | 265 | } |
181 | 266 | ||
182 | MACHINE_START(CSB337, "Cogent CSB337") | 267 | MACHINE_START(CSB337, "Cogent CSB337") |
diff --git a/arch/arm/mach-at91/board-dk.c b/arch/arm/mach-at91/board-dk.c index 40c9e4331706..0a897efeba8e 100644 --- a/arch/arm/mach-at91/board-dk.c +++ b/arch/arm/mach-at91/board-dk.c | |||
@@ -183,6 +183,14 @@ static struct platform_device dk_flash = { | |||
183 | .num_resources = 1, | 183 | .num_resources = 1, |
184 | }; | 184 | }; |
185 | 185 | ||
186 | static struct gpio_led dk_leds[] = { | ||
187 | { | ||
188 | .name = "led0", | ||
189 | .gpio = AT91_PIN_PB2, | ||
190 | .active_low = 1, | ||
191 | .default_trigger = "heartbeat", | ||
192 | } | ||
193 | }; | ||
186 | 194 | ||
187 | static void __init dk_board_init(void) | 195 | static void __init dk_board_init(void) |
188 | { | 196 | { |
@@ -213,6 +221,8 @@ static void __init dk_board_init(void) | |||
213 | at91_add_device_nand(&dk_nand_data); | 221 | at91_add_device_nand(&dk_nand_data); |
214 | /* NOR Flash */ | 222 | /* NOR Flash */ |
215 | platform_device_register(&dk_flash); | 223 | platform_device_register(&dk_flash); |
224 | /* LEDs */ | ||
225 | at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds)); | ||
216 | /* VGA */ | 226 | /* VGA */ |
217 | // dk_add_device_video(); | 227 | // dk_add_device_video(); |
218 | } | 228 | } |
diff --git a/arch/arm/mach-at91/board-ek.c b/arch/arm/mach-at91/board-ek.c index 53a5ef9e72ee..0574e50a30dd 100644 --- a/arch/arm/mach-at91/board-ek.c +++ b/arch/arm/mach-at91/board-ek.c | |||
@@ -141,6 +141,25 @@ static struct platform_device ek_flash = { | |||
141 | .num_resources = 1, | 141 | .num_resources = 1, |
142 | }; | 142 | }; |
143 | 143 | ||
144 | static struct gpio_led ek_leds[] = { | ||
145 | { /* "user led 1", DS2 */ | ||
146 | .name = "green", | ||
147 | .gpio = AT91_PIN_PB0, | ||
148 | .active_low = 1, | ||
149 | .default_trigger = "mmc0", | ||
150 | }, | ||
151 | { /* "user led 2", DS4 */ | ||
152 | .name = "yellow", | ||
153 | .gpio = AT91_PIN_PB1, | ||
154 | .active_low = 1, | ||
155 | .default_trigger = "heartbeat", | ||
156 | }, | ||
157 | { /* "user led 3", DS6 */ | ||
158 | .name = "red", | ||
159 | .gpio = AT91_PIN_PB2, | ||
160 | .active_low = 1, | ||
161 | } | ||
162 | }; | ||
144 | 163 | ||
145 | static void __init ek_board_init(void) | 164 | static void __init ek_board_init(void) |
146 | { | 165 | { |
@@ -167,6 +186,8 @@ static void __init ek_board_init(void) | |||
167 | #endif | 186 | #endif |
168 | /* NOR Flash */ | 187 | /* NOR Flash */ |
169 | platform_device_register(&ek_flash); | 188 | platform_device_register(&ek_flash); |
189 | /* LEDs */ | ||
190 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | ||
170 | /* VGA */ | 191 | /* VGA */ |
171 | // ek_add_device_video(); | 192 | // ek_add_device_video(); |
172 | } | 193 | } |
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index 550ae59a3aca..aa29ea58ca09 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c | |||
@@ -280,6 +280,68 @@ static struct spi_board_info ek_spi_devices[] = { | |||
280 | * LCD Controller | 280 | * LCD Controller |
281 | */ | 281 | */ |
282 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) | 282 | #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE) |
283 | |||
284 | #if defined(CONFIG_FB_ATMEL_STN) | ||
285 | |||
286 | /* STN */ | ||
287 | static struct fb_videomode at91_stn_modes[] = { | ||
288 | { | ||
289 | .name = "SP06Q002 @ 75", | ||
290 | .refresh = 75, | ||
291 | .xres = 320, .yres = 240, | ||
292 | .pixclock = KHZ2PICOS(1440), | ||
293 | |||
294 | .left_margin = 1, .right_margin = 1, | ||
295 | .upper_margin = 0, .lower_margin = 0, | ||
296 | .hsync_len = 1, .vsync_len = 1, | ||
297 | |||
298 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | ||
299 | .vmode = FB_VMODE_NONINTERLACED, | ||
300 | }, | ||
301 | }; | ||
302 | |||
303 | static struct fb_monspecs at91fb_default_stn_monspecs = { | ||
304 | .manufacturer = "HIT", | ||
305 | .monitor = "SP06Q002", | ||
306 | |||
307 | .modedb = at91_stn_modes, | ||
308 | .modedb_len = ARRAY_SIZE(at91_stn_modes), | ||
309 | .hfmin = 15000, | ||
310 | .hfmax = 64000, | ||
311 | .vfmin = 50, | ||
312 | .vfmax = 150, | ||
313 | }; | ||
314 | |||
315 | #define AT91SAM9261_DEFAULT_STN_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | ||
316 | | ATMEL_LCDC_DISTYPE_STNMONO \ | ||
317 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE \ | ||
318 | | ATMEL_LCDC_IFWIDTH_4 \ | ||
319 | | ATMEL_LCDC_SCANMOD_SINGLE) | ||
320 | |||
321 | static void at91_lcdc_stn_power_control(int on) | ||
322 | { | ||
323 | /* backlight */ | ||
324 | if (on) { /* power up */ | ||
325 | at91_set_gpio_value(AT91_PIN_PC14, 0); | ||
326 | at91_set_gpio_value(AT91_PIN_PC15, 0); | ||
327 | } else { /* power down */ | ||
328 | at91_set_gpio_value(AT91_PIN_PC14, 1); | ||
329 | at91_set_gpio_value(AT91_PIN_PC15, 1); | ||
330 | } | ||
331 | } | ||
332 | |||
333 | static struct atmel_lcdfb_info __initdata ek_lcdc_data = { | ||
334 | .default_bpp = 1, | ||
335 | .default_dmacon = ATMEL_LCDC_DMAEN, | ||
336 | .default_lcdcon2 = AT91SAM9261_DEFAULT_STN_LCDCON2, | ||
337 | .default_monspecs = &at91fb_default_stn_monspecs, | ||
338 | .atmel_lcdfb_power_control = at91_lcdc_stn_power_control, | ||
339 | .guard_time = 1, | ||
340 | }; | ||
341 | |||
342 | #else | ||
343 | |||
344 | /* TFT */ | ||
283 | static struct fb_videomode at91_tft_vga_modes[] = { | 345 | static struct fb_videomode at91_tft_vga_modes[] = { |
284 | { | 346 | { |
285 | .name = "TX09D50VM1CCA @ 60", | 347 | .name = "TX09D50VM1CCA @ 60", |
@@ -296,7 +358,7 @@ static struct fb_videomode at91_tft_vga_modes[] = { | |||
296 | }, | 358 | }, |
297 | }; | 359 | }; |
298 | 360 | ||
299 | static struct fb_monspecs at91fb_default_monspecs = { | 361 | static struct fb_monspecs at91fb_default_tft_monspecs = { |
300 | .manufacturer = "HIT", | 362 | .manufacturer = "HIT", |
301 | .monitor = "TX09D50VM1CCA", | 363 | .monitor = "TX09D50VM1CCA", |
302 | 364 | ||
@@ -308,11 +370,11 @@ static struct fb_monspecs at91fb_default_monspecs = { | |||
308 | .vfmax = 150, | 370 | .vfmax = 150, |
309 | }; | 371 | }; |
310 | 372 | ||
311 | #define AT91SAM9261_DEFAULT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ | 373 | #define AT91SAM9261_DEFAULT_TFT_LCDCON2 (ATMEL_LCDC_MEMOR_LITTLE \ |
312 | | ATMEL_LCDC_DISTYPE_TFT \ | 374 | | ATMEL_LCDC_DISTYPE_TFT \ |
313 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) | 375 | | ATMEL_LCDC_CLKMOD_ALWAYSACTIVE) |
314 | 376 | ||
315 | static void at91_lcdc_power_control(int on) | 377 | static void at91_lcdc_tft_power_control(int on) |
316 | { | 378 | { |
317 | if (on) | 379 | if (on) |
318 | at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ | 380 | at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ |
@@ -320,15 +382,15 @@ static void at91_lcdc_power_control(int on) | |||
320 | at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ | 382 | at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ |
321 | } | 383 | } |
322 | 384 | ||
323 | /* Driver datas */ | ||
324 | static struct atmel_lcdfb_info __initdata ek_lcdc_data = { | 385 | static struct atmel_lcdfb_info __initdata ek_lcdc_data = { |
325 | .default_bpp = 16, | 386 | .default_bpp = 16, |
326 | .default_dmacon = ATMEL_LCDC_DMAEN, | 387 | .default_dmacon = ATMEL_LCDC_DMAEN, |
327 | .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2, | 388 | .default_lcdcon2 = AT91SAM9261_DEFAULT_TFT_LCDCON2, |
328 | .default_monspecs = &at91fb_default_monspecs, | 389 | .default_monspecs = &at91fb_default_tft_monspecs, |
329 | .atmel_lcdfb_power_control = at91_lcdc_power_control, | 390 | .atmel_lcdfb_power_control = at91_lcdc_tft_power_control, |
330 | .guard_time = 1, | 391 | .guard_time = 1, |
331 | }; | 392 | }; |
393 | #endif | ||
332 | 394 | ||
333 | #else | 395 | #else |
334 | static struct atmel_lcdfb_info __initdata ek_lcdc_data; | 396 | static struct atmel_lcdfb_info __initdata ek_lcdc_data; |
@@ -342,25 +404,25 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; | |||
342 | static struct gpio_keys_button ek_buttons[] = { | 404 | static struct gpio_keys_button ek_buttons[] = { |
343 | { | 405 | { |
344 | .gpio = AT91_PIN_PA27, | 406 | .gpio = AT91_PIN_PA27, |
345 | .keycode = BTN_0, | 407 | .code = BTN_0, |
346 | .desc = "Button 0", | 408 | .desc = "Button 0", |
347 | .active_low = 1, | 409 | .active_low = 1, |
348 | }, | 410 | }, |
349 | { | 411 | { |
350 | .gpio = AT91_PIN_PA26, | 412 | .gpio = AT91_PIN_PA26, |
351 | .keycode = BTN_1, | 413 | .code = BTN_1, |
352 | .desc = "Button 1", | 414 | .desc = "Button 1", |
353 | .active_low = 1, | 415 | .active_low = 1, |
354 | }, | 416 | }, |
355 | { | 417 | { |
356 | .gpio = AT91_PIN_PA25, | 418 | .gpio = AT91_PIN_PA25, |
357 | .keycode = BTN_2, | 419 | .code = BTN_2, |
358 | .desc = "Button 2", | 420 | .desc = "Button 2", |
359 | .active_low = 1, | 421 | .active_low = 1, |
360 | }, | 422 | }, |
361 | { | 423 | { |
362 | .gpio = AT91_PIN_PA24, | 424 | .gpio = AT91_PIN_PA24, |
363 | .keycode = BTN_3, | 425 | .code = BTN_3, |
364 | .desc = "Button 3", | 426 | .desc = "Button 3", |
365 | .active_low = 1, | 427 | .active_low = 1, |
366 | } | 428 | } |
diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c index ab9dcc075454..f09347a86e71 100644 --- a/arch/arm/mach-at91/board-sam9263ek.c +++ b/arch/arm/mach-at91/board-sam9263ek.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/ads7846.h> | 28 | #include <linux/spi/ads7846.h> |
29 | #include <linux/fb.h> | 29 | #include <linux/fb.h> |
30 | #include <linux/gpio_keys.h> | ||
31 | #include <linux/input.h> | ||
30 | 32 | ||
31 | #include <video/atmel_lcdc.h> | 33 | #include <video/atmel_lcdc.h> |
32 | 34 | ||
@@ -163,6 +165,7 @@ static struct at91_mmc_data __initdata ek_mmc_data = { | |||
163 | * MACB Ethernet device | 165 | * MACB Ethernet device |
164 | */ | 166 | */ |
165 | static struct at91_eth_data __initdata ek_macb_data = { | 167 | static struct at91_eth_data __initdata ek_macb_data = { |
168 | .phy_irq_pin = AT91_PIN_PE31, | ||
166 | .is_rmii = 1, | 169 | .is_rmii = 1, |
167 | }; | 170 | }; |
168 | 171 | ||
@@ -264,6 +267,55 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data; | |||
264 | 267 | ||
265 | 268 | ||
266 | /* | 269 | /* |
270 | * GPIO Buttons | ||
271 | */ | ||
272 | #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE) | ||
273 | static struct gpio_keys_button ek_buttons[] = { | ||
274 | { /* BP1, "leftclic" */ | ||
275 | .code = BTN_LEFT, | ||
276 | .gpio = AT91_PIN_PC5, | ||
277 | .active_low = 1, | ||
278 | .desc = "left_click", | ||
279 | .wakeup = 1, | ||
280 | }, | ||
281 | { /* BP2, "rightclic" */ | ||
282 | .code = BTN_RIGHT, | ||
283 | .gpio = AT91_PIN_PC4, | ||
284 | .active_low = 1, | ||
285 | .desc = "right_click", | ||
286 | .wakeup = 1, | ||
287 | }, | ||
288 | }; | ||
289 | |||
290 | static struct gpio_keys_platform_data ek_button_data = { | ||
291 | .buttons = ek_buttons, | ||
292 | .nbuttons = ARRAY_SIZE(ek_buttons), | ||
293 | }; | ||
294 | |||
295 | static struct platform_device ek_button_device = { | ||
296 | .name = "gpio-keys", | ||
297 | .id = -1, | ||
298 | .num_resources = 0, | ||
299 | .dev = { | ||
300 | .platform_data = &ek_button_data, | ||
301 | } | ||
302 | }; | ||
303 | |||
304 | static void __init ek_add_device_buttons(void) | ||
305 | { | ||
306 | at91_set_GPIO_periph(AT91_PIN_PC5, 0); /* left button */ | ||
307 | at91_set_deglitch(AT91_PIN_PC5, 1); | ||
308 | at91_set_GPIO_periph(AT91_PIN_PC4, 0); /* right button */ | ||
309 | at91_set_deglitch(AT91_PIN_PC4, 1); | ||
310 | |||
311 | platform_device_register(&ek_button_device); | ||
312 | } | ||
313 | #else | ||
314 | static void __init ek_add_device_buttons(void) {} | ||
315 | #endif | ||
316 | |||
317 | |||
318 | /* | ||
267 | * AC97 | 319 | * AC97 |
268 | */ | 320 | */ |
269 | static struct atmel_ac97_data ek_ac97_data = { | 321 | static struct atmel_ac97_data ek_ac97_data = { |
@@ -271,6 +323,30 @@ static struct atmel_ac97_data ek_ac97_data = { | |||
271 | }; | 323 | }; |
272 | 324 | ||
273 | 325 | ||
326 | /* | ||
327 | * LEDs ... these could all be PWM-driven, for variable brightness | ||
328 | */ | ||
329 | static struct gpio_led ek_leds[] = { | ||
330 | { /* "left" led, green, userled1, pwm1 */ | ||
331 | .name = "ds1", | ||
332 | .gpio = AT91_PIN_PB8, | ||
333 | .active_low = 1, | ||
334 | .default_trigger = "mmc0", | ||
335 | }, | ||
336 | { /* "right" led, green, userled2, pwm2 */ | ||
337 | .name = "ds2", | ||
338 | .gpio = AT91_PIN_PC29, | ||
339 | .active_low = 1, | ||
340 | .default_trigger = "nand-disk", | ||
341 | }, | ||
342 | { /* "power" led, yellow, pwm0 */ | ||
343 | .name = "ds3", | ||
344 | .gpio = AT91_PIN_PB7, | ||
345 | .default_trigger = "heartbeat", | ||
346 | }, | ||
347 | }; | ||
348 | |||
349 | |||
274 | static void __init ek_board_init(void) | 350 | static void __init ek_board_init(void) |
275 | { | 351 | { |
276 | /* Serial */ | 352 | /* Serial */ |
@@ -294,8 +370,12 @@ static void __init ek_board_init(void) | |||
294 | at91_add_device_i2c(NULL, 0); | 370 | at91_add_device_i2c(NULL, 0); |
295 | /* LCD Controller */ | 371 | /* LCD Controller */ |
296 | at91_add_device_lcdc(&ek_lcdc_data); | 372 | at91_add_device_lcdc(&ek_lcdc_data); |
373 | /* Push Buttons */ | ||
374 | ek_add_device_buttons(); | ||
297 | /* AC97 */ | 375 | /* AC97 */ |
298 | at91_add_device_ac97(&ek_ac97_data); | 376 | at91_add_device_ac97(&ek_ac97_data); |
377 | /* LEDs */ | ||
378 | at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); | ||
299 | } | 379 | } |
300 | 380 | ||
301 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") | 381 | MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") |
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 57c3b647ce83..ec76eeaafd45 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -574,6 +574,8 @@ int __init at91_clock_init(unsigned long main_clock) | |||
574 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { | 574 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263()) { |
575 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; | 575 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
576 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; | 576 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; |
577 | } else if (cpu_is_at91cap9()) { | ||
578 | uhpck.pmc_mask = AT91CAP9_PMC_UHP; | ||
577 | } | 579 | } |
578 | at91_sys_write(AT91_CKGR_PLLBR, 0); | 580 | at91_sys_write(AT91_CKGR_PLLBR, 0); |
579 | 581 | ||
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 77d4c0a37842..b5daf7f5e011 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h | |||
@@ -15,6 +15,7 @@ extern void __init at91sam9261_initialize(unsigned long main_clock); | |||
15 | extern void __init at91sam9263_initialize(unsigned long main_clock); | 15 | extern void __init at91sam9263_initialize(unsigned long main_clock); |
16 | extern void __init at91sam9rl_initialize(unsigned long main_clock); | 16 | extern void __init at91sam9rl_initialize(unsigned long main_clock); |
17 | extern void __init at91x40_initialize(unsigned long main_clock); | 17 | extern void __init at91x40_initialize(unsigned long main_clock); |
18 | extern void __init at91cap9_initialize(unsigned long main_clock); | ||
18 | 19 | ||
19 | /* Interrupts */ | 20 | /* Interrupts */ |
20 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); | 21 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); |
@@ -23,6 +24,7 @@ extern void __init at91sam9261_init_interrupts(unsigned int priority[]); | |||
23 | extern void __init at91sam9263_init_interrupts(unsigned int priority[]); | 24 | extern void __init at91sam9263_init_interrupts(unsigned int priority[]); |
24 | extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); | 25 | extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); |
25 | extern void __init at91x40_init_interrupts(unsigned int priority[]); | 26 | extern void __init at91x40_init_interrupts(unsigned int priority[]); |
27 | extern void __init at91cap9_init_interrupts(unsigned int priority[]); | ||
26 | extern void __init at91_aic_init(unsigned int priority[]); | 28 | extern void __init at91_aic_init(unsigned int priority[]); |
27 | 29 | ||
28 | /* Timer */ | 30 | /* Timer */ |
diff --git a/arch/arm/mach-at91/gpio.c b/arch/arm/mach-at91/gpio.c index aa2d365c93fb..6aeddd68d8af 100644 --- a/arch/arm/mach-at91/gpio.c +++ b/arch/arm/mach-at91/gpio.c | |||
@@ -13,6 +13,8 @@ | |||
13 | #include <linux/errno.h> | 13 | #include <linux/errno.h> |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <linux/debugfs.h> | ||
17 | #include <linux/seq_file.h> | ||
16 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
17 | #include <linux/list.h> | 19 | #include <linux/list.h> |
18 | #include <linux/module.h> | 20 | #include <linux/module.h> |
@@ -414,6 +416,66 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) | |||
414 | 416 | ||
415 | /*--------------------------------------------------------------------------*/ | 417 | /*--------------------------------------------------------------------------*/ |
416 | 418 | ||
419 | #ifdef CONFIG_DEBUG_FS | ||
420 | |||
421 | static int at91_gpio_show(struct seq_file *s, void *unused) | ||
422 | { | ||
423 | int bank, j; | ||
424 | |||
425 | /* print heading */ | ||
426 | seq_printf(s, "Pin\t"); | ||
427 | for (bank = 0; bank < gpio_banks; bank++) { | ||
428 | seq_printf(s, "PIO%c\t", 'A' + bank); | ||
429 | }; | ||
430 | seq_printf(s, "\n\n"); | ||
431 | |||
432 | /* print pin status */ | ||
433 | for (j = 0; j < 32; j++) { | ||
434 | seq_printf(s, "%i:\t", j); | ||
435 | |||
436 | for (bank = 0; bank < gpio_banks; bank++) { | ||
437 | unsigned pin = PIN_BASE + (32 * bank) + j; | ||
438 | void __iomem *pio = pin_to_controller(pin); | ||
439 | unsigned mask = pin_to_mask(pin); | ||
440 | |||
441 | if (__raw_readl(pio + PIO_PSR) & mask) | ||
442 | seq_printf(s, "GPIO:%s", __raw_readl(pio + PIO_PDSR) & mask ? "1" : "0"); | ||
443 | else | ||
444 | seq_printf(s, "%s", __raw_readl(pio + PIO_ABSR) & mask ? "B" : "A"); | ||
445 | |||
446 | seq_printf(s, "\t"); | ||
447 | } | ||
448 | |||
449 | seq_printf(s, "\n"); | ||
450 | } | ||
451 | |||
452 | return 0; | ||
453 | } | ||
454 | |||
455 | static int at91_gpio_open(struct inode *inode, struct file *file) | ||
456 | { | ||
457 | return single_open(file, at91_gpio_show, NULL); | ||
458 | } | ||
459 | |||
460 | static const struct file_operations at91_gpio_operations = { | ||
461 | .open = at91_gpio_open, | ||
462 | .read = seq_read, | ||
463 | .llseek = seq_lseek, | ||
464 | .release = single_release, | ||
465 | }; | ||
466 | |||
467 | static int __init at91_gpio_debugfs_init(void) | ||
468 | { | ||
469 | /* /sys/kernel/debug/at91_gpio */ | ||
470 | (void) debugfs_create_file("at91_gpio", S_IFREG | S_IRUGO, NULL, NULL, &at91_gpio_operations); | ||
471 | return 0; | ||
472 | } | ||
473 | postcore_initcall(at91_gpio_debugfs_init); | ||
474 | |||
475 | #endif | ||
476 | |||
477 | /*--------------------------------------------------------------------------*/ | ||
478 | |||
417 | /* | 479 | /* |
418 | * Called from the processor-specific init to enable GPIO interrupt support. | 480 | * Called from the processor-specific init to enable GPIO interrupt support. |
419 | */ | 481 | */ |
diff --git a/arch/arm/mach-at91/leds.c b/arch/arm/mach-at91/leds.c index 0d5144973988..9cdcda500fe8 100644 --- a/arch/arm/mach-at91/leds.c +++ b/arch/arm/mach-at91/leds.c | |||
@@ -14,11 +14,62 @@ | |||
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | 15 | ||
16 | #include <asm/mach-types.h> | 16 | #include <asm/mach-types.h> |
17 | #include <asm/leds.h> | ||
18 | #include <asm/arch/board.h> | 17 | #include <asm/arch/board.h> |
19 | #include <asm/arch/gpio.h> | 18 | #include <asm/arch/gpio.h> |
20 | 19 | ||
21 | 20 | ||
21 | /* ------------------------------------------------------------------------- */ | ||
22 | |||
23 | #if defined(CONFIG_NEW_LEDS) | ||
24 | |||
25 | #include <linux/platform_device.h> | ||
26 | |||
27 | /* | ||
28 | * New cross-platform LED support. | ||
29 | */ | ||
30 | |||
31 | static struct gpio_led_platform_data led_data; | ||
32 | |||
33 | static struct platform_device at91_leds = { | ||
34 | .name = "leds-gpio", | ||
35 | .id = -1, | ||
36 | .dev.platform_data = &led_data, | ||
37 | }; | ||
38 | |||
39 | void __init at91_gpio_leds(struct gpio_led *leds, int nr) | ||
40 | { | ||
41 | int i; | ||
42 | |||
43 | if (!nr) | ||
44 | return; | ||
45 | |||
46 | for (i = 0; i < nr; i++) | ||
47 | at91_set_gpio_output(leds[i].gpio, leds[i].active_low); | ||
48 | |||
49 | led_data.leds = leds; | ||
50 | led_data.num_leds = nr; | ||
51 | platform_device_register(&at91_leds); | ||
52 | } | ||
53 | |||
54 | #else | ||
55 | void __init at91_gpio_leds(struct gpio_led *leds, int nr) {} | ||
56 | #endif | ||
57 | |||
58 | |||
59 | /* ------------------------------------------------------------------------- */ | ||
60 | |||
61 | #if defined(CONFIG_LEDS) | ||
62 | |||
63 | #include <asm/leds.h> | ||
64 | |||
65 | /* | ||
66 | * Old ARM-specific LED framework; not fully functional when generic time is | ||
67 | * in use. | ||
68 | */ | ||
69 | |||
70 | static u8 at91_leds_cpu; | ||
71 | static u8 at91_leds_timer; | ||
72 | |||
22 | static inline void at91_led_on(unsigned int led) | 73 | static inline void at91_led_on(unsigned int led) |
23 | { | 74 | { |
24 | at91_set_gpio_value(led, 0); | 75 | at91_set_gpio_value(led, 0); |
@@ -93,3 +144,18 @@ static int __init leds_init(void) | |||
93 | } | 144 | } |
94 | 145 | ||
95 | __initcall(leds_init); | 146 | __initcall(leds_init); |
147 | |||
148 | |||
149 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) | ||
150 | { | ||
151 | /* Enable GPIO to access the LEDs */ | ||
152 | at91_set_gpio_output(cpu_led, 1); | ||
153 | at91_set_gpio_output(timer_led, 1); | ||
154 | |||
155 | at91_leds_cpu = cpu_led; | ||
156 | at91_leds_timer = timer_led; | ||
157 | } | ||
158 | |||
159 | #else | ||
160 | void __init at91_init_leds(u8 cpu_led, u8 timer_led) {} | ||
161 | #endif | ||
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 98cb61482917..4b120cc36135 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c | |||
@@ -80,6 +80,11 @@ static int at91_pm_verify_clocks(void) | |||
80 | pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); | 80 | pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); |
81 | return 0; | 81 | return 0; |
82 | } | 82 | } |
83 | } else if (cpu_is_at91cap9()) { | ||
84 | if ((scsr & AT91CAP9_PMC_UHP) != 0) { | ||
85 | pr_debug("AT91: PM - Suspend-to-RAM with USB still active\n"); | ||
86 | return 0; | ||
87 | } | ||
83 | } | 88 | } |
84 | 89 | ||
85 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS | 90 | #ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS |
diff --git a/arch/arm/mach-clps711x/time.c b/arch/arm/mach-clps711x/time.c index f428af7545b4..e5dc33f1f95c 100644 --- a/arch/arm/mach-clps711x/time.c +++ b/arch/arm/mach-clps711x/time.c | |||
@@ -50,9 +50,7 @@ static unsigned long clps711x_gettimeoffset(void) | |||
50 | static irqreturn_t | 50 | static irqreturn_t |
51 | p720t_timer_interrupt(int irq, void *dev_id) | 51 | p720t_timer_interrupt(int irq, void *dev_id) |
52 | { | 52 | { |
53 | write_seqlock(&xtime_lock); | ||
54 | timer_tick(); | 53 | timer_tick(); |
55 | write_sequnlock(&xtime_lock); | ||
56 | return IRQ_HANDLED; | 54 | return IRQ_HANDLED; |
57 | } | 55 | } |
58 | 56 | ||
diff --git a/arch/arm/mach-clps7500/core.c b/arch/arm/mach-clps7500/core.c index 986205ec9269..2ac63671ea5f 100644 --- a/arch/arm/mach-clps7500/core.c +++ b/arch/arm/mach-clps7500/core.c | |||
@@ -298,8 +298,6 @@ extern unsigned long ioc_timer_gettimeoffset(void); | |||
298 | static irqreturn_t | 298 | static irqreturn_t |
299 | clps7500_timer_interrupt(int irq, void *dev_id) | 299 | clps7500_timer_interrupt(int irq, void *dev_id) |
300 | { | 300 | { |
301 | write_seqlock(&xtime_lock); | ||
302 | |||
303 | timer_tick(); | 301 | timer_tick(); |
304 | 302 | ||
305 | /* Why not using do_leds interface?? */ | 303 | /* Why not using do_leds interface?? */ |
@@ -313,8 +311,6 @@ clps7500_timer_interrupt(int irq, void *dev_id) | |||
313 | } | 311 | } |
314 | } | 312 | } |
315 | 313 | ||
316 | write_sequnlock(&xtime_lock); | ||
317 | |||
318 | return IRQ_HANDLED; | 314 | return IRQ_HANDLED; |
319 | } | 315 | } |
320 | 316 | ||
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 8c1b5690dfe8..7710e14b5268 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -178,8 +178,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id) | |||
178 | { | 178 | { |
179 | u32 count; | 179 | u32 count; |
180 | 180 | ||
181 | write_seqlock(&xtime_lock); | ||
182 | |||
183 | /* latch and read timer 1 */ | 181 | /* latch and read timer 1 */ |
184 | __raw_writeb(0x40, PIT_CTRL); | 182 | __raw_writeb(0x40, PIT_CTRL); |
185 | count = __raw_readb(PIT_T1); | 183 | count = __raw_readb(PIT_T1); |
@@ -192,8 +190,6 @@ ebsa110_timer_interrupt(int irq, void *dev_id) | |||
192 | 190 | ||
193 | timer_tick(); | 191 | timer_tick(); |
194 | 192 | ||
195 | write_sequnlock(&xtime_lock); | ||
196 | |||
197 | return IRQ_HANDLED; | 193 | return IRQ_HANDLED; |
198 | } | 194 | } |
199 | 195 | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 70b2c7801110..91f6a07a51d5 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -3,6 +3,7 @@ | |||
3 | * Core routines for Cirrus EP93xx chips. | 3 | * Core routines for Cirrus EP93xx chips. |
4 | * | 4 | * |
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | 5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> |
6 | * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> | ||
6 | * | 7 | * |
7 | * Thanks go to Michael Burian and Ray Lehtiniemi for their key | 8 | * Thanks go to Michael Burian and Ray Lehtiniemi for their key |
8 | * role in the ep93xx linux community. | 9 | * role in the ep93xx linux community. |
@@ -21,7 +22,6 @@ | |||
21 | #include <linux/serial.h> | 22 | #include <linux/serial.h> |
22 | #include <linux/tty.h> | 23 | #include <linux/tty.h> |
23 | #include <linux/bitops.h> | 24 | #include <linux/bitops.h> |
24 | #include <linux/serial.h> | ||
25 | #include <linux/serial_8250.h> | 25 | #include <linux/serial_8250.h> |
26 | #include <linux/serial_core.h> | 26 | #include <linux/serial_core.h> |
27 | #include <linux/device.h> | 27 | #include <linux/device.h> |
@@ -99,8 +99,6 @@ static unsigned int last_jiffy_time; | |||
99 | 99 | ||
100 | static int ep93xx_timer_interrupt(int irq, void *dev_id) | 100 | static int ep93xx_timer_interrupt(int irq, void *dev_id) |
101 | { | 101 | { |
102 | write_seqlock(&xtime_lock); | ||
103 | |||
104 | __raw_writel(1, EP93XX_TIMER1_CLEAR); | 102 | __raw_writel(1, EP93XX_TIMER1_CLEAR); |
105 | while ((signed long) | 103 | while ((signed long) |
106 | (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) | 104 | (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) |
@@ -109,8 +107,6 @@ static int ep93xx_timer_interrupt(int irq, void *dev_id) | |||
109 | timer_tick(); | 107 | timer_tick(); |
110 | } | 108 | } |
111 | 109 | ||
112 | write_sequnlock(&xtime_lock); | ||
113 | |||
114 | return IRQ_HANDLED; | 110 | return IRQ_HANDLED; |
115 | } | 111 | } |
116 | 112 | ||
@@ -157,38 +153,41 @@ static unsigned char gpio_int_enabled[3]; | |||
157 | static unsigned char gpio_int_type1[3]; | 153 | static unsigned char gpio_int_type1[3]; |
158 | static unsigned char gpio_int_type2[3]; | 154 | static unsigned char gpio_int_type2[3]; |
159 | 155 | ||
160 | static void update_gpio_int_params(int abf) | 156 | /* Port ordering is: A B F */ |
157 | static const u8 int_type1_register_offset[3] = { 0x90, 0xac, 0x4c }; | ||
158 | static const u8 int_type2_register_offset[3] = { 0x94, 0xb0, 0x50 }; | ||
159 | static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 }; | ||
160 | static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x5c }; | ||
161 | |||
162 | static void update_gpio_int_params(unsigned port) | ||
161 | { | 163 | { |
162 | if (abf == 0) { | 164 | BUG_ON(port > 2); |
163 | __raw_writeb(0, EP93XX_GPIO_A_INT_ENABLE); | ||
164 | __raw_writeb(gpio_int_type2[0], EP93XX_GPIO_A_INT_TYPE2); | ||
165 | __raw_writeb(gpio_int_type1[0], EP93XX_GPIO_A_INT_TYPE1); | ||
166 | __raw_writeb(gpio_int_unmasked[0] & gpio_int_enabled[0], EP93XX_GPIO_A_INT_ENABLE); | ||
167 | } else if (abf == 1) { | ||
168 | __raw_writeb(0, EP93XX_GPIO_B_INT_ENABLE); | ||
169 | __raw_writeb(gpio_int_type2[1], EP93XX_GPIO_B_INT_TYPE2); | ||
170 | __raw_writeb(gpio_int_type1[1], EP93XX_GPIO_B_INT_TYPE1); | ||
171 | __raw_writeb(gpio_int_unmasked[1] & gpio_int_enabled[1], EP93XX_GPIO_B_INT_ENABLE); | ||
172 | } else if (abf == 2) { | ||
173 | __raw_writeb(0, EP93XX_GPIO_F_INT_ENABLE); | ||
174 | __raw_writeb(gpio_int_type2[2], EP93XX_GPIO_F_INT_TYPE2); | ||
175 | __raw_writeb(gpio_int_type1[2], EP93XX_GPIO_F_INT_TYPE1); | ||
176 | __raw_writeb(gpio_int_unmasked[2] & gpio_int_enabled[2], EP93XX_GPIO_F_INT_ENABLE); | ||
177 | } else { | ||
178 | BUG(); | ||
179 | } | ||
180 | } | ||
181 | 165 | ||
166 | __raw_writeb(0, EP93XX_GPIO_REG(int_en_register_offset[port])); | ||
182 | 167 | ||
183 | static unsigned char data_register_offset[8] = { | 168 | __raw_writeb(gpio_int_type2[port], |
184 | 0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40, | 169 | EP93XX_GPIO_REG(int_type2_register_offset[port])); |
170 | |||
171 | __raw_writeb(gpio_int_type1[port], | ||
172 | EP93XX_GPIO_REG(int_type1_register_offset[port])); | ||
173 | |||
174 | __raw_writeb(gpio_int_unmasked[port] & gpio_int_enabled[port], | ||
175 | EP93XX_GPIO_REG(int_en_register_offset[port])); | ||
176 | } | ||
177 | |||
178 | /* Port ordering is: A B F D E C G H */ | ||
179 | static const u8 data_register_offset[8] = { | ||
180 | 0x00, 0x04, 0x30, 0x0c, 0x20, 0x08, 0x38, 0x40, | ||
185 | }; | 181 | }; |
186 | 182 | ||
187 | static unsigned char data_direction_register_offset[8] = { | 183 | static const u8 data_direction_register_offset[8] = { |
188 | 0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44, | 184 | 0x10, 0x14, 0x34, 0x1c, 0x24, 0x18, 0x3c, 0x44, |
189 | }; | 185 | }; |
190 | 186 | ||
191 | void gpio_line_config(int line, int direction) | 187 | #define GPIO_IN 0 |
188 | #define GPIO_OUT 1 | ||
189 | |||
190 | static void ep93xx_gpio_set_direction(unsigned line, int direction) | ||
192 | { | 191 | { |
193 | unsigned int data_direction_register; | 192 | unsigned int data_direction_register; |
194 | unsigned long flags; | 193 | unsigned long flags; |
@@ -199,14 +198,10 @@ void gpio_line_config(int line, int direction) | |||
199 | 198 | ||
200 | local_irq_save(flags); | 199 | local_irq_save(flags); |
201 | if (direction == GPIO_OUT) { | 200 | if (direction == GPIO_OUT) { |
202 | if (line >= 0 && line < 16) { | 201 | if (line >= 0 && line <= EP93XX_GPIO_LINE_MAX_IRQ) { |
203 | /* Port A/B. */ | 202 | /* Port A/B/F */ |
204 | gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); | 203 | gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7)); |
205 | update_gpio_int_params(line >> 3); | 204 | update_gpio_int_params(line >> 3); |
206 | } else if (line >= 40 && line < 48) { | ||
207 | /* Port F. */ | ||
208 | gpio_int_unmasked[2] &= ~(1 << (line & 7)); | ||
209 | update_gpio_int_params(2); | ||
210 | } | 205 | } |
211 | 206 | ||
212 | v = __raw_readb(data_direction_register); | 207 | v = __raw_readb(data_direction_register); |
@@ -219,39 +214,58 @@ void gpio_line_config(int line, int direction) | |||
219 | } | 214 | } |
220 | local_irq_restore(flags); | 215 | local_irq_restore(flags); |
221 | } | 216 | } |
222 | EXPORT_SYMBOL(gpio_line_config); | ||
223 | 217 | ||
224 | int gpio_line_get(int line) | 218 | int gpio_direction_input(unsigned gpio) |
219 | { | ||
220 | if (gpio > EP93XX_GPIO_LINE_MAX) | ||
221 | return -EINVAL; | ||
222 | |||
223 | ep93xx_gpio_set_direction(gpio, GPIO_IN); | ||
224 | |||
225 | return 0; | ||
226 | } | ||
227 | EXPORT_SYMBOL(gpio_direction_input); | ||
228 | |||
229 | int gpio_direction_output(unsigned gpio, int value) | ||
230 | { | ||
231 | if (gpio > EP93XX_GPIO_LINE_MAX) | ||
232 | return -EINVAL; | ||
233 | |||
234 | gpio_set_value(gpio, value); | ||
235 | ep93xx_gpio_set_direction(gpio, GPIO_OUT); | ||
236 | |||
237 | return 0; | ||
238 | } | ||
239 | EXPORT_SYMBOL(gpio_direction_output); | ||
240 | |||
241 | int gpio_get_value(unsigned gpio) | ||
225 | { | 242 | { |
226 | unsigned int data_register; | 243 | unsigned int data_register; |
227 | 244 | ||
228 | data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); | 245 | data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]); |
229 | 246 | ||
230 | return !!(__raw_readb(data_register) & (1 << (line & 7))); | 247 | return !!(__raw_readb(data_register) & (1 << (gpio & 7))); |
231 | } | 248 | } |
232 | EXPORT_SYMBOL(gpio_line_get); | 249 | EXPORT_SYMBOL(gpio_get_value); |
233 | 250 | ||
234 | void gpio_line_set(int line, int value) | 251 | void gpio_set_value(unsigned gpio, int value) |
235 | { | 252 | { |
236 | unsigned int data_register; | 253 | unsigned int data_register; |
237 | unsigned long flags; | 254 | unsigned long flags; |
238 | unsigned char v; | 255 | unsigned char v; |
239 | 256 | ||
240 | data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]); | 257 | data_register = EP93XX_GPIO_REG(data_register_offset[gpio >> 3]); |
241 | 258 | ||
242 | local_irq_save(flags); | 259 | local_irq_save(flags); |
243 | if (value == EP93XX_GPIO_HIGH) { | 260 | v = __raw_readb(data_register); |
244 | v = __raw_readb(data_register); | 261 | if (value) |
245 | v |= 1 << (line & 7); | 262 | v |= 1 << (gpio & 7); |
246 | __raw_writeb(v, data_register); | 263 | else |
247 | } else if (value == EP93XX_GPIO_LOW) { | 264 | v &= ~(1 << (gpio & 7)); |
248 | v = __raw_readb(data_register); | 265 | __raw_writeb(v, data_register); |
249 | v &= ~(1 << (line & 7)); | ||
250 | __raw_writeb(v, data_register); | ||
251 | } | ||
252 | local_irq_restore(flags); | 266 | local_irq_restore(flags); |
253 | } | 267 | } |
254 | EXPORT_SYMBOL(gpio_line_set); | 268 | EXPORT_SYMBOL(gpio_set_value); |
255 | 269 | ||
256 | 270 | ||
257 | /************************************************************************* | 271 | /************************************************************************* |
@@ -265,47 +279,67 @@ static void ep93xx_gpio_ab_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
265 | status = __raw_readb(EP93XX_GPIO_A_INT_STATUS); | 279 | status = __raw_readb(EP93XX_GPIO_A_INT_STATUS); |
266 | for (i = 0; i < 8; i++) { | 280 | for (i = 0; i < 8; i++) { |
267 | if (status & (1 << i)) { | 281 | if (status & (1 << i)) { |
268 | desc = irq_desc + IRQ_EP93XX_GPIO(0) + i; | 282 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_A(0)) + i; |
269 | desc_handle_irq(IRQ_EP93XX_GPIO(0) + i, desc); | 283 | desc = irq_desc + gpio_irq; |
284 | desc_handle_irq(gpio_irq, desc); | ||
270 | } | 285 | } |
271 | } | 286 | } |
272 | 287 | ||
273 | status = __raw_readb(EP93XX_GPIO_B_INT_STATUS); | 288 | status = __raw_readb(EP93XX_GPIO_B_INT_STATUS); |
274 | for (i = 0; i < 8; i++) { | 289 | for (i = 0; i < 8; i++) { |
275 | if (status & (1 << i)) { | 290 | if (status & (1 << i)) { |
276 | desc = irq_desc + IRQ_EP93XX_GPIO(8) + i; | 291 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_B(0)) + i; |
277 | desc_handle_irq(IRQ_EP93XX_GPIO(8) + i, desc); | 292 | desc = irq_desc + gpio_irq; |
293 | desc_handle_irq(gpio_irq, desc); | ||
278 | } | 294 | } |
279 | } | 295 | } |
280 | } | 296 | } |
281 | 297 | ||
282 | static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) | 298 | static void ep93xx_gpio_f_irq_handler(unsigned int irq, struct irq_desc *desc) |
283 | { | 299 | { |
284 | int gpio_irq = IRQ_EP93XX_GPIO(16) + (((irq + 1) & 7) ^ 4); | 300 | /* |
301 | * map discontiguous hw irq range to continous sw irq range: | ||
302 | * | ||
303 | * IRQ_EP93XX_GPIO{0..7}MUX -> gpio_to_irq(EP93XX_GPIO_LINE_F({0..7}) | ||
304 | */ | ||
305 | int port_f_idx = ((irq + 1) & 7) ^ 4; /* {19..22,47..50} -> {0..7} */ | ||
306 | int gpio_irq = gpio_to_irq(EP93XX_GPIO_LINE_F(0)) + port_f_idx; | ||
285 | 307 | ||
286 | desc_handle_irq(gpio_irq, irq_desc + gpio_irq); | 308 | desc_handle_irq(gpio_irq, irq_desc + gpio_irq); |
287 | } | 309 | } |
288 | 310 | ||
311 | static void ep93xx_gpio_irq_ack(unsigned int irq) | ||
312 | { | ||
313 | int line = irq_to_gpio(irq); | ||
314 | int port = line >> 3; | ||
315 | int port_mask = 1 << (line & 7); | ||
316 | |||
317 | if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { | ||
318 | gpio_int_type2[port] ^= port_mask; /* switch edge direction */ | ||
319 | update_gpio_int_params(port); | ||
320 | } | ||
321 | |||
322 | __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); | ||
323 | } | ||
324 | |||
289 | static void ep93xx_gpio_irq_mask_ack(unsigned int irq) | 325 | static void ep93xx_gpio_irq_mask_ack(unsigned int irq) |
290 | { | 326 | { |
291 | int line = irq - IRQ_EP93XX_GPIO(0); | 327 | int line = irq_to_gpio(irq); |
292 | int port = line >> 3; | 328 | int port = line >> 3; |
329 | int port_mask = 1 << (line & 7); | ||
293 | 330 | ||
294 | gpio_int_unmasked[port] &= ~(1 << (line & 7)); | 331 | if ((irq_desc[irq].status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) |
332 | gpio_int_type2[port] ^= port_mask; /* switch edge direction */ | ||
333 | |||
334 | gpio_int_unmasked[port] &= ~port_mask; | ||
295 | update_gpio_int_params(port); | 335 | update_gpio_int_params(port); |
296 | 336 | ||
297 | if (port == 0) { | 337 | __raw_writeb(port_mask, EP93XX_GPIO_REG(eoi_register_offset[port])); |
298 | __raw_writel(1 << (line & 7), EP93XX_GPIO_A_INT_ACK); | ||
299 | } else if (port == 1) { | ||
300 | __raw_writel(1 << (line & 7), EP93XX_GPIO_B_INT_ACK); | ||
301 | } else if (port == 2) { | ||
302 | __raw_writel(1 << (line & 7), EP93XX_GPIO_F_INT_ACK); | ||
303 | } | ||
304 | } | 338 | } |
305 | 339 | ||
306 | static void ep93xx_gpio_irq_mask(unsigned int irq) | 340 | static void ep93xx_gpio_irq_mask(unsigned int irq) |
307 | { | 341 | { |
308 | int line = irq - IRQ_EP93XX_GPIO(0); | 342 | int line = irq_to_gpio(irq); |
309 | int port = line >> 3; | 343 | int port = line >> 3; |
310 | 344 | ||
311 | gpio_int_unmasked[port] &= ~(1 << (line & 7)); | 345 | gpio_int_unmasked[port] &= ~(1 << (line & 7)); |
@@ -314,7 +348,7 @@ static void ep93xx_gpio_irq_mask(unsigned int irq) | |||
314 | 348 | ||
315 | static void ep93xx_gpio_irq_unmask(unsigned int irq) | 349 | static void ep93xx_gpio_irq_unmask(unsigned int irq) |
316 | { | 350 | { |
317 | int line = irq - IRQ_EP93XX_GPIO(0); | 351 | int line = irq_to_gpio(irq); |
318 | int port = line >> 3; | 352 | int port = line >> 3; |
319 | 353 | ||
320 | gpio_int_unmasked[port] |= 1 << (line & 7); | 354 | gpio_int_unmasked[port] |= 1 << (line & 7); |
@@ -329,38 +363,54 @@ static void ep93xx_gpio_irq_unmask(unsigned int irq) | |||
329 | */ | 363 | */ |
330 | static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) | 364 | static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) |
331 | { | 365 | { |
332 | int port; | 366 | struct irq_desc *desc = irq_desc + irq; |
333 | int line; | 367 | const int gpio = irq_to_gpio(irq); |
334 | 368 | const int port = gpio >> 3; | |
335 | line = irq - IRQ_EP93XX_GPIO(0); | 369 | const int port_mask = 1 << (gpio & 7); |
336 | if (line >= 0 && line < 16) { | 370 | |
337 | gpio_line_config(line, GPIO_IN); | 371 | ep93xx_gpio_set_direction(gpio, GPIO_IN); |
338 | } else { | 372 | |
339 | gpio_line_config(EP93XX_GPIO_LINE_F(line-16), GPIO_IN); | 373 | switch (type) { |
374 | case IRQT_RISING: | ||
375 | gpio_int_type1[port] |= port_mask; | ||
376 | gpio_int_type2[port] |= port_mask; | ||
377 | desc->handle_irq = handle_edge_irq; | ||
378 | break; | ||
379 | case IRQT_FALLING: | ||
380 | gpio_int_type1[port] |= port_mask; | ||
381 | gpio_int_type2[port] &= ~port_mask; | ||
382 | desc->handle_irq = handle_edge_irq; | ||
383 | break; | ||
384 | case IRQT_HIGH: | ||
385 | gpio_int_type1[port] &= ~port_mask; | ||
386 | gpio_int_type2[port] |= port_mask; | ||
387 | desc->handle_irq = handle_level_irq; | ||
388 | break; | ||
389 | case IRQT_LOW: | ||
390 | gpio_int_type1[port] &= ~port_mask; | ||
391 | gpio_int_type2[port] &= ~port_mask; | ||
392 | desc->handle_irq = handle_level_irq; | ||
393 | break; | ||
394 | case IRQT_BOTHEDGE: | ||
395 | gpio_int_type1[port] |= port_mask; | ||
396 | /* set initial polarity based on current input level */ | ||
397 | if (gpio_get_value(gpio)) | ||
398 | gpio_int_type2[port] &= ~port_mask; /* falling */ | ||
399 | else | ||
400 | gpio_int_type2[port] |= port_mask; /* rising */ | ||
401 | desc->handle_irq = handle_edge_irq; | ||
402 | break; | ||
403 | default: | ||
404 | pr_err("ep93xx: failed to set irq type %d for gpio %d\n", | ||
405 | type, gpio); | ||
406 | return -EINVAL; | ||
340 | } | 407 | } |
341 | 408 | ||
342 | port = line >> 3; | 409 | gpio_int_enabled[port] |= port_mask; |
343 | line &= 7; | 410 | |
344 | 411 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | |
345 | if (type & IRQT_RISING) { | 412 | desc->status |= type & IRQ_TYPE_SENSE_MASK; |
346 | gpio_int_enabled[port] |= 1 << line; | 413 | |
347 | gpio_int_type1[port] |= 1 << line; | ||
348 | gpio_int_type2[port] |= 1 << line; | ||
349 | } else if (type & IRQT_FALLING) { | ||
350 | gpio_int_enabled[port] |= 1 << line; | ||
351 | gpio_int_type1[port] |= 1 << line; | ||
352 | gpio_int_type2[port] &= ~(1 << line); | ||
353 | } else if (type & IRQT_HIGH) { | ||
354 | gpio_int_enabled[port] |= 1 << line; | ||
355 | gpio_int_type1[port] &= ~(1 << line); | ||
356 | gpio_int_type2[port] |= 1 << line; | ||
357 | } else if (type & IRQT_LOW) { | ||
358 | gpio_int_enabled[port] |= 1 << line; | ||
359 | gpio_int_type1[port] &= ~(1 << line); | ||
360 | gpio_int_type2[port] &= ~(1 << line); | ||
361 | } else { | ||
362 | gpio_int_enabled[port] &= ~(1 << line); | ||
363 | } | ||
364 | update_gpio_int_params(port); | 414 | update_gpio_int_params(port); |
365 | 415 | ||
366 | return 0; | 416 | return 0; |
@@ -368,7 +418,8 @@ static int ep93xx_gpio_irq_type(unsigned int irq, unsigned int type) | |||
368 | 418 | ||
369 | static struct irq_chip ep93xx_gpio_irq_chip = { | 419 | static struct irq_chip ep93xx_gpio_irq_chip = { |
370 | .name = "GPIO", | 420 | .name = "GPIO", |
371 | .ack = ep93xx_gpio_irq_mask_ack, | 421 | .ack = ep93xx_gpio_irq_ack, |
422 | .mask_ack = ep93xx_gpio_irq_mask_ack, | ||
372 | .mask = ep93xx_gpio_irq_mask, | 423 | .mask = ep93xx_gpio_irq_mask, |
373 | .unmask = ep93xx_gpio_irq_unmask, | 424 | .unmask = ep93xx_gpio_irq_unmask, |
374 | .set_type = ep93xx_gpio_irq_type, | 425 | .set_type = ep93xx_gpio_irq_type, |
@@ -377,15 +428,16 @@ static struct irq_chip ep93xx_gpio_irq_chip = { | |||
377 | 428 | ||
378 | void __init ep93xx_init_irq(void) | 429 | void __init ep93xx_init_irq(void) |
379 | { | 430 | { |
380 | int irq; | 431 | int gpio_irq; |
381 | 432 | ||
382 | vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); | 433 | vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK); |
383 | vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); | 434 | vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK); |
384 | 435 | ||
385 | for (irq = IRQ_EP93XX_GPIO(0); irq <= IRQ_EP93XX_GPIO(23); irq++) { | 436 | for (gpio_irq = gpio_to_irq(0); |
386 | set_irq_chip(irq, &ep93xx_gpio_irq_chip); | 437 | gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { |
387 | set_irq_handler(irq, handle_level_irq); | 438 | set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); |
388 | set_irq_flags(irq, IRQF_VALID); | 439 | set_irq_handler(gpio_irq, handle_level_irq); |
440 | set_irq_flags(gpio_irq, IRQF_VALID); | ||
389 | } | 441 | } |
390 | 442 | ||
391 | set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); | 443 | set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); |
diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 3a63941d43be..b2a21189dd81 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c | |||
@@ -30,14 +30,10 @@ static unsigned long timer1_gettimeoffset (void) | |||
30 | static irqreturn_t | 30 | static irqreturn_t |
31 | timer1_interrupt(int irq, void *dev_id) | 31 | timer1_interrupt(int irq, void *dev_id) |
32 | { | 32 | { |
33 | write_seqlock(&xtime_lock); | ||
34 | |||
35 | *CSR_TIMER1_CLR = 0; | 33 | *CSR_TIMER1_CLR = 0; |
36 | 34 | ||
37 | timer_tick(); | 35 | timer_tick(); |
38 | 36 | ||
39 | write_sequnlock(&xtime_lock); | ||
40 | |||
41 | return IRQ_HANDLED; | 37 | return IRQ_HANDLED; |
42 | } | 38 | } |
43 | 39 | ||
diff --git a/arch/arm/mach-footbridge/isa-timer.c b/arch/arm/mach-footbridge/isa-timer.c index d08d64139d00..a764e01d3573 100644 --- a/arch/arm/mach-footbridge/isa-timer.c +++ b/arch/arm/mach-footbridge/isa-timer.c | |||
@@ -64,9 +64,7 @@ static unsigned long isa_gettimeoffset(void) | |||
64 | static irqreturn_t | 64 | static irqreturn_t |
65 | isa_timer_interrupt(int irq, void *dev_id) | 65 | isa_timer_interrupt(int irq, void *dev_id) |
66 | { | 66 | { |
67 | write_seqlock(&xtime_lock); | ||
68 | timer_tick(); | 67 | timer_tick(); |
69 | write_sequnlock(&xtime_lock); | ||
70 | return IRQ_HANDLED; | 68 | return IRQ_HANDLED; |
71 | } | 69 | } |
72 | 70 | ||
diff --git a/arch/arm/mach-h720x/cpu-h7201.c b/arch/arm/mach-h720x/cpu-h7201.c index 9107b8e2ad6e..c2a431f482f0 100644 --- a/arch/arm/mach-h720x/cpu-h7201.c +++ b/arch/arm/mach-h720x/cpu-h7201.c | |||
@@ -29,13 +29,9 @@ | |||
29 | static irqreturn_t | 29 | static irqreturn_t |
30 | h7201_timer_interrupt(int irq, void *dev_id) | 30 | h7201_timer_interrupt(int irq, void *dev_id) |
31 | { | 31 | { |
32 | write_seqlock(&xtime_lock); | ||
33 | |||
34 | CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); | 32 | CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); |
35 | timer_tick(); | 33 | timer_tick(); |
36 | 34 | ||
37 | write_sequnlock(&xtime_lock); | ||
38 | |||
39 | return IRQ_HANDLED; | 35 | return IRQ_HANDLED; |
40 | } | 36 | } |
41 | 37 | ||
diff --git a/arch/arm/mach-h720x/cpu-h7202.c b/arch/arm/mach-h720x/cpu-h7202.c index 0a1a25fb8ba8..c627fa124eb3 100644 --- a/arch/arm/mach-h720x/cpu-h7202.c +++ b/arch/arm/mach-h720x/cpu-h7202.c | |||
@@ -113,9 +113,7 @@ h7202_timerx_demux_handler(unsigned int irq_unused, struct irq_desc *desc) | |||
113 | mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); | 113 | mask = CPU_REG (TIMER_VIRT, TIMER_TOPSTAT); |
114 | 114 | ||
115 | if ( mask & TSTAT_T0INT ) { | 115 | if ( mask & TSTAT_T0INT ) { |
116 | write_seqlock(&xtime_lock); | ||
117 | timer_tick(); | 116 | timer_tick(); |
118 | write_sequnlock(&xtime_lock); | ||
119 | if( mask == TSTAT_T0INT ) | 117 | if( mask == TSTAT_T0INT ) |
120 | return; | 118 | return; |
121 | } | 119 | } |
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index e9c82deb791d..7fbbc17f8e8b 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -250,8 +250,6 @@ unsigned long integrator_gettimeoffset(void) | |||
250 | static irqreturn_t | 250 | static irqreturn_t |
251 | integrator_timer_interrupt(int irq, void *dev_id) | 251 | integrator_timer_interrupt(int irq, void *dev_id) |
252 | { | 252 | { |
253 | write_seqlock(&xtime_lock); | ||
254 | |||
255 | /* | 253 | /* |
256 | * clear the interrupt | 254 | * clear the interrupt |
257 | */ | 255 | */ |
@@ -259,8 +257,6 @@ integrator_timer_interrupt(int irq, void *dev_id) | |||
259 | 257 | ||
260 | timer_tick(); | 258 | timer_tick(); |
261 | 259 | ||
262 | write_sequnlock(&xtime_lock); | ||
263 | |||
264 | return IRQ_HANDLED; | 260 | return IRQ_HANDLED; |
265 | } | 261 | } |
266 | 262 | ||
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index d4d8134ce567..d55fa4e9bb43 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -440,7 +440,7 @@ v3_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | |||
440 | return 1; | 440 | return 1; |
441 | } | 441 | } |
442 | 442 | ||
443 | static irqreturn_t v3_irq(int irq, void *devid) | 443 | static irqreturn_t v3_irq(int dummy, void *devid) |
444 | { | 444 | { |
445 | #ifdef CONFIG_DEBUG_LL | 445 | #ifdef CONFIG_DEBUG_LL |
446 | struct pt_regs *regs = get_irq_regs(); | 446 | struct pt_regs *regs = get_irq_regs(); |
@@ -448,8 +448,10 @@ static irqreturn_t v3_irq(int irq, void *devid) | |||
448 | unsigned long instr = *(unsigned long *)pc; | 448 | unsigned long instr = *(unsigned long *)pc; |
449 | char buf[128]; | 449 | char buf[128]; |
450 | 450 | ||
451 | sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x ISTAT=%02x\n", irq, | 451 | sprintf(buf, "V3 int %d: pc=0x%08lx [%08lx] LBFADDR=%08x LBFCODE=%02x " |
452 | pc, instr, __raw_readl(SC_LBFADDR), __raw_readl(SC_LBFCODE) & 255, | 452 | "ISTAT=%02x\n", IRQ_AP_V3INT, pc, instr, |
453 | __raw_readl(SC_LBFADDR), | ||
454 | __raw_readl(SC_LBFCODE) & 255, | ||
453 | v3_readb(V3_LB_ISTAT)); | 455 | v3_readb(V3_LB_ISTAT)); |
454 | printascii(buf); | 456 | printascii(buf); |
455 | #endif | 457 | #endif |
diff --git a/arch/arm/mach-iop32x/glantank.c b/arch/arm/mach-iop32x/glantank.c index 2b086ab2668c..74c65ce221de 100644 --- a/arch/arm/mach-iop32x/glantank.c +++ b/arch/arm/mach-iop32x/glantank.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Board support code for the GLAN Tank. | 4 | * Board support code for the GLAN Tank. |
5 | * | 5 | * |
6 | * Copyright (C) 2006 Martin Michlmayr <tbm@cyrius.com> | 6 | * Copyright (C) 2006, 2007 Martin Michlmayr <tbm@cyrius.com> |
7 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | 7 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> |
8 | * | 8 | * |
9 | * This program is free software; you can redistribute it and/or modify it | 9 | * This program is free software; you can redistribute it and/or modify it |
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/serial_core.h> | 21 | #include <linux/serial_core.h> |
22 | #include <linux/serial_8250.h> | 22 | #include <linux/serial_8250.h> |
23 | #include <linux/mtd/physmap.h> | 23 | #include <linux/mtd/physmap.h> |
24 | #include <linux/i2c.h> | ||
24 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
25 | #include <asm/hardware.h> | 26 | #include <asm/hardware.h> |
26 | #include <asm/io.h> | 27 | #include <asm/io.h> |
@@ -118,7 +119,7 @@ subsys_initcall(glantank_pci_init); | |||
118 | * GLAN Tank machine initialization. | 119 | * GLAN Tank machine initialization. |
119 | */ | 120 | */ |
120 | static struct physmap_flash_data glantank_flash_data = { | 121 | static struct physmap_flash_data glantank_flash_data = { |
121 | .width = 1, | 122 | .width = 2, |
122 | }; | 123 | }; |
123 | 124 | ||
124 | static struct resource glantank_flash_resource = { | 125 | static struct resource glantank_flash_resource = { |
@@ -166,6 +167,13 @@ static struct platform_device glantank_serial_device = { | |||
166 | .resource = &glantank_uart_resource, | 167 | .resource = &glantank_uart_resource, |
167 | }; | 168 | }; |
168 | 169 | ||
170 | static struct i2c_board_info __initdata glantank_i2c_devices[] = { | ||
171 | { | ||
172 | I2C_BOARD_INFO("rtc-rs5c372", 0x32), | ||
173 | .type = "rs5c372a", | ||
174 | }, | ||
175 | }; | ||
176 | |||
169 | static void glantank_power_off(void) | 177 | static void glantank_power_off(void) |
170 | { | 178 | { |
171 | __raw_writeb(0x01, 0xfe8d0004); | 179 | __raw_writeb(0x01, 0xfe8d0004); |
@@ -183,6 +191,9 @@ static void __init glantank_init_machine(void) | |||
183 | platform_device_register(&iop3xx_dma_0_channel); | 191 | platform_device_register(&iop3xx_dma_0_channel); |
184 | platform_device_register(&iop3xx_dma_1_channel); | 192 | platform_device_register(&iop3xx_dma_1_channel); |
185 | 193 | ||
194 | i2c_register_board_info(0, glantank_i2c_devices, | ||
195 | ARRAY_SIZE(glantank_i2c_devices)); | ||
196 | |||
186 | pm_power_off = glantank_power_off; | 197 | pm_power_off = glantank_power_off; |
187 | } | 198 | } |
188 | 199 | ||
diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index cb6ad211887a..81cdc8267206 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c | |||
@@ -206,8 +206,6 @@ unsigned long ixp2000_gettimeoffset (void) | |||
206 | 206 | ||
207 | static int ixp2000_timer_interrupt(int irq, void *dev_id) | 207 | static int ixp2000_timer_interrupt(int irq, void *dev_id) |
208 | { | 208 | { |
209 | write_seqlock(&xtime_lock); | ||
210 | |||
211 | /* clear timer 1 */ | 209 | /* clear timer 1 */ |
212 | ixp2000_reg_wrb(IXP2000_T1_CLR, 1); | 210 | ixp2000_reg_wrb(IXP2000_T1_CLR, 1); |
213 | 211 | ||
@@ -217,8 +215,6 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id) | |||
217 | next_jiffy_time -= ticks_per_jiffy; | 215 | next_jiffy_time -= ticks_per_jiffy; |
218 | } | 216 | } |
219 | 217 | ||
220 | write_sequnlock(&xtime_lock); | ||
221 | |||
222 | return IRQ_HANDLED; | 218 | return IRQ_HANDLED; |
223 | } | 219 | } |
224 | 220 | ||
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 16356ffc86ae..5fea5a132939 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/serial.h> | 22 | #include <linux/serial.h> |
23 | #include <linux/tty.h> | 23 | #include <linux/tty.h> |
24 | #include <linux/bitops.h> | 24 | #include <linux/bitops.h> |
25 | #include <linux/serial.h> | ||
26 | #include <linux/serial_8250.h> | 25 | #include <linux/serial_8250.h> |
27 | #include <linux/serial_core.h> | 26 | #include <linux/serial_core.h> |
28 | #include <linux/device.h> | 27 | #include <linux/device.h> |
diff --git a/arch/arm/mach-ixp23xx/espresso.c b/arch/arm/mach-ixp23xx/espresso.c index 7a85ced56718..d3a779a7a35f 100644 --- a/arch/arm/mach-ixp23xx/espresso.c +++ b/arch/arm/mach-ixp23xx/espresso.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/tty.h> | 19 | #include <linux/tty.h> |
20 | #include <linux/bitops.h> | 20 | #include <linux/bitops.h> |
21 | #include <linux/ioport.h> | 21 | #include <linux/ioport.h> |
22 | #include <linux/serial.h> | ||
23 | #include <linux/serial_8250.h> | 22 | #include <linux/serial_8250.h> |
24 | #include <linux/serial_core.h> | 23 | #include <linux/serial_core.h> |
25 | #include <linux/device.h> | 24 | #include <linux/device.h> |
@@ -40,7 +39,6 @@ | |||
40 | #include <asm/mach/map.h> | 39 | #include <asm/mach/map.h> |
41 | #include <asm/mach/irq.h> | 40 | #include <asm/mach/irq.h> |
42 | #include <asm/mach/arch.h> | 41 | #include <asm/mach/arch.h> |
43 | #include <asm/mach/irq.h> | ||
44 | #include <asm/mach/pci.h> | 42 | #include <asm/mach/pci.h> |
45 | 43 | ||
46 | static int __init espresso_pci_init(void) | 44 | static int __init espresso_pci_init(void) |
diff --git a/arch/arm/mach-ixp23xx/ixdp2351.c b/arch/arm/mach-ixp23xx/ixdp2351.c index c41a6b5a0acc..5c5d4d66dee8 100644 --- a/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/arch/arm/mach-ixp23xx/ixdp2351.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/tty.h> | 24 | #include <linux/tty.h> |
25 | #include <linux/bitops.h> | 25 | #include <linux/bitops.h> |
26 | #include <linux/ioport.h> | 26 | #include <linux/ioport.h> |
27 | #include <linux/serial.h> | ||
28 | #include <linux/serial_8250.h> | 27 | #include <linux/serial_8250.h> |
29 | #include <linux/serial_core.h> | 28 | #include <linux/serial_core.h> |
30 | #include <linux/device.h> | 29 | #include <linux/device.h> |
@@ -44,7 +43,6 @@ | |||
44 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
45 | #include <asm/mach/irq.h> | 44 | #include <asm/mach/irq.h> |
46 | #include <asm/mach/arch.h> | 45 | #include <asm/mach/arch.h> |
47 | #include <asm/mach/irq.h> | ||
48 | #include <asm/mach/pci.h> | 46 | #include <asm/mach/pci.h> |
49 | 47 | ||
50 | /* | 48 | /* |
diff --git a/arch/arm/mach-ixp23xx/roadrunner.c b/arch/arm/mach-ixp23xx/roadrunner.c index e35644961aa4..f0f70ba1e46d 100644 --- a/arch/arm/mach-ixp23xx/roadrunner.c +++ b/arch/arm/mach-ixp23xx/roadrunner.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include <linux/tty.h> | 23 | #include <linux/tty.h> |
24 | #include <linux/bitops.h> | 24 | #include <linux/bitops.h> |
25 | #include <linux/ioport.h> | 25 | #include <linux/ioport.h> |
26 | #include <linux/serial.h> | ||
27 | #include <linux/serial_8250.h> | 26 | #include <linux/serial_8250.h> |
28 | #include <linux/serial_core.h> | 27 | #include <linux/serial_core.h> |
29 | #include <linux/device.h> | 28 | #include <linux/device.h> |
@@ -44,7 +43,6 @@ | |||
44 | #include <asm/mach/map.h> | 43 | #include <asm/mach/map.h> |
45 | #include <asm/mach/irq.h> | 44 | #include <asm/mach/irq.h> |
46 | #include <asm/mach/arch.h> | 45 | #include <asm/mach/arch.h> |
47 | #include <asm/mach/irq.h> | ||
48 | #include <asm/mach/pci.h> | 46 | #include <asm/mach/pci.h> |
49 | 47 | ||
50 | /* | 48 | /* |
diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c index acd71e9c38a7..6f10dc208320 100644 --- a/arch/arm/mach-ixp4xx/nslu2-power.c +++ b/arch/arm/mach-ixp4xx/nslu2-power.c | |||
@@ -21,7 +21,6 @@ | |||
21 | #include <linux/reboot.h> | 21 | #include <linux/reboot.h> |
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/interrupt.h> | 23 | #include <linux/interrupt.h> |
24 | #include <linux/reboot.h> | ||
25 | 24 | ||
26 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
27 | 26 | ||
diff --git a/arch/arm/mach-ks8695/Makefile b/arch/arm/mach-ks8695/Makefile index 2a07a281fa8a..730a3af12c98 100644 --- a/arch/arm/mach-ks8695/Makefile +++ b/arch/arm/mach-ks8695/Makefile | |||
@@ -9,7 +9,7 @@ obj-n := | |||
9 | obj- := | 9 | obj- := |
10 | 10 | ||
11 | # PCI support is optional | 11 | # PCI support is optional |
12 | #obj-$(CONFIG_PCI) += pci.o | 12 | obj-$(CONFIG_PCI) += pci.o |
13 | 13 | ||
14 | # Board-specific support | 14 | # Board-specific support |
15 | obj-$(CONFIG_MACH_KS8695) += board-micrel.o | 15 | obj-$(CONFIG_MACH_KS8695) += board-micrel.o |
diff --git a/arch/arm/mach-ks8695/board-micrel.c b/arch/arm/mach-ks8695/board-micrel.c index 2feeef81d843..05ac2bd04020 100644 --- a/arch/arm/mach-ks8695/board-micrel.c +++ b/arch/arm/mach-ks8695/board-micrel.c | |||
@@ -40,7 +40,7 @@ static void __init micrel_init(void) | |||
40 | printk(KERN_INFO "Micrel KS8695 Development Board initializing\n"); | 40 | printk(KERN_INFO "Micrel KS8695 Development Board initializing\n"); |
41 | 41 | ||
42 | #ifdef CONFIG_PCI | 42 | #ifdef CONFIG_PCI |
43 | // ks8695_init_pci(&micrel_pci); | 43 | ks8695_init_pci(&micrel_pci); |
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | /* Add devices */ | 46 | /* Add devices */ |
diff --git a/arch/arm/mach-ks8695/gpio.c b/arch/arm/mach-ks8695/gpio.c index b1aa3cb3d4a3..5e46191c0af9 100644 --- a/arch/arm/mach-ks8695/gpio.c +++ b/arch/arm/mach-ks8695/gpio.c | |||
@@ -20,6 +20,8 @@ | |||
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
22 | #include <linux/init.h> | 22 | #include <linux/init.h> |
23 | #include <linux/debugfs.h> | ||
24 | #include <linux/seq_file.h> | ||
23 | #include <linux/module.h> | 25 | #include <linux/module.h> |
24 | 26 | ||
25 | #include <asm/io.h> | 27 | #include <asm/io.h> |
@@ -216,3 +218,84 @@ int irq_to_gpio(unsigned int irq) | |||
216 | return (irq - KS8695_IRQ_EXTERN0); | 218 | return (irq - KS8695_IRQ_EXTERN0); |
217 | } | 219 | } |
218 | EXPORT_SYMBOL(irq_to_gpio); | 220 | EXPORT_SYMBOL(irq_to_gpio); |
221 | |||
222 | |||
223 | /* .... Debug interface ..................................................... */ | ||
224 | |||
225 | #ifdef CONFIG_DEBUG_FS | ||
226 | |||
227 | static int ks8695_gpio_show(struct seq_file *s, void *unused) | ||
228 | { | ||
229 | unsigned int enable[] = { IOPC_IOEINT0EN, IOPC_IOEINT1EN, IOPC_IOEINT2EN, IOPC_IOEINT3EN, IOPC_IOTIM0EN, IOPC_IOTIM1EN }; | ||
230 | unsigned int intmask[] = { IOPC_IOEINT0TM, IOPC_IOEINT1TM, IOPC_IOEINT2TM, IOPC_IOEINT3TM }; | ||
231 | unsigned long mode, ctrl, data; | ||
232 | int i; | ||
233 | |||
234 | mode = __raw_readl(KS8695_GPIO_VA + KS8695_IOPM); | ||
235 | ctrl = __raw_readl(KS8695_GPIO_VA + KS8695_IOPC); | ||
236 | data = __raw_readl(KS8695_GPIO_VA + KS8695_IOPD); | ||
237 | |||
238 | seq_printf(s, "Pin\tI/O\tFunction\tState\n\n"); | ||
239 | |||
240 | for (i = KS8695_GPIO_0; i <= KS8695_GPIO_15 ; i++) { | ||
241 | seq_printf(s, "%i:\t", i); | ||
242 | |||
243 | seq_printf(s, "%s\t", (mode & IOPM_(i)) ? "Output" : "Input"); | ||
244 | |||
245 | if (i <= KS8695_GPIO_3) { | ||
246 | if (ctrl & enable[i]) { | ||
247 | seq_printf(s, "EXT%i ", i); | ||
248 | |||
249 | switch ((ctrl & intmask[i]) >> (4 * i)) { | ||
250 | case IOPC_TM_LOW: | ||
251 | seq_printf(s, "(Low)"); break; | ||
252 | case IOPC_TM_HIGH: | ||
253 | seq_printf(s, "(High)"); break; | ||
254 | case IOPC_TM_RISING: | ||
255 | seq_printf(s, "(Rising)"); break; | ||
256 | case IOPC_TM_FALLING: | ||
257 | seq_printf(s, "(Falling)"); break; | ||
258 | case IOPC_TM_EDGE: | ||
259 | seq_printf(s, "(Edges)"); break; | ||
260 | } | ||
261 | } | ||
262 | else | ||
263 | seq_printf(s, "GPIO\t"); | ||
264 | } | ||
265 | else if (i <= KS8695_GPIO_5) { | ||
266 | if (ctrl & enable[i]) | ||
267 | seq_printf(s, "TOUT%i\t", i - KS8695_GPIO_4); | ||
268 | else | ||
269 | seq_printf(s, "GPIO\t"); | ||
270 | } | ||
271 | else | ||
272 | seq_printf(s, "GPIO\t"); | ||
273 | |||
274 | seq_printf(s, "\t"); | ||
275 | |||
276 | seq_printf(s, "%i\n", (data & IOPD_(i)) ? 1 : 0); | ||
277 | } | ||
278 | return 0; | ||
279 | } | ||
280 | |||
281 | static int ks8695_gpio_open(struct inode *inode, struct file *file) | ||
282 | { | ||
283 | return single_open(file, ks8695_gpio_show, NULL); | ||
284 | } | ||
285 | |||
286 | static const struct file_operations ks8695_gpio_operations = { | ||
287 | .open = ks8695_gpio_open, | ||
288 | .read = seq_read, | ||
289 | .llseek = seq_lseek, | ||
290 | .release = single_release, | ||
291 | }; | ||
292 | |||
293 | static int __init ks8695_gpio_debugfs_init(void) | ||
294 | { | ||
295 | /* /sys/kernel/debug/ks8695_gpio */ | ||
296 | (void) debugfs_create_file("ks8695_gpio", S_IFREG | S_IRUGO, NULL, NULL, &ks8695_gpio_operations); | ||
297 | return 0; | ||
298 | } | ||
299 | postcore_initcall(ks8695_gpio_debugfs_init); | ||
300 | |||
301 | #endif | ||
diff --git a/arch/arm/mach-ks8695/pci.c b/arch/arm/mach-ks8695/pci.c new file mode 100644 index 000000000000..3f4e0330cb1a --- /dev/null +++ b/arch/arm/mach-ks8695/pci.c | |||
@@ -0,0 +1,326 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ks8695/pci.c | ||
3 | * | ||
4 | * Copyright (C) 2003, Micrel Semiconductors | ||
5 | * Copyright (C) 2006, Greg Ungerer <gerg@snapgear.com> | ||
6 | * Copyright (C) 2006, Ben Dooks | ||
7 | * Copyright (C) 2007, Andrew Victor | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/pci.h> | ||
26 | #include <linux/mm.h> | ||
27 | #include <linux/init.h> | ||
28 | #include <linux/irq.h> | ||
29 | #include <linux/delay.h> | ||
30 | |||
31 | #include <asm/io.h> | ||
32 | #include <asm/signal.h> | ||
33 | #include <asm/mach/pci.h> | ||
34 | #include <asm/hardware.h> | ||
35 | |||
36 | #include <asm/arch/devices.h> | ||
37 | #include <asm/arch/regs-pci.h> | ||
38 | |||
39 | |||
40 | static int pci_dbg; | ||
41 | static int pci_cfg_dbg; | ||
42 | |||
43 | |||
44 | static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where) | ||
45 | { | ||
46 | unsigned long pbca; | ||
47 | |||
48 | pbca = PBCA_ENABLE | (where & ~3); | ||
49 | pbca |= PCI_SLOT(devfn) << 11 ; | ||
50 | pbca |= PCI_FUNC(devfn) << 8; | ||
51 | pbca |= bus_nr << 16; | ||
52 | |||
53 | if (bus_nr == 0) { | ||
54 | /* use Type-0 transaction */ | ||
55 | __raw_writel(pbca, KS8695_PCI_VA + KS8695_PBCA); | ||
56 | } else { | ||
57 | /* use Type-1 transaction */ | ||
58 | __raw_writel(pbca | PBCA_TYPE1, KS8695_PCI_VA + KS8695_PBCA); | ||
59 | } | ||
60 | } | ||
61 | |||
62 | |||
63 | /* | ||
64 | * The KS8695 datasheet prohibits anything other than 32bit accesses | ||
65 | * to the IO registers, so all our configuration must be done with | ||
66 | * 32bit operations, and the correct bit masking and shifting. | ||
67 | */ | ||
68 | |||
69 | static int ks8695_pci_readconfig(struct pci_bus *bus, | ||
70 | unsigned int devfn, int where, int size, u32 *value) | ||
71 | { | ||
72 | ks8695_pci_setupconfig(bus->number, devfn, where); | ||
73 | |||
74 | *value = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); | ||
75 | |||
76 | switch (size) { | ||
77 | case 4: | ||
78 | break; | ||
79 | case 2: | ||
80 | *value = *value >> ((where & 2) * 8); | ||
81 | *value &= 0xffff; | ||
82 | break; | ||
83 | case 1: | ||
84 | *value = *value >> ((where & 3) * 8); | ||
85 | *value &= 0xff; | ||
86 | break; | ||
87 | } | ||
88 | |||
89 | if (pci_cfg_dbg) { | ||
90 | printk("read: %d,%08x,%02x,%d: %08x (%08x)\n", | ||
91 | bus->number, devfn, where, size, *value, | ||
92 | __raw_readl(KS8695_PCI_VA + KS8695_PBCD)); | ||
93 | } | ||
94 | |||
95 | return PCIBIOS_SUCCESSFUL; | ||
96 | } | ||
97 | |||
98 | static int ks8695_pci_writeconfig(struct pci_bus *bus, | ||
99 | unsigned int devfn, int where, int size, u32 value) | ||
100 | { | ||
101 | unsigned long tmp; | ||
102 | |||
103 | if (pci_cfg_dbg) { | ||
104 | printk("write: %d,%08x,%02x,%d: %08x\n", | ||
105 | bus->number, devfn, where, size, value); | ||
106 | } | ||
107 | |||
108 | ks8695_pci_setupconfig(bus->number, devfn, where); | ||
109 | |||
110 | switch (size) { | ||
111 | case 4: | ||
112 | __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); | ||
113 | break; | ||
114 | case 2: | ||
115 | tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); | ||
116 | tmp &= ~(0xffff << ((where & 2) * 8)); | ||
117 | tmp |= value << ((where & 2) * 8); | ||
118 | |||
119 | __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); | ||
120 | break; | ||
121 | case 1: | ||
122 | tmp = __raw_readl(KS8695_PCI_VA + KS8695_PBCD); | ||
123 | tmp &= ~(0xff << ((where & 3) * 8)); | ||
124 | tmp |= value << ((where & 3) * 8); | ||
125 | |||
126 | __raw_writel(tmp, KS8695_PCI_VA + KS8695_PBCD); | ||
127 | break; | ||
128 | } | ||
129 | |||
130 | return PCIBIOS_SUCCESSFUL; | ||
131 | } | ||
132 | |||
133 | static void ks8695_local_writeconfig(int where, u32 value) | ||
134 | { | ||
135 | ks8695_pci_setupconfig(0, 0, where); | ||
136 | __raw_writel(value, KS8695_PCI_VA + KS8695_PBCD); | ||
137 | } | ||
138 | |||
139 | static struct pci_ops ks8695_pci_ops = { | ||
140 | .read = ks8695_pci_readconfig, | ||
141 | .write = ks8695_pci_writeconfig, | ||
142 | }; | ||
143 | |||
144 | static struct pci_bus *ks8695_pci_scan_bus(int nr, struct pci_sys_data *sys) | ||
145 | { | ||
146 | return pci_scan_bus(sys->busnr, &ks8695_pci_ops, sys); | ||
147 | } | ||
148 | |||
149 | static struct resource pci_mem = { | ||
150 | .name = "PCI Memory space", | ||
151 | .start = KS8695_PCIMEM_PA, | ||
152 | .end = KS8695_PCIMEM_PA + (KS8695_PCIMEM_SIZE - 1), | ||
153 | .flags = IORESOURCE_MEM, | ||
154 | }; | ||
155 | |||
156 | static struct resource pci_io = { | ||
157 | .name = "PCI IO space", | ||
158 | .start = KS8695_PCIIO_PA, | ||
159 | .end = KS8695_PCIIO_PA + (KS8695_PCIIO_SIZE - 1), | ||
160 | .flags = IORESOURCE_IO, | ||
161 | }; | ||
162 | |||
163 | static int __init ks8695_pci_setup(int nr, struct pci_sys_data *sys) | ||
164 | { | ||
165 | if (nr > 0) | ||
166 | return 0; | ||
167 | |||
168 | request_resource(&iomem_resource, &pci_mem); | ||
169 | request_resource(&ioport_resource, &pci_io); | ||
170 | |||
171 | sys->resource[0] = &pci_io; | ||
172 | sys->resource[1] = &pci_mem; | ||
173 | sys->resource[2] = NULL; | ||
174 | |||
175 | /* Assign and enable processor bridge */ | ||
176 | ks8695_local_writeconfig(PCI_BASE_ADDRESS_0, KS8695_PCIMEM_PA); | ||
177 | |||
178 | /* Enable bus-master & Memory Space access */ | ||
179 | ks8695_local_writeconfig(PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); | ||
180 | |||
181 | /* Set cache-line size & latency. */ | ||
182 | ks8695_local_writeconfig(PCI_CACHE_LINE_SIZE, (32 << 8) | (L1_CACHE_BYTES / sizeof(u32))); | ||
183 | |||
184 | /* Reserve PCI memory space for PCI-AHB resources */ | ||
185 | if (!request_mem_region(KS8695_PCIMEM_PA, SZ_64M, "PCI-AHB Bridge")) { | ||
186 | printk(KERN_ERR "Cannot allocate PCI-AHB Bridge memory.\n"); | ||
187 | return -EBUSY; | ||
188 | } | ||
189 | |||
190 | return 1; | ||
191 | } | ||
192 | |||
193 | static inline unsigned int size_mask(unsigned long size) | ||
194 | { | ||
195 | return (~size) + 1; | ||
196 | } | ||
197 | |||
198 | static int ks8695_pci_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | ||
199 | { | ||
200 | unsigned long pc = instruction_pointer(regs); | ||
201 | unsigned long instr = *(unsigned long *)pc; | ||
202 | unsigned long cmdstat; | ||
203 | |||
204 | cmdstat = __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS); | ||
205 | |||
206 | printk(KERN_ERR "PCI abort: address = 0x%08lx fsr = 0x%03x PC = 0x%08lx LR = 0x%08lx [%s%s%s%s%s]\n", | ||
207 | addr, fsr, regs->ARM_pc, regs->ARM_lr, | ||
208 | cmdstat & (PCI_STATUS_SIG_TARGET_ABORT << 16) ? "GenTarget" : " ", | ||
209 | cmdstat & (PCI_STATUS_REC_TARGET_ABORT << 16) ? "RecvTarget" : " ", | ||
210 | cmdstat & (PCI_STATUS_REC_MASTER_ABORT << 16) ? "MasterAbort" : " ", | ||
211 | cmdstat & (PCI_STATUS_SIG_SYSTEM_ERROR << 16) ? "SysError" : " ", | ||
212 | cmdstat & (PCI_STATUS_DETECTED_PARITY << 16) ? "Parity" : " " | ||
213 | ); | ||
214 | |||
215 | __raw_writel(cmdstat, KS8695_PCI_VA + KS8695_CRCFCS); | ||
216 | |||
217 | /* | ||
218 | * If the instruction being executed was a read, | ||
219 | * make it look like it read all-ones. | ||
220 | */ | ||
221 | if ((instr & 0x0c100000) == 0x04100000) { | ||
222 | int reg = (instr >> 12) & 15; | ||
223 | unsigned long val; | ||
224 | |||
225 | if (instr & 0x00400000) | ||
226 | val = 255; | ||
227 | else | ||
228 | val = -1; | ||
229 | |||
230 | regs->uregs[reg] = val; | ||
231 | regs->ARM_pc += 4; | ||
232 | return 0; | ||
233 | } | ||
234 | |||
235 | if ((instr & 0x0e100090) == 0x00100090) { | ||
236 | int reg = (instr >> 12) & 15; | ||
237 | |||
238 | regs->uregs[reg] = -1; | ||
239 | regs->ARM_pc += 4; | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | return 1; | ||
244 | } | ||
245 | |||
246 | static void __init ks8695_pci_preinit(void) | ||
247 | { | ||
248 | /* stage 1 initialization, subid, subdevice = 0x0001 */ | ||
249 | __raw_writel(0x00010001, KS8695_PCI_VA + KS8695_CRCSID); | ||
250 | |||
251 | /* stage 2 initialization */ | ||
252 | /* prefetch limits with 16 words, retry enable */ | ||
253 | __raw_writel(0x40000000, KS8695_PCI_VA + KS8695_PBCS); | ||
254 | |||
255 | /* configure memory mapping */ | ||
256 | __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBA); | ||
257 | __raw_writel(size_mask(KS8695_PCIMEM_SIZE), KS8695_PCI_VA + KS8695_PMBAM); | ||
258 | __raw_writel(KS8695_PCIMEM_PA, KS8695_PCI_VA + KS8695_PMBAT); | ||
259 | __raw_writel(0, KS8695_PCI_VA + KS8695_PMBAC); | ||
260 | |||
261 | /* configure IO mapping */ | ||
262 | __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBA); | ||
263 | __raw_writel(size_mask(KS8695_PCIIO_SIZE), KS8695_PCI_VA + KS8695_PIOBAM); | ||
264 | __raw_writel(KS8695_PCIIO_PA, KS8695_PCI_VA + KS8695_PIOBAT); | ||
265 | __raw_writel(0, KS8695_PCI_VA + KS8695_PIOBAC); | ||
266 | |||
267 | /* hook in fault handlers */ | ||
268 | hook_fault_code(8, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch"); | ||
269 | hook_fault_code(10, ks8695_pci_fault, SIGBUS, "external abort on non-linefetch"); | ||
270 | } | ||
271 | |||
272 | static void ks8695_show_pciregs(void) | ||
273 | { | ||
274 | if (!pci_dbg) | ||
275 | return; | ||
276 | |||
277 | printk(KERN_INFO "PCI: CRCFID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFID)); | ||
278 | printk(KERN_INFO "PCI: CRCFCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFCS)); | ||
279 | printk(KERN_INFO "PCI: CRCFRV = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFRV)); | ||
280 | printk(KERN_INFO "PCI: CRCFLT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFLT)); | ||
281 | printk(KERN_INFO "PCI: CRCBMA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCBMA)); | ||
282 | printk(KERN_INFO "PCI: CRCSID = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCSID)); | ||
283 | printk(KERN_INFO "PCI: CRCFIT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_CRCFIT)); | ||
284 | |||
285 | printk(KERN_INFO "PCI: PBM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBM)); | ||
286 | printk(KERN_INFO "PCI: PBCS = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PBCS)); | ||
287 | |||
288 | printk(KERN_INFO "PCI: PMBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBA)); | ||
289 | printk(KERN_INFO "PCI: PMBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAC)); | ||
290 | printk(KERN_INFO "PCI: PMBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAM)); | ||
291 | printk(KERN_INFO "PCI: PMBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PMBAT)); | ||
292 | |||
293 | printk(KERN_INFO "PCI: PIOBA = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBA)); | ||
294 | printk(KERN_INFO "PCI: PIOBAC = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAC)); | ||
295 | printk(KERN_INFO "PCI: PIOBAM = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAM)); | ||
296 | printk(KERN_INFO "PCI: PIOBAT = %08x\n", __raw_readl(KS8695_PCI_VA + KS8695_PIOBAT)); | ||
297 | } | ||
298 | |||
299 | |||
300 | static struct hw_pci ks8695_pci __initdata = { | ||
301 | .nr_controllers = 1, | ||
302 | .preinit = ks8695_pci_preinit, | ||
303 | .setup = ks8695_pci_setup, | ||
304 | .scan = ks8695_pci_scan_bus, | ||
305 | .postinit = NULL, | ||
306 | .swizzle = pci_std_swizzle, | ||
307 | .map_irq = NULL, | ||
308 | }; | ||
309 | |||
310 | void __init ks8695_init_pci(struct ks8695_pci_cfg *cfg) | ||
311 | { | ||
312 | if (__raw_readl(KS8695_PCI_VA + KS8695_CRCFRV) & CFRV_GUEST) { | ||
313 | printk("PCI: KS8695 in guest mode, not initialising\n"); | ||
314 | return; | ||
315 | } | ||
316 | |||
317 | printk(KERN_INFO "PCI: Initialising\n"); | ||
318 | ks8695_show_pciregs(); | ||
319 | |||
320 | /* set Mode */ | ||
321 | __raw_writel(cfg->mode << 29, KS8695_PCI_VA + KS8695_PBM); | ||
322 | |||
323 | ks8695_pci.map_irq = cfg->map_irq; /* board-specific map_irq method */ | ||
324 | |||
325 | pci_common_init(&ks8695_pci); | ||
326 | } | ||
diff --git a/arch/arm/mach-ks8695/time.c b/arch/arm/mach-ks8695/time.c index d2c86e4a72eb..02f766b3121d 100644 --- a/arch/arm/mach-ks8695/time.c +++ b/arch/arm/mach-ks8695/time.c | |||
@@ -70,10 +70,7 @@ static unsigned long ks8695_gettimeoffset (void) | |||
70 | */ | 70 | */ |
71 | static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id) | 71 | static irqreturn_t ks8695_timer_interrupt(int irq, void *dev_id) |
72 | { | 72 | { |
73 | write_seqlock(&xtime_lock); | ||
74 | timer_tick(); | 73 | timer_tick(); |
75 | write_sequnlock(&xtime_lock); | ||
76 | |||
77 | return IRQ_HANDLED; | 74 | return IRQ_HANDLED; |
78 | } | 75 | } |
79 | 76 | ||
diff --git a/arch/arm/mach-lh7a40x/time.c b/arch/arm/mach-lh7a40x/time.c index c25316d02537..e50e60b33851 100644 --- a/arch/arm/mach-lh7a40x/time.c +++ b/arch/arm/mach-lh7a40x/time.c | |||
@@ -41,13 +41,9 @@ | |||
41 | static irqreturn_t | 41 | static irqreturn_t |
42 | lh7a40x_timer_interrupt(int irq, void *dev_id) | 42 | lh7a40x_timer_interrupt(int irq, void *dev_id) |
43 | { | 43 | { |
44 | write_seqlock(&xtime_lock); | ||
45 | |||
46 | TIMER_EOI = 0; | 44 | TIMER_EOI = 0; |
47 | timer_tick(); | 45 | timer_tick(); |
48 | 46 | ||
49 | write_sequnlock(&xtime_lock); | ||
50 | |||
51 | return IRQ_HANDLED; | 47 | return IRQ_HANDLED; |
52 | } | 48 | } |
53 | 49 | ||
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig new file mode 100644 index 000000000000..3553babbbf05 --- /dev/null +++ b/arch/arm/mach-msm/Kconfig | |||
@@ -0,0 +1,18 @@ | |||
1 | if ARCH_MSM7X00A | ||
2 | |||
3 | comment "MSM7X00A Board Type" | ||
4 | depends on ARCH_MSM7X00A | ||
5 | |||
6 | config MACH_HALIBUT | ||
7 | depends on ARCH_MSM7X00A | ||
8 | default y | ||
9 | bool "Halibut Board (QCT SURF7200A)" | ||
10 | help | ||
11 | Support for the Qualcomm SURF7200A eval board. | ||
12 | |||
13 | config MSM7X00A_IDLE | ||
14 | depends on ARCH_MSM7X00A | ||
15 | default y | ||
16 | bool "Idle Support for MSM7X00A" | ||
17 | |||
18 | endif | ||
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile new file mode 100644 index 000000000000..d12f23655850 --- /dev/null +++ b/arch/arm/mach-msm/Makefile | |||
@@ -0,0 +1,7 @@ | |||
1 | obj-y += io.o idle.o irq.o timer.o dma.o | ||
2 | |||
3 | # Common code for board init | ||
4 | obj-y += common.o | ||
5 | |||
6 | obj-$(CONFIG_MACH_HALIBUT) += board-halibut.o | ||
7 | |||
diff --git a/arch/arm/mach-msm/Makefile.boot b/arch/arm/mach-msm/Makefile.boot new file mode 100644 index 000000000000..24dfbf8c07c4 --- /dev/null +++ b/arch/arm/mach-msm/Makefile.boot | |||
@@ -0,0 +1,3 @@ | |||
1 | zreladdr-y := 0x10008000 | ||
2 | params_phys-y := 0x10000100 | ||
3 | initrd_phys-y := 0x10800000 | ||
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c new file mode 100644 index 000000000000..86dfb2b5261c --- /dev/null +++ b/arch/arm/mach-msm/board-halibut.c | |||
@@ -0,0 +1,114 @@ | |||
1 | /* linux/arch/arm/mach-msm/board-halibut.c | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * Author: Brian Swetland <swetland@google.com> | ||
5 | * | ||
6 | * This software is licensed under the terms of the GNU General Public | ||
7 | * License version 2, as published by the Free Software Foundation, and | ||
8 | * may be copied, distributed, and modified under those terms. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | */ | ||
16 | |||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/input.h> | ||
21 | |||
22 | #include <asm/hardware.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/map.h> | ||
26 | #include <asm/mach/flash.h> | ||
27 | |||
28 | #include <asm/arch/board.h> | ||
29 | #include <asm/arch/msm_iomap.h> | ||
30 | |||
31 | #include <asm/io.h> | ||
32 | #include <asm/delay.h> | ||
33 | |||
34 | #include <linux/mtd/nand.h> | ||
35 | #include <linux/mtd/partitions.h> | ||
36 | |||
37 | static struct resource smc91x_resources[] = { | ||
38 | [0] = { | ||
39 | .start = 0x9C004300, | ||
40 | .end = 0x9C004400, | ||
41 | .flags = IORESOURCE_MEM, | ||
42 | }, | ||
43 | [1] = { | ||
44 | .start = MSM_GPIO_TO_INT(49), | ||
45 | .end = MSM_GPIO_TO_INT(49), | ||
46 | .flags = IORESOURCE_IRQ, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | static struct platform_device smc91x_device = { | ||
51 | .name = "smc91x", | ||
52 | .id = 0, | ||
53 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
54 | .resource = smc91x_resources, | ||
55 | }; | ||
56 | |||
57 | static void mddi0_panel_power(int on) | ||
58 | { | ||
59 | } | ||
60 | |||
61 | static struct msm_mddi_platform_data msm_mddi0_pdata = { | ||
62 | .panel_power = mddi0_panel_power, | ||
63 | .has_vsync_irq = 0, | ||
64 | }; | ||
65 | |||
66 | static struct platform_device msm_mddi0_device = { | ||
67 | .name = "msm_mddi", | ||
68 | .id = 0, | ||
69 | .dev = { | ||
70 | .platform_data = &msm_mddi0_pdata | ||
71 | }, | ||
72 | }; | ||
73 | |||
74 | static struct platform_device msm_serial0_device = { | ||
75 | .name = "msm_serial", | ||
76 | .id = 0, | ||
77 | }; | ||
78 | |||
79 | static struct platform_device *devices[] __initdata = { | ||
80 | &msm_serial0_device, | ||
81 | &msm_mddi0_device, | ||
82 | &smc91x_device, | ||
83 | }; | ||
84 | |||
85 | extern struct sys_timer msm_timer; | ||
86 | |||
87 | static void __init halibut_init_irq(void) | ||
88 | { | ||
89 | msm_init_irq(); | ||
90 | } | ||
91 | |||
92 | static void __init halibut_init(void) | ||
93 | { | ||
94 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
95 | msm_add_devices(); | ||
96 | } | ||
97 | |||
98 | static void __init halibut_map_io(void) | ||
99 | { | ||
100 | msm_map_common_io(); | ||
101 | } | ||
102 | |||
103 | MACHINE_START(HALIBUT, "Halibut Board (QCT SURF7200A)") | ||
104 | |||
105 | /* UART for LL DEBUG */ | ||
106 | .phys_io = MSM_UART1_PHYS, | ||
107 | .io_pg_offst = ((MSM_UART1_BASE) >> 18) & 0xfffc, | ||
108 | |||
109 | .boot_params = 0x10000100, | ||
110 | .map_io = halibut_map_io, | ||
111 | .init_irq = halibut_init_irq, | ||
112 | .init_machine = halibut_init, | ||
113 | .timer = &msm_timer, | ||
114 | MACHINE_END | ||
diff --git a/arch/arm/mach-msm/common.c b/arch/arm/mach-msm/common.c new file mode 100644 index 000000000000..3f5d3362f887 --- /dev/null +++ b/arch/arm/mach-msm/common.c | |||
@@ -0,0 +1,116 @@ | |||
1 | /* linux/arch/arm/mach-msm/common.c | ||
2 | * | ||
3 | * Common setup code for MSM7K Boards | ||
4 | * | ||
5 | * Copyright (C) 2007 Google, Inc. | ||
6 | * Author: Brian Swetland <swetland@google.com> | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | |||
23 | #include <asm/mach/flash.h> | ||
24 | #include <asm/io.h> | ||
25 | |||
26 | #include <asm/setup.h> | ||
27 | |||
28 | #include <linux/mtd/nand.h> | ||
29 | #include <linux/mtd/partitions.h> | ||
30 | |||
31 | #include <asm/arch/msm_iomap.h> | ||
32 | |||
33 | #include <asm/arch/board.h> | ||
34 | |||
35 | struct flash_platform_data msm_nand_data = { | ||
36 | .parts = 0, | ||
37 | .nr_parts = 0, | ||
38 | }; | ||
39 | |||
40 | static struct resource msm_nand_resources[] = { | ||
41 | [0] = { | ||
42 | .start = 7, | ||
43 | .end = 7, | ||
44 | .flags = IORESOURCE_DMA, | ||
45 | }, | ||
46 | }; | ||
47 | |||
48 | static struct platform_device msm_nand_device = { | ||
49 | .name = "msm_nand", | ||
50 | .id = -1, | ||
51 | .num_resources = ARRAY_SIZE(msm_nand_resources), | ||
52 | .resource = msm_nand_resources, | ||
53 | .dev = { | ||
54 | .platform_data = &msm_nand_data, | ||
55 | }, | ||
56 | }; | ||
57 | |||
58 | static struct platform_device msm_smd_device = { | ||
59 | .name = "msm_smd", | ||
60 | .id = -1, | ||
61 | }; | ||
62 | |||
63 | static struct resource msm_i2c_resources[] = { | ||
64 | { | ||
65 | .start = MSM_I2C_BASE, | ||
66 | .end = MSM_I2C_BASE + MSM_I2C_SIZE - 1, | ||
67 | .flags = IORESOURCE_MEM, | ||
68 | }, | ||
69 | { | ||
70 | .start = INT_PWB_I2C, | ||
71 | .end = INT_PWB_I2C, | ||
72 | .flags = IORESOURCE_IRQ, | ||
73 | }, | ||
74 | }; | ||
75 | |||
76 | static struct platform_device msm_i2c_device = { | ||
77 | .name = "msm_i2c", | ||
78 | .id = 0, | ||
79 | .num_resources = ARRAY_SIZE(msm_i2c_resources), | ||
80 | .resource = msm_i2c_resources, | ||
81 | }; | ||
82 | |||
83 | static struct resource usb_resources[] = { | ||
84 | { | ||
85 | .start = MSM_HSUSB_PHYS, | ||
86 | .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE, | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }, | ||
89 | { | ||
90 | .start = INT_USB_HS, | ||
91 | .end = INT_USB_HS, | ||
92 | .flags = IORESOURCE_IRQ, | ||
93 | }, | ||
94 | }; | ||
95 | |||
96 | static struct platform_device msm_hsusb_device = { | ||
97 | .name = "msm_hsusb", | ||
98 | .id = -1, | ||
99 | .num_resources = ARRAY_SIZE(usb_resources), | ||
100 | .resource = usb_resources, | ||
101 | .dev = { | ||
102 | .coherent_dma_mask = 0xffffffff, | ||
103 | }, | ||
104 | }; | ||
105 | |||
106 | static struct platform_device *devices[] __initdata = { | ||
107 | &msm_nand_device, | ||
108 | &msm_smd_device, | ||
109 | &msm_i2c_device, | ||
110 | &msm_hsusb_device, | ||
111 | }; | ||
112 | |||
113 | void __init msm_add_devices(void) | ||
114 | { | ||
115 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
116 | } | ||
diff --git a/arch/arm/mach-msm/dma.c b/arch/arm/mach-msm/dma.c new file mode 100644 index 000000000000..8b0f339b3274 --- /dev/null +++ b/arch/arm/mach-msm/dma.c | |||
@@ -0,0 +1,214 @@ | |||
1 | /* linux/arch/arm/mach-msm/dma.c | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <asm/io.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <asm/arch/dma.h> | ||
19 | |||
20 | #define MSM_DMOV_CHANNEL_COUNT 16 | ||
21 | |||
22 | enum { | ||
23 | MSM_DMOV_PRINT_ERRORS = 1, | ||
24 | MSM_DMOV_PRINT_IO = 2, | ||
25 | MSM_DMOV_PRINT_FLOW = 4 | ||
26 | }; | ||
27 | |||
28 | static DEFINE_SPINLOCK(msm_dmov_lock); | ||
29 | static struct msm_dmov_cmd active_command; | ||
30 | static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; | ||
31 | static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; | ||
32 | unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; | ||
33 | |||
34 | #define MSM_DMOV_DPRINTF(mask, format, args...) \ | ||
35 | do { \ | ||
36 | if ((mask) & msm_dmov_print_mask) \ | ||
37 | printk(KERN_ERR format, args); \ | ||
38 | } while (0) | ||
39 | #define PRINT_ERROR(format, args...) \ | ||
40 | MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args); | ||
41 | #define PRINT_IO(format, args...) \ | ||
42 | MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args); | ||
43 | #define PRINT_FLOW(format, args...) \ | ||
44 | MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); | ||
45 | |||
46 | void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) | ||
47 | { | ||
48 | unsigned long irq_flags; | ||
49 | unsigned int status; | ||
50 | |||
51 | spin_lock_irqsave(&msm_dmov_lock, irq_flags); | ||
52 | status = readl(DMOV_STATUS(id)); | ||
53 | if (list_empty(&ready_commands[id]) && | ||
54 | (status & DMOV_STATUS_CMD_PTR_RDY)) { | ||
55 | #if 0 | ||
56 | if (list_empty(&active_commands[id])) { | ||
57 | PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id); | ||
58 | writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); | ||
59 | } | ||
60 | #endif | ||
61 | PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); | ||
62 | list_add_tail(&cmd->list, &active_commands[id]); | ||
63 | writel(cmd->cmdptr, DMOV_CMD_PTR(id)); | ||
64 | } else { | ||
65 | if (list_empty(&active_commands[id])) | ||
66 | PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); | ||
67 | |||
68 | PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status); | ||
69 | list_add_tail(&cmd->list, &ready_commands[id]); | ||
70 | } | ||
71 | spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); | ||
72 | } | ||
73 | |||
74 | struct msm_dmov_exec_cmdptr_cmd { | ||
75 | struct msm_dmov_cmd dmov_cmd; | ||
76 | struct completion complete; | ||
77 | unsigned id; | ||
78 | unsigned int result; | ||
79 | unsigned int flush[6]; | ||
80 | }; | ||
81 | |||
82 | static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result) | ||
83 | { | ||
84 | struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); | ||
85 | cmd->result = result; | ||
86 | if (result != 0x80000002) { | ||
87 | cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id)); | ||
88 | cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id)); | ||
89 | cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id)); | ||
90 | cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id)); | ||
91 | cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id)); | ||
92 | cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id)); | ||
93 | } | ||
94 | complete(&cmd->complete); | ||
95 | } | ||
96 | |||
97 | int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) | ||
98 | { | ||
99 | struct msm_dmov_exec_cmdptr_cmd cmd; | ||
100 | |||
101 | PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr); | ||
102 | |||
103 | cmd.dmov_cmd.cmdptr = cmdptr; | ||
104 | cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; | ||
105 | cmd.id = id; | ||
106 | init_completion(&cmd.complete); | ||
107 | |||
108 | msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd); | ||
109 | wait_for_completion(&cmd.complete); | ||
110 | |||
111 | if (cmd.result != 0x80000002) { | ||
112 | PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); | ||
113 | PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", | ||
114 | id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]); | ||
115 | return -EIO; | ||
116 | } | ||
117 | PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); | ||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | |||
122 | static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) | ||
123 | { | ||
124 | unsigned int int_status, mask, id; | ||
125 | unsigned long irq_flags; | ||
126 | unsigned int ch_status; | ||
127 | unsigned int ch_result; | ||
128 | struct msm_dmov_cmd *cmd; | ||
129 | |||
130 | spin_lock_irqsave(&msm_dmov_lock, irq_flags); | ||
131 | |||
132 | int_status = readl(DMOV_ISR); /* read and clear interrupt */ | ||
133 | PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status); | ||
134 | |||
135 | while (int_status) { | ||
136 | mask = int_status & -int_status; | ||
137 | id = fls(mask) - 1; | ||
138 | PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id); | ||
139 | int_status &= ~mask; | ||
140 | ch_status = readl(DMOV_STATUS(id)); | ||
141 | if (!(ch_status & DMOV_STATUS_RSLT_VALID)) { | ||
142 | PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status); | ||
143 | continue; | ||
144 | } | ||
145 | do { | ||
146 | ch_result = readl(DMOV_RSLT(id)); | ||
147 | if (list_empty(&active_commands[id])) { | ||
148 | PRINT_ERROR("msm_datamover_irq_handler id %d, got result " | ||
149 | "with no active command, status %x, result %x\n", | ||
150 | id, ch_status, ch_result); | ||
151 | cmd = NULL; | ||
152 | } else | ||
153 | cmd = list_entry(active_commands[id].next, typeof(*cmd), list); | ||
154 | PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result); | ||
155 | if (ch_result & DMOV_RSLT_DONE) { | ||
156 | PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", | ||
157 | id, ch_status); | ||
158 | PRINT_IO("msm_datamover_irq_handler id %d, got result " | ||
159 | "for %p, result %x\n", id, cmd, ch_result); | ||
160 | if (cmd) { | ||
161 | list_del(&cmd->list); | ||
162 | cmd->complete_func(cmd, ch_result); | ||
163 | } | ||
164 | } | ||
165 | if (ch_result & DMOV_RSLT_FLUSH) { | ||
166 | unsigned int flush0 = readl(DMOV_FLUSH0(id)); | ||
167 | PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | ||
168 | PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0); | ||
169 | if (cmd) { | ||
170 | list_del(&cmd->list); | ||
171 | cmd->complete_func(cmd, ch_result); | ||
172 | } | ||
173 | } | ||
174 | if (ch_result & DMOV_RSLT_ERROR) { | ||
175 | unsigned int flush0 = readl(DMOV_FLUSH0(id)); | ||
176 | PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | ||
177 | PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0); | ||
178 | if (cmd) { | ||
179 | list_del(&cmd->list); | ||
180 | cmd->complete_func(cmd, ch_result); | ||
181 | } | ||
182 | /* this does not seem to work, once we get an error */ | ||
183 | /* the datamover will no longer accept commands */ | ||
184 | writel(0, DMOV_FLUSH0(id)); | ||
185 | } | ||
186 | ch_status = readl(DMOV_STATUS(id)); | ||
187 | PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | ||
188 | if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) { | ||
189 | cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); | ||
190 | list_del(&cmd->list); | ||
191 | list_add_tail(&cmd->list, &active_commands[id]); | ||
192 | PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); | ||
193 | writel(cmd->cmdptr, DMOV_CMD_PTR(id)); | ||
194 | } | ||
195 | } while (ch_status & DMOV_STATUS_RSLT_VALID); | ||
196 | PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | ||
197 | } | ||
198 | spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); | ||
199 | return IRQ_HANDLED; | ||
200 | } | ||
201 | |||
202 | static int __init msm_init_datamover(void) | ||
203 | { | ||
204 | int i; | ||
205 | for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { | ||
206 | INIT_LIST_HEAD(&ready_commands[i]); | ||
207 | INIT_LIST_HEAD(&active_commands[i]); | ||
208 | writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); | ||
209 | } | ||
210 | return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); | ||
211 | } | ||
212 | |||
213 | arch_initcall(msm_init_datamover); | ||
214 | |||
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S new file mode 100644 index 000000000000..2b1cb7f16943 --- /dev/null +++ b/arch/arm/mach-msm/idle.S | |||
@@ -0,0 +1,36 @@ | |||
1 | /* linux/include/asm-arm/arch-msm/idle.S | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/linkage.h> | ||
20 | #include <asm/assembler.h> | ||
21 | |||
22 | ENTRY(arch_idle) | ||
23 | #ifdef CONFIG_MSM7X00A_IDLE | ||
24 | mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | ||
25 | bic r0, r1, #(1 << 2) /* clear dcache bit */ | ||
26 | bic r0, r0, #(1 << 12) /* clear icache bit */ | ||
27 | mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | ||
28 | |||
29 | mov r0, #0 /* prepare wfi value */ | ||
30 | mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ | ||
31 | mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ | ||
32 | mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | ||
33 | |||
34 | mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | ||
35 | #endif | ||
36 | mov pc, lr | ||
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c new file mode 100644 index 000000000000..c39edb994a88 --- /dev/null +++ b/arch/arm/mach-msm/io.c | |||
@@ -0,0 +1,85 @@ | |||
1 | /* arch/arm/mach-msm/io.c | ||
2 | * | ||
3 | * MSM7K io support | ||
4 | * | ||
5 | * Copyright (C) 2007 Google, Inc. | ||
6 | * Author: Brian Swetland <swetland@google.com> | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | |||
22 | #include <asm/hardware.h> | ||
23 | #include <asm/io.h> | ||
24 | #include <asm/page.h> | ||
25 | #include <asm/arch/msm_iomap.h> | ||
26 | #include <asm/mach/map.h> | ||
27 | |||
28 | #include <asm/arch/board.h> | ||
29 | |||
30 | #define MSM_DEVICE(name) { \ | ||
31 | .virtual = MSM_##name##_BASE, \ | ||
32 | .pfn = __phys_to_pfn(MSM_##name##_PHYS), \ | ||
33 | .length = MSM_##name##_SIZE, \ | ||
34 | .type = MT_DEVICE_NONSHARED, \ | ||
35 | } | ||
36 | |||
37 | static struct map_desc msm_io_desc[] __initdata = { | ||
38 | MSM_DEVICE(VIC), | ||
39 | MSM_DEVICE(CSR), | ||
40 | MSM_DEVICE(GPT), | ||
41 | MSM_DEVICE(DMOV), | ||
42 | MSM_DEVICE(UART1), | ||
43 | MSM_DEVICE(UART2), | ||
44 | MSM_DEVICE(UART3), | ||
45 | MSM_DEVICE(I2C), | ||
46 | MSM_DEVICE(GPIO1), | ||
47 | MSM_DEVICE(GPIO2), | ||
48 | MSM_DEVICE(HSUSB), | ||
49 | MSM_DEVICE(CLK_CTL), | ||
50 | MSM_DEVICE(PMDH), | ||
51 | MSM_DEVICE(EMDH), | ||
52 | MSM_DEVICE(MDP), | ||
53 | { | ||
54 | .virtual = MSM_SHARED_RAM_BASE, | ||
55 | .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS), | ||
56 | .length = MSM_SHARED_RAM_SIZE, | ||
57 | .type = MT_DEVICE, | ||
58 | }, | ||
59 | }; | ||
60 | |||
61 | void __init msm_map_common_io(void) | ||
62 | { | ||
63 | /* Make sure the peripheral register window is closed, since | ||
64 | * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which | ||
65 | * pages are peripheral interface or not. | ||
66 | */ | ||
67 | asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0)); | ||
68 | |||
69 | iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc)); | ||
70 | } | ||
71 | |||
72 | void __iomem * | ||
73 | __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype) | ||
74 | { | ||
75 | if (mtype == MT_DEVICE) { | ||
76 | /* The peripherals in the 88000000 - D0000000 range | ||
77 | * are only accessable by type MT_DEVICE_NONSHARED. | ||
78 | * Adjust mtype as necessary to make this "just work." | ||
79 | */ | ||
80 | if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000)) | ||
81 | mtype = MT_DEVICE_NONSHARED; | ||
82 | } | ||
83 | |||
84 | return __arm_ioremap(phys_addr, size, mtype); | ||
85 | } | ||
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c new file mode 100644 index 000000000000..24158040b789 --- /dev/null +++ b/arch/arm/mach-msm/irq.c | |||
@@ -0,0 +1,154 @@ | |||
1 | /* linux/arch/arm/mach-msm/irq.c | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/sched.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/ptrace.h> | ||
21 | #include <linux/timer.h> | ||
22 | |||
23 | #include <linux/irq.h> | ||
24 | #include <asm/hardware.h> | ||
25 | |||
26 | #include <asm/io.h> | ||
27 | |||
28 | #include <asm/arch/msm_iomap.h> | ||
29 | |||
30 | #define VIC_REG(off) (MSM_VIC_BASE + (off)) | ||
31 | |||
32 | #define VIC_INT_SELECT0 VIC_REG(0x0000) /* 1: FIQ, 0: IRQ */ | ||
33 | #define VIC_INT_SELECT1 VIC_REG(0x0004) /* 1: FIQ, 0: IRQ */ | ||
34 | #define VIC_INT_EN0 VIC_REG(0x0010) | ||
35 | #define VIC_INT_EN1 VIC_REG(0x0014) | ||
36 | #define VIC_INT_ENCLEAR0 VIC_REG(0x0020) | ||
37 | #define VIC_INT_ENCLEAR1 VIC_REG(0x0024) | ||
38 | #define VIC_INT_ENSET0 VIC_REG(0x0030) | ||
39 | #define VIC_INT_ENSET1 VIC_REG(0x0034) | ||
40 | #define VIC_INT_TYPE0 VIC_REG(0x0040) /* 1: EDGE, 0: LEVEL */ | ||
41 | #define VIC_INT_TYPE1 VIC_REG(0x0044) /* 1: EDGE, 0: LEVEL */ | ||
42 | #define VIC_INT_POLARITY0 VIC_REG(0x0050) /* 1: NEG, 0: POS */ | ||
43 | #define VIC_INT_POLARITY1 VIC_REG(0x0054) /* 1: NEG, 0: POS */ | ||
44 | #define VIC_NO_PEND_VAL VIC_REG(0x0060) | ||
45 | #define VIC_INT_MASTEREN VIC_REG(0x0064) /* 1: IRQ, 2: FIQ */ | ||
46 | #define VIC_PROTECTION VIC_REG(0x006C) /* 1: ENABLE */ | ||
47 | #define VIC_CONFIG VIC_REG(0x0068) /* 1: USE ARM1136 VIC */ | ||
48 | #define VIC_IRQ_STATUS0 VIC_REG(0x0080) | ||
49 | #define VIC_IRQ_STATUS1 VIC_REG(0x0084) | ||
50 | #define VIC_FIQ_STATUS0 VIC_REG(0x0090) | ||
51 | #define VIC_FIQ_STATUS1 VIC_REG(0x0094) | ||
52 | #define VIC_RAW_STATUS0 VIC_REG(0x00A0) | ||
53 | #define VIC_RAW_STATUS1 VIC_REG(0x00A4) | ||
54 | #define VIC_INT_CLEAR0 VIC_REG(0x00B0) | ||
55 | #define VIC_INT_CLEAR1 VIC_REG(0x00B4) | ||
56 | #define VIC_SOFTINT0 VIC_REG(0x00C0) | ||
57 | #define VIC_SOFTINT1 VIC_REG(0x00C4) | ||
58 | #define VIC_IRQ_VEC_RD VIC_REG(0x00D0) /* pending int # */ | ||
59 | #define VIC_IRQ_VEC_PEND_RD VIC_REG(0x00D4) /* pending vector addr */ | ||
60 | #define VIC_IRQ_VEC_WR VIC_REG(0x00D8) | ||
61 | #define VIC_IRQ_IN_SERVICE VIC_REG(0x00E0) | ||
62 | #define VIC_IRQ_IN_STACK VIC_REG(0x00E4) | ||
63 | #define VIC_TEST_BUS_SEL VIC_REG(0x00E8) | ||
64 | |||
65 | #define VIC_VECTPRIORITY(n) VIC_REG(0x0200+((n) * 4)) | ||
66 | #define VIC_VECTADDR(n) VIC_REG(0x0400+((n) * 4)) | ||
67 | |||
68 | static void msm_irq_ack(unsigned int irq) | ||
69 | { | ||
70 | unsigned reg = VIC_INT_CLEAR0 + ((irq & 32) ? 4 : 0); | ||
71 | irq = 1 << (irq & 31); | ||
72 | writel(irq, reg); | ||
73 | } | ||
74 | |||
75 | static void msm_irq_mask(unsigned int irq) | ||
76 | { | ||
77 | unsigned reg = VIC_INT_ENCLEAR0 + ((irq & 32) ? 4 : 0); | ||
78 | writel(1 << (irq & 31), reg); | ||
79 | } | ||
80 | |||
81 | static void msm_irq_unmask(unsigned int irq) | ||
82 | { | ||
83 | unsigned reg = VIC_INT_ENSET0 + ((irq & 32) ? 4 : 0); | ||
84 | writel(1 << (irq & 31), reg); | ||
85 | } | ||
86 | |||
87 | static int msm_irq_set_wake(unsigned int irq, unsigned int on) | ||
88 | { | ||
89 | return -EINVAL; | ||
90 | } | ||
91 | |||
92 | static int msm_irq_set_type(unsigned int irq, unsigned int flow_type) | ||
93 | { | ||
94 | unsigned treg = VIC_INT_TYPE0 + ((irq & 32) ? 4 : 0); | ||
95 | unsigned preg = VIC_INT_POLARITY0 + ((irq & 32) ? 4 : 0); | ||
96 | int b = 1 << (irq & 31); | ||
97 | |||
98 | if (flow_type & (IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW)) | ||
99 | writel(readl(preg) | b, preg); | ||
100 | if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) | ||
101 | writel(readl(preg) & (~b), preg); | ||
102 | |||
103 | if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { | ||
104 | writel(readl(treg) | b, treg); | ||
105 | set_irq_handler(irq, handle_edge_irq); | ||
106 | } | ||
107 | if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { | ||
108 | writel(readl(treg) & (~b), treg); | ||
109 | set_irq_handler(irq, handle_level_irq); | ||
110 | } | ||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static struct irq_chip msm_irq_chip = { | ||
115 | .name = "msm", | ||
116 | .ack = msm_irq_ack, | ||
117 | .mask = msm_irq_mask, | ||
118 | .unmask = msm_irq_unmask, | ||
119 | .set_wake = msm_irq_set_wake, | ||
120 | .set_type = msm_irq_set_type, | ||
121 | }; | ||
122 | |||
123 | void __init msm_init_irq(void) | ||
124 | { | ||
125 | unsigned n; | ||
126 | |||
127 | /* select level interrupts */ | ||
128 | writel(0, VIC_INT_TYPE0); | ||
129 | writel(0, VIC_INT_TYPE1); | ||
130 | |||
131 | /* select highlevel interrupts */ | ||
132 | writel(0, VIC_INT_POLARITY0); | ||
133 | writel(0, VIC_INT_POLARITY1); | ||
134 | |||
135 | /* select IRQ for all INTs */ | ||
136 | writel(0, VIC_INT_SELECT0); | ||
137 | writel(0, VIC_INT_SELECT1); | ||
138 | |||
139 | /* disable all INTs */ | ||
140 | writel(0, VIC_INT_EN0); | ||
141 | writel(0, VIC_INT_EN1); | ||
142 | |||
143 | /* don't use 1136 vic */ | ||
144 | writel(0, VIC_CONFIG); | ||
145 | |||
146 | /* enable interrupt controller */ | ||
147 | writel(1, VIC_INT_MASTEREN); | ||
148 | |||
149 | for (n = 0; n < NR_MSM_IRQS; n++) { | ||
150 | set_irq_chip(n, &msm_irq_chip); | ||
151 | set_irq_handler(n, handle_level_irq); | ||
152 | set_irq_flags(n, IRQF_VALID); | ||
153 | } | ||
154 | } | ||
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c new file mode 100644 index 000000000000..bd4732d1ab3e --- /dev/null +++ b/arch/arm/mach-msm/timer.c | |||
@@ -0,0 +1,205 @@ | |||
1 | /* linux/arch/arm/mach-msm/timer.c | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/init.h> | ||
17 | #include <linux/time.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/irq.h> | ||
20 | #include <linux/clk.h> | ||
21 | #include <linux/clockchips.h> | ||
22 | #include <linux/delay.h> | ||
23 | |||
24 | #include <asm/mach/time.h> | ||
25 | #include <asm/arch/msm_iomap.h> | ||
26 | |||
27 | #include <asm/io.h> | ||
28 | |||
29 | #define MSM_DGT_BASE (MSM_GPT_BASE + 0x10) | ||
30 | #define MSM_DGT_SHIFT (5) | ||
31 | |||
32 | #define TIMER_MATCH_VAL 0x0000 | ||
33 | #define TIMER_COUNT_VAL 0x0004 | ||
34 | #define TIMER_ENABLE 0x0008 | ||
35 | #define TIMER_ENABLE_CLR_ON_MATCH_EN 2 | ||
36 | #define TIMER_ENABLE_EN 1 | ||
37 | #define TIMER_CLEAR 0x000C | ||
38 | |||
39 | #define CSR_PROTECTION 0x0020 | ||
40 | #define CSR_PROTECTION_EN 1 | ||
41 | |||
42 | #define GPT_HZ 32768 | ||
43 | #define DGT_HZ 19200000 /* 19.2 MHz or 600 KHz after shift */ | ||
44 | |||
45 | struct msm_clock { | ||
46 | struct clock_event_device clockevent; | ||
47 | struct clocksource clocksource; | ||
48 | struct irqaction irq; | ||
49 | uint32_t regbase; | ||
50 | uint32_t freq; | ||
51 | uint32_t shift; | ||
52 | }; | ||
53 | |||
54 | static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) | ||
55 | { | ||
56 | struct clock_event_device *evt = dev_id; | ||
57 | evt->event_handler(evt); | ||
58 | return IRQ_HANDLED; | ||
59 | } | ||
60 | |||
61 | static cycle_t msm_gpt_read(void) | ||
62 | { | ||
63 | return readl(MSM_GPT_BASE + TIMER_COUNT_VAL); | ||
64 | } | ||
65 | |||
66 | static cycle_t msm_dgt_read(void) | ||
67 | { | ||
68 | return readl(MSM_DGT_BASE + TIMER_COUNT_VAL) >> MSM_DGT_SHIFT; | ||
69 | } | ||
70 | |||
71 | static int msm_timer_set_next_event(unsigned long cycles, | ||
72 | struct clock_event_device *evt) | ||
73 | { | ||
74 | struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent); | ||
75 | uint32_t now = readl(clock->regbase + TIMER_COUNT_VAL); | ||
76 | uint32_t alarm = now + (cycles << clock->shift); | ||
77 | int late; | ||
78 | |||
79 | writel(alarm, clock->regbase + TIMER_MATCH_VAL); | ||
80 | now = readl(clock->regbase + TIMER_COUNT_VAL); | ||
81 | late = now - alarm; | ||
82 | if (late >= (-2 << clock->shift) && late < DGT_HZ*5) { | ||
83 | printk(KERN_NOTICE "msm_timer_set_next_event(%lu) clock %s, " | ||
84 | "alarm already expired, now %x, alarm %x, late %d\n", | ||
85 | cycles, clock->clockevent.name, now, alarm, late); | ||
86 | return -ETIME; | ||
87 | } | ||
88 | return 0; | ||
89 | } | ||
90 | |||
91 | static void msm_timer_set_mode(enum clock_event_mode mode, | ||
92 | struct clock_event_device *evt) | ||
93 | { | ||
94 | struct msm_clock *clock = container_of(evt, struct msm_clock, clockevent); | ||
95 | switch (mode) { | ||
96 | case CLOCK_EVT_MODE_RESUME: | ||
97 | case CLOCK_EVT_MODE_PERIODIC: | ||
98 | break; | ||
99 | case CLOCK_EVT_MODE_ONESHOT: | ||
100 | writel(TIMER_ENABLE_EN, clock->regbase + TIMER_ENABLE); | ||
101 | break; | ||
102 | case CLOCK_EVT_MODE_UNUSED: | ||
103 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
104 | writel(0, clock->regbase + TIMER_ENABLE); | ||
105 | break; | ||
106 | } | ||
107 | } | ||
108 | |||
109 | static struct msm_clock msm_clocks[] = { | ||
110 | { | ||
111 | .clockevent = { | ||
112 | .name = "gp_timer", | ||
113 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
114 | .shift = 32, | ||
115 | .rating = 200, | ||
116 | .set_next_event = msm_timer_set_next_event, | ||
117 | .set_mode = msm_timer_set_mode, | ||
118 | }, | ||
119 | .clocksource = { | ||
120 | .name = "gp_timer", | ||
121 | .rating = 200, | ||
122 | .read = msm_gpt_read, | ||
123 | .mask = CLOCKSOURCE_MASK(32), | ||
124 | .shift = 24, | ||
125 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
126 | }, | ||
127 | .irq = { | ||
128 | .name = "gp_timer", | ||
129 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, | ||
130 | .handler = msm_timer_interrupt, | ||
131 | .dev_id = &msm_clocks[0].clockevent, | ||
132 | .irq = INT_GP_TIMER_EXP | ||
133 | }, | ||
134 | .regbase = MSM_GPT_BASE, | ||
135 | .freq = GPT_HZ | ||
136 | }, | ||
137 | { | ||
138 | .clockevent = { | ||
139 | .name = "dg_timer", | ||
140 | .features = CLOCK_EVT_FEAT_ONESHOT, | ||
141 | .shift = 32 + MSM_DGT_SHIFT, | ||
142 | .rating = 300, | ||
143 | .set_next_event = msm_timer_set_next_event, | ||
144 | .set_mode = msm_timer_set_mode, | ||
145 | }, | ||
146 | .clocksource = { | ||
147 | .name = "dg_timer", | ||
148 | .rating = 300, | ||
149 | .read = msm_dgt_read, | ||
150 | .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), | ||
151 | .shift = 24 - MSM_DGT_SHIFT, | ||
152 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
153 | }, | ||
154 | .irq = { | ||
155 | .name = "dg_timer", | ||
156 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, | ||
157 | .handler = msm_timer_interrupt, | ||
158 | .dev_id = &msm_clocks[1].clockevent, | ||
159 | .irq = INT_DEBUG_TIMER_EXP | ||
160 | }, | ||
161 | .regbase = MSM_DGT_BASE, | ||
162 | .freq = DGT_HZ >> MSM_DGT_SHIFT, | ||
163 | .shift = MSM_DGT_SHIFT | ||
164 | } | ||
165 | }; | ||
166 | |||
167 | static void __init msm_timer_init(void) | ||
168 | { | ||
169 | int i; | ||
170 | int res; | ||
171 | |||
172 | for (i = 0; i < ARRAY_SIZE(msm_clocks); i++) { | ||
173 | struct msm_clock *clock = &msm_clocks[i]; | ||
174 | struct clock_event_device *ce = &clock->clockevent; | ||
175 | struct clocksource *cs = &clock->clocksource; | ||
176 | writel(0, clock->regbase + TIMER_ENABLE); | ||
177 | writel(0, clock->regbase + TIMER_CLEAR); | ||
178 | writel(~0, clock->regbase + TIMER_MATCH_VAL); | ||
179 | |||
180 | ce->mult = div_sc(clock->freq, NSEC_PER_SEC, ce->shift); | ||
181 | /* allow at least 10 seconds to notice that the timer wrapped */ | ||
182 | ce->max_delta_ns = | ||
183 | clockevent_delta2ns(0xf0000000 >> clock->shift, ce); | ||
184 | /* 4 gets rounded down to 3 */ | ||
185 | ce->min_delta_ns = clockevent_delta2ns(4, ce); | ||
186 | ce->cpumask = cpumask_of_cpu(0); | ||
187 | |||
188 | cs->mult = clocksource_hz2mult(clock->freq, cs->shift); | ||
189 | res = clocksource_register(cs); | ||
190 | if (res) | ||
191 | printk(KERN_ERR "msm_timer_init: clocksource_register " | ||
192 | "failed for %s\n", cs->name); | ||
193 | |||
194 | res = setup_irq(clock->irq.irq, &clock->irq); | ||
195 | if (res) | ||
196 | printk(KERN_ERR "msm_timer_init: setup_irq " | ||
197 | "failed for %s\n", cs->name); | ||
198 | |||
199 | clockevents_register_device(ce); | ||
200 | } | ||
201 | } | ||
202 | |||
203 | struct sys_timer msm_timer = { | ||
204 | .init = msm_timer_init | ||
205 | }; | ||
diff --git a/arch/arm/mach-mx3/time.c b/arch/arm/mach-mx3/time.c index e81fb5c5d7c3..fb565c98dbfb 100644 --- a/arch/arm/mach-mx3/time.c +++ b/arch/arm/mach-mx3/time.c | |||
@@ -45,8 +45,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | |||
45 | { | 45 | { |
46 | unsigned int next_match; | 46 | unsigned int next_match; |
47 | 47 | ||
48 | write_seqlock(&xtime_lock); | ||
49 | |||
50 | if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) { | 48 | if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) { |
51 | do { | 49 | do { |
52 | timer_tick(); | 50 | timer_tick(); |
@@ -57,8 +55,6 @@ static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id) | |||
57 | __raw_readl(MXC_GPT_GPTCNT)) <= 0); | 55 | __raw_readl(MXC_GPT_GPTCNT)) <= 0); |
58 | } | 56 | } |
59 | 57 | ||
60 | write_sequnlock(&xtime_lock); | ||
61 | |||
62 | return IRQ_HANDLED; | 58 | return IRQ_HANDLED; |
63 | } | 59 | } |
64 | 60 | ||
diff --git a/arch/arm/mach-netx/time.c b/arch/arm/mach-netx/time.c index 4762e207b0bf..ea07b54afa59 100644 --- a/arch/arm/mach-netx/time.c +++ b/arch/arm/mach-netx/time.c | |||
@@ -33,12 +33,8 @@ | |||
33 | static irqreturn_t | 33 | static irqreturn_t |
34 | netx_timer_interrupt(int irq, void *dev_id) | 34 | netx_timer_interrupt(int irq, void *dev_id) |
35 | { | 35 | { |
36 | write_seqlock(&xtime_lock); | ||
37 | |||
38 | timer_tick(); | 36 | timer_tick(); |
39 | 37 | ||
40 | write_sequnlock(&xtime_lock); | ||
41 | |||
42 | /* acknowledge interrupt */ | 38 | /* acknowledge interrupt */ |
43 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); | 39 | writel(COUNTER_BIT(0), NETX_GPIO_IRQ); |
44 | 40 | ||
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c index d5f6ea14fc7b..f550b19e1ecd 100644 --- a/arch/arm/mach-omap1/board-fsample.c +++ b/arch/arm/mach-omap1/board-fsample.c | |||
@@ -76,7 +76,7 @@ static struct resource smc91x_resources[] = { | |||
76 | [1] = { | 76 | [1] = { |
77 | .start = INT_730_MPU_EXT_NIRQ, | 77 | .start = INT_730_MPU_EXT_NIRQ, |
78 | .end = 0, | 78 | .end = 0, |
79 | .flags = IORESOURCE_IRQ, | 79 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
80 | }, | 80 | }, |
81 | }; | 81 | }; |
82 | 82 | ||
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index 9393824cc150..bfa04fa25524 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c | |||
@@ -209,7 +209,7 @@ static struct resource h2_smc91x_resources[] = { | |||
209 | [1] = { | 209 | [1] = { |
210 | .start = OMAP_GPIO_IRQ(0), | 210 | .start = OMAP_GPIO_IRQ(0), |
211 | .end = OMAP_GPIO_IRQ(0), | 211 | .end = OMAP_GPIO_IRQ(0), |
212 | .flags = IORESOURCE_IRQ, | 212 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
213 | }, | 213 | }, |
214 | }; | 214 | }; |
215 | 215 | ||
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c index 978cdab16535..056519860565 100644 --- a/arch/arm/mach-omap1/board-h3.c +++ b/arch/arm/mach-omap1/board-h3.c | |||
@@ -208,7 +208,7 @@ static struct resource smc91x_resources[] = { | |||
208 | [1] = { | 208 | [1] = { |
209 | .start = OMAP_GPIO_IRQ(40), | 209 | .start = OMAP_GPIO_IRQ(40), |
210 | .end = OMAP_GPIO_IRQ(40), | 210 | .end = OMAP_GPIO_IRQ(40), |
211 | .flags = IORESOURCE_IRQ, | 211 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
212 | }, | 212 | }, |
213 | }; | 213 | }; |
214 | 214 | ||
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c index 7e63a41e37c6..7d2d8af155a3 100644 --- a/arch/arm/mach-omap1/board-innovator.c +++ b/arch/arm/mach-omap1/board-innovator.c | |||
@@ -202,7 +202,7 @@ static struct resource innovator1510_smc91x_resources[] = { | |||
202 | [1] = { | 202 | [1] = { |
203 | .start = OMAP1510_INT_ETHER, | 203 | .start = OMAP1510_INT_ETHER, |
204 | .end = OMAP1510_INT_ETHER, | 204 | .end = OMAP1510_INT_ETHER, |
205 | .flags = IORESOURCE_IRQ, | 205 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
206 | }, | 206 | }, |
207 | }; | 207 | }; |
208 | 208 | ||
@@ -269,7 +269,7 @@ static struct resource innovator1610_smc91x_resources[] = { | |||
269 | [1] = { | 269 | [1] = { |
270 | .start = OMAP_GPIO_IRQ(0), | 270 | .start = OMAP_GPIO_IRQ(0), |
271 | .end = OMAP_GPIO_IRQ(0), | 271 | .end = OMAP_GPIO_IRQ(0), |
272 | .flags = IORESOURCE_IRQ, | 272 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
273 | }, | 273 | }, |
274 | }; | 274 | }; |
275 | 275 | ||
diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c index 182a98a9df4c..e2c8ffd75cff 100644 --- a/arch/arm/mach-omap1/board-nokia770.c +++ b/arch/arm/mach-omap1/board-nokia770.c | |||
@@ -32,7 +32,6 @@ | |||
32 | #include <asm/arch/common.h> | 32 | #include <asm/arch/common.h> |
33 | #include <asm/arch/dsp_common.h> | 33 | #include <asm/arch/dsp_common.h> |
34 | #include <asm/arch/aic23.h> | 34 | #include <asm/arch/aic23.h> |
35 | #include <asm/arch/gpio.h> | ||
36 | #include <asm/arch/omapfb.h> | 35 | #include <asm/arch/omapfb.h> |
37 | #include <asm/arch/lcd_mipid.h> | 36 | #include <asm/arch/lcd_mipid.h> |
38 | 37 | ||
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c index 5b575e687a2a..84333440008c 100644 --- a/arch/arm/mach-omap1/board-osk.c +++ b/arch/arm/mach-omap1/board-osk.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/platform_device.h> | 31 | #include <linux/platform_device.h> |
32 | #include <linux/interrupt.h> | 32 | #include <linux/interrupt.h> |
33 | #include <linux/irq.h> | 33 | #include <linux/irq.h> |
34 | #include <linux/interrupt.h> | ||
35 | #include <linux/i2c.h> | 34 | #include <linux/i2c.h> |
36 | 35 | ||
37 | #include <linux/mtd/mtd.h> | 36 | #include <linux/mtd/mtd.h> |
@@ -112,7 +111,7 @@ static struct resource osk5912_smc91x_resources[] = { | |||
112 | [1] = { | 111 | [1] = { |
113 | .start = OMAP_GPIO_IRQ(0), | 112 | .start = OMAP_GPIO_IRQ(0), |
114 | .end = OMAP_GPIO_IRQ(0), | 113 | .end = OMAP_GPIO_IRQ(0), |
115 | .flags = IORESOURCE_IRQ, | 114 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
116 | }, | 115 | }, |
117 | }; | 116 | }; |
118 | 117 | ||
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c index e47010fec275..ed7094a70064 100644 --- a/arch/arm/mach-omap1/board-palmtt.c +++ b/arch/arm/mach-omap1/board-palmtt.c | |||
@@ -42,7 +42,6 @@ | |||
42 | #include <asm/arch/common.h> | 42 | #include <asm/arch/common.h> |
43 | #include <asm/arch/omap-alsa.h> | 43 | #include <asm/arch/omap-alsa.h> |
44 | 44 | ||
45 | #include <linux/input.h> | ||
46 | #include <linux/spi/spi.h> | 45 | #include <linux/spi/spi.h> |
47 | #include <linux/spi/ads7846.h> | 46 | #include <linux/spi/ads7846.h> |
48 | 47 | ||
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c index c275d517764a..a9a0f6610c3d 100644 --- a/arch/arm/mach-omap1/board-palmz71.c +++ b/arch/arm/mach-omap1/board-palmz71.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/arch/common.h> | 44 | #include <asm/arch/common.h> |
45 | #include <asm/arch/omap-alsa.h> | 45 | #include <asm/arch/omap-alsa.h> |
46 | 46 | ||
47 | #include <linux/input.h> | ||
48 | #include <linux/spi/spi.h> | 47 | #include <linux/spi/spi.h> |
49 | #include <linux/spi/ads7846.h> | 48 | #include <linux/spi/ads7846.h> |
50 | 49 | ||
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c index e44437e10eef..534dcfb9d263 100644 --- a/arch/arm/mach-omap1/board-perseus2.c +++ b/arch/arm/mach-omap1/board-perseus2.c | |||
@@ -75,7 +75,7 @@ static struct resource smc91x_resources[] = { | |||
75 | [1] = { | 75 | [1] = { |
76 | .start = INT_730_MPU_EXT_NIRQ, | 76 | .start = INT_730_MPU_EXT_NIRQ, |
77 | .end = 0, | 77 | .end = 0, |
78 | .flags = IORESOURCE_IRQ, | 78 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
79 | }, | 79 | }, |
80 | }; | 80 | }; |
81 | 81 | ||
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c index 214dd19889ac..c82a1cd20ad4 100644 --- a/arch/arm/mach-omap1/board-voiceblue.c +++ b/arch/arm/mach-omap1/board-voiceblue.c | |||
@@ -117,7 +117,7 @@ static struct resource voiceblue_smc91x_resources[] = { | |||
117 | [1] = { | 117 | [1] = { |
118 | .start = OMAP_GPIO_IRQ(8), | 118 | .start = OMAP_GPIO_IRQ(8), |
119 | .end = OMAP_GPIO_IRQ(8), | 119 | .end = OMAP_GPIO_IRQ(8), |
120 | .flags = IORESOURCE_IRQ, | 120 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
121 | }, | 121 | }, |
122 | }; | 122 | }; |
123 | 123 | ||
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index d9805e3d9304..06b7e54a0128 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -639,7 +639,7 @@ static void omap_pm_finish(void) | |||
639 | } | 639 | } |
640 | 640 | ||
641 | 641 | ||
642 | static irqreturn_t omap_wakeup_interrupt(int irq, void *dev) | 642 | static irqreturn_t omap_wakeup_interrupt(int irq, void *dev) |
643 | { | 643 | { |
644 | return IRQ_HANDLED; | 644 | return IRQ_HANDLED; |
645 | } | 645 | } |
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c index 7e76fbf19b5d..64235dee5614 100644 --- a/arch/arm/mach-omap2/board-2430sdp.c +++ b/arch/arm/mach-omap2/board-2430sdp.c | |||
@@ -104,7 +104,7 @@ static struct resource sdp2430_smc91x_resources[] = { | |||
104 | [1] = { | 104 | [1] = { |
105 | .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | 105 | .start = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), |
106 | .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), | 106 | .end = OMAP_GPIO_IRQ(OMAP24XX_ETHR_GPIO_IRQ), |
107 | .flags = IORESOURCE_IRQ, | 107 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
108 | }, | 108 | }, |
109 | }; | 109 | }; |
110 | 110 | ||
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c index 3bb49c17c858..7846551f0575 100644 --- a/arch/arm/mach-omap2/board-apollon.c +++ b/arch/arm/mach-omap2/board-apollon.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/interrupt.h> | 26 | #include <linux/interrupt.h> |
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/leds.h> | 28 | #include <linux/leds.h> |
29 | #include <linux/irq.h> | ||
30 | 29 | ||
31 | #include <asm/hardware.h> | 30 | #include <asm/hardware.h> |
32 | #include <asm/mach-types.h> | 31 | #include <asm/mach-types.h> |
@@ -127,7 +126,7 @@ static struct resource apollon_smc91x_resources[] = { | |||
127 | [1] = { | 126 | [1] = { |
128 | .start = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), | 127 | .start = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), |
129 | .end = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), | 128 | .end = OMAP_GPIO_IRQ(APOLLON_ETHR_GPIO_IRQ), |
130 | .flags = IORESOURCE_IRQ, | 129 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
131 | }, | 130 | }, |
132 | }; | 131 | }; |
133 | 132 | ||
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c index 8d322c20ccae..3234deedb946 100644 --- a/arch/arm/mach-omap2/timer-gp.c +++ b/arch/arm/mach-omap2/timer-gp.c | |||
@@ -40,13 +40,9 @@ static inline void omap2_gp_timer_start(unsigned long load_val) | |||
40 | 40 | ||
41 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | 41 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) |
42 | { | 42 | { |
43 | write_seqlock(&xtime_lock); | ||
44 | |||
45 | omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); | 43 | omap_dm_timer_write_status(gptimer, OMAP_TIMER_INT_OVERFLOW); |
46 | timer_tick(); | 44 | timer_tick(); |
47 | 45 | ||
48 | write_sequnlock(&xtime_lock); | ||
49 | |||
50 | return IRQ_HANDLED; | 46 | return IRQ_HANDLED; |
51 | } | 47 | } |
52 | 48 | ||
diff --git a/arch/arm/mach-orion/Kconfig b/arch/arm/mach-orion/Kconfig new file mode 100644 index 000000000000..1dcbb6ac5a30 --- /dev/null +++ b/arch/arm/mach-orion/Kconfig | |||
@@ -0,0 +1,41 @@ | |||
1 | if ARCH_ORION | ||
2 | |||
3 | menu "Orion Implementations" | ||
4 | |||
5 | config MACH_DB88F5281 | ||
6 | bool "Marvell Orion-2 Development Board" | ||
7 | select I2C_BOARDINFO | ||
8 | help | ||
9 | Say 'Y' here if you want your kernel to support the | ||
10 | Marvell Orion-2 (88F5281) Development Board | ||
11 | |||
12 | config MACH_RD88F5182 | ||
13 | bool "Marvell Orion-NAS Reference Design" | ||
14 | select I2C_BOARDINFO | ||
15 | help | ||
16 | Say 'Y' here if you want your kernel to support the | ||
17 | Marvell Orion-NAS (88F5182) RD2 | ||
18 | |||
19 | config MACH_KUROBOX_PRO | ||
20 | bool "KuroBox Pro" | ||
21 | select I2C_BOARDINFO | ||
22 | help | ||
23 | Say 'Y' here if you want your kernel to support the | ||
24 | KuroBox Pro platform. | ||
25 | |||
26 | config MACH_DNS323 | ||
27 | bool "D-Link DNS-323" | ||
28 | select I2C_BOARDINFO | ||
29 | help | ||
30 | Say 'Y' here if you want your kernel to support the | ||
31 | D-Link DNS-323 platform. | ||
32 | |||
33 | config MACH_TS209 | ||
34 | bool "QNAP TS-109/TS-209" | ||
35 | help | ||
36 | Say 'Y' here if you want your kernel to support the | ||
37 | QNAP TS-109/TS-209 platform. | ||
38 | |||
39 | endmenu | ||
40 | |||
41 | endif | ||
diff --git a/arch/arm/mach-orion/Makefile b/arch/arm/mach-orion/Makefile new file mode 100644 index 000000000000..f91d937a73e8 --- /dev/null +++ b/arch/arm/mach-orion/Makefile | |||
@@ -0,0 +1,6 @@ | |||
1 | obj-y += common.o addr-map.o pci.o gpio.o irq.o time.o | ||
2 | obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o | ||
3 | obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o | ||
4 | obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o | ||
5 | obj-$(CONFIG_MACH_DNS323) += dns323-setup.o | ||
6 | obj-$(CONFIG_MACH_TS209) += ts209-setup.o | ||
diff --git a/arch/arm/mach-orion/Makefile.boot b/arch/arm/mach-orion/Makefile.boot new file mode 100644 index 000000000000..67039c3e0c48 --- /dev/null +++ b/arch/arm/mach-orion/Makefile.boot | |||
@@ -0,0 +1,3 @@ | |||
1 | zreladdr-y := 0x00008000 | ||
2 | params_phys-y := 0x00000100 | ||
3 | initrd_phys-y := 0x00800000 | ||
diff --git a/arch/arm/mach-orion/addr-map.c b/arch/arm/mach-orion/addr-map.c new file mode 100644 index 000000000000..488da3811a68 --- /dev/null +++ b/arch/arm/mach-orion/addr-map.c | |||
@@ -0,0 +1,484 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/addr-map.c | ||
3 | * | ||
4 | * Address map functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <asm/hardware.h> | ||
16 | #include "common.h" | ||
17 | |||
18 | /* | ||
19 | * The Orion has fully programable address map. There's a separate address | ||
20 | * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, | ||
21 | * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own | ||
22 | * address decode windows that allow it to access any of the Orion resources. | ||
23 | * | ||
24 | * CPU address decoding -- | ||
25 | * Linux assumes that it is the boot loader that already setup the access to | ||
26 | * DDR and internal registers. | ||
27 | * Setup access to PCI and PCI-E IO/MEM space is issued by core.c. | ||
28 | * Setup access to various devices located on the device bus interface (e.g. | ||
29 | * flashes, RTC, etc) should be issued by machine-setup.c according to | ||
30 | * specific board population (by using orion_setup_cpu_win()). | ||
31 | * | ||
32 | * Non-CPU Masters address decoding -- | ||
33 | * Unlike the CPU, we setup the access from Orion's master interfaces to DDR | ||
34 | * banks only (the typical use case). | ||
35 | * Setup access for each master to DDR is issued by common.c. | ||
36 | * | ||
37 | * Note: although orion_setbits() and orion_clrbits() are not atomic | ||
38 | * no locking is necessary here since code in this file is only called | ||
39 | * at boot time when there is no concurrency issues. | ||
40 | */ | ||
41 | |||
42 | /* | ||
43 | * Generic Address Decode Windows bit settings | ||
44 | */ | ||
45 | #define TARGET_DDR 0 | ||
46 | #define TARGET_PCI 3 | ||
47 | #define TARGET_PCIE 4 | ||
48 | #define TARGET_DEV_BUS 1 | ||
49 | #define ATTR_DDR_CS(n) (((n) ==0) ? 0xe : \ | ||
50 | ((n) == 1) ? 0xd : \ | ||
51 | ((n) == 2) ? 0xb : \ | ||
52 | ((n) == 3) ? 0x7 : 0xf) | ||
53 | #define ATTR_PCIE_MEM 0x59 | ||
54 | #define ATTR_PCIE_IO 0x51 | ||
55 | #define ATTR_PCI_MEM 0x59 | ||
56 | #define ATTR_PCI_IO 0x51 | ||
57 | #define ATTR_DEV_CS0 0x1e | ||
58 | #define ATTR_DEV_CS1 0x1d | ||
59 | #define ATTR_DEV_CS2 0x1b | ||
60 | #define ATTR_DEV_BOOT 0xf | ||
61 | #define WIN_EN 1 | ||
62 | |||
63 | /* | ||
64 | * Helpers to get DDR banks info | ||
65 | */ | ||
66 | #define DDR_BASE_CS(n) ORION_DDR_REG(0x1500 + ((n) * 8)) | ||
67 | #define DDR_SIZE_CS(n) ORION_DDR_REG(0x1504 + ((n) * 8)) | ||
68 | #define DDR_MAX_CS 4 | ||
69 | #define DDR_REG_TO_SIZE(reg) (((reg) | 0xffffff) + 1) | ||
70 | #define DDR_REG_TO_BASE(reg) ((reg) & 0xff000000) | ||
71 | #define DDR_BANK_EN 1 | ||
72 | |||
73 | /* | ||
74 | * CPU Address Decode Windows registers | ||
75 | */ | ||
76 | #define CPU_WIN_CTRL(n) ORION_BRIDGE_REG(0x000 | ((n) << 4)) | ||
77 | #define CPU_WIN_BASE(n) ORION_BRIDGE_REG(0x004 | ((n) << 4)) | ||
78 | #define CPU_WIN_REMAP_LO(n) ORION_BRIDGE_REG(0x008 | ((n) << 4)) | ||
79 | #define CPU_WIN_REMAP_HI(n) ORION_BRIDGE_REG(0x00c | ((n) << 4)) | ||
80 | #define CPU_MAX_WIN 8 | ||
81 | |||
82 | /* | ||
83 | * Use this CPU address decode windows allocation | ||
84 | */ | ||
85 | #define CPU_WIN_PCIE_IO 0 | ||
86 | #define CPU_WIN_PCI_IO 1 | ||
87 | #define CPU_WIN_PCIE_MEM 2 | ||
88 | #define CPU_WIN_PCI_MEM 3 | ||
89 | #define CPU_WIN_DEV_BOOT 4 | ||
90 | #define CPU_WIN_DEV_CS0 5 | ||
91 | #define CPU_WIN_DEV_CS1 6 | ||
92 | #define CPU_WIN_DEV_CS2 7 | ||
93 | |||
94 | /* | ||
95 | * PCIE Address Decode Windows registers | ||
96 | */ | ||
97 | #define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) | ||
98 | #define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) | ||
99 | #define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) | ||
100 | #define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4)) | ||
101 | #define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4)) | ||
102 | #define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4)) | ||
103 | #define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) | ||
104 | #define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) | ||
105 | #define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) | ||
106 | #define PCIE_MAX_BARS 3 | ||
107 | #define PCIE_MAX_WINS 5 | ||
108 | |||
109 | /* | ||
110 | * Use PCIE BAR '1' for all DDR banks | ||
111 | */ | ||
112 | #define PCIE_DRAM_BAR 1 | ||
113 | |||
114 | /* | ||
115 | * PCI Address Decode Windows registers | ||
116 | */ | ||
117 | #define PCI_BAR_SIZE_DDR_CS(n) (((n) == 0) ? ORION_PCI_REG(0xc08) : \ | ||
118 | ((n) == 1) ? ORION_PCI_REG(0xd08) : \ | ||
119 | ((n) == 2) ? ORION_PCI_REG(0xc0c) : \ | ||
120 | ((n) == 3) ? ORION_PCI_REG(0xd0c) : 0) | ||
121 | #define PCI_BAR_REMAP_DDR_CS(n) (((n) ==0) ? ORION_PCI_REG(0xc48) : \ | ||
122 | ((n) == 1) ? ORION_PCI_REG(0xd48) : \ | ||
123 | ((n) == 2) ? ORION_PCI_REG(0xc4c) : \ | ||
124 | ((n) == 3) ? ORION_PCI_REG(0xd4c) : 0) | ||
125 | #define PCI_BAR_ENABLE ORION_PCI_REG(0xc3c) | ||
126 | #define PCI_CTRL_BASE_LO(n) ORION_PCI_REG(0x1e00 | ((n) << 4)) | ||
127 | #define PCI_CTRL_BASE_HI(n) ORION_PCI_REG(0x1e04 | ((n) << 4)) | ||
128 | #define PCI_CTRL_SIZE(n) ORION_PCI_REG(0x1e08 | ((n) << 4)) | ||
129 | #define PCI_ADDR_DECODE_CTRL ORION_PCI_REG(0xd3c) | ||
130 | |||
131 | /* | ||
132 | * PCI configuration heleprs for BAR settings | ||
133 | */ | ||
134 | #define PCI_CONF_FUNC_BAR_CS(n) ((n) >> 1) | ||
135 | #define PCI_CONF_REG_BAR_LO_CS(n) (((n) & 1) ? 0x18 : 0x10) | ||
136 | #define PCI_CONF_REG_BAR_HI_CS(n) (((n) & 1) ? 0x1c : 0x14) | ||
137 | |||
138 | /* | ||
139 | * Gigabit Ethernet Address Decode Windows registers | ||
140 | */ | ||
141 | #define ETH_WIN_BASE(win) ORION_ETH_REG(0x200 + ((win) * 8)) | ||
142 | #define ETH_WIN_SIZE(win) ORION_ETH_REG(0x204 + ((win) * 8)) | ||
143 | #define ETH_WIN_REMAP(win) ORION_ETH_REG(0x280 + ((win) * 4)) | ||
144 | #define ETH_WIN_EN ORION_ETH_REG(0x290) | ||
145 | #define ETH_WIN_PROT ORION_ETH_REG(0x294) | ||
146 | #define ETH_MAX_WIN 6 | ||
147 | #define ETH_MAX_REMAP_WIN 4 | ||
148 | |||
149 | /* | ||
150 | * USB Address Decode Windows registers | ||
151 | */ | ||
152 | #define USB_WIN_CTRL(i, w) ((i == 0) ? ORION_USB0_REG(0x320 + ((w) << 4)) \ | ||
153 | : ORION_USB1_REG(0x320 + ((w) << 4))) | ||
154 | #define USB_WIN_BASE(i, w) ((i == 0) ? ORION_USB0_REG(0x324 + ((w) << 4)) \ | ||
155 | : ORION_USB1_REG(0x324 + ((w) << 4))) | ||
156 | #define USB_MAX_WIN 4 | ||
157 | |||
158 | /* | ||
159 | * SATA Address Decode Windows registers | ||
160 | */ | ||
161 | #define SATA_WIN_CTRL(win) ORION_SATA_REG(0x30 + ((win) * 0x10)) | ||
162 | #define SATA_WIN_BASE(win) ORION_SATA_REG(0x34 + ((win) * 0x10)) | ||
163 | #define SATA_MAX_WIN 4 | ||
164 | |||
165 | static int __init orion_cpu_win_can_remap(u32 win) | ||
166 | { | ||
167 | u32 dev, rev; | ||
168 | |||
169 | orion_pcie_id(&dev, &rev); | ||
170 | if ((dev == MV88F5281_DEV_ID && win < 4) | ||
171 | || (dev == MV88F5182_DEV_ID && win < 2) | ||
172 | || (dev == MV88F5181_DEV_ID && win < 2)) | ||
173 | return 1; | ||
174 | |||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | void __init orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap) | ||
179 | { | ||
180 | u32 win, attr, ctrl; | ||
181 | |||
182 | switch (target) { | ||
183 | case ORION_PCIE_IO: | ||
184 | target = TARGET_PCIE; | ||
185 | attr = ATTR_PCIE_IO; | ||
186 | win = CPU_WIN_PCIE_IO; | ||
187 | break; | ||
188 | case ORION_PCI_IO: | ||
189 | target = TARGET_PCI; | ||
190 | attr = ATTR_PCI_IO; | ||
191 | win = CPU_WIN_PCI_IO; | ||
192 | break; | ||
193 | case ORION_PCIE_MEM: | ||
194 | target = TARGET_PCIE; | ||
195 | attr = ATTR_PCIE_MEM; | ||
196 | win = CPU_WIN_PCIE_MEM; | ||
197 | break; | ||
198 | case ORION_PCI_MEM: | ||
199 | target = TARGET_PCI; | ||
200 | attr = ATTR_PCI_MEM; | ||
201 | win = CPU_WIN_PCI_MEM; | ||
202 | break; | ||
203 | case ORION_DEV_BOOT: | ||
204 | target = TARGET_DEV_BUS; | ||
205 | attr = ATTR_DEV_BOOT; | ||
206 | win = CPU_WIN_DEV_BOOT; | ||
207 | break; | ||
208 | case ORION_DEV0: | ||
209 | target = TARGET_DEV_BUS; | ||
210 | attr = ATTR_DEV_CS0; | ||
211 | win = CPU_WIN_DEV_CS0; | ||
212 | break; | ||
213 | case ORION_DEV1: | ||
214 | target = TARGET_DEV_BUS; | ||
215 | attr = ATTR_DEV_CS1; | ||
216 | win = CPU_WIN_DEV_CS1; | ||
217 | break; | ||
218 | case ORION_DEV2: | ||
219 | target = TARGET_DEV_BUS; | ||
220 | attr = ATTR_DEV_CS2; | ||
221 | win = CPU_WIN_DEV_CS2; | ||
222 | break; | ||
223 | case ORION_DDR: | ||
224 | case ORION_REGS: | ||
225 | /* | ||
226 | * Must be mapped by bootloader. | ||
227 | */ | ||
228 | default: | ||
229 | target = attr = win = -1; | ||
230 | BUG(); | ||
231 | } | ||
232 | |||
233 | base &= 0xffff0000; | ||
234 | ctrl = (((size - 1) & 0xffff0000) | (attr << 8) | | ||
235 | (target << 4) | WIN_EN); | ||
236 | |||
237 | orion_write(CPU_WIN_BASE(win), base); | ||
238 | orion_write(CPU_WIN_CTRL(win), ctrl); | ||
239 | |||
240 | if (orion_cpu_win_can_remap(win)) { | ||
241 | if (remap >= 0) { | ||
242 | orion_write(CPU_WIN_REMAP_LO(win), remap & 0xffff0000); | ||
243 | orion_write(CPU_WIN_REMAP_HI(win), 0); | ||
244 | } else { | ||
245 | orion_write(CPU_WIN_REMAP_LO(win), base); | ||
246 | orion_write(CPU_WIN_REMAP_HI(win), 0); | ||
247 | } | ||
248 | } | ||
249 | } | ||
250 | |||
251 | void __init orion_setup_cpu_wins(void) | ||
252 | { | ||
253 | int i; | ||
254 | |||
255 | /* | ||
256 | * First, disable and clear windows | ||
257 | */ | ||
258 | for (i = 0; i < CPU_MAX_WIN; i++) { | ||
259 | orion_write(CPU_WIN_BASE(i), 0); | ||
260 | orion_write(CPU_WIN_CTRL(i), 0); | ||
261 | if (orion_cpu_win_can_remap(i)) { | ||
262 | orion_write(CPU_WIN_REMAP_LO(i), 0); | ||
263 | orion_write(CPU_WIN_REMAP_HI(i), 0); | ||
264 | } | ||
265 | } | ||
266 | |||
267 | /* | ||
268 | * Setup windows for PCI+PCIE IO+MAM space | ||
269 | */ | ||
270 | orion_setup_cpu_win(ORION_PCIE_IO, ORION_PCIE_IO_BASE, | ||
271 | ORION_PCIE_IO_SIZE, ORION_PCIE_IO_REMAP); | ||
272 | orion_setup_cpu_win(ORION_PCI_IO, ORION_PCI_IO_BASE, | ||
273 | ORION_PCI_IO_SIZE, ORION_PCI_IO_REMAP); | ||
274 | orion_setup_cpu_win(ORION_PCIE_MEM, ORION_PCIE_MEM_BASE, | ||
275 | ORION_PCIE_MEM_SIZE, -1); | ||
276 | orion_setup_cpu_win(ORION_PCI_MEM, ORION_PCI_MEM_BASE, | ||
277 | ORION_PCI_MEM_SIZE, -1); | ||
278 | } | ||
279 | |||
280 | /* | ||
281 | * Setup PCIE BARs and Address Decode Wins: | ||
282 | * BAR[0,2] -> disabled, BAR[1] -> covers all DRAM banks | ||
283 | * WIN[0-3] -> DRAM bank[0-3] | ||
284 | */ | ||
285 | void __init orion_setup_pcie_wins(void) | ||
286 | { | ||
287 | u32 base, size, i; | ||
288 | |||
289 | /* | ||
290 | * First, disable and clear BARs and windows | ||
291 | */ | ||
292 | for (i = 1; i < PCIE_MAX_BARS; i++) { | ||
293 | orion_write(PCIE_BAR_CTRL(i), 0); | ||
294 | orion_write(PCIE_BAR_LO(i), 0); | ||
295 | orion_write(PCIE_BAR_HI(i), 0); | ||
296 | } | ||
297 | |||
298 | for (i = 0; i < PCIE_MAX_WINS; i++) { | ||
299 | orion_write(PCIE_WIN_CTRL(i), 0); | ||
300 | orion_write(PCIE_WIN_BASE(i), 0); | ||
301 | orion_write(PCIE_WIN_REMAP(i), 0); | ||
302 | } | ||
303 | |||
304 | /* | ||
305 | * Setup windows for DDR banks. Count total DDR size on the fly. | ||
306 | */ | ||
307 | base = DDR_REG_TO_BASE(orion_read(DDR_BASE_CS(0))); | ||
308 | size = 0; | ||
309 | for (i = 0; i < DDR_MAX_CS; i++) { | ||
310 | u32 bank_base, bank_size; | ||
311 | bank_size = orion_read(DDR_SIZE_CS(i)); | ||
312 | bank_base = orion_read(DDR_BASE_CS(i)); | ||
313 | if (bank_size & DDR_BANK_EN) { | ||
314 | bank_size = DDR_REG_TO_SIZE(bank_size); | ||
315 | bank_base = DDR_REG_TO_BASE(bank_base); | ||
316 | orion_write(PCIE_WIN_BASE(i), bank_base & 0xffff0000); | ||
317 | orion_write(PCIE_WIN_REMAP(i), 0); | ||
318 | orion_write(PCIE_WIN_CTRL(i), | ||
319 | ((bank_size-1) & 0xffff0000) | | ||
320 | (ATTR_DDR_CS(i) << 8) | | ||
321 | (TARGET_DDR << 4) | | ||
322 | (PCIE_DRAM_BAR << 1) | WIN_EN); | ||
323 | size += bank_size; | ||
324 | } | ||
325 | } | ||
326 | |||
327 | /* | ||
328 | * Setup BAR[1] to all DRAM banks | ||
329 | */ | ||
330 | orion_write(PCIE_BAR_LO(PCIE_DRAM_BAR), base & 0xffff0000); | ||
331 | orion_write(PCIE_BAR_HI(PCIE_DRAM_BAR), 0); | ||
332 | orion_write(PCIE_BAR_CTRL(PCIE_DRAM_BAR), | ||
333 | ((size - 1) & 0xffff0000) | WIN_EN); | ||
334 | } | ||
335 | |||
336 | void __init orion_setup_pci_wins(void) | ||
337 | { | ||
338 | u32 base, size, i; | ||
339 | |||
340 | /* | ||
341 | * First, disable windows | ||
342 | */ | ||
343 | orion_write(PCI_BAR_ENABLE, 0xffffffff); | ||
344 | |||
345 | /* | ||
346 | * Setup windows for DDR banks. | ||
347 | */ | ||
348 | for (i = 0; i < DDR_MAX_CS; i++) { | ||
349 | base = orion_read(DDR_BASE_CS(i)); | ||
350 | size = orion_read(DDR_SIZE_CS(i)); | ||
351 | if (size & DDR_BANK_EN) { | ||
352 | u32 bus, dev, func, reg, val; | ||
353 | size = DDR_REG_TO_SIZE(size); | ||
354 | base = DDR_REG_TO_BASE(base); | ||
355 | bus = orion_pci_local_bus_nr(); | ||
356 | dev = orion_pci_local_dev_nr(); | ||
357 | func = PCI_CONF_FUNC_BAR_CS(i); | ||
358 | reg = PCI_CONF_REG_BAR_LO_CS(i); | ||
359 | orion_pci_hw_rd_conf(bus, dev, func, reg, 4, &val); | ||
360 | orion_pci_hw_wr_conf(bus, dev, func, reg, 4, | ||
361 | (base & 0xfffff000) | (val & 0xfff)); | ||
362 | reg = PCI_CONF_REG_BAR_HI_CS(i); | ||
363 | orion_pci_hw_wr_conf(bus, dev, func, reg, 4, 0); | ||
364 | orion_write(PCI_BAR_SIZE_DDR_CS(i), | ||
365 | (size - 1) & 0xfffff000); | ||
366 | orion_write(PCI_BAR_REMAP_DDR_CS(i), | ||
367 | base & 0xfffff000); | ||
368 | orion_clrbits(PCI_BAR_ENABLE, (1 << i)); | ||
369 | } | ||
370 | } | ||
371 | |||
372 | /* | ||
373 | * Disable automatic update of address remaping when writing to BARs | ||
374 | */ | ||
375 | orion_setbits(PCI_ADDR_DECODE_CTRL, 1); | ||
376 | } | ||
377 | |||
378 | void __init orion_setup_usb_wins(void) | ||
379 | { | ||
380 | int i; | ||
381 | u32 usb_if, dev, rev; | ||
382 | u32 max_usb_if = 1; | ||
383 | |||
384 | orion_pcie_id(&dev, &rev); | ||
385 | if (dev == MV88F5182_DEV_ID) | ||
386 | max_usb_if = 2; | ||
387 | |||
388 | for (usb_if = 0; usb_if < max_usb_if; usb_if++) { | ||
389 | /* | ||
390 | * First, disable and clear windows | ||
391 | */ | ||
392 | for (i = 0; i < USB_MAX_WIN; i++) { | ||
393 | orion_write(USB_WIN_BASE(usb_if, i), 0); | ||
394 | orion_write(USB_WIN_CTRL(usb_if, i), 0); | ||
395 | } | ||
396 | |||
397 | /* | ||
398 | * Setup windows for DDR banks. | ||
399 | */ | ||
400 | for (i = 0; i < DDR_MAX_CS; i++) { | ||
401 | u32 base, size; | ||
402 | size = orion_read(DDR_SIZE_CS(i)); | ||
403 | base = orion_read(DDR_BASE_CS(i)); | ||
404 | if (size & DDR_BANK_EN) { | ||
405 | base = DDR_REG_TO_BASE(base); | ||
406 | size = DDR_REG_TO_SIZE(size); | ||
407 | orion_write(USB_WIN_CTRL(usb_if, i), | ||
408 | ((size-1) & 0xffff0000) | | ||
409 | (ATTR_DDR_CS(i) << 8) | | ||
410 | (TARGET_DDR << 4) | WIN_EN); | ||
411 | orion_write(USB_WIN_BASE(usb_if, i), | ||
412 | base & 0xffff0000); | ||
413 | } | ||
414 | } | ||
415 | } | ||
416 | } | ||
417 | |||
418 | void __init orion_setup_eth_wins(void) | ||
419 | { | ||
420 | int i; | ||
421 | |||
422 | /* | ||
423 | * First, disable and clear windows | ||
424 | */ | ||
425 | for (i = 0; i < ETH_MAX_WIN; i++) { | ||
426 | orion_write(ETH_WIN_BASE(i), 0); | ||
427 | orion_write(ETH_WIN_SIZE(i), 0); | ||
428 | orion_setbits(ETH_WIN_EN, 1 << i); | ||
429 | orion_clrbits(ETH_WIN_PROT, 0x3 << (i * 2)); | ||
430 | if (i < ETH_MAX_REMAP_WIN) | ||
431 | orion_write(ETH_WIN_REMAP(i), 0); | ||
432 | } | ||
433 | |||
434 | /* | ||
435 | * Setup windows for DDR banks. | ||
436 | */ | ||
437 | for (i = 0; i < DDR_MAX_CS; i++) { | ||
438 | u32 base, size; | ||
439 | size = orion_read(DDR_SIZE_CS(i)); | ||
440 | base = orion_read(DDR_BASE_CS(i)); | ||
441 | if (size & DDR_BANK_EN) { | ||
442 | base = DDR_REG_TO_BASE(base); | ||
443 | size = DDR_REG_TO_SIZE(size); | ||
444 | orion_write(ETH_WIN_SIZE(i), (size-1) & 0xffff0000); | ||
445 | orion_write(ETH_WIN_BASE(i), (base & 0xffff0000) | | ||
446 | (ATTR_DDR_CS(i) << 8) | | ||
447 | TARGET_DDR); | ||
448 | orion_clrbits(ETH_WIN_EN, 1 << i); | ||
449 | orion_setbits(ETH_WIN_PROT, 0x3 << (i * 2)); | ||
450 | } | ||
451 | } | ||
452 | } | ||
453 | |||
454 | void __init orion_setup_sata_wins(void) | ||
455 | { | ||
456 | int i; | ||
457 | |||
458 | /* | ||
459 | * First, disable and clear windows | ||
460 | */ | ||
461 | for (i = 0; i < SATA_MAX_WIN; i++) { | ||
462 | orion_write(SATA_WIN_BASE(i), 0); | ||
463 | orion_write(SATA_WIN_CTRL(i), 0); | ||
464 | } | ||
465 | |||
466 | /* | ||
467 | * Setup windows for DDR banks. | ||
468 | */ | ||
469 | for (i = 0; i < DDR_MAX_CS; i++) { | ||
470 | u32 base, size; | ||
471 | size = orion_read(DDR_SIZE_CS(i)); | ||
472 | base = orion_read(DDR_BASE_CS(i)); | ||
473 | if (size & DDR_BANK_EN) { | ||
474 | base = DDR_REG_TO_BASE(base); | ||
475 | size = DDR_REG_TO_SIZE(size); | ||
476 | orion_write(SATA_WIN_CTRL(i), | ||
477 | ((size-1) & 0xffff0000) | | ||
478 | (ATTR_DDR_CS(i) << 8) | | ||
479 | (TARGET_DDR << 4) | WIN_EN); | ||
480 | orion_write(SATA_WIN_BASE(i), | ||
481 | base & 0xffff0000); | ||
482 | } | ||
483 | } | ||
484 | } | ||
diff --git a/arch/arm/mach-orion/common.c b/arch/arm/mach-orion/common.c new file mode 100644 index 000000000000..5e20b6b32508 --- /dev/null +++ b/arch/arm/mach-orion/common.c | |||
@@ -0,0 +1,315 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/common.c | ||
3 | * | ||
4 | * Core functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/serial_8250.h> | ||
17 | #include <linux/mv643xx_eth.h> | ||
18 | #include <linux/mv643xx_i2c.h> | ||
19 | #include <asm/page.h> | ||
20 | #include <asm/timex.h> | ||
21 | #include <asm/mach/map.h> | ||
22 | #include <asm/arch/orion.h> | ||
23 | #include "common.h" | ||
24 | |||
25 | /***************************************************************************** | ||
26 | * I/O Address Mapping | ||
27 | ****************************************************************************/ | ||
28 | static struct map_desc orion_io_desc[] __initdata = { | ||
29 | { | ||
30 | .virtual = ORION_REGS_BASE, | ||
31 | .pfn = __phys_to_pfn(ORION_REGS_BASE), | ||
32 | .length = ORION_REGS_SIZE, | ||
33 | .type = MT_DEVICE | ||
34 | }, | ||
35 | { | ||
36 | .virtual = ORION_PCIE_IO_BASE, | ||
37 | .pfn = __phys_to_pfn(ORION_PCIE_IO_BASE), | ||
38 | .length = ORION_PCIE_IO_SIZE, | ||
39 | .type = MT_DEVICE | ||
40 | }, | ||
41 | { | ||
42 | .virtual = ORION_PCI_IO_BASE, | ||
43 | .pfn = __phys_to_pfn(ORION_PCI_IO_BASE), | ||
44 | .length = ORION_PCI_IO_SIZE, | ||
45 | .type = MT_DEVICE | ||
46 | }, | ||
47 | { | ||
48 | .virtual = ORION_PCIE_WA_BASE, | ||
49 | .pfn = __phys_to_pfn(ORION_PCIE_WA_BASE), | ||
50 | .length = ORION_PCIE_WA_SIZE, | ||
51 | .type = MT_DEVICE | ||
52 | }, | ||
53 | }; | ||
54 | |||
55 | void __init orion_map_io(void) | ||
56 | { | ||
57 | iotable_init(orion_io_desc, ARRAY_SIZE(orion_io_desc)); | ||
58 | } | ||
59 | |||
60 | /***************************************************************************** | ||
61 | * UART | ||
62 | ****************************************************************************/ | ||
63 | |||
64 | static struct resource orion_uart_resources[] = { | ||
65 | { | ||
66 | .start = UART0_BASE, | ||
67 | .end = UART0_BASE + 0xff, | ||
68 | .flags = IORESOURCE_MEM, | ||
69 | }, | ||
70 | { | ||
71 | .start = IRQ_ORION_UART0, | ||
72 | .end = IRQ_ORION_UART0, | ||
73 | .flags = IORESOURCE_IRQ, | ||
74 | }, | ||
75 | { | ||
76 | .start = UART1_BASE, | ||
77 | .end = UART1_BASE + 0xff, | ||
78 | .flags = IORESOURCE_MEM, | ||
79 | }, | ||
80 | { | ||
81 | .start = IRQ_ORION_UART1, | ||
82 | .end = IRQ_ORION_UART1, | ||
83 | .flags = IORESOURCE_IRQ, | ||
84 | }, | ||
85 | }; | ||
86 | |||
87 | static struct plat_serial8250_port orion_uart_data[] = { | ||
88 | { | ||
89 | .mapbase = UART0_BASE, | ||
90 | .membase = (char *)UART0_BASE, | ||
91 | .irq = IRQ_ORION_UART0, | ||
92 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
93 | .iotype = UPIO_MEM, | ||
94 | .regshift = 2, | ||
95 | .uartclk = ORION_TCLK, | ||
96 | }, | ||
97 | { | ||
98 | .mapbase = UART1_BASE, | ||
99 | .membase = (char *)UART1_BASE, | ||
100 | .irq = IRQ_ORION_UART1, | ||
101 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | ||
102 | .iotype = UPIO_MEM, | ||
103 | .regshift = 2, | ||
104 | .uartclk = ORION_TCLK, | ||
105 | }, | ||
106 | { }, | ||
107 | }; | ||
108 | |||
109 | static struct platform_device orion_uart = { | ||
110 | .name = "serial8250", | ||
111 | .id = PLAT8250_DEV_PLATFORM, | ||
112 | .dev = { | ||
113 | .platform_data = orion_uart_data, | ||
114 | }, | ||
115 | .resource = orion_uart_resources, | ||
116 | .num_resources = ARRAY_SIZE(orion_uart_resources), | ||
117 | }; | ||
118 | |||
119 | /******************************************************************************* | ||
120 | * USB Controller - 2 interfaces | ||
121 | ******************************************************************************/ | ||
122 | |||
123 | static struct resource orion_ehci0_resources[] = { | ||
124 | { | ||
125 | .start = ORION_USB0_REG_BASE, | ||
126 | .end = ORION_USB0_REG_BASE + SZ_4K, | ||
127 | .flags = IORESOURCE_MEM, | ||
128 | }, | ||
129 | { | ||
130 | .start = IRQ_ORION_USB0_CTRL, | ||
131 | .end = IRQ_ORION_USB0_CTRL, | ||
132 | .flags = IORESOURCE_IRQ, | ||
133 | }, | ||
134 | }; | ||
135 | |||
136 | static struct resource orion_ehci1_resources[] = { | ||
137 | { | ||
138 | .start = ORION_USB1_REG_BASE, | ||
139 | .end = ORION_USB1_REG_BASE + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | { | ||
143 | .start = IRQ_ORION_USB1_CTRL, | ||
144 | .end = IRQ_ORION_USB1_CTRL, | ||
145 | .flags = IORESOURCE_IRQ, | ||
146 | }, | ||
147 | }; | ||
148 | |||
149 | static u64 ehci_dmamask = 0xffffffffUL; | ||
150 | |||
151 | static struct platform_device orion_ehci0 = { | ||
152 | .name = "orion-ehci", | ||
153 | .id = 0, | ||
154 | .dev = { | ||
155 | .dma_mask = &ehci_dmamask, | ||
156 | .coherent_dma_mask = 0xffffffff, | ||
157 | }, | ||
158 | .resource = orion_ehci0_resources, | ||
159 | .num_resources = ARRAY_SIZE(orion_ehci0_resources), | ||
160 | }; | ||
161 | |||
162 | static struct platform_device orion_ehci1 = { | ||
163 | .name = "orion-ehci", | ||
164 | .id = 1, | ||
165 | .dev = { | ||
166 | .dma_mask = &ehci_dmamask, | ||
167 | .coherent_dma_mask = 0xffffffff, | ||
168 | }, | ||
169 | .resource = orion_ehci1_resources, | ||
170 | .num_resources = ARRAY_SIZE(orion_ehci1_resources), | ||
171 | }; | ||
172 | |||
173 | /***************************************************************************** | ||
174 | * Gigabit Ethernet port | ||
175 | * (The Orion and Discovery (MV643xx) families use the same Ethernet driver) | ||
176 | ****************************************************************************/ | ||
177 | |||
178 | static struct resource orion_eth_shared_resources[] = { | ||
179 | { | ||
180 | .start = ORION_ETH_REG_BASE, | ||
181 | .end = ORION_ETH_REG_BASE + 0xffff, | ||
182 | .flags = IORESOURCE_MEM, | ||
183 | }, | ||
184 | }; | ||
185 | |||
186 | static struct platform_device orion_eth_shared = { | ||
187 | .name = MV643XX_ETH_SHARED_NAME, | ||
188 | .id = 0, | ||
189 | .num_resources = 1, | ||
190 | .resource = orion_eth_shared_resources, | ||
191 | }; | ||
192 | |||
193 | static struct resource orion_eth_resources[] = { | ||
194 | { | ||
195 | .name = "eth irq", | ||
196 | .start = IRQ_ORION_ETH_SUM, | ||
197 | .end = IRQ_ORION_ETH_SUM, | ||
198 | .flags = IORESOURCE_IRQ, | ||
199 | } | ||
200 | }; | ||
201 | |||
202 | static struct platform_device orion_eth = { | ||
203 | .name = MV643XX_ETH_NAME, | ||
204 | .id = 0, | ||
205 | .num_resources = 1, | ||
206 | .resource = orion_eth_resources, | ||
207 | }; | ||
208 | |||
209 | void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data) | ||
210 | { | ||
211 | orion_eth.dev.platform_data = eth_data; | ||
212 | platform_device_register(&orion_eth_shared); | ||
213 | platform_device_register(&orion_eth); | ||
214 | } | ||
215 | |||
216 | /***************************************************************************** | ||
217 | * I2C controller | ||
218 | * (The Orion and Discovery (MV643xx) families share the same I2C controller) | ||
219 | ****************************************************************************/ | ||
220 | |||
221 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { | ||
222 | .freq_m = 8, /* assumes 166 MHz TCLK */ | ||
223 | .freq_n = 3, | ||
224 | .timeout = 1000, /* Default timeout of 1 second */ | ||
225 | }; | ||
226 | |||
227 | static struct resource orion_i2c_resources[] = { | ||
228 | { | ||
229 | .name = "i2c base", | ||
230 | .start = I2C_BASE, | ||
231 | .end = I2C_BASE + 0x20 -1, | ||
232 | .flags = IORESOURCE_MEM, | ||
233 | }, | ||
234 | { | ||
235 | .name = "i2c irq", | ||
236 | .start = IRQ_ORION_I2C, | ||
237 | .end = IRQ_ORION_I2C, | ||
238 | .flags = IORESOURCE_IRQ, | ||
239 | }, | ||
240 | }; | ||
241 | |||
242 | static struct platform_device orion_i2c = { | ||
243 | .name = MV64XXX_I2C_CTLR_NAME, | ||
244 | .id = 0, | ||
245 | .num_resources = ARRAY_SIZE(orion_i2c_resources), | ||
246 | .resource = orion_i2c_resources, | ||
247 | .dev = { | ||
248 | .platform_data = &orion_i2c_pdata, | ||
249 | }, | ||
250 | }; | ||
251 | |||
252 | /***************************************************************************** | ||
253 | * General | ||
254 | ****************************************************************************/ | ||
255 | |||
256 | /* | ||
257 | * Identify device ID and rev from PCIE configuration header space '0'. | ||
258 | */ | ||
259 | static void orion_id(u32 *dev, u32 *rev, char **dev_name) | ||
260 | { | ||
261 | orion_pcie_id(dev, rev); | ||
262 | |||
263 | if (*dev == MV88F5281_DEV_ID) { | ||
264 | if (*rev == MV88F5281_REV_D2) { | ||
265 | *dev_name = "MV88F5281-D2"; | ||
266 | } else if (*rev == MV88F5281_REV_D1) { | ||
267 | *dev_name = "MV88F5281-D1"; | ||
268 | } else { | ||
269 | *dev_name = "MV88F5281-Rev-Unsupported"; | ||
270 | } | ||
271 | } else if (*dev == MV88F5182_DEV_ID) { | ||
272 | if (*rev == MV88F5182_REV_A2) { | ||
273 | *dev_name = "MV88F5182-A2"; | ||
274 | } else { | ||
275 | *dev_name = "MV88F5182-Rev-Unsupported"; | ||
276 | } | ||
277 | } else if (*dev == MV88F5181_DEV_ID) { | ||
278 | if (*rev == MV88F5181_REV_B1) { | ||
279 | *dev_name = "MV88F5181-Rev-B1"; | ||
280 | } else { | ||
281 | *dev_name = "MV88F5181-Rev-Unsupported"; | ||
282 | } | ||
283 | } else { | ||
284 | *dev_name = "Device-Unknown"; | ||
285 | } | ||
286 | } | ||
287 | |||
288 | void __init orion_init(void) | ||
289 | { | ||
290 | char *dev_name; | ||
291 | u32 dev, rev; | ||
292 | |||
293 | orion_id(&dev, &rev, &dev_name); | ||
294 | printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION_TCLK); | ||
295 | |||
296 | /* | ||
297 | * Setup Orion address map | ||
298 | */ | ||
299 | orion_setup_cpu_wins(); | ||
300 | orion_setup_usb_wins(); | ||
301 | orion_setup_eth_wins(); | ||
302 | orion_setup_pci_wins(); | ||
303 | orion_setup_pcie_wins(); | ||
304 | if (dev == MV88F5182_DEV_ID) | ||
305 | orion_setup_sata_wins(); | ||
306 | |||
307 | /* | ||
308 | * REgister devices | ||
309 | */ | ||
310 | platform_device_register(&orion_uart); | ||
311 | platform_device_register(&orion_ehci0); | ||
312 | if (dev == MV88F5182_DEV_ID) | ||
313 | platform_device_register(&orion_ehci1); | ||
314 | platform_device_register(&orion_i2c); | ||
315 | } | ||
diff --git a/arch/arm/mach-orion/common.h b/arch/arm/mach-orion/common.h new file mode 100644 index 000000000000..06c10c06f03e --- /dev/null +++ b/arch/arm/mach-orion/common.h | |||
@@ -0,0 +1,78 @@ | |||
1 | #ifndef __ARCH_ORION_COMMON_H__ | ||
2 | #define __ARCH_ORION_COMMON_H__ | ||
3 | |||
4 | /* | ||
5 | * Basic Orion init functions used early by machine-setup. | ||
6 | */ | ||
7 | |||
8 | void __init orion_map_io(void); | ||
9 | void __init orion_init_irq(void); | ||
10 | void __init orion_init(void); | ||
11 | |||
12 | /* | ||
13 | * Enumerations and functions for Orion windows mapping. Used by Orion core | ||
14 | * functions to map its interfaces and by the machine-setup to map its on- | ||
15 | * board devices. Details in /mach-orion/addr-map.c | ||
16 | */ | ||
17 | |||
18 | enum orion_target { | ||
19 | ORION_DEV_BOOT = 0, | ||
20 | ORION_DEV0, | ||
21 | ORION_DEV1, | ||
22 | ORION_DEV2, | ||
23 | ORION_PCIE_MEM, | ||
24 | ORION_PCIE_IO, | ||
25 | ORION_PCI_MEM, | ||
26 | ORION_PCI_IO, | ||
27 | ORION_DDR, | ||
28 | ORION_REGS, | ||
29 | ORION_MAX_TARGETS | ||
30 | }; | ||
31 | |||
32 | void orion_setup_cpu_win(enum orion_target target, u32 base, u32 size, int remap); | ||
33 | void orion_setup_cpu_wins(void); | ||
34 | void orion_setup_eth_wins(void); | ||
35 | void orion_setup_usb_wins(void); | ||
36 | void orion_setup_pci_wins(void); | ||
37 | void orion_setup_pcie_wins(void); | ||
38 | void orion_setup_sata_wins(void); | ||
39 | |||
40 | /* | ||
41 | * Shared code used internally by other Orion core functions. | ||
42 | * (/mach-orion/pci.c) | ||
43 | */ | ||
44 | |||
45 | struct pci_sys_data; | ||
46 | struct pci_bus; | ||
47 | |||
48 | void orion_pcie_id(u32 *dev, u32 *rev); | ||
49 | u32 orion_pcie_local_bus_nr(void); | ||
50 | u32 orion_pci_local_bus_nr(void); | ||
51 | u32 orion_pci_local_dev_nr(void); | ||
52 | int orion_pci_sys_setup(int nr, struct pci_sys_data *sys); | ||
53 | struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); | ||
54 | int orion_pci_hw_rd_conf(u32 bus, u32 dev, u32 func, u32 where, u32 size, u32 *val); | ||
55 | int orion_pci_hw_wr_conf(u32 bus, u32 dev, u32 func, u32 where, u32 size, u32 val); | ||
56 | |||
57 | /* | ||
58 | * Valid GPIO pins according to MPP setup, used by machine-setup. | ||
59 | * (/mach-orion/gpio.c). | ||
60 | */ | ||
61 | |||
62 | void __init orion_gpio_set_valid_pins(u32 pins); | ||
63 | void gpio_display(void); /* debug */ | ||
64 | |||
65 | /* | ||
66 | * Orion system timer (clocksource + clockevnt, /mach-orion/time.c) | ||
67 | */ | ||
68 | extern struct sys_timer orion_timer; | ||
69 | |||
70 | /* | ||
71 | * Pull in Orion Ethernet platform_data, used by machine-setup | ||
72 | */ | ||
73 | |||
74 | struct mv643xx_eth_platform_data; | ||
75 | |||
76 | void __init orion_eth_init(struct mv643xx_eth_platform_data *eth_data); | ||
77 | |||
78 | #endif /* __ARCH_ORION_COMMON_H__ */ | ||
diff --git a/arch/arm/mach-orion/db88f5281-setup.c b/arch/arm/mach-orion/db88f5281-setup.c new file mode 100644 index 000000000000..cb2a95ce5b57 --- /dev/null +++ b/arch/arm/mach-orion/db88f5281-setup.c | |||
@@ -0,0 +1,364 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/db88f5281-setup.c | ||
3 | * | ||
4 | * Marvell Orion-2 Development Board Setup | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/pci.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/mtd/physmap.h> | ||
19 | #include <linux/mtd/nand.h> | ||
20 | #include <linux/timer.h> | ||
21 | #include <linux/mv643xx_eth.h> | ||
22 | #include <linux/i2c.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | #include <asm/gpio.h> | ||
25 | #include <asm/mach/arch.h> | ||
26 | #include <asm/mach/pci.h> | ||
27 | #include <asm/arch/orion.h> | ||
28 | #include <asm/arch/platform.h> | ||
29 | #include "common.h" | ||
30 | |||
31 | /***************************************************************************** | ||
32 | * DB-88F5281 on board devices | ||
33 | ****************************************************************************/ | ||
34 | |||
35 | /* | ||
36 | * 512K NOR flash Device bus boot chip select | ||
37 | */ | ||
38 | |||
39 | #define DB88F5281_NOR_BOOT_BASE 0xf4000000 | ||
40 | #define DB88F5281_NOR_BOOT_SIZE SZ_512K | ||
41 | |||
42 | /* | ||
43 | * 7-Segment on Device bus chip select 0 | ||
44 | */ | ||
45 | |||
46 | #define DB88F5281_7SEG_BASE 0xfa000000 | ||
47 | #define DB88F5281_7SEG_SIZE SZ_1K | ||
48 | |||
49 | /* | ||
50 | * 32M NOR flash on Device bus chip select 1 | ||
51 | */ | ||
52 | |||
53 | #define DB88F5281_NOR_BASE 0xfc000000 | ||
54 | #define DB88F5281_NOR_SIZE SZ_32M | ||
55 | |||
56 | /* | ||
57 | * 32M NAND flash on Device bus chip select 2 | ||
58 | */ | ||
59 | |||
60 | #define DB88F5281_NAND_BASE 0xfa800000 | ||
61 | #define DB88F5281_NAND_SIZE SZ_1K | ||
62 | |||
63 | /* | ||
64 | * PCI | ||
65 | */ | ||
66 | |||
67 | #define DB88F5281_PCI_SLOT0_OFFS 7 | ||
68 | #define DB88F5281_PCI_SLOT0_IRQ_PIN 12 | ||
69 | #define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13 | ||
70 | |||
71 | /***************************************************************************** | ||
72 | * 512M NOR Flash on Device bus Boot CS | ||
73 | ****************************************************************************/ | ||
74 | |||
75 | static struct physmap_flash_data db88f5281_boot_flash_data = { | ||
76 | .width = 1, /* 8 bit bus width */ | ||
77 | }; | ||
78 | |||
79 | static struct resource db88f5281_boot_flash_resource = { | ||
80 | .flags = IORESOURCE_MEM, | ||
81 | .start = DB88F5281_NOR_BOOT_BASE, | ||
82 | .end = DB88F5281_NOR_BOOT_BASE + DB88F5281_NOR_BOOT_SIZE - 1, | ||
83 | }; | ||
84 | |||
85 | static struct platform_device db88f5281_boot_flash = { | ||
86 | .name = "physmap-flash", | ||
87 | .id = 0, | ||
88 | .dev = { | ||
89 | .platform_data = &db88f5281_boot_flash_data, | ||
90 | }, | ||
91 | .num_resources = 1, | ||
92 | .resource = &db88f5281_boot_flash_resource, | ||
93 | }; | ||
94 | |||
95 | /***************************************************************************** | ||
96 | * 32M NOR Flash on Device bus CS1 | ||
97 | ****************************************************************************/ | ||
98 | |||
99 | static struct physmap_flash_data db88f5281_nor_flash_data = { | ||
100 | .width = 4, /* 32 bit bus width */ | ||
101 | }; | ||
102 | |||
103 | static struct resource db88f5281_nor_flash_resource = { | ||
104 | .flags = IORESOURCE_MEM, | ||
105 | .start = DB88F5281_NOR_BASE, | ||
106 | .end = DB88F5281_NOR_BASE + DB88F5281_NOR_SIZE - 1, | ||
107 | }; | ||
108 | |||
109 | static struct platform_device db88f5281_nor_flash = { | ||
110 | .name = "physmap-flash", | ||
111 | .id = 1, | ||
112 | .dev = { | ||
113 | .platform_data = &db88f5281_nor_flash_data, | ||
114 | }, | ||
115 | .num_resources = 1, | ||
116 | .resource = &db88f5281_nor_flash_resource, | ||
117 | }; | ||
118 | |||
119 | /***************************************************************************** | ||
120 | * 32M NAND Flash on Device bus CS2 | ||
121 | ****************************************************************************/ | ||
122 | |||
123 | static struct mtd_partition db88f5281_nand_parts[] = { | ||
124 | { | ||
125 | .name = "kernel", | ||
126 | .offset = 0, | ||
127 | .size = SZ_2M, | ||
128 | }, | ||
129 | { | ||
130 | .name = "root", | ||
131 | .offset = SZ_2M, | ||
132 | .size = (SZ_16M - SZ_2M), | ||
133 | }, | ||
134 | { | ||
135 | .name = "user", | ||
136 | .offset = SZ_16M, | ||
137 | .size = SZ_8M, | ||
138 | }, | ||
139 | { | ||
140 | .name = "recovery", | ||
141 | .offset = (SZ_16M + SZ_8M), | ||
142 | .size = SZ_8M, | ||
143 | }, | ||
144 | }; | ||
145 | |||
146 | static struct resource db88f5281_nand_resource = { | ||
147 | .flags = IORESOURCE_MEM, | ||
148 | .start = DB88F5281_NAND_BASE, | ||
149 | .end = DB88F5281_NAND_BASE + DB88F5281_NAND_SIZE - 1, | ||
150 | }; | ||
151 | |||
152 | static struct orion_nand_data db88f5281_nand_data = { | ||
153 | .parts = db88f5281_nand_parts, | ||
154 | .nr_parts = ARRAY_SIZE(db88f5281_nand_parts), | ||
155 | .cle = 0, | ||
156 | .ale = 1, | ||
157 | .width = 8, | ||
158 | }; | ||
159 | |||
160 | static struct platform_device db88f5281_nand_flash = { | ||
161 | .name = "orion_nand", | ||
162 | .id = -1, | ||
163 | .dev = { | ||
164 | .platform_data = &db88f5281_nand_data, | ||
165 | }, | ||
166 | .resource = &db88f5281_nand_resource, | ||
167 | .num_resources = 1, | ||
168 | }; | ||
169 | |||
170 | /***************************************************************************** | ||
171 | * 7-Segment on Device bus CS0 | ||
172 | * Dummy counter every 2 sec | ||
173 | ****************************************************************************/ | ||
174 | |||
175 | static void __iomem *db88f5281_7seg; | ||
176 | static struct timer_list db88f5281_timer; | ||
177 | |||
178 | static void db88f5281_7seg_event(unsigned long data) | ||
179 | { | ||
180 | static int count = 0; | ||
181 | writel(0, db88f5281_7seg + (count << 4)); | ||
182 | count = (count + 1) & 7; | ||
183 | mod_timer(&db88f5281_timer, jiffies + 2 * HZ); | ||
184 | } | ||
185 | |||
186 | static int __init db88f5281_7seg_init(void) | ||
187 | { | ||
188 | if (machine_is_db88f5281()) { | ||
189 | db88f5281_7seg = ioremap(DB88F5281_7SEG_BASE, | ||
190 | DB88F5281_7SEG_SIZE); | ||
191 | if (!db88f5281_7seg) { | ||
192 | printk(KERN_ERR "Failed to ioremap db88f5281_7seg\n"); | ||
193 | return -EIO; | ||
194 | } | ||
195 | setup_timer(&db88f5281_timer, db88f5281_7seg_event, 0); | ||
196 | mod_timer(&db88f5281_timer, jiffies + 2 * HZ); | ||
197 | } | ||
198 | |||
199 | return 0; | ||
200 | } | ||
201 | |||
202 | __initcall(db88f5281_7seg_init); | ||
203 | |||
204 | /***************************************************************************** | ||
205 | * PCI | ||
206 | ****************************************************************************/ | ||
207 | |||
208 | void __init db88f5281_pci_preinit(void) | ||
209 | { | ||
210 | int pin; | ||
211 | |||
212 | /* | ||
213 | * Configure PCI GPIO IRQ pins | ||
214 | */ | ||
215 | pin = DB88F5281_PCI_SLOT0_IRQ_PIN; | ||
216 | if (gpio_request(pin, "PCI Int1") == 0) { | ||
217 | if (gpio_direction_input(pin) == 0) { | ||
218 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
219 | } else { | ||
220 | printk(KERN_ERR "db88f5281_pci_preinit faield to " | ||
221 | "set_irq_type pin %d\n", pin); | ||
222 | gpio_free(pin); | ||
223 | } | ||
224 | } else { | ||
225 | printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); | ||
226 | } | ||
227 | |||
228 | pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; | ||
229 | if (gpio_request(pin, "PCI Int2") == 0) { | ||
230 | if (gpio_direction_input(pin) == 0) { | ||
231 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
232 | } else { | ||
233 | printk(KERN_ERR "db88f5281_pci_preinit faield " | ||
234 | "to set_irq_type pin %d\n", pin); | ||
235 | gpio_free(pin); | ||
236 | } | ||
237 | } else { | ||
238 | printk(KERN_ERR "db88f5281_pci_preinit failed to gpio_request %d\n", pin); | ||
239 | } | ||
240 | } | ||
241 | |||
242 | static int __init db88f5281_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
243 | { | ||
244 | /* | ||
245 | * PCIE IRQ is connected internally (not GPIO) | ||
246 | */ | ||
247 | if (dev->bus->number == orion_pcie_local_bus_nr()) | ||
248 | return IRQ_ORION_PCIE0_INT; | ||
249 | |||
250 | /* | ||
251 | * PCI IRQs are connected via GPIOs | ||
252 | */ | ||
253 | switch (slot - DB88F5281_PCI_SLOT0_OFFS) { | ||
254 | case 0: | ||
255 | return gpio_to_irq(DB88F5281_PCI_SLOT0_IRQ_PIN); | ||
256 | case 1: | ||
257 | case 2: | ||
258 | return gpio_to_irq(DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN); | ||
259 | default: | ||
260 | return -1; | ||
261 | } | ||
262 | } | ||
263 | |||
264 | static struct hw_pci db88f5281_pci __initdata = { | ||
265 | .nr_controllers = 2, | ||
266 | .preinit = db88f5281_pci_preinit, | ||
267 | .swizzle = pci_std_swizzle, | ||
268 | .setup = orion_pci_sys_setup, | ||
269 | .scan = orion_pci_sys_scan_bus, | ||
270 | .map_irq = db88f5281_pci_map_irq, | ||
271 | }; | ||
272 | |||
273 | static int __init db88f5281_pci_init(void) | ||
274 | { | ||
275 | if (machine_is_db88f5281()) | ||
276 | pci_common_init(&db88f5281_pci); | ||
277 | |||
278 | return 0; | ||
279 | } | ||
280 | |||
281 | subsys_initcall(db88f5281_pci_init); | ||
282 | |||
283 | /***************************************************************************** | ||
284 | * Ethernet | ||
285 | ****************************************************************************/ | ||
286 | static struct mv643xx_eth_platform_data db88f5281_eth_data = { | ||
287 | .phy_addr = 8, | ||
288 | .force_phy_addr = 1, | ||
289 | }; | ||
290 | |||
291 | /***************************************************************************** | ||
292 | * RTC DS1339 on I2C bus | ||
293 | ****************************************************************************/ | ||
294 | static struct i2c_board_info __initdata db88f5281_i2c_rtc = { | ||
295 | .driver_name = "rtc-ds1307", | ||
296 | .type = "ds1339", | ||
297 | .addr = 0x68, | ||
298 | }; | ||
299 | |||
300 | /***************************************************************************** | ||
301 | * General Setup | ||
302 | ****************************************************************************/ | ||
303 | |||
304 | static struct platform_device *db88f5281_devs[] __initdata = { | ||
305 | &db88f5281_boot_flash, | ||
306 | &db88f5281_nor_flash, | ||
307 | &db88f5281_nand_flash, | ||
308 | }; | ||
309 | |||
310 | static void __init db88f5281_init(void) | ||
311 | { | ||
312 | /* | ||
313 | * Basic Orion setup. Need to be called early. | ||
314 | */ | ||
315 | orion_init(); | ||
316 | |||
317 | /* | ||
318 | * Setup the CPU address decode windows for our on-board devices | ||
319 | */ | ||
320 | orion_setup_cpu_win(ORION_DEV_BOOT, DB88F5281_NOR_BOOT_BASE, | ||
321 | DB88F5281_NOR_BOOT_SIZE, -1); | ||
322 | orion_setup_cpu_win(ORION_DEV0, DB88F5281_7SEG_BASE, | ||
323 | DB88F5281_7SEG_SIZE, -1); | ||
324 | orion_setup_cpu_win(ORION_DEV1, DB88F5281_NOR_BASE, | ||
325 | DB88F5281_NOR_SIZE, -1); | ||
326 | orion_setup_cpu_win(ORION_DEV2, DB88F5281_NAND_BASE, | ||
327 | DB88F5281_NAND_SIZE, -1); | ||
328 | |||
329 | /* | ||
330 | * Setup Multiplexing Pins: | ||
331 | * MPP0: GPIO (USB Over Current) MPP1: GPIO (USB Vbat input) | ||
332 | * MPP2: PCI_REQn[2] MPP3: PCI_GNTn[2] | ||
333 | * MPP4: PCI_REQn[3] MPP5: PCI_GNTn[3] | ||
334 | * MPP6: GPIO (JP0, CON17.2) MPP7: GPIO (JP1, CON17.1) | ||
335 | * MPP8: GPIO (JP2, CON11.2) MPP9: GPIO (JP3, CON11.3) | ||
336 | * MPP10: GPIO (RTC int) MPP11: GPIO (Baud Rate Generator) | ||
337 | * MPP12: GPIO (PCI int 1) MPP13: GPIO (PCI int 2) | ||
338 | * MPP14: NAND_REn[2] MPP15: NAND_WEn[2] | ||
339 | * MPP16: UART1_RX MPP17: UART1_TX | ||
340 | * MPP18: UART1_CTS MPP19: UART1_RTS | ||
341 | * MPP-DEV: DEV_D[16:31] | ||
342 | */ | ||
343 | orion_write(MPP_0_7_CTRL, 0x00222203); | ||
344 | orion_write(MPP_8_15_CTRL, 0x44000000); | ||
345 | orion_write(MPP_16_19_CTRL, 0); | ||
346 | orion_write(MPP_DEV_CTRL, 0); | ||
347 | |||
348 | orion_gpio_set_valid_pins(0x00003fc3); | ||
349 | |||
350 | platform_add_devices(db88f5281_devs, ARRAY_SIZE(db88f5281_devs)); | ||
351 | i2c_register_board_info(0, &db88f5281_i2c_rtc, 1); | ||
352 | orion_eth_init(&db88f5281_eth_data); | ||
353 | } | ||
354 | |||
355 | MACHINE_START(DB88F5281, "Marvell Orion-2 Development Board") | ||
356 | /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */ | ||
357 | .phys_io = ORION_REGS_BASE, | ||
358 | .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xfffc, | ||
359 | .boot_params = 0x00000100, | ||
360 | .init_machine = db88f5281_init, | ||
361 | .map_io = orion_map_io, | ||
362 | .init_irq = orion_init_irq, | ||
363 | .timer = &orion_timer, | ||
364 | MACHINE_END | ||
diff --git a/arch/arm/mach-orion/dns323-setup.c b/arch/arm/mach-orion/dns323-setup.c new file mode 100644 index 000000000000..c8a806f249c6 --- /dev/null +++ b/arch/arm/mach-orion/dns323-setup.c | |||
@@ -0,0 +1,322 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/dns323-setup.c | ||
3 | * | ||
4 | * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU Lesser General Public License as | ||
8 | * published by the Free Software Foundation; either version 2 of the | ||
9 | * License, or (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/pci.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/mtd/physmap.h> | ||
19 | #include <linux/mv643xx_eth.h> | ||
20 | #include <linux/leds.h> | ||
21 | #include <linux/gpio_keys.h> | ||
22 | #include <linux/input.h> | ||
23 | #include <linux/i2c.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/gpio.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | #include <asm/mach/pci.h> | ||
28 | #include <asm/arch/orion.h> | ||
29 | #include <asm/arch/platform.h> | ||
30 | #include "common.h" | ||
31 | |||
32 | #define DNS323_GPIO_LED_RIGHT_AMBER 1 | ||
33 | #define DNS323_GPIO_LED_LEFT_AMBER 2 | ||
34 | #define DNS323_GPIO_LED_POWER 5 | ||
35 | #define DNS323_GPIO_OVERTEMP 6 | ||
36 | #define DNS323_GPIO_RTC 7 | ||
37 | #define DNS323_GPIO_POWER_OFF 8 | ||
38 | #define DNS323_GPIO_KEY_POWER 9 | ||
39 | #define DNS323_GPIO_KEY_RESET 10 | ||
40 | |||
41 | /**************************************************************************** | ||
42 | * PCI setup | ||
43 | */ | ||
44 | |||
45 | static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
46 | { | ||
47 | /* PCI-E */ | ||
48 | if (dev->bus->number == orion_pcie_local_bus_nr()) | ||
49 | return IRQ_ORION_PCIE0_INT; | ||
50 | |||
51 | pr_err("%s: requested mapping for unknown bus\n", __func__); | ||
52 | |||
53 | return -1; | ||
54 | } | ||
55 | |||
56 | static struct hw_pci dns323_pci __initdata = { | ||
57 | .nr_controllers = 1, | ||
58 | .swizzle = pci_std_swizzle, | ||
59 | .setup = orion_pci_sys_setup, | ||
60 | .scan = orion_pci_sys_scan_bus, | ||
61 | .map_irq = dns323_pci_map_irq, | ||
62 | }; | ||
63 | |||
64 | static int __init dns323_pci_init(void) | ||
65 | { | ||
66 | if (machine_is_dns323()) | ||
67 | pci_common_init(&dns323_pci); | ||
68 | |||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | subsys_initcall(dns323_pci_init); | ||
73 | |||
74 | /**************************************************************************** | ||
75 | * Ethernet | ||
76 | */ | ||
77 | |||
78 | static struct mv643xx_eth_platform_data dns323_eth_data = { | ||
79 | .phy_addr = 8, | ||
80 | .force_phy_addr = 1, | ||
81 | }; | ||
82 | |||
83 | /**************************************************************************** | ||
84 | * 8MiB NOR flash (Spansion S29GL064M90TFIR4) | ||
85 | * | ||
86 | * Layout as used by D-Link: | ||
87 | * 0x00000000-0x00010000 : "MTD1" | ||
88 | * 0x00010000-0x00020000 : "MTD2" | ||
89 | * 0x00020000-0x001a0000 : "Linux Kernel" | ||
90 | * 0x001a0000-0x007d0000 : "File System" | ||
91 | * 0x007d0000-0x00800000 : "u-boot" | ||
92 | */ | ||
93 | |||
94 | #define DNS323_NOR_BOOT_BASE 0xf4000000 | ||
95 | #define DNS323_NOR_BOOT_SIZE SZ_8M | ||
96 | |||
97 | static struct mtd_partition dns323_partitions[] = { | ||
98 | { | ||
99 | .name = "MTD1", | ||
100 | .size = 0x00010000, | ||
101 | .offset = 0, | ||
102 | }, { | ||
103 | .name = "MTD2", | ||
104 | .size = 0x00010000, | ||
105 | .offset = 0x00010000, | ||
106 | }, { | ||
107 | .name = "Linux Kernel", | ||
108 | .size = 0x00180000, | ||
109 | .offset = 0x00020000, | ||
110 | }, { | ||
111 | .name = "File System", | ||
112 | .size = 0x00630000, | ||
113 | .offset = 0x001A0000, | ||
114 | }, { | ||
115 | .name = "u-boot", | ||
116 | .size = 0x00030000, | ||
117 | .offset = 0x007d0000, | ||
118 | } | ||
119 | }; | ||
120 | |||
121 | static struct physmap_flash_data dns323_nor_flash_data = { | ||
122 | .width = 1, | ||
123 | .parts = dns323_partitions, | ||
124 | .nr_parts = ARRAY_SIZE(dns323_partitions) | ||
125 | }; | ||
126 | |||
127 | static struct resource dns323_nor_flash_resource = { | ||
128 | .flags = IORESOURCE_MEM, | ||
129 | .start = DNS323_NOR_BOOT_BASE, | ||
130 | .end = DNS323_NOR_BOOT_BASE + DNS323_NOR_BOOT_SIZE - 1, | ||
131 | }; | ||
132 | |||
133 | static struct platform_device dns323_nor_flash = { | ||
134 | .name = "physmap-flash", | ||
135 | .id = 0, | ||
136 | .dev = { .platform_data = &dns323_nor_flash_data, }, | ||
137 | .resource = &dns323_nor_flash_resource, | ||
138 | .num_resources = 1, | ||
139 | }; | ||
140 | |||
141 | /**************************************************************************** | ||
142 | * GPIO LEDs (simple - doesn't use hardware blinking support) | ||
143 | */ | ||
144 | |||
145 | static struct gpio_led dns323_leds[] = { | ||
146 | { | ||
147 | .name = "power:blue", | ||
148 | .gpio = DNS323_GPIO_LED_POWER, | ||
149 | .active_low = 1, | ||
150 | }, { | ||
151 | .name = "right:amber", | ||
152 | .gpio = DNS323_GPIO_LED_RIGHT_AMBER, | ||
153 | .active_low = 1, | ||
154 | }, { | ||
155 | .name = "left:amber", | ||
156 | .gpio = DNS323_GPIO_LED_LEFT_AMBER, | ||
157 | .active_low = 1, | ||
158 | }, | ||
159 | }; | ||
160 | |||
161 | static struct gpio_led_platform_data dns323_led_data = { | ||
162 | .num_leds = ARRAY_SIZE(dns323_leds), | ||
163 | .leds = dns323_leds, | ||
164 | }; | ||
165 | |||
166 | static struct platform_device dns323_gpio_leds = { | ||
167 | .name = "leds-gpio", | ||
168 | .id = -1, | ||
169 | .dev = { .platform_data = &dns323_led_data, }, | ||
170 | }; | ||
171 | |||
172 | /**************************************************************************** | ||
173 | * GPIO Attached Keys | ||
174 | */ | ||
175 | |||
176 | static struct gpio_keys_button dns323_buttons[] = { | ||
177 | { | ||
178 | .code = KEY_RESTART, | ||
179 | .gpio = DNS323_GPIO_KEY_RESET, | ||
180 | .desc = "Reset Button", | ||
181 | .active_low = 1, | ||
182 | }, | ||
183 | { | ||
184 | .code = KEY_POWER, | ||
185 | .gpio = DNS323_GPIO_KEY_POWER, | ||
186 | .desc = "Power Button", | ||
187 | .active_low = 1, | ||
188 | } | ||
189 | }; | ||
190 | |||
191 | static struct gpio_keys_platform_data dns323_button_data = { | ||
192 | .buttons = dns323_buttons, | ||
193 | .nbuttons = ARRAY_SIZE(dns323_buttons), | ||
194 | }; | ||
195 | |||
196 | static struct platform_device dns323_button_device = { | ||
197 | .name = "gpio-keys", | ||
198 | .id = -1, | ||
199 | .num_resources = 0, | ||
200 | .dev = { .platform_data = &dns323_button_data, }, | ||
201 | }; | ||
202 | |||
203 | /**************************************************************************** | ||
204 | * General Setup | ||
205 | */ | ||
206 | |||
207 | static struct platform_device *dns323_plat_devices[] __initdata = { | ||
208 | &dns323_nor_flash, | ||
209 | &dns323_gpio_leds, | ||
210 | &dns323_button_device, | ||
211 | }; | ||
212 | |||
213 | /* | ||
214 | * On the DNS-323 the following devices are attached via I2C: | ||
215 | * | ||
216 | * i2c addr | chip | description | ||
217 | * 0x3e | GMT G760Af | fan speed PWM controller | ||
218 | * 0x48 | GMT G751-2f | temp. sensor and therm. watchdog (LM75 compatible) | ||
219 | * 0x68 | ST M41T80 | RTC w/ alarm | ||
220 | */ | ||
221 | static struct i2c_board_info __initdata dns323_i2c_devices[] = { | ||
222 | { | ||
223 | I2C_BOARD_INFO("g760a", 0x3e), | ||
224 | .type = "g760a", | ||
225 | }, | ||
226 | #if 0 | ||
227 | /* this entry requires the new-style driver model lm75 driver, | ||
228 | * for the meantime "insmod lm75.ko force_lm75=0,0x48" is needed */ | ||
229 | { | ||
230 | I2C_BOARD_INFO("lm75", 0x48), | ||
231 | .type = "g751", | ||
232 | }, | ||
233 | #endif | ||
234 | { | ||
235 | I2C_BOARD_INFO("rtc-m41t80", 0x68), | ||
236 | .type = "m41t80", | ||
237 | } | ||
238 | }; | ||
239 | |||
240 | /* DNS-323 specific power off method */ | ||
241 | static void dns323_power_off(void) | ||
242 | { | ||
243 | pr_info("%s: triggering power-off...\n", __func__); | ||
244 | gpio_set_value(DNS323_GPIO_POWER_OFF, 1); | ||
245 | } | ||
246 | |||
247 | static void __init dns323_init(void) | ||
248 | { | ||
249 | /* Setup basic Orion functions. Need to be called early. */ | ||
250 | orion_init(); | ||
251 | |||
252 | /* setup flash mapping | ||
253 | * CS3 holds a 8 MB Spansion S29GL064M90TFIR4 | ||
254 | */ | ||
255 | orion_setup_cpu_win(ORION_DEV_BOOT, DNS323_NOR_BOOT_BASE, | ||
256 | DNS323_NOR_BOOT_SIZE, -1); | ||
257 | |||
258 | /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE | ||
259 | * | ||
260 | * Open a special address decode windows for the PCIE WA. | ||
261 | */ | ||
262 | orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); | ||
263 | orion_write(ORION_REGS_BASE | 0x20070, | ||
264 | (0x7941 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); | ||
265 | |||
266 | /* set MPP to 0 as D-Link's 2.6.12.6 kernel did */ | ||
267 | orion_write(MPP_0_7_CTRL, 0); | ||
268 | orion_write(MPP_8_15_CTRL, 0); | ||
269 | orion_write(MPP_16_19_CTRL, 0); | ||
270 | orion_write(MPP_DEV_CTRL, 0); | ||
271 | |||
272 | /* Define used GPIO pins | ||
273 | |||
274 | GPIO Map: | ||
275 | |||
276 | | 0 | | PEX_RST_OUT (not controlled by GPIO) | ||
277 | | 1 | Out | right amber LED (= sata ch0 LED) (low-active) | ||
278 | | 2 | Out | left amber LED (= sata ch1 LED) (low-active) | ||
279 | | 3 | Out | //unknown// | ||
280 | | 4 | Out | power button LED (low-active, together with pin #5) | ||
281 | | 5 | Out | power button LED (low-active, together with pin #4) | ||
282 | | 6 | In | GMT G751-2f overtemp. shutdown signal (low-active) | ||
283 | | 7 | In | M41T80 nIRQ/OUT/SQW signal | ||
284 | | 8 | Out | triggers power off (high-active) | ||
285 | | 9 | In | power button switch (low-active) | ||
286 | | 10 | In | reset button switch (low-active) | ||
287 | | 11 | Out | //unknown// | ||
288 | | 12 | Out | //unknown// | ||
289 | | 13 | Out | //unknown// | ||
290 | | 14 | Out | //unknown// | ||
291 | | 15 | Out | //unknown// | ||
292 | */ | ||
293 | orion_gpio_set_valid_pins(0x07f6); | ||
294 | |||
295 | /* register dns323 specific power-off method */ | ||
296 | if ((gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0) | ||
297 | || (gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)) | ||
298 | pr_err("DNS323: failed to setup power-off GPIO\n"); | ||
299 | |||
300 | pm_power_off = dns323_power_off; | ||
301 | |||
302 | /* register flash and other platform devices */ | ||
303 | platform_add_devices(dns323_plat_devices, | ||
304 | ARRAY_SIZE(dns323_plat_devices)); | ||
305 | |||
306 | i2c_register_board_info(0, dns323_i2c_devices, | ||
307 | ARRAY_SIZE(dns323_i2c_devices)); | ||
308 | |||
309 | orion_eth_init(&dns323_eth_data); | ||
310 | } | ||
311 | |||
312 | /* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */ | ||
313 | MACHINE_START(DNS323, "D-Link DNS-323") | ||
314 | /* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */ | ||
315 | .phys_io = ORION_REGS_BASE, | ||
316 | .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, | ||
317 | .boot_params = 0x00000100, | ||
318 | .init_machine = dns323_init, | ||
319 | .map_io = orion_map_io, | ||
320 | .init_irq = orion_init_irq, | ||
321 | .timer = &orion_timer, | ||
322 | MACHINE_END | ||
diff --git a/arch/arm/mach-orion/gpio.c b/arch/arm/mach-orion/gpio.c new file mode 100644 index 000000000000..d5f00c86d616 --- /dev/null +++ b/arch/arm/mach-orion/gpio.c | |||
@@ -0,0 +1,225 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/gpio.c | ||
3 | * | ||
4 | * GPIO functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/spinlock.h> | ||
17 | #include <linux/bitops.h> | ||
18 | #include <asm/gpio.h> | ||
19 | #include <asm/arch/orion.h> | ||
20 | #include "common.h" | ||
21 | |||
22 | static DEFINE_SPINLOCK(gpio_lock); | ||
23 | static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)]; | ||
24 | static const char *gpio_label[GPIO_MAX]; /* non null for allocated GPIOs */ | ||
25 | |||
26 | void __init orion_gpio_set_valid_pins(u32 pins) | ||
27 | { | ||
28 | gpio_valid[0] = pins; | ||
29 | } | ||
30 | |||
31 | /* | ||
32 | * GENERIC_GPIO primitives | ||
33 | */ | ||
34 | int gpio_direction_input(unsigned pin) | ||
35 | { | ||
36 | unsigned long flags; | ||
37 | |||
38 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
39 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
40 | return -EINVAL; | ||
41 | } | ||
42 | |||
43 | spin_lock_irqsave(&gpio_lock, flags); | ||
44 | |||
45 | /* | ||
46 | * Some callers might have not used the gpio_request(), | ||
47 | * so flag this pin as requested now. | ||
48 | */ | ||
49 | if (!gpio_label[pin]) | ||
50 | gpio_label[pin] = "?"; | ||
51 | |||
52 | orion_setbits(GPIO_IO_CONF, 1 << pin); | ||
53 | |||
54 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
55 | return 0; | ||
56 | } | ||
57 | EXPORT_SYMBOL(gpio_direction_input); | ||
58 | |||
59 | int gpio_direction_output(unsigned pin, int value) | ||
60 | { | ||
61 | unsigned long flags; | ||
62 | int mask; | ||
63 | |||
64 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
65 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
66 | return -EINVAL; | ||
67 | } | ||
68 | |||
69 | spin_lock_irqsave(&gpio_lock, flags); | ||
70 | |||
71 | /* | ||
72 | * Some callers might have not used the gpio_request(), | ||
73 | * so flag this pin as requested now. | ||
74 | */ | ||
75 | if (!gpio_label[pin]) | ||
76 | gpio_label[pin] = "?"; | ||
77 | |||
78 | mask = 1 << pin; | ||
79 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
80 | if (value) | ||
81 | orion_setbits(GPIO_OUT, mask); | ||
82 | else | ||
83 | orion_clrbits(GPIO_OUT, mask); | ||
84 | orion_clrbits(GPIO_IO_CONF, mask); | ||
85 | |||
86 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
87 | return 0; | ||
88 | } | ||
89 | EXPORT_SYMBOL(gpio_direction_output); | ||
90 | |||
91 | int gpio_get_value(unsigned pin) | ||
92 | { | ||
93 | int val, mask = 1 << pin; | ||
94 | |||
95 | if (orion_read(GPIO_IO_CONF) & mask) | ||
96 | val = orion_read(GPIO_DATA_IN) ^ orion_read(GPIO_IN_POL); | ||
97 | else | ||
98 | val = orion_read(GPIO_OUT); | ||
99 | |||
100 | return val & mask; | ||
101 | } | ||
102 | EXPORT_SYMBOL(gpio_get_value); | ||
103 | |||
104 | void gpio_set_value(unsigned pin, int value) | ||
105 | { | ||
106 | unsigned long flags; | ||
107 | int mask = 1 << pin; | ||
108 | |||
109 | spin_lock_irqsave(&gpio_lock, flags); | ||
110 | |||
111 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
112 | if (value) | ||
113 | orion_setbits(GPIO_OUT, mask); | ||
114 | else | ||
115 | orion_clrbits(GPIO_OUT, mask); | ||
116 | |||
117 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
118 | } | ||
119 | EXPORT_SYMBOL(gpio_set_value); | ||
120 | |||
121 | void orion_gpio_set_blink(unsigned pin, int blink) | ||
122 | { | ||
123 | unsigned long flags; | ||
124 | int mask = 1 << pin; | ||
125 | |||
126 | spin_lock_irqsave(&gpio_lock, flags); | ||
127 | |||
128 | orion_clrbits(GPIO_OUT, mask); | ||
129 | if (blink) | ||
130 | orion_setbits(GPIO_BLINK_EN, mask); | ||
131 | else | ||
132 | orion_clrbits(GPIO_BLINK_EN, mask); | ||
133 | |||
134 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
135 | } | ||
136 | EXPORT_SYMBOL(orion_gpio_set_blink); | ||
137 | |||
138 | int gpio_request(unsigned pin, const char *label) | ||
139 | { | ||
140 | int ret = 0; | ||
141 | unsigned long flags; | ||
142 | |||
143 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
144 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
145 | return -EINVAL; | ||
146 | } | ||
147 | |||
148 | spin_lock_irqsave(&gpio_lock, flags); | ||
149 | |||
150 | if (gpio_label[pin]) { | ||
151 | pr_debug("%s: GPIO %d already used as %s\n", | ||
152 | __FUNCTION__, pin, gpio_label[pin]); | ||
153 | ret = -EBUSY; | ||
154 | } else | ||
155 | gpio_label[pin] = label ? label : "?"; | ||
156 | |||
157 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
158 | return ret; | ||
159 | } | ||
160 | EXPORT_SYMBOL(gpio_request); | ||
161 | |||
162 | void gpio_free(unsigned pin) | ||
163 | { | ||
164 | if (pin >= GPIO_MAX || !test_bit(pin, gpio_valid)) { | ||
165 | pr_debug("%s: invalid GPIO %d\n", __FUNCTION__, pin); | ||
166 | return; | ||
167 | } | ||
168 | |||
169 | if (!gpio_label[pin]) | ||
170 | pr_warning("%s: GPIO %d already freed\n", __FUNCTION__, pin); | ||
171 | else | ||
172 | gpio_label[pin] = NULL; | ||
173 | } | ||
174 | EXPORT_SYMBOL(gpio_free); | ||
175 | |||
176 | /* Debug helper */ | ||
177 | void gpio_display(void) | ||
178 | { | ||
179 | int i; | ||
180 | |||
181 | for (i = 0; i < GPIO_MAX; i++) { | ||
182 | printk(KERN_DEBUG "Pin-%d: ", i); | ||
183 | |||
184 | if (!test_bit(i, gpio_valid)) { | ||
185 | printk("non-GPIO\n"); | ||
186 | } else if (!gpio_label[i]) { | ||
187 | printk("GPIO, free\n"); | ||
188 | } else { | ||
189 | printk("GPIO, used by %s, ", gpio_label[i]); | ||
190 | if (orion_read(GPIO_IO_CONF) & (1 << i)) { | ||
191 | printk("input, active %s, level %s, edge %s\n", | ||
192 | ((orion_read(GPIO_IN_POL) >> i) & 1) ? "low" : "high", | ||
193 | ((orion_read(GPIO_LEVEL_MASK) >> i) & 1) ? "enabled" : "masked", | ||
194 | ((orion_read(GPIO_EDGE_MASK) >> i) & 1) ? "enabled" : "masked"); | ||
195 | } else { | ||
196 | printk("output, val=%d\n", (orion_read(GPIO_OUT) >> i) & 1); | ||
197 | } | ||
198 | } | ||
199 | } | ||
200 | |||
201 | printk(KERN_DEBUG "MPP_0_7_CTRL (0x%08x) = 0x%08x\n", | ||
202 | MPP_0_7_CTRL, orion_read(MPP_0_7_CTRL)); | ||
203 | printk(KERN_DEBUG "MPP_8_15_CTRL (0x%08x) = 0x%08x\n", | ||
204 | MPP_8_15_CTRL, orion_read(MPP_8_15_CTRL)); | ||
205 | printk(KERN_DEBUG "MPP_16_19_CTRL (0x%08x) = 0x%08x\n", | ||
206 | MPP_16_19_CTRL, orion_read(MPP_16_19_CTRL)); | ||
207 | printk(KERN_DEBUG "MPP_DEV_CTRL (0x%08x) = 0x%08x\n", | ||
208 | MPP_DEV_CTRL, orion_read(MPP_DEV_CTRL)); | ||
209 | printk(KERN_DEBUG "GPIO_OUT (0x%08x) = 0x%08x\n", | ||
210 | GPIO_OUT, orion_read(GPIO_OUT)); | ||
211 | printk(KERN_DEBUG "GPIO_IO_CONF (0x%08x) = 0x%08x\n", | ||
212 | GPIO_IO_CONF, orion_read(GPIO_IO_CONF)); | ||
213 | printk(KERN_DEBUG "GPIO_BLINK_EN (0x%08x) = 0x%08x\n", | ||
214 | GPIO_BLINK_EN, orion_read(GPIO_BLINK_EN)); | ||
215 | printk(KERN_DEBUG "GPIO_IN_POL (0x%08x) = 0x%08x\n", | ||
216 | GPIO_IN_POL, orion_read(GPIO_IN_POL)); | ||
217 | printk(KERN_DEBUG "GPIO_DATA_IN (0x%08x) = 0x%08x\n", | ||
218 | GPIO_DATA_IN, orion_read(GPIO_DATA_IN)); | ||
219 | printk(KERN_DEBUG "GPIO_LEVEL_MASK (0x%08x) = 0x%08x\n", | ||
220 | GPIO_LEVEL_MASK, orion_read(GPIO_LEVEL_MASK)); | ||
221 | printk(KERN_DEBUG "GPIO_EDGE_CAUSE (0x%08x) = 0x%08x\n", | ||
222 | GPIO_EDGE_CAUSE, orion_read(GPIO_EDGE_CAUSE)); | ||
223 | printk(KERN_DEBUG "GPIO_EDGE_MASK (0x%08x) = 0x%08x\n", | ||
224 | GPIO_EDGE_MASK, orion_read(GPIO_EDGE_MASK)); | ||
225 | } | ||
diff --git a/arch/arm/mach-orion/irq.c b/arch/arm/mach-orion/irq.c new file mode 100644 index 000000000000..df7e12ad378b --- /dev/null +++ b/arch/arm/mach-orion/irq.c | |||
@@ -0,0 +1,241 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/irq.c | ||
3 | * | ||
4 | * Core IRQ functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <asm/gpio.h> | ||
17 | #include <asm/arch/orion.h> | ||
18 | #include "common.h" | ||
19 | |||
20 | /***************************************************************************** | ||
21 | * Orion GPIO IRQ | ||
22 | * | ||
23 | * GPIO_IN_POL register controlls whether GPIO_DATA_IN will hold the same | ||
24 | * value of the line or the opposite value. | ||
25 | * | ||
26 | * Level IRQ handlers: DATA_IN is used directly as cause register. | ||
27 | * Interrupt are masked by LEVEL_MASK registers. | ||
28 | * Edge IRQ handlers: Change in DATA_IN are latched in EDGE_CAUSE. | ||
29 | * Interrupt are masked by EDGE_MASK registers. | ||
30 | * Both-edge handlers: Similar to regular Edge handlers, but also swaps | ||
31 | * the polarity to catch the next line transaction. | ||
32 | * This is a race condition that might not perfectly | ||
33 | * work on some use cases. | ||
34 | * | ||
35 | * Every eight GPIO lines are grouped (OR'ed) before going up to main | ||
36 | * cause register. | ||
37 | * | ||
38 | * EDGE cause mask | ||
39 | * data-in /--------| |-----| |----\ | ||
40 | * -----| |----- ---- to main cause reg | ||
41 | * X \----------------| |----/ | ||
42 | * polarity LEVEL mask | ||
43 | * | ||
44 | ****************************************************************************/ | ||
45 | static void orion_gpio_irq_ack(u32 irq) | ||
46 | { | ||
47 | int pin = irq_to_gpio(irq); | ||
48 | if (irq_desc[irq].status & IRQ_LEVEL) | ||
49 | /* | ||
50 | * Mask bit for level interrupt | ||
51 | */ | ||
52 | orion_clrbits(GPIO_LEVEL_MASK, 1 << pin); | ||
53 | else | ||
54 | /* | ||
55 | * Clear casue bit for egde interrupt | ||
56 | */ | ||
57 | orion_clrbits(GPIO_EDGE_CAUSE, 1 << pin); | ||
58 | } | ||
59 | |||
60 | static void orion_gpio_irq_mask(u32 irq) | ||
61 | { | ||
62 | int pin = irq_to_gpio(irq); | ||
63 | if (irq_desc[irq].status & IRQ_LEVEL) | ||
64 | orion_clrbits(GPIO_LEVEL_MASK, 1 << pin); | ||
65 | else | ||
66 | orion_clrbits(GPIO_EDGE_MASK, 1 << pin); | ||
67 | } | ||
68 | |||
69 | static void orion_gpio_irq_unmask(u32 irq) | ||
70 | { | ||
71 | int pin = irq_to_gpio(irq); | ||
72 | if (irq_desc[irq].status & IRQ_LEVEL) | ||
73 | orion_setbits(GPIO_LEVEL_MASK, 1 << pin); | ||
74 | else | ||
75 | orion_setbits(GPIO_EDGE_MASK, 1 << pin); | ||
76 | } | ||
77 | |||
78 | static int orion_gpio_set_irq_type(u32 irq, u32 type) | ||
79 | { | ||
80 | int pin = irq_to_gpio(irq); | ||
81 | struct irq_desc *desc; | ||
82 | |||
83 | if ((orion_read(GPIO_IO_CONF) & (1 << pin)) == 0) { | ||
84 | printk(KERN_ERR "orion_gpio_set_irq_type failed " | ||
85 | "(irq %d, pin %d).\n", irq, pin); | ||
86 | return -EINVAL; | ||
87 | } | ||
88 | |||
89 | desc = irq_desc + irq; | ||
90 | |||
91 | switch (type) { | ||
92 | case IRQT_HIGH: | ||
93 | desc->handle_irq = handle_level_irq; | ||
94 | desc->status |= IRQ_LEVEL; | ||
95 | orion_clrbits(GPIO_IN_POL, (1 << pin)); | ||
96 | break; | ||
97 | case IRQT_LOW: | ||
98 | desc->handle_irq = handle_level_irq; | ||
99 | desc->status |= IRQ_LEVEL; | ||
100 | orion_setbits(GPIO_IN_POL, (1 << pin)); | ||
101 | break; | ||
102 | case IRQT_RISING: | ||
103 | desc->handle_irq = handle_edge_irq; | ||
104 | desc->status &= ~IRQ_LEVEL; | ||
105 | orion_clrbits(GPIO_IN_POL, (1 << pin)); | ||
106 | break; | ||
107 | case IRQT_FALLING: | ||
108 | desc->handle_irq = handle_edge_irq; | ||
109 | desc->status &= ~IRQ_LEVEL; | ||
110 | orion_setbits(GPIO_IN_POL, (1 << pin)); | ||
111 | break; | ||
112 | case IRQT_BOTHEDGE: | ||
113 | desc->handle_irq = handle_edge_irq; | ||
114 | desc->status &= ~IRQ_LEVEL; | ||
115 | /* | ||
116 | * set initial polarity based on current input level | ||
117 | */ | ||
118 | if ((orion_read(GPIO_IN_POL) ^ orion_read(GPIO_DATA_IN)) | ||
119 | & (1 << pin)) | ||
120 | orion_setbits(GPIO_IN_POL, (1 << pin)); /* falling */ | ||
121 | else | ||
122 | orion_clrbits(GPIO_IN_POL, (1 << pin)); /* rising */ | ||
123 | |||
124 | break; | ||
125 | default: | ||
126 | printk(KERN_ERR "failed to set irq=%d (type=%d)\n", irq, type); | ||
127 | return -EINVAL; | ||
128 | } | ||
129 | |||
130 | desc->status &= ~IRQ_TYPE_SENSE_MASK; | ||
131 | desc->status |= type & IRQ_TYPE_SENSE_MASK; | ||
132 | |||
133 | return 0; | ||
134 | } | ||
135 | |||
136 | static struct irq_chip orion_gpio_irq_chip = { | ||
137 | .name = "Orion-IRQ-GPIO", | ||
138 | .ack = orion_gpio_irq_ack, | ||
139 | .mask = orion_gpio_irq_mask, | ||
140 | .unmask = orion_gpio_irq_unmask, | ||
141 | .set_type = orion_gpio_set_irq_type, | ||
142 | }; | ||
143 | |||
144 | static void orion_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
145 | { | ||
146 | u32 cause, offs, pin; | ||
147 | |||
148 | BUG_ON(irq < IRQ_ORION_GPIO_0_7 || irq > IRQ_ORION_GPIO_24_31); | ||
149 | offs = (irq - IRQ_ORION_GPIO_0_7) * 8; | ||
150 | cause = (orion_read(GPIO_DATA_IN) & orion_read(GPIO_LEVEL_MASK)) | | ||
151 | (orion_read(GPIO_EDGE_CAUSE) & orion_read(GPIO_EDGE_MASK)); | ||
152 | |||
153 | for (pin = offs; pin < offs + 8; pin++) { | ||
154 | if (cause & (1 << pin)) { | ||
155 | irq = gpio_to_irq(pin); | ||
156 | desc = irq_desc + irq; | ||
157 | if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { | ||
158 | /* Swap polarity (race with GPIO line) */ | ||
159 | u32 polarity = orion_read(GPIO_IN_POL); | ||
160 | polarity ^= 1 << pin; | ||
161 | orion_write(GPIO_IN_POL, polarity); | ||
162 | } | ||
163 | desc_handle_irq(irq, desc); | ||
164 | } | ||
165 | } | ||
166 | } | ||
167 | |||
168 | static void __init orion_init_gpio_irq(void) | ||
169 | { | ||
170 | int i; | ||
171 | struct irq_desc *desc; | ||
172 | |||
173 | /* | ||
174 | * Mask and clear GPIO IRQ interrupts | ||
175 | */ | ||
176 | orion_write(GPIO_LEVEL_MASK, 0x0); | ||
177 | orion_write(GPIO_EDGE_MASK, 0x0); | ||
178 | orion_write(GPIO_EDGE_CAUSE, 0x0); | ||
179 | |||
180 | /* | ||
181 | * Register chained level handlers for GPIO IRQs by default. | ||
182 | * User can use set_type() if he wants to use edge types handlers. | ||
183 | */ | ||
184 | for (i = IRQ_ORION_GPIO_START; i < NR_IRQS; i++) { | ||
185 | set_irq_chip(i, &orion_gpio_irq_chip); | ||
186 | set_irq_handler(i, handle_level_irq); | ||
187 | desc = irq_desc + i; | ||
188 | desc->status |= IRQ_LEVEL; | ||
189 | set_irq_flags(i, IRQF_VALID); | ||
190 | } | ||
191 | set_irq_chained_handler(IRQ_ORION_GPIO_0_7, orion_gpio_irq_handler); | ||
192 | set_irq_chained_handler(IRQ_ORION_GPIO_8_15, orion_gpio_irq_handler); | ||
193 | set_irq_chained_handler(IRQ_ORION_GPIO_16_23, orion_gpio_irq_handler); | ||
194 | set_irq_chained_handler(IRQ_ORION_GPIO_24_31, orion_gpio_irq_handler); | ||
195 | } | ||
196 | |||
197 | /***************************************************************************** | ||
198 | * Orion Main IRQ | ||
199 | ****************************************************************************/ | ||
200 | static void orion_main_irq_mask(u32 irq) | ||
201 | { | ||
202 | orion_clrbits(MAIN_IRQ_MASK, 1 << irq); | ||
203 | } | ||
204 | |||
205 | static void orion_main_irq_unmask(u32 irq) | ||
206 | { | ||
207 | orion_setbits(MAIN_IRQ_MASK, 1 << irq); | ||
208 | } | ||
209 | |||
210 | static struct irq_chip orion_main_irq_chip = { | ||
211 | .name = "Orion-IRQ-Main", | ||
212 | .ack = orion_main_irq_mask, | ||
213 | .mask = orion_main_irq_mask, | ||
214 | .unmask = orion_main_irq_unmask, | ||
215 | }; | ||
216 | |||
217 | static void __init orion_init_main_irq(void) | ||
218 | { | ||
219 | int i; | ||
220 | |||
221 | /* | ||
222 | * Mask and clear Main IRQ interrupts | ||
223 | */ | ||
224 | orion_write(MAIN_IRQ_MASK, 0x0); | ||
225 | orion_write(MAIN_IRQ_CAUSE, 0x0); | ||
226 | |||
227 | /* | ||
228 | * Register level handler for Main IRQs | ||
229 | */ | ||
230 | for (i = 0; i < IRQ_ORION_GPIO_START; i++) { | ||
231 | set_irq_chip(i, &orion_main_irq_chip); | ||
232 | set_irq_handler(i, handle_level_irq); | ||
233 | set_irq_flags(i, IRQF_VALID); | ||
234 | } | ||
235 | } | ||
236 | |||
237 | void __init orion_init_irq(void) | ||
238 | { | ||
239 | orion_init_main_irq(); | ||
240 | orion_init_gpio_irq(); | ||
241 | } | ||
diff --git a/arch/arm/mach-orion/kurobox_pro-setup.c b/arch/arm/mach-orion/kurobox_pro-setup.c new file mode 100644 index 000000000000..2d812ed6b5c7 --- /dev/null +++ b/arch/arm/mach-orion/kurobox_pro-setup.c | |||
@@ -0,0 +1,234 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/kurobox_pro-setup.c | ||
3 | * | ||
4 | * Maintainer: Ronen Shitrit <rshitrit@marvell.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/pci.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/mtd/physmap.h> | ||
17 | #include <linux/mtd/nand.h> | ||
18 | #include <linux/mv643xx_eth.h> | ||
19 | #include <linux/i2c.h> | ||
20 | #include <asm/mach-types.h> | ||
21 | #include <asm/gpio.h> | ||
22 | #include <asm/mach/arch.h> | ||
23 | #include <asm/mach/pci.h> | ||
24 | #include <asm/arch/orion.h> | ||
25 | #include <asm/arch/platform.h> | ||
26 | #include "common.h" | ||
27 | |||
28 | /***************************************************************************** | ||
29 | * KUROBOX-PRO Info | ||
30 | ****************************************************************************/ | ||
31 | |||
32 | /* | ||
33 | * 256K NOR flash Device bus boot chip select | ||
34 | */ | ||
35 | |||
36 | #define KUROBOX_PRO_NOR_BOOT_BASE 0xf4000000 | ||
37 | #define KUROBOX_PRO_NOR_BOOT_SIZE SZ_256K | ||
38 | |||
39 | /* | ||
40 | * 256M NAND flash on Device bus chip select 1 | ||
41 | */ | ||
42 | |||
43 | #define KUROBOX_PRO_NAND_BASE 0xfc000000 | ||
44 | #define KUROBOX_PRO_NAND_SIZE SZ_2M | ||
45 | |||
46 | /***************************************************************************** | ||
47 | * 256MB NAND Flash on Device bus CS0 | ||
48 | ****************************************************************************/ | ||
49 | |||
50 | static struct mtd_partition kurobox_pro_nand_parts[] = { | ||
51 | { | ||
52 | .name = "uImage", | ||
53 | .offset = 0, | ||
54 | .size = SZ_4M, | ||
55 | }, | ||
56 | { | ||
57 | .name = "rootfs", | ||
58 | .offset = SZ_4M, | ||
59 | .size = SZ_64M, | ||
60 | }, | ||
61 | { | ||
62 | .name = "extra", | ||
63 | .offset = SZ_4M + SZ_64M, | ||
64 | .size = SZ_256M - (SZ_4M + SZ_64M), | ||
65 | }, | ||
66 | }; | ||
67 | |||
68 | static struct resource kurobox_pro_nand_resource = { | ||
69 | .flags = IORESOURCE_MEM, | ||
70 | .start = KUROBOX_PRO_NAND_BASE, | ||
71 | .end = KUROBOX_PRO_NAND_BASE + KUROBOX_PRO_NAND_SIZE - 1, | ||
72 | }; | ||
73 | |||
74 | static struct orion_nand_data kurobox_pro_nand_data = { | ||
75 | .parts = kurobox_pro_nand_parts, | ||
76 | .nr_parts = ARRAY_SIZE(kurobox_pro_nand_parts), | ||
77 | .cle = 0, | ||
78 | .ale = 1, | ||
79 | .width = 8, | ||
80 | }; | ||
81 | |||
82 | static struct platform_device kurobox_pro_nand_flash = { | ||
83 | .name = "orion_nand", | ||
84 | .id = -1, | ||
85 | .dev = { | ||
86 | .platform_data = &kurobox_pro_nand_data, | ||
87 | }, | ||
88 | .resource = &kurobox_pro_nand_resource, | ||
89 | .num_resources = 1, | ||
90 | }; | ||
91 | |||
92 | /***************************************************************************** | ||
93 | * 256KB NOR Flash on BOOT Device | ||
94 | ****************************************************************************/ | ||
95 | |||
96 | static struct physmap_flash_data kurobox_pro_nor_flash_data = { | ||
97 | .width = 1, | ||
98 | }; | ||
99 | |||
100 | static struct resource kurobox_pro_nor_flash_resource = { | ||
101 | .flags = IORESOURCE_MEM, | ||
102 | .start = KUROBOX_PRO_NOR_BOOT_BASE, | ||
103 | .end = KUROBOX_PRO_NOR_BOOT_BASE + KUROBOX_PRO_NOR_BOOT_SIZE - 1, | ||
104 | }; | ||
105 | |||
106 | static struct platform_device kurobox_pro_nor_flash = { | ||
107 | .name = "physmap-flash", | ||
108 | .id = 0, | ||
109 | .dev = { | ||
110 | .platform_data = &kurobox_pro_nor_flash_data, | ||
111 | }, | ||
112 | .num_resources = 1, | ||
113 | .resource = &kurobox_pro_nor_flash_resource, | ||
114 | }; | ||
115 | |||
116 | /***************************************************************************** | ||
117 | * PCI | ||
118 | ****************************************************************************/ | ||
119 | |||
120 | static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
121 | { | ||
122 | /* | ||
123 | * PCI isn't used on the Kuro | ||
124 | */ | ||
125 | if (dev->bus->number == orion_pcie_local_bus_nr()) | ||
126 | return IRQ_ORION_PCIE0_INT; | ||
127 | else | ||
128 | printk(KERN_ERR "kurobox_pro_pci_map_irq failed, unknown bus\n"); | ||
129 | |||
130 | return -1; | ||
131 | } | ||
132 | |||
133 | static struct hw_pci kurobox_pro_pci __initdata = { | ||
134 | .nr_controllers = 1, | ||
135 | .swizzle = pci_std_swizzle, | ||
136 | .setup = orion_pci_sys_setup, | ||
137 | .scan = orion_pci_sys_scan_bus, | ||
138 | .map_irq = kurobox_pro_pci_map_irq, | ||
139 | }; | ||
140 | |||
141 | static int __init kurobox_pro_pci_init(void) | ||
142 | { | ||
143 | if (machine_is_kurobox_pro()) | ||
144 | pci_common_init(&kurobox_pro_pci); | ||
145 | |||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | subsys_initcall(kurobox_pro_pci_init); | ||
150 | |||
151 | /***************************************************************************** | ||
152 | * Ethernet | ||
153 | ****************************************************************************/ | ||
154 | |||
155 | static struct mv643xx_eth_platform_data kurobox_pro_eth_data = { | ||
156 | .phy_addr = 8, | ||
157 | .force_phy_addr = 1, | ||
158 | }; | ||
159 | |||
160 | /***************************************************************************** | ||
161 | * RTC 5C372a on I2C bus | ||
162 | ****************************************************************************/ | ||
163 | static struct i2c_board_info __initdata kurobox_pro_i2c_rtc = { | ||
164 | .driver_name = "rtc-rs5c372", | ||
165 | .type = "rs5c372a", | ||
166 | .addr = 0x32, | ||
167 | }; | ||
168 | |||
169 | /***************************************************************************** | ||
170 | * General Setup | ||
171 | ****************************************************************************/ | ||
172 | |||
173 | static struct platform_device *kurobox_pro_devices[] __initdata = { | ||
174 | &kurobox_pro_nor_flash, | ||
175 | &kurobox_pro_nand_flash, | ||
176 | }; | ||
177 | |||
178 | static void __init kurobox_pro_init(void) | ||
179 | { | ||
180 | /* | ||
181 | * Setup basic Orion functions. Need to be called early. | ||
182 | */ | ||
183 | orion_init(); | ||
184 | |||
185 | /* | ||
186 | * Setup the CPU address decode windows for our devices | ||
187 | */ | ||
188 | orion_setup_cpu_win(ORION_DEV_BOOT, KUROBOX_PRO_NOR_BOOT_BASE, | ||
189 | KUROBOX_PRO_NOR_BOOT_SIZE, -1); | ||
190 | orion_setup_cpu_win(ORION_DEV0, KUROBOX_PRO_NAND_BASE, | ||
191 | KUROBOX_PRO_NAND_SIZE, -1); | ||
192 | /* | ||
193 | * Open a special address decode windows for the PCIE WA. | ||
194 | */ | ||
195 | orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); | ||
196 | orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | | ||
197 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); | ||
198 | |||
199 | /* | ||
200 | * Setup Multiplexing Pins -- | ||
201 | * MPP[0-1] Not used | ||
202 | * MPP[2] GPIO Micon | ||
203 | * MPP[3] GPIO RTC | ||
204 | * MPP[4-5] Not used | ||
205 | * MPP[6] Nand Flash REn | ||
206 | * MPP[7] Nand Flash WEn | ||
207 | * MPP[8-11] Not used | ||
208 | * MPP[12] SATA 0 presence Indication | ||
209 | * MPP[13] SATA 1 presence Indication | ||
210 | * MPP[14] SATA 0 active Indication | ||
211 | * MPP[15] SATA 1 active indication | ||
212 | * MPP[16-19] Not used | ||
213 | */ | ||
214 | orion_write(MPP_0_7_CTRL, 0x44220003); | ||
215 | orion_write(MPP_8_15_CTRL, 0x55550000); | ||
216 | orion_write(MPP_16_19_CTRL, 0x0); | ||
217 | |||
218 | orion_gpio_set_valid_pins(0x0000000c); | ||
219 | |||
220 | platform_add_devices(kurobox_pro_devices, ARRAY_SIZE(kurobox_pro_devices)); | ||
221 | i2c_register_board_info(0, &kurobox_pro_i2c_rtc, 1); | ||
222 | orion_eth_init(&kurobox_pro_eth_data); | ||
223 | } | ||
224 | |||
225 | MACHINE_START(KUROBOX_PRO, "Buffalo/Revogear Kurobox Pro") | ||
226 | /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ | ||
227 | .phys_io = ORION_REGS_BASE, | ||
228 | .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, | ||
229 | .boot_params = 0x00000100, | ||
230 | .init_machine = kurobox_pro_init, | ||
231 | .map_io = orion_map_io, | ||
232 | .init_irq = orion_init_irq, | ||
233 | .timer = &orion_timer, | ||
234 | MACHINE_END | ||
diff --git a/arch/arm/mach-orion/pci.c b/arch/arm/mach-orion/pci.c new file mode 100644 index 000000000000..0498d7c69b30 --- /dev/null +++ b/arch/arm/mach-orion/pci.c | |||
@@ -0,0 +1,557 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/pci.c | ||
3 | * | ||
4 | * PCI and PCIE functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/pci.h> | ||
15 | #include <asm/mach/pci.h> | ||
16 | #include "common.h" | ||
17 | |||
18 | /***************************************************************************** | ||
19 | * Orion has one PCIE controller and one PCI controller. | ||
20 | * | ||
21 | * Note1: The local PCIE bus number is '0'. The local PCI bus number | ||
22 | * follows the scanned PCIE bridged busses, if any. | ||
23 | * | ||
24 | * Note2: It is possible for PCI/PCIE agents to access many subsystem's | ||
25 | * space, by configuring BARs and Address Decode Windows, e.g. flashes on | ||
26 | * device bus, Orion registers, etc. However this code only enable the | ||
27 | * access to DDR banks. | ||
28 | ****************************************************************************/ | ||
29 | |||
30 | |||
31 | /***************************************************************************** | ||
32 | * PCIE controller | ||
33 | ****************************************************************************/ | ||
34 | #define PCIE_CTRL ORION_PCIE_REG(0x1a00) | ||
35 | #define PCIE_STAT ORION_PCIE_REG(0x1a04) | ||
36 | #define PCIE_DEV_ID ORION_PCIE_REG(0x0000) | ||
37 | #define PCIE_CMD_STAT ORION_PCIE_REG(0x0004) | ||
38 | #define PCIE_DEV_REV ORION_PCIE_REG(0x0008) | ||
39 | #define PCIE_MASK ORION_PCIE_REG(0x1910) | ||
40 | #define PCIE_CONF_ADDR ORION_PCIE_REG(0x18f8) | ||
41 | #define PCIE_CONF_DATA ORION_PCIE_REG(0x18fc) | ||
42 | |||
43 | /* | ||
44 | * PCIE_STAT bits | ||
45 | */ | ||
46 | #define PCIE_STAT_LINK_DOWN 1 | ||
47 | #define PCIE_STAT_BUS_OFFS 8 | ||
48 | #define PCIE_STAT_BUS_MASK (0xff << PCIE_STAT_BUS_OFFS) | ||
49 | #define PCIE_STAT_DEV_OFFS 20 | ||
50 | #define PCIE_STAT_DEV_MASK (0x1f << PCIE_STAT_DEV_OFFS) | ||
51 | |||
52 | /* | ||
53 | * PCIE_CONF_ADDR bits | ||
54 | */ | ||
55 | #define PCIE_CONF_REG(r) ((((r) & 0xf00) << 24) | ((r) & 0xfc)) | ||
56 | #define PCIE_CONF_FUNC(f) (((f) & 0x3) << 8) | ||
57 | #define PCIE_CONF_DEV(d) (((d) & 0x1f) << 11) | ||
58 | #define PCIE_CONF_BUS(b) (((b) & 0xff) << 16) | ||
59 | #define PCIE_CONF_ADDR_EN (1 << 31) | ||
60 | |||
61 | /* | ||
62 | * PCIE config cycles are done by programming the PCIE_CONF_ADDR register | ||
63 | * and then reading the PCIE_CONF_DATA register. Need to make sure these | ||
64 | * transactions are atomic. | ||
65 | */ | ||
66 | static DEFINE_SPINLOCK(orion_pcie_lock); | ||
67 | |||
68 | void orion_pcie_id(u32 *dev, u32 *rev) | ||
69 | { | ||
70 | *dev = orion_read(PCIE_DEV_ID) >> 16; | ||
71 | *rev = orion_read(PCIE_DEV_REV) & 0xff; | ||
72 | } | ||
73 | |||
74 | u32 orion_pcie_local_bus_nr(void) | ||
75 | { | ||
76 | u32 stat = orion_read(PCIE_STAT); | ||
77 | return((stat & PCIE_STAT_BUS_MASK) >> PCIE_STAT_BUS_OFFS); | ||
78 | } | ||
79 | |||
80 | static u32 orion_pcie_local_dev_nr(void) | ||
81 | { | ||
82 | u32 stat = orion_read(PCIE_STAT); | ||
83 | return((stat & PCIE_STAT_DEV_MASK) >> PCIE_STAT_DEV_OFFS); | ||
84 | } | ||
85 | |||
86 | static u32 orion_pcie_no_link(void) | ||
87 | { | ||
88 | u32 stat = orion_read(PCIE_STAT); | ||
89 | return(stat & PCIE_STAT_LINK_DOWN); | ||
90 | } | ||
91 | |||
92 | static void orion_pcie_set_bus_nr(int nr) | ||
93 | { | ||
94 | orion_clrbits(PCIE_STAT, PCIE_STAT_BUS_MASK); | ||
95 | orion_setbits(PCIE_STAT, nr << PCIE_STAT_BUS_OFFS); | ||
96 | } | ||
97 | |||
98 | static void orion_pcie_master_slave_enable(void) | ||
99 | { | ||
100 | orion_setbits(PCIE_CMD_STAT, PCI_COMMAND_MASTER | | ||
101 | PCI_COMMAND_IO | | ||
102 | PCI_COMMAND_MEMORY); | ||
103 | } | ||
104 | |||
105 | static void orion_pcie_enable_interrupts(void) | ||
106 | { | ||
107 | /* | ||
108 | * Enable interrupts lines | ||
109 | * INTA[24] INTB[25] INTC[26] INTD[27] | ||
110 | */ | ||
111 | orion_setbits(PCIE_MASK, 0xf<<24); | ||
112 | } | ||
113 | |||
114 | static int orion_pcie_valid_config(u32 bus, u32 dev) | ||
115 | { | ||
116 | /* | ||
117 | * Don't go out when trying to access -- | ||
118 | * 1. our own device | ||
119 | * 2. where there's no device connected (no link) | ||
120 | * 3. nonexisting devices on local bus | ||
121 | */ | ||
122 | |||
123 | if ((orion_pcie_local_bus_nr() == bus) && | ||
124 | (orion_pcie_local_dev_nr() == dev)) | ||
125 | return 0; | ||
126 | |||
127 | if (orion_pcie_no_link()) | ||
128 | return 0; | ||
129 | |||
130 | if (bus == orion_pcie_local_bus_nr()) | ||
131 | if (((orion_pcie_local_dev_nr() == 0) && (dev != 1)) || | ||
132 | ((orion_pcie_local_dev_nr() != 0) && (dev != 0))) | ||
133 | return 0; | ||
134 | |||
135 | return 1; | ||
136 | } | ||
137 | |||
138 | static int orion_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, | ||
139 | int size, u32 *val) | ||
140 | { | ||
141 | unsigned long flags; | ||
142 | unsigned int dev, rev, pcie_addr; | ||
143 | |||
144 | if (orion_pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { | ||
145 | *val = 0xffffffff; | ||
146 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
147 | } | ||
148 | |||
149 | spin_lock_irqsave(&orion_pcie_lock, flags); | ||
150 | |||
151 | orion_write(PCIE_CONF_ADDR, PCIE_CONF_BUS(bus->number) | | ||
152 | PCIE_CONF_DEV(PCI_SLOT(devfn)) | | ||
153 | PCIE_CONF_FUNC(PCI_FUNC(devfn)) | | ||
154 | PCIE_CONF_REG(where) | PCIE_CONF_ADDR_EN); | ||
155 | |||
156 | orion_pcie_id(&dev, &rev); | ||
157 | if (dev == MV88F5181_DEV_ID || dev == MV88F5182_DEV_ID) { | ||
158 | /* extended register space */ | ||
159 | pcie_addr = ORION_PCIE_WA_BASE; | ||
160 | pcie_addr |= PCIE_CONF_BUS(bus->number) | | ||
161 | PCIE_CONF_DEV(PCI_SLOT(devfn)) | | ||
162 | PCIE_CONF_FUNC(PCI_FUNC(devfn)) | | ||
163 | PCIE_CONF_REG(where); | ||
164 | *val = orion_read(pcie_addr); | ||
165 | } else | ||
166 | *val = orion_read(PCIE_CONF_DATA); | ||
167 | |||
168 | if (size == 1) | ||
169 | *val = (*val >> (8*(where & 0x3))) & 0xff; | ||
170 | else if (size == 2) | ||
171 | *val = (*val >> (8*(where & 0x3))) & 0xffff; | ||
172 | |||
173 | spin_unlock_irqrestore(&orion_pcie_lock, flags); | ||
174 | |||
175 | return PCIBIOS_SUCCESSFUL; | ||
176 | } | ||
177 | |||
178 | |||
179 | static int orion_pcie_wr_conf(struct pci_bus *bus, u32 devfn, int where, | ||
180 | int size, u32 val) | ||
181 | { | ||
182 | unsigned long flags; | ||
183 | int ret; | ||
184 | |||
185 | if (orion_pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) | ||
186 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
187 | |||
188 | spin_lock_irqsave(&orion_pcie_lock, flags); | ||
189 | |||
190 | ret = PCIBIOS_SUCCESSFUL; | ||
191 | |||
192 | orion_write(PCIE_CONF_ADDR, PCIE_CONF_BUS(bus->number) | | ||
193 | PCIE_CONF_DEV(PCI_SLOT(devfn)) | | ||
194 | PCIE_CONF_FUNC(PCI_FUNC(devfn)) | | ||
195 | PCIE_CONF_REG(where) | PCIE_CONF_ADDR_EN); | ||
196 | |||
197 | if (size == 4) { | ||
198 | __raw_writel(val, PCIE_CONF_DATA); | ||
199 | } else if (size == 2) { | ||
200 | __raw_writew(val, PCIE_CONF_DATA + (where & 0x3)); | ||
201 | } else if (size == 1) { | ||
202 | __raw_writeb(val, PCIE_CONF_DATA + (where & 0x3)); | ||
203 | } else { | ||
204 | ret = PCIBIOS_BAD_REGISTER_NUMBER; | ||
205 | } | ||
206 | |||
207 | spin_unlock_irqrestore(&orion_pcie_lock, flags); | ||
208 | |||
209 | return ret; | ||
210 | } | ||
211 | |||
212 | struct pci_ops orion_pcie_ops = { | ||
213 | .read = orion_pcie_rd_conf, | ||
214 | .write = orion_pcie_wr_conf, | ||
215 | }; | ||
216 | |||
217 | |||
218 | static int orion_pcie_setup(struct pci_sys_data *sys) | ||
219 | { | ||
220 | struct resource *res; | ||
221 | |||
222 | /* | ||
223 | * Master + Slave enable | ||
224 | */ | ||
225 | orion_pcie_master_slave_enable(); | ||
226 | |||
227 | /* | ||
228 | * Enable interrupts lines A-D | ||
229 | */ | ||
230 | orion_pcie_enable_interrupts(); | ||
231 | |||
232 | /* | ||
233 | * Request resource | ||
234 | */ | ||
235 | res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); | ||
236 | if (!res) | ||
237 | panic("orion_pci_setup unable to alloc resources"); | ||
238 | |||
239 | /* | ||
240 | * IORESOURCE_IO | ||
241 | */ | ||
242 | res[0].name = "PCI-EX I/O Space"; | ||
243 | res[0].flags = IORESOURCE_IO; | ||
244 | res[0].start = ORION_PCIE_IO_REMAP; | ||
245 | res[0].end = res[0].start + ORION_PCIE_IO_SIZE - 1; | ||
246 | if (request_resource(&ioport_resource, &res[0])) | ||
247 | panic("Request PCIE IO resource failed\n"); | ||
248 | sys->resource[0] = &res[0]; | ||
249 | |||
250 | /* | ||
251 | * IORESOURCE_MEM | ||
252 | */ | ||
253 | res[1].name = "PCI-EX Memory Space"; | ||
254 | res[1].flags = IORESOURCE_MEM; | ||
255 | res[1].start = ORION_PCIE_MEM_BASE; | ||
256 | res[1].end = res[1].start + ORION_PCIE_MEM_SIZE - 1; | ||
257 | if (request_resource(&iomem_resource, &res[1])) | ||
258 | panic("Request PCIE Memory resource failed\n"); | ||
259 | sys->resource[1] = &res[1]; | ||
260 | |||
261 | sys->resource[2] = NULL; | ||
262 | sys->io_offset = 0; | ||
263 | |||
264 | return 1; | ||
265 | } | ||
266 | |||
267 | /***************************************************************************** | ||
268 | * PCI controller | ||
269 | ****************************************************************************/ | ||
270 | #define PCI_MODE ORION_PCI_REG(0xd00) | ||
271 | #define PCI_CMD ORION_PCI_REG(0xc00) | ||
272 | #define PCI_P2P_CONF ORION_PCI_REG(0x1d14) | ||
273 | #define PCI_CONF_ADDR ORION_PCI_REG(0xc78) | ||
274 | #define PCI_CONF_DATA ORION_PCI_REG(0xc7c) | ||
275 | |||
276 | /* | ||
277 | * PCI_MODE bits | ||
278 | */ | ||
279 | #define PCI_MODE_64BIT (1 << 2) | ||
280 | #define PCI_MODE_PCIX ((1 << 4) | (1 << 5)) | ||
281 | |||
282 | /* | ||
283 | * PCI_CMD bits | ||
284 | */ | ||
285 | #define PCI_CMD_HOST_REORDER (1 << 29) | ||
286 | |||
287 | /* | ||
288 | * PCI_P2P_CONF bits | ||
289 | */ | ||
290 | #define PCI_P2P_BUS_OFFS 16 | ||
291 | #define PCI_P2P_BUS_MASK (0xff << PCI_P2P_BUS_OFFS) | ||
292 | #define PCI_P2P_DEV_OFFS 24 | ||
293 | #define PCI_P2P_DEV_MASK (0x1f << PCI_P2P_DEV_OFFS) | ||
294 | |||
295 | /* | ||
296 | * PCI_CONF_ADDR bits | ||
297 | */ | ||
298 | #define PCI_CONF_REG(reg) ((reg) & 0xfc) | ||
299 | #define PCI_CONF_FUNC(func) (((func) & 0x3) << 8) | ||
300 | #define PCI_CONF_DEV(dev) (((dev) & 0x1f) << 11) | ||
301 | #define PCI_CONF_BUS(bus) (((bus) & 0xff) << 16) | ||
302 | #define PCI_CONF_ADDR_EN (1 << 31) | ||
303 | |||
304 | /* | ||
305 | * Internal configuration space | ||
306 | */ | ||
307 | #define PCI_CONF_FUNC_STAT_CMD 0 | ||
308 | #define PCI_CONF_REG_STAT_CMD 4 | ||
309 | #define PCIX_STAT 0x64 | ||
310 | #define PCIX_STAT_BUS_OFFS 8 | ||
311 | #define PCIX_STAT_BUS_MASK (0xff << PCIX_STAT_BUS_OFFS) | ||
312 | |||
313 | /* | ||
314 | * PCI config cycles are done by programming the PCI_CONF_ADDR register | ||
315 | * and then reading the PCI_CONF_DATA register. Need to make sure these | ||
316 | * transactions are atomic. | ||
317 | */ | ||
318 | static DEFINE_SPINLOCK(orion_pci_lock); | ||
319 | |||
320 | u32 orion_pci_local_bus_nr(void) | ||
321 | { | ||
322 | u32 conf = orion_read(PCI_P2P_CONF); | ||
323 | return((conf & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS); | ||
324 | } | ||
325 | |||
326 | u32 orion_pci_local_dev_nr(void) | ||
327 | { | ||
328 | u32 conf = orion_read(PCI_P2P_CONF); | ||
329 | return((conf & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS); | ||
330 | } | ||
331 | |||
332 | int orion_pci_hw_rd_conf(u32 bus, u32 dev, u32 func, | ||
333 | u32 where, u32 size, u32 *val) | ||
334 | { | ||
335 | unsigned long flags; | ||
336 | spin_lock_irqsave(&orion_pci_lock, flags); | ||
337 | |||
338 | orion_write(PCI_CONF_ADDR, PCI_CONF_BUS(bus) | | ||
339 | PCI_CONF_DEV(dev) | PCI_CONF_REG(where) | | ||
340 | PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN); | ||
341 | |||
342 | *val = orion_read(PCI_CONF_DATA); | ||
343 | |||
344 | if (size == 1) | ||
345 | *val = (*val >> (8*(where & 0x3))) & 0xff; | ||
346 | else if (size == 2) | ||
347 | *val = (*val >> (8*(where & 0x3))) & 0xffff; | ||
348 | |||
349 | spin_unlock_irqrestore(&orion_pci_lock, flags); | ||
350 | |||
351 | return PCIBIOS_SUCCESSFUL; | ||
352 | } | ||
353 | |||
354 | int orion_pci_hw_wr_conf(u32 bus, u32 dev, u32 func, | ||
355 | u32 where, u32 size, u32 val) | ||
356 | { | ||
357 | unsigned long flags; | ||
358 | int ret = PCIBIOS_SUCCESSFUL; | ||
359 | |||
360 | spin_lock_irqsave(&orion_pci_lock, flags); | ||
361 | |||
362 | orion_write(PCI_CONF_ADDR, PCI_CONF_BUS(bus) | | ||
363 | PCI_CONF_DEV(dev) | PCI_CONF_REG(where) | | ||
364 | PCI_CONF_FUNC(func) | PCI_CONF_ADDR_EN); | ||
365 | |||
366 | if (size == 4) { | ||
367 | __raw_writel(val, PCI_CONF_DATA); | ||
368 | } else if (size == 2) { | ||
369 | __raw_writew(val, PCI_CONF_DATA + (where & 0x3)); | ||
370 | } else if (size == 1) { | ||
371 | __raw_writeb(val, PCI_CONF_DATA + (where & 0x3)); | ||
372 | } else { | ||
373 | ret = PCIBIOS_BAD_REGISTER_NUMBER; | ||
374 | } | ||
375 | |||
376 | spin_unlock_irqrestore(&orion_pci_lock, flags); | ||
377 | |||
378 | return ret; | ||
379 | } | ||
380 | |||
381 | static int orion_pci_rd_conf(struct pci_bus *bus, u32 devfn, | ||
382 | int where, int size, u32 *val) | ||
383 | { | ||
384 | /* | ||
385 | * Don't go out for local device | ||
386 | */ | ||
387 | if ((orion_pci_local_bus_nr() == bus->number) && | ||
388 | (orion_pci_local_dev_nr() == PCI_SLOT(devfn))) { | ||
389 | *val = 0xffffffff; | ||
390 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
391 | } | ||
392 | |||
393 | return orion_pci_hw_rd_conf(bus->number, PCI_SLOT(devfn), | ||
394 | PCI_FUNC(devfn), where, size, val); | ||
395 | } | ||
396 | |||
397 | static int orion_pci_wr_conf(struct pci_bus *bus, u32 devfn, | ||
398 | int where, int size, u32 val) | ||
399 | { | ||
400 | /* | ||
401 | * Don't go out for local device | ||
402 | */ | ||
403 | if ((orion_pci_local_bus_nr() == bus->number) && | ||
404 | (orion_pci_local_dev_nr() == PCI_SLOT(devfn))) | ||
405 | return PCIBIOS_DEVICE_NOT_FOUND; | ||
406 | |||
407 | return orion_pci_hw_wr_conf(bus->number, PCI_SLOT(devfn), | ||
408 | PCI_FUNC(devfn), where, size, val); | ||
409 | } | ||
410 | |||
411 | struct pci_ops orion_pci_ops = { | ||
412 | .read = orion_pci_rd_conf, | ||
413 | .write = orion_pci_wr_conf, | ||
414 | }; | ||
415 | |||
416 | static void orion_pci_set_bus_nr(int nr) | ||
417 | { | ||
418 | u32 p2p = orion_read(PCI_P2P_CONF); | ||
419 | |||
420 | if (orion_read(PCI_MODE) & PCI_MODE_PCIX) { | ||
421 | /* | ||
422 | * PCI-X mode | ||
423 | */ | ||
424 | u32 pcix_status, bus, dev; | ||
425 | bus = (p2p & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS; | ||
426 | dev = (p2p & PCI_P2P_DEV_MASK) >> PCI_P2P_DEV_OFFS; | ||
427 | orion_pci_hw_rd_conf(bus, dev, 0, PCIX_STAT, 4, &pcix_status); | ||
428 | pcix_status &= ~PCIX_STAT_BUS_MASK; | ||
429 | pcix_status |= (nr << PCIX_STAT_BUS_OFFS); | ||
430 | orion_pci_hw_wr_conf(bus, dev, 0, PCIX_STAT, 4, pcix_status); | ||
431 | } else { | ||
432 | /* | ||
433 | * PCI Conventional mode | ||
434 | */ | ||
435 | p2p &= ~PCI_P2P_BUS_MASK; | ||
436 | p2p |= (nr << PCI_P2P_BUS_OFFS); | ||
437 | orion_write(PCI_P2P_CONF, p2p); | ||
438 | } | ||
439 | } | ||
440 | |||
441 | static void orion_pci_master_slave_enable(void) | ||
442 | { | ||
443 | u32 bus_nr, dev_nr, func, reg, val; | ||
444 | |||
445 | bus_nr = orion_pci_local_bus_nr(); | ||
446 | dev_nr = orion_pci_local_dev_nr(); | ||
447 | func = PCI_CONF_FUNC_STAT_CMD; | ||
448 | reg = PCI_CONF_REG_STAT_CMD; | ||
449 | orion_pci_hw_rd_conf(bus_nr, dev_nr, func, reg, 4, &val); | ||
450 | val |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); | ||
451 | orion_pci_hw_wr_conf(bus_nr, dev_nr, func, reg, 4, val | 0x7); | ||
452 | } | ||
453 | |||
454 | static int orion_pci_setup(struct pci_sys_data *sys) | ||
455 | { | ||
456 | struct resource *res; | ||
457 | |||
458 | /* | ||
459 | * Master + Slave enable | ||
460 | */ | ||
461 | orion_pci_master_slave_enable(); | ||
462 | |||
463 | /* | ||
464 | * Force ordering | ||
465 | */ | ||
466 | orion_setbits(PCI_CMD, PCI_CMD_HOST_REORDER); | ||
467 | |||
468 | /* | ||
469 | * Request resources | ||
470 | */ | ||
471 | res = kzalloc(sizeof(struct resource) * 2, GFP_KERNEL); | ||
472 | if (!res) | ||
473 | panic("orion_pci_setup unable to alloc resources"); | ||
474 | |||
475 | /* | ||
476 | * IORESOURCE_IO | ||
477 | */ | ||
478 | res[0].name = "PCI I/O Space"; | ||
479 | res[0].flags = IORESOURCE_IO; | ||
480 | res[0].start = ORION_PCI_IO_REMAP; | ||
481 | res[0].end = res[0].start + ORION_PCI_IO_SIZE - 1; | ||
482 | if (request_resource(&ioport_resource, &res[0])) | ||
483 | panic("Request PCI IO resource failed\n"); | ||
484 | sys->resource[0] = &res[0]; | ||
485 | |||
486 | /* | ||
487 | * IORESOURCE_MEM | ||
488 | */ | ||
489 | res[1].name = "PCI Memory Space"; | ||
490 | res[1].flags = IORESOURCE_MEM; | ||
491 | res[1].start = ORION_PCI_MEM_BASE; | ||
492 | res[1].end = res[1].start + ORION_PCI_MEM_SIZE - 1; | ||
493 | if (request_resource(&iomem_resource, &res[1])) | ||
494 | panic("Request PCI Memory resource failed\n"); | ||
495 | sys->resource[1] = &res[1]; | ||
496 | |||
497 | sys->resource[2] = NULL; | ||
498 | sys->io_offset = 0; | ||
499 | |||
500 | return 1; | ||
501 | } | ||
502 | |||
503 | |||
504 | /***************************************************************************** | ||
505 | * General PCIE + PCI | ||
506 | ****************************************************************************/ | ||
507 | int orion_pci_sys_setup(int nr, struct pci_sys_data *sys) | ||
508 | { | ||
509 | int ret = 0; | ||
510 | |||
511 | if (nr == 0) { | ||
512 | /* | ||
513 | * PCIE setup | ||
514 | */ | ||
515 | orion_pcie_set_bus_nr(0); | ||
516 | ret = orion_pcie_setup(sys); | ||
517 | } else if (nr == 1) { | ||
518 | /* | ||
519 | * PCI setup | ||
520 | */ | ||
521 | ret = orion_pci_setup(sys); | ||
522 | } | ||
523 | |||
524 | return ret; | ||
525 | } | ||
526 | |||
527 | struct pci_bus *orion_pci_sys_scan_bus(int nr, struct pci_sys_data *sys) | ||
528 | { | ||
529 | struct pci_ops *ops; | ||
530 | struct pci_bus *bus; | ||
531 | |||
532 | |||
533 | if (nr == 0) { | ||
534 | u32 pci_bus; | ||
535 | /* | ||
536 | * PCIE scan | ||
537 | */ | ||
538 | ops = &orion_pcie_ops; | ||
539 | bus = pci_scan_bus(sys->busnr, ops, sys); | ||
540 | /* | ||
541 | * Set local PCI bus number to follow PCIE bridges (if any) | ||
542 | */ | ||
543 | pci_bus = bus->number + bus->subordinate - bus->secondary + 1; | ||
544 | orion_pci_set_bus_nr(pci_bus); | ||
545 | } else if (nr == 1) { | ||
546 | /* | ||
547 | * PCI scan | ||
548 | */ | ||
549 | ops = &orion_pci_ops; | ||
550 | bus = pci_scan_bus(sys->busnr, ops, sys); | ||
551 | } else { | ||
552 | BUG(); | ||
553 | bus = NULL; | ||
554 | } | ||
555 | |||
556 | return bus; | ||
557 | } | ||
diff --git a/arch/arm/mach-orion/rd88f5182-setup.c b/arch/arm/mach-orion/rd88f5182-setup.c new file mode 100644 index 000000000000..026d74325d01 --- /dev/null +++ b/arch/arm/mach-orion/rd88f5182-setup.c | |||
@@ -0,0 +1,306 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/rd88f5182-setup.c | ||
3 | * | ||
4 | * Marvell Orion-NAS Reference Design Setup | ||
5 | * | ||
6 | * Maintainer: Ronen Shitrit <rshitrit@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/platform_device.h> | ||
16 | #include <linux/pci.h> | ||
17 | #include <linux/irq.h> | ||
18 | #include <linux/mtd/physmap.h> | ||
19 | #include <linux/mv643xx_eth.h> | ||
20 | #include <linux/i2c.h> | ||
21 | #include <asm/mach-types.h> | ||
22 | #include <asm/gpio.h> | ||
23 | #include <asm/leds.h> | ||
24 | #include <asm/mach/arch.h> | ||
25 | #include <asm/mach/pci.h> | ||
26 | #include <asm/arch/orion.h> | ||
27 | #include <asm/arch/platform.h> | ||
28 | #include "common.h" | ||
29 | |||
30 | /***************************************************************************** | ||
31 | * RD-88F5182 Info | ||
32 | ****************************************************************************/ | ||
33 | |||
34 | /* | ||
35 | * 512K NOR flash Device bus boot chip select | ||
36 | */ | ||
37 | |||
38 | #define RD88F5182_NOR_BOOT_BASE 0xf4000000 | ||
39 | #define RD88F5182_NOR_BOOT_SIZE SZ_512K | ||
40 | |||
41 | /* | ||
42 | * 16M NOR flash on Device bus chip select 1 | ||
43 | */ | ||
44 | |||
45 | #define RD88F5182_NOR_BASE 0xfc000000 | ||
46 | #define RD88F5182_NOR_SIZE SZ_16M | ||
47 | |||
48 | /* | ||
49 | * PCI | ||
50 | */ | ||
51 | |||
52 | #define RD88F5182_PCI_SLOT0_OFFS 7 | ||
53 | #define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 | ||
54 | #define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 | ||
55 | |||
56 | /* | ||
57 | * GPIO Debug LED | ||
58 | */ | ||
59 | |||
60 | #define RD88F5182_GPIO_DBG_LED 0 | ||
61 | |||
62 | /***************************************************************************** | ||
63 | * 16M NOR Flash on Device bus CS1 | ||
64 | ****************************************************************************/ | ||
65 | |||
66 | static struct physmap_flash_data rd88f5182_nor_flash_data = { | ||
67 | .width = 1, | ||
68 | }; | ||
69 | |||
70 | static struct resource rd88f5182_nor_flash_resource = { | ||
71 | .flags = IORESOURCE_MEM, | ||
72 | .start = RD88F5182_NOR_BASE, | ||
73 | .end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1, | ||
74 | }; | ||
75 | |||
76 | static struct platform_device rd88f5182_nor_flash = { | ||
77 | .name = "physmap-flash", | ||
78 | .id = 0, | ||
79 | .dev = { | ||
80 | .platform_data = &rd88f5182_nor_flash_data, | ||
81 | }, | ||
82 | .num_resources = 1, | ||
83 | .resource = &rd88f5182_nor_flash_resource, | ||
84 | }; | ||
85 | |||
86 | #ifdef CONFIG_LEDS | ||
87 | |||
88 | /***************************************************************************** | ||
89 | * Use GPIO debug led as CPU active indication | ||
90 | ****************************************************************************/ | ||
91 | |||
92 | static void rd88f5182_dbgled_event(led_event_t evt) | ||
93 | { | ||
94 | int val; | ||
95 | |||
96 | if (evt == led_idle_end) | ||
97 | val = 1; | ||
98 | else if (evt == led_idle_start) | ||
99 | val = 0; | ||
100 | else | ||
101 | return; | ||
102 | |||
103 | gpio_set_value(RD88F5182_GPIO_DBG_LED, val); | ||
104 | } | ||
105 | |||
106 | static int __init rd88f5182_dbgled_init(void) | ||
107 | { | ||
108 | int pin; | ||
109 | |||
110 | if (machine_is_rd88f5182()) { | ||
111 | pin = RD88F5182_GPIO_DBG_LED; | ||
112 | |||
113 | if (gpio_request(pin, "DBGLED") == 0) { | ||
114 | if (gpio_direction_output(pin, 0) != 0) { | ||
115 | printk(KERN_ERR "rd88f5182_dbgled_init failed " | ||
116 | "to set output pin %d\n", pin); | ||
117 | gpio_free(pin); | ||
118 | return 0; | ||
119 | } | ||
120 | } else { | ||
121 | printk(KERN_ERR "rd88f5182_dbgled_init failed " | ||
122 | "to request gpio %d\n", pin); | ||
123 | return 0; | ||
124 | } | ||
125 | |||
126 | leds_event = rd88f5182_dbgled_event; | ||
127 | } | ||
128 | return 0; | ||
129 | } | ||
130 | |||
131 | __initcall(rd88f5182_dbgled_init); | ||
132 | |||
133 | #endif | ||
134 | |||
135 | /***************************************************************************** | ||
136 | * PCI | ||
137 | ****************************************************************************/ | ||
138 | |||
139 | void __init rd88f5182_pci_preinit(void) | ||
140 | { | ||
141 | int pin; | ||
142 | |||
143 | /* | ||
144 | * Configure PCI GPIO IRQ pins | ||
145 | */ | ||
146 | pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; | ||
147 | if (gpio_request(pin, "PCI IntA") == 0) { | ||
148 | if (gpio_direction_input(pin) == 0) { | ||
149 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
150 | } else { | ||
151 | printk(KERN_ERR "rd88f5182_pci_preinit faield to " | ||
152 | "set_irq_type pin %d\n", pin); | ||
153 | gpio_free(pin); | ||
154 | } | ||
155 | } else { | ||
156 | printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); | ||
157 | } | ||
158 | |||
159 | pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; | ||
160 | if (gpio_request(pin, "PCI IntB") == 0) { | ||
161 | if (gpio_direction_input(pin) == 0) { | ||
162 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
163 | } else { | ||
164 | printk(KERN_ERR "rd88f5182_pci_preinit faield to " | ||
165 | "set_irq_type pin %d\n", pin); | ||
166 | gpio_free(pin); | ||
167 | } | ||
168 | } else { | ||
169 | printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin); | ||
170 | } | ||
171 | } | ||
172 | |||
173 | static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
174 | { | ||
175 | /* | ||
176 | * PCI-E isn't used on the RD2 | ||
177 | */ | ||
178 | if (dev->bus->number == orion_pcie_local_bus_nr()) | ||
179 | return IRQ_ORION_PCIE0_INT; | ||
180 | |||
181 | /* | ||
182 | * PCI IRQs are connected via GPIOs | ||
183 | */ | ||
184 | switch (slot - RD88F5182_PCI_SLOT0_OFFS) { | ||
185 | case 0: | ||
186 | if (pin == 1) | ||
187 | return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN); | ||
188 | else | ||
189 | return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN); | ||
190 | default: | ||
191 | return -1; | ||
192 | } | ||
193 | } | ||
194 | |||
195 | static struct hw_pci rd88f5182_pci __initdata = { | ||
196 | .nr_controllers = 2, | ||
197 | .preinit = rd88f5182_pci_preinit, | ||
198 | .swizzle = pci_std_swizzle, | ||
199 | .setup = orion_pci_sys_setup, | ||
200 | .scan = orion_pci_sys_scan_bus, | ||
201 | .map_irq = rd88f5182_pci_map_irq, | ||
202 | }; | ||
203 | |||
204 | static int __init rd88f5182_pci_init(void) | ||
205 | { | ||
206 | if (machine_is_rd88f5182()) | ||
207 | pci_common_init(&rd88f5182_pci); | ||
208 | |||
209 | return 0; | ||
210 | } | ||
211 | |||
212 | subsys_initcall(rd88f5182_pci_init); | ||
213 | |||
214 | /***************************************************************************** | ||
215 | * Ethernet | ||
216 | ****************************************************************************/ | ||
217 | |||
218 | static struct mv643xx_eth_platform_data rd88f5182_eth_data = { | ||
219 | .phy_addr = 8, | ||
220 | .force_phy_addr = 1, | ||
221 | }; | ||
222 | |||
223 | /***************************************************************************** | ||
224 | * RTC DS1338 on I2C bus | ||
225 | ****************************************************************************/ | ||
226 | static struct i2c_board_info __initdata rd88f5182_i2c_rtc = { | ||
227 | .driver_name = "rtc-ds1307", | ||
228 | .type = "ds1338", | ||
229 | .addr = 0x68, | ||
230 | }; | ||
231 | |||
232 | /***************************************************************************** | ||
233 | * General Setup | ||
234 | ****************************************************************************/ | ||
235 | |||
236 | static struct platform_device *rd88f5182_devices[] __initdata = { | ||
237 | &rd88f5182_nor_flash, | ||
238 | }; | ||
239 | |||
240 | static void __init rd88f5182_init(void) | ||
241 | { | ||
242 | /* | ||
243 | * Setup basic Orion functions. Need to be called early. | ||
244 | */ | ||
245 | orion_init(); | ||
246 | |||
247 | /* | ||
248 | * Setup the CPU address decode windows for our devices | ||
249 | */ | ||
250 | orion_setup_cpu_win(ORION_DEV_BOOT, RD88F5182_NOR_BOOT_BASE, | ||
251 | RD88F5182_NOR_BOOT_SIZE, -1); | ||
252 | orion_setup_cpu_win(ORION_DEV1, RD88F5182_NOR_BASE, | ||
253 | RD88F5182_NOR_SIZE, -1); | ||
254 | |||
255 | /* | ||
256 | * Open a special address decode windows for the PCIE WA. | ||
257 | */ | ||
258 | orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); | ||
259 | orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | | ||
260 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); | ||
261 | |||
262 | /* | ||
263 | * Setup Multiplexing Pins -- | ||
264 | * MPP[0] Debug Led (GPIO - Out) | ||
265 | * MPP[1] Debug Led (GPIO - Out) | ||
266 | * MPP[2] N/A | ||
267 | * MPP[3] RTC_Int (GPIO - In) | ||
268 | * MPP[4] GPIO | ||
269 | * MPP[5] GPIO | ||
270 | * MPP[6] PCI_intA (GPIO - In) | ||
271 | * MPP[7] PCI_intB (GPIO - In) | ||
272 | * MPP[8-11] N/A | ||
273 | * MPP[12] SATA 0 presence Indication | ||
274 | * MPP[13] SATA 1 presence Indication | ||
275 | * MPP[14] SATA 0 active Indication | ||
276 | * MPP[15] SATA 1 active indication | ||
277 | * MPP[16-19] Not used | ||
278 | * MPP[20] PCI Clock to MV88F5182 | ||
279 | * MPP[21] PCI Clock to mini PCI CON11 | ||
280 | * MPP[22] USB 0 over current indication | ||
281 | * MPP[23] USB 1 over current indication | ||
282 | * MPP[24] USB 1 over current enable | ||
283 | * MPP[25] USB 0 over current enable | ||
284 | */ | ||
285 | |||
286 | orion_write(MPP_0_7_CTRL, 0x00000003); | ||
287 | orion_write(MPP_8_15_CTRL, 0x55550000); | ||
288 | orion_write(MPP_16_19_CTRL, 0x5555); | ||
289 | |||
290 | orion_gpio_set_valid_pins(0x000000fb); | ||
291 | |||
292 | platform_add_devices(rd88f5182_devices, ARRAY_SIZE(rd88f5182_devices)); | ||
293 | i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1); | ||
294 | orion_eth_init(&rd88f5182_eth_data); | ||
295 | } | ||
296 | |||
297 | MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") | ||
298 | /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ | ||
299 | .phys_io = ORION_REGS_BASE, | ||
300 | .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, | ||
301 | .boot_params = 0x00000100, | ||
302 | .init_machine = rd88f5182_init, | ||
303 | .map_io = orion_map_io, | ||
304 | .init_irq = orion_init_irq, | ||
305 | .timer = &orion_timer, | ||
306 | MACHINE_END | ||
diff --git a/arch/arm/mach-orion/time.c b/arch/arm/mach-orion/time.c new file mode 100644 index 000000000000..bd4262da4f40 --- /dev/null +++ b/arch/arm/mach-orion/time.c | |||
@@ -0,0 +1,181 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion/time.c | ||
3 | * | ||
4 | * Core time functions for Marvell Orion System On Chip | ||
5 | * | ||
6 | * Maintainer: Tzachi Perelstein <tzachi@marvell.com> | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/clockchips.h> | ||
15 | #include <linux/interrupt.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <asm/mach/time.h> | ||
18 | #include <asm/arch/orion.h> | ||
19 | #include "common.h" | ||
20 | |||
21 | /* | ||
22 | * Timer0: clock_event_device, Tick. | ||
23 | * Timer1: clocksource, Free running. | ||
24 | * WatchDog: Not used. | ||
25 | * | ||
26 | * Timers are counting down. | ||
27 | */ | ||
28 | #define CLOCKEVENT 0 | ||
29 | #define CLOCKSOURCE 1 | ||
30 | |||
31 | /* | ||
32 | * Timers bits | ||
33 | */ | ||
34 | #define BRIDGE_INT_TIMER(x) (1 << ((x) + 1)) | ||
35 | #define TIMER_EN(x) (1 << ((x) * 2)) | ||
36 | #define TIMER_RELOAD_EN(x) (1 << (((x) * 2) + 1)) | ||
37 | #define BRIDGE_INT_TIMER_WD (1 << 3) | ||
38 | #define TIMER_WD_EN (1 << 4) | ||
39 | #define TIMER_WD_RELOAD_EN (1 << 5) | ||
40 | |||
41 | static cycle_t orion_clksrc_read(void) | ||
42 | { | ||
43 | return (0xffffffff - orion_read(TIMER_VAL(CLOCKSOURCE))); | ||
44 | } | ||
45 | |||
46 | static struct clocksource orion_clksrc = { | ||
47 | .name = "orion_clocksource", | ||
48 | .shift = 20, | ||
49 | .rating = 300, | ||
50 | .read = orion_clksrc_read, | ||
51 | .mask = CLOCKSOURCE_MASK(32), | ||
52 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
53 | }; | ||
54 | |||
55 | static int | ||
56 | orion_clkevt_next_event(unsigned long delta, struct clock_event_device *dev) | ||
57 | { | ||
58 | unsigned long flags; | ||
59 | |||
60 | if (delta == 0) | ||
61 | return -ETIME; | ||
62 | |||
63 | local_irq_save(flags); | ||
64 | |||
65 | /* | ||
66 | * Clear and enable timer interrupt bit | ||
67 | */ | ||
68 | orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
69 | orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
70 | |||
71 | /* | ||
72 | * Setup new timer value | ||
73 | */ | ||
74 | orion_write(TIMER_VAL(CLOCKEVENT), delta); | ||
75 | |||
76 | /* | ||
77 | * Disable auto reload and kickoff the timer | ||
78 | */ | ||
79 | orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT)); | ||
80 | orion_setbits(TIMER_CTRL, TIMER_EN(CLOCKEVENT)); | ||
81 | |||
82 | local_irq_restore(flags); | ||
83 | |||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | static void | ||
88 | orion_clkevt_mode(enum clock_event_mode mode, struct clock_event_device *dev) | ||
89 | { | ||
90 | unsigned long flags; | ||
91 | |||
92 | local_irq_save(flags); | ||
93 | |||
94 | if (mode == CLOCK_EVT_MODE_PERIODIC) { | ||
95 | /* | ||
96 | * Setup latch cycles in timer and enable reload interrupt. | ||
97 | */ | ||
98 | orion_write(TIMER_VAL_RELOAD(CLOCKEVENT), LATCH); | ||
99 | orion_write(TIMER_VAL(CLOCKEVENT), LATCH); | ||
100 | orion_setbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
101 | orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) | | ||
102 | TIMER_EN(CLOCKEVENT)); | ||
103 | } else { | ||
104 | /* | ||
105 | * Disable timer and interrupt | ||
106 | */ | ||
107 | orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
108 | orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
109 | orion_clrbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKEVENT) | | ||
110 | TIMER_EN(CLOCKEVENT)); | ||
111 | } | ||
112 | |||
113 | local_irq_restore(flags); | ||
114 | } | ||
115 | |||
116 | static struct clock_event_device orion_clkevt = { | ||
117 | .name = "orion_tick", | ||
118 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
119 | .shift = 32, | ||
120 | .rating = 300, | ||
121 | .cpumask = CPU_MASK_CPU0, | ||
122 | .set_next_event = orion_clkevt_next_event, | ||
123 | .set_mode = orion_clkevt_mode, | ||
124 | }; | ||
125 | |||
126 | static irqreturn_t orion_timer_interrupt(int irq, void *dev_id) | ||
127 | { | ||
128 | /* | ||
129 | * Clear cause bit and do event | ||
130 | */ | ||
131 | orion_write(BRIDGE_CAUSE, ~BRIDGE_INT_TIMER(CLOCKEVENT)); | ||
132 | orion_clkevt.event_handler(&orion_clkevt); | ||
133 | return IRQ_HANDLED; | ||
134 | } | ||
135 | |||
136 | static struct irqaction orion_timer_irq = { | ||
137 | .name = "orion_tick", | ||
138 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
139 | .handler = orion_timer_interrupt | ||
140 | }; | ||
141 | |||
142 | static void orion_timer_init(void) | ||
143 | { | ||
144 | /* | ||
145 | * Setup clocksource free running timer (no interrupt on reload) | ||
146 | */ | ||
147 | orion_write(TIMER_VAL(CLOCKSOURCE), 0xffffffff); | ||
148 | orion_write(TIMER_VAL_RELOAD(CLOCKSOURCE), 0xffffffff); | ||
149 | orion_clrbits(BRIDGE_MASK, BRIDGE_INT_TIMER(CLOCKSOURCE)); | ||
150 | orion_setbits(TIMER_CTRL, TIMER_RELOAD_EN(CLOCKSOURCE) | | ||
151 | TIMER_EN(CLOCKSOURCE)); | ||
152 | |||
153 | /* | ||
154 | * Register clocksource | ||
155 | */ | ||
156 | orion_clksrc.mult = | ||
157 | clocksource_hz2mult(CLOCK_TICK_RATE, orion_clksrc.shift); | ||
158 | |||
159 | clocksource_register(&orion_clksrc); | ||
160 | |||
161 | /* | ||
162 | * Connect and enable tick handler | ||
163 | */ | ||
164 | setup_irq(IRQ_ORION_BRIDGE, &orion_timer_irq); | ||
165 | |||
166 | /* | ||
167 | * Register clockevent | ||
168 | */ | ||
169 | orion_clkevt.mult = | ||
170 | div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, orion_clkevt.shift); | ||
171 | orion_clkevt.max_delta_ns = | ||
172 | clockevent_delta2ns(0xfffffffe, &orion_clkevt); | ||
173 | orion_clkevt.min_delta_ns = | ||
174 | clockevent_delta2ns(1, &orion_clkevt); | ||
175 | |||
176 | clockevents_register_device(&orion_clkevt); | ||
177 | } | ||
178 | |||
179 | struct sys_timer orion_timer = { | ||
180 | .init = orion_timer_init, | ||
181 | }; | ||
diff --git a/arch/arm/mach-orion/ts209-setup.c b/arch/arm/mach-orion/ts209-setup.c new file mode 100644 index 000000000000..e3e930efd155 --- /dev/null +++ b/arch/arm/mach-orion/ts209-setup.c | |||
@@ -0,0 +1,335 @@ | |||
1 | /* | ||
2 | * QNAP TS-109/TS-209 Board Setup | ||
3 | * | ||
4 | * Maintainer: Byron Bradley <byron.bbradley@gmail.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/pci.h> | ||
16 | #include <linux/irq.h> | ||
17 | #include <linux/mtd/physmap.h> | ||
18 | #include <linux/mtd/nand.h> | ||
19 | #include <linux/mv643xx_eth.h> | ||
20 | #include <linux/gpio_keys.h> | ||
21 | #include <linux/input.h> | ||
22 | #include <linux/i2c.h> | ||
23 | #include <linux/serial_reg.h> | ||
24 | #include <asm/mach-types.h> | ||
25 | #include <asm/gpio.h> | ||
26 | #include <asm/mach/arch.h> | ||
27 | #include <asm/mach/pci.h> | ||
28 | #include <asm/arch/orion.h> | ||
29 | #include <asm/arch/platform.h> | ||
30 | #include "common.h" | ||
31 | |||
32 | #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000 | ||
33 | #define QNAP_TS209_NOR_BOOT_SIZE SZ_8M | ||
34 | |||
35 | /**************************************************************************** | ||
36 | * 8MiB NOR flash. The struct mtd_partition is not in the same order as the | ||
37 | * partitions on the device because we want to keep compatability with | ||
38 | * existing QNAP firmware. | ||
39 | * | ||
40 | * Layout as used by QNAP: | ||
41 | * [2] 0x00000000-0x00200000 : "Kernel" | ||
42 | * [3] 0x00200000-0x00600000 : "RootFS1" | ||
43 | * [4] 0x00600000-0x00700000 : "RootFS2" | ||
44 | * [6] 0x00700000-0x00760000 : "NAS Config" (read-only) | ||
45 | * [5] 0x00760000-0x00780000 : "U-Boot Config" | ||
46 | * [1] 0x00780000-0x00800000 : "U-Boot" (read-only) | ||
47 | ***************************************************************************/ | ||
48 | static struct mtd_partition qnap_ts209_partitions[] = { | ||
49 | { | ||
50 | .name = "U-Boot", | ||
51 | .size = 0x00080000, | ||
52 | .offset = 0x00780000, | ||
53 | .mask_flags = MTD_WRITEABLE, | ||
54 | }, { | ||
55 | .name = "Kernel", | ||
56 | .size = 0x00200000, | ||
57 | .offset = 0, | ||
58 | }, { | ||
59 | .name = "RootFS1", | ||
60 | .size = 0x00400000, | ||
61 | .offset = 0x00200000, | ||
62 | }, { | ||
63 | .name = "RootFS2", | ||
64 | .size = 0x00100000, | ||
65 | .offset = 0x00600000, | ||
66 | }, { | ||
67 | .name = "U-Boot Config", | ||
68 | .size = 0x00020000, | ||
69 | .offset = 0x00760000, | ||
70 | }, { | ||
71 | .name = "NAS Config", | ||
72 | .size = 0x00060000, | ||
73 | .offset = 0x00700000, | ||
74 | .mask_flags = MTD_WRITEABLE, | ||
75 | } | ||
76 | }; | ||
77 | |||
78 | static struct physmap_flash_data qnap_ts209_nor_flash_data = { | ||
79 | .width = 1, | ||
80 | .parts = qnap_ts209_partitions, | ||
81 | .nr_parts = ARRAY_SIZE(qnap_ts209_partitions) | ||
82 | }; | ||
83 | |||
84 | static struct resource qnap_ts209_nor_flash_resource = { | ||
85 | .flags = IORESOURCE_MEM, | ||
86 | .start = QNAP_TS209_NOR_BOOT_BASE, | ||
87 | .end = QNAP_TS209_NOR_BOOT_BASE + QNAP_TS209_NOR_BOOT_SIZE - 1, | ||
88 | }; | ||
89 | |||
90 | static struct platform_device qnap_ts209_nor_flash = { | ||
91 | .name = "physmap-flash", | ||
92 | .id = 0, | ||
93 | .dev = { .platform_data = &qnap_ts209_nor_flash_data, }, | ||
94 | .resource = &qnap_ts209_nor_flash_resource, | ||
95 | .num_resources = 1, | ||
96 | }; | ||
97 | |||
98 | /***************************************************************************** | ||
99 | * PCI | ||
100 | ****************************************************************************/ | ||
101 | |||
102 | #define QNAP_TS209_PCI_SLOT0_OFFS 7 | ||
103 | #define QNAP_TS209_PCI_SLOT0_IRQ_PIN 6 | ||
104 | #define QNAP_TS209_PCI_SLOT1_IRQ_PIN 7 | ||
105 | |||
106 | void __init qnap_ts209_pci_preinit(void) | ||
107 | { | ||
108 | int pin; | ||
109 | |||
110 | /* | ||
111 | * Configure PCI GPIO IRQ pins | ||
112 | */ | ||
113 | pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; | ||
114 | if (gpio_request(pin, "PCI Int1") == 0) { | ||
115 | if (gpio_direction_input(pin) == 0) { | ||
116 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
117 | } else { | ||
118 | printk(KERN_ERR "qnap_ts209_pci_preinit failed to " | ||
119 | "set_irq_type pin %d\n", pin); | ||
120 | gpio_free(pin); | ||
121 | } | ||
122 | } else { | ||
123 | printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request " | ||
124 | "%d\n", pin); | ||
125 | } | ||
126 | |||
127 | pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; | ||
128 | if (gpio_request(pin, "PCI Int2") == 0) { | ||
129 | if (gpio_direction_input(pin) == 0) { | ||
130 | set_irq_type(gpio_to_irq(pin), IRQT_LOW); | ||
131 | } else { | ||
132 | printk(KERN_ERR "qnap_ts209_pci_preinit failed " | ||
133 | "to set_irq_type pin %d\n", pin); | ||
134 | gpio_free(pin); | ||
135 | } | ||
136 | } else { | ||
137 | printk(KERN_ERR "qnap_ts209_pci_preinit failed to gpio_request " | ||
138 | "%d\n", pin); | ||
139 | } | ||
140 | } | ||
141 | |||
142 | static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | ||
143 | { | ||
144 | /* | ||
145 | * PCIE IRQ is connected internally (not GPIO) | ||
146 | */ | ||
147 | if (dev->bus->number == orion_pcie_local_bus_nr()) | ||
148 | return IRQ_ORION_PCIE0_INT; | ||
149 | |||
150 | /* | ||
151 | * PCI IRQs are connected via GPIOs | ||
152 | */ | ||
153 | switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) { | ||
154 | case 0: | ||
155 | return gpio_to_irq(QNAP_TS209_PCI_SLOT0_IRQ_PIN); | ||
156 | case 1: | ||
157 | return gpio_to_irq(QNAP_TS209_PCI_SLOT1_IRQ_PIN); | ||
158 | default: | ||
159 | return -1; | ||
160 | } | ||
161 | } | ||
162 | |||
163 | static struct hw_pci qnap_ts209_pci __initdata = { | ||
164 | .nr_controllers = 2, | ||
165 | .preinit = qnap_ts209_pci_preinit, | ||
166 | .swizzle = pci_std_swizzle, | ||
167 | .setup = orion_pci_sys_setup, | ||
168 | .scan = orion_pci_sys_scan_bus, | ||
169 | .map_irq = qnap_ts209_pci_map_irq, | ||
170 | }; | ||
171 | |||
172 | static int __init qnap_ts209_pci_init(void) | ||
173 | { | ||
174 | if (machine_is_ts_x09()) | ||
175 | pci_common_init(&qnap_ts209_pci); | ||
176 | |||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | subsys_initcall(qnap_ts209_pci_init); | ||
181 | |||
182 | /***************************************************************************** | ||
183 | * Ethernet | ||
184 | ****************************************************************************/ | ||
185 | |||
186 | static struct mv643xx_eth_platform_data qnap_ts209_eth_data = { | ||
187 | .phy_addr = 8, | ||
188 | .force_phy_addr = 1, | ||
189 | }; | ||
190 | |||
191 | /***************************************************************************** | ||
192 | * RTC S35390A on I2C bus | ||
193 | ****************************************************************************/ | ||
194 | static struct i2c_board_info __initdata qnap_ts209_i2c_rtc = { | ||
195 | .driver_name = "rtc-s35390a", | ||
196 | .addr = 0x30, | ||
197 | }; | ||
198 | |||
199 | /**************************************************************************** | ||
200 | * GPIO Attached Keys | ||
201 | * Power button is attached to the PIC microcontroller | ||
202 | ****************************************************************************/ | ||
203 | |||
204 | #define QNAP_TS209_GPIO_KEY_MEDIA 1 | ||
205 | #define QNAP_TS209_GPIO_KEY_RESET 2 | ||
206 | |||
207 | static struct gpio_keys_button qnap_ts209_buttons[] = { | ||
208 | { | ||
209 | .code = KEY_RESTART, | ||
210 | .gpio = QNAP_TS209_GPIO_KEY_MEDIA, | ||
211 | .desc = "USB Copy Button", | ||
212 | .active_low = 1, | ||
213 | }, | ||
214 | { | ||
215 | .code = KEY_POWER, | ||
216 | .gpio = QNAP_TS209_GPIO_KEY_RESET, | ||
217 | .desc = "Reset Button", | ||
218 | .active_low = 1, | ||
219 | } | ||
220 | }; | ||
221 | |||
222 | static struct gpio_keys_platform_data qnap_ts209_button_data = { | ||
223 | .buttons = qnap_ts209_buttons, | ||
224 | .nbuttons = ARRAY_SIZE(qnap_ts209_buttons), | ||
225 | }; | ||
226 | |||
227 | static struct platform_device qnap_ts209_button_device = { | ||
228 | .name = "gpio-keys", | ||
229 | .id = -1, | ||
230 | .num_resources = 0, | ||
231 | .dev = { .platform_data = &qnap_ts209_button_data, }, | ||
232 | }; | ||
233 | |||
234 | /***************************************************************************** | ||
235 | * General Setup | ||
236 | ****************************************************************************/ | ||
237 | |||
238 | static struct platform_device *qnap_ts209_devices[] __initdata = { | ||
239 | &qnap_ts209_nor_flash, | ||
240 | &qnap_ts209_button_device, | ||
241 | }; | ||
242 | |||
243 | /* | ||
244 | * QNAP TS-[12]09 specific power off method via UART1-attached PIC | ||
245 | */ | ||
246 | |||
247 | #define UART1_REG(x) (UART1_BASE + ((UART_##x) << 2)) | ||
248 | |||
249 | static void qnap_ts209_power_off(void) | ||
250 | { | ||
251 | /* 19200 baud divisor */ | ||
252 | const unsigned divisor = ((ORION_TCLK + (8 * 19200)) / (16 * 19200)); | ||
253 | |||
254 | pr_info("%s: triggering power-off...\n", __func__); | ||
255 | |||
256 | /* hijack uart1 and reset into sane state (19200,8n1) */ | ||
257 | orion_write(UART1_REG(LCR), 0x83); | ||
258 | orion_write(UART1_REG(DLL), divisor & 0xff); | ||
259 | orion_write(UART1_REG(DLM), (divisor >> 8) & 0xff); | ||
260 | orion_write(UART1_REG(LCR), 0x03); | ||
261 | orion_write(UART1_REG(IER), 0x00); | ||
262 | orion_write(UART1_REG(FCR), 0x00); | ||
263 | orion_write(UART1_REG(MCR), 0x00); | ||
264 | |||
265 | /* send the power-off command 'A' to PIC */ | ||
266 | orion_write(UART1_REG(TX), 'A'); | ||
267 | } | ||
268 | |||
269 | static void __init qnap_ts209_init(void) | ||
270 | { | ||
271 | /* | ||
272 | * Setup basic Orion functions. Need to be called early. | ||
273 | */ | ||
274 | orion_init(); | ||
275 | |||
276 | /* | ||
277 | * Setup flash mapping | ||
278 | */ | ||
279 | orion_setup_cpu_win(ORION_DEV_BOOT, QNAP_TS209_NOR_BOOT_BASE, | ||
280 | QNAP_TS209_NOR_BOOT_SIZE, -1); | ||
281 | |||
282 | /* | ||
283 | * Open a special address decode windows for the PCIE WA. | ||
284 | */ | ||
285 | orion_write(ORION_REGS_BASE | 0x20074, ORION_PCIE_WA_BASE); | ||
286 | orion_write(ORION_REGS_BASE | 0x20070, (0x7941 | | ||
287 | (((ORION_PCIE_WA_SIZE >> 16) - 1)) << 16)); | ||
288 | |||
289 | /* | ||
290 | * Setup Multiplexing Pins -- | ||
291 | * MPP[0] Reserved | ||
292 | * MPP[1] USB copy button (0 active) | ||
293 | * MPP[2] Load defaults button (0 active) | ||
294 | * MPP[3] GPIO RTC | ||
295 | * MPP[4-5] Reserved | ||
296 | * MPP[6] PCI Int A | ||
297 | * MPP[7] PCI Int B | ||
298 | * MPP[8-11] Reserved | ||
299 | * MPP[12] SATA 0 presence | ||
300 | * MPP[13] SATA 1 presence | ||
301 | * MPP[14] SATA 0 active | ||
302 | * MPP[15] SATA 1 active | ||
303 | * MPP[16] UART1 RXD | ||
304 | * MPP[17] UART1 TXD | ||
305 | * MPP[18] SW_RST (0 active) | ||
306 | * MPP[19] Reserved | ||
307 | * MPP[20] PCI clock 0 | ||
308 | * MPP[21] PCI clock 1 | ||
309 | * MPP[22] USB 0 over current | ||
310 | * MPP[23-25] Reserved | ||
311 | */ | ||
312 | orion_write(MPP_0_7_CTRL, 0x3); | ||
313 | orion_write(MPP_8_15_CTRL, 0x55550000); | ||
314 | orion_write(MPP_16_19_CTRL, 0x5500); | ||
315 | orion_gpio_set_valid_pins(0x3cc0fff); | ||
316 | |||
317 | /* register ts209 specific power-off method */ | ||
318 | pm_power_off = qnap_ts209_power_off; | ||
319 | |||
320 | platform_add_devices(qnap_ts209_devices, | ||
321 | ARRAY_SIZE(qnap_ts209_devices)); | ||
322 | i2c_register_board_info(0, &qnap_ts209_i2c_rtc, 1); | ||
323 | orion_eth_init(&qnap_ts209_eth_data); | ||
324 | } | ||
325 | |||
326 | MACHINE_START(TS209, "QNAP TS-109/TS-209") | ||
327 | /* Maintainer: Byron Bradley <byron.bbradley@gmail.com> */ | ||
328 | .phys_io = ORION_REGS_BASE, | ||
329 | .io_pg_offst = ((ORION_REGS_BASE) >> 18) & 0xFFFC, | ||
330 | .boot_params = 0x00000100, | ||
331 | .init_machine = qnap_ts209_init, | ||
332 | .map_io = orion_map_io, | ||
333 | .init_irq = orion_init_irq, | ||
334 | .timer = &orion_timer, | ||
335 | MACHINE_END | ||
diff --git a/arch/arm/mach-pnx4008/time.c b/arch/arm/mach-pnx4008/time.c index 67e05f005a6b..6d4ca8fc0cb4 100644 --- a/arch/arm/mach-pnx4008/time.c +++ b/arch/arm/mach-pnx4008/time.c | |||
@@ -51,8 +51,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id) | |||
51 | { | 51 | { |
52 | if (__raw_readl(HSTIM_INT) & MATCH0_INT) { | 52 | if (__raw_readl(HSTIM_INT) & MATCH0_INT) { |
53 | 53 | ||
54 | write_seqlock(&xtime_lock); | ||
55 | |||
56 | do { | 54 | do { |
57 | timer_tick(); | 55 | timer_tick(); |
58 | 56 | ||
@@ -73,8 +71,6 @@ static irqreturn_t pnx4008_timer_interrupt(int irq, void *dev_id) | |||
73 | } while ((signed) | 71 | } while ((signed) |
74 | (__raw_readl(HSTIM_MATCH0) - | 72 | (__raw_readl(HSTIM_MATCH0) - |
75 | __raw_readl(HSTIM_COUNTER)) < 0); | 73 | __raw_readl(HSTIM_COUNTER)) < 0); |
76 | |||
77 | write_sequnlock(&xtime_lock); | ||
78 | } | 74 | } |
79 | 75 | ||
80 | return IRQ_HANDLED; | 76 | return IRQ_HANDLED; |
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index 656d49661a29..0908bea0f609 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -51,6 +51,50 @@ config PXA_SHARPSL | |||
51 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) | 51 | SL-C3000 (Spitz), SL-C3100 (Borzoi) or SL-C6000x (Tosa) |
52 | handheld computer. | 52 | handheld computer. |
53 | 53 | ||
54 | config ARCH_PXA_ESERIES | ||
55 | bool "PXA based Toshiba e-series PDAs" | ||
56 | select PXA25x | ||
57 | |||
58 | config MACH_E330 | ||
59 | bool "Toshiba e330" | ||
60 | default y | ||
61 | depends on ARCH_PXA_ESERIES | ||
62 | help | ||
63 | Say Y here if you intend to run this kernel on a Toshiba | ||
64 | e330 family PDA. | ||
65 | |||
66 | config MACH_E740 | ||
67 | bool "Toshiba e740" | ||
68 | default y | ||
69 | depends on ARCH_PXA_ESERIES | ||
70 | help | ||
71 | Say Y here if you intend to run this kernel on a Toshiba | ||
72 | e740 family PDA. | ||
73 | |||
74 | config MACH_E750 | ||
75 | bool "Toshiba e750" | ||
76 | default y | ||
77 | depends on ARCH_PXA_ESERIES | ||
78 | help | ||
79 | Say Y here if you intend to run this kernel on a Toshiba | ||
80 | e750 family PDA. | ||
81 | |||
82 | config MACH_E400 | ||
83 | bool "Toshiba e400" | ||
84 | default y | ||
85 | depends on ARCH_PXA_ESERIES | ||
86 | help | ||
87 | Say Y here if you intend to run this kernel on a Toshiba | ||
88 | e400 family PDA. | ||
89 | |||
90 | config MACH_E800 | ||
91 | bool "Toshiba e800" | ||
92 | default y | ||
93 | depends on ARCH_PXA_ESERIES | ||
94 | help | ||
95 | Say Y here if you intend to run this kernel on a Toshiba | ||
96 | e800 family PDA. | ||
97 | |||
54 | config MACH_TRIZEPS4 | 98 | config MACH_TRIZEPS4 |
55 | bool "Keith und Koep Trizeps4 DIMM-Module" | 99 | bool "Keith und Koep Trizeps4 DIMM-Module" |
56 | select PXA27x | 100 | select PXA27x |
@@ -59,15 +103,44 @@ config MACH_EM_X270 | |||
59 | bool "CompuLab EM-x270 platform" | 103 | bool "CompuLab EM-x270 platform" |
60 | select PXA27x | 104 | select PXA27x |
61 | 105 | ||
106 | config MACH_COLIBRI | ||
107 | bool "Toradex Colibri PX27x" | ||
108 | select PXA27x | ||
109 | |||
62 | config MACH_ZYLONITE | 110 | config MACH_ZYLONITE |
63 | bool "PXA3xx Development Platform" | 111 | bool "PXA3xx Development Platform" |
64 | select PXA3xx | 112 | select PXA3xx |
65 | 113 | ||
114 | config MACH_LITTLETON | ||
115 | bool "PXA3xx Form Factor Platform (aka Littleton)" | ||
116 | select PXA3xx | ||
117 | select PXA_SSP | ||
118 | |||
66 | config MACH_ARMCORE | 119 | config MACH_ARMCORE |
67 | bool "CompuLab CM-X270 modules" | 120 | bool "CompuLab CM-X270 modules" |
68 | select PXA27x | 121 | select PXA27x |
69 | select IWMMXT | 122 | select IWMMXT |
70 | 123 | ||
124 | config MACH_MAGICIAN | ||
125 | bool "Enable HTC Magician Support" | ||
126 | depends on ARCH_PXA | ||
127 | select PXA27x | ||
128 | select IWMMXT | ||
129 | |||
130 | config MACH_PCM027 | ||
131 | bool "Phytec phyCORE-PXA270 CPU module (PCM-027)" | ||
132 | select PXA27x | ||
133 | select IWMMXT | ||
134 | |||
135 | endchoice | ||
136 | |||
137 | choice | ||
138 | prompt "Used baseboard" | ||
139 | depends on MACH_PCM027 | ||
140 | |||
141 | config MACH_PCM990_BASEBOARD | ||
142 | bool "PHYTEC PCM-990 development board" | ||
143 | |||
71 | endchoice | 144 | endchoice |
72 | 145 | ||
73 | if PXA_SHARPSL | 146 | if PXA_SHARPSL |
diff --git a/arch/arm/mach-pxa/Makefile b/arch/arm/mach-pxa/Makefile index 4263527e5123..b5c916c0747d 100644 --- a/arch/arm/mach-pxa/Makefile +++ b/arch/arm/mach-pxa/Makefile | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | # Common support (must be linked before board specific support) | 5 | # Common support (must be linked before board specific support) |
6 | obj-y += clock.o generic.o irq.o dma.o time.o | 6 | obj-y += clock.o devices.o generic.o irq.o dma.o time.o |
7 | obj-$(CONFIG_PXA25x) += pxa25x.o | 7 | obj-$(CONFIG_PXA25x) += pxa25x.o |
8 | obj-$(CONFIG_PXA27x) += pxa27x.o | 8 | obj-$(CONFIG_PXA27x) += pxa27x.o |
9 | obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o | 9 | obj-$(CONFIG_PXA3xx) += pxa3xx.o mfp.o |
@@ -16,18 +16,24 @@ obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o | |||
16 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o | 16 | obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o |
17 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o | 17 | obj-$(CONFIG_ARCH_PXA_IDP) += idp.o |
18 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o | 18 | obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o |
19 | obj-$(CONFIG_MACH_COLIBRI) += colibri.o | ||
19 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o | 20 | obj-$(CONFIG_PXA_SHARP_C7xx) += corgi.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o corgi_pm.o |
20 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o | 21 | obj-$(CONFIG_PXA_SHARP_Cxx00) += spitz.o corgi_ssp.o corgi_lcd.o sharpsl_pm.o spitz_pm.o |
21 | obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o | 22 | obj-$(CONFIG_MACH_AKITA) += akita-ioexp.o |
22 | obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o | 23 | obj-$(CONFIG_MACH_POODLE) += poodle.o corgi_ssp.o |
24 | obj-$(CONFIG_MACH_PCM027) += pcm027.o | ||
25 | obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o | ||
23 | obj-$(CONFIG_MACH_TOSA) += tosa.o | 26 | obj-$(CONFIG_MACH_TOSA) += tosa.o |
24 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o | 27 | obj-$(CONFIG_MACH_EM_X270) += em-x270.o |
28 | obj-$(CONFIG_MACH_MAGICIAN) += magician.o | ||
29 | obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o | ||
25 | 30 | ||
26 | ifeq ($(CONFIG_MACH_ZYLONITE),y) | 31 | ifeq ($(CONFIG_MACH_ZYLONITE),y) |
27 | obj-y += zylonite.o | 32 | obj-y += zylonite.o |
28 | obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o | 33 | obj-$(CONFIG_CPU_PXA300) += zylonite_pxa300.o |
29 | obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o | 34 | obj-$(CONFIG_CPU_PXA320) += zylonite_pxa320.o |
30 | endif | 35 | endif |
36 | obj-$(CONFIG_MACH_LITTLETON) += littleton.o | ||
31 | 37 | ||
32 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o | 38 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270.o |
33 | 39 | ||
@@ -41,13 +47,10 @@ led-$(CONFIG_MACH_TRIZEPS4) += leds-trizeps4.o | |||
41 | obj-$(CONFIG_LEDS) += $(led-y) | 47 | obj-$(CONFIG_LEDS) += $(led-y) |
42 | 48 | ||
43 | # Misc features | 49 | # Misc features |
44 | obj-$(CONFIG_PM) += pm.o sleep.o | 50 | obj-$(CONFIG_PM) += pm.o sleep.o standby.o |
51 | obj-$(CONFIG_CPU_FREQ) += cpu-pxa.o | ||
45 | obj-$(CONFIG_PXA_SSP) += ssp.o | 52 | obj-$(CONFIG_PXA_SSP) += ssp.o |
46 | 53 | ||
47 | ifeq ($(CONFIG_PXA27x),y) | ||
48 | obj-$(CONFIG_PM) += standby.o | ||
49 | endif | ||
50 | |||
51 | ifeq ($(CONFIG_PCI),y) | 54 | ifeq ($(CONFIG_PCI),y) |
52 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o | 55 | obj-$(CONFIG_MACH_ARMCORE) += cm-x270-pci.o |
53 | endif | 56 | endif |
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c index a16349272f54..28cfd71c032d 100644 --- a/arch/arm/mach-pxa/cm-x270.c +++ b/arch/arm/mach-pxa/cm-x270.c | |||
@@ -487,18 +487,15 @@ static int cmx270_mci_init(struct device *dev, | |||
487 | 487 | ||
488 | /* card detect IRQ on GPIO 83 */ | 488 | /* card detect IRQ on GPIO 83 */ |
489 | pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ)); | 489 | pxa_gpio_mode(IRQ_TO_GPIO(CMX270_MMC_IRQ)); |
490 | set_irq_type(CMX270_MMC_IRQ, IRQT_FALLING); | ||
491 | 490 | ||
492 | err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int, | 491 | err = request_irq(CMX270_MMC_IRQ, cmx270_detect_int, |
493 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, | 492 | IRQF_DISABLED | IRQF_TRIGGER_FALLING, |
494 | "MMC card detect", data); | 493 | "MMC card detect", data); |
495 | if (err) { | 494 | if (err) |
496 | printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't" | 495 | printk(KERN_ERR "cmx270_mci_init: MMC/SD: can't" |
497 | " request MMC card detect IRQ\n"); | 496 | " request MMC card detect IRQ\n"); |
498 | return -1; | ||
499 | } | ||
500 | 497 | ||
501 | return 0; | 498 | return err; |
502 | } | 499 | } |
503 | 500 | ||
504 | static void cmx270_mci_setpower(struct device *dev, unsigned int vdd) | 501 | static void cmx270_mci_setpower(struct device *dev, unsigned int vdd) |
diff --git a/arch/arm/mach-pxa/colibri.c b/arch/arm/mach-pxa/colibri.c new file mode 100644 index 000000000000..6db54e31c397 --- /dev/null +++ b/arch/arm/mach-pxa/colibri.c | |||
@@ -0,0 +1,134 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/colibri.c | ||
3 | * | ||
4 | * Support for Toradex PXA27x based Colibri module | ||
5 | * Daniel Mack <daniel@caiaq.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/sysdev.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/bitops.h> | ||
18 | #include <linux/ioport.h> | ||
19 | #include <linux/delay.h> | ||
20 | #include <linux/mtd/mtd.h> | ||
21 | #include <linux/mtd/partitions.h> | ||
22 | #include <linux/mtd/physmap.h> | ||
23 | #include <asm/mach-types.h> | ||
24 | #include <asm/hardware.h> | ||
25 | #include <asm/irq.h> | ||
26 | #include <asm/sizes.h> | ||
27 | #include <asm/mach/arch.h> | ||
28 | #include <asm/mach/map.h> | ||
29 | #include <asm/mach/irq.h> | ||
30 | #include <asm/mach/flash.h> | ||
31 | #include <asm/arch/pxa-regs.h> | ||
32 | #include <asm/arch/colibri.h> | ||
33 | |||
34 | #include "generic.h" | ||
35 | #include "devices.h" | ||
36 | |||
37 | /* | ||
38 | * Flash | ||
39 | */ | ||
40 | static struct mtd_partition colibri_partitions[] = { | ||
41 | { | ||
42 | .name = "Bootloader", | ||
43 | .offset = 0x00000000, | ||
44 | .size = 0x00040000, | ||
45 | .mask_flags = MTD_WRITEABLE /* force read-only */ | ||
46 | }, { | ||
47 | .name = "Kernel", | ||
48 | .offset = 0x00040000, | ||
49 | .size = 0x00400000, | ||
50 | .mask_flags = 0 | ||
51 | }, { | ||
52 | .name = "Rootfs", | ||
53 | .offset = 0x00440000, | ||
54 | .size = MTDPART_SIZ_FULL, | ||
55 | .mask_flags = 0 | ||
56 | } | ||
57 | }; | ||
58 | |||
59 | static struct physmap_flash_data colibri_flash_data[] = { | ||
60 | { | ||
61 | .width = 4, /* bankwidth in bytes */ | ||
62 | .parts = colibri_partitions, | ||
63 | .nr_parts = ARRAY_SIZE(colibri_partitions) | ||
64 | } | ||
65 | }; | ||
66 | |||
67 | static struct resource flash_resource = { | ||
68 | .start = PXA_CS0_PHYS, | ||
69 | .end = PXA_CS0_PHYS + SZ_32M - 1, | ||
70 | .flags = IORESOURCE_MEM, | ||
71 | }; | ||
72 | |||
73 | static struct platform_device flash_device = { | ||
74 | .name = "physmap-flash", | ||
75 | .id = 0, | ||
76 | .dev = { | ||
77 | .platform_data = colibri_flash_data, | ||
78 | }, | ||
79 | .resource = &flash_resource, | ||
80 | .num_resources = 1, | ||
81 | }; | ||
82 | |||
83 | /* | ||
84 | * DM9000 Ethernet | ||
85 | */ | ||
86 | static struct resource dm9000_resources[] = { | ||
87 | [0] = { | ||
88 | .start = COLIBRI_ETH_PHYS, | ||
89 | .end = COLIBRI_ETH_PHYS + 3, | ||
90 | .flags = IORESOURCE_MEM, | ||
91 | }, | ||
92 | [1] = { | ||
93 | .start = COLIBRI_ETH_PHYS + 4, | ||
94 | .end = COLIBRI_ETH_PHYS + 4 + 500, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | [2] = { | ||
98 | .start = COLIBRI_ETH_IRQ, | ||
99 | .end = COLIBRI_ETH_IRQ, | ||
100 | .flags = IORESOURCE_IRQ, | ||
101 | }, | ||
102 | }; | ||
103 | |||
104 | static struct platform_device dm9000_device = { | ||
105 | .name = "dm9000", | ||
106 | .id = -1, | ||
107 | .num_resources = ARRAY_SIZE(dm9000_resources), | ||
108 | .resource = dm9000_resources, | ||
109 | }; | ||
110 | |||
111 | static struct platform_device *colibri_devices[] __initdata = { | ||
112 | &flash_device, | ||
113 | &dm9000_device, | ||
114 | }; | ||
115 | |||
116 | static void __init colibri_init(void) | ||
117 | { | ||
118 | /* DM9000 LAN */ | ||
119 | pxa_gpio_mode(GPIO78_nCS_2_MD); | ||
120 | pxa_gpio_mode(GPIO_DM9000 | GPIO_IN); | ||
121 | set_irq_type(COLIBRI_ETH_IRQ, IRQT_FALLING); | ||
122 | |||
123 | platform_add_devices(colibri_devices, ARRAY_SIZE(colibri_devices)); | ||
124 | } | ||
125 | |||
126 | MACHINE_START(COLIBRI, "Toradex Colibri PXA27x") | ||
127 | .phys_io = 0x40000000, | ||
128 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
129 | .boot_params = COLIBRI_SDRAM_BASE + 0x100, | ||
130 | .init_machine = colibri_init, | ||
131 | .map_io = pxa_map_io, | ||
132 | .init_irq = pxa27x_init_irq, | ||
133 | .timer = &pxa_timer, | ||
134 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c index 2363cc64fe07..9292576b83b3 100644 --- a/arch/arm/mach-pxa/corgi.c +++ b/arch/arm/mach-pxa/corgi.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/mmc/host.h> | 21 | #include <linux/mmc/host.h> |
22 | #include <linux/pm.h> | 22 | #include <linux/pm.h> |
23 | #include <linux/backlight.h> | 23 | #include <linux/backlight.h> |
24 | #include <video/w100fb.h> | ||
24 | 25 | ||
25 | #include <asm/setup.h> | 26 | #include <asm/setup.h> |
26 | #include <asm/memory.h> | 27 | #include <asm/memory.h> |
@@ -141,6 +142,136 @@ struct corgissp_machinfo corgi_ssp_machinfo = { | |||
141 | 142 | ||
142 | 143 | ||
143 | /* | 144 | /* |
145 | * LCD/Framebuffer | ||
146 | */ | ||
147 | static void w100_lcdtg_suspend(struct w100fb_par *par) | ||
148 | { | ||
149 | corgi_lcdtg_suspend(); | ||
150 | } | ||
151 | |||
152 | static void w100_lcdtg_init(struct w100fb_par *par) | ||
153 | { | ||
154 | corgi_lcdtg_hw_init(par->xres); | ||
155 | } | ||
156 | |||
157 | |||
158 | static struct w100_tg_info corgi_lcdtg_info = { | ||
159 | .change = w100_lcdtg_init, | ||
160 | .suspend = w100_lcdtg_suspend, | ||
161 | .resume = w100_lcdtg_init, | ||
162 | }; | ||
163 | |||
164 | static struct w100_mem_info corgi_fb_mem = { | ||
165 | .ext_cntl = 0x00040003, | ||
166 | .sdram_mode_reg = 0x00650021, | ||
167 | .ext_timing_cntl = 0x10002a4a, | ||
168 | .io_cntl = 0x7ff87012, | ||
169 | .size = 0x1fffff, | ||
170 | }; | ||
171 | |||
172 | static struct w100_gen_regs corgi_fb_regs = { | ||
173 | .lcd_format = 0x00000003, | ||
174 | .lcdd_cntl1 = 0x01CC0000, | ||
175 | .lcdd_cntl2 = 0x0003FFFF, | ||
176 | .genlcd_cntl1 = 0x00FFFF0D, | ||
177 | .genlcd_cntl2 = 0x003F3003, | ||
178 | .genlcd_cntl3 = 0x000102aa, | ||
179 | }; | ||
180 | |||
181 | static struct w100_gpio_regs corgi_fb_gpio = { | ||
182 | .init_data1 = 0x000000bf, | ||
183 | .init_data2 = 0x00000000, | ||
184 | .gpio_dir1 = 0x00000000, | ||
185 | .gpio_oe1 = 0x03c0feff, | ||
186 | .gpio_dir2 = 0x00000000, | ||
187 | .gpio_oe2 = 0x00000000, | ||
188 | }; | ||
189 | |||
190 | static struct w100_mode corgi_fb_modes[] = { | ||
191 | { | ||
192 | .xres = 480, | ||
193 | .yres = 640, | ||
194 | .left_margin = 0x56, | ||
195 | .right_margin = 0x55, | ||
196 | .upper_margin = 0x03, | ||
197 | .lower_margin = 0x00, | ||
198 | .crtc_ss = 0x82360056, | ||
199 | .crtc_ls = 0xA0280000, | ||
200 | .crtc_gs = 0x80280028, | ||
201 | .crtc_vpos_gs = 0x02830002, | ||
202 | .crtc_rev = 0x00400008, | ||
203 | .crtc_dclk = 0xA0000000, | ||
204 | .crtc_gclk = 0x8015010F, | ||
205 | .crtc_goe = 0x80100110, | ||
206 | .crtc_ps1_active = 0x41060010, | ||
207 | .pll_freq = 75, | ||
208 | .fast_pll_freq = 100, | ||
209 | .sysclk_src = CLK_SRC_PLL, | ||
210 | .sysclk_divider = 0, | ||
211 | .pixclk_src = CLK_SRC_PLL, | ||
212 | .pixclk_divider = 2, | ||
213 | .pixclk_divider_rotated = 6, | ||
214 | },{ | ||
215 | .xres = 240, | ||
216 | .yres = 320, | ||
217 | .left_margin = 0x27, | ||
218 | .right_margin = 0x2e, | ||
219 | .upper_margin = 0x01, | ||
220 | .lower_margin = 0x00, | ||
221 | .crtc_ss = 0x81170027, | ||
222 | .crtc_ls = 0xA0140000, | ||
223 | .crtc_gs = 0xC0140014, | ||
224 | .crtc_vpos_gs = 0x00010141, | ||
225 | .crtc_rev = 0x00400008, | ||
226 | .crtc_dclk = 0xA0000000, | ||
227 | .crtc_gclk = 0x8015010F, | ||
228 | .crtc_goe = 0x80100110, | ||
229 | .crtc_ps1_active = 0x41060010, | ||
230 | .pll_freq = 0, | ||
231 | .fast_pll_freq = 0, | ||
232 | .sysclk_src = CLK_SRC_XTAL, | ||
233 | .sysclk_divider = 0, | ||
234 | .pixclk_src = CLK_SRC_XTAL, | ||
235 | .pixclk_divider = 1, | ||
236 | .pixclk_divider_rotated = 1, | ||
237 | }, | ||
238 | |||
239 | }; | ||
240 | |||
241 | static struct w100fb_mach_info corgi_fb_info = { | ||
242 | .tg = &corgi_lcdtg_info, | ||
243 | .init_mode = INIT_MODE_ROTATED, | ||
244 | .mem = &corgi_fb_mem, | ||
245 | .regs = &corgi_fb_regs, | ||
246 | .modelist = &corgi_fb_modes[0], | ||
247 | .num_modes = 2, | ||
248 | .gpio = &corgi_fb_gpio, | ||
249 | .xtal_freq = 12500000, | ||
250 | .xtal_dbl = 0, | ||
251 | }; | ||
252 | |||
253 | static struct resource corgi_fb_resources[] = { | ||
254 | [0] = { | ||
255 | .start = 0x08000000, | ||
256 | .end = 0x08ffffff, | ||
257 | .flags = IORESOURCE_MEM, | ||
258 | }, | ||
259 | }; | ||
260 | |||
261 | static struct platform_device corgifb_device = { | ||
262 | .name = "w100fb", | ||
263 | .id = -1, | ||
264 | .num_resources = ARRAY_SIZE(corgi_fb_resources), | ||
265 | .resource = corgi_fb_resources, | ||
266 | .dev = { | ||
267 | .platform_data = &corgi_fb_info, | ||
268 | .parent = &corgissp_device.dev, | ||
269 | }, | ||
270 | |||
271 | }; | ||
272 | |||
273 | |||
274 | /* | ||
144 | * Corgi Backlight Device | 275 | * Corgi Backlight Device |
145 | */ | 276 | */ |
146 | static void corgi_bl_kick_battery(void) | 277 | static void corgi_bl_kick_battery(void) |
@@ -154,6 +285,21 @@ static void corgi_bl_kick_battery(void) | |||
154 | } | 285 | } |
155 | } | 286 | } |
156 | 287 | ||
288 | static void corgi_bl_set_intensity(int intensity) | ||
289 | { | ||
290 | if (intensity > 0x10) | ||
291 | intensity += 0x10; | ||
292 | |||
293 | /* Bits 0-4 are accessed via the SSP interface */ | ||
294 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
295 | |||
296 | /* Bit 5 is via SCOOP */ | ||
297 | if (intensity & 0x0020) | ||
298 | set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
299 | else | ||
300 | reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
301 | } | ||
302 | |||
157 | static struct generic_bl_info corgi_bl_machinfo = { | 303 | static struct generic_bl_info corgi_bl_machinfo = { |
158 | .name = "corgi-bl", | 304 | .name = "corgi-bl", |
159 | .max_intensity = 0x2f, | 305 | .max_intensity = 0x2f, |
@@ -190,9 +336,40 @@ static struct platform_device corgiled_device = { | |||
190 | .id = -1, | 336 | .id = -1, |
191 | }; | 337 | }; |
192 | 338 | ||
339 | |||
193 | /* | 340 | /* |
194 | * Corgi Touch Screen Device | 341 | * Corgi Touch Screen Device |
195 | */ | 342 | */ |
343 | static unsigned long (*get_hsync_invperiod)(struct device *dev); | ||
344 | |||
345 | static void inline sharpsl_wait_sync(int gpio) | ||
346 | { | ||
347 | while((GPLR(gpio) & GPIO_bit(gpio)) == 0); | ||
348 | while((GPLR(gpio) & GPIO_bit(gpio)) != 0); | ||
349 | } | ||
350 | |||
351 | static unsigned long corgi_get_hsync_invperiod(void) | ||
352 | { | ||
353 | if (!get_hsync_invperiod) | ||
354 | get_hsync_invperiod = symbol_get(w100fb_get_hsynclen); | ||
355 | if (!get_hsync_invperiod) | ||
356 | return 0; | ||
357 | |||
358 | return get_hsync_invperiod(&corgifb_device.dev); | ||
359 | } | ||
360 | |||
361 | static void corgi_put_hsync(void) | ||
362 | { | ||
363 | if (get_hsync_invperiod) | ||
364 | symbol_put(w100fb_get_hsynclen); | ||
365 | get_hsync_invperiod = NULL; | ||
366 | } | ||
367 | |||
368 | static void corgi_wait_hsync(void) | ||
369 | { | ||
370 | sharpsl_wait_sync(CORGI_GPIO_HSYNC); | ||
371 | } | ||
372 | |||
196 | static struct resource corgits_resources[] = { | 373 | static struct resource corgits_resources[] = { |
197 | [0] = { | 374 | [0] = { |
198 | .start = CORGI_IRQ_GPIO_TP_INT, | 375 | .start = CORGI_IRQ_GPIO_TP_INT, |
@@ -202,9 +379,9 @@ static struct resource corgits_resources[] = { | |||
202 | }; | 379 | }; |
203 | 380 | ||
204 | static struct corgits_machinfo corgi_ts_machinfo = { | 381 | static struct corgits_machinfo corgi_ts_machinfo = { |
205 | .get_hsync_len = corgi_get_hsync_len, | 382 | .get_hsync_invperiod = corgi_get_hsync_invperiod, |
206 | .put_hsync = corgi_put_hsync, | 383 | .put_hsync = corgi_put_hsync, |
207 | .wait_hsync = corgi_wait_hsync, | 384 | .wait_hsync = corgi_wait_hsync, |
208 | }; | 385 | }; |
209 | 386 | ||
210 | static struct platform_device corgits_device = { | 387 | static struct platform_device corgits_device = { |
@@ -242,12 +419,10 @@ static int corgi_mci_init(struct device *dev, irq_handler_t corgi_detect_int, vo | |||
242 | err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, | 419 | err = request_irq(CORGI_IRQ_GPIO_nSD_DETECT, corgi_detect_int, |
243 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 420 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
244 | "MMC card detect", data); | 421 | "MMC card detect", data); |
245 | if (err) { | 422 | if (err) |
246 | printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 423 | printk(KERN_ERR "corgi_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
247 | return -1; | ||
248 | } | ||
249 | 424 | ||
250 | return 0; | 425 | return err; |
251 | } | 426 | } |
252 | 427 | ||
253 | static void corgi_mci_setpower(struct device *dev, unsigned int vdd) | 428 | static void corgi_mci_setpower(struct device *dev, unsigned int vdd) |
diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 365b9435f748..9328df37afd1 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c | |||
@@ -173,7 +173,7 @@ static void lcdtg_set_phadadj(int mode) | |||
173 | 173 | ||
174 | static int lcd_inited; | 174 | static int lcd_inited; |
175 | 175 | ||
176 | static void lcdtg_hw_init(int mode) | 176 | void corgi_lcdtg_hw_init(int mode) |
177 | { | 177 | { |
178 | if (!lcd_inited) { | 178 | if (!lcd_inited) { |
179 | int comadj; | 179 | int comadj; |
@@ -254,7 +254,7 @@ static void lcdtg_hw_init(int mode) | |||
254 | } | 254 | } |
255 | } | 255 | } |
256 | 256 | ||
257 | static void lcdtg_suspend(void) | 257 | void corgi_lcdtg_suspend(void) |
258 | { | 258 | { |
259 | /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ | 259 | /* 60Hz x 2 frame = 16.7msec x 2 = 33.4 msec */ |
260 | mdelay(34); | 260 | mdelay(34); |
@@ -288,298 +288,3 @@ static void lcdtg_suspend(void) | |||
288 | lcd_inited = 0; | 288 | lcd_inited = 0; |
289 | } | 289 | } |
290 | 290 | ||
291 | |||
292 | /* | ||
293 | * Corgi w100 Frame Buffer Device | ||
294 | */ | ||
295 | #ifdef CONFIG_PXA_SHARP_C7xx | ||
296 | |||
297 | #include <video/w100fb.h> | ||
298 | |||
299 | static void w100_lcdtg_suspend(struct w100fb_par *par) | ||
300 | { | ||
301 | lcdtg_suspend(); | ||
302 | } | ||
303 | |||
304 | static void w100_lcdtg_init(struct w100fb_par *par) | ||
305 | { | ||
306 | lcdtg_hw_init(par->xres); | ||
307 | } | ||
308 | |||
309 | |||
310 | static struct w100_tg_info corgi_lcdtg_info = { | ||
311 | .change = w100_lcdtg_init, | ||
312 | .suspend = w100_lcdtg_suspend, | ||
313 | .resume = w100_lcdtg_init, | ||
314 | }; | ||
315 | |||
316 | static struct w100_mem_info corgi_fb_mem = { | ||
317 | .ext_cntl = 0x00040003, | ||
318 | .sdram_mode_reg = 0x00650021, | ||
319 | .ext_timing_cntl = 0x10002a4a, | ||
320 | .io_cntl = 0x7ff87012, | ||
321 | .size = 0x1fffff, | ||
322 | }; | ||
323 | |||
324 | static struct w100_gen_regs corgi_fb_regs = { | ||
325 | .lcd_format = 0x00000003, | ||
326 | .lcdd_cntl1 = 0x01CC0000, | ||
327 | .lcdd_cntl2 = 0x0003FFFF, | ||
328 | .genlcd_cntl1 = 0x00FFFF0D, | ||
329 | .genlcd_cntl2 = 0x003F3003, | ||
330 | .genlcd_cntl3 = 0x000102aa, | ||
331 | }; | ||
332 | |||
333 | static struct w100_gpio_regs corgi_fb_gpio = { | ||
334 | .init_data1 = 0x000000bf, | ||
335 | .init_data2 = 0x00000000, | ||
336 | .gpio_dir1 = 0x00000000, | ||
337 | .gpio_oe1 = 0x03c0feff, | ||
338 | .gpio_dir2 = 0x00000000, | ||
339 | .gpio_oe2 = 0x00000000, | ||
340 | }; | ||
341 | |||
342 | static struct w100_mode corgi_fb_modes[] = { | ||
343 | { | ||
344 | .xres = 480, | ||
345 | .yres = 640, | ||
346 | .left_margin = 0x56, | ||
347 | .right_margin = 0x55, | ||
348 | .upper_margin = 0x03, | ||
349 | .lower_margin = 0x00, | ||
350 | .crtc_ss = 0x82360056, | ||
351 | .crtc_ls = 0xA0280000, | ||
352 | .crtc_gs = 0x80280028, | ||
353 | .crtc_vpos_gs = 0x02830002, | ||
354 | .crtc_rev = 0x00400008, | ||
355 | .crtc_dclk = 0xA0000000, | ||
356 | .crtc_gclk = 0x8015010F, | ||
357 | .crtc_goe = 0x80100110, | ||
358 | .crtc_ps1_active = 0x41060010, | ||
359 | .pll_freq = 75, | ||
360 | .fast_pll_freq = 100, | ||
361 | .sysclk_src = CLK_SRC_PLL, | ||
362 | .sysclk_divider = 0, | ||
363 | .pixclk_src = CLK_SRC_PLL, | ||
364 | .pixclk_divider = 2, | ||
365 | .pixclk_divider_rotated = 6, | ||
366 | },{ | ||
367 | .xres = 240, | ||
368 | .yres = 320, | ||
369 | .left_margin = 0x27, | ||
370 | .right_margin = 0x2e, | ||
371 | .upper_margin = 0x01, | ||
372 | .lower_margin = 0x00, | ||
373 | .crtc_ss = 0x81170027, | ||
374 | .crtc_ls = 0xA0140000, | ||
375 | .crtc_gs = 0xC0140014, | ||
376 | .crtc_vpos_gs = 0x00010141, | ||
377 | .crtc_rev = 0x00400008, | ||
378 | .crtc_dclk = 0xA0000000, | ||
379 | .crtc_gclk = 0x8015010F, | ||
380 | .crtc_goe = 0x80100110, | ||
381 | .crtc_ps1_active = 0x41060010, | ||
382 | .pll_freq = 0, | ||
383 | .fast_pll_freq = 0, | ||
384 | .sysclk_src = CLK_SRC_XTAL, | ||
385 | .sysclk_divider = 0, | ||
386 | .pixclk_src = CLK_SRC_XTAL, | ||
387 | .pixclk_divider = 1, | ||
388 | .pixclk_divider_rotated = 1, | ||
389 | }, | ||
390 | |||
391 | }; | ||
392 | |||
393 | static struct w100fb_mach_info corgi_fb_info = { | ||
394 | .tg = &corgi_lcdtg_info, | ||
395 | .init_mode = INIT_MODE_ROTATED, | ||
396 | .mem = &corgi_fb_mem, | ||
397 | .regs = &corgi_fb_regs, | ||
398 | .modelist = &corgi_fb_modes[0], | ||
399 | .num_modes = 2, | ||
400 | .gpio = &corgi_fb_gpio, | ||
401 | .xtal_freq = 12500000, | ||
402 | .xtal_dbl = 0, | ||
403 | }; | ||
404 | |||
405 | static struct resource corgi_fb_resources[] = { | ||
406 | [0] = { | ||
407 | .start = 0x08000000, | ||
408 | .end = 0x08ffffff, | ||
409 | .flags = IORESOURCE_MEM, | ||
410 | }, | ||
411 | }; | ||
412 | |||
413 | struct platform_device corgifb_device = { | ||
414 | .name = "w100fb", | ||
415 | .id = -1, | ||
416 | .num_resources = ARRAY_SIZE(corgi_fb_resources), | ||
417 | .resource = corgi_fb_resources, | ||
418 | .dev = { | ||
419 | .platform_data = &corgi_fb_info, | ||
420 | .parent = &corgissp_device.dev, | ||
421 | }, | ||
422 | |||
423 | }; | ||
424 | #endif | ||
425 | |||
426 | |||
427 | /* | ||
428 | * Spitz PXA Frame Buffer Device | ||
429 | */ | ||
430 | #ifdef CONFIG_PXA_SHARP_Cxx00 | ||
431 | |||
432 | #include <asm/arch/pxafb.h> | ||
433 | |||
434 | void spitz_lcd_power(int on, struct fb_var_screeninfo *var) | ||
435 | { | ||
436 | if (on) | ||
437 | lcdtg_hw_init(var->xres); | ||
438 | else | ||
439 | lcdtg_suspend(); | ||
440 | } | ||
441 | |||
442 | #endif | ||
443 | |||
444 | |||
445 | /* | ||
446 | * Corgi/Spitz Touchscreen to LCD interface | ||
447 | */ | ||
448 | static unsigned long (*get_hsync_time)(struct device *dev); | ||
449 | |||
450 | static void inline sharpsl_wait_sync(int gpio) | ||
451 | { | ||
452 | while((GPLR(gpio) & GPIO_bit(gpio)) == 0); | ||
453 | while((GPLR(gpio) & GPIO_bit(gpio)) != 0); | ||
454 | } | ||
455 | |||
456 | #ifdef CONFIG_PXA_SHARP_C7xx | ||
457 | unsigned long corgi_get_hsync_len(void) | ||
458 | { | ||
459 | if (!get_hsync_time) | ||
460 | get_hsync_time = symbol_get(w100fb_get_hsynclen); | ||
461 | if (!get_hsync_time) | ||
462 | return 0; | ||
463 | |||
464 | return get_hsync_time(&corgifb_device.dev); | ||
465 | } | ||
466 | |||
467 | void corgi_put_hsync(void) | ||
468 | { | ||
469 | if (get_hsync_time) | ||
470 | symbol_put(w100fb_get_hsynclen); | ||
471 | get_hsync_time = NULL; | ||
472 | } | ||
473 | |||
474 | void corgi_wait_hsync(void) | ||
475 | { | ||
476 | sharpsl_wait_sync(CORGI_GPIO_HSYNC); | ||
477 | } | ||
478 | #endif | ||
479 | |||
480 | #ifdef CONFIG_PXA_SHARP_Cxx00 | ||
481 | static struct device *spitz_pxafb_dev; | ||
482 | |||
483 | static int is_pxafb_device(struct device * dev, void * data) | ||
484 | { | ||
485 | struct platform_device *pdev = container_of(dev, struct platform_device, dev); | ||
486 | |||
487 | return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); | ||
488 | } | ||
489 | |||
490 | unsigned long spitz_get_hsync_len(void) | ||
491 | { | ||
492 | #ifdef CONFIG_FB_PXA | ||
493 | if (!spitz_pxafb_dev) { | ||
494 | spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); | ||
495 | if (!spitz_pxafb_dev) | ||
496 | return 0; | ||
497 | } | ||
498 | if (!get_hsync_time) | ||
499 | get_hsync_time = symbol_get(pxafb_get_hsync_time); | ||
500 | if (!get_hsync_time) | ||
501 | #endif | ||
502 | return 0; | ||
503 | |||
504 | return pxafb_get_hsync_time(spitz_pxafb_dev); | ||
505 | } | ||
506 | |||
507 | void spitz_put_hsync(void) | ||
508 | { | ||
509 | put_device(spitz_pxafb_dev); | ||
510 | if (get_hsync_time) | ||
511 | symbol_put(pxafb_get_hsync_time); | ||
512 | spitz_pxafb_dev = NULL; | ||
513 | get_hsync_time = NULL; | ||
514 | } | ||
515 | |||
516 | void spitz_wait_hsync(void) | ||
517 | { | ||
518 | sharpsl_wait_sync(SPITZ_GPIO_HSYNC); | ||
519 | } | ||
520 | #endif | ||
521 | |||
522 | /* | ||
523 | * Corgi/Spitz Backlight Power | ||
524 | */ | ||
525 | #ifdef CONFIG_PXA_SHARP_C7xx | ||
526 | void corgi_bl_set_intensity(int intensity) | ||
527 | { | ||
528 | if (intensity > 0x10) | ||
529 | intensity += 0x10; | ||
530 | |||
531 | /* Bits 0-4 are accessed via the SSP interface */ | ||
532 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
533 | |||
534 | /* Bit 5 is via SCOOP */ | ||
535 | if (intensity & 0x0020) | ||
536 | set_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
537 | else | ||
538 | reset_scoop_gpio(&corgiscoop_device.dev, CORGI_SCP_BACKLIGHT_CONT); | ||
539 | } | ||
540 | #endif | ||
541 | |||
542 | |||
543 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) | ||
544 | void spitz_bl_set_intensity(int intensity) | ||
545 | { | ||
546 | if (intensity > 0x10) | ||
547 | intensity += 0x10; | ||
548 | |||
549 | /* Bits 0-4 are accessed via the SSP interface */ | ||
550 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
551 | |||
552 | /* Bit 5 is via SCOOP */ | ||
553 | if (intensity & 0x0020) | ||
554 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
555 | else | ||
556 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
557 | |||
558 | if (intensity) | ||
559 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
560 | else | ||
561 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
562 | } | ||
563 | #endif | ||
564 | |||
565 | #ifdef CONFIG_MACH_AKITA | ||
566 | void akita_bl_set_intensity(int intensity) | ||
567 | { | ||
568 | if (intensity > 0x10) | ||
569 | intensity += 0x10; | ||
570 | |||
571 | /* Bits 0-4 are accessed via the SSP interface */ | ||
572 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
573 | |||
574 | /* Bit 5 is via IO-Expander */ | ||
575 | if (intensity & 0x0020) | ||
576 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
577 | else | ||
578 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
579 | |||
580 | if (intensity) | ||
581 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
582 | else | ||
583 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
584 | } | ||
585 | #endif | ||
diff --git a/arch/arm/mach-pxa/corgi_ssp.c b/arch/arm/mach-pxa/corgi_ssp.c index 40dea3d5142b..efba65edcd51 100644 --- a/arch/arm/mach-pxa/corgi_ssp.c +++ b/arch/arm/mach-pxa/corgi_ssp.c | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include <asm/arch/ssp.h> | 22 | #include <asm/arch/ssp.h> |
23 | #include <asm/arch/pxa-regs.h> | 23 | #include <asm/arch/pxa-regs.h> |
24 | #include <asm/arch/regs-ssp.h> | ||
24 | #include "sharpsl.h" | 25 | #include "sharpsl.h" |
25 | 26 | ||
26 | static DEFINE_SPINLOCK(corgi_ssp_lock); | 27 | static DEFINE_SPINLOCK(corgi_ssp_lock); |
diff --git a/arch/arm/mach-pxa/cpu-pxa.c b/arch/arm/mach-pxa/cpu-pxa.c new file mode 100644 index 000000000000..cbc583beedc8 --- /dev/null +++ b/arch/arm/mach-pxa/cpu-pxa.c | |||
@@ -0,0 +1,294 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/cpu-pxa.c | ||
3 | * | ||
4 | * Copyright (C) 2002,2003 Intrinsyc Software | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | * | ||
20 | * History: | ||
21 | * 31-Jul-2002 : Initial version [FB] | ||
22 | * 29-Jan-2003 : added PXA255 support [FB] | ||
23 | * 20-Apr-2003 : ported to v2.5 (Dustin McIntire, Sensoria Corp.) | ||
24 | * | ||
25 | * Note: | ||
26 | * This driver may change the memory bus clock rate, but will not do any | ||
27 | * platform specific access timing changes... for example if you have flash | ||
28 | * memory connected to CS0, you will need to register a platform specific | ||
29 | * notifier which will adjust the memory access strobes to maintain a | ||
30 | * minimum strobe width. | ||
31 | * | ||
32 | */ | ||
33 | |||
34 | #include <linux/kernel.h> | ||
35 | #include <linux/module.h> | ||
36 | #include <linux/sched.h> | ||
37 | #include <linux/init.h> | ||
38 | #include <linux/cpufreq.h> | ||
39 | |||
40 | #include <asm/hardware.h> | ||
41 | #include <asm/arch/pxa-regs.h> | ||
42 | #include <asm/arch/pxa2xx-regs.h> | ||
43 | |||
44 | #ifdef DEBUG | ||
45 | static unsigned int freq_debug; | ||
46 | MODULE_PARM(freq_debug, "i"); | ||
47 | MODULE_PARM_DESC(freq_debug, "Set the debug messages to on=1/off=0"); | ||
48 | #else | ||
49 | #define freq_debug 0 | ||
50 | #endif | ||
51 | |||
52 | typedef struct { | ||
53 | unsigned int khz; | ||
54 | unsigned int membus; | ||
55 | unsigned int cccr; | ||
56 | unsigned int div2; | ||
57 | } pxa_freqs_t; | ||
58 | |||
59 | /* Define the refresh period in mSec for the SDRAM and the number of rows */ | ||
60 | #define SDRAM_TREF 64 /* standard 64ms SDRAM */ | ||
61 | #define SDRAM_ROWS 4096 /* 64MB=8192 32MB=4096 */ | ||
62 | #define MDREFR_DRI(x) (((x) * SDRAM_TREF) / (SDRAM_ROWS * 32)) | ||
63 | |||
64 | #define CCLKCFG_TURBO 0x1 | ||
65 | #define CCLKCFG_FCS 0x2 | ||
66 | #define PXA25x_MIN_FREQ 99500 | ||
67 | #define PXA25x_MAX_FREQ 398100 | ||
68 | #define MDREFR_DB2_MASK (MDREFR_K2DB2 | MDREFR_K1DB2) | ||
69 | #define MDREFR_DRI_MASK 0xFFF | ||
70 | |||
71 | |||
72 | /* Use the run mode frequencies for the CPUFREQ_POLICY_PERFORMANCE policy */ | ||
73 | static pxa_freqs_t pxa255_run_freqs[] = | ||
74 | { | ||
75 | /* CPU MEMBUS CCCR DIV2*/ | ||
76 | { 99500, 99500, 0x121, 1}, /* run= 99, turbo= 99, PXbus=50, SDRAM=50 */ | ||
77 | {132700, 132700, 0x123, 1}, /* run=133, turbo=133, PXbus=66, SDRAM=66 */ | ||
78 | {199100, 99500, 0x141, 0}, /* run=199, turbo=199, PXbus=99, SDRAM=99 */ | ||
79 | {265400, 132700, 0x143, 1}, /* run=265, turbo=265, PXbus=133, SDRAM=66 */ | ||
80 | {331800, 165900, 0x145, 1}, /* run=331, turbo=331, PXbus=166, SDRAM=83 */ | ||
81 | {398100, 99500, 0x161, 0}, /* run=398, turbo=398, PXbus=196, SDRAM=99 */ | ||
82 | {0,} | ||
83 | }; | ||
84 | #define NUM_RUN_FREQS ARRAY_SIZE(pxa255_run_freqs) | ||
85 | |||
86 | static struct cpufreq_frequency_table pxa255_run_freq_table[NUM_RUN_FREQS+1]; | ||
87 | |||
88 | /* Use the turbo mode frequencies for the CPUFREQ_POLICY_POWERSAVE policy */ | ||
89 | static pxa_freqs_t pxa255_turbo_freqs[] = | ||
90 | { | ||
91 | /* CPU MEMBUS CCCR DIV2*/ | ||
92 | { 99500, 99500, 0x121, 1}, /* run=99, turbo= 99, PXbus=50, SDRAM=50 */ | ||
93 | {199100, 99500, 0x221, 0}, /* run=99, turbo=199, PXbus=50, SDRAM=99 */ | ||
94 | {298500, 99500, 0x321, 0}, /* run=99, turbo=287, PXbus=50, SDRAM=99 */ | ||
95 | {298600, 99500, 0x1c1, 0}, /* run=199, turbo=287, PXbus=99, SDRAM=99 */ | ||
96 | {398100, 99500, 0x241, 0}, /* run=199, turbo=398, PXbus=99, SDRAM=99 */ | ||
97 | {0,} | ||
98 | }; | ||
99 | #define NUM_TURBO_FREQS ARRAY_SIZE(pxa255_turbo_freqs) | ||
100 | |||
101 | static struct cpufreq_frequency_table pxa255_turbo_freq_table[NUM_TURBO_FREQS+1]; | ||
102 | |||
103 | extern unsigned get_clk_frequency_khz(int info); | ||
104 | |||
105 | /* find a valid frequency point */ | ||
106 | static int pxa_verify_policy(struct cpufreq_policy *policy) | ||
107 | { | ||
108 | struct cpufreq_frequency_table *pxa_freqs_table; | ||
109 | int ret; | ||
110 | |||
111 | if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { | ||
112 | pxa_freqs_table = pxa255_run_freq_table; | ||
113 | } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { | ||
114 | pxa_freqs_table = pxa255_turbo_freq_table; | ||
115 | } else { | ||
116 | printk("CPU PXA: Unknown policy found. " | ||
117 | "Using CPUFREQ_POLICY_PERFORMANCE\n"); | ||
118 | pxa_freqs_table = pxa255_run_freq_table; | ||
119 | } | ||
120 | |||
121 | ret = cpufreq_frequency_table_verify(policy, pxa_freqs_table); | ||
122 | |||
123 | if (freq_debug) | ||
124 | pr_debug("Verified CPU policy: %dKhz min to %dKhz max\n", | ||
125 | policy->min, policy->max); | ||
126 | |||
127 | return ret; | ||
128 | } | ||
129 | |||
130 | static int pxa_set_target(struct cpufreq_policy *policy, | ||
131 | unsigned int target_freq, | ||
132 | unsigned int relation) | ||
133 | { | ||
134 | struct cpufreq_frequency_table *pxa_freqs_table; | ||
135 | pxa_freqs_t *pxa_freq_settings; | ||
136 | struct cpufreq_freqs freqs; | ||
137 | int idx; | ||
138 | unsigned long flags; | ||
139 | unsigned int unused, preset_mdrefr, postset_mdrefr; | ||
140 | void *ramstart = phys_to_virt(0xa0000000); | ||
141 | |||
142 | /* Get the current policy */ | ||
143 | if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) { | ||
144 | pxa_freq_settings = pxa255_run_freqs; | ||
145 | pxa_freqs_table = pxa255_run_freq_table; | ||
146 | } else if (policy->policy == CPUFREQ_POLICY_POWERSAVE) { | ||
147 | pxa_freq_settings = pxa255_turbo_freqs; | ||
148 | pxa_freqs_table = pxa255_turbo_freq_table; | ||
149 | } else { | ||
150 | printk("CPU PXA: Unknown policy found. " | ||
151 | "Using CPUFREQ_POLICY_PERFORMANCE\n"); | ||
152 | pxa_freq_settings = pxa255_run_freqs; | ||
153 | pxa_freqs_table = pxa255_run_freq_table; | ||
154 | } | ||
155 | |||
156 | /* Lookup the next frequency */ | ||
157 | if (cpufreq_frequency_table_target(policy, pxa_freqs_table, | ||
158 | target_freq, relation, &idx)) { | ||
159 | return -EINVAL; | ||
160 | } | ||
161 | |||
162 | freqs.old = policy->cur; | ||
163 | freqs.new = pxa_freq_settings[idx].khz; | ||
164 | freqs.cpu = policy->cpu; | ||
165 | |||
166 | if (freq_debug) | ||
167 | pr_debug(KERN_INFO "Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n", | ||
168 | freqs.new / 1000, (pxa_freq_settings[idx].div2) ? | ||
169 | (pxa_freq_settings[idx].membus / 2000) : | ||
170 | (pxa_freq_settings[idx].membus / 1000)); | ||
171 | |||
172 | /* | ||
173 | * Tell everyone what we're about to do... | ||
174 | * you should add a notify client with any platform specific | ||
175 | * Vcc changing capability | ||
176 | */ | ||
177 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
178 | |||
179 | /* Calculate the next MDREFR. If we're slowing down the SDRAM clock | ||
180 | * we need to preset the smaller DRI before the change. If we're speeding | ||
181 | * up we need to set the larger DRI value after the change. | ||
182 | */ | ||
183 | preset_mdrefr = postset_mdrefr = MDREFR; | ||
184 | if ((MDREFR & MDREFR_DRI_MASK) > MDREFR_DRI(pxa_freq_settings[idx].membus)) { | ||
185 | preset_mdrefr = (preset_mdrefr & ~MDREFR_DRI_MASK) | | ||
186 | MDREFR_DRI(pxa_freq_settings[idx].membus); | ||
187 | } | ||
188 | postset_mdrefr = (postset_mdrefr & ~MDREFR_DRI_MASK) | | ||
189 | MDREFR_DRI(pxa_freq_settings[idx].membus); | ||
190 | |||
191 | /* If we're dividing the memory clock by two for the SDRAM clock, this | ||
192 | * must be set prior to the change. Clearing the divide must be done | ||
193 | * after the change. | ||
194 | */ | ||
195 | if (pxa_freq_settings[idx].div2) { | ||
196 | preset_mdrefr |= MDREFR_DB2_MASK; | ||
197 | postset_mdrefr |= MDREFR_DB2_MASK; | ||
198 | } else { | ||
199 | postset_mdrefr &= ~MDREFR_DB2_MASK; | ||
200 | } | ||
201 | |||
202 | local_irq_save(flags); | ||
203 | |||
204 | /* Set new the CCCR */ | ||
205 | CCCR = pxa_freq_settings[idx].cccr; | ||
206 | |||
207 | asm volatile(" \n\ | ||
208 | ldr r4, [%1] /* load MDREFR */ \n\ | ||
209 | b 2f \n\ | ||
210 | .align 5 \n\ | ||
211 | 1: \n\ | ||
212 | str %4, [%1] /* preset the MDREFR */ \n\ | ||
213 | mcr p14, 0, %2, c6, c0, 0 /* set CCLKCFG[FCS] */ \n\ | ||
214 | str %5, [%1] /* postset the MDREFR */ \n\ | ||
215 | \n\ | ||
216 | b 3f \n\ | ||
217 | 2: b 1b \n\ | ||
218 | 3: nop \n\ | ||
219 | " | ||
220 | : "=&r" (unused) | ||
221 | : "r" (&MDREFR), "r" (CCLKCFG_TURBO|CCLKCFG_FCS), "r" (ramstart), | ||
222 | "r" (preset_mdrefr), "r" (postset_mdrefr) | ||
223 | : "r4", "r5"); | ||
224 | local_irq_restore(flags); | ||
225 | |||
226 | /* | ||
227 | * Tell everyone what we've just done... | ||
228 | * you should add a notify client with any platform specific | ||
229 | * SDRAM refresh timer adjustments | ||
230 | */ | ||
231 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
232 | |||
233 | return 0; | ||
234 | } | ||
235 | |||
236 | static int pxa_cpufreq_init(struct cpufreq_policy *policy) | ||
237 | { | ||
238 | int i; | ||
239 | |||
240 | /* set default policy and cpuinfo */ | ||
241 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
242 | policy->policy = CPUFREQ_POLICY_PERFORMANCE; | ||
243 | policy->cpuinfo.max_freq = PXA25x_MAX_FREQ; | ||
244 | policy->cpuinfo.min_freq = PXA25x_MIN_FREQ; | ||
245 | policy->cpuinfo.transition_latency = 1000; /* FIXME: 1 ms, assumed */ | ||
246 | policy->cur = get_clk_frequency_khz(0); /* current freq */ | ||
247 | policy->min = policy->max = policy->cur; | ||
248 | |||
249 | /* Generate the run cpufreq_frequency_table struct */ | ||
250 | for (i = 0; i < NUM_RUN_FREQS; i++) { | ||
251 | pxa255_run_freq_table[i].frequency = pxa255_run_freqs[i].khz; | ||
252 | pxa255_run_freq_table[i].index = i; | ||
253 | } | ||
254 | |||
255 | pxa255_run_freq_table[i].frequency = CPUFREQ_TABLE_END; | ||
256 | /* Generate the turbo cpufreq_frequency_table struct */ | ||
257 | for (i = 0; i < NUM_TURBO_FREQS; i++) { | ||
258 | pxa255_turbo_freq_table[i].frequency = pxa255_turbo_freqs[i].khz; | ||
259 | pxa255_turbo_freq_table[i].index = i; | ||
260 | } | ||
261 | pxa255_turbo_freq_table[i].frequency = CPUFREQ_TABLE_END; | ||
262 | |||
263 | printk(KERN_INFO "PXA CPU frequency change support initialized\n"); | ||
264 | |||
265 | return 0; | ||
266 | } | ||
267 | |||
268 | static struct cpufreq_driver pxa_cpufreq_driver = { | ||
269 | .verify = pxa_verify_policy, | ||
270 | .target = pxa_set_target, | ||
271 | .init = pxa_cpufreq_init, | ||
272 | .name = "PXA25x", | ||
273 | }; | ||
274 | |||
275 | static int __init pxa_cpu_init(void) | ||
276 | { | ||
277 | int ret = -ENODEV; | ||
278 | if (cpu_is_pxa25x()) | ||
279 | ret = cpufreq_register_driver(&pxa_cpufreq_driver); | ||
280 | return ret; | ||
281 | } | ||
282 | |||
283 | static void __exit pxa_cpu_exit(void) | ||
284 | { | ||
285 | if (cpu_is_pxa25x()) | ||
286 | cpufreq_unregister_driver(&pxa_cpufreq_driver); | ||
287 | } | ||
288 | |||
289 | |||
290 | MODULE_AUTHOR ("Intrinsyc Software Inc."); | ||
291 | MODULE_DESCRIPTION ("CPU frequency changing driver for the PXA architecture"); | ||
292 | MODULE_LICENSE("GPL"); | ||
293 | module_init(pxa_cpu_init); | ||
294 | module_exit(pxa_cpu_exit); | ||
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c new file mode 100644 index 000000000000..50ff453ad370 --- /dev/null +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -0,0 +1,662 @@ | |||
1 | #include <linux/module.h> | ||
2 | #include <linux/kernel.h> | ||
3 | #include <linux/init.h> | ||
4 | #include <linux/platform_device.h> | ||
5 | #include <linux/dma-mapping.h> | ||
6 | |||
7 | #include <asm/arch/gpio.h> | ||
8 | #include <asm/arch/udc.h> | ||
9 | #include <asm/arch/pxafb.h> | ||
10 | #include <asm/arch/mmc.h> | ||
11 | #include <asm/arch/irda.h> | ||
12 | #include <asm/arch/i2c.h> | ||
13 | |||
14 | #include "devices.h" | ||
15 | |||
16 | void __init pxa_register_device(struct platform_device *dev, void *data) | ||
17 | { | ||
18 | int ret; | ||
19 | |||
20 | dev->dev.platform_data = data; | ||
21 | |||
22 | ret = platform_device_register(dev); | ||
23 | if (ret) | ||
24 | dev_err(&dev->dev, "unable to register device: %d\n", ret); | ||
25 | } | ||
26 | |||
27 | static struct resource pxamci_resources[] = { | ||
28 | [0] = { | ||
29 | .start = 0x41100000, | ||
30 | .end = 0x41100fff, | ||
31 | .flags = IORESOURCE_MEM, | ||
32 | }, | ||
33 | [1] = { | ||
34 | .start = IRQ_MMC, | ||
35 | .end = IRQ_MMC, | ||
36 | .flags = IORESOURCE_IRQ, | ||
37 | }, | ||
38 | [2] = { | ||
39 | .start = 21, | ||
40 | .end = 21, | ||
41 | .flags = IORESOURCE_DMA, | ||
42 | }, | ||
43 | [3] = { | ||
44 | .start = 22, | ||
45 | .end = 22, | ||
46 | .flags = IORESOURCE_DMA, | ||
47 | }, | ||
48 | }; | ||
49 | |||
50 | static u64 pxamci_dmamask = 0xffffffffUL; | ||
51 | |||
52 | struct platform_device pxa_device_mci = { | ||
53 | .name = "pxa2xx-mci", | ||
54 | .id = 0, | ||
55 | .dev = { | ||
56 | .dma_mask = &pxamci_dmamask, | ||
57 | .coherent_dma_mask = 0xffffffff, | ||
58 | }, | ||
59 | .num_resources = ARRAY_SIZE(pxamci_resources), | ||
60 | .resource = pxamci_resources, | ||
61 | }; | ||
62 | |||
63 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) | ||
64 | { | ||
65 | pxa_register_device(&pxa_device_mci, info); | ||
66 | } | ||
67 | |||
68 | |||
69 | static struct pxa2xx_udc_mach_info pxa_udc_info; | ||
70 | |||
71 | void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) | ||
72 | { | ||
73 | memcpy(&pxa_udc_info, info, sizeof *info); | ||
74 | } | ||
75 | |||
76 | static struct resource pxa2xx_udc_resources[] = { | ||
77 | [0] = { | ||
78 | .start = 0x40600000, | ||
79 | .end = 0x4060ffff, | ||
80 | .flags = IORESOURCE_MEM, | ||
81 | }, | ||
82 | [1] = { | ||
83 | .start = IRQ_USB, | ||
84 | .end = IRQ_USB, | ||
85 | .flags = IORESOURCE_IRQ, | ||
86 | }, | ||
87 | }; | ||
88 | |||
89 | static u64 udc_dma_mask = ~(u32)0; | ||
90 | |||
91 | struct platform_device pxa_device_udc = { | ||
92 | .name = "pxa2xx-udc", | ||
93 | .id = -1, | ||
94 | .resource = pxa2xx_udc_resources, | ||
95 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | ||
96 | .dev = { | ||
97 | .platform_data = &pxa_udc_info, | ||
98 | .dma_mask = &udc_dma_mask, | ||
99 | } | ||
100 | }; | ||
101 | |||
102 | static struct resource pxafb_resources[] = { | ||
103 | [0] = { | ||
104 | .start = 0x44000000, | ||
105 | .end = 0x4400ffff, | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | }, | ||
108 | [1] = { | ||
109 | .start = IRQ_LCD, | ||
110 | .end = IRQ_LCD, | ||
111 | .flags = IORESOURCE_IRQ, | ||
112 | }, | ||
113 | }; | ||
114 | |||
115 | static u64 fb_dma_mask = ~(u64)0; | ||
116 | |||
117 | struct platform_device pxa_device_fb = { | ||
118 | .name = "pxa2xx-fb", | ||
119 | .id = -1, | ||
120 | .dev = { | ||
121 | .dma_mask = &fb_dma_mask, | ||
122 | .coherent_dma_mask = 0xffffffff, | ||
123 | }, | ||
124 | .num_resources = ARRAY_SIZE(pxafb_resources), | ||
125 | .resource = pxafb_resources, | ||
126 | }; | ||
127 | |||
128 | void __init set_pxa_fb_info(struct pxafb_mach_info *info) | ||
129 | { | ||
130 | pxa_register_device(&pxa_device_fb, info); | ||
131 | } | ||
132 | |||
133 | void __init set_pxa_fb_parent(struct device *parent_dev) | ||
134 | { | ||
135 | pxa_device_fb.dev.parent = parent_dev; | ||
136 | } | ||
137 | |||
138 | static struct resource pxa_resource_ffuart[] = { | ||
139 | { | ||
140 | .start = __PREG(FFUART), | ||
141 | .end = __PREG(FFUART) + 35, | ||
142 | .flags = IORESOURCE_MEM, | ||
143 | }, { | ||
144 | .start = IRQ_FFUART, | ||
145 | .end = IRQ_FFUART, | ||
146 | .flags = IORESOURCE_IRQ, | ||
147 | } | ||
148 | }; | ||
149 | |||
150 | struct platform_device pxa_device_ffuart= { | ||
151 | .name = "pxa2xx-uart", | ||
152 | .id = 0, | ||
153 | .resource = pxa_resource_ffuart, | ||
154 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | ||
155 | }; | ||
156 | |||
157 | static struct resource pxa_resource_btuart[] = { | ||
158 | { | ||
159 | .start = __PREG(BTUART), | ||
160 | .end = __PREG(BTUART) + 35, | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, { | ||
163 | .start = IRQ_BTUART, | ||
164 | .end = IRQ_BTUART, | ||
165 | .flags = IORESOURCE_IRQ, | ||
166 | } | ||
167 | }; | ||
168 | |||
169 | struct platform_device pxa_device_btuart = { | ||
170 | .name = "pxa2xx-uart", | ||
171 | .id = 1, | ||
172 | .resource = pxa_resource_btuart, | ||
173 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | ||
174 | }; | ||
175 | |||
176 | static struct resource pxa_resource_stuart[] = { | ||
177 | { | ||
178 | .start = __PREG(STUART), | ||
179 | .end = __PREG(STUART) + 35, | ||
180 | .flags = IORESOURCE_MEM, | ||
181 | }, { | ||
182 | .start = IRQ_STUART, | ||
183 | .end = IRQ_STUART, | ||
184 | .flags = IORESOURCE_IRQ, | ||
185 | } | ||
186 | }; | ||
187 | |||
188 | struct platform_device pxa_device_stuart = { | ||
189 | .name = "pxa2xx-uart", | ||
190 | .id = 2, | ||
191 | .resource = pxa_resource_stuart, | ||
192 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | ||
193 | }; | ||
194 | |||
195 | static struct resource pxa_resource_hwuart[] = { | ||
196 | { | ||
197 | .start = __PREG(HWUART), | ||
198 | .end = __PREG(HWUART) + 47, | ||
199 | .flags = IORESOURCE_MEM, | ||
200 | }, { | ||
201 | .start = IRQ_HWUART, | ||
202 | .end = IRQ_HWUART, | ||
203 | .flags = IORESOURCE_IRQ, | ||
204 | } | ||
205 | }; | ||
206 | |||
207 | struct platform_device pxa_device_hwuart = { | ||
208 | .name = "pxa2xx-uart", | ||
209 | .id = 3, | ||
210 | .resource = pxa_resource_hwuart, | ||
211 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | ||
212 | }; | ||
213 | |||
214 | static struct resource pxai2c_resources[] = { | ||
215 | { | ||
216 | .start = 0x40301680, | ||
217 | .end = 0x403016a3, | ||
218 | .flags = IORESOURCE_MEM, | ||
219 | }, { | ||
220 | .start = IRQ_I2C, | ||
221 | .end = IRQ_I2C, | ||
222 | .flags = IORESOURCE_IRQ, | ||
223 | }, | ||
224 | }; | ||
225 | |||
226 | struct platform_device pxa_device_i2c = { | ||
227 | .name = "pxa2xx-i2c", | ||
228 | .id = 0, | ||
229 | .resource = pxai2c_resources, | ||
230 | .num_resources = ARRAY_SIZE(pxai2c_resources), | ||
231 | }; | ||
232 | |||
233 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) | ||
234 | { | ||
235 | pxa_register_device(&pxa_device_i2c, info); | ||
236 | } | ||
237 | |||
238 | static struct resource pxai2s_resources[] = { | ||
239 | { | ||
240 | .start = 0x40400000, | ||
241 | .end = 0x40400083, | ||
242 | .flags = IORESOURCE_MEM, | ||
243 | }, { | ||
244 | .start = IRQ_I2S, | ||
245 | .end = IRQ_I2S, | ||
246 | .flags = IORESOURCE_IRQ, | ||
247 | }, | ||
248 | }; | ||
249 | |||
250 | struct platform_device pxa_device_i2s = { | ||
251 | .name = "pxa2xx-i2s", | ||
252 | .id = -1, | ||
253 | .resource = pxai2s_resources, | ||
254 | .num_resources = ARRAY_SIZE(pxai2s_resources), | ||
255 | }; | ||
256 | |||
257 | static u64 pxaficp_dmamask = ~(u32)0; | ||
258 | |||
259 | struct platform_device pxa_device_ficp = { | ||
260 | .name = "pxa2xx-ir", | ||
261 | .id = -1, | ||
262 | .dev = { | ||
263 | .dma_mask = &pxaficp_dmamask, | ||
264 | .coherent_dma_mask = 0xffffffff, | ||
265 | }, | ||
266 | }; | ||
267 | |||
268 | void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) | ||
269 | { | ||
270 | pxa_register_device(&pxa_device_ficp, info); | ||
271 | } | ||
272 | |||
273 | struct platform_device pxa_device_rtc = { | ||
274 | .name = "sa1100-rtc", | ||
275 | .id = -1, | ||
276 | }; | ||
277 | |||
278 | #ifdef CONFIG_PXA25x | ||
279 | |||
280 | static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32); | ||
281 | |||
282 | static struct resource pxa25x_resource_ssp[] = { | ||
283 | [0] = { | ||
284 | .start = 0x41000000, | ||
285 | .end = 0x4100001f, | ||
286 | .flags = IORESOURCE_MEM, | ||
287 | }, | ||
288 | [1] = { | ||
289 | .start = IRQ_SSP, | ||
290 | .end = IRQ_SSP, | ||
291 | .flags = IORESOURCE_IRQ, | ||
292 | }, | ||
293 | [2] = { | ||
294 | /* DRCMR for RX */ | ||
295 | .start = 13, | ||
296 | .end = 13, | ||
297 | .flags = IORESOURCE_DMA, | ||
298 | }, | ||
299 | [3] = { | ||
300 | /* DRCMR for TX */ | ||
301 | .start = 14, | ||
302 | .end = 14, | ||
303 | .flags = IORESOURCE_DMA, | ||
304 | }, | ||
305 | }; | ||
306 | |||
307 | struct platform_device pxa25x_device_ssp = { | ||
308 | .name = "pxa25x-ssp", | ||
309 | .id = 0, | ||
310 | .dev = { | ||
311 | .dma_mask = &pxa25x_ssp_dma_mask, | ||
312 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
313 | }, | ||
314 | .resource = pxa25x_resource_ssp, | ||
315 | .num_resources = ARRAY_SIZE(pxa25x_resource_ssp), | ||
316 | }; | ||
317 | |||
318 | static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32); | ||
319 | |||
320 | static struct resource pxa25x_resource_nssp[] = { | ||
321 | [0] = { | ||
322 | .start = 0x41400000, | ||
323 | .end = 0x4140002f, | ||
324 | .flags = IORESOURCE_MEM, | ||
325 | }, | ||
326 | [1] = { | ||
327 | .start = IRQ_NSSP, | ||
328 | .end = IRQ_NSSP, | ||
329 | .flags = IORESOURCE_IRQ, | ||
330 | }, | ||
331 | [2] = { | ||
332 | /* DRCMR for RX */ | ||
333 | .start = 15, | ||
334 | .end = 15, | ||
335 | .flags = IORESOURCE_DMA, | ||
336 | }, | ||
337 | [3] = { | ||
338 | /* DRCMR for TX */ | ||
339 | .start = 16, | ||
340 | .end = 16, | ||
341 | .flags = IORESOURCE_DMA, | ||
342 | }, | ||
343 | }; | ||
344 | |||
345 | struct platform_device pxa25x_device_nssp = { | ||
346 | .name = "pxa25x-nssp", | ||
347 | .id = 1, | ||
348 | .dev = { | ||
349 | .dma_mask = &pxa25x_nssp_dma_mask, | ||
350 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
351 | }, | ||
352 | .resource = pxa25x_resource_nssp, | ||
353 | .num_resources = ARRAY_SIZE(pxa25x_resource_nssp), | ||
354 | }; | ||
355 | |||
356 | static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32); | ||
357 | |||
358 | static struct resource pxa25x_resource_assp[] = { | ||
359 | [0] = { | ||
360 | .start = 0x41500000, | ||
361 | .end = 0x4150002f, | ||
362 | .flags = IORESOURCE_MEM, | ||
363 | }, | ||
364 | [1] = { | ||
365 | .start = IRQ_ASSP, | ||
366 | .end = IRQ_ASSP, | ||
367 | .flags = IORESOURCE_IRQ, | ||
368 | }, | ||
369 | [2] = { | ||
370 | /* DRCMR for RX */ | ||
371 | .start = 23, | ||
372 | .end = 23, | ||
373 | .flags = IORESOURCE_DMA, | ||
374 | }, | ||
375 | [3] = { | ||
376 | /* DRCMR for TX */ | ||
377 | .start = 24, | ||
378 | .end = 24, | ||
379 | .flags = IORESOURCE_DMA, | ||
380 | }, | ||
381 | }; | ||
382 | |||
383 | struct platform_device pxa25x_device_assp = { | ||
384 | /* ASSP is basically equivalent to NSSP */ | ||
385 | .name = "pxa25x-nssp", | ||
386 | .id = 2, | ||
387 | .dev = { | ||
388 | .dma_mask = &pxa25x_assp_dma_mask, | ||
389 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
390 | }, | ||
391 | .resource = pxa25x_resource_assp, | ||
392 | .num_resources = ARRAY_SIZE(pxa25x_resource_assp), | ||
393 | }; | ||
394 | #endif /* CONFIG_PXA25x */ | ||
395 | |||
396 | #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) | ||
397 | |||
398 | static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32); | ||
399 | |||
400 | static struct resource pxa27x_resource_ohci[] = { | ||
401 | [0] = { | ||
402 | .start = 0x4C000000, | ||
403 | .end = 0x4C00ff6f, | ||
404 | .flags = IORESOURCE_MEM, | ||
405 | }, | ||
406 | [1] = { | ||
407 | .start = IRQ_USBH1, | ||
408 | .end = IRQ_USBH1, | ||
409 | .flags = IORESOURCE_IRQ, | ||
410 | }, | ||
411 | }; | ||
412 | |||
413 | struct platform_device pxa27x_device_ohci = { | ||
414 | .name = "pxa27x-ohci", | ||
415 | .id = -1, | ||
416 | .dev = { | ||
417 | .dma_mask = &pxa27x_ohci_dma_mask, | ||
418 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
419 | }, | ||
420 | .num_resources = ARRAY_SIZE(pxa27x_resource_ohci), | ||
421 | .resource = pxa27x_resource_ohci, | ||
422 | }; | ||
423 | |||
424 | void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) | ||
425 | { | ||
426 | pxa_register_device(&pxa27x_device_ohci, info); | ||
427 | } | ||
428 | |||
429 | static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32); | ||
430 | |||
431 | static struct resource pxa27x_resource_ssp1[] = { | ||
432 | [0] = { | ||
433 | .start = 0x41000000, | ||
434 | .end = 0x4100003f, | ||
435 | .flags = IORESOURCE_MEM, | ||
436 | }, | ||
437 | [1] = { | ||
438 | .start = IRQ_SSP, | ||
439 | .end = IRQ_SSP, | ||
440 | .flags = IORESOURCE_IRQ, | ||
441 | }, | ||
442 | [2] = { | ||
443 | /* DRCMR for RX */ | ||
444 | .start = 13, | ||
445 | .end = 13, | ||
446 | .flags = IORESOURCE_DMA, | ||
447 | }, | ||
448 | [3] = { | ||
449 | /* DRCMR for TX */ | ||
450 | .start = 14, | ||
451 | .end = 14, | ||
452 | .flags = IORESOURCE_DMA, | ||
453 | }, | ||
454 | }; | ||
455 | |||
456 | struct platform_device pxa27x_device_ssp1 = { | ||
457 | .name = "pxa27x-ssp", | ||
458 | .id = 0, | ||
459 | .dev = { | ||
460 | .dma_mask = &pxa27x_ssp1_dma_mask, | ||
461 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
462 | }, | ||
463 | .resource = pxa27x_resource_ssp1, | ||
464 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1), | ||
465 | }; | ||
466 | |||
467 | static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32); | ||
468 | |||
469 | static struct resource pxa27x_resource_ssp2[] = { | ||
470 | [0] = { | ||
471 | .start = 0x41700000, | ||
472 | .end = 0x4170003f, | ||
473 | .flags = IORESOURCE_MEM, | ||
474 | }, | ||
475 | [1] = { | ||
476 | .start = IRQ_SSP2, | ||
477 | .end = IRQ_SSP2, | ||
478 | .flags = IORESOURCE_IRQ, | ||
479 | }, | ||
480 | [2] = { | ||
481 | /* DRCMR for RX */ | ||
482 | .start = 15, | ||
483 | .end = 15, | ||
484 | .flags = IORESOURCE_DMA, | ||
485 | }, | ||
486 | [3] = { | ||
487 | /* DRCMR for TX */ | ||
488 | .start = 16, | ||
489 | .end = 16, | ||
490 | .flags = IORESOURCE_DMA, | ||
491 | }, | ||
492 | }; | ||
493 | |||
494 | struct platform_device pxa27x_device_ssp2 = { | ||
495 | .name = "pxa27x-ssp", | ||
496 | .id = 1, | ||
497 | .dev = { | ||
498 | .dma_mask = &pxa27x_ssp2_dma_mask, | ||
499 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
500 | }, | ||
501 | .resource = pxa27x_resource_ssp2, | ||
502 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2), | ||
503 | }; | ||
504 | |||
505 | static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32); | ||
506 | |||
507 | static struct resource pxa27x_resource_ssp3[] = { | ||
508 | [0] = { | ||
509 | .start = 0x41900000, | ||
510 | .end = 0x4190003f, | ||
511 | .flags = IORESOURCE_MEM, | ||
512 | }, | ||
513 | [1] = { | ||
514 | .start = IRQ_SSP3, | ||
515 | .end = IRQ_SSP3, | ||
516 | .flags = IORESOURCE_IRQ, | ||
517 | }, | ||
518 | [2] = { | ||
519 | /* DRCMR for RX */ | ||
520 | .start = 66, | ||
521 | .end = 66, | ||
522 | .flags = IORESOURCE_DMA, | ||
523 | }, | ||
524 | [3] = { | ||
525 | /* DRCMR for TX */ | ||
526 | .start = 67, | ||
527 | .end = 67, | ||
528 | .flags = IORESOURCE_DMA, | ||
529 | }, | ||
530 | }; | ||
531 | |||
532 | struct platform_device pxa27x_device_ssp3 = { | ||
533 | .name = "pxa27x-ssp", | ||
534 | .id = 2, | ||
535 | .dev = { | ||
536 | .dma_mask = &pxa27x_ssp3_dma_mask, | ||
537 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
538 | }, | ||
539 | .resource = pxa27x_resource_ssp3, | ||
540 | .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3), | ||
541 | }; | ||
542 | #endif /* CONFIG_PXA27x || CONFIG_PXA3xx */ | ||
543 | |||
544 | #ifdef CONFIG_PXA3xx | ||
545 | static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32); | ||
546 | |||
547 | static struct resource pxa3xx_resource_ssp4[] = { | ||
548 | [0] = { | ||
549 | .start = 0x41a00000, | ||
550 | .end = 0x41a0003f, | ||
551 | .flags = IORESOURCE_MEM, | ||
552 | }, | ||
553 | [1] = { | ||
554 | .start = IRQ_SSP4, | ||
555 | .end = IRQ_SSP4, | ||
556 | .flags = IORESOURCE_IRQ, | ||
557 | }, | ||
558 | [2] = { | ||
559 | /* DRCMR for RX */ | ||
560 | .start = 2, | ||
561 | .end = 2, | ||
562 | .flags = IORESOURCE_DMA, | ||
563 | }, | ||
564 | [3] = { | ||
565 | /* DRCMR for TX */ | ||
566 | .start = 3, | ||
567 | .end = 3, | ||
568 | .flags = IORESOURCE_DMA, | ||
569 | }, | ||
570 | }; | ||
571 | |||
572 | struct platform_device pxa3xx_device_ssp4 = { | ||
573 | /* PXA3xx SSP is basically equivalent to PXA27x */ | ||
574 | .name = "pxa27x-ssp", | ||
575 | .id = 3, | ||
576 | .dev = { | ||
577 | .dma_mask = &pxa3xx_ssp4_dma_mask, | ||
578 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
579 | }, | ||
580 | .resource = pxa3xx_resource_ssp4, | ||
581 | .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4), | ||
582 | }; | ||
583 | |||
584 | static struct resource pxa3xx_resources_mci2[] = { | ||
585 | [0] = { | ||
586 | .start = 0x42000000, | ||
587 | .end = 0x42000fff, | ||
588 | .flags = IORESOURCE_MEM, | ||
589 | }, | ||
590 | [1] = { | ||
591 | .start = IRQ_MMC2, | ||
592 | .end = IRQ_MMC2, | ||
593 | .flags = IORESOURCE_IRQ, | ||
594 | }, | ||
595 | [2] = { | ||
596 | .start = 93, | ||
597 | .end = 93, | ||
598 | .flags = IORESOURCE_DMA, | ||
599 | }, | ||
600 | [3] = { | ||
601 | .start = 94, | ||
602 | .end = 94, | ||
603 | .flags = IORESOURCE_DMA, | ||
604 | }, | ||
605 | }; | ||
606 | |||
607 | struct platform_device pxa3xx_device_mci2 = { | ||
608 | .name = "pxa2xx-mci", | ||
609 | .id = 1, | ||
610 | .dev = { | ||
611 | .dma_mask = &pxamci_dmamask, | ||
612 | .coherent_dma_mask = 0xffffffff, | ||
613 | }, | ||
614 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2), | ||
615 | .resource = pxa3xx_resources_mci2, | ||
616 | }; | ||
617 | |||
618 | void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info) | ||
619 | { | ||
620 | pxa_register_device(&pxa3xx_device_mci2, info); | ||
621 | } | ||
622 | |||
623 | static struct resource pxa3xx_resources_mci3[] = { | ||
624 | [0] = { | ||
625 | .start = 0x42500000, | ||
626 | .end = 0x42500fff, | ||
627 | .flags = IORESOURCE_MEM, | ||
628 | }, | ||
629 | [1] = { | ||
630 | .start = IRQ_MMC3, | ||
631 | .end = IRQ_MMC3, | ||
632 | .flags = IORESOURCE_IRQ, | ||
633 | }, | ||
634 | [2] = { | ||
635 | .start = 100, | ||
636 | .end = 100, | ||
637 | .flags = IORESOURCE_DMA, | ||
638 | }, | ||
639 | [3] = { | ||
640 | .start = 101, | ||
641 | .end = 101, | ||
642 | .flags = IORESOURCE_DMA, | ||
643 | }, | ||
644 | }; | ||
645 | |||
646 | struct platform_device pxa3xx_device_mci3 = { | ||
647 | .name = "pxa2xx-mci", | ||
648 | .id = 2, | ||
649 | .dev = { | ||
650 | .dma_mask = &pxamci_dmamask, | ||
651 | .coherent_dma_mask = 0xffffffff, | ||
652 | }, | ||
653 | .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3), | ||
654 | .resource = pxa3xx_resources_mci3, | ||
655 | }; | ||
656 | |||
657 | void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info) | ||
658 | { | ||
659 | pxa_register_device(&pxa3xx_device_mci3, info); | ||
660 | } | ||
661 | |||
662 | #endif /* CONFIG_PXA3xx */ | ||
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h index 94c8d5cdd60a..96c7c8909068 100644 --- a/arch/arm/mach-pxa/devices.h +++ b/arch/arm/mach-pxa/devices.h | |||
@@ -1,4 +1,6 @@ | |||
1 | extern struct platform_device pxa_device_mci; | 1 | extern struct platform_device pxa_device_mci; |
2 | extern struct platform_device pxa3xx_device_mci2; | ||
3 | extern struct platform_device pxa3xx_device_mci3; | ||
2 | extern struct platform_device pxa_device_udc; | 4 | extern struct platform_device pxa_device_udc; |
3 | extern struct platform_device pxa_device_fb; | 5 | extern struct platform_device pxa_device_fb; |
4 | extern struct platform_device pxa_device_ffuart; | 6 | extern struct platform_device pxa_device_ffuart; |
@@ -12,3 +14,13 @@ extern struct platform_device pxa_device_rtc; | |||
12 | 14 | ||
13 | extern struct platform_device pxa27x_device_i2c_power; | 15 | extern struct platform_device pxa27x_device_i2c_power; |
14 | extern struct platform_device pxa27x_device_ohci; | 16 | extern struct platform_device pxa27x_device_ohci; |
17 | |||
18 | extern struct platform_device pxa25x_device_ssp; | ||
19 | extern struct platform_device pxa25x_device_nssp; | ||
20 | extern struct platform_device pxa25x_device_assp; | ||
21 | extern struct platform_device pxa27x_device_ssp1; | ||
22 | extern struct platform_device pxa27x_device_ssp2; | ||
23 | extern struct platform_device pxa27x_device_ssp3; | ||
24 | extern struct platform_device pxa3xx_device_ssp4; | ||
25 | |||
26 | void __init pxa_register_device(struct platform_device *dev, void *data); | ||
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c new file mode 100644 index 000000000000..ee0ae93c876a --- /dev/null +++ b/arch/arm/mach-pxa/eseries.c | |||
@@ -0,0 +1,101 @@ | |||
1 | /* | ||
2 | * Hardware definitions for the Toshiba eseries PDAs | ||
3 | * | ||
4 | * Copyright (c) 2003 Ian Molton <spyro@f2s.com> | ||
5 | * | ||
6 | * This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | |||
15 | #include <asm/setup.h> | ||
16 | #include <asm/mach/arch.h> | ||
17 | #include <asm/arch/hardware.h> | ||
18 | #include <asm/mach-types.h> | ||
19 | |||
20 | #include <generic.h> | ||
21 | |||
22 | /* Only e800 has 128MB RAM */ | ||
23 | static void __init eseries_fixup(struct machine_desc *desc, | ||
24 | struct tag *tags, char **cmdline, struct meminfo *mi) | ||
25 | { | ||
26 | mi->nr_banks=1; | ||
27 | mi->bank[0].start = 0xa0000000; | ||
28 | mi->bank[0].node = 0; | ||
29 | if (machine_is_e800()) | ||
30 | mi->bank[0].size = (128*1024*1024); | ||
31 | else | ||
32 | mi->bank[0].size = (64*1024*1024); | ||
33 | } | ||
34 | |||
35 | /* e-series machine definitions */ | ||
36 | |||
37 | #ifdef CONFIG_MACH_E330 | ||
38 | MACHINE_START(E330, "Toshiba e330") | ||
39 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
40 | .phys_io = 0x40000000, | ||
41 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
42 | .boot_params = 0xa0000100, | ||
43 | .map_io = pxa_map_io, | ||
44 | .init_irq = pxa25x_init_irq, | ||
45 | .fixup = eseries_fixup, | ||
46 | .timer = &pxa_timer, | ||
47 | MACHINE_END | ||
48 | #endif | ||
49 | |||
50 | #ifdef CONFIG_MACH_E740 | ||
51 | MACHINE_START(E740, "Toshiba e740") | ||
52 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
53 | .phys_io = 0x40000000, | ||
54 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
55 | .boot_params = 0xa0000100, | ||
56 | .map_io = pxa_map_io, | ||
57 | .init_irq = pxa25x_init_irq, | ||
58 | .fixup = eseries_fixup, | ||
59 | .timer = &pxa_timer, | ||
60 | MACHINE_END | ||
61 | #endif | ||
62 | |||
63 | #ifdef CONFIG_MACH_E750 | ||
64 | MACHINE_START(E750, "Toshiba e750") | ||
65 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
66 | .phys_io = 0x40000000, | ||
67 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
68 | .boot_params = 0xa0000100, | ||
69 | .map_io = pxa_map_io, | ||
70 | .init_irq = pxa25x_init_irq, | ||
71 | .fixup = eseries_fixup, | ||
72 | .timer = &pxa_timer, | ||
73 | MACHINE_END | ||
74 | #endif | ||
75 | |||
76 | #ifdef CONFIG_MACH_E400 | ||
77 | MACHINE_START(E400, "Toshiba e400") | ||
78 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
79 | .phys_io = 0x40000000, | ||
80 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
81 | .boot_params = 0xa0000100, | ||
82 | .map_io = pxa_map_io, | ||
83 | .init_irq = pxa25x_init_irq, | ||
84 | .fixup = eseries_fixup, | ||
85 | .timer = &pxa_timer, | ||
86 | MACHINE_END | ||
87 | #endif | ||
88 | |||
89 | #ifdef CONFIG_MACH_E800 | ||
90 | MACHINE_START(E800, "Toshiba e800") | ||
91 | /* Maintainer: Ian Molton (spyro@f2s.com) */ | ||
92 | .phys_io = 0x40000000, | ||
93 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
94 | .boot_params = 0xa0000100, | ||
95 | .map_io = pxa_map_io, | ||
96 | .init_irq = pxa25x_init_irq, | ||
97 | .fixup = eseries_fixup, | ||
98 | .timer = &pxa_timer, | ||
99 | MACHINE_END | ||
100 | #endif | ||
101 | |||
diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 1c34946ee16e..698aeec52961 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c | |||
@@ -20,7 +20,6 @@ | |||
20 | #include <linux/kernel.h> | 20 | #include <linux/kernel.h> |
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/platform_device.h> | ||
24 | #include <linux/ioport.h> | 23 | #include <linux/ioport.h> |
25 | #include <linux/pm.h> | 24 | #include <linux/pm.h> |
26 | #include <linux/string.h> | 25 | #include <linux/string.h> |
@@ -33,13 +32,7 @@ | |||
33 | 32 | ||
34 | #include <asm/arch/pxa-regs.h> | 33 | #include <asm/arch/pxa-regs.h> |
35 | #include <asm/arch/gpio.h> | 34 | #include <asm/arch/gpio.h> |
36 | #include <asm/arch/udc.h> | ||
37 | #include <asm/arch/pxafb.h> | ||
38 | #include <asm/arch/mmc.h> | ||
39 | #include <asm/arch/irda.h> | ||
40 | #include <asm/arch/i2c.h> | ||
41 | 35 | ||
42 | #include "devices.h" | ||
43 | #include "generic.h" | 36 | #include "generic.h" |
44 | 37 | ||
45 | /* | 38 | /* |
@@ -203,7 +196,7 @@ static struct map_desc standard_io_desc[] __initdata = { | |||
203 | }, { /* Mem Ctl */ | 196 | }, { /* Mem Ctl */ |
204 | .virtual = 0xf6000000, | 197 | .virtual = 0xf6000000, |
205 | .pfn = __phys_to_pfn(0x48000000), | 198 | .pfn = __phys_to_pfn(0x48000000), |
206 | .length = 0x00100000, | 199 | .length = 0x00200000, |
207 | .type = MT_DEVICE | 200 | .type = MT_DEVICE |
208 | }, { /* USB host */ | 201 | }, { /* USB host */ |
209 | .virtual = 0xf8000000, | 202 | .virtual = 0xf8000000, |
@@ -233,245 +226,3 @@ void __init pxa_map_io(void) | |||
233 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); | 226 | iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); |
234 | get_clk_frequency_khz(1); | 227 | get_clk_frequency_khz(1); |
235 | } | 228 | } |
236 | |||
237 | |||
238 | static struct resource pxamci_resources[] = { | ||
239 | [0] = { | ||
240 | .start = 0x41100000, | ||
241 | .end = 0x41100fff, | ||
242 | .flags = IORESOURCE_MEM, | ||
243 | }, | ||
244 | [1] = { | ||
245 | .start = IRQ_MMC, | ||
246 | .end = IRQ_MMC, | ||
247 | .flags = IORESOURCE_IRQ, | ||
248 | }, | ||
249 | }; | ||
250 | |||
251 | static u64 pxamci_dmamask = 0xffffffffUL; | ||
252 | |||
253 | struct platform_device pxa_device_mci = { | ||
254 | .name = "pxa2xx-mci", | ||
255 | .id = -1, | ||
256 | .dev = { | ||
257 | .dma_mask = &pxamci_dmamask, | ||
258 | .coherent_dma_mask = 0xffffffff, | ||
259 | }, | ||
260 | .num_resources = ARRAY_SIZE(pxamci_resources), | ||
261 | .resource = pxamci_resources, | ||
262 | }; | ||
263 | |||
264 | void __init pxa_set_mci_info(struct pxamci_platform_data *info) | ||
265 | { | ||
266 | pxa_device_mci.dev.platform_data = info; | ||
267 | } | ||
268 | |||
269 | |||
270 | static struct pxa2xx_udc_mach_info pxa_udc_info; | ||
271 | |||
272 | void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) | ||
273 | { | ||
274 | memcpy(&pxa_udc_info, info, sizeof *info); | ||
275 | } | ||
276 | |||
277 | static struct resource pxa2xx_udc_resources[] = { | ||
278 | [0] = { | ||
279 | .start = 0x40600000, | ||
280 | .end = 0x4060ffff, | ||
281 | .flags = IORESOURCE_MEM, | ||
282 | }, | ||
283 | [1] = { | ||
284 | .start = IRQ_USB, | ||
285 | .end = IRQ_USB, | ||
286 | .flags = IORESOURCE_IRQ, | ||
287 | }, | ||
288 | }; | ||
289 | |||
290 | static u64 udc_dma_mask = ~(u32)0; | ||
291 | |||
292 | struct platform_device pxa_device_udc = { | ||
293 | .name = "pxa2xx-udc", | ||
294 | .id = -1, | ||
295 | .resource = pxa2xx_udc_resources, | ||
296 | .num_resources = ARRAY_SIZE(pxa2xx_udc_resources), | ||
297 | .dev = { | ||
298 | .platform_data = &pxa_udc_info, | ||
299 | .dma_mask = &udc_dma_mask, | ||
300 | } | ||
301 | }; | ||
302 | |||
303 | static struct resource pxafb_resources[] = { | ||
304 | [0] = { | ||
305 | .start = 0x44000000, | ||
306 | .end = 0x4400ffff, | ||
307 | .flags = IORESOURCE_MEM, | ||
308 | }, | ||
309 | [1] = { | ||
310 | .start = IRQ_LCD, | ||
311 | .end = IRQ_LCD, | ||
312 | .flags = IORESOURCE_IRQ, | ||
313 | }, | ||
314 | }; | ||
315 | |||
316 | static u64 fb_dma_mask = ~(u64)0; | ||
317 | |||
318 | struct platform_device pxa_device_fb = { | ||
319 | .name = "pxa2xx-fb", | ||
320 | .id = -1, | ||
321 | .dev = { | ||
322 | .dma_mask = &fb_dma_mask, | ||
323 | .coherent_dma_mask = 0xffffffff, | ||
324 | }, | ||
325 | .num_resources = ARRAY_SIZE(pxafb_resources), | ||
326 | .resource = pxafb_resources, | ||
327 | }; | ||
328 | |||
329 | void __init set_pxa_fb_info(struct pxafb_mach_info *info) | ||
330 | { | ||
331 | pxa_device_fb.dev.platform_data = info; | ||
332 | } | ||
333 | |||
334 | void __init set_pxa_fb_parent(struct device *parent_dev) | ||
335 | { | ||
336 | pxa_device_fb.dev.parent = parent_dev; | ||
337 | } | ||
338 | |||
339 | static struct resource pxa_resource_ffuart[] = { | ||
340 | { | ||
341 | .start = __PREG(FFUART), | ||
342 | .end = __PREG(FFUART) + 35, | ||
343 | .flags = IORESOURCE_MEM, | ||
344 | }, { | ||
345 | .start = IRQ_FFUART, | ||
346 | .end = IRQ_FFUART, | ||
347 | .flags = IORESOURCE_IRQ, | ||
348 | } | ||
349 | }; | ||
350 | |||
351 | struct platform_device pxa_device_ffuart= { | ||
352 | .name = "pxa2xx-uart", | ||
353 | .id = 0, | ||
354 | .resource = pxa_resource_ffuart, | ||
355 | .num_resources = ARRAY_SIZE(pxa_resource_ffuart), | ||
356 | }; | ||
357 | |||
358 | static struct resource pxa_resource_btuart[] = { | ||
359 | { | ||
360 | .start = __PREG(BTUART), | ||
361 | .end = __PREG(BTUART) + 35, | ||
362 | .flags = IORESOURCE_MEM, | ||
363 | }, { | ||
364 | .start = IRQ_BTUART, | ||
365 | .end = IRQ_BTUART, | ||
366 | .flags = IORESOURCE_IRQ, | ||
367 | } | ||
368 | }; | ||
369 | |||
370 | struct platform_device pxa_device_btuart = { | ||
371 | .name = "pxa2xx-uart", | ||
372 | .id = 1, | ||
373 | .resource = pxa_resource_btuart, | ||
374 | .num_resources = ARRAY_SIZE(pxa_resource_btuart), | ||
375 | }; | ||
376 | |||
377 | static struct resource pxa_resource_stuart[] = { | ||
378 | { | ||
379 | .start = __PREG(STUART), | ||
380 | .end = __PREG(STUART) + 35, | ||
381 | .flags = IORESOURCE_MEM, | ||
382 | }, { | ||
383 | .start = IRQ_STUART, | ||
384 | .end = IRQ_STUART, | ||
385 | .flags = IORESOURCE_IRQ, | ||
386 | } | ||
387 | }; | ||
388 | |||
389 | struct platform_device pxa_device_stuart = { | ||
390 | .name = "pxa2xx-uart", | ||
391 | .id = 2, | ||
392 | .resource = pxa_resource_stuart, | ||
393 | .num_resources = ARRAY_SIZE(pxa_resource_stuart), | ||
394 | }; | ||
395 | |||
396 | static struct resource pxa_resource_hwuart[] = { | ||
397 | { | ||
398 | .start = __PREG(HWUART), | ||
399 | .end = __PREG(HWUART) + 47, | ||
400 | .flags = IORESOURCE_MEM, | ||
401 | }, { | ||
402 | .start = IRQ_HWUART, | ||
403 | .end = IRQ_HWUART, | ||
404 | .flags = IORESOURCE_IRQ, | ||
405 | } | ||
406 | }; | ||
407 | |||
408 | struct platform_device pxa_device_hwuart = { | ||
409 | .name = "pxa2xx-uart", | ||
410 | .id = 3, | ||
411 | .resource = pxa_resource_hwuart, | ||
412 | .num_resources = ARRAY_SIZE(pxa_resource_hwuart), | ||
413 | }; | ||
414 | |||
415 | static struct resource pxai2c_resources[] = { | ||
416 | { | ||
417 | .start = 0x40301680, | ||
418 | .end = 0x403016a3, | ||
419 | .flags = IORESOURCE_MEM, | ||
420 | }, { | ||
421 | .start = IRQ_I2C, | ||
422 | .end = IRQ_I2C, | ||
423 | .flags = IORESOURCE_IRQ, | ||
424 | }, | ||
425 | }; | ||
426 | |||
427 | struct platform_device pxa_device_i2c = { | ||
428 | .name = "pxa2xx-i2c", | ||
429 | .id = 0, | ||
430 | .resource = pxai2c_resources, | ||
431 | .num_resources = ARRAY_SIZE(pxai2c_resources), | ||
432 | }; | ||
433 | |||
434 | void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) | ||
435 | { | ||
436 | pxa_device_i2c.dev.platform_data = info; | ||
437 | } | ||
438 | |||
439 | static struct resource pxai2s_resources[] = { | ||
440 | { | ||
441 | .start = 0x40400000, | ||
442 | .end = 0x40400083, | ||
443 | .flags = IORESOURCE_MEM, | ||
444 | }, { | ||
445 | .start = IRQ_I2S, | ||
446 | .end = IRQ_I2S, | ||
447 | .flags = IORESOURCE_IRQ, | ||
448 | }, | ||
449 | }; | ||
450 | |||
451 | struct platform_device pxa_device_i2s = { | ||
452 | .name = "pxa2xx-i2s", | ||
453 | .id = -1, | ||
454 | .resource = pxai2s_resources, | ||
455 | .num_resources = ARRAY_SIZE(pxai2s_resources), | ||
456 | }; | ||
457 | |||
458 | static u64 pxaficp_dmamask = ~(u32)0; | ||
459 | |||
460 | struct platform_device pxa_device_ficp = { | ||
461 | .name = "pxa2xx-ir", | ||
462 | .id = -1, | ||
463 | .dev = { | ||
464 | .dma_mask = &pxaficp_dmamask, | ||
465 | .coherent_dma_mask = 0xffffffff, | ||
466 | }, | ||
467 | }; | ||
468 | |||
469 | void __init pxa_set_ficp_info(struct pxaficp_platform_data *info) | ||
470 | { | ||
471 | pxa_device_ficp.dev.platform_data = info; | ||
472 | } | ||
473 | |||
474 | struct platform_device pxa_device_rtc = { | ||
475 | .name = "sa1100-rtc", | ||
476 | .id = -1, | ||
477 | }; | ||
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c index 465108da2851..0a9434432c55 100644 --- a/arch/arm/mach-pxa/idp.c +++ b/arch/arm/mach-pxa/idp.c | |||
@@ -54,7 +54,7 @@ static struct resource smc91x_resources[] = { | |||
54 | [1] = { | 54 | [1] = { |
55 | .start = IRQ_GPIO(4), | 55 | .start = IRQ_GPIO(4), |
56 | .end = IRQ_GPIO(4), | 56 | .end = IRQ_GPIO(4), |
57 | .flags = IORESOURCE_IRQ, | 57 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
58 | } | 58 | } |
59 | }; | 59 | }; |
60 | 60 | ||
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c new file mode 100644 index 000000000000..0a4b54c21314 --- /dev/null +++ b/arch/arm/mach-pxa/littleton.c | |||
@@ -0,0 +1,325 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/littleton.c | ||
3 | * | ||
4 | * Support for the Marvell Littleton Development Platform. | ||
5 | * | ||
6 | * Author: Jason Chagas (largely modified code) | ||
7 | * Created: Nov 20, 2006 | ||
8 | * Copyright: (C) Copyright 2006 Marvell International Ltd. | ||
9 | * | ||
10 | * 2007-11-22 modified to align with latest kernel | ||
11 | * eric miao <eric.miao@marvell.com> | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * publishhed by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #include <linux/init.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/clk.h> | ||
23 | |||
24 | #include <asm/types.h> | ||
25 | #include <asm/setup.h> | ||
26 | #include <asm/memory.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/hardware.h> | ||
29 | #include <asm/irq.h> | ||
30 | |||
31 | #include <asm/mach/arch.h> | ||
32 | #include <asm/mach/map.h> | ||
33 | #include <asm/mach/irq.h> | ||
34 | |||
35 | #include <asm/arch/pxa-regs.h> | ||
36 | #include <asm/arch/mfp-pxa300.h> | ||
37 | #include <asm/arch/gpio.h> | ||
38 | #include <asm/arch/pxafb.h> | ||
39 | #include <asm/arch/ssp.h> | ||
40 | #include <asm/arch/littleton.h> | ||
41 | |||
42 | #include "generic.h" | ||
43 | |||
44 | #define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x) | ||
45 | |||
46 | /* Littleton MFP configurations */ | ||
47 | static mfp_cfg_t littleton_mfp_cfg[] __initdata = { | ||
48 | /* LCD */ | ||
49 | GPIO54_LCD_LDD_0, | ||
50 | GPIO55_LCD_LDD_1, | ||
51 | GPIO56_LCD_LDD_2, | ||
52 | GPIO57_LCD_LDD_3, | ||
53 | GPIO58_LCD_LDD_4, | ||
54 | GPIO59_LCD_LDD_5, | ||
55 | GPIO60_LCD_LDD_6, | ||
56 | GPIO61_LCD_LDD_7, | ||
57 | GPIO62_LCD_LDD_8, | ||
58 | GPIO63_LCD_LDD_9, | ||
59 | GPIO64_LCD_LDD_10, | ||
60 | GPIO65_LCD_LDD_11, | ||
61 | GPIO66_LCD_LDD_12, | ||
62 | GPIO67_LCD_LDD_13, | ||
63 | GPIO68_LCD_LDD_14, | ||
64 | GPIO69_LCD_LDD_15, | ||
65 | GPIO70_LCD_LDD_16, | ||
66 | GPIO71_LCD_LDD_17, | ||
67 | GPIO72_LCD_FCLK, | ||
68 | GPIO73_LCD_LCLK, | ||
69 | GPIO74_LCD_PCLK, | ||
70 | GPIO75_LCD_BIAS, | ||
71 | |||
72 | /* SSP2 */ | ||
73 | GPIO25_SSP2_SCLK, | ||
74 | GPIO17_SSP2_FRM, | ||
75 | GPIO27_SSP2_TXD, | ||
76 | |||
77 | /* Debug Ethernet */ | ||
78 | GPIO90_GPIO, | ||
79 | }; | ||
80 | |||
81 | static struct resource smc91x_resources[] = { | ||
82 | [0] = { | ||
83 | .start = (LITTLETON_ETH_PHYS + 0x300), | ||
84 | .end = (LITTLETON_ETH_PHYS + 0xfffff), | ||
85 | .flags = IORESOURCE_MEM, | ||
86 | }, | ||
87 | [1] = { | ||
88 | .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), | ||
89 | .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), | ||
90 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, | ||
91 | } | ||
92 | }; | ||
93 | |||
94 | static struct platform_device smc91x_device = { | ||
95 | .name = "smc91x", | ||
96 | .id = 0, | ||
97 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
98 | .resource = smc91x_resources, | ||
99 | }; | ||
100 | |||
101 | #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULES) | ||
102 | /* use bit 30, 31 as the indicator of command parameter number */ | ||
103 | #define CMD0(x) ((0x00000000) | ((x) << 9)) | ||
104 | #define CMD1(x, x1) ((0x40000000) | ((x) << 9) | 0x100 | (x1)) | ||
105 | #define CMD2(x, x1, x2) ((0x80000000) | ((x) << 18) | 0x20000 |\ | ||
106 | ((x1) << 9) | 0x100 | (x2)) | ||
107 | |||
108 | static uint32_t lcd_panel_reset[] = { | ||
109 | CMD0(0x1), /* reset */ | ||
110 | CMD0(0x0), /* nop */ | ||
111 | CMD0(0x0), /* nop */ | ||
112 | CMD0(0x0), /* nop */ | ||
113 | }; | ||
114 | |||
115 | static uint32_t lcd_panel_on[] = { | ||
116 | CMD0(0x29), /* Display ON */ | ||
117 | CMD2(0xB8, 0xFF, 0xF9), /* Output Control */ | ||
118 | CMD0(0x11), /* Sleep out */ | ||
119 | CMD1(0xB0, 0x16), /* Wake */ | ||
120 | }; | ||
121 | |||
122 | static uint32_t lcd_panel_off[] = { | ||
123 | CMD0(0x28), /* Display OFF */ | ||
124 | CMD2(0xB8, 0x80, 0x02), /* Output Control */ | ||
125 | CMD0(0x10), /* Sleep in */ | ||
126 | CMD1(0xB0, 0x00), /* Deep stand by in */ | ||
127 | }; | ||
128 | |||
129 | static uint32_t lcd_vga_pass_through[] = { | ||
130 | CMD1(0xB0, 0x16), | ||
131 | CMD1(0xBC, 0x80), | ||
132 | CMD1(0xE1, 0x00), | ||
133 | CMD1(0x36, 0x50), | ||
134 | CMD1(0x3B, 0x00), | ||
135 | }; | ||
136 | |||
137 | static uint32_t lcd_qvga_pass_through[] = { | ||
138 | CMD1(0xB0, 0x16), | ||
139 | CMD1(0xBC, 0x81), | ||
140 | CMD1(0xE1, 0x00), | ||
141 | CMD1(0x36, 0x50), | ||
142 | CMD1(0x3B, 0x22), | ||
143 | }; | ||
144 | |||
145 | static uint32_t lcd_vga_transfer[] = { | ||
146 | CMD1(0xcf, 0x02), /* Blanking period control (1) */ | ||
147 | CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ | ||
148 | CMD1(0xd1, 0x01), /* CKV timing control on/off */ | ||
149 | CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */ | ||
150 | CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */ | ||
151 | CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */ | ||
152 | CMD1(0xd5, 0x14), /* ASW timing control (2) */ | ||
153 | CMD0(0x21), /* Invert for normally black display */ | ||
154 | CMD0(0x29), /* Display on */ | ||
155 | }; | ||
156 | |||
157 | static uint32_t lcd_qvga_transfer[] = { | ||
158 | CMD1(0xd6, 0x02), /* Blanking period control (1) */ | ||
159 | CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */ | ||
160 | CMD1(0xd8, 0x01), /* CKV timing control on/off */ | ||
161 | CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */ | ||
162 | CMD2(0xde, 0x05, 0x0a), /* OEV timing control */ | ||
163 | CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */ | ||
164 | CMD1(0xe0, 0x0a), /* ASW timing control (2) */ | ||
165 | CMD0(0x21), /* Invert for normally black display */ | ||
166 | CMD0(0x29), /* Display on */ | ||
167 | }; | ||
168 | |||
169 | static uint32_t lcd_panel_config[] = { | ||
170 | CMD2(0xb8, 0xff, 0xf9), /* Output control */ | ||
171 | CMD0(0x11), /* sleep out */ | ||
172 | CMD1(0xba, 0x01), /* Display mode (1) */ | ||
173 | CMD1(0xbb, 0x00), /* Display mode (2) */ | ||
174 | CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */ | ||
175 | CMD1(0xbf, 0x10), /* Drive system change control */ | ||
176 | CMD1(0xb1, 0x56), /* Booster operation setup */ | ||
177 | CMD1(0xb2, 0x33), /* Booster mode setup */ | ||
178 | CMD1(0xb3, 0x11), /* Booster frequency setup */ | ||
179 | CMD1(0xb4, 0x02), /* Op amp/system clock */ | ||
180 | CMD1(0xb5, 0x35), /* VCS voltage */ | ||
181 | CMD1(0xb6, 0x40), /* VCOM voltage */ | ||
182 | CMD1(0xb7, 0x03), /* External display signal */ | ||
183 | CMD1(0xbd, 0x00), /* ASW slew rate */ | ||
184 | CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */ | ||
185 | CMD1(0xc0, 0x11), /* Sleep out FR count (A) */ | ||
186 | CMD1(0xc1, 0x11), /* Sleep out FR count (B) */ | ||
187 | CMD1(0xc2, 0x11), /* Sleep out FR count (C) */ | ||
188 | CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */ | ||
189 | CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */ | ||
190 | CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */ | ||
191 | CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */ | ||
192 | CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */ | ||
193 | CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */ | ||
194 | CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */ | ||
195 | CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */ | ||
196 | CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */ | ||
197 | }; | ||
198 | |||
199 | static void ssp_reconfig(struct ssp_dev *dev, int nparam) | ||
200 | { | ||
201 | static int last_nparam = -1; | ||
202 | |||
203 | /* check if it is necessary to re-config SSP */ | ||
204 | if (nparam == last_nparam) | ||
205 | return; | ||
206 | |||
207 | ssp_disable(dev); | ||
208 | ssp_config(dev, (nparam == 2) ? 0x0010058a : 0x00100581, 0x18, 0, 0); | ||
209 | |||
210 | last_nparam = nparam; | ||
211 | } | ||
212 | |||
213 | static void ssp_send_cmd(uint32_t *cmd, int num) | ||
214 | { | ||
215 | static int ssp_initialized; | ||
216 | static struct ssp_dev ssp2; | ||
217 | |||
218 | int i; | ||
219 | |||
220 | if (!ssp_initialized) { | ||
221 | ssp_init(&ssp2, 2, SSP_NO_IRQ); | ||
222 | ssp_initialized = 1; | ||
223 | } | ||
224 | |||
225 | clk_enable(ssp2.ssp->clk); | ||
226 | for (i = 0; i < num; i++, cmd++) { | ||
227 | ssp_reconfig(&ssp2, (*cmd >> 30) & 0x3); | ||
228 | ssp_write_word(&ssp2, *cmd & 0x3fffffff); | ||
229 | |||
230 | /* FIXME: ssp_flush() is mandatory here to work */ | ||
231 | ssp_flush(&ssp2); | ||
232 | } | ||
233 | clk_disable(ssp2.ssp->clk); | ||
234 | } | ||
235 | |||
236 | static void littleton_lcd_power(int on, struct fb_var_screeninfo *var) | ||
237 | { | ||
238 | if (on) { | ||
239 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_on)); | ||
240 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_reset)); | ||
241 | if (var->xres > 240) { | ||
242 | /* VGA */ | ||
243 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_pass_through)); | ||
244 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); | ||
245 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_vga_transfer)); | ||
246 | } else { | ||
247 | /* QVGA */ | ||
248 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_pass_through)); | ||
249 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_config)); | ||
250 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_qvga_transfer)); | ||
251 | } | ||
252 | } else | ||
253 | ssp_send_cmd(ARRAY_AND_SIZE(lcd_panel_off)); | ||
254 | } | ||
255 | |||
256 | static struct pxafb_mode_info tpo_tdo24mtea1_modes[] = { | ||
257 | [0] = { | ||
258 | /* VGA */ | ||
259 | .pixclock = 38250, | ||
260 | .xres = 480, | ||
261 | .yres = 640, | ||
262 | .bpp = 16, | ||
263 | .hsync_len = 8, | ||
264 | .left_margin = 8, | ||
265 | .right_margin = 24, | ||
266 | .vsync_len = 2, | ||
267 | .upper_margin = 2, | ||
268 | .lower_margin = 4, | ||
269 | .sync = 0, | ||
270 | }, | ||
271 | [1] = { | ||
272 | /* QVGA */ | ||
273 | .pixclock = 153000, | ||
274 | .xres = 240, | ||
275 | .yres = 320, | ||
276 | .bpp = 16, | ||
277 | .hsync_len = 8, | ||
278 | .left_margin = 8, | ||
279 | .right_margin = 88, | ||
280 | .vsync_len = 2, | ||
281 | .upper_margin = 2, | ||
282 | .lower_margin = 2, | ||
283 | .sync = 0, | ||
284 | }, | ||
285 | }; | ||
286 | |||
287 | static struct pxafb_mach_info littleton_lcd_info = { | ||
288 | .modes = tpo_tdo24mtea1_modes, | ||
289 | .num_modes = 2, | ||
290 | .lccr0 = LCCR0_Act, | ||
291 | .lccr3 = LCCR3_HSP | LCCR3_VSP, | ||
292 | .pxafb_lcd_power = littleton_lcd_power, | ||
293 | }; | ||
294 | |||
295 | static void littleton_init_lcd(void) | ||
296 | { | ||
297 | set_pxa_fb_info(&littleton_lcd_info); | ||
298 | } | ||
299 | #else | ||
300 | static inline void littleton_init_lcd(void) {}; | ||
301 | #endif /* CONFIG_FB_PXA || CONFIG_FB_PXA_MODULES */ | ||
302 | |||
303 | static void __init littleton_init(void) | ||
304 | { | ||
305 | /* initialize MFP configurations */ | ||
306 | pxa3xx_mfp_config(ARRAY_AND_SIZE(littleton_mfp_cfg)); | ||
307 | |||
308 | /* | ||
309 | * Note: we depend bootloader set the correct | ||
310 | * value to MSC register for SMC91x. | ||
311 | */ | ||
312 | platform_device_register(&smc91x_device); | ||
313 | |||
314 | littleton_init_lcd(); | ||
315 | } | ||
316 | |||
317 | MACHINE_START(LITTLETON, "Marvell Form Factor Development Platform (aka Littleton)") | ||
318 | .phys_io = 0x40000000, | ||
319 | .boot_params = 0xa0000100, | ||
320 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
321 | .map_io = pxa_map_io, | ||
322 | .init_irq = pxa3xx_init_irq, | ||
323 | .timer = &pxa_timer, | ||
324 | .init_machine = littleton_init, | ||
325 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c index 78ebad063cba..afa62ffe3ad5 100644 --- a/arch/arm/mach-pxa/lpd270.c +++ b/arch/arm/mach-pxa/lpd270.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <asm/mach/flash.h> | 38 | #include <asm/mach/flash.h> |
39 | 39 | ||
40 | #include <asm/arch/pxa-regs.h> | 40 | #include <asm/arch/pxa-regs.h> |
41 | #include <asm/arch/pxa2xx-regs.h> | ||
41 | #include <asm/arch/lpd270.h> | 42 | #include <asm/arch/lpd270.h> |
42 | #include <asm/arch/audio.h> | 43 | #include <asm/arch/audio.h> |
43 | #include <asm/arch/pxafb.h> | 44 | #include <asm/arch/pxafb.h> |
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c index 1d3112dc629e..e7ae4bb3e361 100644 --- a/arch/arm/mach-pxa/lubbock.c +++ b/arch/arm/mach-pxa/lubbock.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <asm/hardware/sa1111.h> | 41 | #include <asm/hardware/sa1111.h> |
42 | 42 | ||
43 | #include <asm/arch/pxa-regs.h> | 43 | #include <asm/arch/pxa-regs.h> |
44 | #include <asm/arch/pxa2xx-regs.h> | ||
44 | #include <asm/arch/lubbock.h> | 45 | #include <asm/arch/lubbock.h> |
45 | #include <asm/arch/udc.h> | 46 | #include <asm/arch/udc.h> |
46 | #include <asm/arch/irda.h> | 47 | #include <asm/arch/irda.h> |
@@ -136,9 +137,13 @@ static struct sys_device lubbock_irq_device = { | |||
136 | 137 | ||
137 | static int __init lubbock_irq_device_init(void) | 138 | static int __init lubbock_irq_device_init(void) |
138 | { | 139 | { |
139 | int ret = sysdev_class_register(&lubbock_irq_sysclass); | 140 | int ret = -ENODEV; |
140 | if (ret == 0) | 141 | |
141 | ret = sysdev_register(&lubbock_irq_device); | 142 | if (machine_is_lubbock()) { |
143 | ret = sysdev_class_register(&lubbock_irq_sysclass); | ||
144 | if (ret == 0) | ||
145 | ret = sysdev_register(&lubbock_irq_device); | ||
146 | } | ||
142 | return ret; | 147 | return ret; |
143 | } | 148 | } |
144 | 149 | ||
@@ -191,7 +196,7 @@ static struct resource smc91x_resources[] = { | |||
191 | [1] = { | 196 | [1] = { |
192 | .start = LUBBOCK_ETH_IRQ, | 197 | .start = LUBBOCK_ETH_IRQ, |
193 | .end = LUBBOCK_ETH_IRQ, | 198 | .end = LUBBOCK_ETH_IRQ, |
194 | .flags = IORESOURCE_IRQ, | 199 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
195 | }, | 200 | }, |
196 | [2] = { | 201 | [2] = { |
197 | .name = "smc91x-attrib", | 202 | .name = "smc91x-attrib", |
@@ -206,30 +211,13 @@ static struct resource smc91x_resources[] = { | |||
206 | * (to J5) and poking board registers (as done below). Else it's only useful | 211 | * (to J5) and poking board registers (as done below). Else it's only useful |
207 | * for the temperature sensors. | 212 | * for the temperature sensors. |
208 | */ | 213 | */ |
209 | static struct resource pxa_ssp_resources[] = { | ||
210 | [0] = { | ||
211 | .start = __PREG(SSCR0_P(1)), | ||
212 | .end = __PREG(SSCR0_P(1)) + 0x14, | ||
213 | .flags = IORESOURCE_MEM, | ||
214 | }, | ||
215 | [1] = { | ||
216 | .start = IRQ_SSP, | ||
217 | .end = IRQ_SSP, | ||
218 | .flags = IORESOURCE_IRQ, | ||
219 | }, | ||
220 | }; | ||
221 | |||
222 | static struct pxa2xx_spi_master pxa_ssp_master_info = { | 214 | static struct pxa2xx_spi_master pxa_ssp_master_info = { |
223 | .ssp_type = PXA25x_SSP, | ||
224 | .clock_enable = CKEN_SSP, | ||
225 | .num_chipselect = 0, | 215 | .num_chipselect = 0, |
226 | }; | 216 | }; |
227 | 217 | ||
228 | static struct platform_device pxa_ssp = { | 218 | static struct platform_device pxa_ssp = { |
229 | .name = "pxa2xx-spi", | 219 | .name = "pxa2xx-spi", |
230 | .id = 1, | 220 | .id = 1, |
231 | .resource = pxa_ssp_resources, | ||
232 | .num_resources = ARRAY_SIZE(pxa_ssp_resources), | ||
233 | .dev = { | 221 | .dev = { |
234 | .platform_data = &pxa_ssp_master_info, | 222 | .platform_data = &pxa_ssp_master_info, |
235 | }, | 223 | }, |
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c new file mode 100644 index 000000000000..d98ef7ada2f8 --- /dev/null +++ b/arch/arm/mach-pxa/magician.c | |||
@@ -0,0 +1,218 @@ | |||
1 | /* | ||
2 | * Support for HTC Magician PDA phones: | ||
3 | * i-mate JAM, O2 Xda mini, Orange SPV M500, Qtek s100, Qtek s110 | ||
4 | * and T-Mobile MDA Compact. | ||
5 | * | ||
6 | * Copyright (c) 2006-2007 Philipp Zabel | ||
7 | * | ||
8 | * Based on hx4700.c, spitz.c and others. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | #include <linux/gpio_keys.h> | ||
20 | #include <linux/input.h> | ||
21 | #include <linux/mtd/mtd.h> | ||
22 | #include <linux/mtd/map.h> | ||
23 | #include <linux/mtd/physmap.h> | ||
24 | |||
25 | #include <asm/gpio.h> | ||
26 | #include <asm/hardware.h> | ||
27 | #include <asm/mach-types.h> | ||
28 | #include <asm/mach/arch.h> | ||
29 | #include <asm/arch/magician.h> | ||
30 | #include <asm/arch/pxa-regs.h> | ||
31 | #include <asm/arch/pxafb.h> | ||
32 | #include <asm/arch/irda.h> | ||
33 | #include <asm/arch/ohci.h> | ||
34 | |||
35 | #include "generic.h" | ||
36 | |||
37 | /* | ||
38 | * IRDA | ||
39 | */ | ||
40 | |||
41 | static void magician_irda_transceiver_mode(struct device *dev, int mode) | ||
42 | { | ||
43 | gpio_set_value(GPIO83_MAGICIAN_nIR_EN, mode & IR_OFF); | ||
44 | } | ||
45 | |||
46 | static struct pxaficp_platform_data magician_ficp_info = { | ||
47 | .transceiver_cap = IR_SIRMODE | IR_OFF, | ||
48 | .transceiver_mode = magician_irda_transceiver_mode, | ||
49 | }; | ||
50 | |||
51 | /* | ||
52 | * GPIO Keys | ||
53 | */ | ||
54 | |||
55 | static struct gpio_keys_button magician_button_table[] = { | ||
56 | {KEY_POWER, GPIO0_MAGICIAN_KEY_POWER, 0, "Power button"}, | ||
57 | {KEY_ESC, GPIO37_MAGICIAN_KEY_HANGUP, 0, "Hangup button"}, | ||
58 | {KEY_F10, GPIO38_MAGICIAN_KEY_CONTACTS, 0, "Contacts button"}, | ||
59 | {KEY_CALENDAR, GPIO90_MAGICIAN_KEY_CALENDAR, 0, "Calendar button"}, | ||
60 | {KEY_CAMERA, GPIO91_MAGICIAN_KEY_CAMERA, 0, "Camera button"}, | ||
61 | {KEY_UP, GPIO93_MAGICIAN_KEY_UP, 0, "Up button"}, | ||
62 | {KEY_DOWN, GPIO94_MAGICIAN_KEY_DOWN, 0, "Down button"}, | ||
63 | {KEY_LEFT, GPIO95_MAGICIAN_KEY_LEFT, 0, "Left button"}, | ||
64 | {KEY_RIGHT, GPIO96_MAGICIAN_KEY_RIGHT, 0, "Right button"}, | ||
65 | {KEY_KPENTER, GPIO97_MAGICIAN_KEY_ENTER, 0, "Action button"}, | ||
66 | {KEY_RECORD, GPIO98_MAGICIAN_KEY_RECORD, 0, "Record button"}, | ||
67 | {KEY_VOLUMEUP, GPIO100_MAGICIAN_KEY_VOL_UP, 0, "Volume up"}, | ||
68 | {KEY_VOLUMEDOWN, GPIO101_MAGICIAN_KEY_VOL_DOWN, 0, "Volume down"}, | ||
69 | {KEY_PHONE, GPIO102_MAGICIAN_KEY_PHONE, 0, "Phone button"}, | ||
70 | {KEY_PLAY, GPIO99_MAGICIAN_HEADPHONE_IN, 0, "Headset button"}, | ||
71 | }; | ||
72 | |||
73 | static struct gpio_keys_platform_data gpio_keys_data = { | ||
74 | .buttons = magician_button_table, | ||
75 | .nbuttons = ARRAY_SIZE(magician_button_table), | ||
76 | }; | ||
77 | |||
78 | static struct platform_device gpio_keys = { | ||
79 | .name = "gpio-keys", | ||
80 | .dev = { | ||
81 | .platform_data = &gpio_keys_data, | ||
82 | }, | ||
83 | .id = -1, | ||
84 | }; | ||
85 | |||
86 | /* | ||
87 | * LCD - Toppoly TD028STEB1 | ||
88 | */ | ||
89 | |||
90 | static struct pxafb_mode_info toppoly_modes[] = { | ||
91 | { | ||
92 | .pixclock = 96153, | ||
93 | .bpp = 16, | ||
94 | .xres = 240, | ||
95 | .yres = 320, | ||
96 | .hsync_len = 11, | ||
97 | .vsync_len = 3, | ||
98 | .left_margin = 19, | ||
99 | .upper_margin = 2, | ||
100 | .right_margin = 10, | ||
101 | .lower_margin = 2, | ||
102 | .sync = 0, | ||
103 | }, | ||
104 | }; | ||
105 | |||
106 | static struct pxafb_mach_info toppoly_info = { | ||
107 | .modes = toppoly_modes, | ||
108 | .num_modes = 1, | ||
109 | .fixed_modes = 1, | ||
110 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | ||
111 | .lccr3 = LCCR3_PixRsEdg, | ||
112 | }; | ||
113 | |||
114 | /* | ||
115 | * Backlight | ||
116 | */ | ||
117 | |||
118 | static void magician_set_bl_intensity(int intensity) | ||
119 | { | ||
120 | if (intensity) { | ||
121 | PWM_CTRL0 = 1; | ||
122 | PWM_PERVAL0 = 0xc8; | ||
123 | PWM_PWDUTY0 = intensity; | ||
124 | pxa_set_cken(CKEN_PWM0, 1); | ||
125 | } else { | ||
126 | pxa_set_cken(CKEN_PWM0, 0); | ||
127 | } | ||
128 | } | ||
129 | |||
130 | static struct generic_bl_info backlight_info = { | ||
131 | .default_intensity = 0x64, | ||
132 | .limit_mask = 0x0b, | ||
133 | .max_intensity = 0xc7, | ||
134 | .set_bl_intensity = magician_set_bl_intensity, | ||
135 | }; | ||
136 | |||
137 | static struct platform_device backlight = { | ||
138 | .name = "corgi-bl", | ||
139 | .dev = { | ||
140 | .platform_data = &backlight_info, | ||
141 | }, | ||
142 | .id = -1, | ||
143 | }; | ||
144 | |||
145 | |||
146 | /* | ||
147 | * USB OHCI | ||
148 | */ | ||
149 | |||
150 | static int magician_ohci_init(struct device *dev) | ||
151 | { | ||
152 | UHCHR = (UHCHR | UHCHR_SSEP2 | UHCHR_PCPL | UHCHR_CGR) & | ||
153 | ~(UHCHR_SSEP1 | UHCHR_SSEP3 | UHCHR_SSE); | ||
154 | |||
155 | return 0; | ||
156 | } | ||
157 | |||
158 | static struct pxaohci_platform_data magician_ohci_info = { | ||
159 | .port_mode = PMM_PERPORT_MODE, | ||
160 | .init = magician_ohci_init, | ||
161 | .power_budget = 0, | ||
162 | }; | ||
163 | |||
164 | |||
165 | /* | ||
166 | * StrataFlash | ||
167 | */ | ||
168 | |||
169 | #define PXA_CS_SIZE 0x04000000 | ||
170 | |||
171 | static struct resource strataflash_resource = { | ||
172 | .start = PXA_CS0_PHYS, | ||
173 | .end = PXA_CS0_PHYS + PXA_CS_SIZE - 1, | ||
174 | .flags = IORESOURCE_MEM, | ||
175 | }; | ||
176 | |||
177 | static struct physmap_flash_data strataflash_data = { | ||
178 | .width = 4, | ||
179 | }; | ||
180 | |||
181 | static struct platform_device strataflash = { | ||
182 | .name = "physmap-flash", | ||
183 | .id = -1, | ||
184 | .num_resources = 1, | ||
185 | .resource = &strataflash_resource, | ||
186 | .dev = { | ||
187 | .platform_data = &strataflash_data, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | /* | ||
192 | * Platform devices | ||
193 | */ | ||
194 | |||
195 | static struct platform_device *devices[] __initdata = { | ||
196 | &gpio_keys, | ||
197 | &backlight, | ||
198 | &strataflash, | ||
199 | }; | ||
200 | |||
201 | static void __init magician_init(void) | ||
202 | { | ||
203 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
204 | pxa_set_ohci_info(&magician_ohci_info); | ||
205 | pxa_set_ficp_info(&magician_ficp_info); | ||
206 | set_pxa_fb_info(&toppoly_info); | ||
207 | } | ||
208 | |||
209 | |||
210 | MACHINE_START(MAGICIAN, "HTC Magician") | ||
211 | .phys_io = 0x40000000, | ||
212 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
213 | .boot_params = 0xa0000100, | ||
214 | .map_io = pxa_map_io, | ||
215 | .init_irq = pxa27x_init_irq, | ||
216 | .init_machine = magician_init, | ||
217 | .timer = &pxa_timer, | ||
218 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 41d8c6cea62b..345c3deeb02e 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/ioport.h> | 23 | #include <linux/ioport.h> |
24 | #include <linux/mtd/mtd.h> | 24 | #include <linux/mtd/mtd.h> |
25 | #include <linux/mtd/partitions.h> | 25 | #include <linux/mtd/partitions.h> |
26 | #include <linux/backlight.h> | ||
26 | 27 | ||
27 | #include <asm/types.h> | 28 | #include <asm/types.h> |
28 | #include <asm/setup.h> | 29 | #include <asm/setup.h> |
@@ -38,6 +39,7 @@ | |||
38 | #include <asm/mach/flash.h> | 39 | #include <asm/mach/flash.h> |
39 | 40 | ||
40 | #include <asm/arch/pxa-regs.h> | 41 | #include <asm/arch/pxa-regs.h> |
42 | #include <asm/arch/pxa2xx-regs.h> | ||
41 | #include <asm/arch/mainstone.h> | 43 | #include <asm/arch/mainstone.h> |
42 | #include <asm/arch/audio.h> | 44 | #include <asm/arch/audio.h> |
43 | #include <asm/arch/pxafb.h> | 45 | #include <asm/arch/pxafb.h> |
@@ -130,9 +132,13 @@ static struct sys_device mainstone_irq_device = { | |||
130 | 132 | ||
131 | static int __init mainstone_irq_device_init(void) | 133 | static int __init mainstone_irq_device_init(void) |
132 | { | 134 | { |
133 | int ret = sysdev_class_register(&mainstone_irq_sysclass); | 135 | int ret = -ENODEV; |
134 | if (ret == 0) | 136 | |
135 | ret = sysdev_register(&mainstone_irq_device); | 137 | if (machine_is_mainstone()) { |
138 | ret = sysdev_class_register(&mainstone_irq_sysclass); | ||
139 | if (ret == 0) | ||
140 | ret = sysdev_register(&mainstone_irq_device); | ||
141 | } | ||
136 | return ret; | 142 | return ret; |
137 | } | 143 | } |
138 | 144 | ||
@@ -150,7 +156,7 @@ static struct resource smc91x_resources[] = { | |||
150 | [1] = { | 156 | [1] = { |
151 | .start = MAINSTONE_IRQ(3), | 157 | .start = MAINSTONE_IRQ(3), |
152 | .end = MAINSTONE_IRQ(3), | 158 | .end = MAINSTONE_IRQ(3), |
153 | .flags = IORESOURCE_IRQ, | 159 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
154 | } | 160 | } |
155 | }; | 161 | }; |
156 | 162 | ||
@@ -263,21 +269,60 @@ static struct platform_device mst_flash_device[2] = { | |||
263 | }, | 269 | }, |
264 | }; | 270 | }; |
265 | 271 | ||
266 | static void mainstone_backlight_power(int on) | 272 | #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE |
273 | static int mainstone_backlight_update_status(struct backlight_device *bl) | ||
267 | { | 274 | { |
268 | if (on) { | 275 | int brightness = bl->props.brightness; |
276 | |||
277 | if (bl->props.power != FB_BLANK_UNBLANK || | ||
278 | bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
279 | brightness = 0; | ||
280 | |||
281 | if (brightness != 0) { | ||
269 | pxa_gpio_mode(GPIO16_PWM0_MD); | 282 | pxa_gpio_mode(GPIO16_PWM0_MD); |
270 | pxa_set_cken(CKEN_PWM0, 1); | 283 | pxa_set_cken(CKEN_PWM0, 1); |
271 | PWM_CTRL0 = 0; | 284 | } |
272 | PWM_PWDUTY0 = 0x3ff; | 285 | PWM_CTRL0 = 0; |
273 | PWM_PERVAL0 = 0x3ff; | 286 | PWM_PWDUTY0 = brightness; |
274 | } else { | 287 | PWM_PERVAL0 = bl->props.max_brightness; |
275 | PWM_CTRL0 = 0; | 288 | if (brightness == 0) |
276 | PWM_PWDUTY0 = 0x0; | ||
277 | PWM_PERVAL0 = 0x3FF; | ||
278 | pxa_set_cken(CKEN_PWM0, 0); | 289 | pxa_set_cken(CKEN_PWM0, 0); |
290 | return 0; /* pointless return value */ | ||
291 | } | ||
292 | |||
293 | static int mainstone_backlight_get_brightness(struct backlight_device *bl) | ||
294 | { | ||
295 | return PWM_PWDUTY0; | ||
296 | } | ||
297 | |||
298 | static /*const*/ struct backlight_ops mainstone_backlight_ops = { | ||
299 | .update_status = mainstone_backlight_update_status, | ||
300 | .get_brightness = mainstone_backlight_get_brightness, | ||
301 | }; | ||
302 | |||
303 | static void __init mainstone_backlight_register(void) | ||
304 | { | ||
305 | struct backlight_device *bl; | ||
306 | |||
307 | bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev, | ||
308 | NULL, &mainstone_backlight_ops); | ||
309 | if (IS_ERR(bl)) { | ||
310 | printk(KERN_ERR "mainstone: unable to register backlight: %ld\n", | ||
311 | PTR_ERR(bl)); | ||
312 | return; | ||
279 | } | 313 | } |
314 | |||
315 | /* | ||
316 | * broken design - register-then-setup interfaces are | ||
317 | * utterly broken by definition. | ||
318 | */ | ||
319 | bl->props.max_brightness = 1023; | ||
320 | bl->props.brightness = 1023; | ||
321 | backlight_update_status(bl); | ||
280 | } | 322 | } |
323 | #else | ||
324 | #define mainstone_backlight_register() do { } while (0) | ||
325 | #endif | ||
281 | 326 | ||
282 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { | 327 | static struct pxafb_mode_info toshiba_ltm04c380k_mode = { |
283 | .pixclock = 50000, | 328 | .pixclock = 50000, |
@@ -311,7 +356,6 @@ static struct pxafb_mach_info mainstone_pxafb_info = { | |||
311 | .num_modes = 1, | 356 | .num_modes = 1, |
312 | .lccr0 = LCCR0_Act, | 357 | .lccr0 = LCCR0_Act, |
313 | .lccr3 = LCCR3_PCP, | 358 | .lccr3 = LCCR3_PCP, |
314 | .pxafb_backlight_power = mainstone_backlight_power, | ||
315 | }; | 359 | }; |
316 | 360 | ||
317 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) | 361 | static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) |
@@ -335,12 +379,10 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in | |||
335 | 379 | ||
336 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, | 380 | err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED, |
337 | "MMC card detect", data); | 381 | "MMC card detect", data); |
338 | if (err) { | 382 | if (err) |
339 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 383 | printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
340 | return -1; | ||
341 | } | ||
342 | 384 | ||
343 | return 0; | 385 | return err; |
344 | } | 386 | } |
345 | 387 | ||
346 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) | 388 | static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) |
@@ -473,6 +515,7 @@ static void __init mainstone_init(void) | |||
473 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; | 515 | mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; |
474 | 516 | ||
475 | set_pxa_fb_info(&mainstone_pxafb_info); | 517 | set_pxa_fb_info(&mainstone_pxafb_info); |
518 | mainstone_backlight_register(); | ||
476 | 519 | ||
477 | pxa_set_mci_info(&mainstone_mci_platform_data); | 520 | pxa_set_mci_info(&mainstone_mci_platform_data); |
478 | pxa_set_ficp_info(&mainstone_ficp_platform_data); | 521 | pxa_set_ficp_info(&mainstone_ficp_platform_data); |
diff --git a/arch/arm/mach-pxa/mfp.c b/arch/arm/mach-pxa/mfp.c index 436f96574964..ec1b2d8f61c4 100644 --- a/arch/arm/mach-pxa/mfp.c +++ b/arch/arm/mach-pxa/mfp.c | |||
@@ -17,9 +17,11 @@ | |||
17 | #include <linux/kernel.h> | 17 | #include <linux/kernel.h> |
18 | #include <linux/init.h> | 18 | #include <linux/init.h> |
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | #include <linux/sysdev.h> | ||
20 | 21 | ||
21 | #include <asm/hardware.h> | 22 | #include <asm/hardware.h> |
22 | #include <asm/arch/mfp.h> | 23 | #include <asm/arch/mfp.h> |
24 | #include <asm/arch/mfp-pxa3xx.h> | ||
23 | 25 | ||
24 | /* mfp_spin_lock is used to ensure that MFP register configuration | 26 | /* mfp_spin_lock is used to ensure that MFP register configuration |
25 | * (most likely a read-modify-write operation) is atomic, and that | 27 | * (most likely a read-modify-write operation) is atomic, and that |
@@ -28,43 +30,110 @@ | |||
28 | static DEFINE_SPINLOCK(mfp_spin_lock); | 30 | static DEFINE_SPINLOCK(mfp_spin_lock); |
29 | 31 | ||
30 | static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); | 32 | static void __iomem *mfpr_mmio_base = (void __iomem *)&__REG(MFPR_BASE); |
33 | |||
34 | struct pxa3xx_mfp_pin { | ||
35 | unsigned long config; /* -1 for not configured */ | ||
36 | unsigned long mfpr_off; /* MFPRxx Register offset */ | ||
37 | unsigned long mfpr_run; /* Run-Mode Register Value */ | ||
38 | unsigned long mfpr_lpm; /* Low Power Mode Register Value */ | ||
39 | }; | ||
40 | |||
31 | static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; | 41 | static struct pxa3xx_mfp_pin mfp_table[MFP_PIN_MAX]; |
32 | 42 | ||
43 | /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */ | ||
44 | const static unsigned long mfpr_lpm[] = { | ||
45 | MFPR_LPM_INPUT, | ||
46 | MFPR_LPM_DRIVE_LOW, | ||
47 | MFPR_LPM_DRIVE_HIGH, | ||
48 | MFPR_LPM_PULL_LOW, | ||
49 | MFPR_LPM_PULL_HIGH, | ||
50 | MFPR_LPM_FLOAT, | ||
51 | }; | ||
52 | |||
53 | /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */ | ||
54 | const static unsigned long mfpr_pull[] = { | ||
55 | MFPR_PULL_NONE, | ||
56 | MFPR_PULL_LOW, | ||
57 | MFPR_PULL_HIGH, | ||
58 | MFPR_PULL_BOTH, | ||
59 | }; | ||
60 | |||
61 | /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */ | ||
62 | const static unsigned long mfpr_edge[] = { | ||
63 | MFPR_EDGE_NONE, | ||
64 | MFPR_EDGE_RISE, | ||
65 | MFPR_EDGE_FALL, | ||
66 | MFPR_EDGE_BOTH, | ||
67 | }; | ||
68 | |||
33 | #define mfpr_readl(off) \ | 69 | #define mfpr_readl(off) \ |
34 | __raw_readl(mfpr_mmio_base + (off)) | 70 | __raw_readl(mfpr_mmio_base + (off)) |
35 | 71 | ||
36 | #define mfpr_writel(off, val) \ | 72 | #define mfpr_writel(off, val) \ |
37 | __raw_writel(val, mfpr_mmio_base + (off)) | 73 | __raw_writel(val, mfpr_mmio_base + (off)) |
38 | 74 | ||
75 | #define mfp_configured(p) ((p)->config != -1) | ||
76 | |||
39 | /* | 77 | /* |
40 | * perform a read-back of any MFPR register to make sure the | 78 | * perform a read-back of any MFPR register to make sure the |
41 | * previous writings are finished | 79 | * previous writings are finished |
42 | */ | 80 | */ |
43 | #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) | 81 | #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0) |
44 | 82 | ||
45 | static inline void __mfp_config(int pin, unsigned long val) | 83 | static inline void __mfp_config_run(struct pxa3xx_mfp_pin *p) |
46 | { | 84 | { |
47 | unsigned long off = mfp_table[pin].mfpr_off; | 85 | if (mfp_configured(p)) |
86 | mfpr_writel(p->mfpr_off, p->mfpr_run); | ||
87 | } | ||
48 | 88 | ||
49 | mfp_table[pin].mfpr_val = val; | 89 | static inline void __mfp_config_lpm(struct pxa3xx_mfp_pin *p) |
50 | mfpr_writel(off, val); | 90 | { |
91 | if (mfp_configured(p)) { | ||
92 | unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR; | ||
93 | if (mfpr_clr != p->mfpr_run) | ||
94 | mfpr_writel(p->mfpr_off, mfpr_clr); | ||
95 | if (p->mfpr_lpm != mfpr_clr) | ||
96 | mfpr_writel(p->mfpr_off, p->mfpr_lpm); | ||
97 | } | ||
51 | } | 98 | } |
52 | 99 | ||
53 | void pxa3xx_mfp_config(mfp_cfg_t *mfp_cfgs, int num) | 100 | void pxa3xx_mfp_config(unsigned long *mfp_cfgs, int num) |
54 | { | 101 | { |
55 | int i, pin; | 102 | unsigned long flags; |
56 | unsigned long val, flags; | 103 | int i; |
57 | mfp_cfg_t *mfp_cfg = mfp_cfgs; | ||
58 | 104 | ||
59 | spin_lock_irqsave(&mfp_spin_lock, flags); | 105 | spin_lock_irqsave(&mfp_spin_lock, flags); |
60 | 106 | ||
61 | for (i = 0; i < num; i++, mfp_cfg++) { | 107 | for (i = 0; i < num; i++, mfp_cfgs++) { |
62 | pin = MFP_CFG_PIN(*mfp_cfg); | 108 | unsigned long tmp, c = *mfp_cfgs; |
63 | val = MFP_CFG_VAL(*mfp_cfg); | 109 | struct pxa3xx_mfp_pin *p; |
110 | int pin, af, drv, lpm, edge, pull; | ||
64 | 111 | ||
112 | pin = MFP_PIN(c); | ||
65 | BUG_ON(pin >= MFP_PIN_MAX); | 113 | BUG_ON(pin >= MFP_PIN_MAX); |
66 | 114 | p = &mfp_table[pin]; | |
67 | __mfp_config(pin, val); | 115 | |
116 | af = MFP_AF(c); | ||
117 | drv = MFP_DS(c); | ||
118 | lpm = MFP_LPM_STATE(c); | ||
119 | edge = MFP_LPM_EDGE(c); | ||
120 | pull = MFP_PULL(c); | ||
121 | |||
122 | /* run-mode pull settings will conflict with MFPR bits of | ||
123 | * low power mode state, calculate mfpr_run and mfpr_lpm | ||
124 | * individually if pull != MFP_PULL_NONE | ||
125 | */ | ||
126 | tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv); | ||
127 | |||
128 | if (likely(pull == MFP_PULL_NONE)) { | ||
129 | p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; | ||
130 | p->mfpr_lpm = p->mfpr_run; | ||
131 | } else { | ||
132 | p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge]; | ||
133 | p->mfpr_run = tmp | mfpr_pull[pull]; | ||
134 | } | ||
135 | |||
136 | p->config = c; __mfp_config_run(p); | ||
68 | } | 137 | } |
69 | 138 | ||
70 | mfpr_sync(); | 139 | mfpr_sync(); |
@@ -96,140 +165,82 @@ void pxa3xx_mfp_write(int mfp, unsigned long val) | |||
96 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 165 | spin_unlock_irqrestore(&mfp_spin_lock, flags); |
97 | } | 166 | } |
98 | 167 | ||
99 | void pxa3xx_mfp_set_afds(int mfp, int af, int ds) | 168 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) |
100 | { | ||
101 | uint32_t mfpr_off, mfpr_val; | ||
102 | unsigned long flags; | ||
103 | |||
104 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
105 | |||
106 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
107 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
108 | |||
109 | mfpr_val = mfpr_readl(mfpr_off); | ||
110 | mfpr_val &= ~(MFPR_AF_MASK | MFPR_DRV_MASK); | ||
111 | mfpr_val |= (((af & 0x7) << MFPR_ALT_OFFSET) | | ||
112 | ((ds & 0x7) << MFPR_DRV_OFFSET)); | ||
113 | |||
114 | mfpr_writel(mfpr_off, mfpr_val); | ||
115 | mfpr_sync(); | ||
116 | |||
117 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
118 | } | ||
119 | |||
120 | void pxa3xx_mfp_set_rdh(int mfp, int rdh) | ||
121 | { | 169 | { |
122 | uint32_t mfpr_off, mfpr_val; | 170 | struct pxa3xx_mfp_addr_map *p; |
123 | unsigned long flags; | 171 | unsigned long offset, flags; |
124 | 172 | int i; | |
125 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
126 | 173 | ||
127 | spin_lock_irqsave(&mfp_spin_lock, flags); | 174 | spin_lock_irqsave(&mfp_spin_lock, flags); |
128 | 175 | ||
129 | mfpr_off = mfp_table[mfp].mfpr_off; | 176 | for (p = map; p->start != MFP_PIN_INVALID; p++) { |
130 | 177 | offset = p->offset; | |
131 | mfpr_val = mfpr_readl(mfpr_off); | 178 | i = p->start; |
132 | mfpr_val &= ~MFPR_RDH_MASK; | ||
133 | |||
134 | if (likely(rdh)) | ||
135 | mfpr_val |= (1u << MFPR_SS_OFFSET); | ||
136 | 179 | ||
137 | mfpr_writel(mfpr_off, mfpr_val); | 180 | do { |
138 | mfpr_sync(); | 181 | mfp_table[i].mfpr_off = offset; |
182 | mfp_table[i].mfpr_run = 0; | ||
183 | mfp_table[i].mfpr_lpm = 0; | ||
184 | offset += 4; i++; | ||
185 | } while ((i <= p->end) && (p->end != -1)); | ||
186 | } | ||
139 | 187 | ||
140 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 188 | spin_unlock_irqrestore(&mfp_spin_lock, flags); |
141 | } | 189 | } |
142 | 190 | ||
143 | void pxa3xx_mfp_set_lpm(int mfp, int lpm) | 191 | void __init pxa3xx_init_mfp(void) |
144 | { | 192 | { |
145 | uint32_t mfpr_off, mfpr_val; | 193 | int i; |
146 | unsigned long flags; | ||
147 | |||
148 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
149 | |||
150 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
151 | |||
152 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
153 | mfpr_val = mfpr_readl(mfpr_off); | ||
154 | mfpr_val &= ~MFPR_LPM_MASK; | ||
155 | |||
156 | if (lpm & 0x1) mfpr_val |= 1u << MFPR_SON_OFFSET; | ||
157 | if (lpm & 0x2) mfpr_val |= 1u << MFPR_SD_OFFSET; | ||
158 | if (lpm & 0x4) mfpr_val |= 1u << MFPR_PU_OFFSET; | ||
159 | if (lpm & 0x8) mfpr_val |= 1u << MFPR_PD_OFFSET; | ||
160 | if (lpm &0x10) mfpr_val |= 1u << MFPR_PS_OFFSET; | ||
161 | |||
162 | mfpr_writel(mfpr_off, mfpr_val); | ||
163 | mfpr_sync(); | ||
164 | 194 | ||
165 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 195 | for (i = 0; i < ARRAY_SIZE(mfp_table); i++) |
196 | mfp_table[i].config = -1; | ||
166 | } | 197 | } |
167 | 198 | ||
168 | void pxa3xx_mfp_set_pull(int mfp, int pull) | 199 | #ifdef CONFIG_PM |
200 | /* | ||
201 | * Configure the MFPs appropriately for suspend/resume. | ||
202 | * FIXME: this should probably depend on which system state we're | ||
203 | * entering - for instance, we might not want to place MFP pins in | ||
204 | * a pull-down mode if they're an active low chip select, and we're | ||
205 | * just entering standby. | ||
206 | */ | ||
207 | static int pxa3xx_mfp_suspend(struct sys_device *d, pm_message_t state) | ||
169 | { | 208 | { |
170 | uint32_t mfpr_off, mfpr_val; | 209 | int pin; |
171 | unsigned long flags; | ||
172 | |||
173 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
174 | |||
175 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
176 | 210 | ||
177 | mfpr_off = mfp_table[mfp].mfpr_off; | 211 | for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { |
178 | mfpr_val = mfpr_readl(mfpr_off); | 212 | struct pxa3xx_mfp_pin *p = &mfp_table[pin]; |
179 | mfpr_val &= ~MFPR_PULL_MASK; | 213 | __mfp_config_lpm(p); |
180 | mfpr_val |= ((pull & 0x7u) << MFPR_PD_OFFSET); | 214 | } |
181 | 215 | return 0; | |
182 | mfpr_writel(mfpr_off, mfpr_val); | ||
183 | mfpr_sync(); | ||
184 | |||
185 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | ||
186 | } | 216 | } |
187 | 217 | ||
188 | void pxa3xx_mfp_set_edge(int mfp, int edge) | 218 | static int pxa3xx_mfp_resume(struct sys_device *d) |
189 | { | 219 | { |
190 | uint32_t mfpr_off, mfpr_val; | 220 | int pin; |
191 | unsigned long flags; | ||
192 | |||
193 | BUG_ON(mfp >= MFP_PIN_MAX); | ||
194 | |||
195 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
196 | |||
197 | mfpr_off = mfp_table[mfp].mfpr_off; | ||
198 | mfpr_val = mfpr_readl(mfpr_off); | ||
199 | |||
200 | mfpr_val &= ~MFPR_EDGE_MASK; | ||
201 | mfpr_val |= (edge & 0x3u) << MFPR_ERE_OFFSET; | ||
202 | mfpr_val |= (!edge & 0x1) << MFPR_EC_OFFSET; | ||
203 | 221 | ||
204 | mfpr_writel(mfpr_off, mfpr_val); | 222 | for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++) { |
205 | mfpr_sync(); | 223 | struct pxa3xx_mfp_pin *p = &mfp_table[pin]; |
206 | 224 | __mfp_config_run(p); | |
207 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 225 | } |
226 | return 0; | ||
208 | } | 227 | } |
209 | 228 | ||
210 | void __init pxa3xx_mfp_init_addr(struct pxa3xx_mfp_addr_map *map) | 229 | static struct sysdev_class mfp_sysclass = { |
211 | { | 230 | set_kset_name("mfp"), |
212 | struct pxa3xx_mfp_addr_map *p; | 231 | .suspend = pxa3xx_mfp_suspend, |
213 | unsigned long offset, flags; | 232 | .resume = pxa3xx_mfp_resume, |
214 | int i; | 233 | }; |
215 | |||
216 | spin_lock_irqsave(&mfp_spin_lock, flags); | ||
217 | |||
218 | for (p = map; p->start != MFP_PIN_INVALID; p++) { | ||
219 | offset = p->offset; | ||
220 | i = p->start; | ||
221 | |||
222 | do { | ||
223 | mfp_table[i].mfpr_off = offset; | ||
224 | mfp_table[i].mfpr_val = 0; | ||
225 | offset += 4; i++; | ||
226 | } while ((i <= p->end) && (p->end != -1)); | ||
227 | } | ||
228 | 234 | ||
229 | spin_unlock_irqrestore(&mfp_spin_lock, flags); | 235 | static struct sys_device mfp_device = { |
230 | } | 236 | .id = 0, |
237 | .cls = &mfp_sysclass, | ||
238 | }; | ||
231 | 239 | ||
232 | void __init pxa3xx_init_mfp(void) | 240 | static int __init mfp_init_devicefs(void) |
233 | { | 241 | { |
234 | memset(mfp_table, 0, sizeof(mfp_table)); | 242 | sysdev_class_register(&mfp_sysclass); |
243 | return sysdev_register(&mfp_device); | ||
235 | } | 244 | } |
245 | device_initcall(mfp_init_devicefs); | ||
246 | #endif | ||
diff --git a/arch/arm/mach-pxa/pcm027.c b/arch/arm/mach-pxa/pcm027.c new file mode 100644 index 000000000000..540c3bba5f9a --- /dev/null +++ b/arch/arm/mach-pxa/pcm027.c | |||
@@ -0,0 +1,216 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-pxa/pcm027.c | ||
3 | * Support for the Phytec phyCORE-PXA270 CPU card (aka PCM-027). | ||
4 | * | ||
5 | * Refer | ||
6 | * http://www.phytec.com/products/sbc/ARM-XScale/phyCORE-XScale-PXA270.html | ||
7 | * for additional hardware info | ||
8 | * | ||
9 | * Author: Juergen Kilb | ||
10 | * Created: April 05, 2005 | ||
11 | * Copyright: Phytec Messtechnik GmbH | ||
12 | * e-Mail: armlinux@phytec.de | ||
13 | * | ||
14 | * based on Intel Mainstone Board | ||
15 | * | ||
16 | * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) | ||
17 | * | ||
18 | * This program is free software; you can redistribute it and/or modify | ||
19 | * it under the terms of the GNU General Public License version 2 as | ||
20 | * published by the Free Software Foundation. | ||
21 | */ | ||
22 | |||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/mtd/physmap.h> | ||
26 | #include <linux/spi/spi.h> | ||
27 | #include <linux/leds.h> | ||
28 | #include <asm/mach-types.h> | ||
29 | #include <asm/mach/arch.h> | ||
30 | #include <asm/arch/hardware.h> | ||
31 | #include <asm/arch/pxa-regs.h> | ||
32 | #include <asm/arch/pxa2xx_spi.h> | ||
33 | #include <asm/arch/pcm027.h> | ||
34 | #include "generic.h" | ||
35 | |||
36 | /* | ||
37 | * ABSTRACT: | ||
38 | * | ||
39 | * The PXA270 processor comes with a bunch of hardware on its silicon. | ||
40 | * Not all of this hardware can be used at the same time and not all | ||
41 | * is routed to module's connectors. Also it depends on the baseboard, what | ||
42 | * kind of hardware can be used in which way. | ||
43 | * -> So this file supports the main devices on the CPU card only! | ||
44 | * Refer pcm990-baseboard.c how to extend this features to get a full | ||
45 | * blown system with many common interfaces. | ||
46 | * | ||
47 | * The PCM-027 supports the following interfaces through its connectors and | ||
48 | * will be used in pcm990-baseboard.c: | ||
49 | * | ||
50 | * - LCD support | ||
51 | * - MMC support | ||
52 | * - IDE/CF card | ||
53 | * - FFUART | ||
54 | * - BTUART | ||
55 | * - IRUART | ||
56 | * - AC97 | ||
57 | * - SSP | ||
58 | * - SSP3 | ||
59 | * | ||
60 | * Claimed GPIOs: | ||
61 | * GPIO0 -> IRQ input from RTC | ||
62 | * GPIO2 -> SYS_ENA*) | ||
63 | * GPIO3 -> PWR_SCL | ||
64 | * GPIO4 -> PWR_SDA | ||
65 | * GPIO5 -> PowerCap0*) | ||
66 | * GPIO6 -> PowerCap1*) | ||
67 | * GPIO7 -> PowerCap2*) | ||
68 | * GPIO8 -> PowerCap3*) | ||
69 | * GPIO15 -> /CS1 | ||
70 | * GPIO20 -> /CS2 | ||
71 | * GPIO21 -> /CS3 | ||
72 | * GPIO33 -> /CS5 network controller select | ||
73 | * GPIO52 -> IRQ from network controller | ||
74 | * GPIO78 -> /CS2 | ||
75 | * GPIO80 -> /CS4 | ||
76 | * GPIO90 -> LED0 | ||
77 | * GPIO91 -> LED1 | ||
78 | * GPIO114 -> IRQ from CAN controller | ||
79 | * GPIO117 -> SCL | ||
80 | * GPIO118 -> SDA | ||
81 | * | ||
82 | * *) CPU internal use only | ||
83 | */ | ||
84 | |||
85 | /* | ||
86 | * SMC91x network controller specific stuff | ||
87 | */ | ||
88 | static struct resource smc91x_resources[] = { | ||
89 | [0] = { | ||
90 | .start = PCM027_ETH_PHYS + 0x300, | ||
91 | .end = PCM027_ETH_PHYS + PCM027_ETH_SIZE, | ||
92 | .flags = IORESOURCE_MEM, | ||
93 | }, | ||
94 | [1] = { | ||
95 | .start = PCM027_ETH_IRQ, | ||
96 | .end = PCM027_ETH_IRQ, | ||
97 | /* note: smc91x's driver doesn't use the trigger bits yet */ | ||
98 | .flags = IORESOURCE_IRQ | PCM027_ETH_IRQ_EDGE, | ||
99 | } | ||
100 | }; | ||
101 | |||
102 | static struct platform_device smc91x_device = { | ||
103 | .name = "smc91x", | ||
104 | .id = 0, | ||
105 | .num_resources = ARRAY_SIZE(smc91x_resources), | ||
106 | .resource = smc91x_resources, | ||
107 | }; | ||
108 | |||
109 | static struct physmap_flash_data pcm027_flash_data = { | ||
110 | .width = 4, | ||
111 | }; | ||
112 | |||
113 | static struct resource pcm027_flash_resource = { | ||
114 | .start = PCM027_FLASH_PHYS, | ||
115 | .end = PCM027_FLASH_PHYS + PCM027_FLASH_SIZE - 1 , | ||
116 | .flags = IORESOURCE_MEM, | ||
117 | }; | ||
118 | |||
119 | static struct platform_device pcm027_flash = { | ||
120 | .name = "physmap-flash", | ||
121 | .id = 0, | ||
122 | .dev = { | ||
123 | .platform_data = &pcm027_flash_data, | ||
124 | }, | ||
125 | .resource = &pcm027_flash_resource, | ||
126 | .num_resources = 1, | ||
127 | }; | ||
128 | |||
129 | #ifdef CONFIG_LEDS_GPIO | ||
130 | |||
131 | static struct gpio_led pcm027_led[] = { | ||
132 | { | ||
133 | .name = "led0:red", /* FIXME */ | ||
134 | .gpio = PCM027_LED_CPU | ||
135 | }, | ||
136 | { | ||
137 | .name = "led1:green", /* FIXME */ | ||
138 | .gpio = PCM027_LED_HEARD_BEAT | ||
139 | }, | ||
140 | }; | ||
141 | |||
142 | static struct gpio_led_platform_data pcm027_led_data = { | ||
143 | .num_leds = ARRAY_SIZE(pcm027_led), | ||
144 | .leds = pcm027_led | ||
145 | }; | ||
146 | |||
147 | static struct platform_device pcm027_led_dev = { | ||
148 | .name = "leds-gpio", | ||
149 | .id = 0, | ||
150 | .dev = { | ||
151 | .platform_data = &pcm027_led_data, | ||
152 | }, | ||
153 | }; | ||
154 | |||
155 | #endif /* CONFIG_LEDS_GPIO */ | ||
156 | |||
157 | /* | ||
158 | * declare the available device resources on this board | ||
159 | */ | ||
160 | static struct platform_device *devices[] __initdata = { | ||
161 | &smc91x_device, | ||
162 | &pcm027_flash, | ||
163 | #ifdef CONFIG_LEDS_GPIO | ||
164 | &pcm027_led_dev | ||
165 | #endif | ||
166 | }; | ||
167 | |||
168 | /* | ||
169 | * pcm027_init - breath some life into the board | ||
170 | */ | ||
171 | static void __init pcm027_init(void) | ||
172 | { | ||
173 | /* system bus arbiter setting | ||
174 | * - Core_Park | ||
175 | * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 | ||
176 | */ | ||
177 | ARB_CNTRL = ARB_CORE_PARK | 0x234; | ||
178 | |||
179 | platform_add_devices(devices, ARRAY_SIZE(devices)); | ||
180 | |||
181 | /* LEDs (on demand only) */ | ||
182 | #ifdef CONFIG_LEDS_GPIO | ||
183 | pxa_gpio_mode(PCM027_LED_CPU | GPIO_OUT); | ||
184 | pxa_gpio_mode(PCM027_LED_HEARD_BEAT | GPIO_OUT); | ||
185 | #endif /* CONFIG_LEDS_GPIO */ | ||
186 | |||
187 | /* at last call the baseboard to initialize itself */ | ||
188 | #ifdef CONFIG_MACH_PCM990_BASEBOARD | ||
189 | pcm990_baseboard_init(); | ||
190 | #endif | ||
191 | } | ||
192 | |||
193 | static void __init pcm027_map_io(void) | ||
194 | { | ||
195 | pxa_map_io(); | ||
196 | |||
197 | /* initialize sleep mode regs (wake-up sources, etc) */ | ||
198 | PGSR0 = 0x01308000; | ||
199 | PGSR1 = 0x00CF0002; | ||
200 | PGSR2 = 0x0E294000; | ||
201 | PGSR3 = 0x0000C000; | ||
202 | PWER = 0x40000000 | PWER_GPIO0 | PWER_GPIO1; | ||
203 | PRER = 0x00000000; | ||
204 | PFER = 0x00000003; | ||
205 | } | ||
206 | |||
207 | MACHINE_START(PCM027, "Phytec Messtechnik GmbH phyCORE-PXA270") | ||
208 | /* Maintainer: Pengutronix */ | ||
209 | .boot_params = 0xa0000100, | ||
210 | .phys_io = 0x40000000, | ||
211 | .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, | ||
212 | .map_io = pcm027_map_io, | ||
213 | .init_irq = pxa27x_init_irq, | ||
214 | .timer = &pxa_timer, | ||
215 | .init_machine = pcm027_init, | ||
216 | MACHINE_END | ||
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c new file mode 100644 index 000000000000..3dda16a20049 --- /dev/null +++ b/arch/arm/mach-pxa/pcm990-baseboard.c | |||
@@ -0,0 +1,330 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/pcm990-baseboard.c | ||
3 | * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990). | ||
4 | * | ||
5 | * Refer | ||
6 | * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html | ||
7 | * for additional hardware info | ||
8 | * | ||
9 | * Author: Juergen Kilb | ||
10 | * Created: April 05, 2005 | ||
11 | * Copyright: Phytec Messtechnik GmbH | ||
12 | * e-Mail: armlinux@phytec.de | ||
13 | * | ||
14 | * based on Intel Mainstone Board | ||
15 | * | ||
16 | * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de) | ||
17 | * | ||
18 | * This program is free software; you can redistribute it and/or modify | ||
19 | * it under the terms of the GNU General Public License version 2 as | ||
20 | * published by the Free Software Foundation. | ||
21 | */ | ||
22 | |||
23 | #include <linux/irq.h> | ||
24 | #include <linux/platform_device.h> | ||
25 | #include <linux/ide.h> | ||
26 | #include <asm/mach/map.h> | ||
27 | #include <asm/arch/pxa-regs.h> | ||
28 | #include <asm/arch/mmc.h> | ||
29 | #include <asm/arch/ohci.h> | ||
30 | #include <asm/arch/pcm990_baseboard.h> | ||
31 | |||
32 | /* | ||
33 | * The PCM-990 development baseboard uses PCM-027's hardeware in the | ||
34 | * following way: | ||
35 | * | ||
36 | * - LCD support is in use | ||
37 | * - GPIO16 is output for back light on/off with PWM | ||
38 | * - GPIO58 ... GPIO73 are outputs for display data | ||
39 | * - GPIO74 is output output for LCDFCLK | ||
40 | * - GPIO75 is output for LCDLCLK | ||
41 | * - GPIO76 is output for LCDPCLK | ||
42 | * - GPIO77 is output for LCDBIAS | ||
43 | * - MMC support is in use | ||
44 | * - GPIO32 is output for MMCCLK | ||
45 | * - GPIO92 is MMDAT0 | ||
46 | * - GPIO109 is MMDAT1 | ||
47 | * - GPIO110 is MMCS0 | ||
48 | * - GPIO111 is MMCS1 | ||
49 | * - GPIO112 is MMCMD | ||
50 | * - IDE/CF card is in use | ||
51 | * - GPIO48 is output /POE | ||
52 | * - GPIO49 is output /PWE | ||
53 | * - GPIO50 is output /PIOR | ||
54 | * - GPIO51 is output /PIOW | ||
55 | * - GPIO54 is output /PCE2 | ||
56 | * - GPIO55 is output /PREG | ||
57 | * - GPIO56 is input /PWAIT | ||
58 | * - GPIO57 is output /PIOS16 | ||
59 | * - GPIO79 is output PSKTSEL | ||
60 | * - GPIO85 is output /PCE1 | ||
61 | * - FFUART is in use | ||
62 | * - GPIO34 is input FFRXD | ||
63 | * - GPIO35 is input FFCTS | ||
64 | * - GPIO36 is input FFDCD | ||
65 | * - GPIO37 is input FFDSR | ||
66 | * - GPIO38 is input FFRI | ||
67 | * - GPIO39 is output FFTXD | ||
68 | * - GPIO40 is output FFDTR | ||
69 | * - GPIO41 is output FFRTS | ||
70 | * - BTUART is in use | ||
71 | * - GPIO42 is input BTRXD | ||
72 | * - GPIO43 is output BTTXD | ||
73 | * - GPIO44 is input BTCTS | ||
74 | * - GPIO45 is output BTRTS | ||
75 | * - IRUART is in use | ||
76 | * - GPIO46 is input STDRXD | ||
77 | * - GPIO47 is output STDTXD | ||
78 | * - AC97 is in use*) | ||
79 | * - GPIO28 is input AC97CLK | ||
80 | * - GPIO29 is input AC97DatIn | ||
81 | * - GPIO30 is output AC97DatO | ||
82 | * - GPIO31 is output AC97SYNC | ||
83 | * - GPIO113 is output AC97_RESET | ||
84 | * - SSP is in use | ||
85 | * - GPIO23 is output SSPSCLK | ||
86 | * - GPIO24 is output chip select to Max7301 | ||
87 | * - GPIO25 is output SSPTXD | ||
88 | * - GPIO26 is input SSPRXD | ||
89 | * - GPIO27 is input for Max7301 IRQ | ||
90 | * - GPIO53 is input SSPSYSCLK | ||
91 | * - SSP3 is in use | ||
92 | * - GPIO81 is output SSPTXD3 | ||
93 | * - GPIO82 is input SSPRXD3 | ||
94 | * - GPIO83 is output SSPSFRM | ||
95 | * - GPIO84 is output SSPCLK3 | ||
96 | * | ||
97 | * Otherwise claimed GPIOs: | ||
98 | * GPIO1 -> IRQ from user switch | ||
99 | * GPIO9 -> IRQ from power management | ||
100 | * GPIO10 -> IRQ from WML9712 AC97 controller | ||
101 | * GPIO11 -> IRQ from IDE controller | ||
102 | * GPIO12 -> IRQ from CF controller | ||
103 | * GPIO13 -> IRQ from CF controller | ||
104 | * GPIO14 -> GPIO free | ||
105 | * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path) | ||
106 | * GPIO19 -> GPIO free | ||
107 | * GPIO20 -> /SDCS2 | ||
108 | * GPIO21 -> /CS3 PC card socket select | ||
109 | * GPIO33 -> /CS5 network controller select | ||
110 | * GPIO78 -> /CS2 (16 bit wide data path) | ||
111 | * GPIO80 -> /CS4 (16 bit wide data path) | ||
112 | * GPIO86 -> GPIO free | ||
113 | * GPIO87 -> GPIO free | ||
114 | * GPIO90 -> LED0 on CPU module | ||
115 | * GPIO91 -> LED1 on CPI module | ||
116 | * GPIO117 -> SCL | ||
117 | * GPIO118 -> SDA | ||
118 | */ | ||
119 | |||
120 | static unsigned long pcm990_irq_enabled; | ||
121 | |||
122 | static void pcm990_mask_ack_irq(unsigned int irq) | ||
123 | { | ||
124 | int pcm990_irq = (irq - PCM027_IRQ(0)); | ||
125 | PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq)); | ||
126 | } | ||
127 | |||
128 | static void pcm990_unmask_irq(unsigned int irq) | ||
129 | { | ||
130 | int pcm990_irq = (irq - PCM027_IRQ(0)); | ||
131 | /* the irq can be acknowledged only if deasserted, so it's done here */ | ||
132 | PCM990_INTSETCLR |= 1 << pcm990_irq; | ||
133 | PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq)); | ||
134 | } | ||
135 | |||
136 | static struct irq_chip pcm990_irq_chip = { | ||
137 | .mask_ack = pcm990_mask_ack_irq, | ||
138 | .unmask = pcm990_unmask_irq, | ||
139 | }; | ||
140 | |||
141 | static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc) | ||
142 | { | ||
143 | unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; | ||
144 | |||
145 | do { | ||
146 | GEDR(PCM990_CTRL_INT_IRQ_GPIO) = | ||
147 | GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO); | ||
148 | if (likely(pending)) { | ||
149 | irq = PCM027_IRQ(0) + __ffs(pending); | ||
150 | desc = irq_desc + irq; | ||
151 | desc_handle_irq(irq, desc); | ||
152 | } | ||
153 | pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled; | ||
154 | } while (pending); | ||
155 | } | ||
156 | |||
157 | static void __init pcm990_init_irq(void) | ||
158 | { | ||
159 | int irq; | ||
160 | |||
161 | /* setup extra PCM990 irqs */ | ||
162 | for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) { | ||
163 | set_irq_chip(irq, &pcm990_irq_chip); | ||
164 | set_irq_handler(irq, handle_level_irq); | ||
165 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
166 | } | ||
167 | |||
168 | PCM990_INTMSKENA = 0x00; /* disable all Interrupts */ | ||
169 | PCM990_INTSETCLR = 0xFF; | ||
170 | |||
171 | set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler); | ||
172 | set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE); | ||
173 | } | ||
174 | |||
175 | static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int, | ||
176 | void *data) | ||
177 | { | ||
178 | int err; | ||
179 | |||
180 | /* | ||
181 | * enable GPIO for PXA27x MMC controller | ||
182 | */ | ||
183 | pxa_gpio_mode(GPIO32_MMCCLK_MD); | ||
184 | pxa_gpio_mode(GPIO112_MMCCMD_MD); | ||
185 | pxa_gpio_mode(GPIO92_MMCDAT0_MD); | ||
186 | pxa_gpio_mode(GPIO109_MMCDAT1_MD); | ||
187 | pxa_gpio_mode(GPIO110_MMCDAT2_MD); | ||
188 | pxa_gpio_mode(GPIO111_MMCDAT3_MD); | ||
189 | |||
190 | err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED, | ||
191 | "MMC card detect", data); | ||
192 | if (err) | ||
193 | printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC " | ||
194 | "card detect IRQ\n"); | ||
195 | |||
196 | return err; | ||
197 | } | ||
198 | |||
199 | static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) | ||
200 | { | ||
201 | struct pxamci_platform_data *p_d = dev->platform_data; | ||
202 | |||
203 | if ((1 << vdd) & p_d->ocr_mask) | ||
204 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = | ||
205 | PCM990_CTRL_MMC2PWR; | ||
206 | else | ||
207 | __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) = | ||
208 | ~PCM990_CTRL_MMC2PWR; | ||
209 | } | ||
210 | |||
211 | static void pcm990_mci_exit(struct device *dev, void *data) | ||
212 | { | ||
213 | free_irq(PCM027_MMCDET_IRQ, data); | ||
214 | } | ||
215 | |||
216 | #define MSECS_PER_JIFFY (1000/HZ) | ||
217 | |||
218 | static struct pxamci_platform_data pcm990_mci_platform_data = { | ||
219 | .detect_delay = 250 / MSECS_PER_JIFFY, | ||
220 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, | ||
221 | .init = pcm990_mci_init, | ||
222 | .setpower = pcm990_mci_setpower, | ||
223 | .exit = pcm990_mci_exit, | ||
224 | }; | ||
225 | |||
226 | /* | ||
227 | * init OHCI hardware to work with | ||
228 | * | ||
229 | * Note: Only USB port 1 (host only) is connected | ||
230 | * | ||
231 | * GPIO88 (USBHPWR#1): overcurrent in, overcurrent when low | ||
232 | * GPIO89 (USBHPEN#1): power-on out, on when low | ||
233 | */ | ||
234 | static int pcm990_ohci_init(struct device *dev) | ||
235 | { | ||
236 | pxa_gpio_mode(PCM990_USB_OVERCURRENT); | ||
237 | pxa_gpio_mode(PCM990_USB_PWR_EN); | ||
238 | /* | ||
239 | * disable USB port 2 and 3 | ||
240 | * power sense is active low | ||
241 | */ | ||
242 | UHCHR = ((UHCHR) | UHCHR_PCPL | UHCHR_PSPL | UHCHR_SSEP2 | | ||
243 | UHCHR_SSEP3) & ~(UHCHR_SSEP1 | UHCHR_SSE); | ||
244 | /* | ||
245 | * wait 10ms after Power on | ||
246 | * overcurrent per port | ||
247 | * power switch per port | ||
248 | */ | ||
249 | UHCRHDA = (5<<24) | (1<<11) | (1<<8); /* FIXME: Required? */ | ||
250 | |||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | static struct pxaohci_platform_data pcm990_ohci_platform_data = { | ||
255 | .port_mode = PMM_PERPORT_MODE, | ||
256 | .init = pcm990_ohci_init, | ||
257 | .exit = NULL, | ||
258 | }; | ||
259 | |||
260 | /* | ||
261 | * AC97 support | ||
262 | * Note: The connected AC97 mixer also reports interrupts at PCM990_AC97_IRQ | ||
263 | */ | ||
264 | static struct resource pxa27x_ac97_resources[] = { | ||
265 | [0] = { | ||
266 | .start = 0x40500000, | ||
267 | .end = 0x40500000 + 0xfff, | ||
268 | .flags = IORESOURCE_MEM, | ||
269 | }, | ||
270 | [1] = { | ||
271 | .start = IRQ_AC97, | ||
272 | .end = IRQ_AC97, | ||
273 | .flags = IORESOURCE_IRQ, | ||
274 | }, | ||
275 | }; | ||
276 | |||
277 | static u64 pxa_ac97_dmamask = 0xffffffffUL; | ||
278 | |||
279 | static struct platform_device pxa27x_device_ac97 = { | ||
280 | .name = "pxa2xx-ac97", | ||
281 | .id = -1, | ||
282 | .dev = { | ||
283 | .dma_mask = &pxa_ac97_dmamask, | ||
284 | .coherent_dma_mask = 0xffffffff, | ||
285 | }, | ||
286 | .num_resources = ARRAY_SIZE(pxa27x_ac97_resources), | ||
287 | .resource = pxa27x_ac97_resources, | ||
288 | }; | ||
289 | |||
290 | /* | ||
291 | * enable generic access to the base board control CPLDs U6 and U7 | ||
292 | */ | ||
293 | static struct map_desc pcm990_io_desc[] __initdata = { | ||
294 | { | ||
295 | .virtual = PCM990_CTRL_BASE, | ||
296 | .pfn = __phys_to_pfn(PCM990_CTRL_PHYS), | ||
297 | .length = PCM990_CTRL_SIZE, | ||
298 | .type = MT_DEVICE /* CPLD */ | ||
299 | }, { | ||
300 | .virtual = PCM990_CF_PLD_BASE, | ||
301 | .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS), | ||
302 | .length = PCM990_CF_PLD_SIZE, | ||
303 | .type = MT_DEVICE /* CPLD */ | ||
304 | } | ||
305 | }; | ||
306 | |||
307 | /* | ||
308 | * system init for baseboard usage. Will be called by pcm027 init. | ||
309 | * | ||
310 | * Add platform devices present on this baseboard and init | ||
311 | * them from CPU side as far as required to use them later on | ||
312 | */ | ||
313 | void __init pcm990_baseboard_init(void) | ||
314 | { | ||
315 | /* register CPLD access */ | ||
316 | iotable_init(pcm990_io_desc, ARRAY_SIZE(pcm990_io_desc)); | ||
317 | |||
318 | /* register CPLD's IRQ controller */ | ||
319 | pcm990_init_irq(); | ||
320 | |||
321 | platform_device_register(&pxa27x_device_ac97); | ||
322 | |||
323 | /* MMC */ | ||
324 | pxa_set_mci_info(&pcm990_mci_platform_data); | ||
325 | |||
326 | /* USB host */ | ||
327 | pxa_set_ohci_info(&pcm990_ohci_platform_data); | ||
328 | |||
329 | printk(KERN_INFO"PCM-990 Evaluation baseboard initialized\n"); | ||
330 | } | ||
diff --git a/arch/arm/mach-pxa/pm.c b/arch/arm/mach-pxa/pm.c index a941c71c7d06..039194cbe477 100644 --- a/arch/arm/mach-pxa/pm.c +++ b/arch/arm/mach-pxa/pm.c | |||
@@ -38,34 +38,37 @@ int pxa_pm_enter(suspend_state_t state) | |||
38 | iwmmxt_task_disable(NULL); | 38 | iwmmxt_task_disable(NULL); |
39 | #endif | 39 | #endif |
40 | 40 | ||
41 | pxa_cpu_pm_fns->save(sleep_save); | 41 | /* skip registers saving for standby */ |
42 | if (state != PM_SUSPEND_STANDBY) { | ||
43 | pxa_cpu_pm_fns->save(sleep_save); | ||
44 | /* before sleeping, calculate and save a checksum */ | ||
45 | for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) | ||
46 | sleep_save_checksum += sleep_save[i]; | ||
47 | } | ||
42 | 48 | ||
43 | /* Clear sleep reset status */ | 49 | /* Clear sleep reset status */ |
44 | RCSR = RCSR_SMR; | 50 | RCSR = RCSR_SMR; |
45 | 51 | ||
46 | /* before sleeping, calculate and save a checksum */ | ||
47 | for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) | ||
48 | sleep_save_checksum += sleep_save[i]; | ||
49 | |||
50 | /* *** go zzz *** */ | 52 | /* *** go zzz *** */ |
51 | pxa_cpu_pm_fns->enter(state); | 53 | pxa_cpu_pm_fns->enter(state); |
52 | cpu_init(); | 54 | cpu_init(); |
53 | 55 | ||
54 | /* after sleeping, validate the checksum */ | 56 | if (state != PM_SUSPEND_STANDBY) { |
55 | for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) | 57 | /* after sleeping, validate the checksum */ |
56 | checksum += sleep_save[i]; | 58 | for (i = 0; i < pxa_cpu_pm_fns->save_size - 1; i++) |
59 | checksum += sleep_save[i]; | ||
57 | 60 | ||
58 | /* if invalid, display message and wait for a hardware reset */ | 61 | /* if invalid, display message and wait for a hardware reset */ |
59 | if (checksum != sleep_save_checksum) { | 62 | if (checksum != sleep_save_checksum) { |
60 | #ifdef CONFIG_ARCH_LUBBOCK | 63 | #ifdef CONFIG_ARCH_LUBBOCK |
61 | LUB_HEXLED = 0xbadbadc5; | 64 | LUB_HEXLED = 0xbadbadc5; |
62 | #endif | 65 | #endif |
63 | while (1) | 66 | while (1) |
64 | pxa_cpu_pm_fns->enter(state); | 67 | pxa_cpu_pm_fns->enter(state); |
68 | } | ||
69 | pxa_cpu_pm_fns->restore(sleep_save); | ||
65 | } | 70 | } |
66 | 71 | ||
67 | pxa_cpu_pm_fns->restore(sleep_save); | ||
68 | |||
69 | pr_debug("*** made it back from resume\n"); | 72 | pr_debug("*** made it back from resume\n"); |
70 | 73 | ||
71 | return 0; | 74 | return 0; |
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c index 655668d4d0e9..dd54496083cb 100644 --- a/arch/arm/mach-pxa/poodle.c +++ b/arch/arm/mach-pxa/poodle.c | |||
@@ -215,12 +215,10 @@ static int poodle_mci_init(struct device *dev, irq_handler_t poodle_detect_int, | |||
215 | err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, | 215 | err = request_irq(POODLE_IRQ_GPIO_nSD_DETECT, poodle_detect_int, |
216 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 216 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
217 | "MMC card detect", data); | 217 | "MMC card detect", data); |
218 | if (err) { | 218 | if (err) |
219 | printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 219 | printk(KERN_ERR "poodle_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
220 | return -1; | ||
221 | } | ||
222 | 220 | ||
223 | return 0; | 221 | return err; |
224 | } | 222 | } |
225 | 223 | ||
226 | static void poodle_mci_setpower(struct device *dev, unsigned int vdd) | 224 | static void poodle_mci_setpower(struct device *dev, unsigned int vdd) |
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c index 9732d5d9466b..ddd05bf78e02 100644 --- a/arch/arm/mach-pxa/pxa25x.c +++ b/arch/arm/mach-pxa/pxa25x.c | |||
@@ -111,21 +111,27 @@ static const struct clkops clk_pxa25x_lcd_ops = { | |||
111 | * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz | 111 | * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz |
112 | * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) | 112 | * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly) |
113 | */ | 113 | */ |
114 | static struct clk pxa25x_hwuart_clk = | ||
115 | INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev) | ||
116 | ; | ||
117 | |||
114 | static struct clk pxa25x_clks[] = { | 118 | static struct clk pxa25x_clks[] = { |
115 | INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), | 119 | INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev), |
116 | INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), | 120 | INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev), |
117 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), | 121 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), |
118 | INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev), | ||
119 | INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), | 122 | INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL), |
120 | INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), | 123 | INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev), |
121 | INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), | 124 | INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev), |
122 | INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), | 125 | INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev), |
126 | |||
127 | INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev), | ||
128 | INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev), | ||
129 | INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev), | ||
130 | |||
123 | /* | 131 | /* |
124 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | 132 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), |
125 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), | 133 | INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL), |
126 | INIT_CKEN("SSPCLK", SSP, 3686400, 0, NULL), | ||
127 | INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), | 134 | INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL), |
128 | INIT_CKEN("NSSPCLK", NSSP, 3686400, 0, NULL), | ||
129 | */ | 135 | */ |
130 | INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), | 136 | INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL), |
131 | }; | 137 | }; |
@@ -213,8 +219,6 @@ static void pxa25x_cpu_pm_restore(unsigned long *sleep_save) | |||
213 | 219 | ||
214 | static void pxa25x_cpu_pm_enter(suspend_state_t state) | 220 | static void pxa25x_cpu_pm_enter(suspend_state_t state) |
215 | { | 221 | { |
216 | CKEN = 0; | ||
217 | |||
218 | switch (state) { | 222 | switch (state) { |
219 | case PM_SUSPEND_MEM: | 223 | case PM_SUSPEND_MEM: |
220 | /* set resume return address */ | 224 | /* set resume return address */ |
@@ -236,6 +240,8 @@ static void __init pxa25x_init_pm(void) | |||
236 | { | 240 | { |
237 | pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns; | 241 | pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns; |
238 | } | 242 | } |
243 | #else | ||
244 | static inline void pxa25x_init_pm(void) {} | ||
239 | #endif | 245 | #endif |
240 | 246 | ||
241 | /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm | 247 | /* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm |
@@ -287,30 +293,33 @@ void __init pxa25x_init_irq(void) | |||
287 | } | 293 | } |
288 | 294 | ||
289 | static struct platform_device *pxa25x_devices[] __initdata = { | 295 | static struct platform_device *pxa25x_devices[] __initdata = { |
290 | &pxa_device_mci, | ||
291 | &pxa_device_udc, | 296 | &pxa_device_udc, |
292 | &pxa_device_fb, | ||
293 | &pxa_device_ffuart, | 297 | &pxa_device_ffuart, |
294 | &pxa_device_btuart, | 298 | &pxa_device_btuart, |
295 | &pxa_device_stuart, | 299 | &pxa_device_stuart, |
296 | &pxa_device_i2c, | ||
297 | &pxa_device_i2s, | 300 | &pxa_device_i2s, |
298 | &pxa_device_ficp, | ||
299 | &pxa_device_rtc, | 301 | &pxa_device_rtc, |
302 | &pxa25x_device_ssp, | ||
303 | &pxa25x_device_nssp, | ||
304 | &pxa25x_device_assp, | ||
300 | }; | 305 | }; |
301 | 306 | ||
302 | static int __init pxa25x_init(void) | 307 | static int __init pxa25x_init(void) |
303 | { | 308 | { |
304 | int ret = 0; | 309 | int ret = 0; |
305 | 310 | ||
311 | /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */ | ||
312 | if (cpu_is_pxa25x()) | ||
313 | clks_register(&pxa25x_hwuart_clk, 1); | ||
314 | |||
306 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) { | 315 | if (cpu_is_pxa21x() || cpu_is_pxa25x()) { |
307 | clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); | 316 | clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks)); |
308 | 317 | ||
309 | if ((ret = pxa_init_dma(16))) | 318 | if ((ret = pxa_init_dma(16))) |
310 | return ret; | 319 | return ret; |
311 | #ifdef CONFIG_PM | 320 | |
312 | pxa25x_init_pm(); | 321 | pxa25x_init_pm(); |
313 | #endif | 322 | |
314 | ret = platform_add_devices(pxa25x_devices, | 323 | ret = platform_add_devices(pxa25x_devices, |
315 | ARRAY_SIZE(pxa25x_devices)); | 324 | ARRAY_SIZE(pxa25x_devices)); |
316 | } | 325 | } |
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index 57efebdc4324..96cf274ec7cb 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
22 | #include <asm/arch/irqs.h> | 22 | #include <asm/arch/irqs.h> |
23 | #include <asm/arch/pxa-regs.h> | 23 | #include <asm/arch/pxa-regs.h> |
24 | #include <asm/arch/pxa2xx-regs.h> | ||
24 | #include <asm/arch/ohci.h> | 25 | #include <asm/arch/ohci.h> |
25 | #include <asm/arch/pm.h> | 26 | #include <asm/arch/pm.h> |
26 | #include <asm/arch/dma.h> | 27 | #include <asm/arch/dma.h> |
@@ -151,11 +152,12 @@ static struct clk pxa27x_clks[] = { | |||
151 | INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), | 152 | INIT_CKEN("I2CCLK", PWRI2C, 13000000, 0, &pxa27x_device_i2c_power.dev), |
152 | INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), | 153 | INIT_CKEN("KBDCLK", KEYPAD, 32768, 0, NULL), |
153 | 154 | ||
155 | INIT_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), | ||
156 | INIT_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), | ||
157 | INIT_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), | ||
158 | |||
154 | /* | 159 | /* |
155 | INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), | 160 | INIT_CKEN("PWMCLK", PWM0, 13000000, 0, NULL), |
156 | INIT_CKEN("SSPCLK", SSP1, 13000000, 0, NULL), | ||
157 | INIT_CKEN("SSPCLK", SSP2, 13000000, 0, NULL), | ||
158 | INIT_CKEN("SSPCLK", SSP3, 13000000, 0, NULL), | ||
159 | INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), | 161 | INIT_CKEN("MSLCLK", MSL, 48000000, 0, NULL), |
160 | INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), | 162 | INIT_CKEN("USIMCLK", USIM, 48000000, 0, NULL), |
161 | INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), | 163 | INIT_CKEN("MSTKCLK", MEMSTK, 19500000, 0, NULL), |
@@ -264,12 +266,6 @@ void pxa27x_cpu_pm_enter(suspend_state_t state) | |||
264 | { | 266 | { |
265 | extern void pxa_cpu_standby(void); | 267 | extern void pxa_cpu_standby(void); |
266 | 268 | ||
267 | if (state == PM_SUSPEND_STANDBY) | ||
268 | CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER) | | ||
269 | (1 << CKEN_LCD) | (1 << CKEN_PWM0); | ||
270 | else | ||
271 | CKEN = (1 << CKEN_MEMC) | (1 << CKEN_OSTIMER); | ||
272 | |||
273 | /* ensure voltage-change sequencer not initiated, which hangs */ | 269 | /* ensure voltage-change sequencer not initiated, which hangs */ |
274 | PCFR &= ~PCFR_FVC; | 270 | PCFR &= ~PCFR_FVC; |
275 | 271 | ||
@@ -305,6 +301,8 @@ static void __init pxa27x_init_pm(void) | |||
305 | { | 301 | { |
306 | pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns; | 302 | pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns; |
307 | } | 303 | } |
304 | #else | ||
305 | static inline void pxa27x_init_pm(void) {} | ||
308 | #endif | 306 | #endif |
309 | 307 | ||
310 | /* PXA27x: Various gpios can issue wakeup events. This logic only | 308 | /* PXA27x: Various gpios can issue wakeup events. This logic only |
@@ -374,37 +372,6 @@ void __init pxa27x_init_irq(void) | |||
374 | * device registration specific to PXA27x. | 372 | * device registration specific to PXA27x. |
375 | */ | 373 | */ |
376 | 374 | ||
377 | static u64 pxa27x_dmamask = 0xffffffffUL; | ||
378 | |||
379 | static struct resource pxa27x_ohci_resources[] = { | ||
380 | [0] = { | ||
381 | .start = 0x4C000000, | ||
382 | .end = 0x4C00ff6f, | ||
383 | .flags = IORESOURCE_MEM, | ||
384 | }, | ||
385 | [1] = { | ||
386 | .start = IRQ_USBH1, | ||
387 | .end = IRQ_USBH1, | ||
388 | .flags = IORESOURCE_IRQ, | ||
389 | }, | ||
390 | }; | ||
391 | |||
392 | struct platform_device pxa27x_device_ohci = { | ||
393 | .name = "pxa27x-ohci", | ||
394 | .id = -1, | ||
395 | .dev = { | ||
396 | .dma_mask = &pxa27x_dmamask, | ||
397 | .coherent_dma_mask = 0xffffffff, | ||
398 | }, | ||
399 | .num_resources = ARRAY_SIZE(pxa27x_ohci_resources), | ||
400 | .resource = pxa27x_ohci_resources, | ||
401 | }; | ||
402 | |||
403 | void __init pxa_set_ohci_info(struct pxaohci_platform_data *info) | ||
404 | { | ||
405 | pxa27x_device_ohci.dev.platform_data = info; | ||
406 | } | ||
407 | |||
408 | static struct resource i2c_power_resources[] = { | 375 | static struct resource i2c_power_resources[] = { |
409 | { | 376 | { |
410 | .start = 0x40f00180, | 377 | .start = 0x40f00180, |
@@ -430,18 +397,16 @@ void __init pxa_set_i2c_power_info(struct i2c_pxa_platform_data *info) | |||
430 | } | 397 | } |
431 | 398 | ||
432 | static struct platform_device *devices[] __initdata = { | 399 | static struct platform_device *devices[] __initdata = { |
433 | &pxa_device_mci, | ||
434 | &pxa_device_udc, | 400 | &pxa_device_udc, |
435 | &pxa_device_fb, | ||
436 | &pxa_device_ffuart, | 401 | &pxa_device_ffuart, |
437 | &pxa_device_btuart, | 402 | &pxa_device_btuart, |
438 | &pxa_device_stuart, | 403 | &pxa_device_stuart, |
439 | &pxa_device_i2c, | ||
440 | &pxa_device_i2s, | 404 | &pxa_device_i2s, |
441 | &pxa_device_ficp, | ||
442 | &pxa_device_rtc, | 405 | &pxa_device_rtc, |
443 | &pxa27x_device_i2c_power, | 406 | &pxa27x_device_i2c_power, |
444 | &pxa27x_device_ohci, | 407 | &pxa27x_device_ssp1, |
408 | &pxa27x_device_ssp2, | ||
409 | &pxa27x_device_ssp3, | ||
445 | }; | 410 | }; |
446 | 411 | ||
447 | static int __init pxa27x_init(void) | 412 | static int __init pxa27x_init(void) |
@@ -452,9 +417,9 @@ static int __init pxa27x_init(void) | |||
452 | 417 | ||
453 | if ((ret = pxa_init_dma(32))) | 418 | if ((ret = pxa_init_dma(32))) |
454 | return ret; | 419 | return ret; |
455 | #ifdef CONFIG_PM | 420 | |
456 | pxa27x_init_pm(); | 421 | pxa27x_init_pm(); |
457 | #endif | 422 | |
458 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); | 423 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
459 | } | 424 | } |
460 | return ret; | 425 | return ret; |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index 61d9c9d69e6b..5cbf057a1b32 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/pm.h> | 19 | #include <linux/pm.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
22 | #include <linux/io.h> | ||
22 | 23 | ||
23 | #include <asm/hardware.h> | 24 | #include <asm/hardware.h> |
24 | #include <asm/arch/pxa3xx-regs.h> | 25 | #include <asm/arch/pxa3xx-regs.h> |
@@ -86,7 +87,7 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) | |||
86 | HSS / 1000000, (HSS % 1000000) / 10000); | 87 | HSS / 1000000, (HSS % 1000000) / 10000); |
87 | } | 88 | } |
88 | 89 | ||
89 | return CLK; | 90 | return CLK / 1000; |
90 | } | 91 | } |
91 | 92 | ||
92 | /* | 93 | /* |
@@ -189,8 +190,237 @@ static struct clk pxa3xx_clks[] = { | |||
189 | 190 | ||
190 | PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), | 191 | PXA3xx_CKEN("I2CCLK", I2C, 32842000, 0, &pxa_device_i2c.dev), |
191 | PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), | 192 | PXA3xx_CKEN("UDCCLK", UDC, 48000000, 5, &pxa_device_udc.dev), |
193 | PXA3xx_CKEN("USBCLK", USBH, 48000000, 0, &pxa27x_device_ohci.dev), | ||
194 | |||
195 | PXA3xx_CKEN("SSPCLK", SSP1, 13000000, 0, &pxa27x_device_ssp1.dev), | ||
196 | PXA3xx_CKEN("SSPCLK", SSP2, 13000000, 0, &pxa27x_device_ssp2.dev), | ||
197 | PXA3xx_CKEN("SSPCLK", SSP3, 13000000, 0, &pxa27x_device_ssp3.dev), | ||
198 | PXA3xx_CKEN("SSPCLK", SSP4, 13000000, 0, &pxa3xx_device_ssp4.dev), | ||
199 | |||
200 | PXA3xx_CKEN("MMCCLK", MMC1, 19500000, 0, &pxa_device_mci.dev), | ||
201 | PXA3xx_CKEN("MMCCLK", MMC2, 19500000, 0, &pxa3xx_device_mci2.dev), | ||
202 | PXA3xx_CKEN("MMCCLK", MMC3, 19500000, 0, &pxa3xx_device_mci3.dev), | ||
203 | }; | ||
204 | |||
205 | #ifdef CONFIG_PM | ||
206 | #define SLEEP_SAVE_SIZE 4 | ||
207 | |||
208 | #define ISRAM_START 0x5c000000 | ||
209 | #define ISRAM_SIZE SZ_256K | ||
210 | |||
211 | static void __iomem *sram; | ||
212 | static unsigned long wakeup_src; | ||
213 | |||
214 | static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) | ||
215 | { | ||
216 | pr_debug("PM: CKENA=%08x CKENB=%08x\n", CKENA, CKENB); | ||
217 | |||
218 | if (CKENA & (1 << CKEN_USBH)) { | ||
219 | printk(KERN_ERR "PM: USB host clock not stopped?\n"); | ||
220 | CKENA &= ~(1 << CKEN_USBH); | ||
221 | } | ||
222 | // CKENA |= 1 << (CKEN_ISC & 31); | ||
223 | |||
224 | /* | ||
225 | * Low power modes require the HSIO2 clock to be enabled. | ||
226 | */ | ||
227 | CKENB |= 1 << (CKEN_HSIO2 & 31); | ||
228 | } | ||
229 | |||
230 | static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save) | ||
231 | { | ||
232 | CKENB &= ~(1 << (CKEN_HSIO2 & 31)); | ||
233 | } | ||
234 | |||
235 | /* | ||
236 | * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic | ||
237 | * memory controller has to be reinitialised, so we place some code | ||
238 | * in the SRAM to perform this function. | ||
239 | * | ||
240 | * We disable FIQs across the standby - otherwise, we might receive a | ||
241 | * FIQ while the SDRAM is unavailable. | ||
242 | */ | ||
243 | static void pxa3xx_cpu_standby(unsigned int pwrmode) | ||
244 | { | ||
245 | extern const char pm_enter_standby_start[], pm_enter_standby_end[]; | ||
246 | void (*fn)(unsigned int) = (void __force *)(sram + 0x8000); | ||
247 | |||
248 | memcpy_toio(sram + 0x8000, pm_enter_standby_start, | ||
249 | pm_enter_standby_end - pm_enter_standby_start); | ||
250 | |||
251 | AD2D0SR = ~0; | ||
252 | AD2D1SR = ~0; | ||
253 | AD2D0ER = wakeup_src; | ||
254 | AD2D1ER = 0; | ||
255 | ASCR = ASCR; | ||
256 | ARSR = ARSR; | ||
257 | |||
258 | local_fiq_disable(); | ||
259 | fn(pwrmode); | ||
260 | local_fiq_enable(); | ||
261 | |||
262 | AD2D0ER = 0; | ||
263 | AD2D1ER = 0; | ||
264 | |||
265 | printk("PM: AD2D0SR=%08x ASCR=%08x\n", AD2D0SR, ASCR); | ||
266 | } | ||
267 | |||
268 | static void pxa3xx_cpu_pm_enter(suspend_state_t state) | ||
269 | { | ||
270 | /* | ||
271 | * Don't sleep if no wakeup sources are defined | ||
272 | */ | ||
273 | if (wakeup_src == 0) | ||
274 | return; | ||
275 | |||
276 | switch (state) { | ||
277 | case PM_SUSPEND_STANDBY: | ||
278 | pxa3xx_cpu_standby(PXA3xx_PM_S0D2C2); | ||
279 | break; | ||
280 | |||
281 | case PM_SUSPEND_MEM: | ||
282 | break; | ||
283 | } | ||
284 | } | ||
285 | |||
286 | static int pxa3xx_cpu_pm_valid(suspend_state_t state) | ||
287 | { | ||
288 | return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; | ||
289 | } | ||
290 | |||
291 | static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { | ||
292 | .save_size = SLEEP_SAVE_SIZE, | ||
293 | .save = pxa3xx_cpu_pm_save, | ||
294 | .restore = pxa3xx_cpu_pm_restore, | ||
295 | .valid = pxa3xx_cpu_pm_valid, | ||
296 | .enter = pxa3xx_cpu_pm_enter, | ||
192 | }; | 297 | }; |
193 | 298 | ||
299 | static void __init pxa3xx_init_pm(void) | ||
300 | { | ||
301 | sram = ioremap(ISRAM_START, ISRAM_SIZE); | ||
302 | if (!sram) { | ||
303 | printk(KERN_ERR "Unable to map ISRAM: disabling standby/suspend\n"); | ||
304 | return; | ||
305 | } | ||
306 | |||
307 | /* | ||
308 | * Since we copy wakeup code into the SRAM, we need to ensure | ||
309 | * that it is preserved over the low power modes. Note: bit 8 | ||
310 | * is undocumented in the developer manual, but must be set. | ||
311 | */ | ||
312 | AD1R |= ADXR_L2 | ADXR_R0; | ||
313 | AD2R |= ADXR_L2 | ADXR_R0; | ||
314 | AD3R |= ADXR_L2 | ADXR_R0; | ||
315 | |||
316 | /* | ||
317 | * Clear the resume enable registers. | ||
318 | */ | ||
319 | AD1D0ER = 0; | ||
320 | AD2D0ER = 0; | ||
321 | AD2D1ER = 0; | ||
322 | AD3ER = 0; | ||
323 | |||
324 | pxa_cpu_pm_fns = &pxa3xx_cpu_pm_fns; | ||
325 | } | ||
326 | |||
327 | static int pxa3xx_set_wake(unsigned int irq, unsigned int on) | ||
328 | { | ||
329 | unsigned long flags, mask = 0; | ||
330 | |||
331 | switch (irq) { | ||
332 | case IRQ_SSP3: | ||
333 | mask = ADXER_MFP_WSSP3; | ||
334 | break; | ||
335 | case IRQ_MSL: | ||
336 | mask = ADXER_WMSL0; | ||
337 | break; | ||
338 | case IRQ_USBH2: | ||
339 | case IRQ_USBH1: | ||
340 | mask = ADXER_WUSBH; | ||
341 | break; | ||
342 | case IRQ_KEYPAD: | ||
343 | mask = ADXER_WKP; | ||
344 | break; | ||
345 | case IRQ_AC97: | ||
346 | mask = ADXER_MFP_WAC97; | ||
347 | break; | ||
348 | case IRQ_USIM: | ||
349 | mask = ADXER_WUSIM0; | ||
350 | break; | ||
351 | case IRQ_SSP2: | ||
352 | mask = ADXER_MFP_WSSP2; | ||
353 | break; | ||
354 | case IRQ_I2C: | ||
355 | mask = ADXER_MFP_WI2C; | ||
356 | break; | ||
357 | case IRQ_STUART: | ||
358 | mask = ADXER_MFP_WUART3; | ||
359 | break; | ||
360 | case IRQ_BTUART: | ||
361 | mask = ADXER_MFP_WUART2; | ||
362 | break; | ||
363 | case IRQ_FFUART: | ||
364 | mask = ADXER_MFP_WUART1; | ||
365 | break; | ||
366 | case IRQ_MMC: | ||
367 | mask = ADXER_MFP_WMMC1; | ||
368 | break; | ||
369 | case IRQ_SSP: | ||
370 | mask = ADXER_MFP_WSSP1; | ||
371 | break; | ||
372 | case IRQ_RTCAlrm: | ||
373 | mask = ADXER_WRTC; | ||
374 | break; | ||
375 | case IRQ_SSP4: | ||
376 | mask = ADXER_MFP_WSSP4; | ||
377 | break; | ||
378 | case IRQ_TSI: | ||
379 | mask = ADXER_WTSI; | ||
380 | break; | ||
381 | case IRQ_USIM2: | ||
382 | mask = ADXER_WUSIM1; | ||
383 | break; | ||
384 | case IRQ_MMC2: | ||
385 | mask = ADXER_MFP_WMMC2; | ||
386 | break; | ||
387 | case IRQ_NAND: | ||
388 | mask = ADXER_MFP_WFLASH; | ||
389 | break; | ||
390 | case IRQ_USB2: | ||
391 | mask = ADXER_WUSB2; | ||
392 | break; | ||
393 | case IRQ_WAKEUP0: | ||
394 | mask = ADXER_WEXTWAKE0; | ||
395 | break; | ||
396 | case IRQ_WAKEUP1: | ||
397 | mask = ADXER_WEXTWAKE1; | ||
398 | break; | ||
399 | case IRQ_MMC3: | ||
400 | mask = ADXER_MFP_GEN12; | ||
401 | break; | ||
402 | } | ||
403 | |||
404 | local_irq_save(flags); | ||
405 | if (on) | ||
406 | wakeup_src |= mask; | ||
407 | else | ||
408 | wakeup_src &= ~mask; | ||
409 | local_irq_restore(flags); | ||
410 | |||
411 | return 0; | ||
412 | } | ||
413 | |||
414 | static void pxa3xx_init_irq_pm(void) | ||
415 | { | ||
416 | pxa_init_irq_set_wake(pxa3xx_set_wake); | ||
417 | } | ||
418 | |||
419 | #else | ||
420 | static inline void pxa3xx_init_pm(void) {} | ||
421 | static inline void pxa3xx_init_irq_pm(void) {} | ||
422 | #endif | ||
423 | |||
194 | void __init pxa3xx_init_irq(void) | 424 | void __init pxa3xx_init_irq(void) |
195 | { | 425 | { |
196 | /* enable CP6 access */ | 426 | /* enable CP6 access */ |
@@ -202,6 +432,7 @@ void __init pxa3xx_init_irq(void) | |||
202 | pxa_init_irq_low(); | 432 | pxa_init_irq_low(); |
203 | pxa_init_irq_high(); | 433 | pxa_init_irq_high(); |
204 | pxa_init_irq_gpio(128); | 434 | pxa_init_irq_gpio(128); |
435 | pxa3xx_init_irq_pm(); | ||
205 | } | 436 | } |
206 | 437 | ||
207 | /* | 438 | /* |
@@ -209,16 +440,16 @@ void __init pxa3xx_init_irq(void) | |||
209 | */ | 440 | */ |
210 | 441 | ||
211 | static struct platform_device *devices[] __initdata = { | 442 | static struct platform_device *devices[] __initdata = { |
212 | &pxa_device_mci, | ||
213 | &pxa_device_udc, | 443 | &pxa_device_udc, |
214 | &pxa_device_fb, | ||
215 | &pxa_device_ffuart, | 444 | &pxa_device_ffuart, |
216 | &pxa_device_btuart, | 445 | &pxa_device_btuart, |
217 | &pxa_device_stuart, | 446 | &pxa_device_stuart, |
218 | &pxa_device_i2c, | ||
219 | &pxa_device_i2s, | 447 | &pxa_device_i2s, |
220 | &pxa_device_ficp, | ||
221 | &pxa_device_rtc, | 448 | &pxa_device_rtc, |
449 | &pxa27x_device_ssp1, | ||
450 | &pxa27x_device_ssp2, | ||
451 | &pxa27x_device_ssp3, | ||
452 | &pxa3xx_device_ssp4, | ||
222 | }; | 453 | }; |
223 | 454 | ||
224 | static int __init pxa3xx_init(void) | 455 | static int __init pxa3xx_init(void) |
@@ -231,6 +462,8 @@ static int __init pxa3xx_init(void) | |||
231 | if ((ret = pxa_init_dma(32))) | 462 | if ((ret = pxa_init_dma(32))) |
232 | return ret; | 463 | return ret; |
233 | 464 | ||
465 | pxa3xx_init_pm(); | ||
466 | |||
234 | return platform_add_devices(devices, ARRAY_SIZE(devices)); | 467 | return platform_add_devices(devices, ARRAY_SIZE(devices)); |
235 | } | 468 | } |
236 | return 0; | 469 | return 0; |
diff --git a/arch/arm/mach-pxa/sharpsl.h b/arch/arm/mach-pxa/sharpsl.h index da4769caaf72..047909a76651 100644 --- a/arch/arm/mach-pxa/sharpsl.h +++ b/arch/arm/mach-pxa/sharpsl.h | |||
@@ -26,28 +26,15 @@ void corgi_ssp_set_machinfo(struct corgissp_machinfo *machinfo); | |||
26 | 26 | ||
27 | 27 | ||
28 | /* | 28 | /* |
29 | * SharpSL Backlight | 29 | * SharpSL/Corgi LCD Driver |
30 | */ | 30 | */ |
31 | void corgi_bl_set_intensity(int intensity); | 31 | void corgi_lcdtg_suspend(void); |
32 | void spitz_bl_set_intensity(int intensity); | 32 | void corgi_lcdtg_hw_init(int mode); |
33 | void akita_bl_set_intensity(int intensity); | ||
34 | |||
35 | |||
36 | /* | ||
37 | * SharpSL Touchscreen Driver | ||
38 | */ | ||
39 | unsigned long corgi_get_hsync_len(void); | ||
40 | unsigned long spitz_get_hsync_len(void); | ||
41 | void corgi_put_hsync(void); | ||
42 | void spitz_put_hsync(void); | ||
43 | void corgi_wait_hsync(void); | ||
44 | void spitz_wait_hsync(void); | ||
45 | 33 | ||
46 | 34 | ||
47 | /* | 35 | /* |
48 | * SharpSL Battery/PM Driver | 36 | * SharpSL Battery/PM Driver |
49 | */ | 37 | */ |
50 | |||
51 | #define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) | 38 | #define READ_GPIO_BIT(x) (GPLR(x) & GPIO_bit(x)) |
52 | 39 | ||
53 | /* MAX1111 Channel Definitions */ | 40 | /* MAX1111 Channel Definitions */ |
diff --git a/arch/arm/mach-pxa/sleep.S b/arch/arm/mach-pxa/sleep.S index d0447723b73a..14bb4a93ea52 100644 --- a/arch/arm/mach-pxa/sleep.S +++ b/arch/arm/mach-pxa/sleep.S | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/hardware.h> | 16 | #include <asm/hardware.h> |
17 | 17 | ||
18 | #include <asm/arch/pxa-regs.h> | 18 | #include <asm/arch/pxa-regs.h> |
19 | #include <asm/arch/pxa2xx-regs.h> | ||
19 | 20 | ||
20 | #define MDREFR_KDIV 0x200a4000 // all banks | 21 | #define MDREFR_KDIV 0x200a4000 // all banks |
21 | #define CCCR_SLEEP 0x00000107 // L=7 2N=2 A=0 PPDIS=0 CPDIS=0 | 22 | #define CCCR_SLEEP 0x00000107 // L=7 2N=2 A=0 PPDIS=0 CPDIS=0 |
@@ -49,6 +50,7 @@ pxa_cpu_save_sp: | |||
49 | str r0, [r1] | 50 | str r0, [r1] |
50 | ldr pc, [sp], #4 | 51 | ldr pc, [sp], #4 |
51 | 52 | ||
53 | #ifdef CONFIG_PXA27x | ||
52 | /* | 54 | /* |
53 | * pxa27x_cpu_suspend() | 55 | * pxa27x_cpu_suspend() |
54 | * | 56 | * |
@@ -104,9 +106,11 @@ ENTRY(pxa27x_cpu_suspend) | |||
104 | 106 | ||
105 | @ align execution to a cache line | 107 | @ align execution to a cache line |
106 | b pxa_cpu_do_suspend | 108 | b pxa_cpu_do_suspend |
109 | #endif | ||
107 | 110 | ||
111 | #ifdef CONFIG_PXA25x | ||
108 | /* | 112 | /* |
109 | * pxa27x_cpu_suspend() | 113 | * pxa25x_cpu_suspend() |
110 | * | 114 | * |
111 | * Forces CPU into sleep state. | 115 | * Forces CPU into sleep state. |
112 | * | 116 | * |
@@ -169,6 +173,7 @@ ENTRY(pxa25x_cpu_suspend) | |||
169 | mcr p14, 0, r0, c6, c0, 0 | 173 | mcr p14, 0, r0, c6, c0, 0 |
170 | orr r0, r0, #2 @ initiate change bit | 174 | orr r0, r0, #2 @ initiate change bit |
171 | b pxa_cpu_do_suspend | 175 | b pxa_cpu_do_suspend |
176 | #endif | ||
172 | 177 | ||
173 | .ltorg | 178 | .ltorg |
174 | .align 5 | 179 | .align 5 |
@@ -208,7 +213,7 @@ pxa_cpu_do_suspend: | |||
208 | 20: b 20b @ loop waiting for sleep | 213 | 20: b 20b @ loop waiting for sleep |
209 | 214 | ||
210 | /* | 215 | /* |
211 | * cpu_pxa_resume() | 216 | * pxa_cpu_resume() |
212 | * | 217 | * |
213 | * entry point from bootloader into kernel during resume | 218 | * entry point from bootloader into kernel during resume |
214 | * | 219 | * |
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c index 2d78199d24af..5078edeadf96 100644 --- a/arch/arm/mach-pxa/spitz.c +++ b/arch/arm/mach-pxa/spitz.c | |||
@@ -271,6 +271,55 @@ static struct platform_device spitzled_device = { | |||
271 | /* | 271 | /* |
272 | * Spitz Touch Screen Device | 272 | * Spitz Touch Screen Device |
273 | */ | 273 | */ |
274 | |||
275 | static unsigned long (*get_hsync_invperiod)(struct device *dev); | ||
276 | |||
277 | static void inline sharpsl_wait_sync(int gpio) | ||
278 | { | ||
279 | while((GPLR(gpio) & GPIO_bit(gpio)) == 0); | ||
280 | while((GPLR(gpio) & GPIO_bit(gpio)) != 0); | ||
281 | } | ||
282 | |||
283 | static struct device *spitz_pxafb_dev; | ||
284 | |||
285 | static int is_pxafb_device(struct device * dev, void * data) | ||
286 | { | ||
287 | struct platform_device *pdev = container_of(dev, struct platform_device, dev); | ||
288 | |||
289 | return (strncmp(pdev->name, "pxa2xx-fb", 9) == 0); | ||
290 | } | ||
291 | |||
292 | static unsigned long spitz_get_hsync_invperiod(void) | ||
293 | { | ||
294 | #ifdef CONFIG_FB_PXA | ||
295 | if (!spitz_pxafb_dev) { | ||
296 | spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); | ||
297 | if (!spitz_pxafb_dev) | ||
298 | return 0; | ||
299 | } | ||
300 | if (!get_hsync_invperiod) | ||
301 | get_hsync_invperiod = symbol_get(pxafb_get_hsync_time); | ||
302 | if (!get_hsync_invperiod) | ||
303 | #endif | ||
304 | return 0; | ||
305 | |||
306 | return get_hsync_invperiod(spitz_pxafb_dev); | ||
307 | } | ||
308 | |||
309 | static void spitz_put_hsync(void) | ||
310 | { | ||
311 | put_device(spitz_pxafb_dev); | ||
312 | if (get_hsync_invperiod) | ||
313 | symbol_put(pxafb_get_hsync_time); | ||
314 | spitz_pxafb_dev = NULL; | ||
315 | get_hsync_invperiod = NULL; | ||
316 | } | ||
317 | |||
318 | static void spitz_wait_hsync(void) | ||
319 | { | ||
320 | sharpsl_wait_sync(SPITZ_GPIO_HSYNC); | ||
321 | } | ||
322 | |||
274 | static struct resource spitzts_resources[] = { | 323 | static struct resource spitzts_resources[] = { |
275 | [0] = { | 324 | [0] = { |
276 | .start = SPITZ_IRQ_GPIO_TP_INT, | 325 | .start = SPITZ_IRQ_GPIO_TP_INT, |
@@ -280,9 +329,9 @@ static struct resource spitzts_resources[] = { | |||
280 | }; | 329 | }; |
281 | 330 | ||
282 | static struct corgits_machinfo spitz_ts_machinfo = { | 331 | static struct corgits_machinfo spitz_ts_machinfo = { |
283 | .get_hsync_len = spitz_get_hsync_len, | 332 | .get_hsync_invperiod = spitz_get_hsync_invperiod, |
284 | .put_hsync = spitz_put_hsync, | 333 | .put_hsync = spitz_put_hsync, |
285 | .wait_hsync = spitz_wait_hsync, | 334 | .wait_hsync = spitz_wait_hsync, |
286 | }; | 335 | }; |
287 | 336 | ||
288 | static struct platform_device spitzts_device = { | 337 | static struct platform_device spitzts_device = { |
@@ -325,12 +374,10 @@ static int spitz_mci_init(struct device *dev, irq_handler_t spitz_detect_int, vo | |||
325 | err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, | 374 | err = request_irq(SPITZ_IRQ_GPIO_nSD_DETECT, spitz_detect_int, |
326 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 375 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
327 | "MMC card detect", data); | 376 | "MMC card detect", data); |
328 | if (err) { | 377 | if (err) |
329 | printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 378 | printk(KERN_ERR "spitz_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
330 | return -1; | ||
331 | } | ||
332 | 379 | ||
333 | return 0; | 380 | return err; |
334 | } | 381 | } |
335 | 382 | ||
336 | static void spitz_mci_setpower(struct device *dev, unsigned int vdd) | 383 | static void spitz_mci_setpower(struct device *dev, unsigned int vdd) |
@@ -423,6 +470,14 @@ static struct pxaficp_platform_data spitz_ficp_platform_data = { | |||
423 | * Spitz PXA Framebuffer | 470 | * Spitz PXA Framebuffer |
424 | */ | 471 | */ |
425 | 472 | ||
473 | static void spitz_lcd_power(int on, struct fb_var_screeninfo *var) | ||
474 | { | ||
475 | if (on) | ||
476 | corgi_lcdtg_hw_init(var->xres); | ||
477 | else | ||
478 | corgi_lcdtg_suspend(); | ||
479 | } | ||
480 | |||
426 | static struct pxafb_mode_info spitz_pxafb_modes[] = { | 481 | static struct pxafb_mode_info spitz_pxafb_modes[] = { |
427 | { | 482 | { |
428 | .pixclock = 19231, | 483 | .pixclock = 19231, |
@@ -520,6 +575,27 @@ static void __init common_init(void) | |||
520 | set_pxa_fb_info(&spitz_pxafb_info); | 575 | set_pxa_fb_info(&spitz_pxafb_info); |
521 | } | 576 | } |
522 | 577 | ||
578 | #if defined(CONFIG_MACH_SPITZ) || defined(CONFIG_MACH_BORZOI) | ||
579 | static void spitz_bl_set_intensity(int intensity) | ||
580 | { | ||
581 | if (intensity > 0x10) | ||
582 | intensity += 0x10; | ||
583 | |||
584 | /* Bits 0-4 are accessed via the SSP interface */ | ||
585 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
586 | |||
587 | /* Bit 5 is via SCOOP */ | ||
588 | if (intensity & 0x0020) | ||
589 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
590 | else | ||
591 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_CONT); | ||
592 | |||
593 | if (intensity) | ||
594 | set_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
595 | else | ||
596 | reset_scoop_gpio(&spitzscoop2_device.dev, SPITZ_SCP2_BACKLIGHT_ON); | ||
597 | } | ||
598 | |||
523 | static void __init spitz_init(void) | 599 | static void __init spitz_init(void) |
524 | { | 600 | { |
525 | platform_scoop_config = &spitz_pcmcia_config; | 601 | platform_scoop_config = &spitz_pcmcia_config; |
@@ -530,6 +606,7 @@ static void __init spitz_init(void) | |||
530 | 606 | ||
531 | platform_device_register(&spitzscoop2_device); | 607 | platform_device_register(&spitzscoop2_device); |
532 | } | 608 | } |
609 | #endif | ||
533 | 610 | ||
534 | #ifdef CONFIG_MACH_AKITA | 611 | #ifdef CONFIG_MACH_AKITA |
535 | /* | 612 | /* |
@@ -542,6 +619,26 @@ struct platform_device akitaioexp_device = { | |||
542 | 619 | ||
543 | EXPORT_SYMBOL_GPL(akitaioexp_device); | 620 | EXPORT_SYMBOL_GPL(akitaioexp_device); |
544 | 621 | ||
622 | static void akita_bl_set_intensity(int intensity) | ||
623 | { | ||
624 | if (intensity > 0x10) | ||
625 | intensity += 0x10; | ||
626 | |||
627 | /* Bits 0-4 are accessed via the SSP interface */ | ||
628 | corgi_ssp_blduty_set(intensity & 0x1f); | ||
629 | |||
630 | /* Bit 5 is via IO-Expander */ | ||
631 | if (intensity & 0x0020) | ||
632 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
633 | else | ||
634 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_CONT); | ||
635 | |||
636 | if (intensity) | ||
637 | akita_set_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
638 | else | ||
639 | akita_reset_ioexp(&akitaioexp_device.dev, AKITA_IOEXP_BACKLIGHT_ON); | ||
640 | } | ||
641 | |||
545 | static void __init akita_init(void) | 642 | static void __init akita_init(void) |
546 | { | 643 | { |
547 | spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode; | 644 | spitz_ficp_platform_data.transceiver_mode = akita_irda_transceiver_mode; |
@@ -558,7 +655,6 @@ static void __init akita_init(void) | |||
558 | } | 655 | } |
559 | #endif | 656 | #endif |
560 | 657 | ||
561 | |||
562 | static void __init fixup_spitz(struct machine_desc *desc, | 658 | static void __init fixup_spitz(struct machine_desc *desc, |
563 | struct tag *tags, char **cmdline, struct meminfo *mi) | 659 | struct tag *tags, char **cmdline, struct meminfo *mi) |
564 | { | 660 | { |
diff --git a/arch/arm/mach-pxa/ssp.c b/arch/arm/mach-pxa/ssp.c index 422afee88169..00af7f2fed66 100644 --- a/arch/arm/mach-pxa/ssp.c +++ b/arch/arm/mach-pxa/ssp.c | |||
@@ -32,45 +32,27 @@ | |||
32 | #include <linux/ioport.h> | 32 | #include <linux/ioport.h> |
33 | #include <linux/init.h> | 33 | #include <linux/init.h> |
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <linux/clk.h> | ||
36 | #include <linux/err.h> | ||
37 | #include <linux/platform_device.h> | ||
38 | |||
35 | #include <asm/io.h> | 39 | #include <asm/io.h> |
36 | #include <asm/irq.h> | 40 | #include <asm/irq.h> |
37 | #include <asm/hardware.h> | 41 | #include <asm/hardware.h> |
38 | #include <asm/arch/ssp.h> | 42 | #include <asm/arch/ssp.h> |
39 | #include <asm/arch/pxa-regs.h> | 43 | #include <asm/arch/pxa-regs.h> |
40 | 44 | #include <asm/arch/regs-ssp.h> | |
41 | #define PXA_SSP_PORTS 3 | ||
42 | 45 | ||
43 | #define TIMEOUT 100000 | 46 | #define TIMEOUT 100000 |
44 | 47 | ||
45 | struct ssp_info_ { | ||
46 | int irq; | ||
47 | u32 clock; | ||
48 | }; | ||
49 | |||
50 | /* | ||
51 | * SSP port clock and IRQ settings | ||
52 | */ | ||
53 | static const struct ssp_info_ ssp_info[PXA_SSP_PORTS] = { | ||
54 | #if defined (CONFIG_PXA27x) | ||
55 | {IRQ_SSP, CKEN_SSP1}, | ||
56 | {IRQ_SSP2, CKEN_SSP2}, | ||
57 | {IRQ_SSP3, CKEN_SSP3}, | ||
58 | #else | ||
59 | {IRQ_SSP, CKEN_SSP}, | ||
60 | {IRQ_NSSP, CKEN_NSSP}, | ||
61 | {IRQ_ASSP, CKEN_ASSP}, | ||
62 | #endif | ||
63 | }; | ||
64 | |||
65 | static DEFINE_MUTEX(mutex); | ||
66 | static int use_count[PXA_SSP_PORTS] = {0, 0, 0}; | ||
67 | |||
68 | static irqreturn_t ssp_interrupt(int irq, void *dev_id) | 48 | static irqreturn_t ssp_interrupt(int irq, void *dev_id) |
69 | { | 49 | { |
70 | struct ssp_dev *dev = (struct ssp_dev*) dev_id; | 50 | struct ssp_dev *dev = dev_id; |
71 | unsigned int status = SSSR_P(dev->port); | 51 | struct ssp_device *ssp = dev->ssp; |
52 | unsigned int status; | ||
72 | 53 | ||
73 | SSSR_P(dev->port) = status; /* clear status bits */ | 54 | status = __raw_readl(ssp->mmio_base + SSSR); |
55 | __raw_writel(status, ssp->mmio_base + SSSR); | ||
74 | 56 | ||
75 | if (status & SSSR_ROR) | 57 | if (status & SSSR_ROR) |
76 | printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port); | 58 | printk(KERN_WARNING "SSP(%d): receiver overrun\n", dev->port); |
@@ -99,15 +81,16 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id) | |||
99 | */ | 81 | */ |
100 | int ssp_write_word(struct ssp_dev *dev, u32 data) | 82 | int ssp_write_word(struct ssp_dev *dev, u32 data) |
101 | { | 83 | { |
84 | struct ssp_device *ssp = dev->ssp; | ||
102 | int timeout = TIMEOUT; | 85 | int timeout = TIMEOUT; |
103 | 86 | ||
104 | while (!(SSSR_P(dev->port) & SSSR_TNF)) { | 87 | while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_TNF)) { |
105 | if (!--timeout) | 88 | if (!--timeout) |
106 | return -ETIMEDOUT; | 89 | return -ETIMEDOUT; |
107 | cpu_relax(); | 90 | cpu_relax(); |
108 | } | 91 | } |
109 | 92 | ||
110 | SSDR_P(dev->port) = data; | 93 | __raw_writel(data, ssp->mmio_base + SSDR); |
111 | 94 | ||
112 | return 0; | 95 | return 0; |
113 | } | 96 | } |
@@ -129,15 +112,16 @@ int ssp_write_word(struct ssp_dev *dev, u32 data) | |||
129 | */ | 112 | */ |
130 | int ssp_read_word(struct ssp_dev *dev, u32 *data) | 113 | int ssp_read_word(struct ssp_dev *dev, u32 *data) |
131 | { | 114 | { |
115 | struct ssp_device *ssp = dev->ssp; | ||
132 | int timeout = TIMEOUT; | 116 | int timeout = TIMEOUT; |
133 | 117 | ||
134 | while (!(SSSR_P(dev->port) & SSSR_RNE)) { | 118 | while (!(__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE)) { |
135 | if (!--timeout) | 119 | if (!--timeout) |
136 | return -ETIMEDOUT; | 120 | return -ETIMEDOUT; |
137 | cpu_relax(); | 121 | cpu_relax(); |
138 | } | 122 | } |
139 | 123 | ||
140 | *data = SSDR_P(dev->port); | 124 | *data = __raw_readl(ssp->mmio_base + SSDR); |
141 | return 0; | 125 | return 0; |
142 | } | 126 | } |
143 | 127 | ||
@@ -151,17 +135,28 @@ int ssp_read_word(struct ssp_dev *dev, u32 *data) | |||
151 | */ | 135 | */ |
152 | int ssp_flush(struct ssp_dev *dev) | 136 | int ssp_flush(struct ssp_dev *dev) |
153 | { | 137 | { |
138 | struct ssp_device *ssp = dev->ssp; | ||
154 | int timeout = TIMEOUT * 2; | 139 | int timeout = TIMEOUT * 2; |
155 | 140 | ||
141 | /* ensure TX FIFO is empty instead of not full */ | ||
142 | if (cpu_is_pxa3xx()) { | ||
143 | while (__raw_readl(ssp->mmio_base + SSSR) & 0xf00) { | ||
144 | if (!--timeout) | ||
145 | return -ETIMEDOUT; | ||
146 | cpu_relax(); | ||
147 | } | ||
148 | timeout = TIMEOUT * 2; | ||
149 | } | ||
150 | |||
156 | do { | 151 | do { |
157 | while (SSSR_P(dev->port) & SSSR_RNE) { | 152 | while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_RNE) { |
158 | if (!--timeout) | 153 | if (!--timeout) |
159 | return -ETIMEDOUT; | 154 | return -ETIMEDOUT; |
160 | (void) SSDR_P(dev->port); | 155 | (void)__raw_readl(ssp->mmio_base + SSDR); |
161 | } | 156 | } |
162 | if (!--timeout) | 157 | if (!--timeout) |
163 | return -ETIMEDOUT; | 158 | return -ETIMEDOUT; |
164 | } while (SSSR_P(dev->port) & SSSR_BSY); | 159 | } while (__raw_readl(ssp->mmio_base + SSSR) & SSSR_BSY); |
165 | 160 | ||
166 | return 0; | 161 | return 0; |
167 | } | 162 | } |
@@ -173,7 +168,12 @@ int ssp_flush(struct ssp_dev *dev) | |||
173 | */ | 168 | */ |
174 | void ssp_enable(struct ssp_dev *dev) | 169 | void ssp_enable(struct ssp_dev *dev) |
175 | { | 170 | { |
176 | SSCR0_P(dev->port) |= SSCR0_SSE; | 171 | struct ssp_device *ssp = dev->ssp; |
172 | uint32_t sscr0; | ||
173 | |||
174 | sscr0 = __raw_readl(ssp->mmio_base + SSCR0); | ||
175 | sscr0 |= SSCR0_SSE; | ||
176 | __raw_writel(sscr0, ssp->mmio_base + SSCR0); | ||
177 | } | 177 | } |
178 | 178 | ||
179 | /** | 179 | /** |
@@ -183,7 +183,12 @@ void ssp_enable(struct ssp_dev *dev) | |||
183 | */ | 183 | */ |
184 | void ssp_disable(struct ssp_dev *dev) | 184 | void ssp_disable(struct ssp_dev *dev) |
185 | { | 185 | { |
186 | SSCR0_P(dev->port) &= ~SSCR0_SSE; | 186 | struct ssp_device *ssp = dev->ssp; |
187 | uint32_t sscr0; | ||
188 | |||
189 | sscr0 = __raw_readl(ssp->mmio_base + SSCR0); | ||
190 | sscr0 &= ~SSCR0_SSE; | ||
191 | __raw_writel(sscr0, ssp->mmio_base + SSCR0); | ||
187 | } | 192 | } |
188 | 193 | ||
189 | /** | 194 | /** |
@@ -192,14 +197,16 @@ void ssp_disable(struct ssp_dev *dev) | |||
192 | * | 197 | * |
193 | * Save the configured SSP state for suspend. | 198 | * Save the configured SSP state for suspend. |
194 | */ | 199 | */ |
195 | void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp) | 200 | void ssp_save_state(struct ssp_dev *dev, struct ssp_state *state) |
196 | { | 201 | { |
197 | ssp->cr0 = SSCR0_P(dev->port); | 202 | struct ssp_device *ssp = dev->ssp; |
198 | ssp->cr1 = SSCR1_P(dev->port); | 203 | |
199 | ssp->to = SSTO_P(dev->port); | 204 | state->cr0 = __raw_readl(ssp->mmio_base + SSCR0); |
200 | ssp->psp = SSPSP_P(dev->port); | 205 | state->cr1 = __raw_readl(ssp->mmio_base + SSCR1); |
206 | state->to = __raw_readl(ssp->mmio_base + SSTO); | ||
207 | state->psp = __raw_readl(ssp->mmio_base + SSPSP); | ||
201 | 208 | ||
202 | SSCR0_P(dev->port) &= ~SSCR0_SSE; | 209 | ssp_disable(dev); |
203 | } | 210 | } |
204 | 211 | ||
205 | /** | 212 | /** |
@@ -208,16 +215,18 @@ void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp) | |||
208 | * | 215 | * |
209 | * Restore the SSP configuration saved previously by ssp_save_state. | 216 | * Restore the SSP configuration saved previously by ssp_save_state. |
210 | */ | 217 | */ |
211 | void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp) | 218 | void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *state) |
212 | { | 219 | { |
213 | SSSR_P(dev->port) = SSSR_ROR | SSSR_TUR | SSSR_BCE; | 220 | struct ssp_device *ssp = dev->ssp; |
221 | uint32_t sssr = SSSR_ROR | SSSR_TUR | SSSR_BCE; | ||
214 | 222 | ||
215 | SSCR0_P(dev->port) = ssp->cr0 & ~SSCR0_SSE; | 223 | __raw_writel(sssr, ssp->mmio_base + SSSR); |
216 | SSCR1_P(dev->port) = ssp->cr1; | ||
217 | SSTO_P(dev->port) = ssp->to; | ||
218 | SSPSP_P(dev->port) = ssp->psp; | ||
219 | 224 | ||
220 | SSCR0_P(dev->port) = ssp->cr0; | 225 | __raw_writel(state->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); |
226 | __raw_writel(state->cr1, ssp->mmio_base + SSCR1); | ||
227 | __raw_writel(state->to, ssp->mmio_base + SSTO); | ||
228 | __raw_writel(state->psp, ssp->mmio_base + SSPSP); | ||
229 | __raw_writel(state->cr0, ssp->mmio_base + SSCR0); | ||
221 | } | 230 | } |
222 | 231 | ||
223 | /** | 232 | /** |
@@ -231,15 +240,17 @@ void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp) | |||
231 | */ | 240 | */ |
232 | int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed) | 241 | int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed) |
233 | { | 242 | { |
243 | struct ssp_device *ssp = dev->ssp; | ||
244 | |||
234 | dev->mode = mode; | 245 | dev->mode = mode; |
235 | dev->flags = flags; | 246 | dev->flags = flags; |
236 | dev->psp_flags = psp_flags; | 247 | dev->psp_flags = psp_flags; |
237 | dev->speed = speed; | 248 | dev->speed = speed; |
238 | 249 | ||
239 | /* set up port type, speed, port settings */ | 250 | /* set up port type, speed, port settings */ |
240 | SSCR0_P(dev->port) = (dev->speed | dev->mode); | 251 | __raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0); |
241 | SSCR1_P(dev->port) = dev->flags; | 252 | __raw_writel(dev->flags, ssp->mmio_base + SSCR1); |
242 | SSPSP_P(dev->port) = dev->psp_flags; | 253 | __raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP); |
243 | 254 | ||
244 | return 0; | 255 | return 0; |
245 | } | 256 | } |
@@ -256,44 +267,32 @@ int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 spee | |||
256 | */ | 267 | */ |
257 | int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags) | 268 | int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags) |
258 | { | 269 | { |
270 | struct ssp_device *ssp; | ||
259 | int ret; | 271 | int ret; |
260 | 272 | ||
261 | if (port > PXA_SSP_PORTS || port == 0) | 273 | ssp = ssp_request(port, "SSP"); |
274 | if (ssp == NULL) | ||
262 | return -ENODEV; | 275 | return -ENODEV; |
263 | 276 | ||
264 | mutex_lock(&mutex); | 277 | dev->ssp = ssp; |
265 | if (use_count[port - 1]) { | ||
266 | mutex_unlock(&mutex); | ||
267 | return -EBUSY; | ||
268 | } | ||
269 | use_count[port - 1]++; | ||
270 | |||
271 | if (!request_mem_region(__PREG(SSCR0_P(port)), 0x2c, "SSP")) { | ||
272 | use_count[port - 1]--; | ||
273 | mutex_unlock(&mutex); | ||
274 | return -EBUSY; | ||
275 | } | ||
276 | dev->port = port; | 278 | dev->port = port; |
277 | 279 | ||
278 | /* do we need to get irq */ | 280 | /* do we need to get irq */ |
279 | if (!(init_flags & SSP_NO_IRQ)) { | 281 | if (!(init_flags & SSP_NO_IRQ)) { |
280 | ret = request_irq(ssp_info[port-1].irq, ssp_interrupt, | 282 | ret = request_irq(ssp->irq, ssp_interrupt, |
281 | 0, "SSP", dev); | 283 | 0, "SSP", dev); |
282 | if (ret) | 284 | if (ret) |
283 | goto out_region; | 285 | goto out_region; |
284 | dev->irq = ssp_info[port-1].irq; | 286 | dev->irq = ssp->irq; |
285 | } else | 287 | } else |
286 | dev->irq = 0; | 288 | dev->irq = 0; |
287 | 289 | ||
288 | /* turn on SSP port clock */ | 290 | /* turn on SSP port clock */ |
289 | pxa_set_cken(ssp_info[port-1].clock, 1); | 291 | clk_enable(ssp->clk); |
290 | mutex_unlock(&mutex); | ||
291 | return 0; | 292 | return 0; |
292 | 293 | ||
293 | out_region: | 294 | out_region: |
294 | release_mem_region(__PREG(SSCR0_P(port)), 0x2c); | 295 | ssp_free(ssp); |
295 | use_count[port - 1]--; | ||
296 | mutex_unlock(&mutex); | ||
297 | return ret; | 296 | return ret; |
298 | } | 297 | } |
299 | 298 | ||
@@ -304,23 +303,240 @@ out_region: | |||
304 | */ | 303 | */ |
305 | void ssp_exit(struct ssp_dev *dev) | 304 | void ssp_exit(struct ssp_dev *dev) |
306 | { | 305 | { |
307 | mutex_lock(&mutex); | 306 | struct ssp_device *ssp = dev->ssp; |
308 | SSCR0_P(dev->port) &= ~SSCR0_SSE; | 307 | |
308 | ssp_disable(dev); | ||
309 | free_irq(dev->irq, dev); | ||
310 | clk_disable(ssp->clk); | ||
311 | ssp_free(ssp); | ||
312 | } | ||
313 | |||
314 | static DEFINE_MUTEX(ssp_lock); | ||
315 | static LIST_HEAD(ssp_list); | ||
316 | |||
317 | struct ssp_device *ssp_request(int port, const char *label) | ||
318 | { | ||
319 | struct ssp_device *ssp = NULL; | ||
320 | |||
321 | mutex_lock(&ssp_lock); | ||
322 | |||
323 | list_for_each_entry(ssp, &ssp_list, node) { | ||
324 | if (ssp->port_id == port && ssp->use_count == 0) { | ||
325 | ssp->use_count++; | ||
326 | ssp->label = label; | ||
327 | break; | ||
328 | } | ||
329 | } | ||
330 | |||
331 | mutex_unlock(&ssp_lock); | ||
332 | |||
333 | if (ssp->port_id != port) | ||
334 | return NULL; | ||
335 | |||
336 | return ssp; | ||
337 | } | ||
338 | EXPORT_SYMBOL(ssp_request); | ||
339 | |||
340 | void ssp_free(struct ssp_device *ssp) | ||
341 | { | ||
342 | mutex_lock(&ssp_lock); | ||
343 | if (ssp->use_count) { | ||
344 | ssp->use_count--; | ||
345 | ssp->label = NULL; | ||
346 | } else | ||
347 | dev_err(&ssp->pdev->dev, "device already free\n"); | ||
348 | mutex_unlock(&ssp_lock); | ||
349 | } | ||
350 | EXPORT_SYMBOL(ssp_free); | ||
351 | |||
352 | static int __devinit ssp_probe(struct platform_device *pdev, int type) | ||
353 | { | ||
354 | struct resource *res; | ||
355 | struct ssp_device *ssp; | ||
356 | int ret = 0; | ||
357 | |||
358 | ssp = kzalloc(sizeof(struct ssp_device), GFP_KERNEL); | ||
359 | if (ssp == NULL) { | ||
360 | dev_err(&pdev->dev, "failed to allocate memory"); | ||
361 | return -ENOMEM; | ||
362 | } | ||
363 | |||
364 | ssp->clk = clk_get(&pdev->dev, "SSPCLK"); | ||
365 | if (IS_ERR(ssp->clk)) { | ||
366 | ret = PTR_ERR(ssp->clk); | ||
367 | goto err_free; | ||
368 | } | ||
369 | |||
370 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
371 | if (res == NULL) { | ||
372 | dev_err(&pdev->dev, "no memory resource defined\n"); | ||
373 | ret = -ENODEV; | ||
374 | goto err_free_clk; | ||
375 | } | ||
376 | |||
377 | res = request_mem_region(res->start, res->end - res->start + 1, | ||
378 | pdev->name); | ||
379 | if (res == NULL) { | ||
380 | dev_err(&pdev->dev, "failed to request memory resource\n"); | ||
381 | ret = -EBUSY; | ||
382 | goto err_free_clk; | ||
383 | } | ||
384 | |||
385 | ssp->phys_base = res->start; | ||
386 | |||
387 | ssp->mmio_base = ioremap(res->start, res->end - res->start + 1); | ||
388 | if (ssp->mmio_base == NULL) { | ||
389 | dev_err(&pdev->dev, "failed to ioremap() registers\n"); | ||
390 | ret = -ENODEV; | ||
391 | goto err_free_mem; | ||
392 | } | ||
393 | |||
394 | ssp->irq = platform_get_irq(pdev, 0); | ||
395 | if (ssp->irq < 0) { | ||
396 | dev_err(&pdev->dev, "no IRQ resource defined\n"); | ||
397 | ret = -ENODEV; | ||
398 | goto err_free_io; | ||
399 | } | ||
400 | |||
401 | res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | ||
402 | if (res == NULL) { | ||
403 | dev_err(&pdev->dev, "no SSP RX DRCMR defined\n"); | ||
404 | ret = -ENODEV; | ||
405 | goto err_free_io; | ||
406 | } | ||
407 | ssp->drcmr_rx = res->start; | ||
408 | |||
409 | res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | ||
410 | if (res == NULL) { | ||
411 | dev_err(&pdev->dev, "no SSP TX DRCMR defined\n"); | ||
412 | ret = -ENODEV; | ||
413 | goto err_free_io; | ||
414 | } | ||
415 | ssp->drcmr_tx = res->start; | ||
416 | |||
417 | /* PXA2xx/3xx SSP ports starts from 1 and the internal pdev->id | ||
418 | * starts from 0, do a translation here | ||
419 | */ | ||
420 | ssp->port_id = pdev->id + 1; | ||
421 | ssp->use_count = 0; | ||
422 | ssp->type = type; | ||
423 | |||
424 | mutex_lock(&ssp_lock); | ||
425 | list_add(&ssp->node, &ssp_list); | ||
426 | mutex_unlock(&ssp_lock); | ||
427 | |||
428 | platform_set_drvdata(pdev, ssp); | ||
429 | return 0; | ||
430 | |||
431 | err_free_io: | ||
432 | iounmap(ssp->mmio_base); | ||
433 | err_free_mem: | ||
434 | release_mem_region(res->start, res->end - res->start + 1); | ||
435 | err_free_clk: | ||
436 | clk_put(ssp->clk); | ||
437 | err_free: | ||
438 | kfree(ssp); | ||
439 | return ret; | ||
440 | } | ||
441 | |||
442 | static int __devexit ssp_remove(struct platform_device *pdev) | ||
443 | { | ||
444 | struct resource *res; | ||
445 | struct ssp_device *ssp; | ||
446 | |||
447 | ssp = platform_get_drvdata(pdev); | ||
448 | if (ssp == NULL) | ||
449 | return -ENODEV; | ||
450 | |||
451 | iounmap(ssp->mmio_base); | ||
452 | |||
453 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
454 | release_mem_region(res->start, res->end - res->start + 1); | ||
455 | |||
456 | clk_put(ssp->clk); | ||
309 | 457 | ||
310 | if (dev->port > PXA_SSP_PORTS || dev->port == 0) { | 458 | mutex_lock(&ssp_lock); |
311 | printk(KERN_WARNING "SSP: tried to close invalid port\n"); | 459 | list_del(&ssp->node); |
312 | mutex_unlock(&mutex); | 460 | mutex_unlock(&ssp_lock); |
313 | return; | 461 | |
462 | kfree(ssp); | ||
463 | return 0; | ||
464 | } | ||
465 | |||
466 | static int __devinit pxa25x_ssp_probe(struct platform_device *pdev) | ||
467 | { | ||
468 | return ssp_probe(pdev, PXA25x_SSP); | ||
469 | } | ||
470 | |||
471 | static int __devinit pxa25x_nssp_probe(struct platform_device *pdev) | ||
472 | { | ||
473 | return ssp_probe(pdev, PXA25x_NSSP); | ||
474 | } | ||
475 | |||
476 | static int __devinit pxa27x_ssp_probe(struct platform_device *pdev) | ||
477 | { | ||
478 | return ssp_probe(pdev, PXA27x_SSP); | ||
479 | } | ||
480 | |||
481 | static struct platform_driver pxa25x_ssp_driver = { | ||
482 | .driver = { | ||
483 | .name = "pxa25x-ssp", | ||
484 | }, | ||
485 | .probe = pxa25x_ssp_probe, | ||
486 | .remove = __devexit_p(ssp_remove), | ||
487 | }; | ||
488 | |||
489 | static struct platform_driver pxa25x_nssp_driver = { | ||
490 | .driver = { | ||
491 | .name = "pxa25x-nssp", | ||
492 | }, | ||
493 | .probe = pxa25x_nssp_probe, | ||
494 | .remove = __devexit_p(ssp_remove), | ||
495 | }; | ||
496 | |||
497 | static struct platform_driver pxa27x_ssp_driver = { | ||
498 | .driver = { | ||
499 | .name = "pxa27x-ssp", | ||
500 | }, | ||
501 | .probe = pxa27x_ssp_probe, | ||
502 | .remove = __devexit_p(ssp_remove), | ||
503 | }; | ||
504 | |||
505 | static int __init pxa_ssp_init(void) | ||
506 | { | ||
507 | int ret = 0; | ||
508 | |||
509 | ret = platform_driver_register(&pxa25x_ssp_driver); | ||
510 | if (ret) { | ||
511 | printk(KERN_ERR "failed to register pxa25x_ssp_driver"); | ||
512 | return ret; | ||
513 | } | ||
514 | |||
515 | ret = platform_driver_register(&pxa25x_nssp_driver); | ||
516 | if (ret) { | ||
517 | printk(KERN_ERR "failed to register pxa25x_nssp_driver"); | ||
518 | return ret; | ||
519 | } | ||
520 | |||
521 | ret = platform_driver_register(&pxa27x_ssp_driver); | ||
522 | if (ret) { | ||
523 | printk(KERN_ERR "failed to register pxa27x_ssp_driver"); | ||
524 | return ret; | ||
314 | } | 525 | } |
315 | 526 | ||
316 | pxa_set_cken(ssp_info[dev->port-1].clock, 0); | 527 | return ret; |
317 | if (dev->irq) | 528 | } |
318 | free_irq(dev->irq, dev); | 529 | |
319 | release_mem_region(__PREG(SSCR0_P(dev->port)), 0x2c); | 530 | static void __exit pxa_ssp_exit(void) |
320 | use_count[dev->port - 1]--; | 531 | { |
321 | mutex_unlock(&mutex); | 532 | platform_driver_unregister(&pxa25x_ssp_driver); |
533 | platform_driver_unregister(&pxa25x_nssp_driver); | ||
534 | platform_driver_unregister(&pxa27x_ssp_driver); | ||
322 | } | 535 | } |
323 | 536 | ||
537 | arch_initcall(pxa_ssp_init); | ||
538 | module_exit(pxa_ssp_exit); | ||
539 | |||
324 | EXPORT_SYMBOL(ssp_write_word); | 540 | EXPORT_SYMBOL(ssp_write_word); |
325 | EXPORT_SYMBOL(ssp_read_word); | 541 | EXPORT_SYMBOL(ssp_read_word); |
326 | EXPORT_SYMBOL(ssp_flush); | 542 | EXPORT_SYMBOL(ssp_flush); |
diff --git a/arch/arm/mach-pxa/standby.S b/arch/arm/mach-pxa/standby.S index d774430d02c0..167412e6bec8 100644 --- a/arch/arm/mach-pxa/standby.S +++ b/arch/arm/mach-pxa/standby.S | |||
@@ -17,6 +17,7 @@ | |||
17 | 17 | ||
18 | .text | 18 | .text |
19 | 19 | ||
20 | #ifdef CONFIG_PXA27x | ||
20 | ENTRY(pxa_cpu_standby) | 21 | ENTRY(pxa_cpu_standby) |
21 | ldr r0, =PSSR | 22 | ldr r0, =PSSR |
22 | mov r1, #(PSSR_PH | PSSR_STS) | 23 | mov r1, #(PSSR_PH | PSSR_STS) |
@@ -29,3 +30,85 @@ ENTRY(pxa_cpu_standby) | |||
29 | 1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby | 30 | 1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby |
30 | str r1, [r0] @ make sure PSSR_PH/STS are clear | 31 | str r1, [r0] @ make sure PSSR_PH/STS are clear |
31 | mov pc, lr | 32 | mov pc, lr |
33 | |||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_PXA3xx | ||
37 | |||
38 | #define MDCNFG 0x0000 | ||
39 | #define MDCNFG_DMCEN (1 << 30) | ||
40 | #define DDR_HCAL 0x0060 | ||
41 | #define DDR_HCAL_HCRNG 0x1f | ||
42 | #define DDR_HCAL_HCPROG (1 << 28) | ||
43 | #define DDR_HCAL_HCEN (1 << 31) | ||
44 | #define DMCIER 0x0070 | ||
45 | #define DMCIER_EDLP (1 << 29) | ||
46 | #define DMCISR 0x0078 | ||
47 | #define RCOMP 0x0100 | ||
48 | #define RCOMP_SWEVAL (1 << 31) | ||
49 | |||
50 | ENTRY(pm_enter_standby_start) | ||
51 | mov r1, #0xf6000000 @ DMEMC_REG_BASE (MDCNFG) | ||
52 | add r1, r1, #0x00100000 | ||
53 | |||
54 | /* | ||
55 | * Preload the TLB entry for accessing the dynamic memory | ||
56 | * controller registers. Note that page table lookups will | ||
57 | * fail until the dynamic memory controller has been | ||
58 | * reinitialised - and that includes MMU page table walks. | ||
59 | * This also means that only the dynamic memory controller | ||
60 | * can be reliably accessed in the code following standby. | ||
61 | */ | ||
62 | ldr r2, [r1] @ Dummy read MDCNFG | ||
63 | |||
64 | mcr p14, 0, r0, c7, c0, 0 | ||
65 | .rept 8 | ||
66 | nop | ||
67 | .endr | ||
68 | |||
69 | ldr r0, [r1, #DDR_HCAL] @ Clear (and wait for) HCEN | ||
70 | bic r0, r0, #DDR_HCAL_HCEN | ||
71 | str r0, [r1, #DDR_HCAL] | ||
72 | 1: ldr r0, [r1, #DDR_HCAL] | ||
73 | tst r0, #DDR_HCAL_HCEN | ||
74 | bne 1b | ||
75 | |||
76 | ldr r0, [r1, #RCOMP] @ Initiate RCOMP | ||
77 | orr r0, r0, #RCOMP_SWEVAL | ||
78 | str r0, [r1, #RCOMP] | ||
79 | |||
80 | mov r0, #~0 @ Clear interrupts | ||
81 | str r0, [r1, #DMCISR] | ||
82 | |||
83 | ldr r0, [r1, #DMCIER] @ set DMIER[EDLP] | ||
84 | orr r0, r0, #DMCIER_EDLP | ||
85 | str r0, [r1, #DMCIER] | ||
86 | |||
87 | ldr r0, [r1, #DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN | ||
88 | bic r0, r0, #DDR_HCAL_HCRNG | ||
89 | orr r0, r0, #DDR_HCAL_HCEN | DDR_HCAL_HCPROG | ||
90 | str r0, [r1, #DDR_HCAL] | ||
91 | |||
92 | 1: ldr r0, [r1, #DMCISR] | ||
93 | tst r0, #DMCIER_EDLP | ||
94 | beq 1b | ||
95 | |||
96 | ldr r0, [r1, #MDCNFG] @ set MDCNFG[DMCEN] | ||
97 | orr r0, r0, #MDCNFG_DMCEN | ||
98 | str r0, [r1, #MDCNFG] | ||
99 | 1: ldr r0, [r1, #MDCNFG] | ||
100 | tst r0, #MDCNFG_DMCEN | ||
101 | beq 1b | ||
102 | |||
103 | ldr r0, [r1, #DDR_HCAL] @ set DDR_HCAL[HCRNG] | ||
104 | orr r0, r0, #2 @ HCRNG | ||
105 | str r0, [r1, #DDR_HCAL] | ||
106 | |||
107 | ldr r0, [r1, #DMCIER] @ Clear the interrupt | ||
108 | bic r0, r0, #0x20000000 | ||
109 | str r0, [r1, #DMCIER] | ||
110 | |||
111 | mov pc, lr | ||
112 | ENTRY(pm_enter_standby_end) | ||
113 | |||
114 | #endif | ||
diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index fbfa1920353d..7b7c0179795b 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c | |||
@@ -59,55 +59,17 @@ unsigned long long sched_clock(void) | |||
59 | } | 59 | } |
60 | 60 | ||
61 | 61 | ||
62 | #define MIN_OSCR_DELTA 16 | ||
63 | |||
62 | static irqreturn_t | 64 | static irqreturn_t |
63 | pxa_ost0_interrupt(int irq, void *dev_id) | 65 | pxa_ost0_interrupt(int irq, void *dev_id) |
64 | { | 66 | { |
65 | int next_match; | ||
66 | struct clock_event_device *c = dev_id; | 67 | struct clock_event_device *c = dev_id; |
67 | 68 | ||
68 | if (c->mode == CLOCK_EVT_MODE_ONESHOT) { | 69 | /* Disarm the compare/match, signal the event. */ |
69 | /* Disarm the compare/match, signal the event. */ | 70 | OIER &= ~OIER_E0; |
70 | OIER &= ~OIER_E0; | 71 | OSSR = OSSR_M0; |
71 | OSSR = OSSR_M0; | 72 | c->event_handler(c); |
72 | c->event_handler(c); | ||
73 | } else if (c->mode == CLOCK_EVT_MODE_PERIODIC) { | ||
74 | /* Call the event handler as many times as necessary | ||
75 | * to recover missed events, if any (if we update | ||
76 | * OSMR0 and OSCR0 is still ahead of us, we've missed | ||
77 | * the event). As we're dealing with that, re-arm the | ||
78 | * compare/match for the next event. | ||
79 | * | ||
80 | * HACK ALERT: | ||
81 | * | ||
82 | * There's a latency between the instruction that | ||
83 | * writes to OSMR0 and the actual commit to the | ||
84 | * physical hardware, because the CPU doesn't (have | ||
85 | * to) run at bus speed, there's a write buffer | ||
86 | * between the CPU and the bus, etc. etc. So if the | ||
87 | * target OSCR0 is "very close", to the OSMR0 load | ||
88 | * value, the update to OSMR0 might not get to the | ||
89 | * hardware in time and we'll miss that interrupt. | ||
90 | * | ||
91 | * To be safe, if the new OSMR0 is "very close" to the | ||
92 | * target OSCR0 value, we call the event_handler as | ||
93 | * though the event actually happened. According to | ||
94 | * Nico's comment in the previous version of this | ||
95 | * code, experience has shown that 6 OSCR ticks is | ||
96 | * "very close" but he went with 8. We will use 16, | ||
97 | * based on the results of testing on PXA270. | ||
98 | * | ||
99 | * To be doubly sure, we also tell clkevt via | ||
100 | * clockevents_register_device() not to ask for | ||
101 | * anything that might put us "very close". | ||
102 | */ | ||
103 | #define MIN_OSCR_DELTA 16 | ||
104 | do { | ||
105 | OSSR = OSSR_M0; | ||
106 | next_match = (OSMR0 += LATCH); | ||
107 | c->event_handler(c); | ||
108 | } while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA) | ||
109 | && (c->mode == CLOCK_EVT_MODE_PERIODIC)); | ||
110 | } | ||
111 | 73 | ||
112 | return IRQ_HANDLED; | 74 | return IRQ_HANDLED; |
113 | } | 75 | } |
@@ -133,14 +95,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
133 | unsigned long irqflags; | 95 | unsigned long irqflags; |
134 | 96 | ||
135 | switch (mode) { | 97 | switch (mode) { |
136 | case CLOCK_EVT_MODE_PERIODIC: | ||
137 | raw_local_irq_save(irqflags); | ||
138 | OSSR = OSSR_M0; | ||
139 | OIER |= OIER_E0; | ||
140 | OSMR0 = OSCR + LATCH; | ||
141 | raw_local_irq_restore(irqflags); | ||
142 | break; | ||
143 | |||
144 | case CLOCK_EVT_MODE_ONESHOT: | 98 | case CLOCK_EVT_MODE_ONESHOT: |
145 | raw_local_irq_save(irqflags); | 99 | raw_local_irq_save(irqflags); |
146 | OIER &= ~OIER_E0; | 100 | OIER &= ~OIER_E0; |
@@ -158,13 +112,14 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev) | |||
158 | break; | 112 | break; |
159 | 113 | ||
160 | case CLOCK_EVT_MODE_RESUME: | 114 | case CLOCK_EVT_MODE_RESUME: |
115 | case CLOCK_EVT_MODE_PERIODIC: | ||
161 | break; | 116 | break; |
162 | } | 117 | } |
163 | } | 118 | } |
164 | 119 | ||
165 | static struct clock_event_device ckevt_pxa_osmr0 = { | 120 | static struct clock_event_device ckevt_pxa_osmr0 = { |
166 | .name = "osmr0", | 121 | .name = "osmr0", |
167 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | 122 | .features = CLOCK_EVT_FEAT_ONESHOT, |
168 | .shift = 32, | 123 | .shift = 32, |
169 | .rating = 200, | 124 | .rating = 200, |
170 | .cpumask = CPU_MASK_CPU0, | 125 | .cpumask = CPU_MASK_CPU0, |
@@ -214,7 +169,7 @@ static void __init pxa_timer_init(void) | |||
214 | ckevt_pxa_osmr0.max_delta_ns = | 169 | ckevt_pxa_osmr0.max_delta_ns = |
215 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); | 170 | clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0); |
216 | ckevt_pxa_osmr0.min_delta_ns = | 171 | ckevt_pxa_osmr0.min_delta_ns = |
217 | clockevent_delta2ns(MIN_OSCR_DELTA, &ckevt_pxa_osmr0) + 1; | 172 | clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1; |
218 | 173 | ||
219 | cksrc_pxa_oscr0.mult = | 174 | cksrc_pxa_oscr0.mult = |
220 | clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift); | 175 | clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift); |
@@ -226,7 +181,7 @@ static void __init pxa_timer_init(void) | |||
226 | } | 181 | } |
227 | 182 | ||
228 | #ifdef CONFIG_PM | 183 | #ifdef CONFIG_PM |
229 | static unsigned long osmr[4], oier; | 184 | static unsigned long osmr[4], oier, oscr; |
230 | 185 | ||
231 | static void pxa_timer_suspend(void) | 186 | static void pxa_timer_suspend(void) |
232 | { | 187 | { |
@@ -235,23 +190,26 @@ static void pxa_timer_suspend(void) | |||
235 | osmr[2] = OSMR2; | 190 | osmr[2] = OSMR2; |
236 | osmr[3] = OSMR3; | 191 | osmr[3] = OSMR3; |
237 | oier = OIER; | 192 | oier = OIER; |
193 | oscr = OSCR; | ||
238 | } | 194 | } |
239 | 195 | ||
240 | static void pxa_timer_resume(void) | 196 | static void pxa_timer_resume(void) |
241 | { | 197 | { |
198 | /* | ||
199 | * Ensure that we have at least MIN_OSCR_DELTA between match | ||
200 | * register 0 and the OSCR, to guarantee that we will receive | ||
201 | * the one-shot timer interrupt. We adjust OSMR0 in preference | ||
202 | * to OSCR to guarantee that OSCR is monotonically incrementing. | ||
203 | */ | ||
204 | if (osmr[0] - oscr < MIN_OSCR_DELTA) | ||
205 | osmr[0] += MIN_OSCR_DELTA; | ||
206 | |||
242 | OSMR0 = osmr[0]; | 207 | OSMR0 = osmr[0]; |
243 | OSMR1 = osmr[1]; | 208 | OSMR1 = osmr[1]; |
244 | OSMR2 = osmr[2]; | 209 | OSMR2 = osmr[2]; |
245 | OSMR3 = osmr[3]; | 210 | OSMR3 = osmr[3]; |
246 | OIER = oier; | 211 | OIER = oier; |
247 | 212 | OSCR = oscr; | |
248 | /* | ||
249 | * OSCR0 is the system timer, which has to increase | ||
250 | * monotonically until it rolls over in hardware. The value | ||
251 | * (OSMR0 - LATCH) is OSCR0 at the most recent system tick, | ||
252 | * which is a handy value to restore to OSCR0. | ||
253 | */ | ||
254 | OSCR = OSMR0 - LATCH; | ||
255 | } | 213 | } |
256 | #else | 214 | #else |
257 | #define pxa_timer_suspend NULL | 215 | #define pxa_timer_suspend NULL |
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c index 240fd042083d..1919756900f4 100644 --- a/arch/arm/mach-pxa/tosa.c +++ b/arch/arm/mach-pxa/tosa.c | |||
@@ -184,16 +184,13 @@ static int tosa_mci_init(struct device *dev, irq_handler_t tosa_detect_int, void | |||
184 | 184 | ||
185 | tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); | 185 | tosa_mci_platform_data.detect_delay = msecs_to_jiffies(250); |
186 | 186 | ||
187 | err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, IRQF_DISABLED, | 187 | err = request_irq(TOSA_IRQ_GPIO_nSD_DETECT, tosa_detect_int, |
188 | IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
188 | "MMC/SD card detect", data); | 189 | "MMC/SD card detect", data); |
189 | if (err) { | 190 | if (err) |
190 | printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 191 | printk(KERN_ERR "tosa_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
191 | return -1; | ||
192 | } | ||
193 | |||
194 | set_irq_type(TOSA_IRQ_GPIO_nSD_DETECT, IRQT_BOTHEDGE); | ||
195 | 192 | ||
196 | return 0; | 193 | return err; |
197 | } | 194 | } |
198 | 195 | ||
199 | static void tosa_mci_setpower(struct device *dev, unsigned int vdd) | 196 | static void tosa_mci_setpower(struct device *dev, unsigned int vdd) |
diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index e4ba43bdf85d..853fc9433750 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c | |||
@@ -296,11 +296,10 @@ static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, v | |||
296 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, | 296 | err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int, |
297 | IRQF_DISABLED | IRQF_TRIGGER_RISING, | 297 | IRQF_DISABLED | IRQF_TRIGGER_RISING, |
298 | "MMC card detect", data); | 298 | "MMC card detect", data); |
299 | if (err) { | 299 | if (err) |
300 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); | 300 | printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); |
301 | return -1; | 301 | |
302 | } | 302 | return err; |
303 | return 0; | ||
304 | } | 303 | } |
305 | 304 | ||
306 | static void trizeps4_mci_exit(struct device *dev, void *data) | 305 | static void trizeps4_mci_exit(struct device *dev, void *data) |
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c index 743a87b2faa1..7731d50dd86c 100644 --- a/arch/arm/mach-pxa/zylonite.c +++ b/arch/arm/mach-pxa/zylonite.c | |||
@@ -25,9 +25,13 @@ | |||
25 | #include <asm/arch/gpio.h> | 25 | #include <asm/arch/gpio.h> |
26 | #include <asm/arch/pxafb.h> | 26 | #include <asm/arch/pxafb.h> |
27 | #include <asm/arch/zylonite.h> | 27 | #include <asm/arch/zylonite.h> |
28 | #include <asm/arch/mmc.h> | ||
28 | 29 | ||
29 | #include "generic.h" | 30 | #include "generic.h" |
30 | 31 | ||
32 | #define MAX_SLOTS 3 | ||
33 | struct platform_mmc_slot zylonite_mmc_slot[MAX_SLOTS]; | ||
34 | |||
31 | int gpio_backlight; | 35 | int gpio_backlight; |
32 | int gpio_eth_irq; | 36 | int gpio_eth_irq; |
33 | 37 | ||
@@ -43,7 +47,7 @@ static struct resource smc91x_resources[] = { | |||
43 | [1] = { | 47 | [1] = { |
44 | .start = -1, /* for run-time assignment */ | 48 | .start = -1, /* for run-time assignment */ |
45 | .end = -1, | 49 | .end = -1, |
46 | .flags = IORESOURCE_IRQ, | 50 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, |
47 | } | 51 | } |
48 | }; | 52 | }; |
49 | 53 | ||
@@ -156,6 +160,95 @@ static void __init zylonite_init_lcd(void) | |||
156 | static inline void zylonite_init_lcd(void) {} | 160 | static inline void zylonite_init_lcd(void) {} |
157 | #endif | 161 | #endif |
158 | 162 | ||
163 | #if defined(CONFIG_MMC) | ||
164 | static int zylonite_mci_ro(struct device *dev) | ||
165 | { | ||
166 | struct platform_device *pdev = to_platform_device(dev); | ||
167 | |||
168 | return gpio_get_value(zylonite_mmc_slot[pdev->id].gpio_wp); | ||
169 | } | ||
170 | |||
171 | static int zylonite_mci_init(struct device *dev, | ||
172 | irq_handler_t zylonite_detect_int, | ||
173 | void *data) | ||
174 | { | ||
175 | struct platform_device *pdev = to_platform_device(dev); | ||
176 | int err, cd_irq, gpio_cd, gpio_wp; | ||
177 | |||
178 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
179 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
180 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
181 | |||
182 | /* | ||
183 | * setup GPIO for Zylonite MMC controller | ||
184 | */ | ||
185 | err = gpio_request(gpio_cd, "mmc card detect"); | ||
186 | if (err) | ||
187 | goto err_request_cd; | ||
188 | gpio_direction_input(gpio_cd); | ||
189 | |||
190 | err = gpio_request(gpio_wp, "mmc write protect"); | ||
191 | if (err) | ||
192 | goto err_request_wp; | ||
193 | gpio_direction_input(gpio_wp); | ||
194 | |||
195 | err = request_irq(cd_irq, zylonite_detect_int, | ||
196 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | ||
197 | "MMC card detect", data); | ||
198 | if (err) { | ||
199 | printk(KERN_ERR "%s: MMC/SD/SDIO: " | ||
200 | "can't request card detect IRQ\n", __func__); | ||
201 | goto err_request_irq; | ||
202 | } | ||
203 | |||
204 | return 0; | ||
205 | |||
206 | err_request_irq: | ||
207 | gpio_free(gpio_wp); | ||
208 | err_request_wp: | ||
209 | gpio_free(gpio_cd); | ||
210 | err_request_cd: | ||
211 | return err; | ||
212 | } | ||
213 | |||
214 | static void zylonite_mci_exit(struct device *dev, void *data) | ||
215 | { | ||
216 | struct platform_device *pdev = to_platform_device(dev); | ||
217 | int cd_irq, gpio_cd, gpio_wp; | ||
218 | |||
219 | cd_irq = gpio_to_irq(zylonite_mmc_slot[pdev->id].gpio_cd); | ||
220 | gpio_cd = zylonite_mmc_slot[pdev->id].gpio_cd; | ||
221 | gpio_wp = zylonite_mmc_slot[pdev->id].gpio_wp; | ||
222 | |||
223 | free_irq(cd_irq, data); | ||
224 | gpio_free(gpio_cd); | ||
225 | gpio_free(gpio_wp); | ||
226 | } | ||
227 | |||
228 | static struct pxamci_platform_data zylonite_mci_platform_data = { | ||
229 | .detect_delay = 20, | ||
230 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
231 | .init = zylonite_mci_init, | ||
232 | .exit = zylonite_mci_exit, | ||
233 | .get_ro = zylonite_mci_ro, | ||
234 | }; | ||
235 | |||
236 | static struct pxamci_platform_data zylonite_mci2_platform_data = { | ||
237 | .detect_delay = 20, | ||
238 | .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, | ||
239 | }; | ||
240 | |||
241 | static void __init zylonite_init_mmc(void) | ||
242 | { | ||
243 | pxa_set_mci_info(&zylonite_mci_platform_data); | ||
244 | pxa3xx_set_mci2_info(&zylonite_mci2_platform_data); | ||
245 | if (cpu_is_pxa310()) | ||
246 | pxa3xx_set_mci3_info(&zylonite_mci_platform_data); | ||
247 | } | ||
248 | #else | ||
249 | static inline void zylonite_init_mmc(void) {} | ||
250 | #endif | ||
251 | |||
159 | static void __init zylonite_init(void) | 252 | static void __init zylonite_init(void) |
160 | { | 253 | { |
161 | /* board-processor specific initialization */ | 254 | /* board-processor specific initialization */ |
@@ -171,6 +264,7 @@ static void __init zylonite_init(void) | |||
171 | platform_device_register(&smc91x_device); | 264 | platform_device_register(&smc91x_device); |
172 | 265 | ||
173 | zylonite_init_lcd(); | 266 | zylonite_init_lcd(); |
267 | zylonite_init_mmc(); | ||
174 | } | 268 | } |
175 | 269 | ||
176 | MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") | 270 | MACHINE_START(ZYLONITE, "PXA3xx Platform Development Kit (aka Zylonite)") |
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c index 1832bc316501..6ac04c09b0e9 100644 --- a/arch/arm/mach-pxa/zylonite_pxa300.c +++ b/arch/arm/mach-pxa/zylonite_pxa300.c | |||
@@ -53,13 +53,13 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
53 | 53 | ||
54 | /* BTUART */ | 54 | /* BTUART */ |
55 | GPIO111_UART2_RTS, | 55 | GPIO111_UART2_RTS, |
56 | GPIO112_UART2_RXD, | 56 | GPIO112_UART2_RXD | MFP_LPM_EDGE_FALL, |
57 | GPIO113_UART2_TXD, | 57 | GPIO113_UART2_TXD, |
58 | GPIO114_UART2_CTS, | 58 | GPIO114_UART2_CTS | MFP_LPM_EDGE_BOTH, |
59 | 59 | ||
60 | /* STUART */ | 60 | /* STUART */ |
61 | GPIO109_UART3_TXD, | 61 | GPIO109_UART3_TXD, |
62 | GPIO110_UART3_RXD, | 62 | GPIO110_UART3_RXD | MFP_LPM_EDGE_FALL, |
63 | 63 | ||
64 | /* AC97 */ | 64 | /* AC97 */ |
65 | GPIO23_AC97_nACRESET, | 65 | GPIO23_AC97_nACRESET, |
@@ -70,16 +70,16 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
70 | GPIO28_AC97_SYNC, | 70 | GPIO28_AC97_SYNC, |
71 | 71 | ||
72 | /* Keypad */ | 72 | /* Keypad */ |
73 | GPIO107_KP_DKIN_0, | 73 | GPIO107_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, |
74 | GPIO108_KP_DKIN_1, | 74 | GPIO108_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, |
75 | GPIO115_KP_MKIN_0, | 75 | GPIO115_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, |
76 | GPIO116_KP_MKIN_1, | 76 | GPIO116_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, |
77 | GPIO117_KP_MKIN_2, | 77 | GPIO117_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, |
78 | GPIO118_KP_MKIN_3, | 78 | GPIO118_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, |
79 | GPIO119_KP_MKIN_4, | 79 | GPIO119_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, |
80 | GPIO120_KP_MKIN_5, | 80 | GPIO120_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, |
81 | GPIO2_2_KP_MKIN_6, | 81 | GPIO2_2_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, |
82 | GPIO3_2_KP_MKIN_7, | 82 | GPIO3_2_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, |
83 | GPIO121_KP_MKOUT_0, | 83 | GPIO121_KP_MKOUT_0, |
84 | GPIO122_KP_MKOUT_1, | 84 | GPIO122_KP_MKOUT_1, |
85 | GPIO123_KP_MKOUT_2, | 85 | GPIO123_KP_MKOUT_2, |
@@ -88,16 +88,33 @@ static mfp_cfg_t common_mfp_cfg[] __initdata = { | |||
88 | GPIO4_2_KP_MKOUT_5, | 88 | GPIO4_2_KP_MKOUT_5, |
89 | GPIO5_2_KP_MKOUT_6, | 89 | GPIO5_2_KP_MKOUT_6, |
90 | GPIO6_2_KP_MKOUT_7, | 90 | GPIO6_2_KP_MKOUT_7, |
91 | |||
92 | /* MMC1 */ | ||
93 | GPIO3_MMC1_DAT0, | ||
94 | GPIO4_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | ||
95 | GPIO5_MMC1_DAT2, | ||
96 | GPIO6_MMC1_DAT3, | ||
97 | GPIO7_MMC1_CLK, | ||
98 | GPIO8_MMC1_CMD, /* CMD0 for slot 0 */ | ||
99 | GPIO15_GPIO, /* CMD1 default as GPIO for slot 0 */ | ||
100 | |||
101 | /* MMC2 */ | ||
102 | GPIO9_MMC2_DAT0, | ||
103 | GPIO10_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | ||
104 | GPIO11_MMC2_DAT2, | ||
105 | GPIO12_MMC2_DAT3, | ||
106 | GPIO13_MMC2_CLK, | ||
107 | GPIO14_MMC2_CMD, | ||
91 | }; | 108 | }; |
92 | 109 | ||
93 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | 110 | static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { |
94 | /* FFUART */ | 111 | /* FFUART */ |
95 | GPIO30_UART1_RXD, | 112 | GPIO30_UART1_RXD | MFP_LPM_EDGE_FALL, |
96 | GPIO31_UART1_TXD, | 113 | GPIO31_UART1_TXD, |
97 | GPIO32_UART1_CTS, | 114 | GPIO32_UART1_CTS, |
98 | GPIO37_UART1_RTS, | 115 | GPIO37_UART1_RTS, |
99 | GPIO33_UART1_DCD, | 116 | GPIO33_UART1_DCD, |
100 | GPIO34_UART1_DSR, | 117 | GPIO34_UART1_DSR | MFP_LPM_EDGE_FALL, |
101 | GPIO35_UART1_RI, | 118 | GPIO35_UART1_RI, |
102 | GPIO36_UART1_DTR, | 119 | GPIO36_UART1_DTR, |
103 | 120 | ||
@@ -108,7 +125,7 @@ static mfp_cfg_t pxa300_mfp_cfg[] __initdata = { | |||
108 | 125 | ||
109 | static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { | 126 | static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { |
110 | /* FFUART */ | 127 | /* FFUART */ |
111 | GPIO99_UART1_RXD, | 128 | GPIO99_UART1_RXD | MFP_LPM_EDGE_FALL, |
112 | GPIO100_UART1_TXD, | 129 | GPIO100_UART1_TXD, |
113 | GPIO101_UART1_CTS, | 130 | GPIO101_UART1_CTS, |
114 | GPIO106_UART1_RTS, | 131 | GPIO106_UART1_RTS, |
@@ -116,6 +133,14 @@ static mfp_cfg_t pxa310_mfp_cfg[] __initdata = { | |||
116 | /* Ethernet */ | 133 | /* Ethernet */ |
117 | GPIO2_nCS3, | 134 | GPIO2_nCS3, |
118 | GPIO102_GPIO, | 135 | GPIO102_GPIO, |
136 | |||
137 | /* MMC3 */ | ||
138 | GPIO7_2_MMC3_DAT0, | ||
139 | GPIO8_2_MMC3_DAT1 | MFP_LPM_EDGE_BOTH, | ||
140 | GPIO9_2_MMC3_DAT2, | ||
141 | GPIO10_2_MMC3_DAT3, | ||
142 | GPIO103_MMC3_CLK, | ||
143 | GPIO105_MMC3_CMD, | ||
119 | }; | 144 | }; |
120 | 145 | ||
121 | #define NUM_LCD_DETECT_PINS 7 | 146 | #define NUM_LCD_DETECT_PINS 7 |
@@ -174,6 +199,10 @@ void __init zylonite_pxa300_init(void) | |||
174 | 199 | ||
175 | /* GPIO pin assignment */ | 200 | /* GPIO pin assignment */ |
176 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20); | 201 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO20); |
202 | |||
203 | /* MMC card detect & write protect for controller 0 */ | ||
204 | zylonite_mmc_slot[0].gpio_cd = EXT_GPIO(0); | ||
205 | zylonite_mmc_slot[0].gpio_wp = EXT_GPIO(2); | ||
177 | } | 206 | } |
178 | 207 | ||
179 | if (cpu_is_pxa300()) { | 208 | if (cpu_is_pxa300()) { |
@@ -184,5 +213,9 @@ void __init zylonite_pxa300_init(void) | |||
184 | if (cpu_is_pxa310()) { | 213 | if (cpu_is_pxa310()) { |
185 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); | 214 | pxa3xx_mfp_config(ARRAY_AND_SIZE(pxa310_mfp_cfg)); |
186 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); | 215 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO102); |
216 | |||
217 | /* MMC card detect & write protect for controller 2 */ | ||
218 | zylonite_mmc_slot[2].gpio_cd = EXT_GPIO(30); | ||
219 | zylonite_mmc_slot[2].gpio_wp = EXT_GPIO(31); | ||
187 | } | 220 | } |
188 | } | 221 | } |
diff --git a/arch/arm/mach-pxa/zylonite_pxa320.c b/arch/arm/mach-pxa/zylonite_pxa320.c index 94c715808b59..dfa79992b8ab 100644 --- a/arch/arm/mach-pxa/zylonite_pxa320.c +++ b/arch/arm/mach-pxa/zylonite_pxa320.c | |||
@@ -51,11 +51,11 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
51 | GPIO17_2_LCD_BIAS, | 51 | GPIO17_2_LCD_BIAS, |
52 | 52 | ||
53 | /* FFUART */ | 53 | /* FFUART */ |
54 | GPIO41_UART1_RXD, | 54 | GPIO41_UART1_RXD | MFP_LPM_EDGE_FALL, |
55 | GPIO42_UART1_TXD, | 55 | GPIO42_UART1_TXD, |
56 | GPIO43_UART1_CTS, | 56 | GPIO43_UART1_CTS, |
57 | GPIO44_UART1_DCD, | 57 | GPIO44_UART1_DCD, |
58 | GPIO45_UART1_DSR, | 58 | GPIO45_UART1_DSR | MFP_LPM_EDGE_FALL, |
59 | GPIO46_UART1_RI, | 59 | GPIO46_UART1_RI, |
60 | GPIO47_UART1_DTR, | 60 | GPIO47_UART1_DTR, |
61 | GPIO48_UART1_RTS, | 61 | GPIO48_UART1_RTS, |
@@ -73,16 +73,16 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
73 | GPIO33_I2C_SDA, | 73 | GPIO33_I2C_SDA, |
74 | 74 | ||
75 | /* Keypad */ | 75 | /* Keypad */ |
76 | GPIO105_KP_DKIN_0, | 76 | GPIO105_KP_DKIN_0 | MFP_LPM_EDGE_BOTH, |
77 | GPIO106_KP_DKIN_1, | 77 | GPIO106_KP_DKIN_1 | MFP_LPM_EDGE_BOTH, |
78 | GPIO113_KP_MKIN_0, | 78 | GPIO113_KP_MKIN_0 | MFP_LPM_EDGE_BOTH, |
79 | GPIO114_KP_MKIN_1, | 79 | GPIO114_KP_MKIN_1 | MFP_LPM_EDGE_BOTH, |
80 | GPIO115_KP_MKIN_2, | 80 | GPIO115_KP_MKIN_2 | MFP_LPM_EDGE_BOTH, |
81 | GPIO116_KP_MKIN_3, | 81 | GPIO116_KP_MKIN_3 | MFP_LPM_EDGE_BOTH, |
82 | GPIO117_KP_MKIN_4, | 82 | GPIO117_KP_MKIN_4 | MFP_LPM_EDGE_BOTH, |
83 | GPIO118_KP_MKIN_5, | 83 | GPIO118_KP_MKIN_5 | MFP_LPM_EDGE_BOTH, |
84 | GPIO119_KP_MKIN_6, | 84 | GPIO119_KP_MKIN_6 | MFP_LPM_EDGE_BOTH, |
85 | GPIO120_KP_MKIN_7, | 85 | GPIO120_KP_MKIN_7 | MFP_LPM_EDGE_BOTH, |
86 | GPIO121_KP_MKOUT_0, | 86 | GPIO121_KP_MKOUT_0, |
87 | GPIO122_KP_MKOUT_1, | 87 | GPIO122_KP_MKOUT_1, |
88 | GPIO123_KP_MKOUT_2, | 88 | GPIO123_KP_MKOUT_2, |
@@ -95,6 +95,23 @@ static mfp_cfg_t mfp_cfg[] __initdata = { | |||
95 | /* Ethernet */ | 95 | /* Ethernet */ |
96 | GPIO4_nCS3, | 96 | GPIO4_nCS3, |
97 | GPIO90_GPIO, | 97 | GPIO90_GPIO, |
98 | |||
99 | /* MMC1 */ | ||
100 | GPIO18_MMC1_DAT0, | ||
101 | GPIO19_MMC1_DAT1 | MFP_LPM_EDGE_BOTH, | ||
102 | GPIO20_MMC1_DAT2, | ||
103 | GPIO21_MMC1_DAT3, | ||
104 | GPIO22_MMC1_CLK, | ||
105 | GPIO23_MMC1_CMD,/* CMD0 for slot 0 */ | ||
106 | GPIO31_GPIO, /* CMD1 default as GPIO for slot 0 */ | ||
107 | |||
108 | /* MMC2 */ | ||
109 | GPIO24_MMC2_DAT0, | ||
110 | GPIO25_MMC2_DAT1 | MFP_LPM_EDGE_BOTH, | ||
111 | GPIO26_MMC2_DAT2, | ||
112 | GPIO27_MMC2_DAT3, | ||
113 | GPIO28_MMC2_CLK, | ||
114 | GPIO29_MMC2_CMD, | ||
98 | }; | 115 | }; |
99 | 116 | ||
100 | #define NUM_LCD_DETECT_PINS 7 | 117 | #define NUM_LCD_DETECT_PINS 7 |
@@ -169,5 +186,9 @@ void __init zylonite_pxa320_init(void) | |||
169 | /* GPIO pin assignment */ | 186 | /* GPIO pin assignment */ |
170 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO14); | 187 | gpio_backlight = mfp_to_gpio(MFP_PIN_GPIO14); |
171 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); | 188 | gpio_eth_irq = mfp_to_gpio(MFP_PIN_GPIO9); |
189 | |||
190 | /* MMC card detect & write protect for controller 0 */ | ||
191 | zylonite_mmc_slot[0].gpio_cd = mfp_to_gpio(MFP_PIN_GPIO1); | ||
192 | zylonite_mmc_slot[0].gpio_wp = mfp_to_gpio(MFP_PIN_GPIO5); | ||
172 | } | 193 | } |
173 | } | 194 | } |
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index c7f1b44da40d..61d70218f1e8 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c | |||
@@ -530,8 +530,6 @@ static unsigned long realview_gettimeoffset(void) | |||
530 | */ | 530 | */ |
531 | static irqreturn_t realview_timer_interrupt(int irq, void *dev_id) | 531 | static irqreturn_t realview_timer_interrupt(int irq, void *dev_id) |
532 | { | 532 | { |
533 | write_seqlock(&xtime_lock); | ||
534 | |||
535 | // ...clear the interrupt | 533 | // ...clear the interrupt |
536 | writel(1, TIMER0_VA_BASE + TIMER_INTCLR); | 534 | writel(1, TIMER0_VA_BASE + TIMER_INTCLR); |
537 | 535 | ||
@@ -542,8 +540,6 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id) | |||
542 | update_process_times(user_mode(get_irq_regs())); | 540 | update_process_times(user_mode(get_irq_regs())); |
543 | #endif | 541 | #endif |
544 | 542 | ||
545 | write_sequnlock(&xtime_lock); | ||
546 | |||
547 | return IRQ_HANDLED; | 543 | return IRQ_HANDLED; |
548 | } | 544 | } |
549 | 545 | ||
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 587864fe25fb..66175471fff3 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c | |||
@@ -530,7 +530,7 @@ static struct s3c2410fb_mach_info __initdata bast_fb_info = { | |||
530 | 530 | ||
531 | .displays = bast_lcd_info, | 531 | .displays = bast_lcd_info, |
532 | .num_displays = ARRAY_SIZE(bast_lcd_info), | 532 | .num_displays = ARRAY_SIZE(bast_lcd_info), |
533 | .default_display = 4, | 533 | .default_display = 1, |
534 | }; | 534 | }; |
535 | 535 | ||
536 | /* Standard BAST devices */ | 536 | /* Standard BAST devices */ |
@@ -540,7 +540,6 @@ static struct platform_device *bast_devices[] __initdata = { | |||
540 | &s3c_device_lcd, | 540 | &s3c_device_lcd, |
541 | &s3c_device_wdt, | 541 | &s3c_device_wdt, |
542 | &s3c_device_i2c, | 542 | &s3c_device_i2c, |
543 | &s3c_device_iis, | ||
544 | &s3c_device_rtc, | 543 | &s3c_device_rtc, |
545 | &s3c_device_nand, | 544 | &s3c_device_nand, |
546 | &bast_device_nor, | 545 | &bast_device_nor, |
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c index 9f43f3f124f5..3aade7b78fe5 100644 --- a/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/arch/arm/mach-s3c2410/mach-vr1000.c | |||
@@ -365,7 +365,6 @@ static struct platform_device *vr1000_devices[] __initdata = { | |||
365 | &s3c_device_lcd, | 365 | &s3c_device_lcd, |
366 | &s3c_device_wdt, | 366 | &s3c_device_wdt, |
367 | &s3c_device_i2c, | 367 | &s3c_device_i2c, |
368 | &s3c_device_iis, | ||
369 | &s3c_device_adc, | 368 | &s3c_device_adc, |
370 | &serial_device, | 369 | &serial_device, |
371 | &vr1000_nor, | 370 | &vr1000_nor, |
diff --git a/arch/arm/mach-s3c2410/usb-simtec.c b/arch/arm/mach-s3c2410/usb-simtec.c index bcd562ac1d3d..6aec86a5da56 100644 --- a/arch/arm/mach-s3c2410/usb-simtec.c +++ b/arch/arm/mach-s3c2410/usb-simtec.c | |||
@@ -60,7 +60,7 @@ usb_simtec_powercontrol(int port, int to) | |||
60 | static irqreturn_t | 60 | static irqreturn_t |
61 | usb_simtec_ocirq(int irq, void *pw) | 61 | usb_simtec_ocirq(int irq, void *pw) |
62 | { | 62 | { |
63 | struct s3c2410_hcd_info *info = (struct s3c2410_hcd_info *)pw; | 63 | struct s3c2410_hcd_info *info = pw; |
64 | 64 | ||
65 | if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) { | 65 | if (s3c2410_gpio_getpin(S3C2410_GPG10) == 0) { |
66 | pr_debug("usb_simtec: over-current irq (oc detected)\n"); | 66 | pr_debug("usb_simtec: over-current irq (oc detected)\n"); |
diff --git a/arch/arm/mach-s3c2412/Kconfig b/arch/arm/mach-s3c2412/Kconfig index 8e8fe48ea47f..0b43431d4b75 100644 --- a/arch/arm/mach-s3c2412/Kconfig +++ b/arch/arm/mach-s3c2412/Kconfig | |||
@@ -10,6 +10,7 @@ config CPU_S3C2412 | |||
10 | select CPU_LLSERIAL_S3C2440 | 10 | select CPU_LLSERIAL_S3C2440 |
11 | select S3C2412_PM if PM | 11 | select S3C2412_PM if PM |
12 | select S3C2412_DMA if S3C2410_DMA | 12 | select S3C2412_DMA if S3C2410_DMA |
13 | select S3C2410_GPIO | ||
13 | help | 14 | help |
14 | Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line | 15 | Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line |
15 | 16 | ||
diff --git a/arch/arm/mach-s3c2412/Makefile b/arch/arm/mach-s3c2412/Makefile index f8e011691b31..267f3348301e 100644 --- a/arch/arm/mach-s3c2412/Makefile +++ b/arch/arm/mach-s3c2412/Makefile | |||
@@ -12,8 +12,9 @@ obj- := | |||
12 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o | 12 | obj-$(CONFIG_CPU_S3C2412) += s3c2412.o |
13 | obj-$(CONFIG_CPU_S3C2412) += irq.o | 13 | obj-$(CONFIG_CPU_S3C2412) += irq.o |
14 | obj-$(CONFIG_CPU_S3C2412) += clock.o | 14 | obj-$(CONFIG_CPU_S3C2412) += clock.o |
15 | obj-$(CONFIG_CPU_S3C2412) += gpio.o | ||
15 | obj-$(CONFIG_S3C2412_DMA) += dma.o | 16 | obj-$(CONFIG_S3C2412_DMA) += dma.o |
16 | obj-$(CONFIG_S3C2412_PM) += pm.o | 17 | obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o |
17 | 18 | ||
18 | # Machine support | 19 | # Machine support |
19 | 20 | ||
diff --git a/arch/arm/mach-s3c2412/clock.c b/arch/arm/mach-s3c2412/clock.c index 458993601897..2697a65ba727 100644 --- a/arch/arm/mach-s3c2412/clock.c +++ b/arch/arm/mach-s3c2412/clock.c | |||
@@ -217,7 +217,7 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) | |||
217 | 217 | ||
218 | if (parent == &clk_mdivclk) | 218 | if (parent == &clk_mdivclk) |
219 | clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; | 219 | clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; |
220 | else if (parent == &clk_upll) | 220 | else if (parent == &clk_mpll) |
221 | clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; | 221 | clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; |
222 | else | 222 | else |
223 | return -EINVAL; | 223 | return -EINVAL; |
@@ -234,6 +234,45 @@ static struct clk clk_msysclk = { | |||
234 | .set_parent = s3c2412_setparent_msysclk, | 234 | .set_parent = s3c2412_setparent_msysclk, |
235 | }; | 235 | }; |
236 | 236 | ||
237 | static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) | ||
238 | { | ||
239 | unsigned long flags; | ||
240 | unsigned long clkdiv; | ||
241 | unsigned long dvs; | ||
242 | |||
243 | /* Note, we current equate fclk andf msysclk for S3C2412 */ | ||
244 | |||
245 | if (parent == &clk_msysclk || parent == &clk_f) | ||
246 | dvs = 0; | ||
247 | else if (parent == &clk_h) | ||
248 | dvs = S3C2412_CLKDIVN_DVSEN; | ||
249 | else | ||
250 | return -EINVAL; | ||
251 | |||
252 | clk->parent = parent; | ||
253 | |||
254 | /* update this under irq lockdown, clkdivn is not protected | ||
255 | * by the clock system. */ | ||
256 | |||
257 | local_irq_save(flags); | ||
258 | |||
259 | clkdiv = __raw_readl(S3C2410_CLKDIVN); | ||
260 | clkdiv &= ~S3C2412_CLKDIVN_DVSEN; | ||
261 | clkdiv |= dvs; | ||
262 | __raw_writel(clkdiv, S3C2410_CLKDIVN); | ||
263 | |||
264 | local_irq_restore(flags); | ||
265 | |||
266 | return 0; | ||
267 | } | ||
268 | |||
269 | static struct clk clk_armclk = { | ||
270 | .name = "armclk", | ||
271 | .id = -1, | ||
272 | .parent = &clk_msysclk, | ||
273 | .set_parent = s3c2412_setparent_armclk, | ||
274 | }; | ||
275 | |||
237 | /* these next clocks have an divider immediately after them, | 276 | /* these next clocks have an divider immediately after them, |
238 | * so we can register them with their divider and leave out the | 277 | * so we can register them with their divider and leave out the |
239 | * intermediate clock stage | 278 | * intermediate clock stage |
@@ -630,11 +669,13 @@ static struct clk *clks[] __initdata = { | |||
630 | &clk_erefclk, | 669 | &clk_erefclk, |
631 | &clk_urefclk, | 670 | &clk_urefclk, |
632 | &clk_mrefclk, | 671 | &clk_mrefclk, |
672 | &clk_armclk, | ||
633 | }; | 673 | }; |
634 | 674 | ||
635 | int __init s3c2412_baseclk_add(void) | 675 | int __init s3c2412_baseclk_add(void) |
636 | { | 676 | { |
637 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); | 677 | unsigned long clkcon = __raw_readl(S3C2410_CLKCON); |
678 | unsigned int dvs; | ||
638 | struct clk *clkp; | 679 | struct clk *clkp; |
639 | int ret; | 680 | int ret; |
640 | int ptr; | 681 | int ptr; |
@@ -643,6 +684,8 @@ int __init s3c2412_baseclk_add(void) | |||
643 | clk_usb_bus.parent = &clk_usbsrc; | 684 | clk_usb_bus.parent = &clk_usbsrc; |
644 | clk_usb_bus.rate = 0x0; | 685 | clk_usb_bus.rate = 0x0; |
645 | 686 | ||
687 | clk_f.parent = &clk_msysclk; | ||
688 | |||
646 | s3c2412_clk_initparents(); | 689 | s3c2412_clk_initparents(); |
647 | 690 | ||
648 | for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { | 691 | for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { |
@@ -655,6 +698,15 @@ int __init s3c2412_baseclk_add(void) | |||
655 | } | 698 | } |
656 | } | 699 | } |
657 | 700 | ||
701 | /* set the dvs state according to what we got at boot time */ | ||
702 | |||
703 | dvs = __raw_readl(S3C2410_CLKDIVN) & S3C2412_CLKDIVN_DVSEN; | ||
704 | |||
705 | if (dvs) | ||
706 | clk_armclk.parent = &clk_h; | ||
707 | |||
708 | printk(KERN_INFO "S3C2412: DVS is %s\n", dvs ? "on" : "off"); | ||
709 | |||
658 | /* ensure usb bus clock is within correct rate of 48MHz */ | 710 | /* ensure usb bus clock is within correct rate of 48MHz */ |
659 | 711 | ||
660 | if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { | 712 | if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { |
diff --git a/arch/arm/mach-s3c2412/dma.c b/arch/arm/mach-s3c2412/dma.c index 53c1d5bbce19..1dd864993566 100644 --- a/arch/arm/mach-s3c2412/dma.c +++ b/arch/arm/mach-s3c2412/dma.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/arch/regs-mem.h> | 30 | #include <asm/arch/regs-mem.h> |
31 | #include <asm/arch/regs-lcd.h> | 31 | #include <asm/arch/regs-lcd.h> |
32 | #include <asm/arch/regs-sdi.h> | 32 | #include <asm/arch/regs-sdi.h> |
33 | #include <asm/plat-s3c24xx/regs-s3c2412-iis.h> | ||
33 | #include <asm/plat-s3c24xx/regs-iis.h> | 34 | #include <asm/plat-s3c24xx/regs-iis.h> |
34 | #include <asm/plat-s3c24xx/regs-spi.h> | 35 | #include <asm/plat-s3c24xx/regs-spi.h> |
35 | 36 | ||
@@ -39,106 +40,141 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { | |||
39 | [DMACH_XD0] = { | 40 | [DMACH_XD0] = { |
40 | .name = "xdreq0", | 41 | .name = "xdreq0", |
41 | .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), | 42 | .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), |
43 | .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0), | ||
42 | }, | 44 | }, |
43 | [DMACH_XD1] = { | 45 | [DMACH_XD1] = { |
44 | .name = "xdreq1", | 46 | .name = "xdreq1", |
45 | .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), | 47 | .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), |
48 | .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1), | ||
46 | }, | 49 | }, |
47 | [DMACH_SDI] = { | 50 | [DMACH_SDI] = { |
48 | .name = "sdi", | 51 | .name = "sdi", |
49 | .channels = MAP(S3C2412_DMAREQSEL_SDI), | 52 | .channels = MAP(S3C2412_DMAREQSEL_SDI), |
50 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | 53 | .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), |
51 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | 54 | .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA, |
55 | .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA, | ||
52 | }, | 56 | }, |
53 | [DMACH_SPI0] = { | 57 | [DMACH_SPI0] = { |
54 | .name = "spi0", | 58 | .name = "spi0", |
55 | .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), | 59 | .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), |
60 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), | ||
56 | .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, | 61 | .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, |
57 | .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, | 62 | .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, |
58 | }, | 63 | }, |
59 | [DMACH_SPI1] = { | 64 | [DMACH_SPI1] = { |
60 | .name = "spi1", | 65 | .name = "spi1", |
61 | .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), | 66 | .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), |
67 | .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), | ||
62 | .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, | 68 | .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, |
63 | .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, | 69 | .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, |
64 | }, | 70 | }, |
65 | [DMACH_UART0] = { | 71 | [DMACH_UART0] = { |
66 | .name = "uart0", | 72 | .name = "uart0", |
67 | .channels = MAP(S3C2412_DMAREQSEL_UART0_0), | 73 | .channels = MAP(S3C2412_DMAREQSEL_UART0_0), |
74 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), | ||
68 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | 75 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, |
69 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | 76 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, |
70 | }, | 77 | }, |
71 | [DMACH_UART1] = { | 78 | [DMACH_UART1] = { |
72 | .name = "uart1", | 79 | .name = "uart1", |
73 | .channels = MAP(S3C2412_DMAREQSEL_UART1_0), | 80 | .channels = MAP(S3C2412_DMAREQSEL_UART1_0), |
81 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), | ||
74 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | 82 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, |
75 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | 83 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, |
76 | }, | 84 | }, |
77 | [DMACH_UART2] = { | 85 | [DMACH_UART2] = { |
78 | .name = "uart2", | 86 | .name = "uart2", |
79 | .channels = MAP(S3C2412_DMAREQSEL_UART2_0), | 87 | .channels = MAP(S3C2412_DMAREQSEL_UART2_0), |
88 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), | ||
80 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | 89 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, |
81 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | 90 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, |
82 | }, | 91 | }, |
83 | [DMACH_UART0_SRC2] = { | 92 | [DMACH_UART0_SRC2] = { |
84 | .name = "uart0", | 93 | .name = "uart0", |
85 | .channels = MAP(S3C2412_DMAREQSEL_UART0_1), | 94 | .channels = MAP(S3C2412_DMAREQSEL_UART0_1), |
95 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), | ||
86 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, | 96 | .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, |
87 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, | 97 | .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, |
88 | }, | 98 | }, |
89 | [DMACH_UART1_SRC2] = { | 99 | [DMACH_UART1_SRC2] = { |
90 | .name = "uart1", | 100 | .name = "uart1", |
91 | .channels = MAP(S3C2412_DMAREQSEL_UART1_1), | 101 | .channels = MAP(S3C2412_DMAREQSEL_UART1_1), |
102 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), | ||
92 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, | 103 | .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, |
93 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, | 104 | .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, |
94 | }, | 105 | }, |
95 | [DMACH_UART2_SRC2] = { | 106 | [DMACH_UART2_SRC2] = { |
96 | .name = "uart2", | 107 | .name = "uart2", |
97 | .channels = MAP(S3C2412_DMAREQSEL_UART2_1), | 108 | .channels = MAP(S3C2412_DMAREQSEL_UART2_1), |
109 | .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), | ||
98 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, | 110 | .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, |
99 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, | 111 | .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, |
100 | }, | 112 | }, |
101 | [DMACH_TIMER] = { | 113 | [DMACH_TIMER] = { |
102 | .name = "timer", | 114 | .name = "timer", |
103 | .channels = MAP(S3C2412_DMAREQSEL_TIMER), | 115 | .channels = MAP(S3C2412_DMAREQSEL_TIMER), |
116 | .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER), | ||
104 | }, | 117 | }, |
105 | [DMACH_I2S_IN] = { | 118 | [DMACH_I2S_IN] = { |
106 | .name = "i2s-sdi", | 119 | .name = "i2s-sdi", |
107 | .channels = MAP(S3C2412_DMAREQSEL_I2SRX), | 120 | .channels = MAP(S3C2412_DMAREQSEL_I2SRX), |
108 | .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, | 121 | .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX), |
122 | .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD, | ||
109 | }, | 123 | }, |
110 | [DMACH_I2S_OUT] = { | 124 | [DMACH_I2S_OUT] = { |
111 | .name = "i2s-sdo", | 125 | .name = "i2s-sdo", |
112 | .channels = MAP(S3C2412_DMAREQSEL_I2STX), | 126 | .channels = MAP(S3C2412_DMAREQSEL_I2STX), |
113 | .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, | 127 | .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX), |
128 | .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD, | ||
114 | }, | 129 | }, |
115 | [DMACH_USB_EP1] = { | 130 | [DMACH_USB_EP1] = { |
116 | .name = "usb-ep1", | 131 | .name = "usb-ep1", |
117 | .channels = MAP(S3C2412_DMAREQSEL_USBEP1), | 132 | .channels = MAP(S3C2412_DMAREQSEL_USBEP1), |
133 | .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1), | ||
118 | }, | 134 | }, |
119 | [DMACH_USB_EP2] = { | 135 | [DMACH_USB_EP2] = { |
120 | .name = "usb-ep2", | 136 | .name = "usb-ep2", |
121 | .channels = MAP(S3C2412_DMAREQSEL_USBEP2), | 137 | .channels = MAP(S3C2412_DMAREQSEL_USBEP2), |
138 | .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2), | ||
122 | }, | 139 | }, |
123 | [DMACH_USB_EP3] = { | 140 | [DMACH_USB_EP3] = { |
124 | .name = "usb-ep3", | 141 | .name = "usb-ep3", |
125 | .channels = MAP(S3C2412_DMAREQSEL_USBEP3), | 142 | .channels = MAP(S3C2412_DMAREQSEL_USBEP3), |
143 | .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3), | ||
126 | }, | 144 | }, |
127 | [DMACH_USB_EP4] = { | 145 | [DMACH_USB_EP4] = { |
128 | .name = "usb-ep4", | 146 | .name = "usb-ep4", |
129 | .channels = MAP(S3C2412_DMAREQSEL_USBEP4), | 147 | .channels = MAP(S3C2412_DMAREQSEL_USBEP4), |
148 | .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4), | ||
130 | }, | 149 | }, |
131 | }; | 150 | }; |
132 | 151 | ||
152 | static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan, | ||
153 | struct s3c24xx_dma_map *map, | ||
154 | enum s3c2410_dmasrc dir) | ||
155 | { | ||
156 | unsigned long chsel; | ||
157 | |||
158 | if (dir == S3C2410_DMASRC_HW) | ||
159 | chsel = map->channels_rx[0]; | ||
160 | else | ||
161 | chsel = map->channels[0]; | ||
162 | |||
163 | chsel &= ~DMA_CH_VALID; | ||
164 | chsel |= S3C2412_DMAREQSEL_HW; | ||
165 | |||
166 | writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL); | ||
167 | } | ||
168 | |||
133 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, | 169 | static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, |
134 | struct s3c24xx_dma_map *map) | 170 | struct s3c24xx_dma_map *map) |
135 | { | 171 | { |
136 | writel(map->channels[0] | S3C2412_DMAREQSEL_HW, | 172 | s3c2412_dma_direction(chan, map, chan->source); |
137 | chan->regs + S3C2412_DMA_DMAREQSEL); | ||
138 | } | 173 | } |
139 | 174 | ||
140 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { | 175 | static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { |
141 | .select = s3c2412_dma_select, | 176 | .select = s3c2412_dma_select, |
177 | .direction = s3c2412_dma_direction, | ||
142 | .dcon_mask = 0, | 178 | .dcon_mask = 0, |
143 | .map = s3c2412_dma_mappings, | 179 | .map = s3c2412_dma_mappings, |
144 | .map_size = ARRAY_SIZE(s3c2412_dma_mappings), | 180 | .map_size = ARRAY_SIZE(s3c2412_dma_mappings), |
diff --git a/arch/arm/mach-s3c2412/gpio.c b/arch/arm/mach-s3c2412/gpio.c new file mode 100644 index 000000000000..8e55c3a2eab8 --- /dev/null +++ b/arch/arm/mach-s3c2412/gpio.c | |||
@@ -0,0 +1,60 @@ | |||
1 | /* linux/arch/arm/mach-s3c2412/gpio.c | ||
2 | * | ||
3 | * Copyright (c) 2007 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * http://armlinux.simtec.co.uk/. | ||
7 | * | ||
8 | * S3C2412/S3C2413 specific GPIO support | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | |||
20 | #include <asm/mach/arch.h> | ||
21 | #include <asm/mach/map.h> | ||
22 | |||
23 | #include <asm/arch/regs-gpio.h> | ||
24 | |||
25 | #include <asm/hardware.h> | ||
26 | |||
27 | int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) | ||
28 | { | ||
29 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | ||
30 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); | ||
31 | unsigned long flags; | ||
32 | unsigned long slpcon; | ||
33 | |||
34 | offs *= 2; | ||
35 | |||
36 | if (pin < S3C2410_GPIO_BANKB) | ||
37 | return -EINVAL; | ||
38 | |||
39 | if (pin >= S3C2410_GPIO_BANKF && | ||
40 | pin <= S3C2410_GPIO_BANKG) | ||
41 | return -EINVAL; | ||
42 | |||
43 | if (pin > (S3C2410_GPIO_BANKH + 32)) | ||
44 | return -EINVAL; | ||
45 | |||
46 | local_irq_save(flags); | ||
47 | |||
48 | slpcon = __raw_readl(base + 0x0C); | ||
49 | |||
50 | slpcon &= ~(3 << offs); | ||
51 | slpcon |= state << offs; | ||
52 | |||
53 | __raw_writel(slpcon, base + 0x0C); | ||
54 | |||
55 | local_irq_restore(flags); | ||
56 | |||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg); | ||
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index e9d0c769f5da..cc1917bf952a 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c | |||
@@ -33,6 +33,7 @@ | |||
33 | 33 | ||
34 | #include <asm/arch/regs-irq.h> | 34 | #include <asm/arch/regs-irq.h> |
35 | #include <asm/arch/regs-gpio.h> | 35 | #include <asm/arch/regs-gpio.h> |
36 | #include <asm/arch/regs-power.h> | ||
36 | 37 | ||
37 | #include <asm/plat-s3c24xx/cpu.h> | 38 | #include <asm/plat-s3c24xx/cpu.h> |
38 | #include <asm/plat-s3c24xx/irq.h> | 39 | #include <asm/plat-s3c24xx/irq.h> |
@@ -153,6 +154,22 @@ static struct irq_chip s3c2412_irq_cfsdi = { | |||
153 | .unmask = s3c2412_irq_cfsdi_unmask, | 154 | .unmask = s3c2412_irq_cfsdi_unmask, |
154 | }; | 155 | }; |
155 | 156 | ||
157 | static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) | ||
158 | { | ||
159 | unsigned long pwrcfg; | ||
160 | |||
161 | pwrcfg = __raw_readl(S3C2412_PWRCFG); | ||
162 | if (state) | ||
163 | pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ; | ||
164 | else | ||
165 | pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ; | ||
166 | __raw_writel(pwrcfg, S3C2412_PWRCFG); | ||
167 | |||
168 | return s3c_irq_chip.set_wake(irqno, state); | ||
169 | } | ||
170 | |||
171 | static struct irq_chip s3c2412_irq_rtc_chip; | ||
172 | |||
156 | static int s3c2412_irq_add(struct sys_device *sysdev) | 173 | static int s3c2412_irq_add(struct sys_device *sysdev) |
157 | { | 174 | { |
158 | unsigned int irqno; | 175 | unsigned int irqno; |
@@ -173,6 +190,13 @@ static int s3c2412_irq_add(struct sys_device *sysdev) | |||
173 | set_irq_flags(irqno, IRQF_VALID); | 190 | set_irq_flags(irqno, IRQF_VALID); |
174 | } | 191 | } |
175 | 192 | ||
193 | /* change RTC IRQ's set wake method */ | ||
194 | |||
195 | s3c2412_irq_rtc_chip = s3c_irq_chip; | ||
196 | s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake; | ||
197 | |||
198 | set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); | ||
199 | |||
176 | return 0; | 200 | return 0; |
177 | } | 201 | } |
178 | 202 | ||
diff --git a/arch/arm/mach-s3c2412/pm.c b/arch/arm/mach-s3c2412/pm.c index 8988dac388a9..d4ffb2d98076 100644 --- a/arch/arm/mach-s3c2412/pm.c +++ b/arch/arm/mach-s3c2412/pm.c | |||
@@ -33,6 +33,8 @@ | |||
33 | 33 | ||
34 | #include <asm/plat-s3c24xx/s3c2412.h> | 34 | #include <asm/plat-s3c24xx/s3c2412.h> |
35 | 35 | ||
36 | extern void s3c2412_sleep_enter(void); | ||
37 | |||
36 | static void s3c2412_cpu_suspend(void) | 38 | static void s3c2412_cpu_suspend(void) |
37 | { | 39 | { |
38 | unsigned long tmp; | 40 | unsigned long tmp; |
@@ -43,20 +45,7 @@ static void s3c2412_cpu_suspend(void) | |||
43 | tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; | 45 | tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; |
44 | __raw_writel(tmp, S3C2412_PWRCFG); | 46 | __raw_writel(tmp, S3C2412_PWRCFG); |
45 | 47 | ||
46 | /* issue the standby signal into the pm unit. Note, we | 48 | s3c2412_sleep_enter(); |
47 | * issue a write-buffer drain just in case */ | ||
48 | |||
49 | tmp = 0; | ||
50 | |||
51 | asm("b 1f\n\t" | ||
52 | ".align 5\n\t" | ||
53 | "1:\n\t" | ||
54 | "mcr p15, 0, %0, c7, c10, 4\n\t" | ||
55 | "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp)); | ||
56 | |||
57 | /* we should never get past here */ | ||
58 | |||
59 | panic("sleep resumed to originator?"); | ||
60 | } | 49 | } |
61 | 50 | ||
62 | static void s3c2412_pm_prepare(void) | 51 | static void s3c2412_pm_prepare(void) |
@@ -88,7 +77,6 @@ static struct sleep_save s3c2412_sleep[] = { | |||
88 | SAVE_ITEM(S3C2412_GPBSLPCON), | 77 | SAVE_ITEM(S3C2412_GPBSLPCON), |
89 | SAVE_ITEM(S3C2412_GPCSLPCON), | 78 | SAVE_ITEM(S3C2412_GPCSLPCON), |
90 | SAVE_ITEM(S3C2412_GPDSLPCON), | 79 | SAVE_ITEM(S3C2412_GPDSLPCON), |
91 | SAVE_ITEM(S3C2412_GPESLPCON), | ||
92 | SAVE_ITEM(S3C2412_GPFSLPCON), | 80 | SAVE_ITEM(S3C2412_GPFSLPCON), |
93 | SAVE_ITEM(S3C2412_GPGSLPCON), | 81 | SAVE_ITEM(S3C2412_GPGSLPCON), |
94 | SAVE_ITEM(S3C2412_GPHSLPCON), | 82 | SAVE_ITEM(S3C2412_GPHSLPCON), |
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index 265cd3f567a3..abf1599c9f97 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -168,6 +168,8 @@ void __init s3c2412_init_clocks(int xtal) | |||
168 | 168 | ||
169 | fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); | 169 | fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); |
170 | 170 | ||
171 | clk_mpll.rate = fclk; | ||
172 | |||
171 | tmp = __raw_readl(S3C2410_CLKDIVN); | 173 | tmp = __raw_readl(S3C2410_CLKDIVN); |
172 | 174 | ||
173 | /* work out clock scalings */ | 175 | /* work out clock scalings */ |
diff --git a/arch/arm/mach-s3c2412/sleep.S b/arch/arm/mach-s3c2412/sleep.S new file mode 100644 index 000000000000..db32cac4199a --- /dev/null +++ b/arch/arm/mach-s3c2412/sleep.S | |||
@@ -0,0 +1,68 @@ | |||
1 | /* linux/arch/arm/mach-s3c2412/sleep.S | ||
2 | * | ||
3 | * Copyright (c) 2007 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2412 Power Manager low-level sleep support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/linkage.h> | ||
24 | #include <asm/assembler.h> | ||
25 | #include <asm/hardware.h> | ||
26 | #include <asm/arch/map.h> | ||
27 | |||
28 | #include <asm/arch/regs-irq.h> | ||
29 | |||
30 | .text | ||
31 | |||
32 | .global s3c2412_sleep_enter | ||
33 | |||
34 | s3c2412_sleep_enter: | ||
35 | mov r0, #0 /* argument for coprocessors */ | ||
36 | ldr r1, =S3C2410_INTPND | ||
37 | ldr r2, =S3C2410_SRCPND | ||
38 | ldr r3, =S3C2410_EINTPEND | ||
39 | |||
40 | teq r0, r0 | ||
41 | bl s3c2412_sleep_enter1 | ||
42 | teq pc, r0 | ||
43 | bl s3c2412_sleep_enter1 | ||
44 | |||
45 | .align 5 | ||
46 | |||
47 | /* this is called twice, first with the Z flag to ensure that the | ||
48 | * instructions have been loaded into the cache, and the second | ||
49 | * time to try and suspend the system. | ||
50 | */ | ||
51 | s3c2412_sleep_enter1: | ||
52 | mcr p15, 0, r0, c7, c10, 4 | ||
53 | mcrne p15, 0, r0, c7, c0, 4 | ||
54 | |||
55 | /* if we return from here, it is because an interrupt was | ||
56 | * active when we tried to shutdown. Try and ack the IRQ and | ||
57 | * retry, as simply returning causes the system to lock. | ||
58 | */ | ||
59 | |||
60 | ldrne r9, [ r1 ] | ||
61 | strne r9, [ r1 ] | ||
62 | ldrne r9, [ r2 ] | ||
63 | strne r9, [ r2 ] | ||
64 | ldrne r9, [ r3 ] | ||
65 | strne r9, [ r3 ] | ||
66 | bne s3c2412_sleep_enter1 | ||
67 | |||
68 | mov pc, r14 | ||
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c index 79e2ea4adaf3..184d804934c9 100644 --- a/arch/arm/mach-s3c2440/clock.c +++ b/arch/arm/mach-s3c2440/clock.c | |||
@@ -111,14 +111,9 @@ static struct clk s3c2440_clk_ac97 = { | |||
111 | 111 | ||
112 | static int s3c2440_clk_add(struct sys_device *sysdev) | 112 | static int s3c2440_clk_add(struct sys_device *sysdev) |
113 | { | 113 | { |
114 | unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | 114 | struct clk *clock_upll; |
115 | unsigned long clkdivn; | ||
116 | struct clk *clock_h; | 115 | struct clk *clock_h; |
117 | struct clk *clock_p; | 116 | struct clk *clock_p; |
118 | struct clk *clock_upll; | ||
119 | |||
120 | printk("S3C2440: Clock Support, DVS %s\n", | ||
121 | (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
122 | 117 | ||
123 | clock_p = clk_get(NULL, "pclk"); | 118 | clock_p = clk_get(NULL, "pclk"); |
124 | clock_h = clk_get(NULL, "hclk"); | 119 | clock_h = clk_get(NULL, "hclk"); |
@@ -129,21 +124,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev) | |||
129 | return -EINVAL; | 124 | return -EINVAL; |
130 | } | 125 | } |
131 | 126 | ||
132 | /* check rate of UPLL, and if it is near 96MHz, then change | ||
133 | * to using half the UPLL rate for the system */ | ||
134 | |||
135 | if (clk_get_rate(clock_upll) > (94 * MHZ)) { | ||
136 | clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; | ||
137 | |||
138 | mutex_lock(&clocks_mutex); | ||
139 | |||
140 | clkdivn = __raw_readl(S3C2410_CLKDIVN); | ||
141 | clkdivn |= S3C2440_CLKDIVN_UCLK; | ||
142 | __raw_writel(clkdivn, S3C2410_CLKDIVN); | ||
143 | |||
144 | mutex_unlock(&clocks_mutex); | ||
145 | } | ||
146 | |||
147 | s3c2440_clk_cam.parent = clock_h; | 127 | s3c2440_clk_cam.parent = clock_h; |
148 | s3c2440_clk_ac97.parent = clock_p; | 128 | s3c2440_clk_ac97.parent = clock_p; |
149 | s3c2440_clk_cam_upll.parent = clock_upll; | 129 | s3c2440_clk_cam_upll.parent = clock_upll; |
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c index 5b9e830ac4d3..2d030d439fe9 100644 --- a/arch/arm/mach-s3c2442/clock.c +++ b/arch/arm/mach-s3c2442/clock.c | |||
@@ -115,14 +115,9 @@ static struct clk s3c2442_clk_cam_upll = { | |||
115 | 115 | ||
116 | static int s3c2442_clk_add(struct sys_device *sysdev) | 116 | static int s3c2442_clk_add(struct sys_device *sysdev) |
117 | { | 117 | { |
118 | unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | 118 | struct clk *clock_upll; |
119 | unsigned long clkdivn; | ||
120 | struct clk *clock_h; | 119 | struct clk *clock_h; |
121 | struct clk *clock_p; | 120 | struct clk *clock_p; |
122 | struct clk *clock_upll; | ||
123 | |||
124 | printk("S3C2442: Clock Support, DVS %s\n", | ||
125 | (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
126 | 121 | ||
127 | clock_p = clk_get(NULL, "pclk"); | 122 | clock_p = clk_get(NULL, "pclk"); |
128 | clock_h = clk_get(NULL, "hclk"); | 123 | clock_h = clk_get(NULL, "hclk"); |
@@ -133,21 +128,6 @@ static int s3c2442_clk_add(struct sys_device *sysdev) | |||
133 | return -EINVAL; | 128 | return -EINVAL; |
134 | } | 129 | } |
135 | 130 | ||
136 | /* check rate of UPLL, and if it is near 96MHz, then change | ||
137 | * to using half the UPLL rate for the system */ | ||
138 | |||
139 | if (clk_get_rate(clock_upll) > (94 * MHZ)) { | ||
140 | clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; | ||
141 | |||
142 | mutex_lock(&clocks_mutex); | ||
143 | |||
144 | clkdivn = __raw_readl(S3C2410_CLKDIVN); | ||
145 | clkdivn |= S3C2440_CLKDIVN_UCLK; | ||
146 | __raw_writel(clkdivn, S3C2410_CLKDIVN); | ||
147 | |||
148 | mutex_unlock(&clocks_mutex); | ||
149 | } | ||
150 | |||
151 | s3c2442_clk_cam.parent = clock_h; | 131 | s3c2442_clk_cam.parent = clock_h; |
152 | s3c2442_clk_cam_upll.parent = clock_upll; | 132 | s3c2442_clk_cam_upll.parent = clock_upll; |
153 | 133 | ||
diff --git a/arch/arm/mach-sa1100/ssp.c b/arch/arm/mach-sa1100/ssp.c index 59703c6fb29b..06206ceb312e 100644 --- a/arch/arm/mach-sa1100/ssp.c +++ b/arch/arm/mach-sa1100/ssp.c | |||
@@ -29,9 +29,8 @@ static irqreturn_t ssp_interrupt(int irq, void *dev_id) | |||
29 | { | 29 | { |
30 | unsigned int status = Ser4SSSR; | 30 | unsigned int status = Ser4SSSR; |
31 | 31 | ||
32 | if (status & SSSR_ROR) { | 32 | if (status & SSSR_ROR) |
33 | printk(KERN_WARNING "SSP: receiver overrun\n"); | 33 | printk(KERN_WARNING "SSP: receiver overrun\n"); |
34 | } | ||
35 | 34 | ||
36 | Ser4SSSR = SSSR_ROR; | 35 | Ser4SSSR = SSSR_ROR; |
37 | 36 | ||
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index fdf7b016e7ad..c2677368d6af 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/irq.h> | 14 | #include <linux/irq.h> |
15 | #include <linux/timex.h> | 15 | #include <linux/timex.h> |
16 | #include <linux/signal.h> | 16 | #include <linux/signal.h> |
17 | #include <linux/clocksource.h> | ||
17 | 18 | ||
18 | #include <asm/mach/time.h> | 19 | #include <asm/mach/time.h> |
19 | #include <asm/hardware.h> | 20 | #include <asm/hardware.h> |
@@ -35,23 +36,6 @@ static int sa1100_set_rtc(void) | |||
35 | return 0; | 36 | return 0; |
36 | } | 37 | } |
37 | 38 | ||
38 | /* IRQs are disabled before entering here from do_gettimeofday() */ | ||
39 | static unsigned long sa1100_gettimeoffset (void) | ||
40 | { | ||
41 | unsigned long ticks_to_match, elapsed, usec; | ||
42 | |||
43 | /* Get ticks before next timer match */ | ||
44 | ticks_to_match = OSMR0 - OSCR; | ||
45 | |||
46 | /* We need elapsed ticks since last match */ | ||
47 | elapsed = LATCH - ticks_to_match; | ||
48 | |||
49 | /* Now convert them to usec */ | ||
50 | usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; | ||
51 | |||
52 | return usec; | ||
53 | } | ||
54 | |||
55 | #ifdef CONFIG_NO_IDLE_HZ | 39 | #ifdef CONFIG_NO_IDLE_HZ |
56 | static unsigned long initial_match; | 40 | static unsigned long initial_match; |
57 | static int match_posponed; | 41 | static int match_posponed; |
@@ -62,8 +46,6 @@ sa1100_timer_interrupt(int irq, void *dev_id) | |||
62 | { | 46 | { |
63 | unsigned int next_match; | 47 | unsigned int next_match; |
64 | 48 | ||
65 | write_seqlock(&xtime_lock); | ||
66 | |||
67 | #ifdef CONFIG_NO_IDLE_HZ | 49 | #ifdef CONFIG_NO_IDLE_HZ |
68 | if (match_posponed) { | 50 | if (match_posponed) { |
69 | match_posponed = 0; | 51 | match_posponed = 0; |
@@ -85,8 +67,6 @@ sa1100_timer_interrupt(int irq, void *dev_id) | |||
85 | next_match = (OSMR0 += LATCH); | 67 | next_match = (OSMR0 += LATCH); |
86 | } while ((signed long)(next_match - OSCR) <= 0); | 68 | } while ((signed long)(next_match - OSCR) <= 0); |
87 | 69 | ||
88 | write_sequnlock(&xtime_lock); | ||
89 | |||
90 | return IRQ_HANDLED; | 70 | return IRQ_HANDLED; |
91 | } | 71 | } |
92 | 72 | ||
@@ -96,6 +76,20 @@ static struct irqaction sa1100_timer_irq = { | |||
96 | .handler = sa1100_timer_interrupt, | 76 | .handler = sa1100_timer_interrupt, |
97 | }; | 77 | }; |
98 | 78 | ||
79 | static cycle_t sa1100_read_oscr(void) | ||
80 | { | ||
81 | return OSCR; | ||
82 | } | ||
83 | |||
84 | static struct clocksource cksrc_sa1100_oscr = { | ||
85 | .name = "oscr", | ||
86 | .rating = 200, | ||
87 | .read = sa1100_read_oscr, | ||
88 | .mask = CLOCKSOURCE_MASK(32), | ||
89 | .shift = 20, | ||
90 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
91 | }; | ||
92 | |||
99 | static void __init sa1100_timer_init(void) | 93 | static void __init sa1100_timer_init(void) |
100 | { | 94 | { |
101 | unsigned long flags; | 95 | unsigned long flags; |
@@ -109,6 +103,11 @@ static void __init sa1100_timer_init(void) | |||
109 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ | 103 | OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ |
110 | OSMR0 = OSCR + LATCH; /* set initial match */ | 104 | OSMR0 = OSCR + LATCH; /* set initial match */ |
111 | local_irq_restore(flags); | 105 | local_irq_restore(flags); |
106 | |||
107 | cksrc_sa1100_oscr.mult = | ||
108 | clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift); | ||
109 | |||
110 | clocksource_register(&cksrc_sa1100_oscr); | ||
112 | } | 111 | } |
113 | 112 | ||
114 | #ifdef CONFIG_NO_IDLE_HZ | 113 | #ifdef CONFIG_NO_IDLE_HZ |
@@ -182,7 +181,6 @@ struct sys_timer sa1100_timer = { | |||
182 | .init = sa1100_timer_init, | 181 | .init = sa1100_timer_init, |
183 | .suspend = sa1100_timer_suspend, | 182 | .suspend = sa1100_timer_suspend, |
184 | .resume = sa1100_timer_resume, | 183 | .resume = sa1100_timer_resume, |
185 | .offset = sa1100_gettimeoffset, | ||
186 | #ifdef CONFIG_NO_IDLE_HZ | 184 | #ifdef CONFIG_NO_IDLE_HZ |
187 | .dyn_tick = &sa1100_dyn_tick, | 185 | .dyn_tick = &sa1100_dyn_tick, |
188 | #endif | 186 | #endif |
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a0545db2a34f..09d9f33d4072 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -82,9 +82,7 @@ static void __init shark_map_io(void) | |||
82 | static irqreturn_t | 82 | static irqreturn_t |
83 | shark_timer_interrupt(int irq, void *dev_id) | 83 | shark_timer_interrupt(int irq, void *dev_id) |
84 | { | 84 | { |
85 | write_seqlock(&xtime_lock); | ||
86 | timer_tick(); | 85 | timer_tick(); |
87 | write_sequnlock(&xtime_lock); | ||
88 | return IRQ_HANDLED; | 86 | return IRQ_HANDLED; |
89 | } | 87 | } |
90 | 88 | ||
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 7868f4dc1d00..76348f060f27 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig | |||
@@ -171,8 +171,8 @@ config CPU_ARM925T | |||
171 | # ARM926T | 171 | # ARM926T |
172 | config CPU_ARM926T | 172 | config CPU_ARM926T |
173 | bool "Support ARM926T processor" | 173 | bool "Support ARM926T processor" |
174 | depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI | 174 | depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI |
175 | default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_NS9XXX || ARCH_DAVINCI | 175 | default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || ARCH_AT91CAP9 || ARCH_NS9XXX || ARCH_DAVINCI |
176 | select CPU_32v5 | 176 | select CPU_32v5 |
177 | select CPU_ABRT_EV5TJ | 177 | select CPU_ABRT_EV5TJ |
178 | select CPU_CACHE_VIVT | 178 | select CPU_CACHE_VIVT |
@@ -342,11 +342,33 @@ config CPU_XSC3 | |||
342 | select CPU_TLB_V4WBI if MMU | 342 | select CPU_TLB_V4WBI if MMU |
343 | select IO_36 | 343 | select IO_36 |
344 | 344 | ||
345 | # Feroceon | ||
346 | config CPU_FEROCEON | ||
347 | bool | ||
348 | depends on ARCH_ORION | ||
349 | default y | ||
350 | select CPU_32v5 | ||
351 | select CPU_ABRT_EV5T | ||
352 | select CPU_CACHE_VIVT | ||
353 | select CPU_CP15_MMU | ||
354 | select CPU_COPY_V4WB if MMU | ||
355 | select CPU_TLB_V4WBI if MMU | ||
356 | |||
357 | config CPU_FEROCEON_OLD_ID | ||
358 | bool "Accept early Feroceon cores with an ARM926 ID" | ||
359 | depends on CPU_FEROCEON && !CPU_ARM926T | ||
360 | default y | ||
361 | help | ||
362 | This enables the usage of some old Feroceon cores | ||
363 | for which the CPU ID is equal to the ARM926 ID. | ||
364 | Relevant for Feroceon-1850 and early Feroceon-2850. | ||
365 | |||
345 | # ARMv6 | 366 | # ARMv6 |
346 | config CPU_V6 | 367 | config CPU_V6 |
347 | bool "Support ARM V6 processor" | 368 | bool "Support ARM V6 processor" |
348 | depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 | 369 | depends on ARCH_INTEGRATOR || MACH_REALVIEW_EB || ARCH_OMAP2 || ARCH_MX3 || ARCH_MSM7X00A |
349 | default y if ARCH_MX3 | 370 | default y if ARCH_MX3 |
371 | default y if ARCH_MSM7X00A | ||
350 | select CPU_32v6 | 372 | select CPU_32v6 |
351 | select CPU_ABRT_EV6 | 373 | select CPU_ABRT_EV6 |
352 | select CPU_CACHE_V6 | 374 | select CPU_CACHE_V6 |
@@ -538,7 +560,7 @@ comment "Processor Features" | |||
538 | 560 | ||
539 | config ARM_THUMB | 561 | config ARM_THUMB |
540 | bool "Support Thumb user binaries" | 562 | bool "Support Thumb user binaries" |
541 | depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V7 | 563 | depends on CPU_ARM720T || CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_ARM1020E || CPU_ARM1022 || CPU_ARM1026 || CPU_XSCALE || CPU_XSC3 || CPU_V6 || CPU_V7 || CPU_FEROCEON |
542 | default y | 564 | default y |
543 | help | 565 | help |
544 | Say Y if you want to include kernel support for running user space | 566 | Say Y if you want to include kernel support for running user space |
@@ -600,7 +622,7 @@ config CPU_DCACHE_SIZE | |||
600 | 622 | ||
601 | config CPU_DCACHE_WRITETHROUGH | 623 | config CPU_DCACHE_WRITETHROUGH |
602 | bool "Force write through D-cache" | 624 | bool "Force write through D-cache" |
603 | depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020) && !CPU_DCACHE_DISABLE | 625 | depends on (CPU_ARM740T || CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM940T || CPU_ARM946E || CPU_ARM1020 || CPU_FEROCEON) && !CPU_DCACHE_DISABLE |
604 | default y if CPU_ARM925T | 626 | default y if CPU_ARM925T |
605 | help | 627 | help |
606 | Say Y here to use the data cache in writethrough mode. Unless you | 628 | Say Y here to use the data cache in writethrough mode. Unless you |
diff --git a/arch/arm/mm/Makefile b/arch/arm/mm/Makefile index 762702765fc3..44536a0b995a 100644 --- a/arch/arm/mm/Makefile +++ b/arch/arm/mm/Makefile | |||
@@ -68,6 +68,7 @@ obj-$(CONFIG_CPU_SA110) += proc-sa110.o | |||
68 | obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o | 68 | obj-$(CONFIG_CPU_SA1100) += proc-sa1100.o |
69 | obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o | 69 | obj-$(CONFIG_CPU_XSCALE) += proc-xscale.o |
70 | obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o | 70 | obj-$(CONFIG_CPU_XSC3) += proc-xsc3.o |
71 | obj-$(CONFIG_CPU_FEROCEON) += proc-feroceon.o | ||
71 | obj-$(CONFIG_CPU_V6) += proc-v6.o | 72 | obj-$(CONFIG_CPU_V6) += proc-v6.o |
72 | obj-$(CONFIG_CPU_V7) += proc-v7.o | 73 | obj-$(CONFIG_CPU_V7) += proc-v7.o |
73 | 74 | ||
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c index a8a7dab757eb..28ad7ab1c0cd 100644 --- a/arch/arm/mm/fault.c +++ b/arch/arm/mm/fault.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/signal.h> | 12 | #include <linux/signal.h> |
13 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/kprobes.h> | ||
15 | 16 | ||
16 | #include <asm/system.h> | 17 | #include <asm/system.h> |
17 | #include <asm/pgtable.h> | 18 | #include <asm/pgtable.h> |
@@ -20,6 +21,29 @@ | |||
20 | 21 | ||
21 | #include "fault.h" | 22 | #include "fault.h" |
22 | 23 | ||
24 | |||
25 | #ifdef CONFIG_KPROBES | ||
26 | static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr) | ||
27 | { | ||
28 | int ret = 0; | ||
29 | |||
30 | if (!user_mode(regs)) { | ||
31 | /* kprobe_running() needs smp_processor_id() */ | ||
32 | preempt_disable(); | ||
33 | if (kprobe_running() && kprobe_fault_handler(regs, fsr)) | ||
34 | ret = 1; | ||
35 | preempt_enable(); | ||
36 | } | ||
37 | |||
38 | return ret; | ||
39 | } | ||
40 | #else | ||
41 | static inline int notify_page_fault(struct pt_regs *regs, unsigned int fsr) | ||
42 | { | ||
43 | return 0; | ||
44 | } | ||
45 | #endif | ||
46 | |||
23 | /* | 47 | /* |
24 | * This is useful to dump out the page tables associated with | 48 | * This is useful to dump out the page tables associated with |
25 | * 'addr' in mm 'mm'. | 49 | * 'addr' in mm 'mm'. |
@@ -215,13 +239,16 @@ out: | |||
215 | return fault; | 239 | return fault; |
216 | } | 240 | } |
217 | 241 | ||
218 | static int | 242 | static int __kprobes |
219 | do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) | 243 | do_page_fault(unsigned long addr, unsigned int fsr, struct pt_regs *regs) |
220 | { | 244 | { |
221 | struct task_struct *tsk; | 245 | struct task_struct *tsk; |
222 | struct mm_struct *mm; | 246 | struct mm_struct *mm; |
223 | int fault, sig, code; | 247 | int fault, sig, code; |
224 | 248 | ||
249 | if (notify_page_fault(regs, fsr)) | ||
250 | return 0; | ||
251 | |||
225 | tsk = current; | 252 | tsk = current; |
226 | mm = tsk->mm; | 253 | mm = tsk->mm; |
227 | 254 | ||
@@ -311,7 +338,7 @@ no_context: | |||
311 | * interrupt or a critical region, and should only copy the information | 338 | * interrupt or a critical region, and should only copy the information |
312 | * from the master page table, nothing more. | 339 | * from the master page table, nothing more. |
313 | */ | 340 | */ |
314 | static int | 341 | static int __kprobes |
315 | do_translation_fault(unsigned long addr, unsigned int fsr, | 342 | do_translation_fault(unsigned long addr, unsigned int fsr, |
316 | struct pt_regs *regs) | 343 | struct pt_regs *regs) |
317 | { | 344 | { |
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S new file mode 100644 index 000000000000..fa0dc7e6f0ea --- /dev/null +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -0,0 +1,506 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mm/proc-feroceon.S: MMU functions for Feroceon | ||
3 | * | ||
4 | * Heavily based on proc-arm926.S | ||
5 | * Maintainer: Assaf Hoffman <hoffman@marvell.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #include <linux/linkage.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <asm/assembler.h> | ||
25 | #include <asm/elf.h> | ||
26 | #include <asm/pgtable-hwdef.h> | ||
27 | #include <asm/pgtable.h> | ||
28 | #include <asm/page.h> | ||
29 | #include <asm/ptrace.h> | ||
30 | #include "proc-macros.S" | ||
31 | |||
32 | /* | ||
33 | * This is the maximum size of an area which will be invalidated | ||
34 | * using the single invalidate entry instructions. Anything larger | ||
35 | * than this, and we go for the whole cache. | ||
36 | * | ||
37 | * This value should be chosen such that we choose the cheapest | ||
38 | * alternative. | ||
39 | */ | ||
40 | #define CACHE_DLIMIT 16384 | ||
41 | |||
42 | /* | ||
43 | * the cache line size of the I and D cache | ||
44 | */ | ||
45 | #define CACHE_DLINESIZE 32 | ||
46 | |||
47 | .text | ||
48 | /* | ||
49 | * cpu_feroceon_proc_init() | ||
50 | */ | ||
51 | ENTRY(cpu_feroceon_proc_init) | ||
52 | mov pc, lr | ||
53 | |||
54 | /* | ||
55 | * cpu_feroceon_proc_fin() | ||
56 | */ | ||
57 | ENTRY(cpu_feroceon_proc_fin) | ||
58 | stmfd sp!, {lr} | ||
59 | mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE | ||
60 | msr cpsr_c, ip | ||
61 | bl feroceon_flush_kern_cache_all | ||
62 | mrc p15, 0, r0, c1, c0, 0 @ ctrl register | ||
63 | bic r0, r0, #0x1000 @ ...i............ | ||
64 | bic r0, r0, #0x000e @ ............wca. | ||
65 | mcr p15, 0, r0, c1, c0, 0 @ disable caches | ||
66 | ldmfd sp!, {pc} | ||
67 | |||
68 | /* | ||
69 | * cpu_feroceon_reset(loc) | ||
70 | * | ||
71 | * Perform a soft reset of the system. Put the CPU into the | ||
72 | * same state as it would be if it had been reset, and branch | ||
73 | * to what would be the reset vector. | ||
74 | * | ||
75 | * loc: location to jump to for soft reset | ||
76 | */ | ||
77 | .align 5 | ||
78 | ENTRY(cpu_feroceon_reset) | ||
79 | mov ip, #0 | ||
80 | mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches | ||
81 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | ||
82 | #ifdef CONFIG_MMU | ||
83 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | ||
84 | #endif | ||
85 | mrc p15, 0, ip, c1, c0, 0 @ ctrl register | ||
86 | bic ip, ip, #0x000f @ ............wcam | ||
87 | bic ip, ip, #0x1100 @ ...i...s........ | ||
88 | mcr p15, 0, ip, c1, c0, 0 @ ctrl register | ||
89 | mov pc, r0 | ||
90 | |||
91 | /* | ||
92 | * cpu_feroceon_do_idle() | ||
93 | * | ||
94 | * Called with IRQs disabled | ||
95 | */ | ||
96 | .align 10 | ||
97 | ENTRY(cpu_feroceon_do_idle) | ||
98 | mov r0, #0 | ||
99 | mcr p15, 0, r0, c7, c10, 4 @ Drain write buffer | ||
100 | mcr p15, 0, r0, c7, c0, 4 @ Wait for interrupt | ||
101 | mov pc, lr | ||
102 | |||
103 | /* | ||
104 | * flush_user_cache_all() | ||
105 | * | ||
106 | * Clean and invalidate all cache entries in a particular | ||
107 | * address space. | ||
108 | */ | ||
109 | ENTRY(feroceon_flush_user_cache_all) | ||
110 | /* FALLTHROUGH */ | ||
111 | |||
112 | /* | ||
113 | * flush_kern_cache_all() | ||
114 | * | ||
115 | * Clean and invalidate the entire cache. | ||
116 | */ | ||
117 | ENTRY(feroceon_flush_kern_cache_all) | ||
118 | mov r2, #VM_EXEC | ||
119 | mov ip, #0 | ||
120 | __flush_whole_cache: | ||
121 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
122 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | ||
123 | #else | ||
124 | 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate | ||
125 | bne 1b | ||
126 | #endif | ||
127 | tst r2, #VM_EXEC | ||
128 | mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache | ||
129 | mcrne p15, 0, ip, c7, c10, 4 @ drain WB | ||
130 | mov pc, lr | ||
131 | |||
132 | /* | ||
133 | * flush_user_cache_range(start, end, flags) | ||
134 | * | ||
135 | * Clean and invalidate a range of cache entries in the | ||
136 | * specified address range. | ||
137 | * | ||
138 | * - start - start address (inclusive) | ||
139 | * - end - end address (exclusive) | ||
140 | * - flags - vm_flags describing address space | ||
141 | */ | ||
142 | ENTRY(feroceon_flush_user_cache_range) | ||
143 | mov ip, #0 | ||
144 | sub r3, r1, r0 @ calculate total size | ||
145 | cmp r3, #CACHE_DLIMIT | ||
146 | bgt __flush_whole_cache | ||
147 | 1: tst r2, #VM_EXEC | ||
148 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
149 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry | ||
150 | mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry | ||
151 | add r0, r0, #CACHE_DLINESIZE | ||
152 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry | ||
153 | mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry | ||
154 | add r0, r0, #CACHE_DLINESIZE | ||
155 | #else | ||
156 | mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry | ||
157 | mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry | ||
158 | add r0, r0, #CACHE_DLINESIZE | ||
159 | mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D entry | ||
160 | mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry | ||
161 | add r0, r0, #CACHE_DLINESIZE | ||
162 | #endif | ||
163 | cmp r0, r1 | ||
164 | blo 1b | ||
165 | tst r2, #VM_EXEC | ||
166 | mcrne p15, 0, ip, c7, c10, 4 @ drain WB | ||
167 | mov pc, lr | ||
168 | |||
169 | /* | ||
170 | * coherent_kern_range(start, end) | ||
171 | * | ||
172 | * Ensure coherency between the Icache and the Dcache in the | ||
173 | * region described by start, end. If you have non-snooping | ||
174 | * Harvard caches, you need to implement this function. | ||
175 | * | ||
176 | * - start - virtual start address | ||
177 | * - end - virtual end address | ||
178 | */ | ||
179 | ENTRY(feroceon_coherent_kern_range) | ||
180 | /* FALLTHROUGH */ | ||
181 | |||
182 | /* | ||
183 | * coherent_user_range(start, end) | ||
184 | * | ||
185 | * Ensure coherency between the Icache and the Dcache in the | ||
186 | * region described by start, end. If you have non-snooping | ||
187 | * Harvard caches, you need to implement this function. | ||
188 | * | ||
189 | * - start - virtual start address | ||
190 | * - end - virtual end address | ||
191 | */ | ||
192 | ENTRY(feroceon_coherent_user_range) | ||
193 | bic r0, r0, #CACHE_DLINESIZE - 1 | ||
194 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | ||
195 | mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry | ||
196 | add r0, r0, #CACHE_DLINESIZE | ||
197 | cmp r0, r1 | ||
198 | blo 1b | ||
199 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
200 | mov pc, lr | ||
201 | |||
202 | /* | ||
203 | * flush_kern_dcache_page(void *page) | ||
204 | * | ||
205 | * Ensure no D cache aliasing occurs, either with itself or | ||
206 | * the I cache | ||
207 | * | ||
208 | * - addr - page aligned address | ||
209 | */ | ||
210 | ENTRY(feroceon_flush_kern_dcache_page) | ||
211 | add r1, r0, #PAGE_SZ | ||
212 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | ||
213 | add r0, r0, #CACHE_DLINESIZE | ||
214 | cmp r0, r1 | ||
215 | blo 1b | ||
216 | mov r0, #0 | ||
217 | mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache | ||
218 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
219 | mov pc, lr | ||
220 | |||
221 | /* | ||
222 | * dma_inv_range(start, end) | ||
223 | * | ||
224 | * Invalidate (discard) the specified virtual address range. | ||
225 | * May not write back any entries. If 'start' or 'end' | ||
226 | * are not cache line aligned, those lines must be written | ||
227 | * back. | ||
228 | * | ||
229 | * - start - virtual start address | ||
230 | * - end - virtual end address | ||
231 | * | ||
232 | * (same as v4wb) | ||
233 | */ | ||
234 | ENTRY(feroceon_dma_inv_range) | ||
235 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
236 | tst r0, #CACHE_DLINESIZE - 1 | ||
237 | mcrne p15, 0, r0, c7, c10, 1 @ clean D entry | ||
238 | tst r1, #CACHE_DLINESIZE - 1 | ||
239 | mcrne p15, 0, r1, c7, c10, 1 @ clean D entry | ||
240 | #endif | ||
241 | bic r0, r0, #CACHE_DLINESIZE - 1 | ||
242 | 1: mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry | ||
243 | add r0, r0, #CACHE_DLINESIZE | ||
244 | cmp r0, r1 | ||
245 | blo 1b | ||
246 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
247 | mov pc, lr | ||
248 | |||
249 | /* | ||
250 | * dma_clean_range(start, end) | ||
251 | * | ||
252 | * Clean the specified virtual address range. | ||
253 | * | ||
254 | * - start - virtual start address | ||
255 | * - end - virtual end address | ||
256 | * | ||
257 | * (same as v4wb) | ||
258 | */ | ||
259 | ENTRY(feroceon_dma_clean_range) | ||
260 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
261 | bic r0, r0, #CACHE_DLINESIZE - 1 | ||
262 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | ||
263 | add r0, r0, #CACHE_DLINESIZE | ||
264 | cmp r0, r1 | ||
265 | blo 1b | ||
266 | #endif | ||
267 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
268 | mov pc, lr | ||
269 | |||
270 | /* | ||
271 | * dma_flush_range(start, end) | ||
272 | * | ||
273 | * Clean and invalidate the specified virtual address range. | ||
274 | * | ||
275 | * - start - virtual start address | ||
276 | * - end - virtual end address | ||
277 | */ | ||
278 | ENTRY(feroceon_dma_flush_range) | ||
279 | bic r0, r0, #CACHE_DLINESIZE - 1 | ||
280 | 1: | ||
281 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
282 | mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | ||
283 | #else | ||
284 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | ||
285 | #endif | ||
286 | add r0, r0, #CACHE_DLINESIZE | ||
287 | cmp r0, r1 | ||
288 | blo 1b | ||
289 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
290 | mov pc, lr | ||
291 | |||
292 | ENTRY(feroceon_cache_fns) | ||
293 | .long feroceon_flush_kern_cache_all | ||
294 | .long feroceon_flush_user_cache_all | ||
295 | .long feroceon_flush_user_cache_range | ||
296 | .long feroceon_coherent_kern_range | ||
297 | .long feroceon_coherent_user_range | ||
298 | .long feroceon_flush_kern_dcache_page | ||
299 | .long feroceon_dma_inv_range | ||
300 | .long feroceon_dma_clean_range | ||
301 | .long feroceon_dma_flush_range | ||
302 | |||
303 | ENTRY(cpu_feroceon_dcache_clean_area) | ||
304 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
305 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | ||
306 | add r0, r0, #CACHE_DLINESIZE | ||
307 | subs r1, r1, #CACHE_DLINESIZE | ||
308 | bhi 1b | ||
309 | #endif | ||
310 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
311 | mov pc, lr | ||
312 | |||
313 | /* =============================== PageTable ============================== */ | ||
314 | |||
315 | /* | ||
316 | * cpu_feroceon_switch_mm(pgd) | ||
317 | * | ||
318 | * Set the translation base pointer to be as described by pgd. | ||
319 | * | ||
320 | * pgd: new page tables | ||
321 | */ | ||
322 | .align 5 | ||
323 | ENTRY(cpu_feroceon_switch_mm) | ||
324 | #ifdef CONFIG_MMU | ||
325 | mov ip, #0 | ||
326 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
327 | mcr p15, 0, ip, c7, c6, 0 @ invalidate D cache | ||
328 | #else | ||
329 | @ && 'Clean & Invalidate whole DCache' | ||
330 | 1: mrc p15, 0, r15, c7, c14, 3 @ test,clean,invalidate | ||
331 | bne 1b | ||
332 | #endif | ||
333 | mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache | ||
334 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | ||
335 | mcr p15, 0, r0, c2, c0, 0 @ load page table pointer | ||
336 | mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs | ||
337 | #endif | ||
338 | mov pc, lr | ||
339 | |||
340 | /* | ||
341 | * cpu_feroceon_set_pte_ext(ptep, pte, ext) | ||
342 | * | ||
343 | * Set a PTE and flush it out | ||
344 | */ | ||
345 | .align 5 | ||
346 | ENTRY(cpu_feroceon_set_pte_ext) | ||
347 | #ifdef CONFIG_MMU | ||
348 | str r1, [r0], #-2048 @ linux version | ||
349 | |||
350 | eor r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY | ||
351 | |||
352 | bic r2, r1, #PTE_SMALL_AP_MASK | ||
353 | bic r2, r2, #PTE_TYPE_MASK | ||
354 | orr r2, r2, #PTE_TYPE_SMALL | ||
355 | |||
356 | tst r1, #L_PTE_USER @ User? | ||
357 | orrne r2, r2, #PTE_SMALL_AP_URO_SRW | ||
358 | |||
359 | tst r1, #L_PTE_WRITE | L_PTE_DIRTY @ Write and Dirty? | ||
360 | orreq r2, r2, #PTE_SMALL_AP_UNO_SRW | ||
361 | |||
362 | tst r1, #L_PTE_PRESENT | L_PTE_YOUNG @ Present and Young? | ||
363 | movne r2, #0 | ||
364 | |||
365 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
366 | eor r3, r2, #0x0a @ C & small page? | ||
367 | tst r3, #0x0b | ||
368 | biceq r2, r2, #4 | ||
369 | #endif | ||
370 | str r2, [r0] @ hardware version | ||
371 | mov r0, r0 | ||
372 | #ifndef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
373 | mcr p15, 0, r0, c7, c10, 1 @ clean D entry | ||
374 | #endif | ||
375 | mcr p15, 0, r0, c7, c10, 4 @ drain WB | ||
376 | #endif | ||
377 | mov pc, lr | ||
378 | |||
379 | __INIT | ||
380 | |||
381 | .type __feroceon_setup, #function | ||
382 | __feroceon_setup: | ||
383 | mov r0, #0 | ||
384 | mcr p15, 0, r0, c7, c7 @ invalidate I,D caches on v4 | ||
385 | mcr p15, 0, r0, c7, c10, 4 @ drain write buffer on v4 | ||
386 | #ifdef CONFIG_MMU | ||
387 | mcr p15, 0, r0, c8, c7 @ invalidate I,D TLBs on v4 | ||
388 | #endif | ||
389 | |||
390 | |||
391 | #ifdef CONFIG_CPU_DCACHE_WRITETHROUGH | ||
392 | mov r0, #4 @ disable write-back on caches explicitly | ||
393 | mcr p15, 7, r0, c15, c0, 0 | ||
394 | #endif | ||
395 | |||
396 | adr r5, feroceon_crval | ||
397 | ldmia r5, {r5, r6} | ||
398 | mrc p15, 0, r0, c1, c0 @ get control register v4 | ||
399 | bic r0, r0, r5 | ||
400 | orr r0, r0, r6 | ||
401 | #ifdef CONFIG_CPU_CACHE_ROUND_ROBIN | ||
402 | orr r0, r0, #0x4000 @ .1.. .... .... .... | ||
403 | #endif | ||
404 | mov pc, lr | ||
405 | .size __feroceon_setup, . - __feroceon_setup | ||
406 | |||
407 | /* | ||
408 | * R | ||
409 | * .RVI ZFRS BLDP WCAM | ||
410 | * .011 0001 ..11 0101 | ||
411 | * | ||
412 | */ | ||
413 | .type feroceon_crval, #object | ||
414 | feroceon_crval: | ||
415 | crval clear=0x00007f3f, mmuset=0x00003135, ucset=0x00001134 | ||
416 | |||
417 | __INITDATA | ||
418 | |||
419 | /* | ||
420 | * Purpose : Function pointers used to access above functions - all calls | ||
421 | * come through these | ||
422 | */ | ||
423 | .type feroceon_processor_functions, #object | ||
424 | feroceon_processor_functions: | ||
425 | .word v5t_early_abort | ||
426 | .word cpu_feroceon_proc_init | ||
427 | .word cpu_feroceon_proc_fin | ||
428 | .word cpu_feroceon_reset | ||
429 | .word cpu_feroceon_do_idle | ||
430 | .word cpu_feroceon_dcache_clean_area | ||
431 | .word cpu_feroceon_switch_mm | ||
432 | .word cpu_feroceon_set_pte_ext | ||
433 | .size feroceon_processor_functions, . - feroceon_processor_functions | ||
434 | |||
435 | .section ".rodata" | ||
436 | |||
437 | .type cpu_arch_name, #object | ||
438 | cpu_arch_name: | ||
439 | .asciz "armv5te" | ||
440 | .size cpu_arch_name, . - cpu_arch_name | ||
441 | |||
442 | .type cpu_elf_name, #object | ||
443 | cpu_elf_name: | ||
444 | .asciz "v5" | ||
445 | .size cpu_elf_name, . - cpu_elf_name | ||
446 | |||
447 | .type cpu_feroceon_name, #object | ||
448 | cpu_feroceon_name: | ||
449 | .asciz "Feroceon" | ||
450 | .size cpu_feroceon_name, . - cpu_feroceon_name | ||
451 | |||
452 | .align | ||
453 | |||
454 | .section ".proc.info.init", #alloc, #execinstr | ||
455 | |||
456 | #ifdef CONFIG_CPU_FEROCEON_OLD_ID | ||
457 | .type __feroceon_old_id_proc_info,#object | ||
458 | __feroceon_old_id_proc_info: | ||
459 | .long 0x41069260 | ||
460 | .long 0xfffffff0 | ||
461 | .long PMD_TYPE_SECT | \ | ||
462 | PMD_SECT_BUFFERABLE | \ | ||
463 | PMD_SECT_CACHEABLE | \ | ||
464 | PMD_BIT4 | \ | ||
465 | PMD_SECT_AP_WRITE | \ | ||
466 | PMD_SECT_AP_READ | ||
467 | .long PMD_TYPE_SECT | \ | ||
468 | PMD_BIT4 | \ | ||
469 | PMD_SECT_AP_WRITE | \ | ||
470 | PMD_SECT_AP_READ | ||
471 | b __feroceon_setup | ||
472 | .long cpu_arch_name | ||
473 | .long cpu_elf_name | ||
474 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | ||
475 | .long cpu_feroceon_name | ||
476 | .long feroceon_processor_functions | ||
477 | .long v4wbi_tlb_fns | ||
478 | .long v4wb_user_fns | ||
479 | .long feroceon_cache_fns | ||
480 | .size __feroceon_old_id_proc_info, . - __feroceon_old_id_proc_info | ||
481 | #endif | ||
482 | |||
483 | .type __feroceon_proc_info,#object | ||
484 | __feroceon_proc_info: | ||
485 | .long 0x56055310 | ||
486 | .long 0xfffffff0 | ||
487 | .long PMD_TYPE_SECT | \ | ||
488 | PMD_SECT_BUFFERABLE | \ | ||
489 | PMD_SECT_CACHEABLE | \ | ||
490 | PMD_BIT4 | \ | ||
491 | PMD_SECT_AP_WRITE | \ | ||
492 | PMD_SECT_AP_READ | ||
493 | .long PMD_TYPE_SECT | \ | ||
494 | PMD_BIT4 | \ | ||
495 | PMD_SECT_AP_WRITE | \ | ||
496 | PMD_SECT_AP_READ | ||
497 | b __feroceon_setup | ||
498 | .long cpu_arch_name | ||
499 | .long cpu_elf_name | ||
500 | .long HWCAP_SWP|HWCAP_HALF|HWCAP_THUMB|HWCAP_FAST_MULT|HWCAP_EDSP | ||
501 | .long cpu_feroceon_name | ||
502 | .long feroceon_processor_functions | ||
503 | .long v4wbi_tlb_fns | ||
504 | .long v4wb_user_fns | ||
505 | .long feroceon_cache_fns | ||
506 | .size __feroceon_proc_info, . - __feroceon_proc_info | ||
diff --git a/arch/arm/plat-omap/debug-devices.c b/arch/arm/plat-omap/debug-devices.c index 83a5f8b91857..f455233af082 100644 --- a/arch/arm/plat-omap/debug-devices.c +++ b/arch/arm/plat-omap/debug-devices.c | |||
@@ -29,7 +29,7 @@ static struct resource smc91x_resources[] = { | |||
29 | .flags = IORESOURCE_MEM, | 29 | .flags = IORESOURCE_MEM, |
30 | }, | 30 | }, |
31 | [1] = { | 31 | [1] = { |
32 | .flags = IORESOURCE_IRQ, | 32 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, |
33 | }, | 33 | }, |
34 | }; | 34 | }; |
35 | 35 | ||
diff --git a/arch/arm/plat-omap/mailbox.c b/arch/arm/plat-omap/mailbox.c index 0360b1f14d11..45a77df668f1 100644 --- a/arch/arm/plat-omap/mailbox.c +++ b/arch/arm/plat-omap/mailbox.c | |||
@@ -212,7 +212,7 @@ static void __mbox_rx_interrupt(struct omap_mbox *mbox) | |||
212 | 212 | ||
213 | static irqreturn_t mbox_interrupt(int irq, void *p) | 213 | static irqreturn_t mbox_interrupt(int irq, void *p) |
214 | { | 214 | { |
215 | struct omap_mbox *mbox = (struct omap_mbox *)p; | 215 | struct omap_mbox *mbox = p; |
216 | 216 | ||
217 | if (is_mbox_irq(mbox, IRQ_TX)) | 217 | if (is_mbox_irq(mbox, IRQ_TX)) |
218 | __mbox_tx_interrupt(mbox); | 218 | __mbox_tx_interrupt(mbox); |
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c index f7b9ccdaacbc..2af5bd5a1344 100644 --- a/arch/arm/plat-omap/mcbsp.c +++ b/arch/arm/plat-omap/mcbsp.c | |||
@@ -98,9 +98,10 @@ static void omap_mcbsp_dump_reg(u8 id) | |||
98 | 98 | ||
99 | static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) | 99 | static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) |
100 | { | 100 | { |
101 | struct omap_mcbsp * mcbsp_tx = (struct omap_mcbsp *)(dev_id); | 101 | struct omap_mcbsp *mcbsp_tx = dev_id; |
102 | 102 | ||
103 | DBG("TX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2)); | 103 | DBG("TX IRQ callback : 0x%x\n", |
104 | OMAP_MCBSP_READ(mcbsp_tx->io_base, SPCR2)); | ||
104 | 105 | ||
105 | complete(&mcbsp_tx->tx_irq_completion); | 106 | complete(&mcbsp_tx->tx_irq_completion); |
106 | return IRQ_HANDLED; | 107 | return IRQ_HANDLED; |
@@ -108,9 +109,10 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) | |||
108 | 109 | ||
109 | static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) | 110 | static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) |
110 | { | 111 | { |
111 | struct omap_mcbsp * mcbsp_rx = (struct omap_mcbsp *)(dev_id); | 112 | struct omap_mcbsp *mcbsp_rx = dev_id; |
112 | 113 | ||
113 | DBG("RX IRQ callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2)); | 114 | DBG("RX IRQ callback : 0x%x\n", |
115 | OMAP_MCBSP_READ(mcbsp_rx->io_base, SPCR2)); | ||
114 | 116 | ||
115 | complete(&mcbsp_rx->rx_irq_completion); | 117 | complete(&mcbsp_rx->rx_irq_completion); |
116 | return IRQ_HANDLED; | 118 | return IRQ_HANDLED; |
@@ -118,9 +120,10 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) | |||
118 | 120 | ||
119 | static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) | 121 | static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) |
120 | { | 122 | { |
121 | struct omap_mcbsp * mcbsp_dma_tx = (struct omap_mcbsp *)(data); | 123 | struct omap_mcbsp *mcbsp_dma_tx = data; |
122 | 124 | ||
123 | DBG("TX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2)); | 125 | DBG("TX DMA callback : 0x%x\n", |
126 | OMAP_MCBSP_READ(mcbsp_dma_tx->io_base, SPCR2)); | ||
124 | 127 | ||
125 | /* We can free the channels */ | 128 | /* We can free the channels */ |
126 | omap_free_dma(mcbsp_dma_tx->dma_tx_lch); | 129 | omap_free_dma(mcbsp_dma_tx->dma_tx_lch); |
@@ -131,9 +134,10 @@ static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) | |||
131 | 134 | ||
132 | static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) | 135 | static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) |
133 | { | 136 | { |
134 | struct omap_mcbsp * mcbsp_dma_rx = (struct omap_mcbsp *)(data); | 137 | struct omap_mcbsp *mcbsp_dma_rx = data; |
135 | 138 | ||
136 | DBG("RX DMA callback : 0x%x\n", OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2)); | 139 | DBG("RX DMA callback : 0x%x\n", |
140 | OMAP_MCBSP_READ(mcbsp_dma_rx->io_base, SPCR2)); | ||
137 | 141 | ||
138 | /* We can free the channels */ | 142 | /* We can free the channels */ |
139 | omap_free_dma(mcbsp_dma_rx->dma_rx_lch); | 143 | omap_free_dma(mcbsp_dma_rx->dma_rx_lch); |
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile index 8e5ccaa1f03c..131d20237dd7 100644 --- a/arch/arm/plat-s3c24xx/Makefile +++ b/arch/arm/plat-s3c24xx/Makefile | |||
@@ -23,6 +23,7 @@ obj-y += clock.o | |||
23 | 23 | ||
24 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o | 24 | obj-$(CONFIG_CPU_S3C244X) += s3c244x.o |
25 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o | 25 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o |
26 | obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o | ||
26 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o | 27 | obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o |
27 | obj-$(CONFIG_PM) += pm.o | 28 | obj-$(CONFIG_PM) += pm.o |
28 | obj-$(CONFIG_PM) += sleep.o | 29 | obj-$(CONFIG_PM) += sleep.o |
diff --git a/arch/arm/plat-s3c24xx/clock.c b/arch/arm/plat-s3c24xx/clock.c index 79cda0faec86..99a44746f8f2 100644 --- a/arch/arm/plat-s3c24xx/clock.c +++ b/arch/arm/plat-s3c24xx/clock.c | |||
@@ -172,6 +172,15 @@ int clk_set_rate(struct clk *clk, unsigned long rate) | |||
172 | if (IS_ERR(clk)) | 172 | if (IS_ERR(clk)) |
173 | return -EINVAL; | 173 | return -EINVAL; |
174 | 174 | ||
175 | /* We do not default just do a clk->rate = rate as | ||
176 | * the clock may have been made this way by choice. | ||
177 | */ | ||
178 | |||
179 | WARN_ON(clk->set_rate == NULL); | ||
180 | |||
181 | if (clk->set_rate == NULL) | ||
182 | return -EINVAL; | ||
183 | |||
175 | mutex_lock(&clocks_mutex); | 184 | mutex_lock(&clocks_mutex); |
176 | ret = (clk->set_rate)(clk, rate); | 185 | ret = (clk->set_rate)(clk, rate); |
177 | mutex_unlock(&clocks_mutex); | 186 | mutex_unlock(&clocks_mutex); |
@@ -213,6 +222,12 @@ EXPORT_SYMBOL(clk_set_parent); | |||
213 | 222 | ||
214 | /* base clocks */ | 223 | /* base clocks */ |
215 | 224 | ||
225 | static int clk_default_setrate(struct clk *clk, unsigned long rate) | ||
226 | { | ||
227 | clk->rate = rate; | ||
228 | return 0; | ||
229 | } | ||
230 | |||
216 | struct clk clk_xtal = { | 231 | struct clk clk_xtal = { |
217 | .name = "xtal", | 232 | .name = "xtal", |
218 | .id = -1, | 233 | .id = -1, |
@@ -224,6 +239,7 @@ struct clk clk_xtal = { | |||
224 | struct clk clk_mpll = { | 239 | struct clk clk_mpll = { |
225 | .name = "mpll", | 240 | .name = "mpll", |
226 | .id = -1, | 241 | .id = -1, |
242 | .set_rate = clk_default_setrate, | ||
227 | }; | 243 | }; |
228 | 244 | ||
229 | struct clk clk_upll = { | 245 | struct clk clk_upll = { |
@@ -239,6 +255,7 @@ struct clk clk_f = { | |||
239 | .rate = 0, | 255 | .rate = 0, |
240 | .parent = &clk_mpll, | 256 | .parent = &clk_mpll, |
241 | .ctrlbit = 0, | 257 | .ctrlbit = 0, |
258 | .set_rate = clk_default_setrate, | ||
242 | }; | 259 | }; |
243 | 260 | ||
244 | struct clk clk_h = { | 261 | struct clk clk_h = { |
@@ -247,6 +264,7 @@ struct clk clk_h = { | |||
247 | .rate = 0, | 264 | .rate = 0, |
248 | .parent = NULL, | 265 | .parent = NULL, |
249 | .ctrlbit = 0, | 266 | .ctrlbit = 0, |
267 | .set_rate = clk_default_setrate, | ||
250 | }; | 268 | }; |
251 | 269 | ||
252 | struct clk clk_p = { | 270 | struct clk clk_p = { |
@@ -255,6 +273,7 @@ struct clk clk_p = { | |||
255 | .rate = 0, | 273 | .rate = 0, |
256 | .parent = NULL, | 274 | .parent = NULL, |
257 | .ctrlbit = 0, | 275 | .ctrlbit = 0, |
276 | .set_rate = clk_default_setrate, | ||
258 | }; | 277 | }; |
259 | 278 | ||
260 | struct clk clk_usb_bus = { | 279 | struct clk clk_usb_bus = { |
diff --git a/arch/arm/plat-s3c24xx/dma.c b/arch/arm/plat-s3c24xx/dma.c index aae1b9cbaf44..ac9ff1666fcc 100644 --- a/arch/arm/plat-s3c24xx/dma.c +++ b/arch/arm/plat-s3c24xx/dma.c | |||
@@ -525,7 +525,8 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, | |||
525 | } | 525 | } |
526 | } else if (chan->state == S3C2410_DMA_IDLE) { | 526 | } else if (chan->state == S3C2410_DMA_IDLE) { |
527 | if (chan->flags & S3C2410_DMAF_AUTOSTART) { | 527 | if (chan->flags & S3C2410_DMAF_AUTOSTART) { |
528 | s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_START); | 528 | s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL, |
529 | S3C2410_DMAOP_START); | ||
529 | } | 530 | } |
530 | } | 531 | } |
531 | 532 | ||
@@ -787,7 +788,7 @@ int s3c2410_dma_request(unsigned int channel, | |||
787 | 788 | ||
788 | pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan); | 789 | pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan); |
789 | 790 | ||
790 | return 0; | 791 | return chan->number | DMACH_LOW_LEVEL; |
791 | } | 792 | } |
792 | 793 | ||
793 | EXPORT_SYMBOL(s3c2410_dma_request); | 794 | EXPORT_SYMBOL(s3c2410_dma_request); |
@@ -1173,6 +1174,7 @@ int s3c2410_dma_devconfig(int channel, | |||
1173 | 1174 | ||
1174 | chan->source = source; | 1175 | chan->source = source; |
1175 | chan->dev_addr = devaddr; | 1176 | chan->dev_addr = devaddr; |
1177 | chan->hw_cfg = hwcfg; | ||
1176 | 1178 | ||
1177 | switch (source) { | 1179 | switch (source) { |
1178 | case S3C2410_DMASRC_HW: | 1180 | case S3C2410_DMASRC_HW: |
@@ -1184,7 +1186,7 @@ int s3c2410_dma_devconfig(int channel, | |||
1184 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); | 1186 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); |
1185 | 1187 | ||
1186 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); | 1188 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); |
1187 | return 0; | 1189 | break; |
1188 | 1190 | ||
1189 | case S3C2410_DMASRC_MEM: | 1191 | case S3C2410_DMASRC_MEM: |
1190 | /* source is memory */ | 1192 | /* source is memory */ |
@@ -1195,11 +1197,19 @@ int s3c2410_dma_devconfig(int channel, | |||
1195 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); | 1197 | dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); |
1196 | 1198 | ||
1197 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC); | 1199 | chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC); |
1198 | return 0; | 1200 | break; |
1201 | |||
1202 | default: | ||
1203 | printk(KERN_ERR "dma%d: invalid source type (%d)\n", | ||
1204 | channel, source); | ||
1205 | |||
1206 | return -EINVAL; | ||
1199 | } | 1207 | } |
1200 | 1208 | ||
1201 | printk(KERN_ERR "dma%d: invalid source type (%d)\n", channel, source); | 1209 | if (dma_sel.direction != NULL) |
1202 | return -EINVAL; | 1210 | (dma_sel.direction)(chan, chan->map, source); |
1211 | |||
1212 | return 0; | ||
1203 | } | 1213 | } |
1204 | 1214 | ||
1205 | EXPORT_SYMBOL(s3c2410_dma_devconfig); | 1215 | EXPORT_SYMBOL(s3c2410_dma_devconfig); |
@@ -1227,6 +1237,10 @@ int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) | |||
1227 | 1237 | ||
1228 | EXPORT_SYMBOL(s3c2410_dma_getposition); | 1238 | EXPORT_SYMBOL(s3c2410_dma_getposition); |
1229 | 1239 | ||
1240 | static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) | ||
1241 | { | ||
1242 | return container_of(dev, struct s3c2410_dma_chan, dev); | ||
1243 | } | ||
1230 | 1244 | ||
1231 | /* system device class */ | 1245 | /* system device class */ |
1232 | 1246 | ||
@@ -1234,7 +1248,7 @@ EXPORT_SYMBOL(s3c2410_dma_getposition); | |||
1234 | 1248 | ||
1235 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) | 1249 | static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) |
1236 | { | 1250 | { |
1237 | struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev); | 1251 | struct s3c2410_dma_chan *cp = to_dma_chan(dev); |
1238 | 1252 | ||
1239 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); | 1253 | printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); |
1240 | 1254 | ||
@@ -1256,6 +1270,24 @@ static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) | |||
1256 | 1270 | ||
1257 | static int s3c2410_dma_resume(struct sys_device *dev) | 1271 | static int s3c2410_dma_resume(struct sys_device *dev) |
1258 | { | 1272 | { |
1273 | struct s3c2410_dma_chan *cp = to_dma_chan(dev); | ||
1274 | unsigned int no = cp->number | DMACH_LOW_LEVEL; | ||
1275 | |||
1276 | /* restore channel's hardware configuration */ | ||
1277 | |||
1278 | if (!cp->in_use) | ||
1279 | return 0; | ||
1280 | |||
1281 | printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); | ||
1282 | |||
1283 | s3c2410_dma_config(no, cp->xfer_unit, cp->dcon); | ||
1284 | s3c2410_dma_devconfig(no, cp->source, cp->hw_cfg, cp->dev_addr); | ||
1285 | |||
1286 | /* re-select the dma source for this channel */ | ||
1287 | |||
1288 | if (cp->map != NULL) | ||
1289 | dma_sel.select(cp, cp->map); | ||
1290 | |||
1259 | return 0; | 1291 | return 0; |
1260 | } | 1292 | } |
1261 | 1293 | ||
@@ -1445,6 +1477,7 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) | |||
1445 | 1477 | ||
1446 | found: | 1478 | found: |
1447 | dmach = &s3c2410_chans[ch]; | 1479 | dmach = &s3c2410_chans[ch]; |
1480 | dmach->map = ch_map; | ||
1448 | dma_chan_map[channel] = dmach; | 1481 | dma_chan_map[channel] = dmach; |
1449 | 1482 | ||
1450 | /* select the channel */ | 1483 | /* select the channel */ |
diff --git a/arch/arm/plat-s3c24xx/gpio.c b/arch/arm/plat-s3c24xx/gpio.c index ec3a09c4d181..ee99dcc7f0bd 100644 --- a/arch/arm/plat-s3c24xx/gpio.c +++ b/arch/arm/plat-s3c24xx/gpio.c | |||
@@ -122,6 +122,19 @@ void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) | |||
122 | 122 | ||
123 | EXPORT_SYMBOL(s3c2410_gpio_pullup); | 123 | EXPORT_SYMBOL(s3c2410_gpio_pullup); |
124 | 124 | ||
125 | int s3c2410_gpio_getpull(unsigned int pin) | ||
126 | { | ||
127 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | ||
128 | unsigned long offs = S3C2410_GPIO_OFFSET(pin); | ||
129 | |||
130 | if (pin < S3C2410_GPIO_BANKB) | ||
131 | return -EINVAL; | ||
132 | |||
133 | return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0; | ||
134 | } | ||
135 | |||
136 | EXPORT_SYMBOL(s3c2410_gpio_getpull); | ||
137 | |||
125 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) | 138 | void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) |
126 | { | 139 | { |
127 | void __iomem *base = S3C24XX_GPIO_BASE(pin); | 140 | void __iomem *base = S3C24XX_GPIO_BASE(pin); |
@@ -186,3 +199,19 @@ int s3c2410_gpio_getirq(unsigned int pin) | |||
186 | } | 199 | } |
187 | 200 | ||
188 | EXPORT_SYMBOL(s3c2410_gpio_getirq); | 201 | EXPORT_SYMBOL(s3c2410_gpio_getirq); |
202 | |||
203 | int s3c2410_gpio_irq2pin(unsigned int irq) | ||
204 | { | ||
205 | if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3) | ||
206 | return S3C2410_GPF0 + (irq - IRQ_EINT0); | ||
207 | |||
208 | if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7) | ||
209 | return S3C2410_GPF4 + (irq - IRQ_EINT4); | ||
210 | |||
211 | if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23) | ||
212 | return S3C2410_GPG0 + (irq - IRQ_EINT8); | ||
213 | |||
214 | return -EINVAL; | ||
215 | } | ||
216 | |||
217 | EXPORT_SYMBOL(s3c2410_gpio_irq2pin); | ||
diff --git a/arch/arm/plat-s3c24xx/irq.c b/arch/arm/plat-s3c24xx/irq.c index 8fbc88470261..d486f5112569 100644 --- a/arch/arm/plat-s3c24xx/irq.c +++ b/arch/arm/plat-s3c24xx/irq.c | |||
@@ -187,7 +187,7 @@ struct irq_chip s3c_irq_level_chip = { | |||
187 | .set_wake = s3c_irq_wake | 187 | .set_wake = s3c_irq_wake |
188 | }; | 188 | }; |
189 | 189 | ||
190 | static struct irq_chip s3c_irq_chip = { | 190 | struct irq_chip s3c_irq_chip = { |
191 | .name = "s3c", | 191 | .name = "s3c", |
192 | .ack = s3c_irq_ack, | 192 | .ack = s3c_irq_ack, |
193 | .mask = s3c_irq_mask, | 193 | .mask = s3c_irq_mask, |
diff --git a/arch/arm/plat-s3c24xx/pm.c b/arch/arm/plat-s3c24xx/pm.c index 4fdb3117744f..bf5581a9aeea 100644 --- a/arch/arm/plat-s3c24xx/pm.c +++ b/arch/arm/plat-s3c24xx/pm.c | |||
@@ -83,38 +83,39 @@ static struct sleep_save core_save[] = { | |||
83 | SAVE_ITEM(S3C2410_REFRESH), | 83 | SAVE_ITEM(S3C2410_REFRESH), |
84 | }; | 84 | }; |
85 | 85 | ||
86 | static struct sleep_save gpio_save[] = { | 86 | static struct gpio_sleep { |
87 | SAVE_ITEM(S3C2410_GPACON), | 87 | void __iomem *base; |
88 | SAVE_ITEM(S3C2410_GPADAT), | 88 | unsigned int gpcon; |
89 | 89 | unsigned int gpdat; | |
90 | SAVE_ITEM(S3C2410_GPBCON), | 90 | unsigned int gpup; |
91 | SAVE_ITEM(S3C2410_GPBDAT), | 91 | } gpio_save[] = { |
92 | SAVE_ITEM(S3C2410_GPBUP), | 92 | [0] = { |
93 | 93 | .base = S3C2410_GPACON, | |
94 | SAVE_ITEM(S3C2410_GPCCON), | 94 | }, |
95 | SAVE_ITEM(S3C2410_GPCDAT), | 95 | [1] = { |
96 | SAVE_ITEM(S3C2410_GPCUP), | 96 | .base = S3C2410_GPBCON, |
97 | 97 | }, | |
98 | SAVE_ITEM(S3C2410_GPDCON), | 98 | [2] = { |
99 | SAVE_ITEM(S3C2410_GPDDAT), | 99 | .base = S3C2410_GPCCON, |
100 | SAVE_ITEM(S3C2410_GPDUP), | 100 | }, |
101 | 101 | [3] = { | |
102 | SAVE_ITEM(S3C2410_GPECON), | 102 | .base = S3C2410_GPDCON, |
103 | SAVE_ITEM(S3C2410_GPEDAT), | 103 | }, |
104 | SAVE_ITEM(S3C2410_GPEUP), | 104 | [4] = { |
105 | 105 | .base = S3C2410_GPECON, | |
106 | SAVE_ITEM(S3C2410_GPFCON), | 106 | }, |
107 | SAVE_ITEM(S3C2410_GPFDAT), | 107 | [5] = { |
108 | SAVE_ITEM(S3C2410_GPFUP), | 108 | .base = S3C2410_GPFCON, |
109 | 109 | }, | |
110 | SAVE_ITEM(S3C2410_GPGCON), | 110 | [6] = { |
111 | SAVE_ITEM(S3C2410_GPGDAT), | 111 | .base = S3C2410_GPGCON, |
112 | SAVE_ITEM(S3C2410_GPGUP), | 112 | }, |
113 | 113 | [7] = { | |
114 | SAVE_ITEM(S3C2410_GPHCON), | 114 | .base = S3C2410_GPHCON, |
115 | SAVE_ITEM(S3C2410_GPHDAT), | 115 | }, |
116 | SAVE_ITEM(S3C2410_GPHUP), | 116 | }; |
117 | 117 | ||
118 | static struct sleep_save misc_save[] = { | ||
118 | SAVE_ITEM(S3C2410_DCLKCON), | 119 | SAVE_ITEM(S3C2410_DCLKCON), |
119 | }; | 120 | }; |
120 | 121 | ||
@@ -486,6 +487,184 @@ static void s3c2410_pm_configure_extint(void) | |||
486 | } | 487 | } |
487 | } | 488 | } |
488 | 489 | ||
490 | /* offsets for CON/DAT/UP registers */ | ||
491 | |||
492 | #define OFFS_CON (S3C2410_GPACON - S3C2410_GPACON) | ||
493 | #define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) | ||
494 | #define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) | ||
495 | |||
496 | /* s3c2410_pm_save_gpios() | ||
497 | * | ||
498 | * Save the state of the GPIOs | ||
499 | */ | ||
500 | |||
501 | static void s3c2410_pm_save_gpios(void) | ||
502 | { | ||
503 | struct gpio_sleep *gps = gpio_save; | ||
504 | unsigned int gpio; | ||
505 | |||
506 | for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { | ||
507 | void __iomem *base = gps->base; | ||
508 | |||
509 | gps->gpcon = __raw_readl(base + OFFS_CON); | ||
510 | gps->gpdat = __raw_readl(base + OFFS_DAT); | ||
511 | |||
512 | if (gpio > 0) | ||
513 | gps->gpup = __raw_readl(base + OFFS_UP); | ||
514 | |||
515 | } | ||
516 | } | ||
517 | |||
518 | /* Test whether the given masked+shifted bits of an GPIO configuration | ||
519 | * are one of the SFN (special function) modes. */ | ||
520 | |||
521 | static inline int is_sfn(unsigned long con) | ||
522 | { | ||
523 | return (con == 2 || con == 3); | ||
524 | } | ||
525 | |||
526 | /* Test if the given masked+shifted GPIO configuration is an input */ | ||
527 | |||
528 | static inline int is_in(unsigned long con) | ||
529 | { | ||
530 | return con == 0; | ||
531 | } | ||
532 | |||
533 | /* Test if the given masked+shifted GPIO configuration is an output */ | ||
534 | |||
535 | static inline int is_out(unsigned long con) | ||
536 | { | ||
537 | return con == 1; | ||
538 | } | ||
539 | |||
540 | /* s3c2410_pm_restore_gpio() | ||
541 | * | ||
542 | * Restore one of the GPIO banks that was saved during suspend. This is | ||
543 | * not as simple as once thought, due to the possibility of glitches | ||
544 | * from the order that the CON and DAT registers are set in. | ||
545 | * | ||
546 | * The three states the pin can be are {IN,OUT,SFN} which gives us 9 | ||
547 | * combinations of changes to check. Three of these, if the pin stays | ||
548 | * in the same configuration can be discounted. This leaves us with | ||
549 | * the following: | ||
550 | * | ||
551 | * { IN => OUT } Change DAT first | ||
552 | * { IN => SFN } Change CON first | ||
553 | * { OUT => SFN } Change CON first, so new data will not glitch | ||
554 | * { OUT => IN } Change CON first, so new data will not glitch | ||
555 | * { SFN => IN } Change CON first | ||
556 | * { SFN => OUT } Change DAT first, so new data will not glitch [1] | ||
557 | * | ||
558 | * We do not currently deal with the UP registers as these control | ||
559 | * weak resistors, so a small delay in change should not need to bring | ||
560 | * these into the calculations. | ||
561 | * | ||
562 | * [1] this assumes that writing to a pin DAT whilst in SFN will set the | ||
563 | * state for when it is next output. | ||
564 | */ | ||
565 | |||
566 | static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) | ||
567 | { | ||
568 | void __iomem *base = gps->base; | ||
569 | unsigned long gps_gpcon = gps->gpcon; | ||
570 | unsigned long gps_gpdat = gps->gpdat; | ||
571 | unsigned long old_gpcon; | ||
572 | unsigned long old_gpdat; | ||
573 | unsigned long old_gpup = 0x0; | ||
574 | unsigned long gpcon; | ||
575 | int nr; | ||
576 | |||
577 | old_gpcon = __raw_readl(base + OFFS_CON); | ||
578 | old_gpdat = __raw_readl(base + OFFS_DAT); | ||
579 | |||
580 | if (base == S3C2410_GPACON) { | ||
581 | /* GPACON only has one bit per control / data and no PULLUPs. | ||
582 | * GPACON[x] = 0 => Output, 1 => SFN */ | ||
583 | |||
584 | /* first set all SFN bits to SFN */ | ||
585 | |||
586 | gpcon = old_gpcon | gps->gpcon; | ||
587 | __raw_writel(gpcon, base + OFFS_CON); | ||
588 | |||
589 | /* now set all the other bits */ | ||
590 | |||
591 | __raw_writel(gps_gpdat, base + OFFS_DAT); | ||
592 | __raw_writel(gps_gpcon, base + OFFS_CON); | ||
593 | } else { | ||
594 | unsigned long old, new, mask; | ||
595 | unsigned long change_mask = 0x0; | ||
596 | |||
597 | old_gpup = __raw_readl(base + OFFS_UP); | ||
598 | |||
599 | /* Create a change_mask of all the items that need to have | ||
600 | * their CON value changed before their DAT value, so that | ||
601 | * we minimise the work between the two settings. | ||
602 | */ | ||
603 | |||
604 | for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { | ||
605 | old = (old_gpcon & mask) >> nr; | ||
606 | new = (gps_gpcon & mask) >> nr; | ||
607 | |||
608 | /* If there is no change, then skip */ | ||
609 | |||
610 | if (old == new) | ||
611 | continue; | ||
612 | |||
613 | /* If both are special function, then skip */ | ||
614 | |||
615 | if (is_sfn(old) && is_sfn(new)) | ||
616 | continue; | ||
617 | |||
618 | /* Change is IN => OUT, do not change now */ | ||
619 | |||
620 | if (is_in(old) && is_out(new)) | ||
621 | continue; | ||
622 | |||
623 | /* Change is SFN => OUT, do not change now */ | ||
624 | |||
625 | if (is_sfn(old) && is_out(new)) | ||
626 | continue; | ||
627 | |||
628 | /* We should now be at the case of IN=>SFN, | ||
629 | * OUT=>SFN, OUT=>IN, SFN=>IN. */ | ||
630 | |||
631 | change_mask |= mask; | ||
632 | } | ||
633 | |||
634 | /* Write the new CON settings */ | ||
635 | |||
636 | gpcon = old_gpcon & ~change_mask; | ||
637 | gpcon |= gps_gpcon & change_mask; | ||
638 | |||
639 | __raw_writel(gpcon, base + OFFS_CON); | ||
640 | |||
641 | /* Now change any items that require DAT,CON */ | ||
642 | |||
643 | __raw_writel(gps_gpdat, base + OFFS_DAT); | ||
644 | __raw_writel(gps_gpcon, base + OFFS_CON); | ||
645 | __raw_writel(gps->gpup, base + OFFS_UP); | ||
646 | } | ||
647 | |||
648 | DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", | ||
649 | index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); | ||
650 | } | ||
651 | |||
652 | |||
653 | /** s3c2410_pm_restore_gpios() | ||
654 | * | ||
655 | * Restore the state of the GPIOs | ||
656 | */ | ||
657 | |||
658 | static void s3c2410_pm_restore_gpios(void) | ||
659 | { | ||
660 | struct gpio_sleep *gps = gpio_save; | ||
661 | int gpio; | ||
662 | |||
663 | for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { | ||
664 | s3c2410_pm_restore_gpio(gpio, gps); | ||
665 | } | ||
666 | } | ||
667 | |||
489 | void (*pm_cpu_prep)(void); | 668 | void (*pm_cpu_prep)(void); |
490 | void (*pm_cpu_sleep)(void); | 669 | void (*pm_cpu_sleep)(void); |
491 | 670 | ||
@@ -535,7 +714,8 @@ static int s3c2410_pm_enter(suspend_state_t state) | |||
535 | 714 | ||
536 | /* save all necessary core registers not covered by the drivers */ | 715 | /* save all necessary core registers not covered by the drivers */ |
537 | 716 | ||
538 | s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save)); | 717 | s3c2410_pm_save_gpios(); |
718 | s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); | ||
539 | s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); | 719 | s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); |
540 | s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); | 720 | s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); |
541 | 721 | ||
@@ -585,8 +765,9 @@ static int s3c2410_pm_enter(suspend_state_t state) | |||
585 | /* restore the system state */ | 765 | /* restore the system state */ |
586 | 766 | ||
587 | s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); | 767 | s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); |
588 | s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save)); | 768 | s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); |
589 | s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); | 769 | s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); |
770 | s3c2410_pm_restore_gpios(); | ||
590 | 771 | ||
591 | s3c2410_pm_debug_init(); | 772 | s3c2410_pm_debug_init(); |
592 | 773 | ||
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c new file mode 100644 index 000000000000..faf3e0f9f4e2 --- /dev/null +++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c | |||
@@ -0,0 +1,137 @@ | |||
1 | /* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c | ||
2 | * | ||
3 | * Copyright (c) 2004-2005,2008 Simtec Electronics | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * S3C2440/S3C2442 Common clock support | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <linux/module.h> | ||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/list.h> | ||
28 | #include <linux/errno.h> | ||
29 | #include <linux/err.h> | ||
30 | #include <linux/device.h> | ||
31 | #include <linux/sysdev.h> | ||
32 | #include <linux/interrupt.h> | ||
33 | #include <linux/ioport.h> | ||
34 | #include <linux/mutex.h> | ||
35 | #include <linux/clk.h> | ||
36 | |||
37 | #include <asm/hardware.h> | ||
38 | #include <asm/atomic.h> | ||
39 | #include <asm/irq.h> | ||
40 | #include <asm/io.h> | ||
41 | |||
42 | #include <asm/arch/regs-clock.h> | ||
43 | |||
44 | #include <asm/plat-s3c24xx/clock.h> | ||
45 | #include <asm/plat-s3c24xx/cpu.h> | ||
46 | |||
47 | static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) | ||
48 | { | ||
49 | unsigned long camdivn; | ||
50 | unsigned long dvs; | ||
51 | |||
52 | if (parent == &clk_f) | ||
53 | dvs = 0; | ||
54 | else if (parent == &clk_h) | ||
55 | dvs = S3C2440_CAMDIVN_DVSEN; | ||
56 | else | ||
57 | return -EINVAL; | ||
58 | |||
59 | clk->parent = parent; | ||
60 | |||
61 | camdivn = __raw_readl(S3C2440_CAMDIVN); | ||
62 | camdivn &= ~S3C2440_CAMDIVN_DVSEN; | ||
63 | camdivn |= dvs; | ||
64 | __raw_writel(camdivn, S3C2440_CAMDIVN); | ||
65 | |||
66 | return 0; | ||
67 | } | ||
68 | |||
69 | static struct clk clk_arm = { | ||
70 | .name = "armclk", | ||
71 | .id = -1, | ||
72 | .set_parent = s3c2440_setparent_armclk, | ||
73 | }; | ||
74 | |||
75 | static int s3c244x_clk_add(struct sys_device *sysdev) | ||
76 | { | ||
77 | unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); | ||
78 | unsigned long clkdivn; | ||
79 | struct clk *clock_upll; | ||
80 | int ret; | ||
81 | |||
82 | printk("S3C244X: Clock Support, DVS %s\n", | ||
83 | (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); | ||
84 | |||
85 | clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f; | ||
86 | |||
87 | ret = s3c24xx_register_clock(&clk_arm); | ||
88 | if (ret < 0) { | ||
89 | printk(KERN_ERR "S3C24XX: Failed to add armclk (%d)\n", ret); | ||
90 | return ret; | ||
91 | } | ||
92 | |||
93 | clock_upll = clk_get(NULL, "upll"); | ||
94 | if (IS_ERR(clock_upll)) { | ||
95 | printk(KERN_ERR "S3C244X: Failed to get upll clock\n"); | ||
96 | return -ENOENT; | ||
97 | } | ||
98 | |||
99 | /* check rate of UPLL, and if it is near 96MHz, then change | ||
100 | * to using half the UPLL rate for the system */ | ||
101 | |||
102 | if (clk_get_rate(clock_upll) > (94 * MHZ)) { | ||
103 | clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; | ||
104 | |||
105 | mutex_lock(&clocks_mutex); | ||
106 | |||
107 | clkdivn = __raw_readl(S3C2410_CLKDIVN); | ||
108 | clkdivn |= S3C2440_CLKDIVN_UCLK; | ||
109 | __raw_writel(clkdivn, S3C2410_CLKDIVN); | ||
110 | |||
111 | mutex_unlock(&clocks_mutex); | ||
112 | } | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
117 | static struct sysdev_driver s3c2440_clk_driver = { | ||
118 | .add = s3c244x_clk_add, | ||
119 | }; | ||
120 | |||
121 | static int s3c2440_clk_init(void) | ||
122 | { | ||
123 | return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver); | ||
124 | } | ||
125 | |||
126 | arch_initcall(s3c2440_clk_init); | ||
127 | |||
128 | static struct sysdev_driver s3c2442_clk_driver = { | ||
129 | .add = s3c244x_clk_add, | ||
130 | }; | ||
131 | |||
132 | static int s3c2442_clk_init(void) | ||
133 | { | ||
134 | return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); | ||
135 | } | ||
136 | |||
137 | arch_initcall(s3c2442_clk_init); | ||
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 0a9a5e7f62e5..7ed58c0c24c2 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -12,7 +12,7 @@ | |||
12 | # | 12 | # |
13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | # | 14 | # |
15 | # Last update: Fri May 11 19:53:41 2007 | 15 | # Last update: Sat Jan 26 14:45:34 2008 |
16 | # | 16 | # |
17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | # | 18 | # |
@@ -266,7 +266,7 @@ stork_egg ARCH_STORK_EGG STORK_EGG 248 | |||
266 | wismo SA1100_WISMO WISMO 249 | 266 | wismo SA1100_WISMO WISMO 249 |
267 | ezlinx ARCH_EZLINX EZLINX 250 | 267 | ezlinx ARCH_EZLINX EZLINX 250 |
268 | at91rm9200 ARCH_AT91RM9200 AT91RM9200 251 | 268 | at91rm9200 ARCH_AT91RM9200 AT91RM9200 251 |
269 | orion ARCH_ORION ORION 252 | 269 | adtech_orion ARCH_ADTECH_ORION ADTECH_ORION 252 |
270 | neptune ARCH_NEPTUNE NEPTUNE 253 | 270 | neptune ARCH_NEPTUNE NEPTUNE 253 |
271 | hackkit SA1100_HACKKIT HACKKIT 254 | 271 | hackkit SA1100_HACKKIT HACKKIT 254 |
272 | pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255 | 272 | pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255 |
@@ -661,7 +661,6 @@ a9200ec MACH_A9200EC A9200EC 645 | |||
661 | pnx0105 MACH_PNX0105 PNX0105 646 | 661 | pnx0105 MACH_PNX0105 PNX0105 646 |
662 | adcpoecpu MACH_ADCPOECPU ADCPOECPU 647 | 662 | adcpoecpu MACH_ADCPOECPU ADCPOECPU 647 |
663 | csb637 MACH_CSB637 CSB637 648 | 663 | csb637 MACH_CSB637 CSB637 648 |
664 | ml69q6203 MACH_ML69Q6203 ML69Q6203 649 | ||
665 | mb9200 MACH_MB9200 MB9200 650 | 664 | mb9200 MACH_MB9200 MB9200 650 |
666 | kulun MACH_KULUN KULUN 651 | 665 | kulun MACH_KULUN KULUN 651 |
667 | snapper MACH_SNAPPER SNAPPER 652 | 666 | snapper MACH_SNAPPER SNAPPER 652 |
@@ -953,7 +952,6 @@ fred_jack MACH_FRED_JACK FRED_JACK 939 | |||
953 | ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940 | 952 | ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940 |
954 | nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 | 953 | nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 |
955 | netdcu8 MACH_NETDCU8 NETDCU8 942 | 954 | netdcu8 MACH_NETDCU8 NETDCU8 942 |
956 | ml675050_cpu_boa MACH_ML675050_CPU_BOA ML675050_CPU_BOA 943 | ||
957 | ng_fvx538 MACH_NG_FVX538 NG_FVX538 944 | 955 | ng_fvx538 MACH_NG_FVX538 NG_FVX538 944 |
958 | ng_fvs338 MACH_NG_FVS338 NG_FVS338 945 | 956 | ng_fvs338 MACH_NG_FVS338 NG_FVS338 945 |
959 | pnx4103 MACH_PNX4103 PNX4103 946 | 957 | pnx4103 MACH_PNX4103 PNX4103 946 |
@@ -1148,7 +1146,7 @@ aidx270 MACH_AIDX270 AIDX270 1134 | |||
1148 | rema MACH_REMA REMA 1135 | 1146 | rema MACH_REMA REMA 1135 |
1149 | bps1000 MACH_BPS1000 BPS1000 1136 | 1147 | bps1000 MACH_BPS1000 BPS1000 1136 |
1150 | hw90350 MACH_HW90350 HW90350 1137 | 1148 | hw90350 MACH_HW90350 HW90350 1137 |
1151 | omap_sdp3430 MACH_OMAP_SDP3430 OMAP_SDP3430 1138 | 1149 | omap_3430sdp MACH_OMAP_3430SDP OMAP_3430SDP 1138 |
1152 | bluetouch MACH_BLUETOUCH BLUETOUCH 1139 | 1150 | bluetouch MACH_BLUETOUCH BLUETOUCH 1139 |
1153 | vstms MACH_VSTMS VSTMS 1140 | 1151 | vstms MACH_VSTMS VSTMS 1140 |
1154 | xsbase270 MACH_XSBASE270 XSBASE270 1141 | 1152 | xsbase270 MACH_XSBASE270 XSBASE270 1141 |
@@ -1214,7 +1212,7 @@ osstbox MACH_OSSTBOX OSSTBOX 1203 | |||
1214 | kbat9261 MACH_KBAT9261 KBAT9261 1204 | 1212 | kbat9261 MACH_KBAT9261 KBAT9261 1204 |
1215 | ct1100 MACH_CT1100 CT1100 1205 | 1213 | ct1100 MACH_CT1100 CT1100 1205 |
1216 | akcppxa MACH_AKCPPXA AKCPPXA 1206 | 1214 | akcppxa MACH_AKCPPXA AKCPPXA 1206 |
1217 | zevio_1020 MACH_ZEVIO_1020 ZEVIO_1020 1207 | 1215 | ochaya1020 MACH_OCHAYA1020 OCHAYA1020 1207 |
1218 | hitrack MACH_HITRACK HITRACK 1208 | 1216 | hitrack MACH_HITRACK HITRACK 1208 |
1219 | syme1 MACH_SYME1 SYME1 1209 | 1217 | syme1 MACH_SYME1 SYME1 1209 |
1220 | syhl1 MACH_SYHL1 SYHL1 1210 | 1218 | syhl1 MACH_SYHL1 SYHL1 1210 |
@@ -1299,7 +1297,7 @@ xp179 MACH_XP179 XP179 1290 | |||
1299 | h4300 MACH_H4300 H4300 1291 | 1297 | h4300 MACH_H4300 H4300 1291 |
1300 | goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 | 1298 | goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292 |
1301 | mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293 | 1299 | mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293 |
1302 | adsbitsymx MACH_ADSBITSIMX ADSBITSIMX 1294 | 1300 | adsbitsyg5 MACH_ADSBITSYG5 ADSBITSYG5 1294 |
1303 | adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295 | 1301 | adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295 |
1304 | mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296 | 1302 | mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296 |
1305 | em_x270 MACH_EM_X270 EM_X270 1297 | 1303 | em_x270 MACH_EM_X270 EM_X270 1297 |
@@ -1367,3 +1365,249 @@ db88f5281 MACH_DB88F5281 DB88F5281 1358 | |||
1367 | csb726 MACH_CSB726 CSB726 1359 | 1365 | csb726 MACH_CSB726 CSB726 1359 |
1368 | tik27 MACH_TIK27 TIK27 1360 | 1366 | tik27 MACH_TIK27 TIK27 1360 |
1369 | mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361 | 1367 | mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361 |
1368 | rirm3 MACH_RIRM3 RIRM3 1362 | ||
1369 | pelco_odyssey MACH_PELCO_ODYSSEY PELCO_ODYSSEY 1363 | ||
1370 | adx_abox MACH_ADX_ABOX ADX_ABOX 1365 | ||
1371 | adx_tpid MACH_ADX_TPID ADX_TPID 1366 | ||
1372 | minicheck MACH_MINICHECK MINICHECK 1367 | ||
1373 | idam MACH_IDAM IDAM 1368 | ||
1374 | mario_mx MACH_MARIO_MX MARIO_MX 1369 | ||
1375 | vi1888 MACH_VI1888 VI1888 1370 | ||
1376 | zr4230 MACH_ZR4230 ZR4230 1371 | ||
1377 | t1_ix_blue MACH_T1_IX_BLUE T1_IX_BLUE 1372 | ||
1378 | syhq2 MACH_SYHQ2 SYHQ2 1373 | ||
1379 | computime_r3 MACH_COMPUTIME_R3 COMPUTIME_R3 1374 | ||
1380 | oratis MACH_ORATIS ORATIS 1375 | ||
1381 | mikko MACH_MIKKO MIKKO 1376 | ||
1382 | holon MACH_HOLON HOLON 1377 | ||
1383 | olip8 MACH_OLIP8 OLIP8 1378 | ||
1384 | ghi270hg MACH_GHI270HG GHI270HG 1379 | ||
1385 | davinci_dm6467_evm MACH_DAVINCI_DM6467_EVM DAVINCI_DM6467_EVM 1380 | ||
1386 | davinci_dm355_evm MACH_DAVINCI_DM350_EVM DAVINCI_DM350_EVM 1381 | ||
1387 | blackriver MACH_BLACKRIVER BLACKRIVER 1383 | ||
1388 | sandgate_wp MACH_SANDGATEWP SANDGATEWP 1384 | ||
1389 | cdotbwsg MACH_CDOTBWSG CDOTBWSG 1385 | ||
1390 | quark963 MACH_QUARK963 QUARK963 1386 | ||
1391 | csb735 MACH_CSB735 CSB735 1387 | ||
1392 | littleton MACH_LITTLETON LITTLETON 1388 | ||
1393 | mio_p550 MACH_MIO_P550 MIO_P550 1389 | ||
1394 | motion2440 MACH_MOTION2440 MOTION2440 1390 | ||
1395 | imm500 MACH_IMM500 IMM500 1391 | ||
1396 | homematic MACH_HOMEMATIC HOMEMATIC 1392 | ||
1397 | ermine MACH_ERMINE ERMINE 1393 | ||
1398 | kb9202b MACH_KB9202B KB9202B 1394 | ||
1399 | hs1xx MACH_HS1XX HS1XX 1395 | ||
1400 | studentmate2440 MACH_STUDENTMATE2440 STUDENTMATE2440 1396 | ||
1401 | arvoo_l1_z1 MACH_ARVOO_L1_Z1 ARVOO_L1_Z1 1397 | ||
1402 | dep2410k MACH_DEP2410K DEP2410K 1398 | ||
1403 | xxsvideo MACH_XXSVIDEO XXSVIDEO 1399 | ||
1404 | im4004 MACH_IM4004 IM4004 1400 | ||
1405 | ochaya1050 MACH_OCHAYA1050 OCHAYA1050 1401 | ||
1406 | lep9261 MACH_LEP9261 LEP9261 1402 | ||
1407 | svenmeb MACH_SVENMEB SVENMEB 1403 | ||
1408 | fortunet2ne MACH_FORTUNET2NE FORTUNET2NE 1404 | ||
1409 | nxhx MACH_NXHX NXHX 1406 | ||
1410 | realview_pb11mp MACH_REALVIEW_PB11MP REALVIEW_PB11MP 1407 | ||
1411 | ids500 MACH_IDS500 IDS500 1408 | ||
1412 | ors_n725 MACH_ORS_N725 ORS_N725 1409 | ||
1413 | hsdarm MACH_HSDARM HSDARM 1410 | ||
1414 | sha_pon003 MACH_SHA_PON003 SHA_PON003 1411 | ||
1415 | sha_pon004 MACH_SHA_PON004 SHA_PON004 1412 | ||
1416 | sha_pon007 MACH_SHA_PON007 SHA_PON007 1413 | ||
1417 | sha_pon011 MACH_SHA_PON011 SHA_PON011 1414 | ||
1418 | h6042 MACH_H6042 H6042 1415 | ||
1419 | h6043 MACH_H6043 H6043 1416 | ||
1420 | looxc550 MACH_LOOXC550 LOOXC550 1417 | ||
1421 | cnty_titan MACH_CNTY_TITAN CNTY_TITAN 1418 | ||
1422 | app3xx MACH_APP3XX APP3XX 1419 | ||
1423 | sideoatsgrama MACH_SIDEOATSGRAMA SIDEOATSGRAMA 1420 | ||
1424 | xscale_palmt700p MACH_XSCALE_PALMT700P XSCALE_PALMT700P 1421 | ||
1425 | xscale_palmt700w MACH_XSCALE_PALMT700W XSCALE_PALMT700W 1422 | ||
1426 | xscale_palmt750 MACH_XSCALE_PALMT750 XSCALE_PALMT750 1423 | ||
1427 | xscale_palmt755p MACH_XSCALE_PALMT755P XSCALE_PALMT755P 1424 | ||
1428 | ezreganut9200 MACH_EZREGANUT9200 EZREGANUT9200 1425 | ||
1429 | sarge MACH_SARGE SARGE 1426 | ||
1430 | a696 MACH_A696 A696 1427 | ||
1431 | turtle1916 MACH_TURTLE TURTLE 1428 | ||
1432 | mx27_3ds MACH_MX27_3DS MX27_3DS 1430 | ||
1433 | bishop MACH_BISHOP BISHOP 1431 | ||
1434 | pxx MACH_PXX PXX 1432 | ||
1435 | redwood MACH_REDWOOD REDWOOD 1433 | ||
1436 | omap_2430dlp MACH_OMAP_2430DLP OMAP_2430DLP 1436 | ||
1437 | omap_2430osk MACH_OMAP_2430OSK OMAP_2430OSK 1437 | ||
1438 | sardine MACH_SARDINE SARDINE 1438 | ||
1439 | halibut MACH_HALIBUT HALIBUT 1439 | ||
1440 | trout MACH_TROUT TROUT 1440 | ||
1441 | goldfish MACH_GOLDFISH GOLDFISH 1441 | ||
1442 | gesbc2440 MACH_GESBC2440 GESBC2440 1442 | ||
1443 | nomad MACH_NOMAD NOMAD 1443 | ||
1444 | rosalind MACH_ROSALIND ROSALIND 1444 | ||
1445 | cc9p9215 MACH_CC9P9215 CC9P9215 1445 | ||
1446 | cc9p9210 MACH_CC9P9210 CC9P9210 1446 | ||
1447 | cc9p9215js MACH_CC9P9215JS CC9P9215JS 1447 | ||
1448 | cc9p9210js MACH_CC9P9210JS CC9P9210JS 1448 | ||
1449 | nasffe MACH_NASFFE NASFFE 1449 | ||
1450 | tn2x0bd MACH_TN2X0BD TN2X0BD 1450 | ||
1451 | gwmpxa MACH_GWMPXA GWMPXA 1451 | ||
1452 | exyplus MACH_EXYPLUS EXYPLUS 1452 | ||
1453 | jadoo21 MACH_JADOO21 JADOO21 1453 | ||
1454 | looxn560 MACH_LOOXN560 LOOXN560 1454 | ||
1455 | bonsai MACH_BONSAI BONSAI 1455 | ||
1456 | adsmilgato MACH_ADSMILGATO ADSMILGATO 1456 | ||
1457 | gba MACH_GBA GBA 1457 | ||
1458 | h6044 MACH_H6044 H6044 1458 | ||
1459 | app MACH_APP APP 1459 | ||
1460 | tct_hammer MACH_TCT_HAMMER TCT_HAMMER 1460 | ||
1461 | herald MACH_HERMES HERMES 1461 | ||
1462 | artemis MACH_ARTEMIS ARTEMIS 1462 | ||
1463 | htctitan MACH_HTCTITAN HTCTITAN 1463 | ||
1464 | qranium MACH_QRANIUM QRANIUM 1464 | ||
1465 | adx_wsc2 MACH_ADX_WSC2 ADX_WSC2 1465 | ||
1466 | adx_medinet MACH_ADX_MEDINET ADX_MEDINET 1466 | ||
1467 | bboard MACH_BBOARD BBOARD 1467 | ||
1468 | cambria MACH_CAMBRIA CAMBRIA 1468 | ||
1469 | mt7xxx MACH_MT7XXX MT7XXX 1469 | ||
1470 | matrix512 MACH_MATRIX512 MATRIX512 1470 | ||
1471 | matrix522 MACH_MATRIX522 MATRIX522 1471 | ||
1472 | ipac5010 MACH_IPAC5010 IPAC5010 1472 | ||
1473 | sakura MACH_SAKURA SAKURA 1473 | ||
1474 | grocx MACH_GROCX GROCX 1474 | ||
1475 | pm9263 MACH_PM9263 PM9263 1475 | ||
1476 | sim_one MACH_SIM_ONE SIM_ONE 1476 | ||
1477 | acq132 MACH_ACQ132 ACQ132 1477 | ||
1478 | datr MACH_DATR DATR 1478 | ||
1479 | actux1 MACH_ACTUX1 ACTUX1 1479 | ||
1480 | actux2 MACH_ACTUX2 ACTUX2 1480 | ||
1481 | actux3 MACH_ACTUX3 ACTUX3 1481 | ||
1482 | flexit MACH_FLEXIT FLEXIT 1482 | ||
1483 | bh2x0bd MACH_BH2X0BD BH2X0BD 1483 | ||
1484 | atb2002 MACH_ATB2002 ATB2002 1484 | ||
1485 | xenon MACH_XENON XENON 1485 | ||
1486 | fm607 MACH_FM607 FM607 1486 | ||
1487 | matrix514 MACH_MATRIX514 MATRIX514 1487 | ||
1488 | matrix524 MACH_MATRIX524 MATRIX524 1488 | ||
1489 | inpod MACH_INPOD INPOD 1489 | ||
1490 | jive MACH_JIVE JIVE 1490 | ||
1491 | tll_mx21 MACH_TLL_MX21 TLL_MX21 1491 | ||
1492 | sbc2800 MACH_SBC2800 SBC2800 1492 | ||
1493 | cc7ucamry MACH_CC7UCAMRY CC7UCAMRY 1493 | ||
1494 | ubisys_p9_sc15 MACH_UBISYS_P9_SC15 UBISYS_P9_SC15 1494 | ||
1495 | ubisys_p9_ssc2d10 MACH_UBISYS_P9_SSC2D10 UBISYS_P9_SSC2D10 1495 | ||
1496 | ubisys_p9_rcu3 MACH_UBISYS_P9_RCU3 UBISYS_P9_RCU3 1496 | ||
1497 | aml_m8000 MACH_AML_M8000 AML_M8000 1497 | ||
1498 | snapper_270 MACH_SNAPPER_270 SNAPPER_270 1498 | ||
1499 | omap_bbx MACH_OMAP_BBX OMAP_BBX 1499 | ||
1500 | ucn2410 MACH_UCN2410 UCN2410 1500 | ||
1501 | sam9_l9260 MACH_SAM9_L9260 SAM9_L9260 1501 | ||
1502 | eti_c2 MACH_ETI_C2 ETI_C2 1502 | ||
1503 | avalanche MACH_AVALANCHE AVALANCHE 1503 | ||
1504 | realview_pb1176 MACH_REALVIEW_PB1176 REALVIEW_PB1176 1504 | ||
1505 | dp1500 MACH_DP1500 DP1500 1505 | ||
1506 | apple_iphone MACH_APPLE_IPHONE APPLE_IPHONE 1506 | ||
1507 | yl9200 MACH_YL9200 YL9200 1507 | ||
1508 | rd88f5182 MACH_RD88F5182 RD88F5182 1508 | ||
1509 | kurobox_pro MACH_KUROBOX_PRO KUROBOX_PRO 1509 | ||
1510 | se_poet MACH_SE_POET SE_POET 1510 | ||
1511 | mx31_3ds MACH_MX31_3DS MX31_3DS 1511 | ||
1512 | r270 MACH_R270 R270 1512 | ||
1513 | armour21 MACH_ARMOUR21 ARMOUR21 1513 | ||
1514 | dt2 MACH_DT2 DT2 1514 | ||
1515 | vt4 MACH_VT4 VT4 1515 | ||
1516 | tyco320 MACH_TYCO320 TYCO320 1516 | ||
1517 | adma MACH_ADMA ADMA 1517 | ||
1518 | wp188 MACH_WP188 WP188 1518 | ||
1519 | corsica MACH_CORSICA CORSICA 1519 | ||
1520 | bigeye MACH_BIGEYE BIGEYE 1520 | ||
1521 | tll5000 MACH_TLL5000 TLL5000 1522 | ||
1522 | hni270 MACH_HNI_X270 HNI_X270 1523 | ||
1523 | qong MACH_QONG QONG 1524 | ||
1524 | tcompact MACH_TCOMPACT TCOMPACT 1525 | ||
1525 | puma5 MACH_PUMA5 PUMA5 1526 | ||
1526 | elara MACH_ELARA ELARA 1527 | ||
1527 | ellington MACH_ELLINGTON ELLINGTON 1528 | ||
1528 | xda_atom MACH_XDA_ATOM XDA_ATOM 1529 | ||
1529 | energizer2 MACH_ENERGIZER2 ENERGIZER2 1530 | ||
1530 | odin MACH_ODIN ODIN 1531 | ||
1531 | actux4 MACH_ACTUX4 ACTUX4 1532 | ||
1532 | esl_omap MACH_ESL_OMAP ESL_OMAP 1533 | ||
1533 | omap2evm MACH_OMAP2EVM OMAP2EVM 1534 | ||
1534 | omap3evm MACH_OMAP3EVM OMAP3EVM 1535 | ||
1535 | adx_pcu57 MACH_ADX_PCU57 ADX_PCU57 1536 | ||
1536 | monaco MACH_MONACO MONACO 1537 | ||
1537 | levante MACH_LEVANTE LEVANTE 1538 | ||
1538 | tmxipx425 MACH_TMXIPX425 TMXIPX425 1539 | ||
1539 | leep MACH_LEEP LEEP 1540 | ||
1540 | raad MACH_RAAD RAAD 1541 | ||
1541 | dns323 MACH_DNS323 DNS323 1542 | ||
1542 | ap1000 MACH_AP1000 AP1000 1543 | ||
1543 | a9sam6432 MACH_A9SAM6432 A9SAM6432 1544 | ||
1544 | shiny MACH_SHINY SHINY 1545 | ||
1545 | omap3_beagle MACH_OMAP3_BEAGLE OMAP3_BEAGLE 1546 | ||
1546 | csr_bdb2 MACH_CSR_BDB2 CSR_BDB2 1547 | ||
1547 | nokia_n810 MACH_NOKIA_N810 NOKIA_N810 1548 | ||
1548 | c270 MACH_C270 C270 1549 | ||
1549 | sentry MACH_SENTRY SENTRY 1550 | ||
1550 | pcm038 MACH_PCM038 PCM038 1551 | ||
1551 | anc300 MACH_ANC300 ANC300 1552 | ||
1552 | htckaiser MACH_HTCKAISER HTCKAISER 1553 | ||
1553 | sbat100 MACH_SBAT100 SBAT100 1554 | ||
1554 | modunorm MACH_MODUNORM MODUNORM 1555 | ||
1555 | pelos_twarm MACH_PELOS_TWARM PELOS_TWARM 1556 | ||
1556 | flank MACH_FLANK FLANK 1557 | ||
1557 | sirloin MACH_SIRLOIN SIRLOIN 1558 | ||
1558 | brisket MACH_BRISKET BRISKET 1559 | ||
1559 | chuck MACH_CHUCK CHUCK 1560 | ||
1560 | otter MACH_OTTER OTTER 1561 | ||
1561 | davinci_ldk MACH_DAVINCI_LDK DAVINCI_LDK 1562 | ||
1562 | phreedom MACH_PHREEDOM PHREEDOM 1563 | ||
1563 | sg310 MACH_SG310 SG310 1564 | ||
1564 | ts_x09 MACH_TS209 TS209 1565 | ||
1565 | at91cap9adk MACH_AT91CAP9ADK AT91CAP9ADK 1566 | ||
1566 | tion9315 MACH_TION9315 TION9315 1567 | ||
1567 | mast MACH_MAST MAST 1568 | ||
1568 | pfw MACH_PFW PFW 1569 | ||
1569 | yl_p2440 MACH_YL_P2440 YL_P2440 1570 | ||
1570 | zsbc32 MACH_ZSBC32 ZSBC32 1571 | ||
1571 | omap_pace2 MACH_OMAP_PACE2 OMAP_PACE2 1572 | ||
1572 | imx_pace2 MACH_IMX_PACE2 IMX_PACE2 1573 | ||
1573 | mx31moboard MACH_MX31MOBOARD MX31MOBOARD 1574 | ||
1574 | mx37_3ds MACH_MX37_3DS MX37_3DS 1575 | ||
1575 | rcc MACH_RCC RCC 1576 | ||
1576 | dmp MACH_ARM9 ARM9 1577 | ||
1577 | vision_ep9307 MACH_VISION_EP9307 VISION_EP9307 1578 | ||
1578 | scly1000 MACH_SCLY1000 SCLY1000 1579 | ||
1579 | fontel_ep MACH_FONTEL_EP FONTEL_EP 1580 | ||
1580 | voiceblue3g MACH_VOICEBLUE3G VOICEBLUE3G 1581 | ||
1581 | tt9200 MACH_TT9200 TT9200 1582 | ||
1582 | digi2410 MACH_DIGI2410 DIGI2410 1583 | ||
1583 | terastation_pro2 MACH_TERASTATION_PRO2 TERASTATION_PRO2 1584 | ||
1584 | linkstation_pro MACH_LINKSTATION_PRO LINKSTATION_PRO 1585 | ||
1585 | motorola_a780 MACH_MOTOROLA_A780 MOTOROLA_A780 1587 | ||
1586 | motorola_e6 MACH_MOTOROLA_E6 MOTOROLA_E6 1588 | ||
1587 | motorola_e2 MACH_MOTOROLA_E2 MOTOROLA_E2 1589 | ||
1588 | motorola_e680 MACH_MOTOROLA_E680 MOTOROLA_E680 1590 | ||
1589 | ur2410 MACH_UR2410 UR2410 1591 | ||
1590 | tas9261 MACH_TAS9261 TAS9261 1592 | ||
1591 | davinci_hermes_hd MACH_HERMES_HD HERMES_HD 1593 | ||
1592 | davinci_perseo_hd MACH_PERSEO_HD PERSEO_HD 1594 | ||
1593 | stargazer2 MACH_STARGAZER2 STARGAZER2 1595 | ||
1594 | e350 MACH_E350 E350 1596 | ||
1595 | wpcm450 MACH_WPCM450 WPCM450 1597 | ||
1596 | cartesio MACH_CARTESIO CARTESIO 1598 | ||
1597 | toybox MACH_TOYBOX TOYBOX 1599 | ||
1598 | tx27 MACH_TX27 TX27 1600 | ||
1599 | ts409 MACH_TS409 TS409 1601 | ||
1600 | p300 MACH_P300 P300 1602 | ||
1601 | xdacomet MACH_XDACOMET XDACOMET 1603 | ||
1602 | dexflex2 MACH_DEXFLEX2 DEXFLEX2 1604 | ||
1603 | ow MACH_OW OW 1605 | ||
1604 | armebs3 MACH_ARMEBS3 ARMEBS3 1606 | ||
1605 | u3 MACH_U3 U3 1607 | ||
1606 | smdk2450 MACH_SMDK2450 SMDK2450 1608 | ||
1607 | rsi_ews MACH_RSI_EWS RSI_EWS 1609 | ||
1608 | tnb MACH_TNB TNB 1610 | ||
1609 | toepath MACH_TOEPATH TOEPATH 1611 | ||
1610 | kb9263 MACH_KB9263 KB9263 1612 | ||
1611 | mt7108 MACH_MT7108 MT7108 1613 | ||
1612 | smtr2440 MACH_SMTR2440 SMTR2440 1614 | ||
1613 | manao MACH_MANAO MANAO 1615 | ||
diff --git a/arch/arm/vfp/vfp.h b/arch/arm/vfp/vfp.h index 791d0238c68f..c85860bad585 100644 --- a/arch/arm/vfp/vfp.h +++ b/arch/arm/vfp/vfp.h | |||
@@ -265,7 +265,11 @@ struct vfp_double { | |||
265 | * which returns (double)0.0. This is useful for the compare with | 265 | * which returns (double)0.0. This is useful for the compare with |
266 | * zero instructions. | 266 | * zero instructions. |
267 | */ | 267 | */ |
268 | #ifdef CONFIG_VFPv3 | ||
269 | #define VFP_REG_ZERO 32 | ||
270 | #else | ||
268 | #define VFP_REG_ZERO 16 | 271 | #define VFP_REG_ZERO 16 |
272 | #endif | ||
269 | extern u64 vfp_get_double(unsigned int reg); | 273 | extern u64 vfp_get_double(unsigned int reg); |
270 | extern void vfp_put_double(u64 val, unsigned int reg); | 274 | extern void vfp_put_double(u64 val, unsigned int reg); |
271 | 275 | ||
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S index 0ac022f800a1..353f9e5c7919 100644 --- a/arch/arm/vfp/vfphw.S +++ b/arch/arm/vfp/vfphw.S | |||
@@ -99,12 +99,12 @@ vfp_support_entry: | |||
99 | DBGSTR1 "save old state %p", r4 | 99 | DBGSTR1 "save old state %p", r4 |
100 | cmp r4, #0 | 100 | cmp r4, #0 |
101 | beq no_old_VFP_process | 101 | beq no_old_VFP_process |
102 | VFPFSTMIA r4, r5 @ save the working registers | ||
102 | VFPFMRX r5, FPSCR @ current status | 103 | VFPFMRX r5, FPSCR @ current status |
103 | VFPFMRX r6, FPINST @ FPINST (always there, rev0 onwards) | 104 | tst r1, #FPEXC_EX @ is there additional state to save? |
104 | tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? | 105 | VFPFMRX r6, FPINST, NE @ FPINST (only if FPEXC.EX is set) |
105 | VFPFMRX r8, FPINST2, NE @ FPINST2 if needed - avoids reading | 106 | tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? |
106 | @ nonexistant reg on rev0 | 107 | VFPFMRX r8, FPINST2, NE @ FPINST2 if needed (and present) |
107 | VFPFSTMIA r4 @ save the working registers | ||
108 | stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 | 108 | stmia r4, {r1, r5, r6, r8} @ save FPEXC, FPSCR, FPINST, FPINST2 |
109 | @ and point r4 at the word at the | 109 | @ and point r4 at the word at the |
110 | @ start of the register dump | 110 | @ start of the register dump |
@@ -114,13 +114,13 @@ no_old_VFP_process: | |||
114 | DBGSTR1 "load state %p", r10 | 114 | DBGSTR1 "load state %p", r10 |
115 | str r10, [r3, r11, lsl #2] @ update the last_VFP_context pointer | 115 | str r10, [r3, r11, lsl #2] @ update the last_VFP_context pointer |
116 | @ Load the saved state back into the VFP | 116 | @ Load the saved state back into the VFP |
117 | VFPFLDMIA r10 @ reload the working registers while | 117 | VFPFLDMIA r10, r5 @ reload the working registers while |
118 | @ FPEXC is in a safe state | 118 | @ FPEXC is in a safe state |
119 | ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 | 119 | ldmia r10, {r1, r5, r6, r8} @ load FPEXC, FPSCR, FPINST, FPINST2 |
120 | tst r1, #FPEXC_FPV2 @ is there an FPINST2 to write? | 120 | tst r1, #FPEXC_EX @ is there additional state to restore? |
121 | VFPFMXR FPINST2, r8, NE @ FPINST2 if needed - avoids writing | 121 | VFPFMXR FPINST, r6, NE @ restore FPINST (only if FPEXC.EX is set) |
122 | @ nonexistant reg on rev0 | 122 | tstne r1, #FPEXC_FP2V @ is there an FPINST2 to write? |
123 | VFPFMXR FPINST, r6 | 123 | VFPFMXR FPINST2, r8, NE @ FPINST2 if needed (and present) |
124 | VFPFMXR FPSCR, r5 @ restore status | 124 | VFPFMXR FPSCR, r5 @ restore status |
125 | 125 | ||
126 | check_for_exception: | 126 | check_for_exception: |
@@ -136,10 +136,14 @@ check_for_exception: | |||
136 | 136 | ||
137 | 137 | ||
138 | look_for_VFP_exceptions: | 138 | look_for_VFP_exceptions: |
139 | tst r1, #FPEXC_EX | 139 | @ Check for synchronous or asynchronous exception |
140 | tst r1, #FPEXC_EX | FPEXC_DEX | ||
140 | bne process_exception | 141 | bne process_exception |
142 | @ On some implementations of the VFP subarch 1, setting FPSCR.IXE | ||
143 | @ causes all the CDP instructions to be bounced synchronously without | ||
144 | @ setting the FPEXC.EX bit | ||
141 | VFPFMRX r5, FPSCR | 145 | VFPFMRX r5, FPSCR |
142 | tst r5, #FPSCR_IXE @ IXE doesn't set FPEXC_EX ! | 146 | tst r5, #FPSCR_IXE |
143 | bne process_exception | 147 | bne process_exception |
144 | 148 | ||
145 | @ Fall into hand on to next handler - appropriate coproc instr | 149 | @ Fall into hand on to next handler - appropriate coproc instr |
@@ -150,10 +154,6 @@ look_for_VFP_exceptions: | |||
150 | 154 | ||
151 | process_exception: | 155 | process_exception: |
152 | DBGSTR "bounce" | 156 | DBGSTR "bounce" |
153 | sub r2, r2, #4 | ||
154 | str r2, [sp, #S_PC] @ retry the instruction on exit from | ||
155 | @ the imprecise exception handling in | ||
156 | @ the support code | ||
157 | mov r2, sp @ nothing stacked - regdump is at TOS | 157 | mov r2, sp @ nothing stacked - regdump is at TOS |
158 | mov lr, r9 @ setup for a return to the user code. | 158 | mov lr, r9 @ setup for a return to the user code. |
159 | 159 | ||
@@ -161,7 +161,7 @@ process_exception: | |||
161 | @ r0 holds the trigger instruction | 161 | @ r0 holds the trigger instruction |
162 | @ r1 holds the FPEXC value | 162 | @ r1 holds the FPEXC value |
163 | @ r2 pointer to register dump | 163 | @ r2 pointer to register dump |
164 | b VFP9_bounce @ we have handled this - the support | 164 | b VFP_bounce @ we have handled this - the support |
165 | @ code will raise an exception if | 165 | @ code will raise an exception if |
166 | @ required. If not, the user code will | 166 | @ required. If not, the user code will |
167 | @ retry the faulted instruction | 167 | @ retry the faulted instruction |
@@ -174,12 +174,12 @@ vfp_save_state: | |||
174 | @ r0 - save location | 174 | @ r0 - save location |
175 | @ r1 - FPEXC | 175 | @ r1 - FPEXC |
176 | DBGSTR1 "save VFP state %p", r0 | 176 | DBGSTR1 "save VFP state %p", r0 |
177 | VFPFSTMIA r0, r2 @ save the working registers | ||
177 | VFPFMRX r2, FPSCR @ current status | 178 | VFPFMRX r2, FPSCR @ current status |
178 | VFPFMRX r3, FPINST @ FPINST (always there, rev0 onwards) | 179 | tst r1, #FPEXC_EX @ is there additional state to save? |
179 | tst r1, #FPEXC_FPV2 @ is there an FPINST2 to read? | 180 | VFPFMRX r3, FPINST, NE @ FPINST (only if FPEXC.EX is set) |
180 | VFPFMRX r12, FPINST2, NE @ FPINST2 if needed - avoids reading | 181 | tstne r1, #FPEXC_FP2V @ is there an FPINST2 to read? |
181 | @ nonexistant reg on rev0 | 182 | VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) |
182 | VFPFSTMIA r0 @ save the working registers | ||
183 | stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 | 183 | stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 |
184 | mov pc, lr | 184 | mov pc, lr |
185 | #endif | 185 | #endif |
@@ -217,8 +217,15 @@ vfp_get_double: | |||
217 | fmrrd r0, r1, d\dr | 217 | fmrrd r0, r1, d\dr |
218 | mov pc, lr | 218 | mov pc, lr |
219 | .endr | 219 | .endr |
220 | #ifdef CONFIG_VFPv3 | ||
221 | @ d16 - d31 registers | ||
222 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | ||
223 | mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr | ||
224 | mov pc, lr | ||
225 | .endr | ||
226 | #endif | ||
220 | 227 | ||
221 | @ virtual register 16 for compare with zero | 228 | @ virtual register 16 (or 32 if VFPv3) for compare with zero |
222 | mov r0, #0 | 229 | mov r0, #0 |
223 | mov r1, #0 | 230 | mov r1, #0 |
224 | mov pc, lr | 231 | mov pc, lr |
@@ -231,3 +238,10 @@ vfp_put_double: | |||
231 | fmdrr d\dr, r0, r1 | 238 | fmdrr d\dr, r0, r1 |
232 | mov pc, lr | 239 | mov pc, lr |
233 | .endr | 240 | .endr |
241 | #ifdef CONFIG_VFPv3 | ||
242 | @ d16 - d31 registers | ||
243 | .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 | ||
244 | mcrr p11, 3, r1, r2, c\dr @ fmdrr r1, r2, d\dr | ||
245 | mov pc, lr | ||
246 | .endr | ||
247 | #endif | ||
diff --git a/arch/arm/vfp/vfpinstr.h b/arch/arm/vfp/vfpinstr.h index 7f343a4beca0..15b95b5ab97e 100644 --- a/arch/arm/vfp/vfpinstr.h +++ b/arch/arm/vfp/vfpinstr.h | |||
@@ -52,11 +52,11 @@ | |||
52 | #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) | 52 | #define FEXT_TO_IDX(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) |
53 | 53 | ||
54 | #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) | 54 | #define vfp_get_sd(inst) ((inst & 0x0000f000) >> 11 | (inst & (1 << 22)) >> 22) |
55 | #define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12) | 55 | #define vfp_get_dd(inst) ((inst & 0x0000f000) >> 12 | (inst & (1 << 22)) >> 18) |
56 | #define vfp_get_sm(inst) ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5) | 56 | #define vfp_get_sm(inst) ((inst & 0x0000000f) << 1 | (inst & (1 << 5)) >> 5) |
57 | #define vfp_get_dm(inst) ((inst & 0x0000000f)) | 57 | #define vfp_get_dm(inst) ((inst & 0x0000000f) | (inst & (1 << 5)) >> 1) |
58 | #define vfp_get_sn(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) | 58 | #define vfp_get_sn(inst) ((inst & 0x000f0000) >> 15 | (inst & (1 << 7)) >> 7) |
59 | #define vfp_get_dn(inst) ((inst & 0x000f0000) >> 16) | 59 | #define vfp_get_dn(inst) ((inst & 0x000f0000) >> 16 | (inst & (1 << 7)) >> 3) |
60 | 60 | ||
61 | #define vfp_single(inst) (((inst) & 0x0000f00) == 0xa00) | 61 | #define vfp_single(inst) (((inst) & 0x0000f00) == 0xa00) |
62 | 62 | ||
diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index b4e210df92f2..32455c633f1c 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c | |||
@@ -125,13 +125,13 @@ void vfp_raise_sigfpe(unsigned int sicode, struct pt_regs *regs) | |||
125 | send_sig_info(SIGFPE, &info, current); | 125 | send_sig_info(SIGFPE, &info, current); |
126 | } | 126 | } |
127 | 127 | ||
128 | static void vfp_panic(char *reason) | 128 | static void vfp_panic(char *reason, u32 inst) |
129 | { | 129 | { |
130 | int i; | 130 | int i; |
131 | 131 | ||
132 | printk(KERN_ERR "VFP: Error: %s\n", reason); | 132 | printk(KERN_ERR "VFP: Error: %s\n", reason); |
133 | printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", | 133 | printk(KERN_ERR "VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n", |
134 | fmrx(FPEXC), fmrx(FPSCR), fmrx(FPINST)); | 134 | fmrx(FPEXC), fmrx(FPSCR), inst); |
135 | for (i = 0; i < 32; i += 2) | 135 | for (i = 0; i < 32; i += 2) |
136 | printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n", | 136 | printk(KERN_ERR "VFP: s%2u: 0x%08x s%2u: 0x%08x\n", |
137 | i, vfp_get_float(i), i+1, vfp_get_float(i+1)); | 137 | i, vfp_get_float(i), i+1, vfp_get_float(i+1)); |
@@ -147,19 +147,16 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_ | |||
147 | pr_debug("VFP: raising exceptions %08x\n", exceptions); | 147 | pr_debug("VFP: raising exceptions %08x\n", exceptions); |
148 | 148 | ||
149 | if (exceptions == VFP_EXCEPTION_ERROR) { | 149 | if (exceptions == VFP_EXCEPTION_ERROR) { |
150 | vfp_panic("unhandled bounce"); | 150 | vfp_panic("unhandled bounce", inst); |
151 | vfp_raise_sigfpe(0, regs); | 151 | vfp_raise_sigfpe(0, regs); |
152 | return; | 152 | return; |
153 | } | 153 | } |
154 | 154 | ||
155 | /* | 155 | /* |
156 | * If any of the status flags are set, update the FPSCR. | 156 | * Update the FPSCR with the additional exception flags. |
157 | * Comparison instructions always return at least one of | 157 | * Comparison instructions always return at least one of |
158 | * these flags set. | 158 | * these flags set. |
159 | */ | 159 | */ |
160 | if (exceptions & (FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V)) | ||
161 | fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); | ||
162 | |||
163 | fpscr |= exceptions; | 160 | fpscr |= exceptions; |
164 | 161 | ||
165 | fmxr(FPSCR, fpscr); | 162 | fmxr(FPSCR, fpscr); |
@@ -220,35 +217,64 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) | |||
220 | /* | 217 | /* |
221 | * Package up a bounce condition. | 218 | * Package up a bounce condition. |
222 | */ | 219 | */ |
223 | void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) | 220 | void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) |
224 | { | 221 | { |
225 | u32 fpscr, orig_fpscr, exceptions, inst; | 222 | u32 fpscr, orig_fpscr, fpsid, exceptions; |
226 | 223 | ||
227 | pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); | 224 | pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc); |
228 | 225 | ||
229 | /* | 226 | /* |
230 | * Enable access to the VFP so we can handle the bounce. | 227 | * At this point, FPEXC can have the following configuration: |
228 | * | ||
229 | * EX DEX IXE | ||
230 | * 0 1 x - synchronous exception | ||
231 | * 1 x 0 - asynchronous exception | ||
232 | * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later | ||
233 | * 0 0 1 - synchronous on VFP9 (non-standard subarch 1 | ||
234 | * implementation), undefined otherwise | ||
235 | * | ||
236 | * Clear various bits and enable access to the VFP so we can | ||
237 | * handle the bounce. | ||
231 | */ | 238 | */ |
232 | fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_FPV2|FPEXC_INV|FPEXC_UFC|FPEXC_OFC|FPEXC_IOC)); | 239 | fmxr(FPEXC, fpexc & ~(FPEXC_EX|FPEXC_DEX|FPEXC_FP2V|FPEXC_VV|FPEXC_TRAP_MASK)); |
233 | 240 | ||
241 | fpsid = fmrx(FPSID); | ||
234 | orig_fpscr = fpscr = fmrx(FPSCR); | 242 | orig_fpscr = fpscr = fmrx(FPSCR); |
235 | 243 | ||
236 | /* | 244 | /* |
237 | * If we are running with inexact exceptions enabled, we need to | 245 | * Check for the special VFP subarch 1 and FPSCR.IXE bit case |
238 | * emulate the trigger instruction. Note that as we're emulating | ||
239 | * the trigger instruction, we need to increment PC. | ||
240 | */ | 246 | */ |
241 | if (fpscr & FPSCR_IXE) { | 247 | if ((fpsid & FPSID_ARCH_MASK) == (1 << FPSID_ARCH_BIT) |
242 | regs->ARM_pc += 4; | 248 | && (fpscr & FPSCR_IXE)) { |
249 | /* | ||
250 | * Synchronous exception, emulate the trigger instruction | ||
251 | */ | ||
243 | goto emulate; | 252 | goto emulate; |
244 | } | 253 | } |
245 | 254 | ||
246 | barrier(); | 255 | if (fpexc & FPEXC_EX) { |
256 | /* | ||
257 | * Asynchronous exception. The instruction is read from FPINST | ||
258 | * and the interrupted instruction has to be restarted. | ||
259 | */ | ||
260 | trigger = fmrx(FPINST); | ||
261 | regs->ARM_pc -= 4; | ||
262 | } else if (!(fpexc & FPEXC_DEX)) { | ||
263 | /* | ||
264 | * Illegal combination of bits. It can be caused by an | ||
265 | * unallocated VFP instruction but with FPSCR.IXE set and not | ||
266 | * on VFP subarch 1. | ||
267 | */ | ||
268 | vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs); | ||
269 | return; | ||
270 | } | ||
247 | 271 | ||
248 | /* | 272 | /* |
249 | * Modify fpscr to indicate the number of iterations remaining | 273 | * Modify fpscr to indicate the number of iterations remaining. |
274 | * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates | ||
275 | * whether FPEXC.VECITR or FPSCR.LEN is used. | ||
250 | */ | 276 | */ |
251 | if (fpexc & FPEXC_EX) { | 277 | if (fpexc & (FPEXC_EX | FPEXC_VV)) { |
252 | u32 len; | 278 | u32 len; |
253 | 279 | ||
254 | len = fpexc + (1 << FPEXC_LENGTH_BIT); | 280 | len = fpexc + (1 << FPEXC_LENGTH_BIT); |
@@ -262,15 +288,15 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) | |||
262 | * FPEXC bounce reason, but this appears to be unreliable. | 288 | * FPEXC bounce reason, but this appears to be unreliable. |
263 | * Emulate the bounced instruction instead. | 289 | * Emulate the bounced instruction instead. |
264 | */ | 290 | */ |
265 | inst = fmrx(FPINST); | 291 | exceptions = vfp_emulate_instruction(trigger, fpscr, regs); |
266 | exceptions = vfp_emulate_instruction(inst, fpscr, regs); | ||
267 | if (exceptions) | 292 | if (exceptions) |
268 | vfp_raise_exceptions(exceptions, inst, orig_fpscr, regs); | 293 | vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); |
269 | 294 | ||
270 | /* | 295 | /* |
271 | * If there isn't a second FP instruction, exit now. | 296 | * If there isn't a second FP instruction, exit now. Note that |
297 | * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1. | ||
272 | */ | 298 | */ |
273 | if (!(fpexc & FPEXC_FPV2)) | 299 | if (fpexc ^ (FPEXC_EX | FPEXC_FP2V)) |
274 | return; | 300 | return; |
275 | 301 | ||
276 | /* | 302 | /* |
@@ -279,10 +305,9 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) | |||
279 | */ | 305 | */ |
280 | barrier(); | 306 | barrier(); |
281 | trigger = fmrx(FPINST2); | 307 | trigger = fmrx(FPINST2); |
282 | orig_fpscr = fpscr = fmrx(FPSCR); | ||
283 | 308 | ||
284 | emulate: | 309 | emulate: |
285 | exceptions = vfp_emulate_instruction(trigger, fpscr, regs); | 310 | exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs); |
286 | if (exceptions) | 311 | if (exceptions) |
287 | vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); | 312 | vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); |
288 | } | 313 | } |
@@ -306,16 +331,9 @@ static int __init vfp_init(void) | |||
306 | { | 331 | { |
307 | unsigned int vfpsid; | 332 | unsigned int vfpsid; |
308 | unsigned int cpu_arch = cpu_architecture(); | 333 | unsigned int cpu_arch = cpu_architecture(); |
309 | u32 access = 0; | ||
310 | 334 | ||
311 | if (cpu_arch >= CPU_ARCH_ARMv6) { | 335 | if (cpu_arch >= CPU_ARCH_ARMv6) |
312 | access = get_copro_access(); | 336 | vfp_enable(NULL); |
313 | |||
314 | /* | ||
315 | * Enable full access to VFP (cp10 and cp11) | ||
316 | */ | ||
317 | set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); | ||
318 | } | ||
319 | 337 | ||
320 | /* | 338 | /* |
321 | * First check that there is a VFP that we can use. | 339 | * First check that there is a VFP that we can use. |
@@ -329,15 +347,9 @@ static int __init vfp_init(void) | |||
329 | vfp_vector = vfp_null_entry; | 347 | vfp_vector = vfp_null_entry; |
330 | 348 | ||
331 | printk(KERN_INFO "VFP support v0.3: "); | 349 | printk(KERN_INFO "VFP support v0.3: "); |
332 | if (VFP_arch) { | 350 | if (VFP_arch) |
333 | printk("not present\n"); | 351 | printk("not present\n"); |
334 | 352 | else if (vfpsid & FPSID_NODOUBLE) { | |
335 | /* | ||
336 | * Restore the copro access register. | ||
337 | */ | ||
338 | if (cpu_arch >= CPU_ARCH_ARMv6) | ||
339 | set_copro_access(access); | ||
340 | } else if (vfpsid & FPSID_NODOUBLE) { | ||
341 | printk("no double precision support\n"); | 353 | printk("no double precision support\n"); |
342 | } else { | 354 | } else { |
343 | smp_call_function(vfp_enable, NULL, 1, 1); | 355 | smp_call_function(vfp_enable, NULL, 1, 1); |
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index 548a32082e4a..4316f5a48a0f 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c | |||
@@ -361,12 +361,6 @@ static int __init mv64x60_i2c_device_setup(struct device_node *np, int id) | |||
361 | else | 361 | else |
362 | pdata.timeout = 1000; /* 1 second */ | 362 | pdata.timeout = 1000; /* 1 second */ |
363 | 363 | ||
364 | prop = of_get_property(np, "retries", NULL); | ||
365 | if (prop) | ||
366 | pdata.retries = *prop; | ||
367 | else | ||
368 | pdata.retries = 1; | ||
369 | |||
370 | pdev = platform_device_alloc(MV64XXX_I2C_CTLR_NAME, id); | 364 | pdev = platform_device_alloc(MV64XXX_I2C_CTLR_NAME, id); |
371 | if (!pdev) | 365 | if (!pdev) |
372 | return -ENOMEM; | 366 | return -ENOMEM; |
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c index 2744b8a6f66a..90fe904d3614 100644 --- a/arch/ppc/syslib/mv64x60.c +++ b/arch/ppc/syslib/mv64x60.c | |||
@@ -411,7 +411,6 @@ static struct mv64xxx_i2c_pdata mv64xxx_i2c_pdata = { | |||
411 | .freq_m = 8, | 411 | .freq_m = 8, |
412 | .freq_n = 3, | 412 | .freq_n = 3, |
413 | .timeout = 1000, /* Default timeout of 1 second */ | 413 | .timeout = 1000, /* Default timeout of 1 second */ |
414 | .retries = 1, | ||
415 | }; | 414 | }; |
416 | 415 | ||
417 | static struct resource mv64xxx_i2c_resources[] = { | 416 | static struct resource mv64xxx_i2c_resources[] = { |