diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-01-16 10:07:08 -0500 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-04-29 13:04:15 -0400 |
| commit | ba02a21544b41a65e58506f1d79353203d94b8b6 (patch) | |
| tree | 7dcd84b616003e7a3fb56fc23cc18dee0211b953 /arch | |
| parent | a285edcf18b8838814d645c7e411a337a825236e (diff) | |
ARM: Improve documentation in arm_timer.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/include/asm/hardware/arm_timer.h | 39 |
1 files changed, 24 insertions, 15 deletions
diff --git a/arch/arm/include/asm/hardware/arm_timer.h b/arch/arm/include/asm/hardware/arm_timer.h index 04be3bdf46b8..c0f4e7bf22de 100644 --- a/arch/arm/include/asm/hardware/arm_timer.h +++ b/arch/arm/include/asm/hardware/arm_timer.h | |||
| @@ -1,21 +1,30 @@ | |||
| 1 | #ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H | 1 | #ifndef __ASM_ARM_HARDWARE_ARM_TIMER_H |
| 2 | #define __ASM_ARM_HARDWARE_ARM_TIMER_H | 2 | #define __ASM_ARM_HARDWARE_ARM_TIMER_H |
| 3 | 3 | ||
| 4 | #define TIMER_LOAD 0x00 | 4 | /* |
| 5 | #define TIMER_VALUE 0x04 | 5 | * ARM timer implementation, found in Integrator, Versatile and Realview |
| 6 | #define TIMER_CTRL 0x08 | 6 | * platforms. Not all platforms support all registers and bits in these |
| 7 | #define TIMER_CTRL_ONESHOT (1 << 0) | 7 | * registers, so we mark them with A for Integrator AP, C for Integrator |
| 8 | #define TIMER_CTRL_32BIT (1 << 1) | 8 | * CP, V for Versatile and R for Realview. |
| 9 | #define TIMER_CTRL_DIV1 (0 << 2) | 9 | * |
| 10 | #define TIMER_CTRL_DIV16 (1 << 2) | 10 | * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview |
| 11 | #define TIMER_CTRL_DIV256 (2 << 2) | 11 | * can have 16-bit or 32-bit selectable via a bit in the control register. |
| 12 | #define TIMER_CTRL_IE (1 << 5) /* Interrupt Enable (versatile only) */ | 12 | */ |
| 13 | #define TIMER_CTRL_PERIODIC (1 << 6) | 13 | #define TIMER_LOAD 0x00 /* ACVR rw */ |
| 14 | #define TIMER_CTRL_ENABLE (1 << 7) | 14 | #define TIMER_VALUE 0x04 /* ACVR ro */ |
| 15 | #define TIMER_CTRL 0x08 /* ACVR rw */ | ||
| 16 | #define TIMER_CTRL_ONESHOT (1 << 0) /* CVR */ | ||
| 17 | #define TIMER_CTRL_32BIT (1 << 1) /* CVR */ | ||
| 18 | #define TIMER_CTRL_DIV1 (0 << 2) /* ACVR */ | ||
| 19 | #define TIMER_CTRL_DIV16 (1 << 2) /* ACVR */ | ||
| 20 | #define TIMER_CTRL_DIV256 (2 << 2) /* ACVR */ | ||
| 21 | #define TIMER_CTRL_IE (1 << 5) /* VR */ | ||
| 22 | #define TIMER_CTRL_PERIODIC (1 << 6) /* ACVR */ | ||
| 23 | #define TIMER_CTRL_ENABLE (1 << 7) /* ACVR */ | ||
| 15 | 24 | ||
| 16 | #define TIMER_INTCLR 0x0c | 25 | #define TIMER_INTCLR 0x0c /* ACVR wo */ |
| 17 | #define TIMER_RIS 0x10 | 26 | #define TIMER_RIS 0x10 /* CVR ro */ |
| 18 | #define TIMER_MIS 0x14 | 27 | #define TIMER_MIS 0x14 /* CVR ro */ |
| 19 | #define TIMER_BGLOAD 0x18 | 28 | #define TIMER_BGLOAD 0x18 /* CVR rw */ |
| 20 | 29 | ||
| 21 | #endif | 30 | #endif |