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authorTero Kristo <t-kristo@ti.com>2015-06-01 11:30:27 -0400
committerTony Lindgren <tony@atomide.com>2015-06-01 13:29:35 -0400
commitb33558c906bf330336b16dc4598fecee66e48a57 (patch)
tree62d65b089bd63e65cf6ab807ec934c69d1619c15 /arch
parent8770d0898af7f0f0a8e88ce702b02a9ca326254f (diff)
ARM: dts: AM35xx: fix system control module clocks
New system control module layout for omap3 overlooked parts of the am35xx configuration. Basically the am35xx clocks were not converted to use the changed offsets, which caused weird boot warnings. The errors were not fatal so far, so they were not caught earlier. Fixed by applying the proper offsets for the AM35xx scm clocks. Fixes: b8845074cf ("ARM: dts: omap3: add minimal l4 bus layout with...") Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Jeroen Hofstee <linux-arm@myspectrum.nl> Cc: Paul Walmsley <paul@pwsan.com> Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/am35xx-clocks.dtsi14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/am35xx-clocks.dtsi b/arch/arm/boot/dts/am35xx-clocks.dtsi
index 518b8fde88b0..18cc826e9db5 100644
--- a/arch/arm/boot/dts/am35xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am35xx-clocks.dtsi
@@ -12,7 +12,7 @@
12 #clock-cells = <0>; 12 #clock-cells = <0>;
13 compatible = "ti,am35xx-gate-clock"; 13 compatible = "ti,am35xx-gate-clock";
14 clocks = <&ipss_ick>; 14 clocks = <&ipss_ick>;
15 reg = <0x059c>; 15 reg = <0x032c>;
16 ti,bit-shift = <1>; 16 ti,bit-shift = <1>;
17 }; 17 };
18 18
@@ -20,7 +20,7 @@
20 #clock-cells = <0>; 20 #clock-cells = <0>;
21 compatible = "ti,gate-clock"; 21 compatible = "ti,gate-clock";
22 clocks = <&rmii_ck>; 22 clocks = <&rmii_ck>;
23 reg = <0x059c>; 23 reg = <0x032c>;
24 ti,bit-shift = <9>; 24 ti,bit-shift = <9>;
25 }; 25 };
26 26
@@ -28,7 +28,7 @@
28 #clock-cells = <0>; 28 #clock-cells = <0>;
29 compatible = "ti,am35xx-gate-clock"; 29 compatible = "ti,am35xx-gate-clock";
30 clocks = <&ipss_ick>; 30 clocks = <&ipss_ick>;
31 reg = <0x059c>; 31 reg = <0x032c>;
32 ti,bit-shift = <2>; 32 ti,bit-shift = <2>;
33 }; 33 };
34 34
@@ -36,7 +36,7 @@
36 #clock-cells = <0>; 36 #clock-cells = <0>;
37 compatible = "ti,gate-clock"; 37 compatible = "ti,gate-clock";
38 clocks = <&pclk_ck>; 38 clocks = <&pclk_ck>;
39 reg = <0x059c>; 39 reg = <0x032c>;
40 ti,bit-shift = <10>; 40 ti,bit-shift = <10>;
41 }; 41 };
42 42
@@ -44,7 +44,7 @@
44 #clock-cells = <0>; 44 #clock-cells = <0>;
45 compatible = "ti,am35xx-gate-clock"; 45 compatible = "ti,am35xx-gate-clock";
46 clocks = <&ipss_ick>; 46 clocks = <&ipss_ick>;
47 reg = <0x059c>; 47 reg = <0x032c>;
48 ti,bit-shift = <0>; 48 ti,bit-shift = <0>;
49 }; 49 };
50 50
@@ -52,7 +52,7 @@
52 #clock-cells = <0>; 52 #clock-cells = <0>;
53 compatible = "ti,gate-clock"; 53 compatible = "ti,gate-clock";
54 clocks = <&sys_ck>; 54 clocks = <&sys_ck>;
55 reg = <0x059c>; 55 reg = <0x032c>;
56 ti,bit-shift = <8>; 56 ti,bit-shift = <8>;
57 }; 57 };
58 58
@@ -60,7 +60,7 @@
60 #clock-cells = <0>; 60 #clock-cells = <0>;
61 compatible = "ti,am35xx-gate-clock"; 61 compatible = "ti,am35xx-gate-clock";
62 clocks = <&sys_ck>; 62 clocks = <&sys_ck>;
63 reg = <0x059c>; 63 reg = <0x032c>;
64 ti,bit-shift = <3>; 64 ti,bit-shift = <3>;
65 }; 65 };
66}; 66};