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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-05-12 12:23:35 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-05-22 12:03:13 -0400
commita80d3ec609c34828a821e1da45f06ad15f1218a5 (patch)
tree75cd20fd17932889d7e1d5b6f29f756abea9c71f /arch
parentb099c604d31d4f0cecd212e0830d33e84ded2f1b (diff)
ARM: at91/dt: define sam9x5 clocks
Define sam9x5 clocks in sam9x5 dt files and make use of them in peripheral definitions. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi355
-rw-r--r--arch/arm/boot/dts/at91sam9x5_can.dtsi31
-rw-r--r--arch/arm/boot/dts/at91sam9x5_isi.dtsi26
-rw-r--r--arch/arm/boot/dts/at91sam9x5_lcd.dtsi26
-rw-r--r--arch/arm/boot/dts/at91sam9x5_macb0.dtsi11
-rw-r--r--arch/arm/boot/dts/at91sam9x5_macb1.dtsi11
-rw-r--r--arch/arm/boot/dts/at91sam9x5_usart3.dtsi11
7 files changed, 470 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index fc13c9240da8..1a57298636a5 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -14,6 +14,7 @@
14#include <dt-bindings/pinctrl/at91.h> 14#include <dt-bindings/pinctrl/at91.h>
15#include <dt-bindings/interrupt-controller/irq.h> 15#include <dt-bindings/interrupt-controller/irq.h>
16#include <dt-bindings/gpio/gpio.h> 16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/clock/at91.h>
17 18
18/ { 19/ {
19 model = "Atmel AT91SAM9x5 family SoC"; 20 model = "Atmel AT91SAM9x5 family SoC";
@@ -51,6 +52,24 @@
51 reg = <0x20000000 0x10000000>; 52 reg = <0x20000000 0x10000000>;
52 }; 53 };
53 54
55 slow_xtal: slow_xtal {
56 compatible = "fixed-clock";
57 #clock-cells = <0>;
58 clock-frequency = <0>;
59 };
60
61 main_xtal: main_xtal {
62 compatible = "fixed-clock";
63 #clock-cells = <0>;
64 clock-frequency = <0>;
65 };
66
67 adc_op_clk: adc_op_clk{
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <5000000>;
71 };
72
54 ahb { 73 ahb {
55 compatible = "simple-bus"; 74 compatible = "simple-bus";
56 #address-cells = <1>; 75 #address-cells = <1>;
@@ -77,8 +96,272 @@
77 }; 96 };
78 97
79 pmc: pmc@fffffc00 { 98 pmc: pmc@fffffc00 {
80 compatible = "atmel,at91rm9200-pmc"; 99 compatible = "atmel,at91sam9x5-pmc";
81 reg = <0xfffffc00 0x100>; 100 reg = <0xfffffc00 0x100>;
101 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
102 interrupt-controller;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 #interrupt-cells = <1>;
106
107 main_rc_osc: main_rc_osc {
108 compatible = "atmel,at91sam9x5-clk-main-rc-osc";
109 #clock-cells = <0>;
110 interrupts-extended = <&pmc AT91_PMC_MOSCRCS>;
111 clock-frequency = <12000000>;
112 clock-accuracy = <50000000>;
113 };
114
115 main_osc: main_osc {
116 compatible = "atmel,at91rm9200-clk-main-osc";
117 #clock-cells = <0>;
118 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
119 clocks = <&main_xtal>;
120 };
121
122 main: mainck {
123 compatible = "atmel,at91sam9x5-clk-main";
124 #clock-cells = <0>;
125 interrupts-extended = <&pmc AT91_PMC_MOSCSELS>;
126 clocks = <&main_rc_osc>, <&main_osc>;
127 };
128
129 plla: pllack {
130 compatible = "atmel,at91rm9200-clk-pll";
131 #clock-cells = <0>;
132 interrupts-extended = <&pmc AT91_PMC_LOCKA>;
133 clocks = <&main>;
134 reg = <0>;
135 atmel,clk-input-range = <2000000 32000000>;
136 #atmel,pll-clk-output-range-cells = <4>;
137 atmel,pll-clk-output-ranges = <745000000 800000000 0 0
138 695000000 750000000 1 0
139 645000000 700000000 2 0
140 595000000 650000000 3 0
141 545000000 600000000 0 1
142 495000000 555000000 1 1
143 445000000 500000000 1 2
144 400000000 450000000 1 3>;
145 };
146
147 plladiv: plladivck {
148 compatible = "atmel,at91sam9x5-clk-plldiv";
149 #clock-cells = <0>;
150 clocks = <&plla>;
151 };
152
153 utmi: utmick {
154 compatible = "atmel,at91sam9x5-clk-utmi";
155 #clock-cells = <0>;
156 interrupts-extended = <&pmc AT91_PMC_LOCKU>;
157 clocks = <&main>;
158 };
159
160 mck: masterck {
161 compatible = "atmel,at91sam9x5-clk-master";
162 #clock-cells = <0>;
163 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
164 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
165 atmel,clk-output-range = <0 133333333>;
166 atmel,clk-divisors = <1 2 4 3>;
167 atmel,master-clk-have-div3-pres;
168 };
169
170 usb: usbck {
171 compatible = "atmel,at91sam9x5-clk-usb";
172 #clock-cells = <0>;
173 clocks = <&plladiv>, <&utmi>;
174 };
175
176 prog: progck {
177 compatible = "atmel,at91sam9x5-clk-programmable";
178 #address-cells = <1>;
179 #size-cells = <0>;
180 interrupt-parent = <&pmc>;
181 clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
182
183 prog0: prog0 {
184 #clock-cells = <0>;
185 reg = <0>;
186 interrupts = <AT91_PMC_PCKRDY(0)>;
187 };
188
189 prog1: prog1 {
190 #clock-cells = <0>;
191 reg = <1>;
192 interrupts = <AT91_PMC_PCKRDY(1)>;
193 };
194 };
195
196 smd: smdclk {
197 compatible = "atmel,at91sam9x5-clk-smd";
198 #clock-cells = <0>;
199 clocks = <&plladiv>, <&utmi>;
200 };
201
202 systemck {
203 compatible = "atmel,at91rm9200-clk-system";
204 #address-cells = <1>;
205 #size-cells = <0>;
206
207 ddrck: ddrck {
208 #clock-cells = <0>;
209 reg = <2>;
210 clocks = <&mck>;
211 };
212
213 smdck: smdck {
214 #clock-cells = <0>;
215 reg = <4>;
216 clocks = <&smd>;
217 };
218
219 uhpck: uhpck {
220 #clock-cells = <0>;
221 reg = <6>;
222 clocks = <&usb>;
223 };
224
225 udpck: udpck {
226 #clock-cells = <0>;
227 reg = <7>;
228 clocks = <&usb>;
229 };
230
231 pck0: pck0 {
232 #clock-cells = <0>;
233 reg = <8>;
234 clocks = <&prog0>;
235 };
236
237 pck1: pck1 {
238 #clock-cells = <0>;
239 reg = <9>;
240 clocks = <&prog1>;
241 };
242 };
243
244 periphck {
245 compatible = "atmel,at91sam9x5-clk-peripheral";
246 #address-cells = <1>;
247 #size-cells = <0>;
248 clocks = <&mck>;
249
250 pioAB_clk: pioAB_clk {
251 #clock-cells = <0>;
252 reg = <2>;
253 };
254
255 pioCD_clk: pioCD_clk {
256 #clock-cells = <0>;
257 reg = <3>;
258 };
259
260 smd_clk: smd_clk {
261 #clock-cells = <0>;
262 reg = <4>;
263 };
264
265 usart0_clk: usart0_clk {
266 #clock-cells = <0>;
267 reg = <5>;
268 };
269
270 usart1_clk: usart1_clk {
271 #clock-cells = <0>;
272 reg = <6>;
273 };
274
275 usart2_clk: usart2_clk {
276 #clock-cells = <0>;
277 reg = <7>;
278 };
279
280 twi0_clk: twi0_clk {
281 reg = <9>;
282 #clock-cells = <0>;
283 };
284
285 twi1_clk: twi1_clk {
286 #clock-cells = <0>;
287 reg = <10>;
288 };
289
290 twi2_clk: twi2_clk {
291 #clock-cells = <0>;
292 reg = <11>;
293 };
294
295 mci0_clk: mci0_clk {
296 #clock-cells = <0>;
297 reg = <12>;
298 };
299
300 spi0_clk: spi0_clk {
301 #clock-cells = <0>;
302 reg = <13>;
303 };
304
305 spi1_clk: spi1_clk {
306 #clock-cells = <0>;
307 reg = <14>;
308 };
309
310 uart0_clk: uart0_clk {
311 #clock-cells = <0>;
312 reg = <15>;
313 };
314
315 uart1_clk: uart1_clk {
316 #clock-cells = <0>;
317 reg = <16>;
318 };
319
320 tcb0_clk: tcb0_clk {
321 #clock-cells = <0>;
322 reg = <17>;
323 };
324
325 pwm_clk: pwm_clk {
326 #clock-cells = <0>;
327 reg = <18>;
328 };
329
330 adc_clk: adc_clk {
331 #clock-cells = <0>;
332 reg = <19>;
333 };
334
335 dma0_clk: dma0_clk {
336 #clock-cells = <0>;
337 reg = <20>;
338 };
339
340 dma1_clk: dma1_clk {
341 #clock-cells = <0>;
342 reg = <21>;
343 };
344
345 uhphs_clk: uhphs_clk {
346 #clock-cells = <0>;
347 reg = <22>;
348 };
349
350 udphs_clk: udphs_clk {
351 #clock-cells = <0>;
352 reg = <23>;
353 };
354
355 mci1_clk: mci1_clk {
356 #clock-cells = <0>;
357 reg = <26>;
358 };
359
360 ssc0_clk: ssc0_clk {
361 #clock-cells = <0>;
362 reg = <28>;
363 };
364 };
82 }; 365 };
83 366
84 rstc@fffffe00 { 367 rstc@fffffe00 {
@@ -95,18 +378,47 @@
95 compatible = "atmel,at91sam9260-pit"; 378 compatible = "atmel,at91sam9260-pit";
96 reg = <0xfffffe30 0xf>; 379 reg = <0xfffffe30 0xf>;
97 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 380 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
381 clocks = <&mck>;
382 };
383
384 sckc@fffffe50 {
385 compatible = "atmel,at91sam9x5-sckc";
386 reg = <0xfffffe50 0x4>;
387
388 slow_osc: slow_osc {
389 compatible = "atmel,at91sam9x5-clk-slow-osc";
390 #clock-cells = <0>;
391 clocks = <&slow_xtal>;
392 };
393
394 slow_rc_osc: slow_rc_osc {
395 compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
396 #clock-cells = <0>;
397 clock-frequency = <32768>;
398 clock-accuracy = <50000000>;
399 };
400
401 clk32k: slck {
402 compatible = "atmel,at91sam9x5-clk-slow";
403 #clock-cells = <0>;
404 clocks = <&slow_rc_osc>, <&slow_osc>;
405 };
98 }; 406 };
99 407
100 tcb0: timer@f8008000 { 408 tcb0: timer@f8008000 {
101 compatible = "atmel,at91sam9x5-tcb"; 409 compatible = "atmel,at91sam9x5-tcb";
102 reg = <0xf8008000 0x100>; 410 reg = <0xf8008000 0x100>;
103 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 411 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
412 clocks = <&tcb0_clk>;
413 clock-names = "t0_clk";
104 }; 414 };
105 415
106 tcb1: timer@f800c000 { 416 tcb1: timer@f800c000 {
107 compatible = "atmel,at91sam9x5-tcb"; 417 compatible = "atmel,at91sam9x5-tcb";
108 reg = <0xf800c000 0x100>; 418 reg = <0xf800c000 0x100>;
109 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; 419 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
420 clocks = <&tcb0_clk>;
421 clock-names = "t0_clk";
110 }; 422 };
111 423
112 dma0: dma-controller@ffffec00 { 424 dma0: dma-controller@ffffec00 {
@@ -114,6 +426,8 @@
114 reg = <0xffffec00 0x200>; 426 reg = <0xffffec00 0x200>;
115 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 427 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
116 #dma-cells = <2>; 428 #dma-cells = <2>;
429 clocks = <&dma0_clk>;
430 clock-names = "dma_clk";
117 }; 431 };
118 432
119 dma1: dma-controller@ffffee00 { 433 dma1: dma-controller@ffffee00 {
@@ -121,6 +435,8 @@
121 reg = <0xffffee00 0x200>; 435 reg = <0xffffee00 0x200>;
122 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 436 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
123 #dma-cells = <2>; 437 #dma-cells = <2>;
438 clocks = <&dma1_clk>;
439 clock-names = "dma_clk";
124 }; 440 };
125 441
126 pinctrl@fffff400 { 442 pinctrl@fffff400 {
@@ -453,6 +769,7 @@
453 gpio-controller; 769 gpio-controller;
454 interrupt-controller; 770 interrupt-controller;
455 #interrupt-cells = <2>; 771 #interrupt-cells = <2>;
772 clocks = <&pioAB_clk>;
456 }; 773 };
457 774
458 pioB: gpio@fffff600 { 775 pioB: gpio@fffff600 {
@@ -464,6 +781,7 @@
464 #gpio-lines = <19>; 781 #gpio-lines = <19>;
465 interrupt-controller; 782 interrupt-controller;
466 #interrupt-cells = <2>; 783 #interrupt-cells = <2>;
784 clocks = <&pioAB_clk>;
467 }; 785 };
468 786
469 pioC: gpio@fffff800 { 787 pioC: gpio@fffff800 {
@@ -474,6 +792,7 @@
474 gpio-controller; 792 gpio-controller;
475 interrupt-controller; 793 interrupt-controller;
476 #interrupt-cells = <2>; 794 #interrupt-cells = <2>;
795 clocks = <&pioCD_clk>;
477 }; 796 };
478 797
479 pioD: gpio@fffffa00 { 798 pioD: gpio@fffffa00 {
@@ -485,6 +804,7 @@
485 #gpio-lines = <22>; 804 #gpio-lines = <22>;
486 interrupt-controller; 805 interrupt-controller;
487 #interrupt-cells = <2>; 806 #interrupt-cells = <2>;
807 clocks = <&pioCD_clk>;
488 }; 808 };
489 }; 809 };
490 810
@@ -497,6 +817,8 @@
497 dma-names = "tx", "rx"; 817 dma-names = "tx", "rx";
498 pinctrl-names = "default"; 818 pinctrl-names = "default";
499 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 819 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
820 clocks = <&ssc0_clk>;
821 clock-names = "pclk";
500 status = "disabled"; 822 status = "disabled";
501 }; 823 };
502 824
@@ -507,6 +829,8 @@
507 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>; 829 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
508 dma-names = "rxtx"; 830 dma-names = "rxtx";
509 pinctrl-names = "default"; 831 pinctrl-names = "default";
832 clocks = <&mci0_clk>;
833 clock-names = "mci_clk";
510 #address-cells = <1>; 834 #address-cells = <1>;
511 #size-cells = <0>; 835 #size-cells = <0>;
512 status = "disabled"; 836 status = "disabled";
@@ -519,6 +843,8 @@
519 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>; 843 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
520 dma-names = "rxtx"; 844 dma-names = "rxtx";
521 pinctrl-names = "default"; 845 pinctrl-names = "default";
846 clocks = <&mci1_clk>;
847 clock-names = "mci_clk";
522 #address-cells = <1>; 848 #address-cells = <1>;
523 #size-cells = <0>; 849 #size-cells = <0>;
524 status = "disabled"; 850 status = "disabled";
@@ -530,6 +856,8 @@
530 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 856 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
531 pinctrl-names = "default"; 857 pinctrl-names = "default";
532 pinctrl-0 = <&pinctrl_dbgu>; 858 pinctrl-0 = <&pinctrl_dbgu>;
859 clocks = <&mck>;
860 clock-names = "usart";
533 status = "disabled"; 861 status = "disabled";
534 }; 862 };
535 863
@@ -539,6 +867,8 @@
539 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>; 867 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
540 pinctrl-names = "default"; 868 pinctrl-names = "default";
541 pinctrl-0 = <&pinctrl_usart0>; 869 pinctrl-0 = <&pinctrl_usart0>;
870 clocks = <&usart0_clk>;
871 clock-names = "usart";
542 status = "disabled"; 872 status = "disabled";
543 }; 873 };
544 874
@@ -548,6 +878,8 @@
548 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 878 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
549 pinctrl-names = "default"; 879 pinctrl-names = "default";
550 pinctrl-0 = <&pinctrl_usart1>; 880 pinctrl-0 = <&pinctrl_usart1>;
881 clocks = <&usart1_clk>;
882 clock-names = "usart";
551 status = "disabled"; 883 status = "disabled";
552 }; 884 };
553 885
@@ -557,6 +889,8 @@
557 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 889 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558 pinctrl-names = "default"; 890 pinctrl-names = "default";
559 pinctrl-0 = <&pinctrl_usart2>; 891 pinctrl-0 = <&pinctrl_usart2>;
892 clocks = <&usart2_clk>;
893 clock-names = "usart";
560 status = "disabled"; 894 status = "disabled";
561 }; 895 };
562 896
@@ -571,6 +905,7 @@
571 #size-cells = <0>; 905 #size-cells = <0>;
572 pinctrl-names = "default"; 906 pinctrl-names = "default";
573 pinctrl-0 = <&pinctrl_i2c0>; 907 pinctrl-0 = <&pinctrl_i2c0>;
908 clocks = <&twi0_clk>;
574 status = "disabled"; 909 status = "disabled";
575 }; 910 };
576 911
@@ -585,6 +920,7 @@
585 #size-cells = <0>; 920 #size-cells = <0>;
586 pinctrl-names = "default"; 921 pinctrl-names = "default";
587 pinctrl-0 = <&pinctrl_i2c1>; 922 pinctrl-0 = <&pinctrl_i2c1>;
923 clocks = <&twi1_clk>;
588 status = "disabled"; 924 status = "disabled";
589 }; 925 };
590 926
@@ -599,6 +935,7 @@
599 #size-cells = <0>; 935 #size-cells = <0>;
600 pinctrl-names = "default"; 936 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_i2c2>; 937 pinctrl-0 = <&pinctrl_i2c2>;
938 clocks = <&twi2_clk>;
602 status = "disabled"; 939 status = "disabled";
603 }; 940 };
604 941
@@ -608,6 +945,8 @@
608 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 945 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
609 pinctrl-names = "default"; 946 pinctrl-names = "default";
610 pinctrl-0 = <&pinctrl_uart0>; 947 pinctrl-0 = <&pinctrl_uart0>;
948 clocks = <&uart0_clk>;
949 clock-names = "usart";
611 status = "disabled"; 950 status = "disabled";
612 }; 951 };
613 952
@@ -617,6 +956,8 @@
617 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 956 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
618 pinctrl-names = "default"; 957 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_uart1>; 958 pinctrl-0 = <&pinctrl_uart1>;
959 clocks = <&uart1_clk>;
960 clock-names = "usart";
620 status = "disabled"; 961 status = "disabled";
621 }; 962 };
622 963
@@ -626,6 +967,9 @@
626 compatible = "atmel,at91sam9260-adc"; 967 compatible = "atmel,at91sam9260-adc";
627 reg = <0xf804c000 0x100>; 968 reg = <0xf804c000 0x100>;
628 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>; 969 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
970 clocks = <&adc_clk>,
971 <&adc_op_clk>;
972 clock-names = "adc_clk", "adc_op_clk";
629 atmel,adc-use-external-triggers; 973 atmel,adc-use-external-triggers;
630 atmel,adc-channels-used = <0xffff>; 974 atmel,adc-channels-used = <0xffff>;
631 atmel,adc-vref = <3300>; 975 atmel,adc-vref = <3300>;
@@ -673,6 +1017,8 @@
673 dma-names = "tx", "rx"; 1017 dma-names = "tx", "rx";
674 pinctrl-names = "default"; 1018 pinctrl-names = "default";
675 pinctrl-0 = <&pinctrl_spi0>; 1019 pinctrl-0 = <&pinctrl_spi0>;
1020 clocks = <&spi0_clk>;
1021 clock-names = "spi_clk";
676 status = "disabled"; 1022 status = "disabled";
677 }; 1023 };
678 1024
@@ -687,6 +1033,8 @@
687 dma-names = "tx", "rx"; 1033 dma-names = "tx", "rx";
688 pinctrl-names = "default"; 1034 pinctrl-names = "default";
689 pinctrl-0 = <&pinctrl_spi1>; 1035 pinctrl-0 = <&pinctrl_spi1>;
1036 clocks = <&spi1_clk>;
1037 clock-names = "spi_clk";
690 status = "disabled"; 1038 status = "disabled";
691 }; 1039 };
692 1040
@@ -805,6 +1153,9 @@
805 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 1153 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
806 reg = <0x00600000 0x100000>; 1154 reg = <0x00600000 0x100000>;
807 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1155 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1156 clocks = <&usb>, <&uhphs_clk>, <&udphs_clk>,
1157 <&uhpck>;
1158 clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
808 status = "disabled"; 1159 status = "disabled";
809 }; 1160 };
810 1161
@@ -812,6 +1163,8 @@
812 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1163 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
813 reg = <0x00700000 0x100000>; 1164 reg = <0x00700000 0x100000>;
814 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1165 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1166 clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
1167 clock-names = "usb_clk", "ehci_clk", "uhpck";
815 status = "disabled"; 1168 status = "disabled";
816 }; 1169 };
817 }; 1170 };
diff --git a/arch/arm/boot/dts/at91sam9x5_can.dtsi b/arch/arm/boot/dts/at91sam9x5_can.dtsi
new file mode 100644
index 000000000000..f44ab7702a12
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_can.dtsi
@@ -0,0 +1,31 @@
1/*
2 * at91sam9x5_macb0.dtsi - Device Tree Include file for AT91SAM9x5 SoC with 1
3 * Ethernet interface.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pmc: pmc@fffffc00 {
17 periphck {
18 can0_clk: can0_clk {
19 #clock-cells = <0>;
20 reg = <29>;
21 };
22
23 can1_clk: can1_clk {
24 #clock-cells = <0>;
25 reg = <30>;
26 };
27 };
28 };
29 };
30 };
31};
diff --git a/arch/arm/boot/dts/at91sam9x5_isi.dtsi b/arch/arm/boot/dts/at91sam9x5_isi.dtsi
new file mode 100644
index 000000000000..98bc877a68ef
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_isi.dtsi
@@ -0,0 +1,26 @@
1/*
2 * at91sam9x5_isi.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
3 * Image Sensor Interface.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pmc: pmc@fffffc00 {
17 periphck {
18 isi_clk: isi_clk {
19 #clock-cells = <0>;
20 reg = <25>;
21 };
22 };
23 };
24 };
25 };
26};
diff --git a/arch/arm/boot/dts/at91sam9x5_lcd.dtsi b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
new file mode 100644
index 000000000000..485302e8233d
--- /dev/null
+++ b/arch/arm/boot/dts/at91sam9x5_lcd.dtsi
@@ -0,0 +1,26 @@
1/*
2 * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
3 * LCD controller.
4 *
5 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
6 *
7 * Licensed under GPLv2.
8 */
9
10#include <dt-bindings/pinctrl/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12
13/ {
14 ahb {
15 apb {
16 pmc: pmc@fffffc00 {
17 periphck {
18 lcdc_clk: lcdc_clk {
19 #clock-cells = <0>;
20 reg = <25>;
21 };
22 };
23 };
24 };
25 };
26};
diff --git a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi
index 55731ffba764..57e89d1d0325 100644
--- a/arch/arm/boot/dts/at91sam9x5_macb0.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_macb0.dtsi
@@ -43,12 +43,23 @@
43 }; 43 };
44 }; 44 };
45 45
46 pmc: pmc@fffffc00 {
47 periphck {
48 macb0_clk: macb0_clk {
49 #clock-cells = <0>;
50 reg = <24>;
51 };
52 };
53 };
54
46 macb0: ethernet@f802c000 { 55 macb0: ethernet@f802c000 {
47 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 56 compatible = "cdns,at32ap7000-macb", "cdns,macb";
48 reg = <0xf802c000 0x100>; 57 reg = <0xf802c000 0x100>;
49 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>; 58 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
50 pinctrl-names = "default"; 59 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_macb0_rmii>; 60 pinctrl-0 = <&pinctrl_macb0_rmii>;
61 clocks = <&macb0_clk>, <&macb0_clk>;
62 clock-names = "hclk", "pclk";
52 status = "disabled"; 63 status = "disabled";
53 }; 64 };
54 }; 65 };
diff --git a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi
index 77425a627a94..663676c02861 100644
--- a/arch/arm/boot/dts/at91sam9x5_macb1.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_macb1.dtsi
@@ -31,12 +31,23 @@
31 }; 31 };
32 }; 32 };
33 33
34 pmc: pmc@fffffc00 {
35 periphck {
36 macb1_clk: macb1_clk {
37 #clock-cells = <0>;
38 reg = <27>;
39 };
40 };
41 };
42
34 macb1: ethernet@f8030000 { 43 macb1: ethernet@f8030000 {
35 compatible = "cdns,at32ap7000-macb", "cdns,macb"; 44 compatible = "cdns,at32ap7000-macb", "cdns,macb";
36 reg = <0xf8030000 0x100>; 45 reg = <0xf8030000 0x100>;
37 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>; 46 interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
38 pinctrl-names = "default"; 47 pinctrl-names = "default";
39 pinctrl-0 = <&pinctrl_macb1_rmii>; 48 pinctrl-0 = <&pinctrl_macb1_rmii>;
49 clocks = <&macb1_clk>, <&macb1_clk>;
50 clock-names = "hclk", "pclk";
40 status = "disabled"; 51 status = "disabled";
41 }; 52 };
42 }; 53 };
diff --git a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
index 6801106fa1f8..140217a54384 100644
--- a/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5_usart3.dtsi
@@ -42,12 +42,23 @@
42 }; 42 };
43 }; 43 };
44 44
45 pmc: pmc@fffffc00 {
46 periphck {
47 usart3_clk: usart3_clk {
48 #clock-cells = <0>;
49 reg = <8>;
50 };
51 };
52 };
53
45 usart3: serial@f8028000 { 54 usart3: serial@f8028000 {
46 compatible = "atmel,at91sam9260-usart"; 55 compatible = "atmel,at91sam9260-usart";
47 reg = <0xf8028000 0x200>; 56 reg = <0xf8028000 0x200>;
48 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 57 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
49 pinctrl-names = "default"; 58 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_usart3>; 59 pinctrl-0 = <&pinctrl_usart3>;
60 clocks = <&usart3_clk>;
61 clock-names = "usart";
51 status = "disabled"; 62 status = "disabled";
52 }; 63 };
53 }; 64 };