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authorChris Metcalf <cmetcalf@tilera.com>2010-09-15 11:16:10 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-09-15 11:16:10 -0400
commita802fc685426303ab627b7ad3fd5c97b5dea7e00 (patch)
tree29a4ae60405318129efc0897f311a6ac4b1328d2 /arch
parent74fca9da097b74117ae2cef9e5f0d9b0e28ccbb7 (diff)
arch/tile: Save and restore extra user state for tilegx
During context switch, save and restore a couple of additional bits of tilegx user state that can be persistently modified by userspace. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/tile/include/arch/chip_tile64.h3
-rw-r--r--arch/tile/include/arch/chip_tilepro.h3
-rw-r--r--arch/tile/include/asm/processor.h12
-rw-r--r--arch/tile/kernel/process.c23
4 files changed, 34 insertions, 7 deletions
diff --git a/arch/tile/include/arch/chip_tile64.h b/arch/tile/include/arch/chip_tile64.h
index 1246573be59e..261aaba092d4 100644
--- a/arch/tile/include/arch/chip_tile64.h
+++ b/arch/tile/include/arch/chip_tile64.h
@@ -150,6 +150,9 @@
150/** Is the PROC_STATUS SPR supported? */ 150/** Is the PROC_STATUS SPR supported? */
151#define CHIP_HAS_PROC_STATUS_SPR() 0 151#define CHIP_HAS_PROC_STATUS_SPR() 0
152 152
153/** Is the DSTREAM_PF SPR supported? */
154#define CHIP_HAS_DSTREAM_PF() 0
155
153/** Log of the number of mshims we have. */ 156/** Log of the number of mshims we have. */
154#define CHIP_LOG_NUM_MSHIMS() 2 157#define CHIP_LOG_NUM_MSHIMS() 2
155 158
diff --git a/arch/tile/include/arch/chip_tilepro.h b/arch/tile/include/arch/chip_tilepro.h
index e864c47fc89c..70017699a74c 100644
--- a/arch/tile/include/arch/chip_tilepro.h
+++ b/arch/tile/include/arch/chip_tilepro.h
@@ -150,6 +150,9 @@
150/** Is the PROC_STATUS SPR supported? */ 150/** Is the PROC_STATUS SPR supported? */
151#define CHIP_HAS_PROC_STATUS_SPR() 1 151#define CHIP_HAS_PROC_STATUS_SPR() 1
152 152
153/** Is the DSTREAM_PF SPR supported? */
154#define CHIP_HAS_DSTREAM_PF() 0
155
153/** Log of the number of mshims we have. */ 156/** Log of the number of mshims we have. */
154#define CHIP_LOG_NUM_MSHIMS() 2 157#define CHIP_LOG_NUM_MSHIMS() 2
155 158
diff --git a/arch/tile/include/asm/processor.h b/arch/tile/include/asm/processor.h
index d942d09b252e..ccd5f8425688 100644
--- a/arch/tile/include/asm/processor.h
+++ b/arch/tile/include/asm/processor.h
@@ -103,6 +103,18 @@ struct thread_struct {
103 /* Any other miscellaneous processor state bits */ 103 /* Any other miscellaneous processor state bits */
104 unsigned long proc_status; 104 unsigned long proc_status;
105#endif 105#endif
106#if !CHIP_HAS_FIXED_INTVEC_BASE()
107 /* Interrupt base for PL0 interrupts */
108 unsigned long interrupt_vector_base;
109#endif
110#if CHIP_HAS_TILE_RTF_HWM()
111 /* Tile cache retry fifo high-water mark */
112 unsigned long tile_rtf_hwm;
113#endif
114#if CHIP_HAS_DSTREAM_PF()
115 /* Data stream prefetch control */
116 unsigned long dstream_pf;
117#endif
106#ifdef CONFIG_HARDWALL 118#ifdef CONFIG_HARDWALL
107 /* Is this task tied to an activated hardwall? */ 119 /* Is this task tied to an activated hardwall? */
108 struct hardwall_info *hardwall; 120 struct hardwall_info *hardwall;
diff --git a/arch/tile/kernel/process.c b/arch/tile/kernel/process.c
index 88be49e3aa25..c37b6e3873c1 100644
--- a/arch/tile/kernel/process.c
+++ b/arch/tile/kernel/process.c
@@ -408,6 +408,15 @@ static void save_arch_state(struct thread_struct *t)
408#if CHIP_HAS_PROC_STATUS_SPR() 408#if CHIP_HAS_PROC_STATUS_SPR()
409 t->proc_status = __insn_mfspr(SPR_PROC_STATUS); 409 t->proc_status = __insn_mfspr(SPR_PROC_STATUS);
410#endif 410#endif
411#if !CHIP_HAS_FIXED_INTVEC_BASE()
412 t->interrupt_vector_base = __insn_mfspr(SPR_INTERRUPT_VECTOR_BASE_0);
413#endif
414#if CHIP_HAS_TILE_RTF_HWM()
415 t->tile_rtf_hwm = __insn_mfspr(SPR_TILE_RTF_HWM);
416#endif
417#if CHIP_HAS_DSTREAM_PF()
418 t->dstream_pf = __insn_mfspr(SPR_DSTREAM_PF);
419#endif
411} 420}
412 421
413static void restore_arch_state(const struct thread_struct *t) 422static void restore_arch_state(const struct thread_struct *t)
@@ -428,14 +437,14 @@ static void restore_arch_state(const struct thread_struct *t)
428#if CHIP_HAS_PROC_STATUS_SPR() 437#if CHIP_HAS_PROC_STATUS_SPR()
429 __insn_mtspr(SPR_PROC_STATUS, t->proc_status); 438 __insn_mtspr(SPR_PROC_STATUS, t->proc_status);
430#endif 439#endif
440#if !CHIP_HAS_FIXED_INTVEC_BASE()
441 __insn_mtspr(SPR_INTERRUPT_VECTOR_BASE_0, t->interrupt_vector_base);
442#endif
431#if CHIP_HAS_TILE_RTF_HWM() 443#if CHIP_HAS_TILE_RTF_HWM()
432 /* 444 __insn_mtspr(SPR_TILE_RTF_HWM, t->tile_rtf_hwm);
433 * Clear this whenever we switch back to a process in case 445#endif
434 * the previous process was monkeying with it. Even if enabled 446#if CHIP_HAS_DSTREAM_PF()
435 * in CBOX_MSR1 via TILE_RTF_HWM_MIN, it's still just a 447 __insn_mtspr(SPR_DSTREAM_PF, t->dstream_pf);
436 * performance hint, so isn't worth a full save/restore.
437 */
438 __insn_mtspr(SPR_TILE_RTF_HWM, 0);
439#endif 448#endif
440} 449}
441 450