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authorAurelien Jacquiot <a-jacquiot@ti.com>2011-10-04 11:14:47 -0400
committerMark Salter <msalter@redhat.com>2011-10-06 19:48:20 -0400
commita7f626c1948ab6178d2338831c5ffea7385e9f7f (patch)
tree03eaee71023fa633c24a3d28a30da57b454293ae /arch
parent52679b2d735492bce02503bafb333da87fae22c2 (diff)
C6X: headers
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/c6x/include/asm/asm-offsets.h1
-rw-r--r--arch/c6x/include/asm/bitops.h105
-rw-r--r--arch/c6x/include/asm/byteorder.h12
-rw-r--r--arch/c6x/include/asm/delay.h67
-rw-r--r--arch/c6x/include/asm/elf.h113
-rw-r--r--arch/c6x/include/asm/ftrace.h6
-rw-r--r--arch/c6x/include/asm/linkage.h30
-rw-r--r--arch/c6x/include/asm/memblock.h4
-rw-r--r--arch/c6x/include/asm/mmu.h18
-rw-r--r--arch/c6x/include/asm/mutex.h6
-rw-r--r--arch/c6x/include/asm/page.h11
-rw-r--r--arch/c6x/include/asm/pgtable.h81
-rw-r--r--arch/c6x/include/asm/procinfo.h28
-rw-r--r--arch/c6x/include/asm/prom.h1
-rw-r--r--arch/c6x/include/asm/sections.h12
-rw-r--r--arch/c6x/include/asm/setup.h32
-rw-r--r--arch/c6x/include/asm/string.h21
-rw-r--r--arch/c6x/include/asm/swab.h54
-rw-r--r--arch/c6x/include/asm/syscall.h123
-rw-r--r--arch/c6x/include/asm/system.h168
-rw-r--r--arch/c6x/include/asm/tlb.h8
-rw-r--r--arch/c6x/include/asm/uaccess.h107
-rw-r--r--arch/c6x/include/asm/unaligned.h170
23 files changed, 1178 insertions, 0 deletions
diff --git a/arch/c6x/include/asm/asm-offsets.h b/arch/c6x/include/asm/asm-offsets.h
new file mode 100644
index 000000000000..d370ee36a182
--- /dev/null
+++ b/arch/c6x/include/asm/asm-offsets.h
@@ -0,0 +1 @@
#include <generated/asm-offsets.h>
diff --git a/arch/c6x/include/asm/bitops.h b/arch/c6x/include/asm/bitops.h
new file mode 100644
index 000000000000..39ab7e874d96
--- /dev/null
+++ b/arch/c6x/include/asm/bitops.h
@@ -0,0 +1,105 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_BITOPS_H
12#define _ASM_C6X_BITOPS_H
13
14#ifdef __KERNEL__
15
16#include <linux/bitops.h>
17
18#include <asm/system.h>
19#include <asm/byteorder.h>
20
21/*
22 * clear_bit() doesn't provide any barrier for the compiler.
23 */
24#define smp_mb__before_clear_bit() barrier()
25#define smp_mb__after_clear_bit() barrier()
26
27/*
28 * We are lucky, DSP is perfect for bitops: do it in 3 cycles
29 */
30
31/**
32 * __ffs - find first bit in word.
33 * @word: The word to search
34 *
35 * Undefined if no bit exists, so code should check against 0 first.
36 * Note __ffs(0) = undef, __ffs(1) = 0, __ffs(0x80000000) = 31.
37 *
38 */
39static inline unsigned long __ffs(unsigned long x)
40{
41 asm (" bitr .M1 %0,%0\n"
42 " nop\n"
43 " lmbd .L1 1,%0,%0\n"
44 : "+a"(x));
45
46 return x;
47}
48
49/*
50 * ffz - find first zero in word.
51 * @word: The word to search
52 *
53 * Undefined if no zero exists, so code should check against ~0UL first.
54 */
55#define ffz(x) __ffs(~(x))
56
57/**
58 * fls - find last (most-significant) bit set
59 * @x: the word to search
60 *
61 * This is defined the same way as ffs.
62 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
63 */
64static inline int fls(int x)
65{
66 if (!x)
67 return 0;
68
69 asm (" lmbd .L1 1,%0,%0\n" : "+a"(x));
70
71 return 32 - x;
72}
73
74/**
75 * ffs - find first bit set
76 * @x: the word to search
77 *
78 * This is defined the same way as
79 * the libc and compiler builtin ffs routines, therefore
80 * differs in spirit from the above ffz (man ffs).
81 * Note ffs(0) = 0, ffs(1) = 1, ffs(0x80000000) = 32.
82 */
83static inline int ffs(int x)
84{
85 if (!x)
86 return 0;
87
88 return __ffs(x) + 1;
89}
90
91#include <asm-generic/bitops/__fls.h>
92#include <asm-generic/bitops/fls64.h>
93#include <asm-generic/bitops/find.h>
94
95#include <asm-generic/bitops/sched.h>
96#include <asm-generic/bitops/hweight.h>
97#include <asm-generic/bitops/lock.h>
98
99#include <asm-generic/bitops/atomic.h>
100#include <asm-generic/bitops/non-atomic.h>
101#include <asm-generic/bitops/le.h>
102#include <asm-generic/bitops/ext2-atomic.h>
103
104#endif /* __KERNEL__ */
105#endif /* _ASM_C6X_BITOPS_H */
diff --git a/arch/c6x/include/asm/byteorder.h b/arch/c6x/include/asm/byteorder.h
new file mode 100644
index 000000000000..166038db342b
--- /dev/null
+++ b/arch/c6x/include/asm/byteorder.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_C6X_BYTEORDER_H
2#define _ASM_C6X_BYTEORDER_H
3
4#include <asm/types.h>
5
6#ifdef _BIG_ENDIAN
7#include <linux/byteorder/big_endian.h>
8#else /* _BIG_ENDIAN */
9#include <linux/byteorder/little_endian.h>
10#endif /* _BIG_ENDIAN */
11
12#endif /* _ASM_BYTEORDER_H */
diff --git a/arch/c6x/include/asm/delay.h b/arch/c6x/include/asm/delay.h
new file mode 100644
index 000000000000..f314c2e9eb54
--- /dev/null
+++ b/arch/c6x/include/asm/delay.h
@@ -0,0 +1,67 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_DELAY_H
12#define _ASM_C6X_DELAY_H
13
14#include <linux/kernel.h>
15
16extern unsigned int ticks_per_ns_scaled;
17
18static inline void __delay(unsigned long loops)
19{
20 uint32_t tmp;
21
22 /* 6 cycles per loop */
23 asm volatile (" mv .s1 %0,%1\n"
24 "0: [%1] b .s1 0b\n"
25 " add .l1 -6,%0,%0\n"
26 " cmplt .l1 1,%0,%1\n"
27 " nop 3\n"
28 : "+a"(loops), "=A"(tmp));
29}
30
31static inline void _c6x_tickdelay(unsigned int x)
32{
33 uint32_t cnt, endcnt;
34
35 asm volatile (" mvc .s2 TSCL,%0\n"
36 " add .s2x %0,%1,%2\n"
37 " || mvk .l2 1,B0\n"
38 "0: [B0] b .s2 0b\n"
39 " mvc .s2 TSCL,%0\n"
40 " sub .s2 %0,%2,%0\n"
41 " cmpgt .l2 0,%0,B0\n"
42 " nop 2\n"
43 : "=b"(cnt), "+a"(x), "=b"(endcnt) : : "B0");
44}
45
46/* use scaled math to avoid slow division */
47#define C6X_NDELAY_SCALE 10
48
49static inline void _ndelay(unsigned int n)
50{
51 _c6x_tickdelay((ticks_per_ns_scaled * n) >> C6X_NDELAY_SCALE);
52}
53
54static inline void _udelay(unsigned int n)
55{
56 while (n >= 10) {
57 _ndelay(10000);
58 n -= 10;
59 }
60 while (n-- > 0)
61 _ndelay(1000);
62}
63
64#define udelay(x) _udelay((unsigned int)(x))
65#define ndelay(x) _ndelay((unsigned int)(x))
66
67#endif /* _ASM_C6X_DELAY_H */
diff --git a/arch/c6x/include/asm/elf.h b/arch/c6x/include/asm/elf.h
new file mode 100644
index 000000000000..d57865ba2c44
--- /dev/null
+++ b/arch/c6x/include/asm/elf.h
@@ -0,0 +1,113 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_ELF_H
12#define _ASM_C6X_ELF_H
13
14/*
15 * ELF register definitions..
16 */
17#include <asm/ptrace.h>
18
19typedef unsigned long elf_greg_t;
20typedef unsigned long elf_fpreg_t;
21
22#define ELF_NGREG 58
23#define ELF_NFPREG 1
24
25typedef elf_greg_t elf_gregset_t[ELF_NGREG];
26typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
27
28/*
29 * This is used to ensure we don't load something for the wrong architecture.
30 */
31#define elf_check_arch(x) ((x)->e_machine == EM_TI_C6000)
32
33#define elf_check_const_displacement(x) (1)
34
35/*
36 * These are used to set parameters in the core dumps.
37 */
38#ifdef __LITTLE_ENDIAN__
39#define ELF_DATA ELFDATA2LSB
40#else
41#define ELF_DATA ELFDATA2MSB
42#endif
43
44#define ELF_CLASS ELFCLASS32
45#define ELF_ARCH EM_TI_C6000
46
47/* Nothing for now. Need to setup DP... */
48#define ELF_PLAT_INIT(_r)
49
50#define USE_ELF_CORE_DUMP
51#define ELF_EXEC_PAGESIZE 4096
52
53#define ELF_CORE_COPY_REGS(_dest, _regs) \
54 memcpy((char *) &_dest, (char *) _regs, \
55 sizeof(struct pt_regs));
56
57/* This yields a mask that user programs can use to figure out what
58 instruction set this cpu supports. */
59
60#define ELF_HWCAP (0)
61
62/* This yields a string that ld.so will use to load implementation
63 specific libraries for optimization. This is more specific in
64 intent than poking at uname or /proc/cpuinfo. */
65
66#define ELF_PLATFORM (NULL)
67
68#define SET_PERSONALITY(ex) set_personality(PER_LINUX)
69
70/* C6X specific section types */
71#define SHT_C6000_UNWIND 0x70000001
72#define SHT_C6000_PREEMPTMAP 0x70000002
73#define SHT_C6000_ATTRIBUTES 0x70000003
74
75/* C6X specific DT_ tags */
76#define DT_C6000_DSBT_BASE 0x70000000
77#define DT_C6000_DSBT_SIZE 0x70000001
78#define DT_C6000_PREEMPTMAP 0x70000002
79#define DT_C6000_DSBT_INDEX 0x70000003
80
81/* C6X specific relocs */
82#define R_C6000_NONE 0
83#define R_C6000_ABS32 1
84#define R_C6000_ABS16 2
85#define R_C6000_ABS8 3
86#define R_C6000_PCR_S21 4
87#define R_C6000_PCR_S12 5
88#define R_C6000_PCR_S10 6
89#define R_C6000_PCR_S7 7
90#define R_C6000_ABS_S16 8
91#define R_C6000_ABS_L16 9
92#define R_C6000_ABS_H16 10
93#define R_C6000_SBR_U15_B 11
94#define R_C6000_SBR_U15_H 12
95#define R_C6000_SBR_U15_W 13
96#define R_C6000_SBR_S16 14
97#define R_C6000_SBR_L16_B 15
98#define R_C6000_SBR_L16_H 16
99#define R_C6000_SBR_L16_W 17
100#define R_C6000_SBR_H16_B 18
101#define R_C6000_SBR_H16_H 19
102#define R_C6000_SBR_H16_W 20
103#define R_C6000_SBR_GOT_U15_W 21
104#define R_C6000_SBR_GOT_L16_W 22
105#define R_C6000_SBR_GOT_H16_W 23
106#define R_C6000_DSBT_INDEX 24
107#define R_C6000_PREL31 25
108#define R_C6000_COPY 26
109#define R_C6000_ALIGN 253
110#define R_C6000_FPHEAD 254
111#define R_C6000_NOCMP 255
112
113#endif /*_ASM_C6X_ELF_H */
diff --git a/arch/c6x/include/asm/ftrace.h b/arch/c6x/include/asm/ftrace.h
new file mode 100644
index 000000000000..3701958d3d1c
--- /dev/null
+++ b/arch/c6x/include/asm/ftrace.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_C6X_FTRACE_H
2#define _ASM_C6X_FTRACE_H
3
4/* empty */
5
6#endif /* _ASM_C6X_FTRACE_H */
diff --git a/arch/c6x/include/asm/linkage.h b/arch/c6x/include/asm/linkage.h
new file mode 100644
index 000000000000..376925c47d57
--- /dev/null
+++ b/arch/c6x/include/asm/linkage.h
@@ -0,0 +1,30 @@
1#ifndef _ASM_C6X_LINKAGE_H
2#define _ASM_C6X_LINKAGE_H
3
4#ifdef __ASSEMBLER__
5
6#define __ALIGN .align 2
7#define __ALIGN_STR ".align 2"
8
9#ifndef __DSBT__
10#define ENTRY(name) \
11 .global name @ \
12 __ALIGN @ \
13name:
14#else
15#define ENTRY(name) \
16 .global name @ \
17 .hidden name @ \
18 __ALIGN @ \
19name:
20#endif
21
22#define ENDPROC(name) \
23 .type name, @function @ \
24 .size name, . - name
25
26#endif
27
28#include <asm-generic/linkage.h>
29
30#endif /* _ASM_C6X_LINKAGE_H */
diff --git a/arch/c6x/include/asm/memblock.h b/arch/c6x/include/asm/memblock.h
new file mode 100644
index 000000000000..1181a979a823
--- /dev/null
+++ b/arch/c6x/include/asm/memblock.h
@@ -0,0 +1,4 @@
1#ifndef _ASM_C6X_MEMBLOCK_H
2#define _ASM_C6X_MEMBLOCK_H
3
4#endif /* _ASM_C6X_MEMBLOCK_H */
diff --git a/arch/c6x/include/asm/mmu.h b/arch/c6x/include/asm/mmu.h
new file mode 100644
index 000000000000..41592bf16067
--- /dev/null
+++ b/arch/c6x/include/asm/mmu.h
@@ -0,0 +1,18 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_MMU_H
12#define _ASM_C6X_MMU_H
13
14typedef struct {
15 unsigned long end_brk;
16} mm_context_t;
17
18#endif /* _ASM_C6X_MMU_H */
diff --git a/arch/c6x/include/asm/mutex.h b/arch/c6x/include/asm/mutex.h
new file mode 100644
index 000000000000..7a7248e0462d
--- /dev/null
+++ b/arch/c6x/include/asm/mutex.h
@@ -0,0 +1,6 @@
1#ifndef _ASM_C6X_MUTEX_H
2#define _ASM_C6X_MUTEX_H
3
4#include <asm-generic/mutex-null.h>
5
6#endif /* _ASM_C6X_MUTEX_H */
diff --git a/arch/c6x/include/asm/page.h b/arch/c6x/include/asm/page.h
new file mode 100644
index 000000000000..d18e2b0c7aea
--- /dev/null
+++ b/arch/c6x/include/asm/page.h
@@ -0,0 +1,11 @@
1#ifndef _ASM_C6X_PAGE_H
2#define _ASM_C6X_PAGE_H
3
4#define VM_DATA_DEFAULT_FLAGS \
5 (VM_READ | VM_WRITE | \
6 ((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
7 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
8
9#include <asm-generic/page.h>
10
11#endif /* _ASM_C6X_PAGE_H */
diff --git a/arch/c6x/include/asm/pgtable.h b/arch/c6x/include/asm/pgtable.h
new file mode 100644
index 000000000000..68c8af4f1f97
--- /dev/null
+++ b/arch/c6x/include/asm/pgtable.h
@@ -0,0 +1,81 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_PGTABLE_H
12#define _ASM_C6X_PGTABLE_H
13
14#include <asm-generic/4level-fixup.h>
15
16#include <asm/setup.h>
17#include <asm/page.h>
18
19/*
20 * All 32bit addresses are effectively valid for vmalloc...
21 * Sort of meaningless for non-VM targets.
22 */
23#define VMALLOC_START 0
24#define VMALLOC_END 0xffffffff
25
26#define pgd_present(pgd) (1)
27#define pgd_none(pgd) (0)
28#define pgd_bad(pgd) (0)
29#define pgd_clear(pgdp)
30#define kern_addr_valid(addr) (1)
31
32#define pmd_offset(a, b) ((void *)0)
33#define pmd_none(x) (!pmd_val(x))
34#define pmd_present(x) (pmd_val(x))
35#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
36#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
37
38#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
39#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
40#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
41#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
42#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
43#define pgprot_noncached(prot) (prot)
44
45extern void paging_init(void);
46
47#define __swp_type(x) (0)
48#define __swp_offset(x) (0)
49#define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
50#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
51#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
52
53static inline int pte_file(pte_t pte)
54{
55 return 0;
56}
57
58#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
59#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
60
61/*
62 * ZERO_PAGE is a global shared page that is always zero: used
63 * for zero-mapped memory areas etc..
64 */
65#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
66extern unsigned long empty_zero_page;
67
68#define swapper_pg_dir ((pgd_t *) 0)
69
70/*
71 * No page table caches to initialise
72 */
73#define pgtable_cache_init() do { } while (0)
74#define io_remap_pfn_range remap_pfn_range
75
76#define io_remap_page_range(vma, vaddr, paddr, size, prot) \
77 remap_pfn_range(vma, vaddr, (paddr) >> PAGE_SHIFT, size, prot)
78
79#include <asm-generic/pgtable.h>
80
81#endif /* _ASM_C6X_PGTABLE_H */
diff --git a/arch/c6x/include/asm/procinfo.h b/arch/c6x/include/asm/procinfo.h
new file mode 100644
index 000000000000..c139d1e71f87
--- /dev/null
+++ b/arch/c6x/include/asm/procinfo.h
@@ -0,0 +1,28 @@
1/*
2 * Copyright (C) 2010 Texas Instruments Incorporated
3 * Author: Mark Salter (msalter@redhat.com)
4 *
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#ifndef _ASM_C6X_PROCINFO_H
11#define _ASM_C6X_PROCINFO_H
12
13#ifdef __KERNEL__
14
15struct proc_info_list {
16 unsigned int cpu_val;
17 unsigned int cpu_mask;
18 const char *arch_name;
19 const char *elf_name;
20 unsigned int elf_hwcap;
21};
22
23#else /* __KERNEL__ */
24#include <asm/elf.h>
25#warning "Please include asm/elf.h instead"
26#endif /* __KERNEL__ */
27
28#endif /* _ASM_C6X_PROCINFO_H */
diff --git a/arch/c6x/include/asm/prom.h b/arch/c6x/include/asm/prom.h
new file mode 100644
index 000000000000..b4ec95f07518
--- /dev/null
+++ b/arch/c6x/include/asm/prom.h
@@ -0,0 +1 @@
/* dummy prom.h; here to make linux/of.h's #includes happy */
diff --git a/arch/c6x/include/asm/sections.h b/arch/c6x/include/asm/sections.h
new file mode 100644
index 000000000000..f703989d837a
--- /dev/null
+++ b/arch/c6x/include/asm/sections.h
@@ -0,0 +1,12 @@
1#ifndef _ASM_C6X_SECTIONS_H
2#define _ASM_C6X_SECTIONS_H
3
4#include <asm-generic/sections.h>
5
6extern char _vectors_start[];
7extern char _vectors_end[];
8
9extern char _data_lma[];
10extern char _fdt_start[], _fdt_end[];
11
12#endif /* _ASM_C6X_SECTIONS_H */
diff --git a/arch/c6x/include/asm/setup.h b/arch/c6x/include/asm/setup.h
new file mode 100644
index 000000000000..1808f279f82e
--- /dev/null
+++ b/arch/c6x/include/asm/setup.h
@@ -0,0 +1,32 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SETUP_H
12#define _ASM_C6X_SETUP_H
13
14#define COMMAND_LINE_SIZE 1024
15
16#ifndef __ASSEMBLY__
17extern char c6x_command_line[COMMAND_LINE_SIZE];
18
19extern int c6x_add_memory(phys_addr_t start, unsigned long size);
20
21extern unsigned long ram_start;
22extern unsigned long ram_end;
23
24extern int c6x_num_cores;
25extern unsigned int c6x_silicon_rev;
26extern unsigned int c6x_devstat;
27extern unsigned char c6x_fuse_mac[6];
28
29extern void machine_init(unsigned long dt_ptr);
30
31#endif /* !__ASSEMBLY__ */
32#endif /* _ASM_C6X_SETUP_H */
diff --git a/arch/c6x/include/asm/string.h b/arch/c6x/include/asm/string.h
new file mode 100644
index 000000000000..b21517c80a17
--- /dev/null
+++ b/arch/c6x/include/asm/string.h
@@ -0,0 +1,21 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_STRING_H
12#define _ASM_C6X_STRING_H
13
14#include <asm/page.h>
15#include <linux/linkage.h>
16
17asmlinkage extern void *memcpy(void *to, const void *from, size_t n);
18
19#define __HAVE_ARCH_MEMCPY
20
21#endif /* _ASM_C6X_STRING_H */
diff --git a/arch/c6x/include/asm/swab.h b/arch/c6x/include/asm/swab.h
new file mode 100644
index 000000000000..fd4bb0520e5e
--- /dev/null
+++ b/arch/c6x/include/asm/swab.h
@@ -0,0 +1,54 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated
3 * Author: Mark Salter <msalter@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#ifndef _ASM_C6X_SWAB_H
10#define _ASM_C6X_SWAB_H
11
12static inline __attribute_const__ __u16 __c6x_swab16(__u16 val)
13{
14 asm("swap4 .l1 %0,%0\n" : "+a"(val));
15 return val;
16}
17
18static inline __attribute_const__ __u32 __c6x_swab32(__u32 val)
19{
20 asm("swap4 .l1 %0,%0\n"
21 "swap2 .l1 %0,%0\n"
22 : "+a"(val));
23 return val;
24}
25
26static inline __attribute_const__ __u64 __c6x_swab64(__u64 val)
27{
28 asm(" swap2 .s1 %p0,%P0\n"
29 "|| swap2 .l1 %P0,%p0\n"
30 " swap4 .l1 %p0,%p0\n"
31 " swap4 .l1 %P0,%P0\n"
32 : "+a"(val));
33 return val;
34}
35
36static inline __attribute_const__ __u32 __c6x_swahw32(__u32 val)
37{
38 asm("swap2 .l1 %0,%0\n" : "+a"(val));
39 return val;
40}
41
42static inline __attribute_const__ __u32 __c6x_swahb32(__u32 val)
43{
44 asm("swap4 .l1 %0,%0\n" : "+a"(val));
45 return val;
46}
47
48#define __arch_swab16 __c6x_swab16
49#define __arch_swab32 __c6x_swab32
50#define __arch_swab64 __c6x_swab64
51#define __arch_swahw32 __c6x_swahw32
52#define __arch_swahb32 __c6x_swahb32
53
54#endif /* _ASM_C6X_SWAB_H */
diff --git a/arch/c6x/include/asm/syscall.h b/arch/c6x/include/asm/syscall.h
new file mode 100644
index 000000000000..ae2be315ee9c
--- /dev/null
+++ b/arch/c6x/include/asm/syscall.h
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated
3 * Author: Mark Salter <msalter@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11#ifndef __ASM_C6X_SYSCALL_H
12#define __ASM_C6X_SYSCALL_H
13
14#include <linux/err.h>
15#include <linux/sched.h>
16
17static inline int syscall_get_nr(struct task_struct *task,
18 struct pt_regs *regs)
19{
20 return regs->b0;
21}
22
23static inline void syscall_rollback(struct task_struct *task,
24 struct pt_regs *regs)
25{
26 /* do nothing */
27}
28
29static inline long syscall_get_error(struct task_struct *task,
30 struct pt_regs *regs)
31{
32 return IS_ERR_VALUE(regs->a4) ? regs->a4 : 0;
33}
34
35static inline long syscall_get_return_value(struct task_struct *task,
36 struct pt_regs *regs)
37{
38 return regs->a4;
39}
40
41static inline void syscall_set_return_value(struct task_struct *task,
42 struct pt_regs *regs,
43 int error, long val)
44{
45 regs->a4 = error ?: val;
46}
47
48static inline void syscall_get_arguments(struct task_struct *task,
49 struct pt_regs *regs, unsigned int i,
50 unsigned int n, unsigned long *args)
51{
52 switch (i) {
53 case 0:
54 if (!n--)
55 break;
56 *args++ = regs->a4;
57 case 1:
58 if (!n--)
59 break;
60 *args++ = regs->b4;
61 case 2:
62 if (!n--)
63 break;
64 *args++ = regs->a6;
65 case 3:
66 if (!n--)
67 break;
68 *args++ = regs->b6;
69 case 4:
70 if (!n--)
71 break;
72 *args++ = regs->a8;
73 case 5:
74 if (!n--)
75 break;
76 *args++ = regs->b8;
77 case 6:
78 if (!n--)
79 break;
80 default:
81 BUG();
82 }
83}
84
85static inline void syscall_set_arguments(struct task_struct *task,
86 struct pt_regs *regs,
87 unsigned int i, unsigned int n,
88 const unsigned long *args)
89{
90 switch (i) {
91 case 0:
92 if (!n--)
93 break;
94 regs->a4 = *args++;
95 case 1:
96 if (!n--)
97 break;
98 regs->b4 = *args++;
99 case 2:
100 if (!n--)
101 break;
102 regs->a6 = *args++;
103 case 3:
104 if (!n--)
105 break;
106 regs->b6 = *args++;
107 case 4:
108 if (!n--)
109 break;
110 regs->a8 = *args++;
111 case 5:
112 if (!n--)
113 break;
114 regs->a9 = *args++;
115 case 6:
116 if (!n)
117 break;
118 default:
119 BUG();
120 }
121}
122
123#endif /* __ASM_C6X_SYSCALLS_H */
diff --git a/arch/c6x/include/asm/system.h b/arch/c6x/include/asm/system.h
new file mode 100644
index 000000000000..e076dc0eacc8
--- /dev/null
+++ b/arch/c6x/include/asm/system.h
@@ -0,0 +1,168 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASM_C6X_SYSTEM_H
12#define _ASM_C6X_SYSTEM_H
13
14#include <linux/linkage.h>
15#include <linux/irqflags.h>
16
17#define prepare_to_switch() do { } while (0)
18
19struct task_struct;
20struct thread_struct;
21asmlinkage void *__switch_to(struct thread_struct *prev,
22 struct thread_struct *next,
23 struct task_struct *tsk);
24
25#define switch_to(prev, next, last) \
26 do { \
27 current->thread.wchan = (u_long) __builtin_return_address(0); \
28 (last) = __switch_to(&(prev)->thread, \
29 &(next)->thread, (prev)); \
30 mb(); \
31 current->thread.wchan = 0; \
32 } while (0)
33
34/* Reset the board */
35#define HARD_RESET_NOW()
36
37#define get_creg(reg) \
38 ({ unsigned int __x; \
39 asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
40
41#define set_creg(reg, v) \
42 do { unsigned int __x = (unsigned int)(v); \
43 asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
44 } while (0)
45
46#define or_creg(reg, n) \
47 do { unsigned __x, __n = (unsigned)(n); \
48 asm volatile ("mvc .s2 " #reg ",%0\n" \
49 "or .l2 %1,%0,%0\n" \
50 "mvc .s2 %0," #reg "\n" \
51 "nop\n" \
52 : "=&b"(__x) : "b"(__n)); \
53 } while (0)
54
55#define and_creg(reg, n) \
56 do { unsigned __x, __n = (unsigned)(n); \
57 asm volatile ("mvc .s2 " #reg ",%0\n" \
58 "and .l2 %1,%0,%0\n" \
59 "mvc .s2 %0," #reg "\n" \
60 "nop\n" \
61 : "=&b"(__x) : "b"(__n)); \
62 } while (0)
63
64#define get_coreid() (get_creg(DNUM) & 0xff)
65
66/* Set/get IST */
67#define set_ist(x) set_creg(ISTP, x)
68#define get_ist() get_creg(ISTP)
69
70/*
71 * Exception management
72 */
73asmlinkage void enable_exception(void);
74#define disable_exception()
75#define get_except_type() get_creg(EFR)
76#define ack_exception(type) set_creg(ECR, 1 << (type))
77#define get_iexcept() get_creg(IERR)
78#define set_iexcept(mask) set_creg(IERR, (mask))
79
80/*
81 * Misc. functions
82 */
83#define nop() asm("NOP\n");
84#define mb() barrier()
85#define rmb() barrier()
86#define wmb() barrier()
87#define set_mb(var, value) do { var = value; mb(); } while (0)
88#define set_wmb(var, value) do { var = value; wmb(); } while (0)
89
90#define smp_mb() barrier()
91#define smp_rmb() barrier()
92#define smp_wmb() barrier()
93#define smp_read_barrier_depends() do { } while (0)
94
95#define xchg(ptr, x) \
96 ((__typeof__(*(ptr)))__xchg((unsigned int)(x), (void *) (ptr), \
97 sizeof(*(ptr))))
98#define tas(ptr) xchg((ptr), 1)
99
100unsigned int _lmbd(unsigned int, unsigned int);
101unsigned int _bitr(unsigned int);
102
103struct __xchg_dummy { unsigned int a[100]; };
104#define __xg(x) ((volatile struct __xchg_dummy *)(x))
105
106static inline unsigned int __xchg(unsigned int x, volatile void *ptr, int size)
107{
108 unsigned int tmp;
109 unsigned long flags;
110
111 local_irq_save(flags);
112
113 switch (size) {
114 case 1:
115 tmp = 0;
116 tmp = *((unsigned char *) ptr);
117 *((unsigned char *) ptr) = (unsigned char) x;
118 break;
119 case 2:
120 tmp = 0;
121 tmp = *((unsigned short *) ptr);
122 *((unsigned short *) ptr) = x;
123 break;
124 case 4:
125 tmp = 0;
126 tmp = *((unsigned int *) ptr);
127 *((unsigned int *) ptr) = x;
128 break;
129 }
130 local_irq_restore(flags);
131 return tmp;
132}
133
134#include <asm-generic/cmpxchg-local.h>
135
136/*
137 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
138 * them available.
139 */
140#define cmpxchg_local(ptr, o, n) \
141 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), \
142 (unsigned long)(o), \
143 (unsigned long)(n), \
144 sizeof(*(ptr))))
145#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
146
147#include <asm-generic/cmpxchg.h>
148
149#define _extu(x, s, e) \
150 ({ unsigned int __x; \
151 asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
152 "=b"(__x) : "n"(s), "n"(e), "b"(x)); \
153 __x; })
154
155
156extern unsigned int c6x_core_freq;
157
158struct pt_regs;
159
160extern void die(char *str, struct pt_regs *fp, int nr);
161extern asmlinkage int process_exception(struct pt_regs *regs);
162extern void time_init(void);
163extern void free_initmem(void);
164
165extern void (*c6x_restart)(void);
166extern void (*c6x_halt)(void);
167
168#endif /* _ASM_C6X_SYSTEM_H */
diff --git a/arch/c6x/include/asm/tlb.h b/arch/c6x/include/asm/tlb.h
new file mode 100644
index 000000000000..8709e5e29d2d
--- /dev/null
+++ b/arch/c6x/include/asm/tlb.h
@@ -0,0 +1,8 @@
1#ifndef _ASM_C6X_TLB_H
2#define _ASM_C6X_TLB_H
3
4#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
5
6#include <asm-generic/tlb.h>
7
8#endif /* _ASM_C6X_TLB_H */
diff --git a/arch/c6x/include/asm/uaccess.h b/arch/c6x/include/asm/uaccess.h
new file mode 100644
index 000000000000..453dd263bee3
--- /dev/null
+++ b/arch/c6x/include/asm/uaccess.h
@@ -0,0 +1,107 @@
1/*
2 * Copyright (C) 2011 Texas Instruments Incorporated
3 * Author: Mark Salter <msalter@redhat.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9#ifndef _ASM_C6X_UACCESS_H
10#define _ASM_C6X_UACCESS_H
11
12#include <linux/types.h>
13#include <linux/compiler.h>
14#include <linux/string.h>
15
16#ifdef CONFIG_ACCESS_CHECK
17#define __access_ok _access_ok
18#endif
19
20/*
21 * __copy_from_user/copy_to_user are based on ones in asm-generic/uaccess.h
22 *
23 * C6X supports unaligned 32 and 64 bit loads and stores.
24 */
25static inline __must_check long __copy_from_user(void *to,
26 const void __user *from, unsigned long n)
27{
28 u32 tmp32;
29 u64 tmp64;
30
31 if (__builtin_constant_p(n)) {
32 switch (n) {
33 case 1:
34 *(u8 *)to = *(u8 __force *)from;
35 return 0;
36 case 4:
37 asm volatile ("ldnw .d1t1 *%2,%0\n"
38 "nop 4\n"
39 "stnw .d1t1 %0,*%1\n"
40 : "=&a"(tmp32)
41 : "A"(to), "a"(from)
42 : "memory");
43 return 0;
44 case 8:
45 asm volatile ("ldndw .d1t1 *%2,%0\n"
46 "nop 4\n"
47 "stndw .d1t1 %0,*%1\n"
48 : "=&a"(tmp64)
49 : "a"(to), "a"(from)
50 : "memory");
51 return 0;
52 default:
53 break;
54 }
55 }
56
57 memcpy(to, (const void __force *)from, n);
58 return 0;
59}
60
61static inline __must_check long __copy_to_user(void __user *to,
62 const void *from, unsigned long n)
63{
64 u32 tmp32;
65 u64 tmp64;
66
67 if (__builtin_constant_p(n)) {
68 switch (n) {
69 case 1:
70 *(u8 __force *)to = *(u8 *)from;
71 return 0;
72 case 4:
73 asm volatile ("ldnw .d1t1 *%2,%0\n"
74 "nop 4\n"
75 "stnw .d1t1 %0,*%1\n"
76 : "=&a"(tmp32)
77 : "a"(to), "a"(from)
78 : "memory");
79 return 0;
80 case 8:
81 asm volatile ("ldndw .d1t1 *%2,%0\n"
82 "nop 4\n"
83 "stndw .d1t1 %0,*%1\n"
84 : "=&a"(tmp64)
85 : "a"(to), "a"(from)
86 : "memory");
87 return 0;
88 default:
89 break;
90 }
91 }
92
93 memcpy((void __force *)to, from, n);
94 return 0;
95}
96
97#define __copy_to_user __copy_to_user
98#define __copy_from_user __copy_from_user
99
100extern int _access_ok(unsigned long addr, unsigned long size);
101#ifdef CONFIG_ACCESS_CHECK
102#define __access_ok _access_ok
103#endif
104
105#include <asm-generic/uaccess.h>
106
107#endif /* _ASM_C6X_UACCESS_H */
diff --git a/arch/c6x/include/asm/unaligned.h b/arch/c6x/include/asm/unaligned.h
new file mode 100644
index 000000000000..b976cb740eaa
--- /dev/null
+++ b/arch/c6x/include/asm/unaligned.h
@@ -0,0 +1,170 @@
1/*
2 * Port on Texas Instruments TMS320C6x architecture
3 *
4 * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
5 * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
6 * Rewritten for 2.6.3x: Mark Salter <msalter@redhat.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12#ifndef _ASM_C6X_UNALIGNED_H
13#define _ASM_C6X_UNALIGNED_H
14
15#include <linux/swab.h>
16
17/*
18 * The C64x+ can do unaligned word and dword accesses in hardware
19 * using special load/store instructions.
20 */
21
22static inline u16 get_unaligned_le16(const void *p)
23{
24 const u8 *_p = p;
25 return _p[0] | _p[1] << 8;
26}
27
28static inline u16 get_unaligned_be16(const void *p)
29{
30 const u8 *_p = p;
31 return _p[0] << 8 | _p[1];
32}
33
34static inline void put_unaligned_le16(u16 val, void *p)
35{
36 u8 *_p = p;
37 _p[0] = val;
38 _p[1] = val >> 8;
39}
40
41static inline void put_unaligned_be16(u16 val, void *p)
42{
43 u8 *_p = p;
44 _p[0] = val >> 8;
45 _p[1] = val;
46}
47
48static inline u32 get_unaligned32(const void *p)
49{
50 u32 val = (u32) p;
51 asm (" ldnw .d1t1 *%0,%0\n"
52 " nop 4\n"
53 : "+a"(val));
54 return val;
55}
56
57static inline void put_unaligned32(u32 val, void *p)
58{
59 asm volatile (" stnw .d2t1 %0,*%1\n"
60 : : "a"(val), "b"(p) : "memory");
61}
62
63static inline u64 get_unaligned64(const void *p)
64{
65 u64 val;
66 asm volatile (" ldndw .d1t1 *%1,%0\n"
67 " nop 4\n"
68 : "=a"(val) : "a"(p));
69 return val;
70}
71
72static inline void put_unaligned64(u64 val, const void *p)
73{
74 asm volatile (" stndw .d2t1 %0,*%1\n"
75 : : "a"(val), "b"(p) : "memory");
76}
77
78#ifdef CONFIG_CPU_BIG_ENDIAN
79
80#define get_unaligned_le32(p) __swab32(get_unaligned32(p))
81#define get_unaligned_le64(p) __swab64(get_unaligned64(p))
82#define get_unaligned_be32(p) get_unaligned32(p)
83#define get_unaligned_be64(p) get_unaligned64(p)
84#define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p))
85#define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p))
86#define put_unaligned_be32(v, p) put_unaligned32((v), (p))
87#define put_unaligned_be64(v, p) put_unaligned64((v), (p))
88#define get_unaligned __get_unaligned_be
89#define put_unaligned __put_unaligned_be
90
91#else
92
93#define get_unaligned_le32(p) get_unaligned32(p)
94#define get_unaligned_le64(p) get_unaligned64(p)
95#define get_unaligned_be32(p) __swab32(get_unaligned32(p))
96#define get_unaligned_be64(p) __swab64(get_unaligned64(p))
97#define put_unaligned_le32(v, p) put_unaligned32((v), (p))
98#define put_unaligned_le64(v, p) put_unaligned64((v), (p))
99#define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p))
100#define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p))
101#define get_unaligned __get_unaligned_le
102#define put_unaligned __put_unaligned_le
103
104#endif
105
106/*
107 * Cause a link-time error if we try an unaligned access other than
108 * 1,2,4 or 8 bytes long
109 */
110extern int __bad_unaligned_access_size(void);
111
112#define __get_unaligned_le(ptr) (typeof(*(ptr)))({ \
113 sizeof(*(ptr)) == 1 ? *(ptr) : \
114 (sizeof(*(ptr)) == 2 ? get_unaligned_le16((ptr)) : \
115 (sizeof(*(ptr)) == 4 ? get_unaligned_le32((ptr)) : \
116 (sizeof(*(ptr)) == 8 ? get_unaligned_le64((ptr)) : \
117 __bad_unaligned_access_size()))); \
118 })
119
120#define __get_unaligned_be(ptr) (__force typeof(*(ptr)))({ \
121 sizeof(*(ptr)) == 1 ? *(ptr) : \
122 (sizeof(*(ptr)) == 2 ? get_unaligned_be16((ptr)) : \
123 (sizeof(*(ptr)) == 4 ? get_unaligned_be32((ptr)) : \
124 (sizeof(*(ptr)) == 8 ? get_unaligned_be64((ptr)) : \
125 __bad_unaligned_access_size()))); \
126 })
127
128#define __put_unaligned_le(val, ptr) ({ \
129 void *__gu_p = (ptr); \
130 switch (sizeof(*(ptr))) { \
131 case 1: \
132 *(u8 *)__gu_p = (__force u8)(val); \
133 break; \
134 case 2: \
135 put_unaligned_le16((__force u16)(val), __gu_p); \
136 break; \
137 case 4: \
138 put_unaligned_le32((__force u32)(val), __gu_p); \
139 break; \
140 case 8: \
141 put_unaligned_le64((__force u64)(val), __gu_p); \
142 break; \
143 default: \
144 __bad_unaligned_access_size(); \
145 break; \
146 } \
147 (void)0; })
148
149#define __put_unaligned_be(val, ptr) ({ \
150 void *__gu_p = (ptr); \
151 switch (sizeof(*(ptr))) { \
152 case 1: \
153 *(u8 *)__gu_p = (__force u8)(val); \
154 break; \
155 case 2: \
156 put_unaligned_be16((__force u16)(val), __gu_p); \
157 break; \
158 case 4: \
159 put_unaligned_be32((__force u32)(val), __gu_p); \
160 break; \
161 case 8: \
162 put_unaligned_be64((__force u64)(val), __gu_p); \
163 break; \
164 default: \
165 __bad_unaligned_access_size(); \
166 break; \
167 } \
168 (void)0; })
169
170#endif /* _ASM_C6X_UNALIGNED_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 08:27:58 -0500