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authorKukjin Kim <kgene.kim@samsung.com>2014-07-18 15:24:18 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-18 15:24:18 -0400
commita7a30232df01db886473324050d79c3122937c78 (patch)
tree76323b745b44b792173575843a72a2f6baa8a6da /arch
parentf86e0add813a3cc0e338089fa6c0928f5f6dc52d (diff)
parentfce9e5bb25264153f9f002eada41757118d25ba9 (diff)
Merge branch 'v3.17-next/cleanup-samsung' into v3.17-next/dt-s5pv210
Diffstat (limited to 'arch')
-rw-r--r--arch/arc/include/asm/cache.h4
-rw-r--r--arch/arc/include/uapi/asm/ptrace.h1
-rw-r--r--arch/arc/kernel/ctx_sw_asm.S2
-rw-r--r--arch/arc/kernel/devtree.c2
-rw-r--r--arch/arc/kernel/head.S7
-rw-r--r--arch/arc/kernel/ptrace.c4
-rw-r--r--arch/arc/kernel/smp.c15
-rw-r--r--arch/arc/kernel/vmlinux.lds.S2
-rw-r--r--arch/arc/mm/cache_arc700.c25
-rw-r--r--arch/arm/Kconfig.debug20
-rw-r--r--arch/arm/boot/dts/Makefile2
-rw-r--r--arch/arm/boot/dts/am335x-evm.dts4
-rw-r--r--arch/arm/boot/dts/am335x-evmsk.dts4
-rw-r--r--arch/arm/boot/dts/am335x-igep0033.dtsi6
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts4
-rw-r--r--arch/arm/boot/dts/armada-380.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-385-db.dts2
-rw-r--r--arch/arm/boot/dts/armada-385-rd.dts2
-rw-r--r--arch/arm/boot/dts/armada-385.dtsi2
-rw-r--r--arch/arm/boot/dts/armada-38x.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9261.dtsi21
-rw-r--r--arch/arm/boot/dts/at91sam9261ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi6
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts1
-rw-r--r--arch/arm/boot/dts/dra7.dtsi12
-rw-r--r--arch/arm/boot/dts/dra7xx-clocks.dtsi26
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi4
-rw-r--r--arch/arm/boot/dts/exynos5420.dtsi5
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts10
-rw-r--r--arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts4
-rw-r--r--arch/arm/boot/dts/imx53-m53evk.dts40
-rw-r--r--arch/arm/boot/dts/imx6dl-hummingboard.dts10
-rw-r--r--arch/arm/boot/dts/imx6q-gw51xx.dts2
-rw-r--r--arch/arm/boot/dts/imx6qdl-cubox-i.dtsi27
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw51xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw52xx.dtsi4
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw53xx.dtsi2
-rw-r--r--arch/arm/boot/dts/imx6qdl-microsom.dtsi13
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts4
-rw-r--r--arch/arm/boot/dts/omap3-beagle-xm.dts6
-rw-r--r--arch/arm/boot/dts/omap3-evm-common.dtsi7
-rw-r--r--arch/arm/boot/dts/omap3-n900.dts5
-rw-r--r--arch/arm/boot/dts/omap5.dtsi1
-rw-r--r--arch/arm/boot/dts/stih415.dtsi8
-rw-r--r--arch/arm/boot/dts/stih416-b2020e.dts (renamed from arch/arm/boot/dts/stih416-b2020-revE.dts)0
-rw-r--r--arch/arm/boot/dts/stih416.dtsi8
-rw-r--r--arch/arm/common/scoop.c1
-rw-r--r--arch/arm/configs/bcm_defconfig2
-rw-r--r--arch/arm/configs/imx_v6_v7_defconfig1
-rw-r--r--arch/arm/configs/multi_v7_defconfig4
-rw-r--r--arch/arm/configs/mvebu_v7_defconfig2
-rw-r--r--arch/arm/include/asm/mcpm.h2
-rw-r--r--arch/arm/include/asm/thread_info.h6
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c30
-rw-r--r--arch/arm/kernel/kprobes-test.c10
-rw-r--r--arch/arm/kernel/perf_event_v7.c4
-rw-r--r--arch/arm/kernel/probes-arm.c6
-rw-r--r--arch/arm/kernel/ptrace.c7
-rw-r--r--arch/arm/mach-exynos/common.h13
-rw-r--r--arch/arm/mach-exynos/exynos.c52
-rw-r--r--arch/arm/mach-exynos/firmware.c9
-rw-r--r--arch/arm/mach-exynos/headsmp.S1
-rw-r--r--arch/arm/mach-exynos/hotplug.c11
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h3
-rw-r--r--arch/arm/mach-exynos/include/mach/memory.h3
-rw-r--r--arch/arm/mach-exynos/mcpm-exynos.c11
-rw-r--r--arch/arm/mach-exynos/platsmp.c3
-rw-r--r--arch/arm/mach-exynos/pm.c16
-rw-r--r--arch/arm/mach-exynos/pm_domains.c68
-rw-r--r--arch/arm/mach-exynos/pmu.c1
-rw-r--r--arch/arm/mach-exynos/regs-pmu.h4
-rw-r--r--arch/arm/mach-exynos/regs-sys.h22
-rw-r--r--arch/arm/mach-imx/Kconfig12
-rw-r--r--arch/arm/mach-imx/clk-gate2.c31
-rw-r--r--arch/arm/mach-imx/clk-imx6sl.c1
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c26
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c23
-rw-r--r--arch/arm/mach-mvebu/Kconfig2
-rw-r--r--arch/arm/mach-mvebu/Makefile2
-rw-r--r--arch/arm/mach-mvebu/board-v7.c29
-rw-r--r--arch/arm/mach-mvebu/pmsu.c9
-rw-r--r--arch/arm/mach-mvebu/pmsu_ll.S25
-rw-r--r--arch/arm/mach-omap2/Kconfig4
-rw-r--r--arch/arm/mach-omap2/Makefile6
-rw-r--r--arch/arm/mach-omap2/clkt_dpll.c2
-rw-r--r--arch/arm/mach-omap2/cm-regbits-34xx.h3
-rw-r--r--arch/arm/mach-omap2/cm33xx.h2
-rw-r--r--arch/arm/mach-omap2/common.h4
-rw-r--r--arch/arm/mach-omap2/devices.c28
-rw-r--r--arch/arm/mach-omap2/dsp.c10
-rw-r--r--arch/arm/mach-omap2/gpmc.c2
-rw-r--r--arch/arm/mach-omap2/id.c12
-rw-r--r--arch/arm/mach-omap2/mux.c6
-rw-r--r--arch/arm/mach-omap2/omap4-common.c20
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c6
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_54xx_data.c73
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c18
-rw-r--r--arch/arm/mach-omap2/prm-regbits-34xx.h6
-rw-r--r--arch/arm/mach-omap2/soc.h1
-rw-r--r--arch/arm/mach-sa1100/collie.c7
-rw-r--r--arch/arm/mach-sti/Kconfig4
-rw-r--r--arch/arm/mach-sunxi/sunxi.c77
-rw-r--r--arch/arm/mach-ux500/Kconfig2
-rw-r--r--arch/arm/mach-vexpress/Kconfig2
-rw-r--r--arch/arm/mm/Kconfig9
-rw-r--r--arch/arm/mm/cache-l2x0.c33
-rw-r--r--arch/arm/mm/nommu.c1
-rw-r--r--arch/arm/mm/proc-arm925.S1
-rw-r--r--arch/arm64/include/asm/memory.h2
-rw-r--r--arch/arm64/include/asm/pgtable.h2
-rw-r--r--arch/arm64/include/asm/ptrace.h4
-rw-r--r--arch/arm64/kernel/efi-entry.S3
-rw-r--r--arch/arm64/kernel/head.S3
-rw-r--r--arch/arm64/mm/copypage.c2
-rw-r--r--arch/arm64/mm/flush.c3
-rw-r--r--arch/ia64/include/uapi/asm/fcntl.h1
-rw-r--r--arch/m68k/kernel/head.S3
-rw-r--r--arch/m68k/kernel/time.c2
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/include/asm/sigcontext.h2
-rw-r--r--arch/mips/include/asm/uasm.h4
-rw-r--r--arch/mips/include/uapi/asm/inst.h1
-rw-r--r--arch/mips/include/uapi/asm/sigcontext.h8
-rw-r--r--arch/mips/kernel/asm-offsets.c3
-rw-r--r--arch/mips/kernel/irq-msc01.c2
-rw-r--r--arch/mips/kernel/pm-cps.c4
-rw-r--r--arch/mips/kernel/r4k_fpu.S213
-rw-r--r--arch/mips/kernel/signal.c79
-rw-r--r--arch/mips/kernel/signal32.c74
-rw-r--r--arch/mips/kernel/smp-cps.c2
-rw-r--r--arch/mips/kvm/kvm_mips.c1
-rw-r--r--arch/mips/math-emu/ieee754.c23
-rw-r--r--arch/mips/mm/uasm-micromips.c1
-rw-r--r--arch/mips/mm/uasm-mips.c3
-rw-r--r--arch/mips/mm/uasm.c10
-rw-r--r--arch/mips/net/bpf_jit.c266
-rw-r--r--arch/parisc/kernel/hardware.c3
-rw-r--r--arch/parisc/kernel/sys_parisc32.c46
-rw-r--r--arch/parisc/kernel/syscall_table.S2
-rw-r--r--arch/powerpc/Kconfig3
-rw-r--r--arch/powerpc/Kconfig.debug1
-rw-r--r--arch/powerpc/include/asm/code-patching.h11
-rw-r--r--arch/powerpc/include/asm/mmu.h10
-rw-r--r--arch/powerpc/include/asm/opal.h29
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h3
-rw-r--r--arch/powerpc/include/asm/swab.h43
-rw-r--r--arch/powerpc/kernel/ftrace.c52
-rw-r--r--arch/powerpc/kernel/idle_power7.S2
-rw-r--r--arch/powerpc/kernel/iomap.c20
-rw-r--r--arch/powerpc/kernel/kprobes.c9
-rw-r--r--arch/powerpc/kernel/module_64.c11
-rw-r--r--arch/powerpc/kernel/prom.c7
-rw-r--r--arch/powerpc/kernel/prom_init.c211
-rw-r--r--arch/powerpc/kernel/prom_init_check.sh4
-rw-r--r--arch/powerpc/kernel/setup-common.c10
-rw-r--r--arch/powerpc/kernel/signal_32.c9
-rw-r--r--arch/powerpc/kernel/signal_64.c9
-rw-r--r--arch/powerpc/kvm/book3s_hv_interrupts.S5
-rw-r--r--arch/powerpc/mm/mmu_context_nohash.c12
-rw-r--r--arch/powerpc/perf/core-book3s.c26
-rw-r--r--arch/powerpc/perf/power8-pmu.c2
-rw-r--r--arch/powerpc/platforms/cell/cbe_thermal.c2
-rw-r--r--arch/powerpc/platforms/cell/spu_syscalls.c2
-rw-r--r--arch/powerpc/platforms/cell/spufs/Makefile3
-rw-r--r--arch/powerpc/platforms/cell/spufs/syscalls.c6
-rw-r--r--arch/powerpc/platforms/powernv/Makefile2
-rw-r--r--arch/powerpc/platforms/powernv/opal-takeover.S140
-rw-r--r--arch/powerpc/sysdev/dart_iommu.c5
-rw-r--r--arch/s390/include/uapi/asm/Kbuild1
-rw-r--r--arch/s390/include/uapi/asm/sie.h26
-rw-r--r--arch/sparc/include/asm/irq_64.h2
-rw-r--r--arch/sparc/kernel/process_64.c18
-rw-r--r--arch/x86/crypto/sha512_ssse3_glue.c2
-rw-r--r--arch/x86/include/asm/irq.h2
-rw-r--r--arch/x86/include/asm/kvm_host.h4
-rw-r--r--arch/x86/include/asm/ptrace.h16
-rw-r--r--arch/x86/kernel/apic/hw_nmi.c18
-rw-r--r--arch/x86/kernel/entry_32.S10
-rw-r--r--arch/x86/kernel/signal.c2
-rw-r--r--arch/x86/kvm/svm.c1
-rw-r--r--arch/x86/kvm/x86.c2
-rw-r--r--arch/x86/vdso/Makefile24
-rw-r--r--arch/x86/vdso/vclock_gettime.c3
-rw-r--r--arch/x86/vdso/vdso-fakesections.c41
-rw-r--r--arch/x86/vdso/vdso-layout.lds.S64
-rw-r--r--arch/x86/vdso/vdso.lds.S2
-rw-r--r--arch/x86/vdso/vdso2c.c73
-rw-r--r--arch/x86/vdso/vdso2c.h202
-rw-r--r--arch/x86/vdso/vdso32/vdso-fakesections.c1
-rw-r--r--arch/x86/vdso/vdsox32.lds.S2
-rw-r--r--arch/x86/vdso/vma.c4
193 files changed, 1494 insertions, 1589 deletions
diff --git a/arch/arc/include/asm/cache.h b/arch/arc/include/asm/cache.h
index c1d3d2da1191..b3c750979aa1 100644
--- a/arch/arc/include/asm/cache.h
+++ b/arch/arc/include/asm/cache.h
@@ -60,7 +60,7 @@ extern void read_decode_cache_bcr(void);
60#define ARC_REG_IC_IVIC 0x10 60#define ARC_REG_IC_IVIC 0x10
61#define ARC_REG_IC_CTRL 0x11 61#define ARC_REG_IC_CTRL 0x11
62#define ARC_REG_IC_IVIL 0x19 62#define ARC_REG_IC_IVIL 0x19
63#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4) 63#if defined(CONFIG_ARC_MMU_V3)
64#define ARC_REG_IC_PTAG 0x1E 64#define ARC_REG_IC_PTAG 0x1E
65#endif 65#endif
66 66
@@ -74,7 +74,7 @@ extern void read_decode_cache_bcr(void);
74#define ARC_REG_DC_IVDL 0x4A 74#define ARC_REG_DC_IVDL 0x4A
75#define ARC_REG_DC_FLSH 0x4B 75#define ARC_REG_DC_FLSH 0x4B
76#define ARC_REG_DC_FLDL 0x4C 76#define ARC_REG_DC_FLDL 0x4C
77#if defined(CONFIG_ARC_MMU_V3) || defined (CONFIG_ARC_MMU_V4) 77#if defined(CONFIG_ARC_MMU_V3)
78#define ARC_REG_DC_PTAG 0x5C 78#define ARC_REG_DC_PTAG 0x5C
79#endif 79#endif
80 80
diff --git a/arch/arc/include/uapi/asm/ptrace.h b/arch/arc/include/uapi/asm/ptrace.h
index 2618cc13ba75..76a7739aab1c 100644
--- a/arch/arc/include/uapi/asm/ptrace.h
+++ b/arch/arc/include/uapi/asm/ptrace.h
@@ -11,6 +11,7 @@
11#ifndef _UAPI__ASM_ARC_PTRACE_H 11#ifndef _UAPI__ASM_ARC_PTRACE_H
12#define _UAPI__ASM_ARC_PTRACE_H 12#define _UAPI__ASM_ARC_PTRACE_H
13 13
14#define PTRACE_GET_THREAD_AREA 25
14 15
15#ifndef __ASSEMBLY__ 16#ifndef __ASSEMBLY__
16/* 17/*
diff --git a/arch/arc/kernel/ctx_sw_asm.S b/arch/arc/kernel/ctx_sw_asm.S
index 2ff0347a2fd7..e248594097e7 100644
--- a/arch/arc/kernel/ctx_sw_asm.S
+++ b/arch/arc/kernel/ctx_sw_asm.S
@@ -10,9 +10,9 @@
10 * -This is the more "natural" hand written assembler 10 * -This is the more "natural" hand written assembler
11 */ 11 */
12 12
13#include <linux/linkage.h>
13#include <asm/entry.h> /* For the SAVE_* macros */ 14#include <asm/entry.h> /* For the SAVE_* macros */
14#include <asm/asm-offsets.h> 15#include <asm/asm-offsets.h>
15#include <asm/linkage.h>
16 16
17#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4) 17#define KSP_WORD_OFF ((TASK_THREAD + THREAD_KSP) / 4)
18 18
diff --git a/arch/arc/kernel/devtree.c b/arch/arc/kernel/devtree.c
index 0b3ef4025d89..fffdb5e41b20 100644
--- a/arch/arc/kernel/devtree.c
+++ b/arch/arc/kernel/devtree.c
@@ -41,7 +41,7 @@ const struct machine_desc * __init setup_machine_fdt(void *dt)
41{ 41{
42 const struct machine_desc *mdesc; 42 const struct machine_desc *mdesc;
43 unsigned long dt_root; 43 unsigned long dt_root;
44 void *clk; 44 const void *clk;
45 int len; 45 int len;
46 46
47 if (!early_init_dt_scan(dt)) 47 if (!early_init_dt_scan(dt))
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 07a58f2d3077..4d2481bd8b98 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -77,10 +77,11 @@ stext:
77 ; Clear BSS before updating any globals 77 ; Clear BSS before updating any globals
78 ; XXX: use ZOL here 78 ; XXX: use ZOL here
79 mov r5, __bss_start 79 mov r5, __bss_start
80 mov r6, __bss_stop 80 sub r6, __bss_stop, r5
81 lsr.f lp_count, r6, 2
82 lpnz 1f
83 st.ab 0, [r5, 4]
811: 841:
82 st.ab 0, [r5,4]
83 brlt r5, r6, 1b
84 85
85 ; Uboot - kernel ABI 86 ; Uboot - kernel ABI
86 ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2 87 ; r0 = [0] No uboot interaction, [1] cmdline in r2, [2] DTB in r2
diff --git a/arch/arc/kernel/ptrace.c b/arch/arc/kernel/ptrace.c
index 5d76706139dd..13b3ffb27a38 100644
--- a/arch/arc/kernel/ptrace.c
+++ b/arch/arc/kernel/ptrace.c
@@ -146,6 +146,10 @@ long arch_ptrace(struct task_struct *child, long request,
146 pr_debug("REQ=%ld: ADDR =0x%lx, DATA=0x%lx)\n", request, addr, data); 146 pr_debug("REQ=%ld: ADDR =0x%lx, DATA=0x%lx)\n", request, addr, data);
147 147
148 switch (request) { 148 switch (request) {
149 case PTRACE_GET_THREAD_AREA:
150 ret = put_user(task_thread_info(child)->thr_ptr,
151 (unsigned long __user *)data);
152 break;
149 default: 153 default:
150 ret = ptrace_request(child, request, addr, data); 154 ret = ptrace_request(child, request, addr, data);
151 break; 155 break;
diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
index cf90b6f4d3e0..c802bb500602 100644
--- a/arch/arc/kernel/smp.c
+++ b/arch/arc/kernel/smp.c
@@ -337,8 +337,19 @@ irqreturn_t do_IPI(int irq, void *dev_id)
337 * API called by platform code to hookup arch-common ISR to their IPI IRQ 337 * API called by platform code to hookup arch-common ISR to their IPI IRQ
338 */ 338 */
339static DEFINE_PER_CPU(int, ipi_dev); 339static DEFINE_PER_CPU(int, ipi_dev);
340
341static struct irqaction arc_ipi_irq = {
342 .name = "IPI Interrupt",
343 .flags = IRQF_PERCPU,
344 .handler = do_IPI,
345};
346
340int smp_ipi_irq_setup(int cpu, int irq) 347int smp_ipi_irq_setup(int cpu, int irq)
341{ 348{
342 int *dev_id = &per_cpu(ipi_dev, smp_processor_id()); 349 if (!cpu)
343 return request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev_id); 350 return setup_irq(irq, &arc_ipi_irq);
351 else
352 arch_unmask_irq(irq);
353
354 return 0;
344} 355}
diff --git a/arch/arc/kernel/vmlinux.lds.S b/arch/arc/kernel/vmlinux.lds.S
index 2555f5886af6..dd35bde39f69 100644
--- a/arch/arc/kernel/vmlinux.lds.S
+++ b/arch/arc/kernel/vmlinux.lds.S
@@ -116,7 +116,7 @@ SECTIONS
116 116
117 _edata = .; 117 _edata = .;
118 118
119 BSS_SECTION(0, 0, 0) 119 BSS_SECTION(4, 4, 4)
120 120
121#ifdef CONFIG_ARC_DW2_UNWIND 121#ifdef CONFIG_ARC_DW2_UNWIND
122 . = ALIGN(PAGE_SIZE); 122 . = ALIGN(PAGE_SIZE);
diff --git a/arch/arc/mm/cache_arc700.c b/arch/arc/mm/cache_arc700.c
index 1f676c4794e0..353b202c37c9 100644
--- a/arch/arc/mm/cache_arc700.c
+++ b/arch/arc/mm/cache_arc700.c
@@ -389,7 +389,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long vaddr,
389/*********************************************************** 389/***********************************************************
390 * Machine specific helper for per line I-Cache invalidate. 390 * Machine specific helper for per line I-Cache invalidate.
391 */ 391 */
392static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr, 392static void __ic_line_inv_vaddr_local(unsigned long paddr, unsigned long vaddr,
393 unsigned long sz) 393 unsigned long sz)
394{ 394{
395 unsigned long flags; 395 unsigned long flags;
@@ -405,6 +405,23 @@ static inline void __ic_entire_inv(void)
405 read_aux_reg(ARC_REG_IC_CTRL); /* blocks */ 405 read_aux_reg(ARC_REG_IC_CTRL); /* blocks */
406} 406}
407 407
408struct ic_line_inv_vaddr_ipi {
409 unsigned long paddr, vaddr;
410 int sz;
411};
412
413static void __ic_line_inv_vaddr_helper(void *info)
414{
415 struct ic_line_inv_vaddr_ipi *ic_inv = (struct ic_line_inv_vaddr_ipi*) info;
416 __ic_line_inv_vaddr_local(ic_inv->paddr, ic_inv->vaddr, ic_inv->sz);
417}
418
419static void __ic_line_inv_vaddr(unsigned long paddr, unsigned long vaddr,
420 unsigned long sz)
421{
422 struct ic_line_inv_vaddr_ipi ic_inv = { paddr, vaddr , sz};
423 on_each_cpu(__ic_line_inv_vaddr_helper, &ic_inv, 1);
424}
408#else 425#else
409 426
410#define __ic_entire_inv() 427#define __ic_entire_inv()
@@ -553,12 +570,8 @@ void flush_icache_range(unsigned long kstart, unsigned long kend)
553 */ 570 */
554void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len) 571void __sync_icache_dcache(unsigned long paddr, unsigned long vaddr, int len)
555{ 572{
556 unsigned long flags;
557
558 local_irq_save(flags);
559 __ic_line_inv_vaddr(paddr, vaddr, len);
560 __dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV); 573 __dc_line_op(paddr, vaddr, len, OP_FLUSH_N_INV);
561 local_irq_restore(flags); 574 __ic_line_inv_vaddr(paddr, vaddr, len);
562} 575}
563 576
564/* wrapper to compile time eliminate alignment checks in flush loop */ 577/* wrapper to compile time eliminate alignment checks in flush loop */
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 8f90595069a1..b7acfa396679 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -617,53 +617,41 @@ choice
617 depends on PLAT_SAMSUNG 617 depends on PLAT_SAMSUNG
618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 618 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
619 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 619 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
620 bool "Use S3C UART 0 for low-level debug" 620 bool "Use Samsung S3C UART 0 for low-level debug"
621 help 621 help
622 Say Y here if you want the debug print routines to direct 622 Say Y here if you want the debug print routines to direct
623 their output to UART 0. The port must have been initialised 623 their output to UART 0. The port must have been initialised
624 by the boot-loader before use. 624 by the boot-loader before use.
625 625
626 The uncompressor code port configuration is now handled
627 by CONFIG_S3C_LOWLEVEL_UART_PORT.
628
629 config DEBUG_S3C_UART1 626 config DEBUG_S3C_UART1
630 depends on PLAT_SAMSUNG 627 depends on PLAT_SAMSUNG
631 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 628 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
632 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 629 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
633 bool "Use S3C UART 1 for low-level debug" 630 bool "Use Samsung S3C UART 1 for low-level debug"
634 help 631 help
635 Say Y here if you want the debug print routines to direct 632 Say Y here if you want the debug print routines to direct
636 their output to UART 1. The port must have been initialised 633 their output to UART 1. The port must have been initialised
637 by the boot-loader before use. 634 by the boot-loader before use.
638 635
639 The uncompressor code port configuration is now handled
640 by CONFIG_S3C_LOWLEVEL_UART_PORT.
641
642 config DEBUG_S3C_UART2 636 config DEBUG_S3C_UART2
643 depends on PLAT_SAMSUNG 637 depends on PLAT_SAMSUNG
644 select DEBUG_EXYNOS_UART if ARCH_EXYNOS 638 select DEBUG_EXYNOS_UART if ARCH_EXYNOS
645 select DEBUG_S3C24XX_UART if ARCH_S3C24XX 639 select DEBUG_S3C24XX_UART if ARCH_S3C24XX
646 bool "Use S3C UART 2 for low-level debug" 640 bool "Use Samsung S3C UART 2 for low-level debug"
647 help 641 help
648 Say Y here if you want the debug print routines to direct 642 Say Y here if you want the debug print routines to direct
649 their output to UART 2. The port must have been initialised 643 their output to UART 2. The port must have been initialised
650 by the boot-loader before use. 644 by the boot-loader before use.
651 645
652 The uncompressor code port configuration is now handled
653 by CONFIG_S3C_LOWLEVEL_UART_PORT.
654
655 config DEBUG_S3C_UART3 646 config DEBUG_S3C_UART3
656 depends on PLAT_SAMSUNG && ARCH_EXYNOS 647 depends on PLAT_SAMSUNG && ARCH_EXYNOS
657 select DEBUG_EXYNOS_UART 648 select DEBUG_EXYNOS_UART
658 bool "Use S3C UART 3 for low-level debug" 649 bool "Use Samsung S3C UART 3 for low-level debug"
659 help 650 help
660 Say Y here if you want the debug print routines to direct 651 Say Y here if you want the debug print routines to direct
661 their output to UART 3. The port must have been initialised 652 their output to UART 3. The port must have been initialised
662 by the boot-loader before use. 653 by the boot-loader before use.
663 654
664 The uncompressor code port configuration is now handled
665 by CONFIG_S3C_LOWLEVEL_UART_PORT.
666
667 config DEBUG_S3C2410_UART0 655 config DEBUG_S3C2410_UART0
668 depends on ARCH_S3C24XX 656 depends on ARCH_S3C24XX
669 select DEBUG_S3C2410_UART 657 select DEBUG_S3C2410_UART
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 5986ff63b901..adb5ed9e269e 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -357,7 +357,7 @@ dtb-$(CONFIG_ARCH_STI)+= stih407-b2120.dtb \
357 stih415-b2020.dtb \ 357 stih415-b2020.dtb \
358 stih416-b2000.dtb \ 358 stih416-b2000.dtb \
359 stih416-b2020.dtb \ 359 stih416-b2020.dtb \
360 stih416-b2020-revE.dtb 360 stih416-b2020e.dtb
361dtb-$(CONFIG_MACH_SUN4I) += \ 361dtb-$(CONFIG_MACH_SUN4I) += \
362 sun4i-a10-a1000.dtb \ 362 sun4i-a10-a1000.dtb \
363 sun4i-a10-cubieboard.dtb \ 363 sun4i-a10-cubieboard.dtb \
diff --git a/arch/arm/boot/dts/am335x-evm.dts b/arch/arm/boot/dts/am335x-evm.dts
index ecb267767cf5..e2156a583de7 100644
--- a/arch/arm/boot/dts/am335x-evm.dts
+++ b/arch/arm/boot/dts/am335x-evm.dts
@@ -529,8 +529,8 @@
529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 529 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
530 0 0 1 2 530 0 0 1 2
531 >; 531 >;
532 tx-num-evt = <1>; 532 tx-num-evt = <32>;
533 rx-num-evt = <1>; 533 rx-num-evt = <32>;
534}; 534};
535 535
536&tps { 536&tps {
diff --git a/arch/arm/boot/dts/am335x-evmsk.dts b/arch/arm/boot/dts/am335x-evmsk.dts
index ab9a34ce524c..80a3b215e7d6 100644
--- a/arch/arm/boot/dts/am335x-evmsk.dts
+++ b/arch/arm/boot/dts/am335x-evmsk.dts
@@ -560,8 +560,8 @@
560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 560 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
561 0 0 1 2 561 0 0 1 2
562 >; 562 >;
563 tx-num-evt = <1>; 563 tx-num-evt = <32>;
564 rx-num-evt = <1>; 564 rx-num-evt = <32>;
565}; 565};
566 566
567&tscadc { 567&tscadc {
diff --git a/arch/arm/boot/dts/am335x-igep0033.dtsi b/arch/arm/boot/dts/am335x-igep0033.dtsi
index 8a0a72dc7dd7..a1a0cc5eb35c 100644
--- a/arch/arm/boot/dts/am335x-igep0033.dtsi
+++ b/arch/arm/boot/dts/am335x-igep0033.dtsi
@@ -105,10 +105,16 @@
105 105
106&cpsw_emac0 { 106&cpsw_emac0 {
107 phy_id = <&davinci_mdio>, <0>; 107 phy_id = <&davinci_mdio>, <0>;
108 phy-mode = "rmii";
108}; 109};
109 110
110&cpsw_emac1 { 111&cpsw_emac1 {
111 phy_id = <&davinci_mdio>, <1>; 112 phy_id = <&davinci_mdio>, <1>;
113 phy-mode = "rmii";
114};
115
116&phy_sel {
117 rmii-clock-ext;
112}; 118};
113 119
114&elm { 120&elm {
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index 19f1f7e87597..90098f98a5c8 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -319,6 +319,10 @@
319 phy-mode = "rmii"; 319 phy-mode = "rmii";
320}; 320};
321 321
322&phy_sel {
323 rmii-clock-ext;
324};
325
322&i2c0 { 326&i2c0 {
323 status = "okay"; 327 status = "okay";
324 pinctrl-names = "default"; 328 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi
index e69bc6759c39..4173a8ab34e7 100644
--- a/arch/arm/boot/dts/armada-380.dtsi
+++ b/arch/arm/boot/dts/armada-380.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 380 family SoC"; 18 model = "Marvell Armada 380 family SoC";
19 compatible = "marvell,armada380", "marvell,armada38x"; 19 compatible = "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-385-db.dts b/arch/arm/boot/dts/armada-385-db.dts
index 5bae4731828b..1af886f1e486 100644
--- a/arch/arm/boot/dts/armada-385-db.dts
+++ b/arch/arm/boot/dts/armada-385-db.dts
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 Development Board"; 18 model = "Marvell Armada 385 Development Board";
19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,a385-db", "marvell,armada385", "marvell,armada380";
20 20
21 chosen { 21 chosen {
22 bootargs = "console=ttyS0,115200 earlyprintk"; 22 bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385-rd.dts b/arch/arm/boot/dts/armada-385-rd.dts
index 40893255a3f0..aaca2861dc87 100644
--- a/arch/arm/boot/dts/armada-385-rd.dts
+++ b/arch/arm/boot/dts/armada-385-rd.dts
@@ -17,7 +17,7 @@
17 17
18/ { 18/ {
19 model = "Marvell Armada 385 Reference Design"; 19 model = "Marvell Armada 385 Reference Design";
20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada38x"; 20 compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380";
21 21
22 chosen { 22 chosen {
23 bootargs = "console=ttyS0,115200 earlyprintk"; 23 bootargs = "console=ttyS0,115200 earlyprintk";
diff --git a/arch/arm/boot/dts/armada-385.dtsi b/arch/arm/boot/dts/armada-385.dtsi
index f011009bf4cf..6283d7912f71 100644
--- a/arch/arm/boot/dts/armada-385.dtsi
+++ b/arch/arm/boot/dts/armada-385.dtsi
@@ -16,7 +16,7 @@
16 16
17/ { 17/ {
18 model = "Marvell Armada 385 family SoC"; 18 model = "Marvell Armada 385 family SoC";
19 compatible = "marvell,armada385", "marvell,armada38x"; 19 compatible = "marvell,armada385", "marvell,armada380";
20 20
21 cpus { 21 cpus {
22 #address-cells = <1>; 22 #address-cells = <1>;
diff --git a/arch/arm/boot/dts/armada-38x.dtsi b/arch/arm/boot/dts/armada-38x.dtsi
index 3de364e81b52..689fa1a46728 100644
--- a/arch/arm/boot/dts/armada-38x.dtsi
+++ b/arch/arm/boot/dts/armada-38x.dtsi
@@ -20,7 +20,7 @@
20 20
21/ { 21/ {
22 model = "Marvell Armada 38x family SoC"; 22 model = "Marvell Armada 38x family SoC";
23 compatible = "marvell,armada38x"; 23 compatible = "marvell,armada380";
24 24
25 aliases { 25 aliases {
26 gpio0 = &gpio0; 26 gpio0 = &gpio0;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index b309c1c6e848..04927db1d6bf 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -568,24 +568,17 @@
568 #size-cells = <0>; 568 #size-cells = <0>;
569 #interrupt-cells = <1>; 569 #interrupt-cells = <1>;
570 570
571 slow_rc_osc: slow_rc_osc { 571 main_osc: main_osc {
572 compatible = "fixed-clock"; 572 compatible = "atmel,at91rm9200-clk-main-osc";
573 #clock-cells = <0>; 573 #clock-cells = <0>;
574 clock-frequency = <32768>; 574 interrupts-extended = <&pmc AT91_PMC_MOSCS>;
575 clock-accuracy = <50000000>; 575 clocks = <&main_xtal>;
576 };
577
578 clk32k: slck {
579 compatible = "atmel,at91sam9260-clk-slow";
580 #clock-cells = <0>;
581 clocks = <&slow_rc_osc &slow_xtal>;
582 }; 576 };
583 577
584 main: mainck { 578 main: mainck {
585 compatible = "atmel,at91rm9200-clk-main"; 579 compatible = "atmel,at91rm9200-clk-main";
586 #clock-cells = <0>; 580 #clock-cells = <0>;
587 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 581 clocks = <&main_osc>;
588 clocks = <&main_xtal>;
589 }; 582 };
590 583
591 plla: pllack { 584 plla: pllack {
@@ -615,7 +608,7 @@
615 compatible = "atmel,at91rm9200-clk-master"; 608 compatible = "atmel,at91rm9200-clk-master";
616 #clock-cells = <0>; 609 #clock-cells = <0>;
617 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 610 interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
618 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 611 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
619 atmel,clk-output-range = <0 94000000>; 612 atmel,clk-output-range = <0 94000000>;
620 atmel,clk-divisors = <1 2 4 0>; 613 atmel,clk-divisors = <1 2 4 0>;
621 }; 614 };
@@ -632,7 +625,7 @@
632 #address-cells = <1>; 625 #address-cells = <1>;
633 #size-cells = <0>; 626 #size-cells = <0>;
634 interrupt-parent = <&pmc>; 627 interrupt-parent = <&pmc>;
635 clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; 628 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
636 629
637 prog0: prog0 { 630 prog0: prog0 {
638 #clock-cells = <0>; 631 #clock-cells = <0>;
diff --git a/arch/arm/boot/dts/at91sam9261ek.dts b/arch/arm/boot/dts/at91sam9261ek.dts
index c6683ea8b743..aa35a7aec9a8 100644
--- a/arch/arm/boot/dts/at91sam9261ek.dts
+++ b/arch/arm/boot/dts/at91sam9261ek.dts
@@ -20,6 +20,10 @@
20 reg = <0x20000000 0x4000000>; 20 reg = <0x20000000 0x4000000>;
21 }; 21 };
22 22
23 slow_xtal {
24 clock-frequency = <32768>;
25 };
26
23 main_xtal { 27 main_xtal {
24 clock-frequency = <18432000>; 28 clock-frequency = <18432000>;
25 }; 29 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index d1b82e6635d5..287795985e32 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -132,8 +132,8 @@
132 <595000000 650000000 3 0>, 132 <595000000 650000000 3 0>,
133 <545000000 600000000 0 1>, 133 <545000000 600000000 0 1>,
134 <495000000 555000000 1 1>, 134 <495000000 555000000 1 1>,
135 <445000000 500000000 1 2>, 135 <445000000 500000000 2 1>,
136 <400000000 450000000 1 3>; 136 <400000000 450000000 3 1>;
137 }; 137 };
138 138
139 plladiv: plladivck { 139 plladiv: plladivck {
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 1a57298636a5..2ebc42140ea6 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -140,8 +140,8 @@
140 595000000 650000000 3 0 140 595000000 650000000 3 0
141 545000000 600000000 0 1 141 545000000 600000000 0 1
142 495000000 555000000 1 1 142 495000000 555000000 1 1
143 445000000 500000000 1 2 143 445000000 500000000 2 1
144 400000000 450000000 1 3>; 144 400000000 450000000 3 1>;
145 }; 145 };
146 146
147 plladiv: plladivck { 147 plladiv: plladivck {
@@ -1045,6 +1045,8 @@
1045 reg = <0x00500000 0x80000 1045 reg = <0x00500000 0x80000
1046 0xf803c000 0x400>; 1046 0xf803c000 0x400>;
1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1047 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1048 clocks = <&usb>, <&udphs_clk>;
1049 clock-names = "hclk", "pclk";
1048 status = "disabled"; 1050 status = "disabled";
1049 1051
1050 ep0 { 1052 ep0 {
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 4adc28039c30..83089540e324 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -240,6 +240,7 @@
240 regulator-name = "ldo3"; 240 regulator-name = "ldo3";
241 regulator-min-microvolt = <1800000>; 241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>; 242 regulator-max-microvolt = <1800000>;
243 regulator-always-on;
243 regulator-boot-on; 244 regulator-boot-on;
244 }; 245 };
245 246
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index c29945e07c5a..80127638b379 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -773,7 +773,6 @@
773 clocks = <&qspi_gfclk_div>; 773 clocks = <&qspi_gfclk_div>;
774 clock-names = "fck"; 774 clock-names = "fck";
775 num-cs = <4>; 775 num-cs = <4>;
776 interrupts = <0 343 0x4>;
777 status = "disabled"; 776 status = "disabled";
778 }; 777 };
779 778
@@ -984,6 +983,17 @@
984 #size-cells = <1>; 983 #size-cells = <1>;
985 status = "disabled"; 984 status = "disabled";
986 }; 985 };
986
987 atl: atl@4843c000 {
988 compatible = "ti,dra7-atl";
989 reg = <0x4843c000 0x3ff>;
990 ti,hwmods = "atl";
991 ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
992 <&atl_clkin2_ck>, <&atl_clkin3_ck>;
993 clocks = <&atl_gfclk_mux>;
994 clock-names = "fck";
995 status = "disabled";
996 };
987 }; 997 };
988}; 998};
989 999
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index b03cfe49d22b..dc7a292fe939 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -10,26 +10,26 @@
10&cm_core_aon_clocks { 10&cm_core_aon_clocks {
11 atl_clkin0_ck: atl_clkin0_ck { 11 atl_clkin0_ck: atl_clkin0_ck {
12 #clock-cells = <0>; 12 #clock-cells = <0>;
13 compatible = "fixed-clock"; 13 compatible = "ti,dra7-atl-clock";
14 clock-frequency = <0>; 14 clocks = <&atl_gfclk_mux>;
15 }; 15 };
16 16
17 atl_clkin1_ck: atl_clkin1_ck { 17 atl_clkin1_ck: atl_clkin1_ck {
18 #clock-cells = <0>; 18 #clock-cells = <0>;
19 compatible = "fixed-clock"; 19 compatible = "ti,dra7-atl-clock";
20 clock-frequency = <0>; 20 clocks = <&atl_gfclk_mux>;
21 }; 21 };
22 22
23 atl_clkin2_ck: atl_clkin2_ck { 23 atl_clkin2_ck: atl_clkin2_ck {
24 #clock-cells = <0>; 24 #clock-cells = <0>;
25 compatible = "fixed-clock"; 25 compatible = "ti,dra7-atl-clock";
26 clock-frequency = <0>; 26 clocks = <&atl_gfclk_mux>;
27 }; 27 };
28 28
29 atl_clkin3_ck: atl_clkin3_ck { 29 atl_clkin3_ck: atl_clkin3_ck {
30 #clock-cells = <0>; 30 #clock-cells = <0>;
31 compatible = "fixed-clock"; 31 compatible = "ti,dra7-atl-clock";
32 clock-frequency = <0>; 32 clocks = <&atl_gfclk_mux>;
33 }; 33 };
34 34
35 hdmi_clkin_ck: hdmi_clkin_ck { 35 hdmi_clkin_ck: hdmi_clkin_ck {
@@ -673,10 +673,12 @@
673 673
674 l3_iclk_div: l3_iclk_div { 674 l3_iclk_div: l3_iclk_div {
675 #clock-cells = <0>; 675 #clock-cells = <0>;
676 compatible = "fixed-factor-clock"; 676 compatible = "ti,divider-clock";
677 ti,max-div = <2>;
678 ti,bit-shift = <4>;
679 reg = <0x0100>;
677 clocks = <&dpll_core_h12x2_ck>; 680 clocks = <&dpll_core_h12x2_ck>;
678 clock-mult = <1>; 681 ti,index-power-of-two;
679 clock-div = <1>;
680 }; 682 };
681 683
682 l4_root_clk_div: l4_root_clk_div { 684 l4_root_clk_div: l4_root_clk_div {
@@ -684,7 +686,7 @@
684 compatible = "fixed-factor-clock"; 686 compatible = "fixed-factor-clock";
685 clocks = <&l3_iclk_div>; 687 clocks = <&l3_iclk_div>;
686 clock-mult = <1>; 688 clock-mult = <1>;
687 clock-div = <1>; 689 clock-div = <2>;
688 }; 690 };
689 691
690 video1_clk2_div: video1_clk2_div { 692 video1_clk2_div: video1_clk2_div {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8ece4be41ca..17b22e9cc2aa 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -113,7 +113,7 @@
113 compatible = "arm,cortex-a9-gic"; 113 compatible = "arm,cortex-a9-gic";
114 #interrupt-cells = <3>; 114 #interrupt-cells = <3>;
115 interrupt-controller; 115 interrupt-controller;
116 reg = <0x10490000 0x1000>, <0x10480000 0x100>; 116 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
117 }; 117 };
118 118
119 combiner: interrupt-controller@10440000 { 119 combiner: interrupt-controller@10440000 {
@@ -554,7 +554,7 @@
554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>; 554 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
555 clocks = <&clock CLK_PWM>; 555 clocks = <&clock CLK_PWM>;
556 clock-names = "timers"; 556 clock-names = "timers";
557 #pwm-cells = <2>; 557 #pwm-cells = <3>;
558 status = "disabled"; 558 status = "disabled";
559 }; 559 };
560 560
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index e38532271ef9..15957227ffda 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -167,7 +167,7 @@
167 compatible = "samsung,exynos5420-audss-clock"; 167 compatible = "samsung,exynos5420-audss-clock";
168 reg = <0x03810000 0x0C>; 168 reg = <0x03810000 0x0C>;
169 #clock-cells = <1>; 169 #clock-cells = <1>;
170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>, 170 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MAU_EPLL>,
171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>; 171 <&clock CLK_SCLK_MAUDIO0>, <&clock CLK_SCLK_MAUPCM0>;
172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in"; 172 clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
173 }; 173 };
@@ -260,6 +260,9 @@
260 mfc_pd: power-domain@10044060 { 260 mfc_pd: power-domain@10044060 {
261 compatible = "samsung,exynos4210-pd"; 261 compatible = "samsung,exynos4210-pd";
262 reg = <0x10044060 0x20>; 262 reg = <0x10044060 0x20>;
263 clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>,
264 <&clock CLK_MOUT_USER_ACLK333>;
265 clock-names = "oscclk", "pclk0", "clk0";
263 }; 266 };
264 267
265 disp_pd: power-domain@100440C0 { 268 disp_pd: power-domain@100440C0 {
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6bc3243a80d3..181d77fa2fa6 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -315,15 +315,15 @@
315&esdhc1 { 315&esdhc1 {
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_esdhc1>; 317 pinctrl-0 = <&pinctrl_esdhc1>;
318 fsl,cd-controller; 318 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
319 fsl,wp-controller; 319 wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
320 status = "okay"; 320 status = "okay";
321}; 321};
322 322
323&esdhc2 { 323&esdhc2 {
324 pinctrl-names = "default"; 324 pinctrl-names = "default";
325 pinctrl-0 = <&pinctrl_esdhc2>; 325 pinctrl-0 = <&pinctrl_esdhc2>;
326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 326 cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 327 wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
328 status = "okay"; 328 status = "okay";
329}; 329};
@@ -468,8 +468,8 @@
468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 468 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 469 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 470 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
471 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 471 MX51_PAD_GPIO1_0__GPIO1_0 0x100
472 MX51_PAD_GPIO1_1__SD1_WP 0x20d5 472 MX51_PAD_GPIO1_1__GPIO1_1 0x100
473 >; 473 >;
474 }; 474 };
475 475
diff --git a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
index 75e66c9c6144..31cfb7f2b02e 100644
--- a/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
+++ b/arch/arm/boot/dts/imx51-eukrea-mbimxsd51-baseboard.dts
@@ -107,7 +107,7 @@
107&esdhc1 { 107&esdhc1 {
108 pinctrl-names = "default"; 108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>; 109 pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
110 fsl,cd-controller; 110 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
111 status = "okay"; 111 status = "okay";
112}; 112};
113 113
@@ -206,7 +206,7 @@
206 206
207 pinctrl_esdhc1_cd: esdhc1_cd { 207 pinctrl_esdhc1_cd: esdhc1_cd {
208 fsl,pins = < 208 fsl,pins = <
209 MX51_PAD_GPIO1_0__SD1_CD 0x20d5 209 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
210 >; 210 >;
211 }; 211 };
212 212
diff --git a/arch/arm/boot/dts/imx53-m53evk.dts b/arch/arm/boot/dts/imx53-m53evk.dts
index d5d146a8b149..c4956b0ffb35 100644
--- a/arch/arm/boot/dts/imx53-m53evk.dts
+++ b/arch/arm/boot/dts/imx53-m53evk.dts
@@ -21,27 +21,25 @@
21 <0xb0000000 0x20000000>; 21 <0xb0000000 0x20000000>;
22 }; 22 };
23 23
24 soc { 24 display1: display@di1 {
25 display1: display@di1 { 25 compatible = "fsl,imx-parallel-display";
26 compatible = "fsl,imx-parallel-display"; 26 interface-pix-fmt = "bgr666";
27 interface-pix-fmt = "bgr666"; 27 pinctrl-names = "default";
28 pinctrl-names = "default"; 28 pinctrl-0 = <&pinctrl_ipu_disp1>;
29 pinctrl-0 = <&pinctrl_ipu_disp1>; 29
30 30 display-timings {
31 display-timings { 31 800x480p60 {
32 800x480p60 { 32 native-mode;
33 native-mode; 33 clock-frequency = <31500000>;
34 clock-frequency = <31500000>; 34 hactive = <800>;
35 hactive = <800>; 35 vactive = <480>;
36 vactive = <480>; 36 hfront-porch = <40>;
37 hfront-porch = <40>; 37 hback-porch = <88>;
38 hback-porch = <88>; 38 hsync-len = <128>;
39 hsync-len = <128>; 39 vback-porch = <33>;
40 vback-porch = <33>; 40 vfront-porch = <9>;
41 vfront-porch = <9>; 41 vsync-len = <3>;
42 vsync-len = <3>; 42 vsync-active = <1>;
43 vsync-active = <1>;
44 };
45 }; 43 };
46 }; 44 };
47 45
diff --git a/arch/arm/boot/dts/imx6dl-hummingboard.dts b/arch/arm/boot/dts/imx6dl-hummingboard.dts
index 5373a5f2782b..c8e51dd41b8f 100644
--- a/arch/arm/boot/dts/imx6dl-hummingboard.dts
+++ b/arch/arm/boot/dts/imx6dl-hummingboard.dts
@@ -143,6 +143,14 @@
143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>; 143 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
144 }; 144 };
145 145
146 pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
147 /*
148 * Similar to pinctrl_usbotg_2, but we want it
149 * pulled down for a fixed host connection.
150 */
151 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
152 };
153
146 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus { 154 pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
147 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>; 155 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
148 }; 156 };
@@ -178,6 +186,8 @@
178}; 186};
179 187
180&usbotg { 188&usbotg {
189 pinctrl-names = "default";
190 pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
181 vbus-supply = <&reg_usbotg_vbus>; 191 vbus-supply = <&reg_usbotg_vbus>;
182 status = "okay"; 192 status = "okay";
183}; 193};
diff --git a/arch/arm/boot/dts/imx6q-gw51xx.dts b/arch/arm/boot/dts/imx6q-gw51xx.dts
index af4929aee075..0e1406e58eff 100644
--- a/arch/arm/boot/dts/imx6q-gw51xx.dts
+++ b/arch/arm/boot/dts/imx6q-gw51xx.dts
@@ -11,7 +11,7 @@
11 11
12/dts-v1/; 12/dts-v1/;
13#include "imx6q.dtsi" 13#include "imx6q.dtsi"
14#include "imx6qdl-gw54xx.dtsi" 14#include "imx6qdl-gw51xx.dtsi"
15 15
16/ { 16/ {
17 model = "Gateworks Ventana i.MX6 Quad GW51XX"; 17 model = "Gateworks Ventana i.MX6 Quad GW51XX";
diff --git a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
index 25da82a03110..e8e781656b3f 100644
--- a/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
@@ -12,6 +12,19 @@
12 pinctrl-0 = <&pinctrl_cubox_i_ir>; 12 pinctrl-0 = <&pinctrl_cubox_i_ir>;
13 }; 13 };
14 14
15 pwmleds {
16 compatible = "pwm-leds";
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
19
20 front {
21 active-low;
22 label = "imx6:red:front";
23 max-brightness = <248>;
24 pwms = <&pwm1 0 50000>;
25 };
26 };
27
15 regulators { 28 regulators {
16 compatible = "simple-bus"; 29 compatible = "simple-bus";
17 30
@@ -109,6 +122,10 @@
109 >; 122 >;
110 }; 123 };
111 124
125 pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
126 fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
127 };
128
112 pinctrl_cubox_i_spdif: cubox-i-spdif { 129 pinctrl_cubox_i_spdif: cubox-i-spdif {
113 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; 130 fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
114 }; 131 };
@@ -117,6 +134,14 @@
117 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; 134 fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
118 }; 135 };
119 136
137 pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
138 /*
139 * The Cubox-i pulls this low, but as it's pointless
140 * leaving it as a pull-up, even if it is just 10uA.
141 */
142 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
143 };
144
120 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { 145 pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
121 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>; 146 fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
122 }; 147 };
@@ -153,6 +178,8 @@
153}; 178};
154 179
155&usbotg { 180&usbotg {
181 pinctrl-names = "default";
182 pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
156 vbus-supply = <&reg_usbotg_vbus>; 183 vbus-supply = <&reg_usbotg_vbus>;
157 status = "okay"; 184 status = "okay";
158}; 185};
diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 31665adcbf39..0db15af41cb1 100644
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -161,7 +161,7 @@
161 status = "okay"; 161 status = "okay";
162 162
163 pmic: ltc3676@3c { 163 pmic: ltc3676@3c {
164 compatible = "ltc,ltc3676"; 164 compatible = "lltc,ltc3676";
165 reg = <0x3c>; 165 reg = <0x3c>;
166 166
167 regulators { 167 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 367af3ec9435..744c8a2d81f6 100644
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -220,7 +220,7 @@
220 }; 220 };
221 221
222 pmic: ltc3676@3c { 222 pmic: ltc3676@3c {
223 compatible = "ltc,ltc3676"; 223 compatible = "lltc,ltc3676";
224 reg = <0x3c>; 224 reg = <0x3c>;
225 225
226 regulators { 226 regulators {
@@ -288,7 +288,7 @@
288 codec: sgtl5000@0a { 288 codec: sgtl5000@0a {
289 compatible = "fsl,sgtl5000"; 289 compatible = "fsl,sgtl5000";
290 reg = <0x0a>; 290 reg = <0x0a>;
291 clocks = <&clks 169>; 291 clocks = <&clks 201>;
292 VDDA-supply = <&reg_1p8v>; 292 VDDA-supply = <&reg_1p8v>;
293 VDDIO-supply = <&reg_3p3v>; 293 VDDIO-supply = <&reg_3p3v>;
294 }; 294 };
diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index c91b5a6c769b..adf150c1be90 100644
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -234,7 +234,7 @@
234 }; 234 };
235 235
236 pmic: ltc3676@3c { 236 pmic: ltc3676@3c {
237 compatible = "ltc,ltc3676"; 237 compatible = "lltc,ltc3676";
238 reg = <0x3c>; 238 reg = <0x3c>;
239 239
240 regulators { 240 regulators {
diff --git a/arch/arm/boot/dts/imx6qdl-microsom.dtsi b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
index d729d0b15f25..79eac6849d4c 100644
--- a/arch/arm/boot/dts/imx6qdl-microsom.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-microsom.dtsi
@@ -10,14 +10,6 @@
10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 10 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
11 >; 11 >;
12 }; 12 };
13
14 pinctrl_microsom_usbotg: microsom-usbotg {
15 /*
16 * Similar to pinctrl_usbotg_2, but we want it
17 * pulled down for a fixed host connection.
18 */
19 fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
20 };
21 }; 13 };
22}; 14};
23 15
@@ -26,8 +18,3 @@
26 pinctrl-0 = <&pinctrl_microsom_uart1>; 18 pinctrl-0 = <&pinctrl_microsom_uart1>;
27 status = "okay"; 19 status = "okay";
28}; 20};
29
30&usbotg {
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_microsom_usbotg>;
33};
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 2d4e5285f3f3..57d4abe03a94 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -686,7 +686,7 @@
686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; 686 compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
687 reg = <0x02188000 0x4000>; 687 reg = <0x02188000 0x4000>;
688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; 688 interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
689 clocks = <&clks IMX6SL_CLK_ENET_REF>, 689 clocks = <&clks IMX6SL_CLK_ENET>,
690 <&clks IMX6SL_CLK_ENET_REF>; 690 <&clks IMX6SL_CLK_ENET_REF>;
691 clock-names = "ipg", "ahb"; 691 clock-names = "ipg", "ahb";
692 status = "disabled"; 692 status = "disabled";
diff --git a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
index c5a1fc75c7a3..b2d9834bf458 100644
--- a/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
+++ b/arch/arm/boot/dts/kirkwood-guruplug-server-plus.dts
@@ -105,7 +105,6 @@
105 compatible = "ethernet-phy-id0141.0cb0", 105 compatible = "ethernet-phy-id0141.0cb0",
106 "ethernet-phy-ieee802.3-c22"; 106 "ethernet-phy-ieee802.3-c22";
107 reg = <0>; 107 reg = <0>;
108 phy-connection-type = "rgmii-id";
109 }; 108 };
110 109
111 ethphy1: ethernet-phy@1 { 110 ethphy1: ethernet-phy@1 {
@@ -113,7 +112,6 @@
113 compatible = "ethernet-phy-id0141.0cb0", 112 compatible = "ethernet-phy-id0141.0cb0",
114 "ethernet-phy-ieee802.3-c22"; 113 "ethernet-phy-ieee802.3-c22";
115 reg = <1>; 114 reg = <1>;
116 phy-connection-type = "rgmii-id";
117 }; 115 };
118}; 116};
119 117
@@ -121,6 +119,7 @@
121 status = "okay"; 119 status = "okay";
122 ethernet0-port@0 { 120 ethernet0-port@0 {
123 phy-handle = <&ethphy0>; 121 phy-handle = <&ethphy0>;
122 phy-connection-type = "rgmii-id";
124 }; 123 };
125}; 124};
126 125
@@ -128,5 +127,6 @@
128 status = "okay"; 127 status = "okay";
129 ethernet1-port@0 { 128 ethernet1-port@0 {
130 phy-handle = <&ethphy1>; 129 phy-handle = <&ethphy1>;
130 phy-connection-type = "rgmii-id";
131 }; 131 };
132}; 132};
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index cf0be662297e..1becefce821b 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -251,6 +251,11 @@
251 codec { 251 codec {
252 }; 252 };
253 }; 253 };
254
255 twl_power: power {
256 compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
257 ti,use_poweroff;
258 };
254 }; 259 };
255}; 260};
256 261
@@ -301,6 +306,7 @@
301}; 306};
302 307
303&uart3 { 308&uart3 {
309 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
304 pinctrl-names = "default"; 310 pinctrl-names = "default";
305 pinctrl-0 = <&uart3_pins>; 311 pinctrl-0 = <&uart3_pins>;
306}; 312};
diff --git a/arch/arm/boot/dts/omap3-evm-common.dtsi b/arch/arm/boot/dts/omap3-evm-common.dtsi
index 8ae8f007c8ad..c8747c7f1cc8 100644
--- a/arch/arm/boot/dts/omap3-evm-common.dtsi
+++ b/arch/arm/boot/dts/omap3-evm-common.dtsi
@@ -50,6 +50,13 @@
50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>; 50 gpios = <&twl_gpio 18 GPIO_ACTIVE_LOW>;
51}; 51};
52 52
53&twl {
54 twl_power: power {
55 compatible = "ti,twl4030-power-omap3-evm", "ti,twl4030-power-idle";
56 ti,use_poweroff;
57 };
58};
59
53&i2c2 { 60&i2c2 {
54 clock-frequency = <400000>; 61 clock-frequency = <400000>;
55}; 62};
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index ae8ae3f4f9bf..1fe45d1f75ec 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -351,6 +351,11 @@
351 compatible = "ti,twl4030-audio"; 351 compatible = "ti,twl4030-audio";
352 ti,enable-vibra = <1>; 352 ti,enable-vibra = <1>;
353 }; 353 };
354
355 twl_power: power {
356 compatible = "ti,twl4030-power-n900", "ti,twl4030-power-idle-osc-off";
357 ti,use_poweroff;
358 };
354}; 359};
355 360
356&twl_keypad { 361&twl_keypad {
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 3bfda16c8b52..a4ed54988866 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -45,7 +45,6 @@
45 45
46 operating-points = < 46 operating-points = <
47 /* kHz uV */ 47 /* kHz uV */
48 500000 880000
49 1000000 1060000 48 1000000 1060000
50 1500000 1250000 49 1500000 1250000
51 >; 50 >;
diff --git a/arch/arm/boot/dts/stih415.dtsi b/arch/arm/boot/dts/stih415.dtsi
index d6f254f302fe..a0f6f75fe3b5 100644
--- a/arch/arm/boot/dts/stih415.dtsi
+++ b/arch/arm/boot/dts/stih415.dtsi
@@ -169,8 +169,8 @@
169 169
170 pinctrl-names = "default"; 170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_mii0>; 171 pinctrl-0 = <&pinctrl_mii0>;
172 clock-names = "stmmaceth"; 172 clock-names = "stmmaceth", "sti-ethclk";
173 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 173 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
174 }; 174 };
175 175
176 ethernet1: dwmac@fef08000 { 176 ethernet1: dwmac@fef08000 {
@@ -192,8 +192,8 @@
192 reset-names = "stmmaceth"; 192 reset-names = "stmmaceth";
193 pinctrl-names = "default"; 193 pinctrl-names = "default";
194 pinctrl-0 = <&pinctrl_mii1>; 194 pinctrl-0 = <&pinctrl_mii1>;
195 clock-names = "stmmaceth"; 195 clock-names = "stmmaceth", "sti-ethclk";
196 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 196 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
197 }; 197 };
198 198
199 rc: rc@fe518000 { 199 rc: rc@fe518000 {
diff --git a/arch/arm/boot/dts/stih416-b2020-revE.dts b/arch/arm/boot/dts/stih416-b2020e.dts
index ba0fa2caaf18..ba0fa2caaf18 100644
--- a/arch/arm/boot/dts/stih416-b2020-revE.dts
+++ b/arch/arm/boot/dts/stih416-b2020e.dts
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 06473c5d9ea9..84758d76d064 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -175,8 +175,8 @@
175 reset-names = "stmmaceth"; 175 reset-names = "stmmaceth";
176 pinctrl-names = "default"; 176 pinctrl-names = "default";
177 pinctrl-0 = <&pinctrl_mii0>; 177 pinctrl-0 = <&pinctrl_mii0>;
178 clock-names = "stmmaceth"; 178 clock-names = "stmmaceth", "sti-ethclk";
179 clocks = <&clk_s_a1_ls CLK_GMAC0_PHY>; 179 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
180 }; 180 };
181 181
182 ethernet1: dwmac@fef08000 { 182 ethernet1: dwmac@fef08000 {
@@ -197,8 +197,8 @@
197 reset-names = "stmmaceth"; 197 reset-names = "stmmaceth";
198 pinctrl-names = "default"; 198 pinctrl-names = "default";
199 pinctrl-0 = <&pinctrl_mii1>; 199 pinctrl-0 = <&pinctrl_mii1>;
200 clock-names = "stmmaceth"; 200 clock-names = "stmmaceth", "sti-ethclk";
201 clocks = <&clk_s_a0_ls CLK_ETH1_PHY>; 201 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
202 }; 202 };
203 203
204 rc: rc@fe518000 { 204 rc: rc@fe518000 {
diff --git a/arch/arm/common/scoop.c b/arch/arm/common/scoop.c
index 6ef146edd0cd..a20fa80776d3 100644
--- a/arch/arm/common/scoop.c
+++ b/arch/arm/common/scoop.c
@@ -182,7 +182,6 @@ static int scoop_probe(struct platform_device *pdev)
182 struct scoop_config *inf; 182 struct scoop_config *inf;
183 struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 183 struct resource *mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184 int ret; 184 int ret;
185 int temp;
186 185
187 if (!mem) 186 if (!mem)
188 return -EINVAL; 187 return -EINVAL;
diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index 9d13dae99125..4bf72264b175 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -94,10 +94,10 @@ CONFIG_BACKLIGHT_CLASS_DEVICE=y
94CONFIG_BACKLIGHT_PWM=y 94CONFIG_BACKLIGHT_PWM=y
95# CONFIG_USB_SUPPORT is not set 95# CONFIG_USB_SUPPORT is not set
96CONFIG_MMC=y 96CONFIG_MMC=y
97CONFIG_MMC_UNSAFE_RESUME=y
98CONFIG_MMC_BLOCK_MINORS=32 97CONFIG_MMC_BLOCK_MINORS=32
99CONFIG_MMC_TEST=y 98CONFIG_MMC_TEST=y
100CONFIG_MMC_SDHCI=y 99CONFIG_MMC_SDHCI=y
100CONFIG_MMC_SDHCI_PLTFM=y
101CONFIG_MMC_SDHCI_BCM_KONA=y 101CONFIG_MMC_SDHCI_BCM_KONA=y
102CONFIG_NEW_LEDS=y 102CONFIG_NEW_LEDS=y
103CONFIG_LEDS_CLASS=y 103CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig
index ef8815327e5b..59b7e45142d8 100644
--- a/arch/arm/configs/imx_v6_v7_defconfig
+++ b/arch/arm/configs/imx_v6_v7_defconfig
@@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
186CONFIG_V4L_MEM2MEM_DRIVERS=y 186CONFIG_V4L_MEM2MEM_DRIVERS=y
187CONFIG_VIDEO_CODA=y 187CONFIG_VIDEO_CODA=y
188CONFIG_SOC_CAMERA_OV2640=y 188CONFIG_SOC_CAMERA_OV2640=y
189CONFIG_IMX_IPUV3_CORE=y
189CONFIG_DRM=y 190CONFIG_DRM=y
190CONFIG_DRM_PANEL_SIMPLE=y 191CONFIG_DRM_PANEL_SIMPLE=y
191CONFIG_BACKLIGHT_LCD_SUPPORT=y 192CONFIG_BACKLIGHT_LCD_SUPPORT=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index 17d9462b9fb9..534836497998 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -223,12 +223,12 @@ CONFIG_POWER_RESET_GPIO=y
223CONFIG_POWER_RESET_SUN6I=y 223CONFIG_POWER_RESET_SUN6I=y
224CONFIG_SENSORS_LM90=y 224CONFIG_SENSORS_LM90=y
225CONFIG_THERMAL=y 225CONFIG_THERMAL=y
226CONFIG_DOVE_THERMAL=y
227CONFIG_ARMADA_THERMAL=y 226CONFIG_ARMADA_THERMAL=y
228CONFIG_WATCHDOG=y 227CONFIG_WATCHDOG=y
229CONFIG_ORION_WATCHDOG=y 228CONFIG_ORION_WATCHDOG=y
230CONFIG_SUNXI_WATCHDOG=y 229CONFIG_SUNXI_WATCHDOG=y
231CONFIG_MFD_AS3722=y 230CONFIG_MFD_AS3722=y
231CONFIG_MFD_BCM590XX=y
232CONFIG_MFD_CROS_EC=y 232CONFIG_MFD_CROS_EC=y
233CONFIG_MFD_CROS_EC_SPI=y 233CONFIG_MFD_CROS_EC_SPI=y
234CONFIG_MFD_MAX8907=y 234CONFIG_MFD_MAX8907=y
@@ -240,6 +240,7 @@ CONFIG_MFD_TPS65910=y
240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y 240CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
241CONFIG_REGULATOR_AB8500=y 241CONFIG_REGULATOR_AB8500=y
242CONFIG_REGULATOR_AS3722=y 242CONFIG_REGULATOR_AS3722=y
243CONFIG_REGULATOR_BCM590XX=y
243CONFIG_REGULATOR_GPIO=y 244CONFIG_REGULATOR_GPIO=y
244CONFIG_REGULATOR_MAX8907=y 245CONFIG_REGULATOR_MAX8907=y
245CONFIG_REGULATOR_PALMAS=y 246CONFIG_REGULATOR_PALMAS=y
@@ -353,6 +354,7 @@ CONFIG_MFD_NVEC=y
353CONFIG_KEYBOARD_NVEC=y 354CONFIG_KEYBOARD_NVEC=y
354CONFIG_SERIO_NVEC_PS2=y 355CONFIG_SERIO_NVEC_PS2=y
355CONFIG_NVEC_POWER=y 356CONFIG_NVEC_POWER=y
357CONFIG_QCOM_GSBI=y
356CONFIG_COMMON_CLK_QCOM=y 358CONFIG_COMMON_CLK_QCOM=y
357CONFIG_MSM_GCC_8660=y 359CONFIG_MSM_GCC_8660=y
358CONFIG_MSM_MMCC_8960=y 360CONFIG_MSM_MMCC_8960=y
diff --git a/arch/arm/configs/mvebu_v7_defconfig b/arch/arm/configs/mvebu_v7_defconfig
index e11170e37442..b0bfefa23902 100644
--- a/arch/arm/configs/mvebu_v7_defconfig
+++ b/arch/arm/configs/mvebu_v7_defconfig
@@ -14,6 +14,7 @@ CONFIG_MACH_ARMADA_370=y
14CONFIG_MACH_ARMADA_375=y 14CONFIG_MACH_ARMADA_375=y
15CONFIG_MACH_ARMADA_38X=y 15CONFIG_MACH_ARMADA_38X=y
16CONFIG_MACH_ARMADA_XP=y 16CONFIG_MACH_ARMADA_XP=y
17CONFIG_MACH_DOVE=y
17CONFIG_NEON=y 18CONFIG_NEON=y
18# CONFIG_CACHE_L2X0 is not set 19# CONFIG_CACHE_L2X0 is not set
19# CONFIG_SWP_EMULATE is not set 20# CONFIG_SWP_EMULATE is not set
@@ -52,6 +53,7 @@ CONFIG_INPUT_EVDEV=y
52CONFIG_KEYBOARD_GPIO=y 53CONFIG_KEYBOARD_GPIO=y
53CONFIG_SERIAL_8250=y 54CONFIG_SERIAL_8250=y
54CONFIG_SERIAL_8250_CONSOLE=y 55CONFIG_SERIAL_8250_CONSOLE=y
56CONFIG_SERIAL_OF_PLATFORM=y
55CONFIG_I2C=y 57CONFIG_I2C=y
56CONFIG_SPI=y 58CONFIG_SPI=y
57CONFIG_SPI_ORION=y 59CONFIG_SPI_ORION=y
diff --git a/arch/arm/include/asm/mcpm.h b/arch/arm/include/asm/mcpm.h
index d9702eb0b02b..94060adba174 100644
--- a/arch/arm/include/asm/mcpm.h
+++ b/arch/arm/include/asm/mcpm.h
@@ -208,8 +208,6 @@ struct sync_struct {
208 struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS]; 208 struct mcpm_sync_struct clusters[MAX_NR_CLUSTERS];
209}; 209};
210 210
211extern unsigned long sync_phys; /* physical address of *mcpm_sync */
212
213void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster); 211void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster);
214void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster); 212void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster);
215void __mcpm_outbound_leave_critical(unsigned int cluster, int state); 213void __mcpm_outbound_leave_critical(unsigned int cluster, int state);
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index f989d7c22dc5..e4e4208a9130 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -114,8 +114,14 @@ static inline struct thread_info *current_thread_info(void)
114 ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) 114 ((unsigned long)(task_thread_info(tsk)->cpu_context.pc))
115#define thread_saved_sp(tsk) \ 115#define thread_saved_sp(tsk) \
116 ((unsigned long)(task_thread_info(tsk)->cpu_context.sp)) 116 ((unsigned long)(task_thread_info(tsk)->cpu_context.sp))
117
118#ifndef CONFIG_THUMB2_KERNEL
117#define thread_saved_fp(tsk) \ 119#define thread_saved_fp(tsk) \
118 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) 120 ((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
121#else
122#define thread_saved_fp(tsk) \
123 ((unsigned long)(task_thread_info(tsk)->cpu_context.r7))
124#endif
119 125
120extern void crunch_task_disable(struct thread_info *); 126extern void crunch_task_disable(struct thread_info *);
121extern void crunch_task_copy(struct thread_info *, void *); 127extern void crunch_task_copy(struct thread_info *, void *);
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index 9db4b659d03e..cb1424240ff6 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -74,8 +74,6 @@ void kprobe_arm_test_cases(void)
74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\ 74 TEST_RRR( op "lt" s " r11, r",11,VAL1,", r",14,N(val),", asr r",7, 6,"")\
75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\ 75 TEST_RR( op "gt" s " r12, r13" ", r",14,val, ", ror r",14,7,"")\
76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\ 76 TEST_RR( op "le" s " r14, r",0, val, ", r13" ", lsl r",14,8,"")\
77 TEST_RR( op s " r12, pc" ", r",14,val, ", ror r",14,7,"")\
78 TEST_RR( op s " r14, r",0, val, ", pc" ", lsl r",14,8,"")\
79 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \ 77 TEST_R( op "eq" s " r0, r",11,VAL1,", #0xf5") \
80 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \ 78 TEST_R( op "ne" s " r11, r",0, VAL1,", #0xf5000000") \
81 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \ 79 TEST_R( op s " r7, r",8, VAL2,", #0x000af000") \
@@ -103,8 +101,6 @@ void kprobe_arm_test_cases(void)
103 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \ 101 TEST_RRR( op "ge r",11,VAL1,", r",14,N(val),", asr r",7, 6,"") \
104 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \ 102 TEST_RR( op "le r13" ", r",14,val, ", ror r",14,7,"") \
105 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \ 103 TEST_RR( op "gt r",0, val, ", r13" ", lsl r",14,8,"") \
106 TEST_RR( op " pc" ", r",14,val, ", ror r",14,7,"") \
107 TEST_RR( op " r",0, val, ", pc" ", lsl r",14,8,"") \
108 TEST_R( op "eq r",11,VAL1,", #0xf5") \ 104 TEST_R( op "eq r",11,VAL1,", #0xf5") \
109 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \ 105 TEST_R( op "ne r",0, VAL1,", #0xf5000000") \
110 TEST_R( op " r",8, VAL2,", #0x000af000") 106 TEST_R( op " r",8, VAL2,", #0x000af000")
@@ -125,7 +121,6 @@ void kprobe_arm_test_cases(void)
125 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \ 121 TEST_RR( op "ge" s " r11, r",11,N(val),", asr r",7, 6,"") \
126 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \ 122 TEST_RR( op "lt" s " r12, r",11,val, ", ror r",14,7,"") \
127 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \ 123 TEST_R( op "gt" s " r14, r13" ", lsl r",14,8,"") \
128 TEST_R( op "le" s " r14, pc" ", lsl r",14,8,"") \
129 TEST( op "eq" s " r0, #0xf5") \ 124 TEST( op "eq" s " r0, #0xf5") \
130 TEST( op "ne" s " r11, #0xf5000000") \ 125 TEST( op "ne" s " r11, #0xf5000000") \
131 TEST( op s " r7, #0x000af000") \ 126 TEST( op s " r7, #0x000af000") \
@@ -159,12 +154,19 @@ void kprobe_arm_test_cases(void)
159 TEST_SUPPORTED("cmp pc, #0x1000"); 154 TEST_SUPPORTED("cmp pc, #0x1000");
160 TEST_SUPPORTED("cmp sp, #0x1000"); 155 TEST_SUPPORTED("cmp sp, #0x1000");
161 156
162 /* Data-processing with PC as shift*/ 157 /* Data-processing with PC and a shift count in a register */
163 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc") 158 TEST_UNSUPPORTED(__inst_arm(0xe15c0f1e) " @ cmp r12, r14, asl pc")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc") 159 TEST_UNSUPPORTED(__inst_arm(0xe1a0cf1e) " @ mov r12, r14, asl pc")
165 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc") 160 TEST_UNSUPPORTED(__inst_arm(0xe08caf1e) " @ add r10, r12, r14, asl pc")
166 161 TEST_UNSUPPORTED(__inst_arm(0xe151021f) " @ cmp r1, pc, lsl r2")
167 /* Data-processing with PC as shift*/ 162 TEST_UNSUPPORTED(__inst_arm(0xe17f0211) " @ cmn pc, r1, lsl r2")
163 TEST_UNSUPPORTED(__inst_arm(0xe1a0121f) " @ mov r1, pc, lsl r2")
164 TEST_UNSUPPORTED(__inst_arm(0xe1a0f211) " @ mov pc, r1, lsl r2")
165 TEST_UNSUPPORTED(__inst_arm(0xe042131f) " @ sub r1, r2, pc, lsl r3")
166 TEST_UNSUPPORTED(__inst_arm(0xe1cf1312) " @ bic r1, pc, r2, lsl r3")
167 TEST_UNSUPPORTED(__inst_arm(0xe081f312) " @ add pc, r1, r2, lsl r3")
168
169 /* Data-processing with PC as a target and status registers updated */
168 TEST_UNSUPPORTED("movs pc, r1") 170 TEST_UNSUPPORTED("movs pc, r1")
169 TEST_UNSUPPORTED("movs pc, r1, lsl r2") 171 TEST_UNSUPPORTED("movs pc, r1, lsl r2")
170 TEST_UNSUPPORTED("movs pc, #0x10000") 172 TEST_UNSUPPORTED("movs pc, #0x10000")
@@ -187,14 +189,14 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"") 189 TEST_BF_R ("add pc, pc, r",14,2f-1f-8,"")
188 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc") 190 TEST_BF_R ("add pc, r",14,2f-1f-8,", pc")
189 TEST_BF_R ("mov pc, r",0,2f,"") 191 TEST_BF_R ("mov pc, r",0,2f,"")
190 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 192 TEST_BF_R ("add pc, pc, r",14,(2f-1f-8)*2,", asr #1")
191 TEST_BB( "sub pc, pc, #1b-2b+8") 193 TEST_BB( "sub pc, pc, #1b-2b+8")
192#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7) 194#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
193 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */ 195 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
194#endif 196#endif
195 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 197 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
196 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 198 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
197 TEST_RR( "add pc, pc, r",10,-2,", asl r",11,1,"") 199 TEST_R( "add pc, pc, r",10,-2,", asl #1")
198#ifdef CONFIG_THUMB2_KERNEL 200#ifdef CONFIG_THUMB2_KERNEL
199 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"") 201 TEST_ARM_TO_THUMB_INTERWORK_R("add pc, pc, r",0,3f-1f-8+1,"")
200 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8") 202 TEST_ARM_TO_THUMB_INTERWORK_R("sub pc, r",0,3f+8+1,", #8")
@@ -216,6 +218,7 @@ void kprobe_arm_test_cases(void)
216 TEST_BB_R("bx r",7,2f,"") 218 TEST_BB_R("bx r",7,2f,"")
217 TEST_BF_R("bxeq r",14,2f,"") 219 TEST_BF_R("bxeq r",14,2f,"")
218 220
221#if __LINUX_ARM_ARCH__ >= 5
219 TEST_R("clz r0, r",0, 0x0,"") 222 TEST_R("clz r0, r",0, 0x0,"")
220 TEST_R("clzeq r7, r",14,0x1,"") 223 TEST_R("clzeq r7, r",14,0x1,"")
221 TEST_R("clz lr, r",7, 0xffffffff,"") 224 TEST_R("clz lr, r",7, 0xffffffff,"")
@@ -337,6 +340,7 @@ void kprobe_arm_test_cases(void)
337 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2") 340 TEST_UNSUPPORTED(__inst_arm(0xe16f02e1) " @ smultt pc, r1, r2")
338 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2") 341 TEST_UNSUPPORTED(__inst_arm(0xe16002ef) " @ smultt r0, pc, r2")
339 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc") 342 TEST_UNSUPPORTED(__inst_arm(0xe1600fe1) " @ smultt r0, r1, pc")
343#endif
340 344
341 TEST_GROUP("Multiply and multiply-accumulate") 345 TEST_GROUP("Multiply and multiply-accumulate")
342 346
@@ -559,6 +563,7 @@ void kprobe_arm_test_cases(void)
559 TEST_UNSUPPORTED("ldrsht r1, [r2], #48") 563 TEST_UNSUPPORTED("ldrsht r1, [r2], #48")
560#endif 564#endif
561 565
566#if __LINUX_ARM_ARCH__ >= 5
562 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]") 567 TEST_RPR( "strd r",0, VAL1,", [r",1, 48,", -r",2,24,"]")
563 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]") 568 TEST_RPR( "strccd r",8, VAL2,", [r",13,0, ", r",12,48,"]")
564 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!") 569 TEST_RPR( "strd r",4, VAL1,", [r",2, 24,", r",3, 48,"]!")
@@ -595,6 +600,7 @@ void kprobe_arm_test_cases(void)
595 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!") 600 TEST_UNSUPPORTED(__inst_arm(0xe1efc3d0) " @ ldrd r12, [pc, #48]!")
596 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48") 601 TEST_UNSUPPORTED(__inst_arm(0xe0c9f3d0) " @ ldrd pc, [r9], #48")
597 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48") 602 TEST_UNSUPPORTED(__inst_arm(0xe0c9e3d0) " @ ldrd lr, [r9], #48")
603#endif
598 604
599 TEST_GROUP("Miscellaneous") 605 TEST_GROUP("Miscellaneous")
600 606
@@ -1227,7 +1233,9 @@ void kprobe_arm_test_cases(void)
1227 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") 1233 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0")
1228 1234
1229 COPROCESSOR_INSTRUCTIONS_ST_LD("",e) 1235 COPROCESSOR_INSTRUCTIONS_ST_LD("",e)
1236#if __LINUX_ARM_ARCH__ >= 5
1230 COPROCESSOR_INSTRUCTIONS_MC_MR("",e) 1237 COPROCESSOR_INSTRUCTIONS_MC_MR("",e)
1238#endif
1231 TEST_UNSUPPORTED("svc 0") 1239 TEST_UNSUPPORTED("svc 0")
1232 TEST_UNSUPPORTED("svc 0xffffff") 1240 TEST_UNSUPPORTED("svc 0xffffff")
1233 1241
@@ -1287,7 +1295,9 @@ void kprobe_arm_test_cases(void)
1287 TEST( "blx __dummy_thumb_subroutine_odd") 1295 TEST( "blx __dummy_thumb_subroutine_odd")
1288#endif /* __LINUX_ARM_ARCH__ >= 6 */ 1296#endif /* __LINUX_ARM_ARCH__ >= 6 */
1289 1297
1298#if __LINUX_ARM_ARCH__ >= 5
1290 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f) 1299 COPROCESSOR_INSTRUCTIONS_ST_LD("2",f)
1300#endif
1291#if __LINUX_ARM_ARCH__ >= 6 1301#if __LINUX_ARM_ARCH__ >= 6
1292 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f) 1302 COPROCESSOR_INSTRUCTIONS_MC_MR("2",f)
1293#endif 1303#endif
diff --git a/arch/arm/kernel/kprobes-test.c b/arch/arm/kernel/kprobes-test.c
index 379639998d5a..08d731294bcd 100644
--- a/arch/arm/kernel/kprobes-test.c
+++ b/arch/arm/kernel/kprobes-test.c
@@ -225,6 +225,7 @@ static int pre_handler_called;
225static int post_handler_called; 225static int post_handler_called;
226static int jprobe_func_called; 226static int jprobe_func_called;
227static int kretprobe_handler_called; 227static int kretprobe_handler_called;
228static int tests_failed;
228 229
229#define FUNC_ARG1 0x12345678 230#define FUNC_ARG1 0x12345678
230#define FUNC_ARG2 0xabcdef 231#define FUNC_ARG2 0xabcdef
@@ -461,6 +462,13 @@ static int run_api_tests(long (*func)(long, long))
461 462
462 pr_info(" jprobe\n"); 463 pr_info(" jprobe\n");
463 ret = test_jprobe(func); 464 ret = test_jprobe(func);
465#if defined(CONFIG_THUMB2_KERNEL) && !defined(MODULE)
466 if (ret == -EINVAL) {
467 pr_err("FAIL: Known longtime bug with jprobe on Thumb kernels\n");
468 tests_failed = ret;
469 ret = 0;
470 }
471#endif
464 if (ret < 0) 472 if (ret < 0)
465 return ret; 473 return ret;
466 474
@@ -1672,6 +1680,8 @@ static int __init run_all_tests(void)
1672 1680
1673out: 1681out:
1674 if (ret == 0) 1682 if (ret == 0)
1683 ret = tests_failed;
1684 if (ret == 0)
1675 pr_info("Finished kprobe tests OK\n"); 1685 pr_info("Finished kprobe tests OK\n");
1676 else 1686 else
1677 pr_err("kprobe tests failed\n"); 1687 pr_err("kprobe tests failed\n");
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 2037f7205987..1d37568c547a 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -1924,7 +1924,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1924 struct perf_event *event) 1924 struct perf_event *event)
1925{ 1925{
1926 int idx; 1926 int idx;
1927 int bit; 1927 int bit = -1;
1928 unsigned int prefix; 1928 unsigned int prefix;
1929 unsigned int region; 1929 unsigned int region;
1930 unsigned int code; 1930 unsigned int code;
@@ -1953,7 +1953,7 @@ static int krait_pmu_get_event_idx(struct pmu_hw_events *cpuc,
1953 } 1953 }
1954 1954
1955 idx = armv7pmu_get_event_idx(cpuc, event); 1955 idx = armv7pmu_get_event_idx(cpuc, event);
1956 if (idx < 0 && krait_event) 1956 if (idx < 0 && bit >= 0)
1957 clear_bit(bit, cpuc->used_mask); 1957 clear_bit(bit, cpuc->used_mask);
1958 1958
1959 return idx; 1959 return idx;
diff --git a/arch/arm/kernel/probes-arm.c b/arch/arm/kernel/probes-arm.c
index 51a13a027989..8eaef81d8344 100644
--- a/arch/arm/kernel/probes-arm.c
+++ b/arch/arm/kernel/probes-arm.c
@@ -341,12 +341,12 @@ static const union decode_item arm_cccc_000x_table[] = {
341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */ 341 /* CMP (reg-shift reg) cccc 0001 0101 xxxx xxxx xxxx 0xx1 xxxx */
342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */ 342 /* CMN (reg-shift reg) cccc 0001 0111 xxxx xxxx xxxx 0xx1 xxxx */
343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG, 343 DECODE_EMULATEX (0x0f900090, 0x01100010, PROBES_DATA_PROCESSING_REG,
344 REGS(ANY, 0, NOPC, 0, ANY)), 344 REGS(NOPC, 0, NOPC, 0, NOPC)),
345 345
346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */ 346 /* MOV (reg-shift reg) cccc 0001 101x xxxx xxxx xxxx 0xx1 xxxx */
347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */ 347 /* MVN (reg-shift reg) cccc 0001 111x xxxx xxxx xxxx 0xx1 xxxx */
348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG, 348 DECODE_EMULATEX (0x0fa00090, 0x01a00010, PROBES_DATA_PROCESSING_REG,
349 REGS(0, ANY, NOPC, 0, ANY)), 349 REGS(0, NOPC, NOPC, 0, NOPC)),
350 350
351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */ 351 /* AND (reg-shift reg) cccc 0000 000x xxxx xxxx xxxx 0xx1 xxxx */
352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */ 352 /* EOR (reg-shift reg) cccc 0000 001x xxxx xxxx xxxx 0xx1 xxxx */
@@ -359,7 +359,7 @@ static const union decode_item arm_cccc_000x_table[] = {
359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */ 359 /* ORR (reg-shift reg) cccc 0001 100x xxxx xxxx xxxx 0xx1 xxxx */
360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */ 360 /* BIC (reg-shift reg) cccc 0001 110x xxxx xxxx xxxx 0xx1 xxxx */
361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG, 361 DECODE_EMULATEX (0x0e000090, 0x00000010, PROBES_DATA_PROCESSING_REG,
362 REGS(ANY, ANY, NOPC, 0, ANY)), 362 REGS(NOPC, NOPC, NOPC, 0, NOPC)),
363 363
364 DECODE_END 364 DECODE_END
365}; 365};
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 0dd3b79b15c3..0c27ed6f3f23 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -908,7 +908,7 @@ enum ptrace_syscall_dir {
908 PTRACE_SYSCALL_EXIT, 908 PTRACE_SYSCALL_EXIT,
909}; 909};
910 910
911static int tracehook_report_syscall(struct pt_regs *regs, 911static void tracehook_report_syscall(struct pt_regs *regs,
912 enum ptrace_syscall_dir dir) 912 enum ptrace_syscall_dir dir)
913{ 913{
914 unsigned long ip; 914 unsigned long ip;
@@ -926,7 +926,6 @@ static int tracehook_report_syscall(struct pt_regs *regs,
926 current_thread_info()->syscall = -1; 926 current_thread_info()->syscall = -1;
927 927
928 regs->ARM_ip = ip; 928 regs->ARM_ip = ip;
929 return current_thread_info()->syscall;
930} 929}
931 930
932asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno) 931asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
@@ -938,7 +937,9 @@ asmlinkage int syscall_trace_enter(struct pt_regs *regs, int scno)
938 return -1; 937 return -1;
939 938
940 if (test_thread_flag(TIF_SYSCALL_TRACE)) 939 if (test_thread_flag(TIF_SYSCALL_TRACE))
941 scno = tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); 940 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
941
942 scno = current_thread_info()->syscall;
942 943
943 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) 944 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
944 trace_sys_enter(regs, scno); 945 trace_sys_enter(regs, scno);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 1ee91763fa7c..f8daa9cc5617 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -111,25 +111,14 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \ 111#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
112 soc_is_exynos5420() || soc_is_exynos5800()) 112 soc_is_exynos5420() || soc_is_exynos5800())
113 113
114void mct_init(void __iomem *base, int irq_g0, int irq_l0, int irq_l1);
115
116struct map_desc;
117extern void __iomem *sysram_ns_base_addr; 114extern void __iomem *sysram_ns_base_addr;
118extern void __iomem *sysram_base_addr; 115extern void __iomem *sysram_base_addr;
119void exynos_init_io(void); 116extern void __iomem *pmu_base_addr;
120void exynos_restart(enum reboot_mode mode, const char *cmd);
121void exynos_sysram_init(void); 117void exynos_sysram_init(void);
122void exynos_cpuidle_init(void);
123void exynos_cpufreq_init(void);
124void exynos_init_late(void);
125 118
126void exynos_firmware_init(void); 119void exynos_firmware_init(void);
127 120
128#ifdef CONFIG_PINCTRL_EXYNOS
129extern u32 exynos_get_eint_wake_mask(void); 121extern u32 exynos_get_eint_wake_mask(void);
130#else
131static inline u32 exynos_get_eint_wake_mask(void) { return 0xffffffff; }
132#endif
133 122
134#ifdef CONFIG_PM_SLEEP 123#ifdef CONFIG_PM_SLEEP
135extern void __init exynos_pm_init(void); 124extern void __init exynos_pm_init(void);
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index f38cf7c110cc..80cbbc74d2c8 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -19,6 +19,7 @@
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/pm_domain.h> 21#include <linux/pm_domain.h>
22#include <linux/irqchip.h>
22 23
23#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
24#include <asm/hardware/cache-l2x0.h> 25#include <asm/hardware/cache-l2x0.h>
@@ -29,6 +30,9 @@
29#include "common.h" 30#include "common.h"
30#include "mfc.h" 31#include "mfc.h"
31#include "regs-pmu.h" 32#include "regs-pmu.h"
33#include "regs-sys.h"
34
35void __iomem *pmu_base_addr;
32 36
33static struct map_desc exynos4_iodesc[] __initdata = { 37static struct map_desc exynos4_iodesc[] __initdata = {
34 { 38 {
@@ -143,7 +147,7 @@ static struct map_desc exynos5_iodesc[] __initdata = {
143 }, 147 },
144}; 148};
145 149
146void exynos_restart(enum reboot_mode mode, const char *cmd) 150static void exynos_restart(enum reboot_mode mode, const char *cmd)
147{ 151{
148 struct device_node *np; 152 struct device_node *np;
149 u32 val = 0x1; 153 u32 val = 0x1;
@@ -173,10 +177,8 @@ static struct platform_device exynos_cpuidle = {
173 177
174void __init exynos_cpuidle_init(void) 178void __init exynos_cpuidle_init(void)
175{ 179{
176 if (soc_is_exynos5440()) 180 if (soc_is_exynos4210() || soc_is_exynos5250())
177 return; 181 platform_device_register(&exynos_cpuidle);
178
179 platform_device_register(&exynos_cpuidle);
180} 182}
181 183
182void __init exynos_cpufreq_init(void) 184void __init exynos_cpufreq_init(void)
@@ -206,7 +208,7 @@ void __init exynos_sysram_init(void)
206 } 208 }
207} 209}
208 210
209void __init exynos_init_late(void) 211static void __init exynos_init_late(void)
210{ 212{
211 if (of_machine_is_compatible("samsung,exynos5440")) 213 if (of_machine_is_compatible("samsung,exynos5440"))
212 /* to be supported later */ 214 /* to be supported later */
@@ -253,7 +255,7 @@ static void __init exynos_map_io(void)
253 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); 255 iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
254} 256}
255 257
256void __init exynos_init_io(void) 258static void __init exynos_init_io(void)
257{ 259{
258 debug_ll_io_init(); 260 debug_ll_io_init();
259 261
@@ -265,6 +267,39 @@ void __init exynos_init_io(void)
265 exynos_map_io(); 267 exynos_map_io();
266} 268}
267 269
270static const struct of_device_id exynos_dt_pmu_match[] = {
271 { .compatible = "samsung,exynos3250-pmu" },
272 { .compatible = "samsung,exynos4210-pmu" },
273 { .compatible = "samsung,exynos4212-pmu" },
274 { .compatible = "samsung,exynos4412-pmu" },
275 { .compatible = "samsung,exynos5250-pmu" },
276 { .compatible = "samsung,exynos5420-pmu" },
277 { /*sentinel*/ },
278};
279
280static void exynos_map_pmu(void)
281{
282 struct device_node *np;
283
284 np = of_find_matching_node(NULL, exynos_dt_pmu_match);
285 if (np)
286 pmu_base_addr = of_iomap(np, 0);
287
288 if (!pmu_base_addr)
289 panic("failed to find exynos pmu register\n");
290}
291
292static void __init exynos_init_irq(void)
293{
294 irqchip_init();
295 /*
296 * Since platsmp.c needs pmu base address by the time
297 * DT is not unflatten so we can't use DT APIs before
298 * init_irq
299 */
300 exynos_map_pmu();
301}
302
268static void __init exynos_dt_machine_init(void) 303static void __init exynos_dt_machine_init(void)
269{ 304{
270 struct device_node *i2c_np; 305 struct device_node *i2c_np;
@@ -297,7 +332,7 @@ static void __init exynos_dt_machine_init(void)
297 * This is called from smp_prepare_cpus if we've built for SMP, but 332 * This is called from smp_prepare_cpus if we've built for SMP, but
298 * we still need to set it up for PM and firmware ops if not. 333 * we still need to set it up for PM and firmware ops if not.
299 */ 334 */
300 if (!IS_ENABLED(SMP)) 335 if (!IS_ENABLED(CONFIG_SMP))
301 exynos_sysram_init(); 336 exynos_sysram_init();
302 337
303 exynos_cpuidle_init(); 338 exynos_cpuidle_init();
@@ -345,6 +380,7 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
345 .smp = smp_ops(exynos_smp_ops), 380 .smp = smp_ops(exynos_smp_ops),
346 .map_io = exynos_init_io, 381 .map_io = exynos_init_io,
347 .init_early = exynos_firmware_init, 382 .init_early = exynos_firmware_init,
383 .init_irq = exynos_init_irq,
348 .init_machine = exynos_dt_machine_init, 384 .init_machine = exynos_dt_machine_init,
349 .init_late = exynos_init_late, 385 .init_late = exynos_init_late,
350 .dt_compat = exynos_dt_compat, 386 .dt_compat = exynos_dt_compat,
diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c
index eb91d2350f8c..e8797bb78871 100644
--- a/arch/arm/mach-exynos/firmware.c
+++ b/arch/arm/mach-exynos/firmware.c
@@ -57,8 +57,13 @@ static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr)
57 57
58 boot_reg = sysram_ns_base_addr + 0x1c; 58 boot_reg = sysram_ns_base_addr + 0x1c;
59 59
60 if (!soc_is_exynos4212() && !soc_is_exynos3250()) 60 /*
61 boot_reg += 4*cpu; 61 * Almost all Exynos-series of SoCs that run in secure mode don't need
62 * additional offset for every CPU, with Exynos4412 being the only
63 * exception.
64 */
65 if (soc_is_exynos4412())
66 boot_reg += 4 * cpu;
62 67
63 __raw_writel(boot_addr, boot_reg); 68 __raw_writel(boot_addr, boot_reg);
64 return 0; 69 return 0;
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S
index cdd9d91e9933..b54f9701e421 100644
--- a/arch/arm/mach-exynos/headsmp.S
+++ b/arch/arm/mach-exynos/headsmp.S
@@ -1,5 +1,4 @@
1/* 1/*
2 * linux/arch/arm/mach-exynos4/headsmp.S
3 * 2 *
4 * Cloned from linux/arch/arm/mach-realview/headsmp.S 3 * Cloned from linux/arch/arm/mach-realview/headsmp.S
5 * 4 *
diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
index 69fa48397394..572f6b1a08f1 100644
--- a/arch/arm/mach-exynos/hotplug.c
+++ b/arch/arm/mach-exynos/hotplug.c
@@ -1,5 +1,4 @@
1/* linux arch/arm/mach-exynos4/hotplug.c 1/*
2 *
3 * Cloned from linux/arch/arm/mach-realview/hotplug.c 2 * Cloned from linux/arch/arm/mach-realview/hotplug.c
4 * 3 *
5 * Copyright (C) 2002 ARM Ltd. 4 * Copyright (C) 2002 ARM Ltd.
@@ -46,13 +45,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
46 if (cpu == 1) 45 if (cpu == 1)
47 exynos_cpu_power_down(cpu); 46 exynos_cpu_power_down(cpu);
48 47
49 /* 48 wfi();
50 * here's the WFI
51 */
52 asm(".word 0xe320f003\n"
53 :
54 :
55 : "memory", "cc");
56 49
57 if (pen_release == cpu_logical_map(cpu)) { 50 if (pen_release == cpu_logical_map(cpu)) {
58 /* 51 /*
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 548269a60634..963002fb15c3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos/include/mach/map.h 1/*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/ 3 * http://www.samsung.com/
5 * 4 *
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 2a4cdb7cb326..e19df1f18c0d 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos4/include/mach/memory.h 1/*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
index 0498d0b887ef..ace0ed617476 100644
--- a/arch/arm/mach-exynos/mcpm-exynos.c
+++ b/arch/arm/mach-exynos/mcpm-exynos.c
@@ -25,7 +25,6 @@
25 25
26#define EXYNOS5420_CPUS_PER_CLUSTER 4 26#define EXYNOS5420_CPUS_PER_CLUSTER 4
27#define EXYNOS5420_NR_CLUSTERS 2 27#define EXYNOS5420_NR_CLUSTERS 2
28#define MCPM_BOOT_ADDR_OFFSET 0x1c
29 28
30/* 29/*
31 * The common v7_exit_coherency_flush API could not be used because of the 30 * The common v7_exit_coherency_flush API could not be used because of the
@@ -343,11 +342,13 @@ static int __init exynos_mcpm_init(void)
343 pr_info("Exynos MCPM support installed\n"); 342 pr_info("Exynos MCPM support installed\n");
344 343
345 /* 344 /*
346 * Future entries into the kernel can now go 345 * U-Boot SPL is hardcoded to jump to the start of ns_sram_base_addr
347 * through the cluster entry vectors. 346 * as part of secondary_cpu_start(). Let's redirect it to the
347 * mcpm_entry_point().
348 */ 348 */
349 __raw_writel(virt_to_phys(mcpm_entry_point), 349 __raw_writel(0xe59f0000, ns_sram_base_addr); /* ldr r0, [pc, #0] */
350 ns_sram_base_addr + MCPM_BOOT_ADDR_OFFSET); 350 __raw_writel(0xe12fff10, ns_sram_base_addr + 4); /* bx r0 */
351 __raw_writel(virt_to_phys(mcpm_entry_point), ns_sram_base_addr + 8);
351 352
352 iounmap(ns_sram_base_addr); 353 iounmap(ns_sram_base_addr);
353 354
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 1c8d31e39520..39ad38f561f8 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -1,5 +1,4 @@
1/* linux/arch/arm/mach-exynos4/platsmp.c 1 /*
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com 3 * http://www.samsung.com
5 * 4 *
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 87c0d34c7fba..f127c0cefbb8 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -35,6 +35,7 @@
35 35
36#include "common.h" 36#include "common.h"
37#include "regs-pmu.h" 37#include "regs-pmu.h"
38#include "regs-sys.h"
38 39
39/** 40/**
40 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping 41 * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping
@@ -300,7 +301,7 @@ static int exynos_pm_suspend(void)
300 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 301 tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0);
301 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 302 __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION);
302 303
303 if (!soc_is_exynos5250()) 304 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
304 exynos_cpu_save_register(); 305 exynos_cpu_save_register();
305 306
306 return 0; 307 return 0;
@@ -334,7 +335,7 @@ static void exynos_pm_resume(void)
334 if (exynos_pm_central_resume()) 335 if (exynos_pm_central_resume())
335 goto early_wakeup; 336 goto early_wakeup;
336 337
337 if (!soc_is_exynos5250()) 338 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
338 exynos_cpu_restore_register(); 339 exynos_cpu_restore_register();
339 340
340 /* For release retention */ 341 /* For release retention */
@@ -353,7 +354,7 @@ static void exynos_pm_resume(void)
353 354
354 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 355 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
355 356
356 if (!soc_is_exynos5250()) 357 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
357 scu_enable(S5P_VA_SCU); 358 scu_enable(S5P_VA_SCU);
358 359
359early_wakeup: 360early_wakeup:
@@ -440,15 +441,18 @@ static int exynos_cpu_pm_notifier(struct notifier_block *self,
440 case CPU_PM_ENTER: 441 case CPU_PM_ENTER:
441 if (cpu == 0) { 442 if (cpu == 0) {
442 exynos_pm_central_suspend(); 443 exynos_pm_central_suspend();
443 exynos_cpu_save_register(); 444 if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
445 exynos_cpu_save_register();
444 } 446 }
445 break; 447 break;
446 448
447 case CPU_PM_EXIT: 449 case CPU_PM_EXIT:
448 if (cpu == 0) { 450 if (cpu == 0) {
449 if (!soc_is_exynos5250()) 451 if (read_cpuid_part_number() ==
452 ARM_CPU_PART_CORTEX_A9) {
450 scu_enable(S5P_VA_SCU); 453 scu_enable(S5P_VA_SCU);
451 exynos_cpu_restore_register(); 454 exynos_cpu_restore_register();
455 }
452 exynos_pm_central_resume(); 456 exynos_pm_central_resume();
453 } 457 }
454 break; 458 break;
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index fe6570ebbdde..fd76e1b5a471 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -17,12 +17,14 @@
17#include <linux/err.h> 17#include <linux/err.h>
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/pm_domain.h> 19#include <linux/pm_domain.h>
20#include <linux/clk.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/of_address.h> 22#include <linux/of_address.h>
22#include <linux/of_platform.h> 23#include <linux/of_platform.h>
23#include <linux/sched.h> 24#include <linux/sched.h>
24 25
25#include "regs-pmu.h" 26#define INT_LOCAL_PWR_EN 0x7
27#define MAX_CLK_PER_DOMAIN 4
26 28
27/* 29/*
28 * Exynos specific wrapper around the generic power domain 30 * Exynos specific wrapper around the generic power domain
@@ -32,6 +34,9 @@ struct exynos_pm_domain {
32 char const *name; 34 char const *name;
33 bool is_off; 35 bool is_off;
34 struct generic_pm_domain pd; 36 struct generic_pm_domain pd;
37 struct clk *oscclk;
38 struct clk *clk[MAX_CLK_PER_DOMAIN];
39 struct clk *pclk[MAX_CLK_PER_DOMAIN];
35}; 40};
36 41
37static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) 42static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
@@ -44,13 +49,26 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
44 pd = container_of(domain, struct exynos_pm_domain, pd); 49 pd = container_of(domain, struct exynos_pm_domain, pd);
45 base = pd->base; 50 base = pd->base;
46 51
47 pwr = power_on ? S5P_INT_LOCAL_PWR_EN : 0; 52 /* Set oscclk before powering off a domain*/
53 if (!power_on) {
54 int i;
55
56 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
57 if (IS_ERR(pd->clk[i]))
58 break;
59 if (clk_set_parent(pd->clk[i], pd->oscclk))
60 pr_err("%s: error setting oscclk as parent to clock %d\n",
61 pd->name, i);
62 }
63 }
64
65 pwr = power_on ? INT_LOCAL_PWR_EN : 0;
48 __raw_writel(pwr, base); 66 __raw_writel(pwr, base);
49 67
50 /* Wait max 1ms */ 68 /* Wait max 1ms */
51 timeout = 10; 69 timeout = 10;
52 70
53 while ((__raw_readl(base + 0x4) & S5P_INT_LOCAL_PWR_EN) != pwr) { 71 while ((__raw_readl(base + 0x4) & INT_LOCAL_PWR_EN) != pwr) {
54 if (!timeout) { 72 if (!timeout) {
55 op = (power_on) ? "enable" : "disable"; 73 op = (power_on) ? "enable" : "disable";
56 pr_err("Power domain %s %s failed\n", domain->name, op); 74 pr_err("Power domain %s %s failed\n", domain->name, op);
@@ -60,6 +78,20 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on)
60 cpu_relax(); 78 cpu_relax();
61 usleep_range(80, 100); 79 usleep_range(80, 100);
62 } 80 }
81
82 /* Restore clocks after powering on a domain*/
83 if (power_on) {
84 int i;
85
86 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
87 if (IS_ERR(pd->clk[i]))
88 break;
89 if (clk_set_parent(pd->clk[i], pd->pclk[i]))
90 pr_err("%s: error setting parent to clock%d\n",
91 pd->name, i);
92 }
93 }
94
63 return 0; 95 return 0;
64} 96}
65 97
@@ -152,9 +184,11 @@ static __init int exynos4_pm_init_power_domain(void)
152 184
153 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") { 185 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
154 struct exynos_pm_domain *pd; 186 struct exynos_pm_domain *pd;
155 int on; 187 int on, i;
188 struct device *dev;
156 189
157 pdev = of_find_device_by_node(np); 190 pdev = of_find_device_by_node(np);
191 dev = &pdev->dev;
158 192
159 pd = kzalloc(sizeof(*pd), GFP_KERNEL); 193 pd = kzalloc(sizeof(*pd), GFP_KERNEL);
160 if (!pd) { 194 if (!pd) {
@@ -170,9 +204,33 @@ static __init int exynos4_pm_init_power_domain(void)
170 pd->pd.power_on = exynos_pd_power_on; 204 pd->pd.power_on = exynos_pd_power_on;
171 pd->pd.of_node = np; 205 pd->pd.of_node = np;
172 206
207 pd->oscclk = clk_get(dev, "oscclk");
208 if (IS_ERR(pd->oscclk))
209 goto no_clk;
210
211 for (i = 0; i < MAX_CLK_PER_DOMAIN; i++) {
212 char clk_name[8];
213
214 snprintf(clk_name, sizeof(clk_name), "clk%d", i);
215 pd->clk[i] = clk_get(dev, clk_name);
216 if (IS_ERR(pd->clk[i]))
217 break;
218 snprintf(clk_name, sizeof(clk_name), "pclk%d", i);
219 pd->pclk[i] = clk_get(dev, clk_name);
220 if (IS_ERR(pd->pclk[i])) {
221 clk_put(pd->clk[i]);
222 pd->clk[i] = ERR_PTR(-EINVAL);
223 break;
224 }
225 }
226
227 if (IS_ERR(pd->clk[0]))
228 clk_put(pd->oscclk);
229
230no_clk:
173 platform_set_drvdata(pdev, pd); 231 platform_set_drvdata(pdev, pd);
174 232
175 on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN; 233 on = __raw_readl(pd->base + 0x4) & INT_LOCAL_PWR_EN;
176 234
177 pm_genpd_init(&pd->pd, NULL, !on); 235 pm_genpd_init(&pd->pd, NULL, !on);
178 } 236 }
diff --git a/arch/arm/mach-exynos/pmu.c b/arch/arm/mach-exynos/pmu.c
index fb0deda3b3a4..dcfcb44c3c55 100644
--- a/arch/arm/mach-exynos/pmu.c
+++ b/arch/arm/mach-exynos/pmu.c
@@ -11,7 +11,6 @@
11 11
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/bug.h>
15 14
16#include "common.h" 15#include "common.h"
17#include "regs-pmu.h" 16#include "regs-pmu.h"
diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h
index 1d13b08708f0..1993e6bd5388 100644
--- a/arch/arm/mach-exynos/regs-pmu.h
+++ b/arch/arm/mach-exynos/regs-pmu.h
@@ -15,7 +15,6 @@
15#include <mach/map.h> 15#include <mach/map.h>
16 16
17#define S5P_PMUREG(x) (S5P_VA_PMU + (x)) 17#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
18#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
19 18
20#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200) 19#define S5P_CENTRAL_SEQ_CONFIGURATION S5P_PMUREG(0x0200)
21 20
@@ -127,7 +126,6 @@
127#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8) 126#define S5P_PAD_RET_EBIB_OPTION S5P_PMUREG(0x31A8)
128 127
129#define S5P_CORE_LOCAL_PWR_EN 0x3 128#define S5P_CORE_LOCAL_PWR_EN 0x3
130#define S5P_INT_LOCAL_PWR_EN 0x7
131 129
132/* Only for EXYNOS4210 */ 130/* Only for EXYNOS4210 */
133#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154) 131#define S5P_CMU_CLKSTOP_LCD1_LOWPWR S5P_PMUREG(0x1154)
@@ -188,8 +186,6 @@
188 186
189/* For EXYNOS5 */ 187/* For EXYNOS5 */
190 188
191#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
192
193#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) 189#define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408)
194#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C) 190#define EXYNOS5_MASK_WDTRESET_REQUEST S5P_PMUREG(0x040C)
195 191
diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h
new file mode 100644
index 000000000000..84332b0dd7a6
--- /dev/null
+++ b/arch/arm/mach-exynos/regs-sys.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * EXYNOS - system register definition
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#ifndef __ASM_ARCH_REGS_SYS_H
13#define __ASM_ARCH_REGS_SYS_H __FILE__
14
15#include <mach/map.h>
16
17#define S5P_SYSREG(x) (S3C_VA_SYS + (x))
18
19/* For EXYNOS5 */
20#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234)
21
22#endif /* __ASM_ARCH_REGS_SYS_H */
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 28fa2fa49e5d..4b5185748f74 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -734,9 +734,9 @@ config SOC_IMX6
734 select HAVE_IMX_MMDC 734 select HAVE_IMX_MMDC
735 select HAVE_IMX_SRC 735 select HAVE_IMX_SRC
736 select MFD_SYSCON 736 select MFD_SYSCON
737 select PL310_ERRATA_588369 if CACHE_PL310 737 select PL310_ERRATA_588369 if CACHE_L2X0
738 select PL310_ERRATA_727915 if CACHE_PL310 738 select PL310_ERRATA_727915 if CACHE_L2X0
739 select PL310_ERRATA_769419 if CACHE_PL310 739 select PL310_ERRATA_769419 if CACHE_L2X0
740 740
741config SOC_IMX6Q 741config SOC_IMX6Q
742 bool "i.MX6 Quad/DualLite support" 742 bool "i.MX6 Quad/DualLite support"
@@ -771,9 +771,9 @@ config SOC_VF610
771 select ARM_GIC 771 select ARM_GIC
772 select PINCTRL_VF610 772 select PINCTRL_VF610
773 select VF_PIT_TIMER 773 select VF_PIT_TIMER
774 select PL310_ERRATA_588369 if CACHE_PL310 774 select PL310_ERRATA_588369 if CACHE_L2X0
775 select PL310_ERRATA_727915 if CACHE_PL310 775 select PL310_ERRATA_727915 if CACHE_L2X0
776 select PL310_ERRATA_769419 if CACHE_PL310 776 select PL310_ERRATA_769419 if CACHE_L2X0
777 777
778 help 778 help
779 This enable support for Freescale Vybrid VF610 processor. 779 This enable support for Freescale Vybrid VF610 processor.
diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c
index 4ba587da89d2..84acdfd1d715 100644
--- a/arch/arm/mach-imx/clk-gate2.c
+++ b/arch/arm/mach-imx/clk-gate2.c
@@ -67,8 +67,12 @@ static void clk_gate2_disable(struct clk_hw *hw)
67 67
68 spin_lock_irqsave(gate->lock, flags); 68 spin_lock_irqsave(gate->lock, flags);
69 69
70 if (gate->share_count && --(*gate->share_count) > 0) 70 if (gate->share_count) {
71 goto out; 71 if (WARN_ON(*gate->share_count == 0))
72 goto out;
73 else if (--(*gate->share_count) > 0)
74 goto out;
75 }
72 76
73 reg = readl(gate->reg); 77 reg = readl(gate->reg);
74 reg &= ~(3 << gate->bit_idx); 78 reg &= ~(3 << gate->bit_idx);
@@ -78,19 +82,26 @@ out:
78 spin_unlock_irqrestore(gate->lock, flags); 82 spin_unlock_irqrestore(gate->lock, flags);
79} 83}
80 84
81static int clk_gate2_is_enabled(struct clk_hw *hw) 85static int clk_gate2_reg_is_enabled(void __iomem *reg, u8 bit_idx)
82{ 86{
83 u32 reg; 87 u32 val = readl(reg);
84 struct clk_gate2 *gate = to_clk_gate2(hw);
85 88
86 reg = readl(gate->reg); 89 if (((val >> bit_idx) & 1) == 1)
87
88 if (((reg >> gate->bit_idx) & 1) == 1)
89 return 1; 90 return 1;
90 91
91 return 0; 92 return 0;
92} 93}
93 94
95static int clk_gate2_is_enabled(struct clk_hw *hw)
96{
97 struct clk_gate2 *gate = to_clk_gate2(hw);
98
99 if (gate->share_count)
100 return !!(*gate->share_count);
101 else
102 return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx);
103}
104
94static struct clk_ops clk_gate2_ops = { 105static struct clk_ops clk_gate2_ops = {
95 .enable = clk_gate2_enable, 106 .enable = clk_gate2_enable,
96 .disable = clk_gate2_disable, 107 .disable = clk_gate2_disable,
@@ -116,6 +127,10 @@ struct clk *clk_register_gate2(struct device *dev, const char *name,
116 gate->bit_idx = bit_idx; 127 gate->bit_idx = bit_idx;
117 gate->flags = clk_gate2_flags; 128 gate->flags = clk_gate2_flags;
118 gate->lock = lock; 129 gate->lock = lock;
130
131 /* Initialize share_count per hardware state */
132 if (share_count)
133 *share_count = clk_gate2_reg_is_enabled(reg, bit_idx) ? 1 : 0;
119 gate->share_count = share_count; 134 gate->share_count = share_count;
120 135
121 init.name = name; 136 init.name = name;
diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c
index 21cf06cebade..5408ca70c8d6 100644
--- a/arch/arm/mach-imx/clk-imx6sl.c
+++ b/arch/arm/mach-imx/clk-imx6sl.c
@@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2); 312 clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4); 313 clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6); 314 clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
315 clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
315 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12); 316 clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
316 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14); 317 clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
317 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16); 318 clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index dd0cc677d596..660ca6feff40 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -480,25 +480,18 @@ static const struct of_device_id ebi_match[] = {
480static void __init ap_init_of(void) 480static void __init ap_init_of(void)
481{ 481{
482 unsigned long sc_dec; 482 unsigned long sc_dec;
483 struct device_node *root;
484 struct device_node *syscon; 483 struct device_node *syscon;
485 struct device_node *ebi; 484 struct device_node *ebi;
486 struct device *parent; 485 struct device *parent;
487 struct soc_device *soc_dev; 486 struct soc_device *soc_dev;
488 struct soc_device_attribute *soc_dev_attr; 487 struct soc_device_attribute *soc_dev_attr;
489 u32 ap_sc_id; 488 u32 ap_sc_id;
490 int err;
491 int i; 489 int i;
492 490
493 /* Here we create an SoC device for the root node */ 491 syscon = of_find_matching_node(NULL, ap_syscon_match);
494 root = of_find_node_by_path("/");
495 if (!root)
496 return;
497
498 syscon = of_find_matching_node(root, ap_syscon_match);
499 if (!syscon) 492 if (!syscon)
500 return; 493 return;
501 ebi = of_find_matching_node(root, ebi_match); 494 ebi = of_find_matching_node(NULL, ebi_match);
502 if (!ebi) 495 if (!ebi)
503 return; 496 return;
504 497
@@ -509,19 +502,17 @@ static void __init ap_init_of(void)
509 if (!ebi_base) 502 if (!ebi_base)
510 return; 503 return;
511 504
505 of_platform_populate(NULL, of_default_bus_match_table,
506 ap_auxdata_lookup, NULL);
507
512 ap_sc_id = readl(ap_syscon_base); 508 ap_sc_id = readl(ap_syscon_base);
513 509
514 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 510 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
515 if (!soc_dev_attr) 511 if (!soc_dev_attr)
516 return; 512 return;
517 513
518 err = of_property_read_string(root, "compatible", 514 soc_dev_attr->soc_id = "XVC";
519 &soc_dev_attr->soc_id); 515 soc_dev_attr->machine = "Integrator/AP";
520 if (err)
521 return;
522 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
523 if (err)
524 return;
525 soc_dev_attr->family = "Integrator"; 516 soc_dev_attr->family = "Integrator";
526 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 517 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
527 'A' + (ap_sc_id & 0x0f)); 518 'A' + (ap_sc_id & 0x0f));
@@ -536,9 +527,6 @@ static void __init ap_init_of(void)
536 parent = soc_device_to_device(soc_dev); 527 parent = soc_device_to_device(soc_dev);
537 integrator_init_sysfs(parent, ap_sc_id); 528 integrator_init_sysfs(parent, ap_sc_id);
538 529
539 of_platform_populate(root, of_default_bus_match_table,
540 ap_auxdata_lookup, parent);
541
542 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET); 530 sc_dec = readl(ap_syscon_base + INTEGRATOR_SC_DEC_OFFSET);
543 for (i = 0; i < 4; i++) { 531 for (i = 0; i < 4; i++) {
544 struct lm_device *lmdev; 532 struct lm_device *lmdev;
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a938242b0c95..0e57f8f820a5 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -279,20 +279,13 @@ static const struct of_device_id intcp_syscon_match[] = {
279 279
280static void __init intcp_init_of(void) 280static void __init intcp_init_of(void)
281{ 281{
282 struct device_node *root;
283 struct device_node *cpcon; 282 struct device_node *cpcon;
284 struct device *parent; 283 struct device *parent;
285 struct soc_device *soc_dev; 284 struct soc_device *soc_dev;
286 struct soc_device_attribute *soc_dev_attr; 285 struct soc_device_attribute *soc_dev_attr;
287 u32 intcp_sc_id; 286 u32 intcp_sc_id;
288 int err;
289 287
290 /* Here we create an SoC device for the root node */ 288 cpcon = of_find_matching_node(NULL, intcp_syscon_match);
291 root = of_find_node_by_path("/");
292 if (!root)
293 return;
294
295 cpcon = of_find_matching_node(root, intcp_syscon_match);
296 if (!cpcon) 289 if (!cpcon)
297 return; 290 return;
298 291
@@ -300,19 +293,17 @@ static void __init intcp_init_of(void)
300 if (!intcp_con_base) 293 if (!intcp_con_base)
301 return; 294 return;
302 295
296 of_platform_populate(NULL, of_default_bus_match_table,
297 intcp_auxdata_lookup, NULL);
298
303 intcp_sc_id = readl(intcp_con_base); 299 intcp_sc_id = readl(intcp_con_base);
304 300
305 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 301 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
306 if (!soc_dev_attr) 302 if (!soc_dev_attr)
307 return; 303 return;
308 304
309 err = of_property_read_string(root, "compatible", 305 soc_dev_attr->soc_id = "XCV";
310 &soc_dev_attr->soc_id); 306 soc_dev_attr->machine = "Integrator/CP";
311 if (err)
312 return;
313 err = of_property_read_string(root, "model", &soc_dev_attr->machine);
314 if (err)
315 return;
316 soc_dev_attr->family = "Integrator"; 307 soc_dev_attr->family = "Integrator";
317 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c", 308 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%c",
318 'A' + (intcp_sc_id & 0x0f)); 309 'A' + (intcp_sc_id & 0x0f));
@@ -326,8 +317,6 @@ static void __init intcp_init_of(void)
326 317
327 parent = soc_device_to_device(soc_dev); 318 parent = soc_device_to_device(soc_dev);
328 integrator_init_sysfs(parent, intcp_sc_id); 319 integrator_init_sysfs(parent, intcp_sc_id);
329 of_platform_populate(root, of_default_bus_match_table,
330 intcp_auxdata_lookup, parent);
331} 320}
332 321
333static const char * intcp_dt_board_compat[] = { 322static const char * intcp_dt_board_compat[] = {
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 4a7c250c9a30..b9bc599a5fd0 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -10,6 +10,7 @@ menuconfig ARCH_MVEBU
10 select ZONE_DMA if ARM_LPAE 10 select ZONE_DMA if ARM_LPAE
11 select ARCH_REQUIRE_GPIOLIB 11 select ARCH_REQUIRE_GPIOLIB
12 select PCI_QUIRKS if PCI 12 select PCI_QUIRKS if PCI
13 select OF_ADDRESS_PCI
13 14
14if ARCH_MVEBU 15if ARCH_MVEBU
15 16
@@ -17,6 +18,7 @@ config MACH_MVEBU_V7
17 bool 18 bool
18 select ARMADA_370_XP_TIMER 19 select ARMADA_370_XP_TIMER
19 select CACHE_L2X0 20 select CACHE_L2X0
21 select ARM_CPU_SUSPEND
20 22
21config MACH_ARMADA_370 23config MACH_ARMADA_370
22 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7 24 bool "Marvell Armada 370 boards" if ARCH_MULTI_V7
diff --git a/arch/arm/mach-mvebu/Makefile b/arch/arm/mach-mvebu/Makefile
index 2ecb828e4a8b..1636cdbef01a 100644
--- a/arch/arm/mach-mvebu/Makefile
+++ b/arch/arm/mach-mvebu/Makefile
@@ -7,7 +7,7 @@ CFLAGS_pmsu.o := -march=armv7-a
7obj-y += system-controller.o mvebu-soc-id.o 7obj-y += system-controller.o mvebu-soc-id.o
8 8
9ifeq ($(CONFIG_MACH_MVEBU_V7),y) 9ifeq ($(CONFIG_MACH_MVEBU_V7),y)
10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o 10obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o 11obj-$(CONFIG_SMP) += platsmp.o headsmp.o platsmp-a9.o headsmp-a9.o
12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 12obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
13endif 13endif
diff --git a/arch/arm/mach-mvebu/board-v7.c b/arch/arm/mach-mvebu/board-v7.c
index 8bb742fdf5ca..b2524d689f21 100644
--- a/arch/arm/mach-mvebu/board-v7.c
+++ b/arch/arm/mach-mvebu/board-v7.c
@@ -23,6 +23,7 @@
23#include <linux/mbus.h> 23#include <linux/mbus.h>
24#include <linux/signal.h> 24#include <linux/signal.h>
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include <linux/irqchip.h>
26#include <asm/hardware/cache-l2x0.h> 27#include <asm/hardware/cache-l2x0.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
28#include <asm/mach/map.h> 29#include <asm/mach/map.h>
@@ -71,17 +72,23 @@ static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr,
71 return 1; 72 return 1;
72} 73}
73 74
74static void __init mvebu_timer_and_clk_init(void) 75static void __init mvebu_init_irq(void)
75{ 76{
76 of_clk_init(NULL); 77 irqchip_init();
77 clocksource_of_init();
78 mvebu_scu_enable(); 78 mvebu_scu_enable();
79 coherency_init(); 79 coherency_init();
80 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 80 BUG_ON(mvebu_mbus_dt_init(coherency_available()));
81}
82
83static void __init external_abort_quirk(void)
84{
85 u32 dev, rev;
81 86
82 if (of_machine_is_compatible("marvell,armada375")) 87 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV)
83 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 88 return;
84 "imprecise external abort"); 89
90 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0,
91 "imprecise external abort");
85} 92}
86 93
87static void __init i2c_quirk(void) 94static void __init i2c_quirk(void)
@@ -169,8 +176,10 @@ static void __init mvebu_dt_init(void)
169{ 176{
170 if (of_machine_is_compatible("plathome,openblocks-ax3-4")) 177 if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
171 i2c_quirk(); 178 i2c_quirk();
172 if (of_machine_is_compatible("marvell,a375-db")) 179 if (of_machine_is_compatible("marvell,a375-db")) {
180 external_abort_quirk();
173 thermal_quirk(); 181 thermal_quirk();
182 }
174 183
175 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 184 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
176} 185}
@@ -185,7 +194,7 @@ DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)")
185 .l2c_aux_mask = ~0, 194 .l2c_aux_mask = ~0,
186 .smp = smp_ops(armada_xp_smp_ops), 195 .smp = smp_ops(armada_xp_smp_ops),
187 .init_machine = mvebu_dt_init, 196 .init_machine = mvebu_dt_init,
188 .init_time = mvebu_timer_and_clk_init, 197 .init_irq = mvebu_init_irq,
189 .restart = mvebu_restart, 198 .restart = mvebu_restart,
190 .dt_compat = armada_370_xp_dt_compat, 199 .dt_compat = armada_370_xp_dt_compat,
191MACHINE_END 200MACHINE_END
@@ -198,7 +207,7 @@ static const char * const armada_375_dt_compat[] = {
198DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 207DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)")
199 .l2c_aux_val = 0, 208 .l2c_aux_val = 0,
200 .l2c_aux_mask = ~0, 209 .l2c_aux_mask = ~0,
201 .init_time = mvebu_timer_and_clk_init, 210 .init_irq = mvebu_init_irq,
202 .init_machine = mvebu_dt_init, 211 .init_machine = mvebu_dt_init,
203 .restart = mvebu_restart, 212 .restart = mvebu_restart,
204 .dt_compat = armada_375_dt_compat, 213 .dt_compat = armada_375_dt_compat,
@@ -213,7 +222,7 @@ static const char * const armada_38x_dt_compat[] = {
213DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 222DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)")
214 .l2c_aux_val = 0, 223 .l2c_aux_val = 0,
215 .l2c_aux_mask = ~0, 224 .l2c_aux_mask = ~0,
216 .init_time = mvebu_timer_and_clk_init, 225 .init_irq = mvebu_init_irq,
217 .restart = mvebu_restart, 226 .restart = mvebu_restart,
218 .dt_compat = armada_38x_dt_compat, 227 .dt_compat = armada_38x_dt_compat,
219MACHINE_END 228MACHINE_END
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index 53a55c8520bf..a1d407c0febe 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -66,6 +66,8 @@ static void __iomem *pmsu_mp_base;
66extern void ll_disable_coherency(void); 66extern void ll_disable_coherency(void);
67extern void ll_enable_coherency(void); 67extern void ll_enable_coherency(void);
68 68
69extern void armada_370_xp_cpu_resume(void);
70
69static struct platform_device armada_xp_cpuidle_device = { 71static struct platform_device armada_xp_cpuidle_device = {
70 .name = "cpuidle-armada-370-xp", 72 .name = "cpuidle-armada-370-xp",
71}; 73};
@@ -140,13 +142,6 @@ static void armada_370_xp_pmsu_enable_l2_powerdown_onidle(void)
140 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL); 142 writel(reg, pmsu_mp_base + L2C_NFABRIC_PM_CTL);
141} 143}
142 144
143static void armada_370_xp_cpu_resume(void)
144{
145 asm volatile("bl ll_add_cpu_to_smp_group\n\t"
146 "bl ll_enable_coherency\n\t"
147 "b cpu_resume\n\t");
148}
149
150/* No locking is needed because we only access per-CPU registers */ 145/* No locking is needed because we only access per-CPU registers */
151void armada_370_xp_pmsu_idle_prepare(bool deepidle) 146void armada_370_xp_pmsu_idle_prepare(bool deepidle)
152{ 147{
diff --git a/arch/arm/mach-mvebu/pmsu_ll.S b/arch/arm/mach-mvebu/pmsu_ll.S
new file mode 100644
index 000000000000..fc3de68d8c54
--- /dev/null
+++ b/arch/arm/mach-mvebu/pmsu_ll.S
@@ -0,0 +1,25 @@
1/*
2 * Copyright (C) 2014 Marvell
3 *
4 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
5 * Gregory Clement <gregory.clement@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12#include <linux/linkage.h>
13#include <asm/assembler.h>
14
15/*
16 * This is the entry point through which CPUs exiting cpuidle deep
17 * idle state are going.
18 */
19ENTRY(armada_370_xp_cpu_resume)
20ARM_BE8(setend be ) @ go BE8 if entered LE
21 bl ll_add_cpu_to_smp_group
22 bl ll_enable_coherency
23 b cpu_resume
24ENDPROC(armada_370_xp_cpu_resume)
25
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 062505345c95..1c1ed737f7ab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -34,8 +34,8 @@ config ARCH_OMAP4
34 select HAVE_ARM_SCU if SMP 34 select HAVE_ARM_SCU if SMP
35 select HAVE_ARM_TWD if SMP 35 select HAVE_ARM_TWD if SMP
36 select OMAP_INTERCONNECT 36 select OMAP_INTERCONNECT
37 select PL310_ERRATA_588369 37 select PL310_ERRATA_588369 if CACHE_L2X0
38 select PL310_ERRATA_727915 38 select PL310_ERRATA_727915 if CACHE_L2X0
39 select PM_OPP if PM 39 select PM_OPP if PM
40 select PM_RUNTIME if CPU_IDLE 40 select PM_RUNTIME if CPU_IDLE
41 select ARM_ERRATA_754322 41 select ARM_ERRATA_754322
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 8421f38cf445..8ca99e9321e3 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,14 +110,16 @@ obj-y += prm_common.o cm_common.o
110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o 110obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o 111obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o 112obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
113obj-$(CONFIG_SOC_AM33XX) += prm33xx.o cm33xx.o
114omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \ 113omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
115 prcm_mpu44xx.o prminst44xx.o \ 114 prcm_mpu44xx.o prminst44xx.o \
116 vc44xx_data.o vp44xx_data.o 115 vc44xx_data.o vp44xx_data.o
117obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common) 116obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
118obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common) 117obj-$(CONFIG_SOC_OMAP5) += $(omap-prcm-4-5-common)
119obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common) 118obj-$(CONFIG_SOC_DRA7XX) += $(omap-prcm-4-5-common)
120obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) 119am33xx-43xx-prcm-common += prm33xx.o cm33xx.o
120obj-$(CONFIG_SOC_AM33XX) += $(am33xx-43xx-prcm-common)
121obj-$(CONFIG_SOC_AM43XX) += $(omap-prcm-4-5-common) \
122 $(am33xx-43xx-prcm-common)
121 123
122# OMAP voltage domains 124# OMAP voltage domains
123voltagedomain-common := voltage.o vc.o vp.o 125voltagedomain-common := voltage.o vc.o vp.o
diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c
index 332af927f4d3..67fd26a18441 100644
--- a/arch/arm/mach-omap2/clkt_dpll.c
+++ b/arch/arm/mach-omap2/clkt_dpll.c
@@ -76,7 +76,7 @@
76 * (assuming that it is counting N upwards), or -2 if the enclosing loop 76 * (assuming that it is counting N upwards), or -2 if the enclosing loop
77 * should skip to the next iteration (again assuming N is increasing). 77 * should skip to the next iteration (again assuming N is increasing).
78 */ 78 */
79static int _dpll_test_fint(struct clk_hw_omap *clk, u8 n) 79static int _dpll_test_fint(struct clk_hw_omap *clk, unsigned int n)
80{ 80{
81 struct dpll_data *dd; 81 struct dpll_data *dd;
82 long fint, fint_min, fint_max; 82 long fint, fint_min, fint_max;
diff --git a/arch/arm/mach-omap2/cm-regbits-34xx.h b/arch/arm/mach-omap2/cm-regbits-34xx.h
index 04dab2fcf862..ee6c784cd6b7 100644
--- a/arch/arm/mach-omap2/cm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/cm-regbits-34xx.h
@@ -26,11 +26,14 @@
26#define OMAP3430_EN_WDT3_SHIFT 12 26#define OMAP3430_EN_WDT3_SHIFT 12
27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0) 27#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0)
28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 28#define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0
29#define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4
29#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4) 30#define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4)
30#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3 31#define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3
32#define OMAP3430_EN_IVA2_DPLL_SHIFT 0
31#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 33#define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0)
32#define OMAP3430_ST_IVA2_SHIFT 0 34#define OMAP3430_ST_IVA2_SHIFT 0
33#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) 35#define OMAP3430_ST_IVA2_CLK_MASK (1 << 0)
36#define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0
34#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0) 37#define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0)
35#define OMAP3430_IVA2_CLK_SRC_SHIFT 19 38#define OMAP3430_IVA2_CLK_SRC_SHIFT 19
36#define OMAP3430_IVA2_CLK_SRC_WIDTH 3 39#define OMAP3430_IVA2_CLK_SRC_WIDTH 3
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 15a778ce7707..bd2441790779 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -380,7 +380,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs); 380void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs); 381void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
382 382
383#ifdef CONFIG_SOC_AM33XX 383#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, 384extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
385 u16 clkctrl_offs); 385 u16 clkctrl_offs);
386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, 386extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index a373d508799a..dc571f1d3b8a 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -162,7 +162,8 @@ static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
162} 162}
163#endif 163#endif
164 164
165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 165#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
166 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
166void omap44xx_restart(enum reboot_mode mode, const char *cmd); 167void omap44xx_restart(enum reboot_mode mode, const char *cmd);
167#else 168#else
168static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 169static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
@@ -248,7 +249,6 @@ static inline void __iomem *omap4_get_scu_base(void)
248} 249}
249#endif 250#endif
250 251
251extern void __init gic_init_irq(void);
252extern void gic_dist_disable(void); 252extern void gic_dist_disable(void);
253extern void gic_dist_enable(void); 253extern void gic_dist_enable(void);
254extern bool gic_dist_disabled(void); 254extern bool gic_dist_disabled(void);
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 592ba0a0ecf3..b6f8f348296e 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -297,33 +297,6 @@ static void omap_init_audio(void)
297static inline void omap_init_audio(void) {} 297static inline void omap_init_audio(void) {}
298#endif 298#endif
299 299
300#if defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI) || \
301 defined(CONFIG_SND_OMAP_SOC_OMAP_HDMI_MODULE)
302
303static struct platform_device omap_hdmi_audio = {
304 .name = "omap-hdmi-audio",
305 .id = -1,
306};
307
308static void __init omap_init_hdmi_audio(void)
309{
310 struct omap_hwmod *oh;
311 struct platform_device *pdev;
312
313 oh = omap_hwmod_lookup("dss_hdmi");
314 if (!oh)
315 return;
316
317 pdev = omap_device_build("omap-hdmi-audio-dai", -1, oh, NULL, 0);
318 WARN(IS_ERR(pdev),
319 "Can't build omap_device for omap-hdmi-audio-dai.\n");
320
321 platform_device_register(&omap_hdmi_audio);
322}
323#else
324static inline void omap_init_hdmi_audio(void) {}
325#endif
326
327#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 300#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
328 301
329#include <linux/platform_data/spi-omap2-mcspi.h> 302#include <linux/platform_data/spi-omap2-mcspi.h>
@@ -459,7 +432,6 @@ static int __init omap2_init_devices(void)
459 */ 432 */
460 omap_init_audio(); 433 omap_init_audio();
461 omap_init_camera(); 434 omap_init_camera();
462 omap_init_hdmi_audio();
463 omap_init_mbox(); 435 omap_init_mbox();
464 /* If dtb is there, the devices will be created dynamically */ 436 /* If dtb is there, the devices will be created dynamically */
465 if (!of_have_populated_dt()) { 437 if (!of_have_populated_dt()) {
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index b8208b4b1bd9..f7492df1cbba 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -29,6 +29,7 @@
29#ifdef CONFIG_TIDSPBRIDGE_DVFS 29#ifdef CONFIG_TIDSPBRIDGE_DVFS
30#include "omap-pm.h" 30#include "omap-pm.h"
31#endif 31#endif
32#include "soc.h"
32 33
33#include <linux/platform_data/dsp-omap.h> 34#include <linux/platform_data/dsp-omap.h>
34 35
@@ -59,6 +60,9 @@ void __init omap_dsp_reserve_sdram_memblock(void)
59 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE; 60 phys_addr_t size = CONFIG_TIDSPBRIDGE_MEMPOOL_SIZE;
60 phys_addr_t paddr; 61 phys_addr_t paddr;
61 62
63 if (!cpu_is_omap34xx())
64 return;
65
62 if (!size) 66 if (!size)
63 return; 67 return;
64 68
@@ -83,6 +87,9 @@ static int __init omap_dsp_init(void)
83 int err = -ENOMEM; 87 int err = -ENOMEM;
84 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata; 88 struct omap_dsp_platform_data *pdata = &omap_dsp_pdata;
85 89
90 if (!cpu_is_omap34xx())
91 return 0;
92
86 pdata->phys_mempool_base = omap_dsp_get_mempool_base(); 93 pdata->phys_mempool_base = omap_dsp_get_mempool_base();
87 94
88 if (pdata->phys_mempool_base) { 95 if (pdata->phys_mempool_base) {
@@ -115,6 +122,9 @@ module_init(omap_dsp_init);
115 122
116static void __exit omap_dsp_exit(void) 123static void __exit omap_dsp_exit(void)
117{ 124{
125 if (!cpu_is_omap34xx())
126 return;
127
118 platform_device_unregister(omap_dsp_pdev); 128 platform_device_unregister(omap_dsp_pdev);
119} 129}
120module_exit(omap_dsp_exit); 130module_exit(omap_dsp_exit);
diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
index 2c0c2816900f..8bc13380f0a0 100644
--- a/arch/arm/mach-omap2/gpmc.c
+++ b/arch/arm/mach-omap2/gpmc.c
@@ -1615,7 +1615,7 @@ static int gpmc_probe_dt(struct platform_device *pdev)
1615 return ret; 1615 return ret;
1616 } 1616 }
1617 1617
1618 for_each_child_of_node(pdev->dev.of_node, child) { 1618 for_each_available_child_of_node(pdev->dev.of_node, child) {
1619 1619
1620 if (!child->name) 1620 if (!child->name)
1621 continue; 1621 continue;
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 43969da5d50b..d42022f2a71e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -649,6 +649,18 @@ void __init dra7xxx_check_revision(void)
649 } 649 }
650 break; 650 break;
651 651
652 case 0xb9bc:
653 switch (rev) {
654 case 0:
655 omap_revision = DRA722_REV_ES1_0;
656 break;
657 default:
658 /* If we have no new revisions */
659 omap_revision = DRA722_REV_ES1_0;
660 break;
661 }
662 break;
663
652 default: 664 default:
653 /* Unknown default to latest silicon rev as default*/ 665 /* Unknown default to latest silicon rev as default*/
654 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n", 666 pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index fd88edeb027f..f62f7537d899 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -183,8 +183,10 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
183 m0_entry = mux->muxnames[0]; 183 m0_entry = mux->muxnames[0];
184 184
185 /* First check for full name in mode0.muxmode format */ 185 /* First check for full name in mode0.muxmode format */
186 if (mode0_len && strncmp(muxname, m0_entry, mode0_len)) 186 if (mode0_len)
187 continue; 187 if (strncmp(muxname, m0_entry, mode0_len) ||
188 (strlen(m0_entry) != mode0_len))
189 continue;
188 190
189 /* Then check for muxmode only */ 191 /* Then check for muxmode only */
190 for (i = 0; i < OMAP_MUX_NR_MODES; i++) { 192 for (i = 0; i < OMAP_MUX_NR_MODES; i++) {
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 326cd982a3cb..539e8106eb96 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -102,26 +102,6 @@ void __init omap_barriers_init(void)
102{} 102{}
103#endif 103#endif
104 104
105void __init gic_init_irq(void)
106{
107 void __iomem *omap_irq_base;
108
109 /* Static mapping, never released */
110 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
111 BUG_ON(!gic_dist_base_addr);
112
113 twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_4K);
114 BUG_ON(!twd_base);
115
116 /* Static mapping, never released */
117 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
118 BUG_ON(!omap_irq_base);
119
120 omap_wakeupgen_init();
121
122 gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
123}
124
125void gic_dist_disable(void) 105void gic_dist_disable(void)
126{ 106{
127 if (gic_dist_base_addr) 107 if (gic_dist_base_addr)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index f7bb435bb543..6c074f37cdd2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4251,9 +4251,9 @@ void __init omap_hwmod_init(void)
4251 soc_ops.enable_module = _omap4_enable_module; 4251 soc_ops.enable_module = _omap4_enable_module;
4252 soc_ops.disable_module = _omap4_disable_module; 4252 soc_ops.disable_module = _omap4_disable_module;
4253 soc_ops.wait_target_ready = _omap4_wait_target_ready; 4253 soc_ops.wait_target_ready = _omap4_wait_target_ready;
4254 soc_ops.assert_hardreset = _omap4_assert_hardreset; 4254 soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4255 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 4255 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4256 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 4256 soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4257 soc_ops.init_clkdm = _init_clkdm; 4257 soc_ops.init_clkdm = _init_clkdm;
4258 } else if (soc_is_am33xx()) { 4258 } else if (soc_is_am33xx()) {
4259 soc_ops.enable_module = _am33xx_enable_module; 4259 soc_ops.enable_module = _am33xx_enable_module;
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 290213f2cbe3..1103aa0e0d29 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -2020,6 +2020,77 @@ static struct omap_hwmod omap54xx_wd_timer2_hwmod = {
2020 }, 2020 },
2021}; 2021};
2022 2022
2023/*
2024 * 'ocp2scp' class
2025 * bridge to transform ocp interface protocol to scp (serial control port)
2026 * protocol
2027 */
2028/* ocp2scp3 */
2029static struct omap_hwmod omap54xx_ocp2scp3_hwmod;
2030/* l4_cfg -> ocp2scp3 */
2031static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp3 = {
2032 .master = &omap54xx_l4_cfg_hwmod,
2033 .slave = &omap54xx_ocp2scp3_hwmod,
2034 .clk = "l4_root_clk_div",
2035 .user = OCP_USER_MPU | OCP_USER_SDMA,
2036};
2037
2038static struct omap_hwmod omap54xx_ocp2scp3_hwmod = {
2039 .name = "ocp2scp3",
2040 .class = &omap54xx_ocp2scp_hwmod_class,
2041 .clkdm_name = "l3init_clkdm",
2042 .prcm = {
2043 .omap4 = {
2044 .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP3_CLKCTRL_OFFSET,
2045 .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP3_CONTEXT_OFFSET,
2046 .modulemode = MODULEMODE_HWCTRL,
2047 },
2048 },
2049};
2050
2051/*
2052 * 'sata' class
2053 * sata: serial ata interface gen2 compliant ( 1 rx/ 1 tx)
2054 */
2055
2056static struct omap_hwmod_class_sysconfig omap54xx_sata_sysc = {
2057 .sysc_offs = 0x0000,
2058 .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE),
2059 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
2060 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
2061 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
2062 .sysc_fields = &omap_hwmod_sysc_type2,
2063};
2064
2065static struct omap_hwmod_class omap54xx_sata_hwmod_class = {
2066 .name = "sata",
2067 .sysc = &omap54xx_sata_sysc,
2068};
2069
2070/* sata */
2071static struct omap_hwmod omap54xx_sata_hwmod = {
2072 .name = "sata",
2073 .class = &omap54xx_sata_hwmod_class,
2074 .clkdm_name = "l3init_clkdm",
2075 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
2076 .main_clk = "func_48m_fclk",
2077 .mpu_rt_idx = 1,
2078 .prcm = {
2079 .omap4 = {
2080 .clkctrl_offs = OMAP54XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
2081 .context_offs = OMAP54XX_RM_L3INIT_SATA_CONTEXT_OFFSET,
2082 .modulemode = MODULEMODE_SWCTRL,
2083 },
2084 },
2085};
2086
2087/* l4_cfg -> sata */
2088static struct omap_hwmod_ocp_if omap54xx_l4_cfg__sata = {
2089 .master = &omap54xx_l4_cfg_hwmod,
2090 .slave = &omap54xx_sata_hwmod,
2091 .clk = "l3_iclk_div",
2092 .user = OCP_USER_MPU | OCP_USER_SDMA,
2093};
2023 2094
2024/* 2095/*
2025 * Interfaces 2096 * Interfaces
@@ -2765,6 +2836,8 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
2765 &omap54xx_l4_cfg__usb_tll_hs, 2836 &omap54xx_l4_cfg__usb_tll_hs,
2766 &omap54xx_l4_cfg__usb_otg_ss, 2837 &omap54xx_l4_cfg__usb_otg_ss,
2767 &omap54xx_l4_wkup__wd_timer2, 2838 &omap54xx_l4_wkup__wd_timer2,
2839 &omap54xx_l4_cfg__ocp2scp3,
2840 &omap54xx_l4_cfg__sata,
2768 NULL, 2841 NULL,
2769}; 2842};
2770 2843
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 20b4398cec05..284324f2b98a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1268,9 +1268,6 @@ static struct omap_hwmod_class dra7xx_sata_hwmod_class = {
1268}; 1268};
1269 1269
1270/* sata */ 1270/* sata */
1271static struct omap_hwmod_opt_clk sata_opt_clks[] = {
1272 { .role = "ref_clk", .clk = "sata_ref_clk" },
1273};
1274 1271
1275static struct omap_hwmod dra7xx_sata_hwmod = { 1272static struct omap_hwmod dra7xx_sata_hwmod = {
1276 .name = "sata", 1273 .name = "sata",
@@ -1278,6 +1275,7 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1278 .clkdm_name = "l3init_clkdm", 1275 .clkdm_name = "l3init_clkdm",
1279 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, 1276 .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
1280 .main_clk = "func_48m_fclk", 1277 .main_clk = "func_48m_fclk",
1278 .mpu_rt_idx = 1,
1281 .prcm = { 1279 .prcm = {
1282 .omap4 = { 1280 .omap4 = {
1283 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET, 1281 .clkctrl_offs = DRA7XX_CM_L3INIT_SATA_CLKCTRL_OFFSET,
@@ -1285,8 +1283,6 @@ static struct omap_hwmod dra7xx_sata_hwmod = {
1285 .modulemode = MODULEMODE_SWCTRL, 1283 .modulemode = MODULEMODE_SWCTRL,
1286 }, 1284 },
1287 }, 1285 },
1288 .opt_clks = sata_opt_clks,
1289 .opt_clks_cnt = ARRAY_SIZE(sata_opt_clks),
1290}; 1286};
1291 1287
1292/* 1288/*
@@ -1731,8 +1727,20 @@ static struct omap_hwmod dra7xx_uart6_hwmod = {
1731 * 1727 *
1732 */ 1728 */
1733 1729
1730static struct omap_hwmod_class_sysconfig dra7xx_usb_otg_ss_sysc = {
1731 .rev_offs = 0x0000,
1732 .sysc_offs = 0x0010,
1733 .sysc_flags = (SYSC_HAS_DMADISABLE | SYSC_HAS_MIDLEMODE |
1734 SYSC_HAS_SIDLEMODE),
1735 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
1736 SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
1737 MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
1738 .sysc_fields = &omap_hwmod_sysc_type2,
1739};
1740
1734static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = { 1741static struct omap_hwmod_class dra7xx_usb_otg_ss_hwmod_class = {
1735 .name = "usb_otg_ss", 1742 .name = "usb_otg_ss",
1743 .sysc = &dra7xx_usb_otg_ss_sysc,
1736}; 1744};
1737 1745
1738/* usb_otg_ss1 */ 1746/* usb_otg_ss1 */
diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h
index 106132db532b..cbefbd7cfdb5 100644
--- a/arch/arm/mach-omap2/prm-regbits-34xx.h
+++ b/arch/arm/mach-omap2/prm-regbits-34xx.h
@@ -35,6 +35,8 @@
35#define OMAP3430_LOGICSTATEST_MASK (1 << 2) 35#define OMAP3430_LOGICSTATEST_MASK (1 << 2)
36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2) 36#define OMAP3430_LASTLOGICSTATEENTERED_MASK (1 << 2)
37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0) 37#define OMAP3430_LASTPOWERSTATEENTERED_MASK (0x3 << 0)
38#define OMAP3430_GRPSEL_MCBSP5_MASK (1 << 10)
39#define OMAP3430_GRPSEL_MCBSP1_MASK (1 << 9)
38#define OMAP3630_GRPSEL_UART4_MASK (1 << 18) 40#define OMAP3630_GRPSEL_UART4_MASK (1 << 18)
39#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17) 41#define OMAP3430_GRPSEL_GPIO6_MASK (1 << 17)
40#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16) 42#define OMAP3430_GRPSEL_GPIO5_MASK (1 << 16)
@@ -42,6 +44,10 @@
42#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14) 44#define OMAP3430_GRPSEL_GPIO3_MASK (1 << 14)
43#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13) 45#define OMAP3430_GRPSEL_GPIO2_MASK (1 << 13)
44#define OMAP3430_GRPSEL_UART3_MASK (1 << 11) 46#define OMAP3430_GRPSEL_UART3_MASK (1 << 11)
47#define OMAP3430_GRPSEL_GPT8_MASK (1 << 9)
48#define OMAP3430_GRPSEL_GPT7_MASK (1 << 8)
49#define OMAP3430_GRPSEL_GPT6_MASK (1 << 7)
50#define OMAP3430_GRPSEL_GPT5_MASK (1 << 6)
45#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2) 51#define OMAP3430_GRPSEL_MCBSP4_MASK (1 << 2)
46#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1) 52#define OMAP3430_GRPSEL_MCBSP3_MASK (1 << 1)
47#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0) 53#define OMAP3430_GRPSEL_MCBSP2_MASK (1 << 0)
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index de2a34c423a7..01ca8086fb6c 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -462,6 +462,7 @@ IS_OMAP_TYPE(3430, 0x3430)
462#define DRA7XX_CLASS 0x07000000 462#define DRA7XX_CLASS 0x07000000
463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) 463#define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8))
464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) 464#define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8))
465#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
465 466
466void omap2xxx_check_revision(void); 467void omap2xxx_check_revision(void);
467void omap3xxx_check_revision(void); 468void omap3xxx_check_revision(void);
diff --git a/arch/arm/mach-sa1100/collie.c b/arch/arm/mach-sa1100/collie.c
index f9874ba60cc8..108939f8d053 100644
--- a/arch/arm/mach-sa1100/collie.c
+++ b/arch/arm/mach-sa1100/collie.c
@@ -329,6 +329,11 @@ static struct mtd_partition collie_partitions[] = {
329 .name = "rootfs", 329 .name = "rootfs",
330 .offset = MTDPART_OFS_APPEND, 330 .offset = MTDPART_OFS_APPEND,
331 .size = 0x00e20000, 331 .size = 0x00e20000,
332 }, {
333 .name = "bootblock",
334 .offset = MTDPART_OFS_APPEND,
335 .size = 0x00020000,
336 .mask_flags = MTD_WRITEABLE
332 } 337 }
333}; 338};
334 339
@@ -356,7 +361,7 @@ static void collie_flash_exit(void)
356} 361}
357 362
358static struct flash_platform_data collie_flash_data = { 363static struct flash_platform_data collie_flash_data = {
359 .map_name = "jedec_probe", 364 .map_name = "cfi_probe",
360 .init = collie_flash_init, 365 .init = collie_flash_init,
361 .set_vpp = collie_set_vpp, 366 .set_vpp = collie_set_vpp,
362 .exit = collie_flash_exit, 367 .exit = collie_flash_exit,
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 7e33e9d2c42e..878e9ec97d0f 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -11,8 +11,8 @@ menuconfig ARCH_STI
11 select ARM_ERRATA_754322 11 select ARM_ERRATA_754322
12 select ARM_ERRATA_764369 if SMP 12 select ARM_ERRATA_764369 if SMP
13 select ARM_ERRATA_775420 13 select ARM_ERRATA_775420
14 select PL310_ERRATA_753970 if CACHE_PL310 14 select PL310_ERRATA_753970 if CACHE_L2X0
15 select PL310_ERRATA_769419 if CACHE_PL310 15 select PL310_ERRATA_769419 if CACHE_L2X0
16 help 16 help
17 Include support for STiH41x SOCs like STiH415/416 using the device tree 17 Include support for STiH41x SOCs like STiH415/416 using the device tree
18 for discovery 18 for discovery
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 3f9587bb51f6..b6085084e0ff 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -12,8 +12,81 @@
12 12
13#include <linux/clk-provider.h> 13#include <linux/clk-provider.h>
14#include <linux/clocksource.h> 14#include <linux/clocksource.h>
15#include <linux/delay.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21#include <linux/io.h>
22#include <linux/reboot.h>
15 23
16#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h>
26#include <asm/system_misc.h>
27
28#define SUN4I_WATCHDOG_CTRL_REG 0x00
29#define SUN4I_WATCHDOG_CTRL_RESTART BIT(0)
30#define SUN4I_WATCHDOG_MODE_REG 0x04
31#define SUN4I_WATCHDOG_MODE_ENABLE BIT(0)
32#define SUN4I_WATCHDOG_MODE_RESET_ENABLE BIT(1)
33
34#define SUN6I_WATCHDOG1_IRQ_REG 0x00
35#define SUN6I_WATCHDOG1_CTRL_REG 0x10
36#define SUN6I_WATCHDOG1_CTRL_RESTART BIT(0)
37#define SUN6I_WATCHDOG1_CONFIG_REG 0x14
38#define SUN6I_WATCHDOG1_CONFIG_RESTART BIT(0)
39#define SUN6I_WATCHDOG1_CONFIG_IRQ BIT(1)
40#define SUN6I_WATCHDOG1_MODE_REG 0x18
41#define SUN6I_WATCHDOG1_MODE_ENABLE BIT(0)
42
43static void __iomem *wdt_base;
44
45static void sun4i_restart(enum reboot_mode mode, const char *cmd)
46{
47 if (!wdt_base)
48 return;
49
50 /* Enable timer and set reset bit in the watchdog */
51 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
52 wdt_base + SUN4I_WATCHDOG_MODE_REG);
53
54 /*
55 * Restart the watchdog. The default (and lowest) interval
56 * value for the watchdog is 0.5s.
57 */
58 writel(SUN4I_WATCHDOG_CTRL_RESTART, wdt_base + SUN4I_WATCHDOG_CTRL_REG);
59
60 while (1) {
61 mdelay(5);
62 writel(SUN4I_WATCHDOG_MODE_ENABLE | SUN4I_WATCHDOG_MODE_RESET_ENABLE,
63 wdt_base + SUN4I_WATCHDOG_MODE_REG);
64 }
65}
66
67static struct of_device_id sunxi_restart_ids[] = {
68 { .compatible = "allwinner,sun4i-a10-wdt" },
69 { /*sentinel*/ }
70};
71
72static void sunxi_setup_restart(void)
73{
74 struct device_node *np;
75
76 np = of_find_matching_node(NULL, sunxi_restart_ids);
77 if (WARN(!np, "unable to setup watchdog restart"))
78 return;
79
80 wdt_base = of_iomap(np, 0);
81 WARN(!wdt_base, "failed to map watchdog base address");
82}
83
84static void __init sunxi_dt_init(void)
85{
86 sunxi_setup_restart();
87
88 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
89}
17 90
18static const char * const sunxi_board_dt_compat[] = { 91static const char * const sunxi_board_dt_compat[] = {
19 "allwinner,sun4i-a10", 92 "allwinner,sun4i-a10",
@@ -23,7 +96,9 @@ static const char * const sunxi_board_dt_compat[] = {
23}; 96};
24 97
25DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)") 98DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
99 .init_machine = sunxi_dt_init,
26 .dt_compat = sunxi_board_dt_compat, 100 .dt_compat = sunxi_board_dt_compat,
101 .restart = sun4i_restart,
27MACHINE_END 102MACHINE_END
28 103
29static const char * const sun6i_board_dt_compat[] = { 104static const char * const sun6i_board_dt_compat[] = {
@@ -51,5 +126,7 @@ static const char * const sun7i_board_dt_compat[] = {
51}; 126};
52 127
53DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family") 128DT_MACHINE_START(SUN7I_DT, "Allwinner sun7i (A20) Family")
129 .init_machine = sunxi_dt_init,
54 .dt_compat = sun7i_board_dt_compat, 130 .dt_compat = sun7i_board_dt_compat,
131 .restart = sun4i_restart,
55MACHINE_END 132MACHINE_END
diff --git a/arch/arm/mach-ux500/Kconfig b/arch/arm/mach-ux500/Kconfig
index 5be7c4583a93..699e8601dbf0 100644
--- a/arch/arm/mach-ux500/Kconfig
+++ b/arch/arm/mach-ux500/Kconfig
@@ -15,7 +15,7 @@ menuconfig ARCH_U8500
15 select PINCTRL 15 select PINCTRL
16 select PINCTRL_ABX500 16 select PINCTRL_ABX500
17 select PINCTRL_NOMADIK 17 select PINCTRL_NOMADIK
18 select PL310_ERRATA_753970 if CACHE_PL310 18 select PL310_ERRATA_753970 if CACHE_L2X0
19 help 19 help
20 Support for ST-Ericsson's Ux500 architecture 20 Support for ST-Ericsson's Ux500 architecture
21 21
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index 99c1f151c403..d8b9330f896a 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -43,7 +43,7 @@ config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
43 bool "Enable A5 and A9 only errata work-arounds" 43 bool "Enable A5 and A9 only errata work-arounds"
44 default y 44 default y
45 select ARM_ERRATA_720789 45 select ARM_ERRATA_720789
46 select PL310_ERRATA_753970 if CACHE_PL310 46 select PL310_ERRATA_753970 if CACHE_L2X0
47 help 47 help
48 Provides common dependencies for Versatile Express platforms 48 Provides common dependencies for Versatile Express platforms
49 based on Cortex-A5 and Cortex-A9 processors. In order to 49 based on Cortex-A5 and Cortex-A9 processors. In order to
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index eda0dd0ab97b..c348eaee7ee2 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -889,9 +889,10 @@ config CACHE_L2X0
889 help 889 help
890 This option enables the L2x0 PrimeCell. 890 This option enables the L2x0 PrimeCell.
891 891
892if CACHE_L2X0
893
892config CACHE_PL310 894config CACHE_PL310
893 bool 895 bool
894 depends on CACHE_L2X0
895 default y if CPU_V7 && !(CPU_V6 || CPU_V6K) 896 default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
896 help 897 help
897 This option enables optimisations for the PL310 cache 898 This option enables optimisations for the PL310 cache
@@ -899,7 +900,6 @@ config CACHE_PL310
899 900
900config PL310_ERRATA_588369 901config PL310_ERRATA_588369
901 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" 902 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
902 depends on CACHE_L2X0
903 help 903 help
904 The PL310 L2 cache controller implements three types of Clean & 904 The PL310 L2 cache controller implements three types of Clean &
905 Invalidate maintenance operations: by Physical Address 905 Invalidate maintenance operations: by Physical Address
@@ -912,7 +912,6 @@ config PL310_ERRATA_588369
912 912
913config PL310_ERRATA_727915 913config PL310_ERRATA_727915
914 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption" 914 bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
915 depends on CACHE_L2X0
916 help 915 help
917 PL310 implements the Clean & Invalidate by Way L2 cache maintenance 916 PL310 implements the Clean & Invalidate by Way L2 cache maintenance
918 operation (offset 0x7FC). This operation runs in background so that 917 operation (offset 0x7FC). This operation runs in background so that
@@ -923,7 +922,6 @@ config PL310_ERRATA_727915
923 922
924config PL310_ERRATA_753970 923config PL310_ERRATA_753970
925 bool "PL310 errata: cache sync operation may be faulty" 924 bool "PL310 errata: cache sync operation may be faulty"
926 depends on CACHE_PL310
927 help 925 help
928 This option enables the workaround for the 753970 PL310 (r3p0) erratum. 926 This option enables the workaround for the 753970 PL310 (r3p0) erratum.
929 927
@@ -938,7 +936,6 @@ config PL310_ERRATA_753970
938 936
939config PL310_ERRATA_769419 937config PL310_ERRATA_769419
940 bool "PL310 errata: no automatic Store Buffer drain" 938 bool "PL310 errata: no automatic Store Buffer drain"
941 depends on CACHE_L2X0
942 help 939 help
943 On revisions of the PL310 prior to r3p2, the Store Buffer does 940 On revisions of the PL310 prior to r3p2, the Store Buffer does
944 not automatically drain. This can cause normal, non-cacheable 941 not automatically drain. This can cause normal, non-cacheable
@@ -948,6 +945,8 @@ config PL310_ERRATA_769419
948 on systems with an outer cache, the store buffer is drained 945 on systems with an outer cache, the store buffer is drained
949 explicitly. 946 explicitly.
950 947
948endif
949
951config CACHE_TAUROS2 950config CACHE_TAUROS2
952 bool "Enable the Tauros2 L2 cache controller" 951 bool "Enable the Tauros2 L2 cache controller"
953 depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4) 952 depends on (ARCH_DOVE || ARCH_MMP || CPU_PJ4)
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index efc5cabf70e0..7c3fb41a462e 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -664,7 +664,7 @@ static int l2c310_cpu_enable_flz(struct notifier_block *nb, unsigned long act, v
664 664
665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock) 665static void __init l2c310_enable(void __iomem *base, u32 aux, unsigned num_lock)
666{ 666{
667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_PART_MASK; 667 unsigned rev = readl_relaxed(base + L2X0_CACHE_ID) & L2X0_CACHE_ID_RTL_MASK;
668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9; 668 bool cortex_a9 = read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
669 669
670 if (rev >= L310_CACHE_ID_RTL_R2P0) { 670 if (rev >= L310_CACHE_ID_RTL_R2P0) {
@@ -1069,6 +1069,33 @@ static const struct l2c_init_data of_l2c310_data __initconst = {
1069}; 1069};
1070 1070
1071/* 1071/*
1072 * This is a variant of the of_l2c310_data with .sync set to
1073 * NULL. Outer sync operations are not needed when the system is I/O
1074 * coherent, and potentially harmful in certain situations (PCIe/PL310
1075 * deadlock on Armada 375/38x due to hardware I/O coherency). The
1076 * other operations are kept because they are infrequent (therefore do
1077 * not cause the deadlock in practice) and needed for secondary CPU
1078 * boot and other power management activities.
1079 */
1080static const struct l2c_init_data of_l2c310_coherent_data __initconst = {
1081 .type = "L2C-310 Coherent",
1082 .way_size_0 = SZ_8K,
1083 .num_lock = 8,
1084 .of_parse = l2c310_of_parse,
1085 .enable = l2c310_enable,
1086 .fixup = l2c310_fixup,
1087 .save = l2c310_save,
1088 .outer_cache = {
1089 .inv_range = l2c210_inv_range,
1090 .clean_range = l2c210_clean_range,
1091 .flush_range = l2c210_flush_range,
1092 .flush_all = l2c210_flush_all,
1093 .disable = l2c310_disable,
1094 .resume = l2c310_resume,
1095 },
1096};
1097
1098/*
1072 * Note that the end addresses passed to Linux primitives are 1099 * Note that the end addresses passed to Linux primitives are
1073 * noninclusive, while the hardware cache range operations use 1100 * noninclusive, while the hardware cache range operations use
1074 * inclusive start and end addresses. 1101 * inclusive start and end addresses.
@@ -1487,6 +1514,10 @@ int __init l2x0_of_init(u32 aux_val, u32 aux_mask)
1487 1514
1488 data = of_match_node(l2x0_ids, np)->data; 1515 data = of_match_node(l2x0_ids, np)->data;
1489 1516
1517 if (of_device_is_compatible(np, "arm,pl310-cache") &&
1518 of_property_read_bool(np, "arm,io-coherent"))
1519 data = &of_l2c310_coherent_data;
1520
1490 old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); 1521 old_aux = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
1491 if (old_aux != ((old_aux & aux_mask) | aux_val)) { 1522 if (old_aux != ((old_aux & aux_mask) | aux_val)) {
1492 pr_warn("L2C: platform modifies aux control register: 0x%08x -> 0x%08x\n", 1523 pr_warn("L2C: platform modifies aux control register: 0x%08x -> 0x%08x\n",
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c
index da1874f9f8cf..a014dfacd5ca 100644
--- a/arch/arm/mm/nommu.c
+++ b/arch/arm/mm/nommu.c
@@ -300,6 +300,7 @@ void __init sanity_check_meminfo(void)
300 sanity_check_meminfo_mpu(); 300 sanity_check_meminfo_mpu();
301 end = memblock_end_of_DRAM(); 301 end = memblock_end_of_DRAM();
302 high_memory = __va(end - 1) + 1; 302 high_memory = __va(end - 1) + 1;
303 memblock_set_current_limit(end);
303} 304}
304 305
305/* 306/*
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S
index 97448c3acf38..ba0d58e1a2a2 100644
--- a/arch/arm/mm/proc-arm925.S
+++ b/arch/arm/mm/proc-arm925.S
@@ -502,6 +502,7 @@ __\name\()_proc_info:
502 .long \cpu_val 502 .long \cpu_val
503 .long \cpu_mask 503 .long \cpu_mask
504 .long PMD_TYPE_SECT | \ 504 .long PMD_TYPE_SECT | \
505 PMD_SECT_CACHEABLE | \
505 PMD_BIT4 | \ 506 PMD_BIT4 | \
506 PMD_SECT_AP_WRITE | \ 507 PMD_SECT_AP_WRITE | \
507 PMD_SECT_AP_READ 508 PMD_SECT_AP_READ
diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h
index 993bce527b85..902eb708804a 100644
--- a/arch/arm64/include/asm/memory.h
+++ b/arch/arm64/include/asm/memory.h
@@ -56,6 +56,8 @@
56#define TASK_SIZE_32 UL(0x100000000) 56#define TASK_SIZE_32 UL(0x100000000)
57#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ 57#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
58 TASK_SIZE_32 : TASK_SIZE_64) 58 TASK_SIZE_32 : TASK_SIZE_64)
59#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
60 TASK_SIZE_32 : TASK_SIZE_64)
59#else 61#else
60#define TASK_SIZE TASK_SIZE_64 62#define TASK_SIZE TASK_SIZE_64
61#endif /* CONFIG_COMPAT */ 63#endif /* CONFIG_COMPAT */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 579702086488..e0ccceb317d9 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -292,7 +292,7 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \ 292#define pmd_sect(pmd) ((pmd_val(pmd) & PMD_TYPE_MASK) == \
293 PMD_TYPE_SECT) 293 PMD_TYPE_SECT)
294 294
295#ifdef ARM64_64K_PAGES 295#ifdef CONFIG_ARM64_64K_PAGES
296#define pud_sect(pud) (0) 296#define pud_sect(pud) (0)
297#else 297#else
298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \ 298#define pud_sect(pud) ((pud_val(pud) & PUD_TYPE_MASK) == \
diff --git a/arch/arm64/include/asm/ptrace.h b/arch/arm64/include/asm/ptrace.h
index a429b5940be2..501000fadb6f 100644
--- a/arch/arm64/include/asm/ptrace.h
+++ b/arch/arm64/include/asm/ptrace.h
@@ -21,6 +21,10 @@
21 21
22#include <uapi/asm/ptrace.h> 22#include <uapi/asm/ptrace.h>
23 23
24/* Current Exception Level values, as contained in CurrentEL */
25#define CurrentEL_EL1 (1 << 2)
26#define CurrentEL_EL2 (2 << 2)
27
24/* AArch32-specific ptrace requests */ 28/* AArch32-specific ptrace requests */
25#define COMPAT_PTRACE_GETREGS 12 29#define COMPAT_PTRACE_GETREGS 12
26#define COMPAT_PTRACE_SETREGS 13 30#define COMPAT_PTRACE_SETREGS 13
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 66716c9b9e5f..619b1dd7bcde 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -78,8 +78,7 @@ ENTRY(efi_stub_entry)
78 78
79 /* Turn off Dcache and MMU */ 79 /* Turn off Dcache and MMU */
80 mrs x0, CurrentEL 80 mrs x0, CurrentEL
81 cmp x0, #PSR_MODE_EL2t 81 cmp x0, #CurrentEL_EL2
82 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
83 b.ne 1f 82 b.ne 1f
84 mrs x0, sctlr_el2 83 mrs x0, sctlr_el2
85 bic x0, x0, #1 << 0 // clear SCTLR.M 84 bic x0, x0, #1 << 0 // clear SCTLR.M
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index a96d3a6a63f6..a2c1195abb7f 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -270,8 +270,7 @@ ENDPROC(stext)
270 */ 270 */
271ENTRY(el2_setup) 271ENTRY(el2_setup)
272 mrs x0, CurrentEL 272 mrs x0, CurrentEL
273 cmp x0, #PSR_MODE_EL2t 273 cmp x0, #CurrentEL_EL2
274 ccmp x0, #PSR_MODE_EL2h, #0x4, ne
275 b.ne 1f 274 b.ne 1f
276 mrs x0, sctlr_el2 275 mrs x0, sctlr_el2
277CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2 276CPU_BE( orr x0, x0, #(1 << 25) ) // Set the EE bit for EL2
diff --git a/arch/arm64/mm/copypage.c b/arch/arm64/mm/copypage.c
index 9aecbace4128..13bbc3be6f5a 100644
--- a/arch/arm64/mm/copypage.c
+++ b/arch/arm64/mm/copypage.c
@@ -27,8 +27,10 @@ void __cpu_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
27 copy_page(kto, kfrom); 27 copy_page(kto, kfrom);
28 __flush_dcache_area(kto, PAGE_SIZE); 28 __flush_dcache_area(kto, PAGE_SIZE);
29} 29}
30EXPORT_SYMBOL_GPL(__cpu_copy_user_page);
30 31
31void __cpu_clear_user_page(void *kaddr, unsigned long vaddr) 32void __cpu_clear_user_page(void *kaddr, unsigned long vaddr)
32{ 33{
33 clear_page(kaddr); 34 clear_page(kaddr);
34} 35}
36EXPORT_SYMBOL_GPL(__cpu_clear_user_page);
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index e4193e3adc7f..0d64089d28b5 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -79,7 +79,8 @@ void __sync_icache_dcache(pte_t pte, unsigned long addr)
79 return; 79 return;
80 80
81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) { 81 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
82 __flush_dcache_area(page_address(page), PAGE_SIZE); 82 __flush_dcache_area(page_address(page),
83 PAGE_SIZE << compound_order(page));
83 __flush_icache_all(); 84 __flush_icache_all();
84 } else if (icache_is_aivivt()) { 85 } else if (icache_is_aivivt()) {
85 __flush_icache_all(); 86 __flush_icache_all();
diff --git a/arch/ia64/include/uapi/asm/fcntl.h b/arch/ia64/include/uapi/asm/fcntl.h
index 1dd275dc8f65..7b485876cad4 100644
--- a/arch/ia64/include/uapi/asm/fcntl.h
+++ b/arch/ia64/include/uapi/asm/fcntl.h
@@ -8,6 +8,7 @@
8#define force_o_largefile() \ 8#define force_o_largefile() \
9 (personality(current->personality) != PER_LINUX32) 9 (personality(current->personality) != PER_LINUX32)
10 10
11#include <linux/personality.h>
11#include <asm-generic/fcntl.h> 12#include <asm-generic/fcntl.h>
12 13
13#endif /* _ASM_IA64_FCNTL_H */ 14#endif /* _ASM_IA64_FCNTL_H */
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S
index dbb118e1a4e0..a54788458ca3 100644
--- a/arch/m68k/kernel/head.S
+++ b/arch/m68k/kernel/head.S
@@ -921,7 +921,8 @@ L(nocon):
921 jls 1f 921 jls 1f
922 lsrl #1,%d1 922 lsrl #1,%d1
9231: 9231:
924 movel %d1,m68k_init_mapped_size 924 lea %pc@(m68k_init_mapped_size),%a0
925 movel %d1,%a0@
925 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\ 926 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
926 %pc@(m68k_supervisor_cachemode) 927 %pc@(m68k_supervisor_cachemode)
927 928
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index 958f1adb9d0c..3857737e3958 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -11,6 +11,7 @@
11 */ 11 */
12 12
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/export.h>
14#include <linux/module.h> 15#include <linux/module.h>
15#include <linux/sched.h> 16#include <linux/sched.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
@@ -30,6 +31,7 @@
30 31
31 32
32unsigned long (*mach_random_get_entropy)(void); 33unsigned long (*mach_random_get_entropy)(void);
34EXPORT_SYMBOL_GPL(mach_random_get_entropy);
33 35
34 36
35/* 37/*
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a469acee33c..4e238e6e661c 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -269,6 +269,7 @@ config LANTIQ
269config LASAT 269config LASAT
270 bool "LASAT Networks platforms" 270 bool "LASAT Networks platforms"
271 select CEVT_R4K 271 select CEVT_R4K
272 select CRC32
272 select CSRC_R4K 273 select CSRC_R4K
273 select DMA_NONCOHERENT 274 select DMA_NONCOHERENT
274 select SYS_HAS_EARLY_PRINTK 275 select SYS_HAS_EARLY_PRINTK
diff --git a/arch/mips/include/asm/sigcontext.h b/arch/mips/include/asm/sigcontext.h
index f54bdbe85c0d..eeeb0f48c767 100644
--- a/arch/mips/include/asm/sigcontext.h
+++ b/arch/mips/include/asm/sigcontext.h
@@ -32,8 +32,6 @@ struct sigcontext32 {
32 __u32 sc_lo2; 32 __u32 sc_lo2;
33 __u32 sc_hi3; 33 __u32 sc_hi3;
34 __u32 sc_lo3; 34 __u32 sc_lo3;
35 __u64 sc_msaregs[32]; /* Most significant 64 bits */
36 __u32 sc_msa_csr;
37}; 35};
38#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */ 36#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32 */
39#endif /* _ASM_SIGCONTEXT_H */ 37#endif /* _ASM_SIGCONTEXT_H */
diff --git a/arch/mips/include/asm/uasm.h b/arch/mips/include/asm/uasm.h
index f8d63b3b40b4..708c5d414905 100644
--- a/arch/mips/include/asm/uasm.h
+++ b/arch/mips/include/asm/uasm.h
@@ -67,6 +67,9 @@ void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
67#define Ip_u2s3u1(op) \ 67#define Ip_u2s3u1(op) \
68void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c) 68void ISAOPC(op)(u32 **buf, unsigned int a, signed int b, unsigned int c)
69 69
70#define Ip_s3s1s2(op) \
71void ISAOPC(op)(u32 **buf, int a, int b, int c)
72
70#define Ip_u2u1s3(op) \ 73#define Ip_u2u1s3(op) \
71void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c) 74void ISAOPC(op)(u32 **buf, unsigned int a, unsigned int b, signed int c)
72 75
@@ -147,6 +150,7 @@ Ip_u2s3u1(_scd);
147Ip_u2s3u1(_sd); 150Ip_u2s3u1(_sd);
148Ip_u2u1u3(_sll); 151Ip_u2u1u3(_sll);
149Ip_u3u2u1(_sllv); 152Ip_u3u2u1(_sllv);
153Ip_s3s1s2(_slt);
150Ip_u2u1s3(_sltiu); 154Ip_u2u1s3(_sltiu);
151Ip_u3u1u2(_sltu); 155Ip_u3u1u2(_sltu);
152Ip_u2u1u3(_sra); 156Ip_u2u1u3(_sra);
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 4b7160259292..4bfdb9d4c186 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -273,6 +273,7 @@ enum mm_32a_minor_op {
273 mm_and_op = 0x250, 273 mm_and_op = 0x250,
274 mm_or32_op = 0x290, 274 mm_or32_op = 0x290,
275 mm_xor32_op = 0x310, 275 mm_xor32_op = 0x310,
276 mm_slt_op = 0x350,
276 mm_sltu_op = 0x390, 277 mm_sltu_op = 0x390,
277}; 278};
278 279
diff --git a/arch/mips/include/uapi/asm/sigcontext.h b/arch/mips/include/uapi/asm/sigcontext.h
index 681c17603a48..6c9906f59c6e 100644
--- a/arch/mips/include/uapi/asm/sigcontext.h
+++ b/arch/mips/include/uapi/asm/sigcontext.h
@@ -12,10 +12,6 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/sgidefs.h> 13#include <asm/sgidefs.h>
14 14
15/* Bits which may be set in sc_used_math */
16#define USEDMATH_FP (1 << 0)
17#define USEDMATH_MSA (1 << 1)
18
19#if _MIPS_SIM == _MIPS_SIM_ABI32 15#if _MIPS_SIM == _MIPS_SIM_ABI32
20 16
21/* 17/*
@@ -41,8 +37,6 @@ struct sigcontext {
41 unsigned long sc_lo2; 37 unsigned long sc_lo2;
42 unsigned long sc_hi3; 38 unsigned long sc_hi3;
43 unsigned long sc_lo3; 39 unsigned long sc_lo3;
44 unsigned long long sc_msaregs[32]; /* Most significant 64 bits */
45 unsigned long sc_msa_csr;
46}; 40};
47 41
48#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ 42#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
@@ -76,8 +70,6 @@ struct sigcontext {
76 __u32 sc_used_math; 70 __u32 sc_used_math;
77 __u32 sc_dsp; 71 __u32 sc_dsp;
78 __u32 sc_reserved; 72 __u32 sc_reserved;
79 __u64 sc_msaregs[32];
80 __u32 sc_msa_csr;
81}; 73};
82 74
83 75
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 02f075df8f2e..4bb5107511e2 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -293,7 +293,6 @@ void output_sc_defines(void)
293 OFFSET(SC_LO2, sigcontext, sc_lo2); 293 OFFSET(SC_LO2, sigcontext, sc_lo2);
294 OFFSET(SC_HI3, sigcontext, sc_hi3); 294 OFFSET(SC_HI3, sigcontext, sc_hi3);
295 OFFSET(SC_LO3, sigcontext, sc_lo3); 295 OFFSET(SC_LO3, sigcontext, sc_lo3);
296 OFFSET(SC_MSAREGS, sigcontext, sc_msaregs);
297 BLANK(); 296 BLANK();
298} 297}
299#endif 298#endif
@@ -308,7 +307,6 @@ void output_sc_defines(void)
308 OFFSET(SC_MDLO, sigcontext, sc_mdlo); 307 OFFSET(SC_MDLO, sigcontext, sc_mdlo);
309 OFFSET(SC_PC, sigcontext, sc_pc); 308 OFFSET(SC_PC, sigcontext, sc_pc);
310 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr); 309 OFFSET(SC_FPC_CSR, sigcontext, sc_fpc_csr);
311 OFFSET(SC_MSAREGS, sigcontext, sc_msaregs);
312 BLANK(); 310 BLANK();
313} 311}
314#endif 312#endif
@@ -320,7 +318,6 @@ void output_sc32_defines(void)
320 OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs); 318 OFFSET(SC32_FPREGS, sigcontext32, sc_fpregs);
321 OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr); 319 OFFSET(SC32_FPC_CSR, sigcontext32, sc_fpc_csr);
322 OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir); 320 OFFSET(SC32_FPC_EIR, sigcontext32, sc_fpc_eir);
323 OFFSET(SC32_MSAREGS, sigcontext32, sc_msaregs);
324 BLANK(); 321 BLANK();
325} 322}
326#endif 323#endif
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c
index 4858642d543d..a734b2c2f9ea 100644
--- a/arch/mips/kernel/irq-msc01.c
+++ b/arch/mips/kernel/irq-msc01.c
@@ -126,7 +126,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma
126 126
127 board_bind_eic_interrupt = &msc_bind_eic_interrupt; 127 board_bind_eic_interrupt = &msc_bind_eic_interrupt;
128 128
129 for (; nirq >= 0; nirq--, imp++) { 129 for (; nirq > 0; nirq--, imp++) {
130 int n = imp->im_irq; 130 int n = imp->im_irq;
131 131
132 switch (imp->im_type) { 132 switch (imp->im_type) {
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c
index 5aa4c6f8cf83..c4c2069d3a20 100644
--- a/arch/mips/kernel/pm-cps.c
+++ b/arch/mips/kernel/pm-cps.c
@@ -101,7 +101,7 @@ static void coupled_barrier(atomic_t *a, unsigned online)
101 if (!coupled_coherence) 101 if (!coupled_coherence)
102 return; 102 return;
103 103
104 smp_mb__before_atomic_inc(); 104 smp_mb__before_atomic();
105 atomic_inc(a); 105 atomic_inc(a);
106 106
107 while (atomic_read(a) < online) 107 while (atomic_read(a) < online)
@@ -158,7 +158,7 @@ int cps_pm_enter_state(enum cps_pm_state state)
158 158
159 /* Indicate that this CPU might not be coherent */ 159 /* Indicate that this CPU might not be coherent */
160 cpumask_clear_cpu(cpu, &cpu_coherent_mask); 160 cpumask_clear_cpu(cpu, &cpu_coherent_mask);
161 smp_mb__after_clear_bit(); 161 smp_mb__after_atomic();
162 162
163 /* Create a non-coherent mapping of the core ready_count */ 163 /* Create a non-coherent mapping of the core ready_count */
164 core_ready_count = per_cpu(ready_count, core); 164 core_ready_count = per_cpu(ready_count, core);
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 71814272d148..8352523568e6 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -13,7 +13,6 @@
13 * Copyright (C) 1999, 2001 Silicon Graphics, Inc. 13 * Copyright (C) 1999, 2001 Silicon Graphics, Inc.
14 */ 14 */
15#include <asm/asm.h> 15#include <asm/asm.h>
16#include <asm/asmmacro.h>
17#include <asm/errno.h> 16#include <asm/errno.h>
18#include <asm/fpregdef.h> 17#include <asm/fpregdef.h>
19#include <asm/mipsregs.h> 18#include <asm/mipsregs.h>
@@ -246,218 +245,6 @@ LEAF(_restore_fp_context32)
246 END(_restore_fp_context32) 245 END(_restore_fp_context32)
247#endif 246#endif
248 247
249#ifdef CONFIG_CPU_HAS_MSA
250
251 .macro save_sc_msareg wr, off, sc, tmp
252#ifdef CONFIG_64BIT
253 copy_u_d \tmp, \wr, 1
254 EX sd \tmp, (\off+(\wr*8))(\sc)
255#elif defined(CONFIG_CPU_LITTLE_ENDIAN)
256 copy_u_w \tmp, \wr, 2
257 EX sw \tmp, (\off+(\wr*8)+0)(\sc)
258 copy_u_w \tmp, \wr, 3
259 EX sw \tmp, (\off+(\wr*8)+4)(\sc)
260#else /* CONFIG_CPU_BIG_ENDIAN */
261 copy_u_w \tmp, \wr, 2
262 EX sw \tmp, (\off+(\wr*8)+4)(\sc)
263 copy_u_w \tmp, \wr, 3
264 EX sw \tmp, (\off+(\wr*8)+0)(\sc)
265#endif
266 .endm
267
268/*
269 * int _save_msa_context(struct sigcontext *sc)
270 *
271 * Save the upper 64 bits of each vector register along with the MSA_CSR
272 * register into sc. Returns zero on success, else non-zero.
273 */
274LEAF(_save_msa_context)
275 save_sc_msareg 0, SC_MSAREGS, a0, t0
276 save_sc_msareg 1, SC_MSAREGS, a0, t0
277 save_sc_msareg 2, SC_MSAREGS, a0, t0
278 save_sc_msareg 3, SC_MSAREGS, a0, t0
279 save_sc_msareg 4, SC_MSAREGS, a0, t0
280 save_sc_msareg 5, SC_MSAREGS, a0, t0
281 save_sc_msareg 6, SC_MSAREGS, a0, t0
282 save_sc_msareg 7, SC_MSAREGS, a0, t0
283 save_sc_msareg 8, SC_MSAREGS, a0, t0
284 save_sc_msareg 9, SC_MSAREGS, a0, t0
285 save_sc_msareg 10, SC_MSAREGS, a0, t0
286 save_sc_msareg 11, SC_MSAREGS, a0, t0
287 save_sc_msareg 12, SC_MSAREGS, a0, t0
288 save_sc_msareg 13, SC_MSAREGS, a0, t0
289 save_sc_msareg 14, SC_MSAREGS, a0, t0
290 save_sc_msareg 15, SC_MSAREGS, a0, t0
291 save_sc_msareg 16, SC_MSAREGS, a0, t0
292 save_sc_msareg 17, SC_MSAREGS, a0, t0
293 save_sc_msareg 18, SC_MSAREGS, a0, t0
294 save_sc_msareg 19, SC_MSAREGS, a0, t0
295 save_sc_msareg 20, SC_MSAREGS, a0, t0
296 save_sc_msareg 21, SC_MSAREGS, a0, t0
297 save_sc_msareg 22, SC_MSAREGS, a0, t0
298 save_sc_msareg 23, SC_MSAREGS, a0, t0
299 save_sc_msareg 24, SC_MSAREGS, a0, t0
300 save_sc_msareg 25, SC_MSAREGS, a0, t0
301 save_sc_msareg 26, SC_MSAREGS, a0, t0
302 save_sc_msareg 27, SC_MSAREGS, a0, t0
303 save_sc_msareg 28, SC_MSAREGS, a0, t0
304 save_sc_msareg 29, SC_MSAREGS, a0, t0
305 save_sc_msareg 30, SC_MSAREGS, a0, t0
306 save_sc_msareg 31, SC_MSAREGS, a0, t0
307 jr ra
308 li v0, 0
309 END(_save_msa_context)
310
311#ifdef CONFIG_MIPS32_COMPAT
312
313/*
314 * int _save_msa_context32(struct sigcontext32 *sc)
315 *
316 * Save the upper 64 bits of each vector register along with the MSA_CSR
317 * register into sc. Returns zero on success, else non-zero.
318 */
319LEAF(_save_msa_context32)
320 save_sc_msareg 0, SC32_MSAREGS, a0, t0
321 save_sc_msareg 1, SC32_MSAREGS, a0, t0
322 save_sc_msareg 2, SC32_MSAREGS, a0, t0
323 save_sc_msareg 3, SC32_MSAREGS, a0, t0
324 save_sc_msareg 4, SC32_MSAREGS, a0, t0
325 save_sc_msareg 5, SC32_MSAREGS, a0, t0
326 save_sc_msareg 6, SC32_MSAREGS, a0, t0
327 save_sc_msareg 7, SC32_MSAREGS, a0, t0
328 save_sc_msareg 8, SC32_MSAREGS, a0, t0
329 save_sc_msareg 9, SC32_MSAREGS, a0, t0
330 save_sc_msareg 10, SC32_MSAREGS, a0, t0
331 save_sc_msareg 11, SC32_MSAREGS, a0, t0
332 save_sc_msareg 12, SC32_MSAREGS, a0, t0
333 save_sc_msareg 13, SC32_MSAREGS, a0, t0
334 save_sc_msareg 14, SC32_MSAREGS, a0, t0
335 save_sc_msareg 15, SC32_MSAREGS, a0, t0
336 save_sc_msareg 16, SC32_MSAREGS, a0, t0
337 save_sc_msareg 17, SC32_MSAREGS, a0, t0
338 save_sc_msareg 18, SC32_MSAREGS, a0, t0
339 save_sc_msareg 19, SC32_MSAREGS, a0, t0
340 save_sc_msareg 20, SC32_MSAREGS, a0, t0
341 save_sc_msareg 21, SC32_MSAREGS, a0, t0
342 save_sc_msareg 22, SC32_MSAREGS, a0, t0
343 save_sc_msareg 23, SC32_MSAREGS, a0, t0
344 save_sc_msareg 24, SC32_MSAREGS, a0, t0
345 save_sc_msareg 25, SC32_MSAREGS, a0, t0
346 save_sc_msareg 26, SC32_MSAREGS, a0, t0
347 save_sc_msareg 27, SC32_MSAREGS, a0, t0
348 save_sc_msareg 28, SC32_MSAREGS, a0, t0
349 save_sc_msareg 29, SC32_MSAREGS, a0, t0
350 save_sc_msareg 30, SC32_MSAREGS, a0, t0
351 save_sc_msareg 31, SC32_MSAREGS, a0, t0
352 jr ra
353 li v0, 0
354 END(_save_msa_context32)
355
356#endif /* CONFIG_MIPS32_COMPAT */
357
358 .macro restore_sc_msareg wr, off, sc, tmp
359#ifdef CONFIG_64BIT
360 EX ld \tmp, (\off+(\wr*8))(\sc)
361 insert_d \wr, 1, \tmp
362#elif defined(CONFIG_CPU_LITTLE_ENDIAN)
363 EX lw \tmp, (\off+(\wr*8)+0)(\sc)
364 insert_w \wr, 2, \tmp
365 EX lw \tmp, (\off+(\wr*8)+4)(\sc)
366 insert_w \wr, 3, \tmp
367#else /* CONFIG_CPU_BIG_ENDIAN */
368 EX lw \tmp, (\off+(\wr*8)+4)(\sc)
369 insert_w \wr, 2, \tmp
370 EX lw \tmp, (\off+(\wr*8)+0)(\sc)
371 insert_w \wr, 3, \tmp
372#endif
373 .endm
374
375/*
376 * int _restore_msa_context(struct sigcontext *sc)
377 */
378LEAF(_restore_msa_context)
379 restore_sc_msareg 0, SC_MSAREGS, a0, t0
380 restore_sc_msareg 1, SC_MSAREGS, a0, t0
381 restore_sc_msareg 2, SC_MSAREGS, a0, t0
382 restore_sc_msareg 3, SC_MSAREGS, a0, t0
383 restore_sc_msareg 4, SC_MSAREGS, a0, t0
384 restore_sc_msareg 5, SC_MSAREGS, a0, t0
385 restore_sc_msareg 6, SC_MSAREGS, a0, t0
386 restore_sc_msareg 7, SC_MSAREGS, a0, t0
387 restore_sc_msareg 8, SC_MSAREGS, a0, t0
388 restore_sc_msareg 9, SC_MSAREGS, a0, t0
389 restore_sc_msareg 10, SC_MSAREGS, a0, t0
390 restore_sc_msareg 11, SC_MSAREGS, a0, t0
391 restore_sc_msareg 12, SC_MSAREGS, a0, t0
392 restore_sc_msareg 13, SC_MSAREGS, a0, t0
393 restore_sc_msareg 14, SC_MSAREGS, a0, t0
394 restore_sc_msareg 15, SC_MSAREGS, a0, t0
395 restore_sc_msareg 16, SC_MSAREGS, a0, t0
396 restore_sc_msareg 17, SC_MSAREGS, a0, t0
397 restore_sc_msareg 18, SC_MSAREGS, a0, t0
398 restore_sc_msareg 19, SC_MSAREGS, a0, t0
399 restore_sc_msareg 20, SC_MSAREGS, a0, t0
400 restore_sc_msareg 21, SC_MSAREGS, a0, t0
401 restore_sc_msareg 22, SC_MSAREGS, a0, t0
402 restore_sc_msareg 23, SC_MSAREGS, a0, t0
403 restore_sc_msareg 24, SC_MSAREGS, a0, t0
404 restore_sc_msareg 25, SC_MSAREGS, a0, t0
405 restore_sc_msareg 26, SC_MSAREGS, a0, t0
406 restore_sc_msareg 27, SC_MSAREGS, a0, t0
407 restore_sc_msareg 28, SC_MSAREGS, a0, t0
408 restore_sc_msareg 29, SC_MSAREGS, a0, t0
409 restore_sc_msareg 30, SC_MSAREGS, a0, t0
410 restore_sc_msareg 31, SC_MSAREGS, a0, t0
411 jr ra
412 li v0, 0
413 END(_restore_msa_context)
414
415#ifdef CONFIG_MIPS32_COMPAT
416
417/*
418 * int _restore_msa_context32(struct sigcontext32 *sc)
419 */
420LEAF(_restore_msa_context32)
421 restore_sc_msareg 0, SC32_MSAREGS, a0, t0
422 restore_sc_msareg 1, SC32_MSAREGS, a0, t0
423 restore_sc_msareg 2, SC32_MSAREGS, a0, t0
424 restore_sc_msareg 3, SC32_MSAREGS, a0, t0
425 restore_sc_msareg 4, SC32_MSAREGS, a0, t0
426 restore_sc_msareg 5, SC32_MSAREGS, a0, t0
427 restore_sc_msareg 6, SC32_MSAREGS, a0, t0
428 restore_sc_msareg 7, SC32_MSAREGS, a0, t0
429 restore_sc_msareg 8, SC32_MSAREGS, a0, t0
430 restore_sc_msareg 9, SC32_MSAREGS, a0, t0
431 restore_sc_msareg 10, SC32_MSAREGS, a0, t0
432 restore_sc_msareg 11, SC32_MSAREGS, a0, t0
433 restore_sc_msareg 12, SC32_MSAREGS, a0, t0
434 restore_sc_msareg 13, SC32_MSAREGS, a0, t0
435 restore_sc_msareg 14, SC32_MSAREGS, a0, t0
436 restore_sc_msareg 15, SC32_MSAREGS, a0, t0
437 restore_sc_msareg 16, SC32_MSAREGS, a0, t0
438 restore_sc_msareg 17, SC32_MSAREGS, a0, t0
439 restore_sc_msareg 18, SC32_MSAREGS, a0, t0
440 restore_sc_msareg 19, SC32_MSAREGS, a0, t0
441 restore_sc_msareg 20, SC32_MSAREGS, a0, t0
442 restore_sc_msareg 21, SC32_MSAREGS, a0, t0
443 restore_sc_msareg 22, SC32_MSAREGS, a0, t0
444 restore_sc_msareg 23, SC32_MSAREGS, a0, t0
445 restore_sc_msareg 24, SC32_MSAREGS, a0, t0
446 restore_sc_msareg 25, SC32_MSAREGS, a0, t0
447 restore_sc_msareg 26, SC32_MSAREGS, a0, t0
448 restore_sc_msareg 27, SC32_MSAREGS, a0, t0
449 restore_sc_msareg 28, SC32_MSAREGS, a0, t0
450 restore_sc_msareg 29, SC32_MSAREGS, a0, t0
451 restore_sc_msareg 30, SC32_MSAREGS, a0, t0
452 restore_sc_msareg 31, SC32_MSAREGS, a0, t0
453 jr ra
454 li v0, 0
455 END(_restore_msa_context32)
456
457#endif /* CONFIG_MIPS32_COMPAT */
458
459#endif /* CONFIG_CPU_HAS_MSA */
460
461 .set reorder 248 .set reorder
462 249
463 .type fault@function 250 .type fault@function
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 33133d3df3e5..9e60d117e41e 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -31,7 +31,6 @@
31#include <linux/bitops.h> 31#include <linux/bitops.h>
32#include <asm/cacheflush.h> 32#include <asm/cacheflush.h>
33#include <asm/fpu.h> 33#include <asm/fpu.h>
34#include <asm/msa.h>
35#include <asm/sim.h> 34#include <asm/sim.h>
36#include <asm/ucontext.h> 35#include <asm/ucontext.h>
37#include <asm/cpu-features.h> 36#include <asm/cpu-features.h>
@@ -48,9 +47,6 @@ static int (*restore_fp_context)(struct sigcontext __user *sc);
48extern asmlinkage int _save_fp_context(struct sigcontext __user *sc); 47extern asmlinkage int _save_fp_context(struct sigcontext __user *sc);
49extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc); 48extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc);
50 49
51extern asmlinkage int _save_msa_context(struct sigcontext __user *sc);
52extern asmlinkage int _restore_msa_context(struct sigcontext __user *sc);
53
54struct sigframe { 50struct sigframe {
55 u32 sf_ass[4]; /* argument save space for o32 */ 51 u32 sf_ass[4]; /* argument save space for o32 */
56 u32 sf_pad[2]; /* Was: signal trampoline */ 52 u32 sf_pad[2]; /* Was: signal trampoline */
@@ -100,60 +96,20 @@ static int copy_fp_from_sigcontext(struct sigcontext __user *sc)
100} 96}
101 97
102/* 98/*
103 * These functions will save only the upper 64 bits of the vector registers,
104 * since the lower 64 bits have already been saved as the scalar FP context.
105 */
106static int copy_msa_to_sigcontext(struct sigcontext __user *sc)
107{
108 int i;
109 int err = 0;
110
111 for (i = 0; i < NUM_FPU_REGS; i++) {
112 err |=
113 __put_user(get_fpr64(&current->thread.fpu.fpr[i], 1),
114 &sc->sc_msaregs[i]);
115 }
116 err |= __put_user(current->thread.fpu.msacsr, &sc->sc_msa_csr);
117
118 return err;
119}
120
121static int copy_msa_from_sigcontext(struct sigcontext __user *sc)
122{
123 int i;
124 int err = 0;
125 u64 val;
126
127 for (i = 0; i < NUM_FPU_REGS; i++) {
128 err |= __get_user(val, &sc->sc_msaregs[i]);
129 set_fpr64(&current->thread.fpu.fpr[i], 1, val);
130 }
131 err |= __get_user(current->thread.fpu.msacsr, &sc->sc_msa_csr);
132
133 return err;
134}
135
136/*
137 * Helper routines 99 * Helper routines
138 */ 100 */
139static int protected_save_fp_context(struct sigcontext __user *sc, 101static int protected_save_fp_context(struct sigcontext __user *sc)
140 unsigned used_math)
141{ 102{
142 int err; 103 int err;
143 bool save_msa = cpu_has_msa && (used_math & USEDMATH_MSA);
144#ifndef CONFIG_EVA 104#ifndef CONFIG_EVA
145 while (1) { 105 while (1) {
146 lock_fpu_owner(); 106 lock_fpu_owner();
147 if (is_fpu_owner()) { 107 if (is_fpu_owner()) {
148 err = save_fp_context(sc); 108 err = save_fp_context(sc);
149 if (save_msa && !err)
150 err = _save_msa_context(sc);
151 unlock_fpu_owner(); 109 unlock_fpu_owner();
152 } else { 110 } else {
153 unlock_fpu_owner(); 111 unlock_fpu_owner();
154 err = copy_fp_to_sigcontext(sc); 112 err = copy_fp_to_sigcontext(sc);
155 if (save_msa && !err)
156 err = copy_msa_to_sigcontext(sc);
157 } 113 }
158 if (likely(!err)) 114 if (likely(!err))
159 break; 115 break;
@@ -169,38 +125,24 @@ static int protected_save_fp_context(struct sigcontext __user *sc,
169 * EVA does not have FPU EVA instructions so saving fpu context directly 125 * EVA does not have FPU EVA instructions so saving fpu context directly
170 * does not work. 126 * does not work.
171 */ 127 */
172 disable_msa();
173 lose_fpu(1); 128 lose_fpu(1);
174 err = save_fp_context(sc); /* this might fail */ 129 err = save_fp_context(sc); /* this might fail */
175 if (save_msa && !err)
176 err = copy_msa_to_sigcontext(sc);
177#endif 130#endif
178 return err; 131 return err;
179} 132}
180 133
181static int protected_restore_fp_context(struct sigcontext __user *sc, 134static int protected_restore_fp_context(struct sigcontext __user *sc)
182 unsigned used_math)
183{ 135{
184 int err, tmp __maybe_unused; 136 int err, tmp __maybe_unused;
185 bool restore_msa = cpu_has_msa && (used_math & USEDMATH_MSA);
186#ifndef CONFIG_EVA 137#ifndef CONFIG_EVA
187 while (1) { 138 while (1) {
188 lock_fpu_owner(); 139 lock_fpu_owner();
189 if (is_fpu_owner()) { 140 if (is_fpu_owner()) {
190 err = restore_fp_context(sc); 141 err = restore_fp_context(sc);
191 if (restore_msa && !err) {
192 enable_msa();
193 err = _restore_msa_context(sc);
194 } else {
195 /* signal handler may have used MSA */
196 disable_msa();
197 }
198 unlock_fpu_owner(); 142 unlock_fpu_owner();
199 } else { 143 } else {
200 unlock_fpu_owner(); 144 unlock_fpu_owner();
201 err = copy_fp_from_sigcontext(sc); 145 err = copy_fp_from_sigcontext(sc);
202 if (!err && (used_math & USEDMATH_MSA))
203 err = copy_msa_from_sigcontext(sc);
204 } 146 }
205 if (likely(!err)) 147 if (likely(!err))
206 break; 148 break;
@@ -216,11 +158,8 @@ static int protected_restore_fp_context(struct sigcontext __user *sc,
216 * EVA does not have FPU EVA instructions so restoring fpu context 158 * EVA does not have FPU EVA instructions so restoring fpu context
217 * directly does not work. 159 * directly does not work.
218 */ 160 */
219 enable_msa();
220 lose_fpu(0); 161 lose_fpu(0);
221 err = restore_fp_context(sc); /* this might fail */ 162 err = restore_fp_context(sc); /* this might fail */
222 if (restore_msa && !err)
223 err = copy_msa_from_sigcontext(sc);
224#endif 163#endif
225 return err; 164 return err;
226} 165}
@@ -252,8 +191,7 @@ int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
252 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); 191 err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp);
253 } 192 }
254 193
255 used_math = used_math() ? USEDMATH_FP : 0; 194 used_math = !!used_math();
256 used_math |= thread_msa_context_live() ? USEDMATH_MSA : 0;
257 err |= __put_user(used_math, &sc->sc_used_math); 195 err |= __put_user(used_math, &sc->sc_used_math);
258 196
259 if (used_math) { 197 if (used_math) {
@@ -261,7 +199,7 @@ int setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
261 * Save FPU state to signal context. Signal handler 199 * Save FPU state to signal context. Signal handler
262 * will "inherit" current FPU state. 200 * will "inherit" current FPU state.
263 */ 201 */
264 err |= protected_save_fp_context(sc, used_math); 202 err |= protected_save_fp_context(sc);
265 } 203 }
266 return err; 204 return err;
267} 205}
@@ -286,14 +224,14 @@ int fpcsr_pending(unsigned int __user *fpcsr)
286} 224}
287 225
288static int 226static int
289check_and_restore_fp_context(struct sigcontext __user *sc, unsigned used_math) 227check_and_restore_fp_context(struct sigcontext __user *sc)
290{ 228{
291 int err, sig; 229 int err, sig;
292 230
293 err = sig = fpcsr_pending(&sc->sc_fpc_csr); 231 err = sig = fpcsr_pending(&sc->sc_fpc_csr);
294 if (err > 0) 232 if (err > 0)
295 err = 0; 233 err = 0;
296 err |= protected_restore_fp_context(sc, used_math); 234 err |= protected_restore_fp_context(sc);
297 return err ?: sig; 235 return err ?: sig;
298} 236}
299 237
@@ -333,10 +271,9 @@ int restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc)
333 if (used_math) { 271 if (used_math) {
334 /* restore fpu context if we have used it before */ 272 /* restore fpu context if we have used it before */
335 if (!err) 273 if (!err)
336 err = check_and_restore_fp_context(sc, used_math); 274 err = check_and_restore_fp_context(sc);
337 } else { 275 } else {
338 /* signal handler may have used FPU or MSA. Disable them. */ 276 /* signal handler may have used FPU. Give it up. */
339 disable_msa();
340 lose_fpu(0); 277 lose_fpu(0);
341 } 278 }
342 279
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c
index 299f956e4db3..bae2e6ee2109 100644
--- a/arch/mips/kernel/signal32.c
+++ b/arch/mips/kernel/signal32.c
@@ -30,7 +30,6 @@
30#include <asm/sim.h> 30#include <asm/sim.h>
31#include <asm/ucontext.h> 31#include <asm/ucontext.h>
32#include <asm/fpu.h> 32#include <asm/fpu.h>
33#include <asm/msa.h>
34#include <asm/war.h> 33#include <asm/war.h>
35#include <asm/vdso.h> 34#include <asm/vdso.h>
36#include <asm/dsp.h> 35#include <asm/dsp.h>
@@ -43,9 +42,6 @@ static int (*restore_fp_context32)(struct sigcontext32 __user *sc);
43extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc); 42extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc);
44extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc); 43extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc);
45 44
46extern asmlinkage int _save_msa_context32(struct sigcontext32 __user *sc);
47extern asmlinkage int _restore_msa_context32(struct sigcontext32 __user *sc);
48
49/* 45/*
50 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... 46 * Including <asm/unistd.h> would give use the 64-bit syscall numbers ...
51 */ 47 */
@@ -115,59 +111,19 @@ static int copy_fp_from_sigcontext32(struct sigcontext32 __user *sc)
115} 111}
116 112
117/* 113/*
118 * These functions will save only the upper 64 bits of the vector registers,
119 * since the lower 64 bits have already been saved as the scalar FP context.
120 */
121static int copy_msa_to_sigcontext32(struct sigcontext32 __user *sc)
122{
123 int i;
124 int err = 0;
125
126 for (i = 0; i < NUM_FPU_REGS; i++) {
127 err |=
128 __put_user(get_fpr64(&current->thread.fpu.fpr[i], 1),
129 &sc->sc_msaregs[i]);
130 }
131 err |= __put_user(current->thread.fpu.msacsr, &sc->sc_msa_csr);
132
133 return err;
134}
135
136static int copy_msa_from_sigcontext32(struct sigcontext32 __user *sc)
137{
138 int i;
139 int err = 0;
140 u64 val;
141
142 for (i = 0; i < NUM_FPU_REGS; i++) {
143 err |= __get_user(val, &sc->sc_msaregs[i]);
144 set_fpr64(&current->thread.fpu.fpr[i], 1, val);
145 }
146 err |= __get_user(current->thread.fpu.msacsr, &sc->sc_msa_csr);
147
148 return err;
149}
150
151/*
152 * sigcontext handlers 114 * sigcontext handlers
153 */ 115 */
154static int protected_save_fp_context32(struct sigcontext32 __user *sc, 116static int protected_save_fp_context32(struct sigcontext32 __user *sc)
155 unsigned used_math)
156{ 117{
157 int err; 118 int err;
158 bool save_msa = cpu_has_msa && (used_math & USEDMATH_MSA);
159 while (1) { 119 while (1) {
160 lock_fpu_owner(); 120 lock_fpu_owner();
161 if (is_fpu_owner()) { 121 if (is_fpu_owner()) {
162 err = save_fp_context32(sc); 122 err = save_fp_context32(sc);
163 if (save_msa && !err)
164 err = _save_msa_context32(sc);
165 unlock_fpu_owner(); 123 unlock_fpu_owner();
166 } else { 124 } else {
167 unlock_fpu_owner(); 125 unlock_fpu_owner();
168 err = copy_fp_to_sigcontext32(sc); 126 err = copy_fp_to_sigcontext32(sc);
169 if (save_msa && !err)
170 err = copy_msa_to_sigcontext32(sc);
171 } 127 }
172 if (likely(!err)) 128 if (likely(!err))
173 break; 129 break;
@@ -181,28 +137,17 @@ static int protected_save_fp_context32(struct sigcontext32 __user *sc,
181 return err; 137 return err;
182} 138}
183 139
184static int protected_restore_fp_context32(struct sigcontext32 __user *sc, 140static int protected_restore_fp_context32(struct sigcontext32 __user *sc)
185 unsigned used_math)
186{ 141{
187 int err, tmp __maybe_unused; 142 int err, tmp __maybe_unused;
188 bool restore_msa = cpu_has_msa && (used_math & USEDMATH_MSA);
189 while (1) { 143 while (1) {
190 lock_fpu_owner(); 144 lock_fpu_owner();
191 if (is_fpu_owner()) { 145 if (is_fpu_owner()) {
192 err = restore_fp_context32(sc); 146 err = restore_fp_context32(sc);
193 if (restore_msa && !err) {
194 enable_msa();
195 err = _restore_msa_context32(sc);
196 } else {
197 /* signal handler may have used MSA */
198 disable_msa();
199 }
200 unlock_fpu_owner(); 147 unlock_fpu_owner();
201 } else { 148 } else {
202 unlock_fpu_owner(); 149 unlock_fpu_owner();
203 err = copy_fp_from_sigcontext32(sc); 150 err = copy_fp_from_sigcontext32(sc);
204 if (restore_msa && !err)
205 err = copy_msa_from_sigcontext32(sc);
206 } 151 }
207 if (likely(!err)) 152 if (likely(!err))
208 break; 153 break;
@@ -241,8 +186,7 @@ static int setup_sigcontext32(struct pt_regs *regs,
241 err |= __put_user(mflo3(), &sc->sc_lo3); 186 err |= __put_user(mflo3(), &sc->sc_lo3);
242 } 187 }
243 188
244 used_math = used_math() ? USEDMATH_FP : 0; 189 used_math = !!used_math();
245 used_math |= thread_msa_context_live() ? USEDMATH_MSA : 0;
246 err |= __put_user(used_math, &sc->sc_used_math); 190 err |= __put_user(used_math, &sc->sc_used_math);
247 191
248 if (used_math) { 192 if (used_math) {
@@ -250,21 +194,20 @@ static int setup_sigcontext32(struct pt_regs *regs,
250 * Save FPU state to signal context. Signal handler 194 * Save FPU state to signal context. Signal handler
251 * will "inherit" current FPU state. 195 * will "inherit" current FPU state.
252 */ 196 */
253 err |= protected_save_fp_context32(sc, used_math); 197 err |= protected_save_fp_context32(sc);
254 } 198 }
255 return err; 199 return err;
256} 200}
257 201
258static int 202static int
259check_and_restore_fp_context32(struct sigcontext32 __user *sc, 203check_and_restore_fp_context32(struct sigcontext32 __user *sc)
260 unsigned used_math)
261{ 204{
262 int err, sig; 205 int err, sig;
263 206
264 err = sig = fpcsr_pending(&sc->sc_fpc_csr); 207 err = sig = fpcsr_pending(&sc->sc_fpc_csr);
265 if (err > 0) 208 if (err > 0)
266 err = 0; 209 err = 0;
267 err |= protected_restore_fp_context32(sc, used_math); 210 err |= protected_restore_fp_context32(sc);
268 return err ?: sig; 211 return err ?: sig;
269} 212}
270 213
@@ -301,10 +244,9 @@ static int restore_sigcontext32(struct pt_regs *regs,
301 if (used_math) { 244 if (used_math) {
302 /* restore fpu context if we have used it before */ 245 /* restore fpu context if we have used it before */
303 if (!err) 246 if (!err)
304 err = check_and_restore_fp_context32(sc, used_math); 247 err = check_and_restore_fp_context32(sc);
305 } else { 248 } else {
306 /* signal handler may have used FPU or MSA. Disable them. */ 249 /* signal handler may have used FPU. Give it up. */
307 disable_msa();
308 lose_fpu(0); 250 lose_fpu(0);
309 } 251 }
310 252
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c
index df0598d9bfdd..949f2c6827a0 100644
--- a/arch/mips/kernel/smp-cps.c
+++ b/arch/mips/kernel/smp-cps.c
@@ -301,7 +301,7 @@ static int cps_cpu_disable(void)
301 301
302 core_cfg = &mips_cps_core_bootcfg[current_cpu_data.core]; 302 core_cfg = &mips_cps_core_bootcfg[current_cpu_data.core];
303 atomic_sub(1 << cpu_vpe_id(&current_cpu_data), &core_cfg->vpe_mask); 303 atomic_sub(1 << cpu_vpe_id(&current_cpu_data), &core_cfg->vpe_mask);
304 smp_mb__after_atomic_dec(); 304 smp_mb__after_atomic();
305 set_cpu_online(cpu, false); 305 set_cpu_online(cpu, false);
306 cpu_clear(cpu, cpu_callin_map); 306 cpu_clear(cpu, cpu_callin_map);
307 307
diff --git a/arch/mips/kvm/kvm_mips.c b/arch/mips/kvm/kvm_mips.c
index cd5e4f568439..f3c56a182fd8 100644
--- a/arch/mips/kvm/kvm_mips.c
+++ b/arch/mips/kvm/kvm_mips.c
@@ -384,6 +384,7 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
384 384
385 kfree(vcpu->arch.guest_ebase); 385 kfree(vcpu->arch.guest_ebase);
386 kfree(vcpu->arch.kseg0_commpage); 386 kfree(vcpu->arch.kseg0_commpage);
387 kfree(vcpu);
387} 388}
388 389
389void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 390void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
diff --git a/arch/mips/math-emu/ieee754.c b/arch/mips/math-emu/ieee754.c
index 53f1d2287084..8e97acbbe22c 100644
--- a/arch/mips/math-emu/ieee754.c
+++ b/arch/mips/math-emu/ieee754.c
@@ -34,13 +34,22 @@
34 * Special constants 34 * Special constants
35 */ 35 */
36 36
37#define DPCNST(s, b, m) \ 37/*
38 * Older GCC requires the inner braces for initialization of union ieee754dp's
39 * anonymous struct member. Without an error will result.
40 */
41#define xPCNST(s, b, m, ebias) \
38{ \ 42{ \
39 .sign = (s), \ 43 { \
40 .bexp = (b) + DP_EBIAS, \ 44 .sign = (s), \
41 .mant = (m) \ 45 .bexp = (b) + ebias, \
46 .mant = (m) \
47 } \
42} 48}
43 49
50#define DPCNST(s, b, m) \
51 xPCNST(s, b, m, DP_EBIAS)
52
44const union ieee754dp __ieee754dp_spcvals[] = { 53const union ieee754dp __ieee754dp_spcvals[] = {
45 DPCNST(0, DP_EMIN - 1, 0x0000000000000ULL), /* + zero */ 54 DPCNST(0, DP_EMIN - 1, 0x0000000000000ULL), /* + zero */
46 DPCNST(1, DP_EMIN - 1, 0x0000000000000ULL), /* - zero */ 55 DPCNST(1, DP_EMIN - 1, 0x0000000000000ULL), /* - zero */
@@ -62,11 +71,7 @@ const union ieee754dp __ieee754dp_spcvals[] = {
62}; 71};
63 72
64#define SPCNST(s, b, m) \ 73#define SPCNST(s, b, m) \
65{ \ 74 xPCNST(s, b, m, SP_EBIAS)
66 .sign = (s), \
67 .bexp = (b) + SP_EBIAS, \
68 .mant = (m) \
69}
70 75
71const union ieee754sp __ieee754sp_spcvals[] = { 76const union ieee754sp __ieee754sp_spcvals[] = {
72 SPCNST(0, SP_EMIN - 1, 0x000000), /* + zero */ 77 SPCNST(0, SP_EMIN - 1, 0x000000), /* + zero */
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 775c2800cba2..8399ddf03a02 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -102,6 +102,7 @@ static struct insn insn_table_MM[] = {
102 { insn_sd, 0, 0 }, 102 { insn_sd, 0, 0 },
103 { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD }, 103 { insn_sll, M(mm_pool32a_op, 0, 0, 0, 0, mm_sll32_op), RT | RS | RD },
104 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD }, 104 { insn_sllv, M(mm_pool32a_op, 0, 0, 0, 0, mm_sllv32_op), RT | RS | RD },
105 { insn_slt, M(mm_pool32a_op, 0, 0, 0, 0, mm_slt_op), RT | RS | RD },
105 { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, 106 { insn_sltiu, M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
106 { insn_sltu, M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD }, 107 { insn_sltu, M(mm_pool32a_op, 0, 0, 0, 0, mm_sltu_op), RT | RS | RD },
107 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD }, 108 { insn_sra, M(mm_pool32a_op, 0, 0, 0, 0, mm_sra_op), RT | RS | RD },
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 38792c2364f5..6708a2dbf934 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -89,7 +89,7 @@ static struct insn insn_table[] = {
89 { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 89 { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
90 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 90 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
91 { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD }, 91 { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
92 { insn_lh, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 92 { insn_lh, M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
93 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 93 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
94 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 94 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
95 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM }, 95 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
@@ -110,6 +110,7 @@ static struct insn insn_table[] = {
110 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 110 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
111 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, 111 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
112 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, 112 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD },
113 { insn_slt, M(spec_op, 0, 0, 0, 0, slt_op), RS | RT | RD },
113 { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 114 { insn_sltiu, M(sltiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
114 { insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD }, 115 { insn_sltu, M(spec_op, 0, 0, 0, 0, sltu_op), RS | RT | RD },
115 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE }, 116 { insn_sra, M(spec_op, 0, 0, 0, 0, sra_op), RT | RD | RE },
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 00515805fe41..a01b0d6cedd2 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -53,7 +53,7 @@ enum opcode {
53 insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw, 53 insn_ld, insn_ldx, insn_lh, insn_ll, insn_lld, insn_lui, insn_lw,
54 insn_lwx, insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul, 54 insn_lwx, insn_mfc0, insn_mfhi, insn_mflo, insn_mtc0, insn_mul,
55 insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd, 55 insn_or, insn_ori, insn_pref, insn_rfe, insn_rotr, insn_sc, insn_scd,
56 insn_sd, insn_sll, insn_sllv, insn_sltiu, insn_sltu, insn_sra, 56 insn_sd, insn_sll, insn_sllv, insn_slt, insn_sltiu, insn_sltu, insn_sra,
57 insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall, 57 insn_srl, insn_srlv, insn_subu, insn_sw, insn_sync, insn_syscall,
58 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh, 58 insn_tlbp, insn_tlbr, insn_tlbwi, insn_tlbwr, insn_wait, insn_wsbh,
59 insn_xor, insn_xori, insn_yield, 59 insn_xor, insn_xori, insn_yield,
@@ -139,6 +139,13 @@ Ip_u1u2u3(op) \
139} \ 139} \
140UASM_EXPORT_SYMBOL(uasm_i##op); 140UASM_EXPORT_SYMBOL(uasm_i##op);
141 141
142#define I_s3s1s2(op) \
143Ip_s3s1s2(op) \
144{ \
145 build_insn(buf, insn##op, b, c, a); \
146} \
147UASM_EXPORT_SYMBOL(uasm_i##op);
148
142#define I_u2u1u3(op) \ 149#define I_u2u1u3(op) \
143Ip_u2u1u3(op) \ 150Ip_u2u1u3(op) \
144{ \ 151{ \
@@ -289,6 +296,7 @@ I_u2s3u1(_scd)
289I_u2s3u1(_sd) 296I_u2s3u1(_sd)
290I_u2u1u3(_sll) 297I_u2u1u3(_sll)
291I_u3u2u1(_sllv) 298I_u3u2u1(_sllv)
299I_s3s1s2(_slt)
292I_u2u1s3(_sltiu) 300I_u2u1s3(_sltiu)
293I_u3u1u2(_sltu) 301I_u3u1u2(_sltu)
294I_u2u1u3(_sra) 302I_u2u1u3(_sra)
diff --git a/arch/mips/net/bpf_jit.c b/arch/mips/net/bpf_jit.c
index a67b9753330b..b87390a56a2f 100644
--- a/arch/mips/net/bpf_jit.c
+++ b/arch/mips/net/bpf_jit.c
@@ -119,8 +119,6 @@
119/* Arguments used by JIT */ 119/* Arguments used by JIT */
120#define ARGS_USED_BY_JIT 2 /* only applicable to 64-bit */ 120#define ARGS_USED_BY_JIT 2 /* only applicable to 64-bit */
121 121
122#define FLAG_NEED_X_RESET (1 << 0)
123
124#define SBIT(x) (1 << (x)) /* Signed version of BIT() */ 122#define SBIT(x) (1 << (x)) /* Signed version of BIT() */
125 123
126/** 124/**
@@ -153,6 +151,8 @@ static inline int optimize_div(u32 *k)
153 return 0; 151 return 0;
154} 152}
155 153
154static inline void emit_jit_reg_move(ptr dst, ptr src, struct jit_ctx *ctx);
155
156/* Simply emit the instruction if the JIT memory space has been allocated */ 156/* Simply emit the instruction if the JIT memory space has been allocated */
157#define emit_instr(ctx, func, ...) \ 157#define emit_instr(ctx, func, ...) \
158do { \ 158do { \
@@ -166,9 +166,7 @@ do { \
166/* Determine if immediate is within the 16-bit signed range */ 166/* Determine if immediate is within the 16-bit signed range */
167static inline bool is_range16(s32 imm) 167static inline bool is_range16(s32 imm)
168{ 168{
169 if (imm >= SBIT(15) || imm < -SBIT(15)) 169 return !(imm >= SBIT(15) || imm < -SBIT(15));
170 return true;
171 return false;
172} 170}
173 171
174static inline void emit_addu(unsigned int dst, unsigned int src1, 172static inline void emit_addu(unsigned int dst, unsigned int src1,
@@ -187,7 +185,7 @@ static inline void emit_load_imm(unsigned int dst, u32 imm, struct jit_ctx *ctx)
187{ 185{
188 if (ctx->target != NULL) { 186 if (ctx->target != NULL) {
189 /* addiu can only handle s16 */ 187 /* addiu can only handle s16 */
190 if (is_range16(imm)) { 188 if (!is_range16(imm)) {
191 u32 *p = &ctx->target[ctx->idx]; 189 u32 *p = &ctx->target[ctx->idx];
192 uasm_i_lui(&p, r_tmp_imm, (s32)imm >> 16); 190 uasm_i_lui(&p, r_tmp_imm, (s32)imm >> 16);
193 p = &ctx->target[ctx->idx + 1]; 191 p = &ctx->target[ctx->idx + 1];
@@ -199,7 +197,7 @@ static inline void emit_load_imm(unsigned int dst, u32 imm, struct jit_ctx *ctx)
199 } 197 }
200 ctx->idx++; 198 ctx->idx++;
201 199
202 if (is_range16(imm)) 200 if (!is_range16(imm))
203 ctx->idx++; 201 ctx->idx++;
204} 202}
205 203
@@ -240,7 +238,7 @@ static inline void emit_daddiu(unsigned int dst, unsigned int src,
240static inline void emit_addiu(unsigned int dst, unsigned int src, 238static inline void emit_addiu(unsigned int dst, unsigned int src,
241 u32 imm, struct jit_ctx *ctx) 239 u32 imm, struct jit_ctx *ctx)
242{ 240{
243 if (is_range16(imm)) { 241 if (!is_range16(imm)) {
244 emit_load_imm(r_tmp, imm, ctx); 242 emit_load_imm(r_tmp, imm, ctx);
245 emit_addu(dst, r_tmp, src, ctx); 243 emit_addu(dst, r_tmp, src, ctx);
246 } else { 244 } else {
@@ -313,8 +311,11 @@ static inline void emit_sll(unsigned int dst, unsigned int src,
313 unsigned int sa, struct jit_ctx *ctx) 311 unsigned int sa, struct jit_ctx *ctx)
314{ 312{
315 /* sa is 5-bits long */ 313 /* sa is 5-bits long */
316 BUG_ON(sa >= BIT(5)); 314 if (sa >= BIT(5))
317 emit_instr(ctx, sll, dst, src, sa); 315 /* Shifting >= 32 results in zero */
316 emit_jit_reg_move(dst, r_zero, ctx);
317 else
318 emit_instr(ctx, sll, dst, src, sa);
318} 319}
319 320
320static inline void emit_srlv(unsigned int dst, unsigned int src, 321static inline void emit_srlv(unsigned int dst, unsigned int src,
@@ -327,8 +328,17 @@ static inline void emit_srl(unsigned int dst, unsigned int src,
327 unsigned int sa, struct jit_ctx *ctx) 328 unsigned int sa, struct jit_ctx *ctx)
328{ 329{
329 /* sa is 5-bits long */ 330 /* sa is 5-bits long */
330 BUG_ON(sa >= BIT(5)); 331 if (sa >= BIT(5))
331 emit_instr(ctx, srl, dst, src, sa); 332 /* Shifting >= 32 results in zero */
333 emit_jit_reg_move(dst, r_zero, ctx);
334 else
335 emit_instr(ctx, srl, dst, src, sa);
336}
337
338static inline void emit_slt(unsigned int dst, unsigned int src1,
339 unsigned int src2, struct jit_ctx *ctx)
340{
341 emit_instr(ctx, slt, dst, src1, src2);
332} 342}
333 343
334static inline void emit_sltu(unsigned int dst, unsigned int src1, 344static inline void emit_sltu(unsigned int dst, unsigned int src1,
@@ -341,7 +351,7 @@ static inline void emit_sltiu(unsigned dst, unsigned int src,
341 unsigned int imm, struct jit_ctx *ctx) 351 unsigned int imm, struct jit_ctx *ctx)
342{ 352{
343 /* 16 bit immediate */ 353 /* 16 bit immediate */
344 if (is_range16((s32)imm)) { 354 if (!is_range16((s32)imm)) {
345 emit_load_imm(r_tmp, imm, ctx); 355 emit_load_imm(r_tmp, imm, ctx);
346 emit_sltu(dst, src, r_tmp, ctx); 356 emit_sltu(dst, src, r_tmp, ctx);
347 } else { 357 } else {
@@ -408,7 +418,7 @@ static inline void emit_div(unsigned int dst, unsigned int src,
408 u32 *p = &ctx->target[ctx->idx]; 418 u32 *p = &ctx->target[ctx->idx];
409 uasm_i_divu(&p, dst, src); 419 uasm_i_divu(&p, dst, src);
410 p = &ctx->target[ctx->idx + 1]; 420 p = &ctx->target[ctx->idx + 1];
411 uasm_i_mfhi(&p, dst); 421 uasm_i_mflo(&p, dst);
412 } 422 }
413 ctx->idx += 2; /* 2 insts */ 423 ctx->idx += 2; /* 2 insts */
414} 424}
@@ -443,6 +453,17 @@ static inline void emit_wsbh(unsigned int dst, unsigned int src,
443 emit_instr(ctx, wsbh, dst, src); 453 emit_instr(ctx, wsbh, dst, src);
444} 454}
445 455
456/* load pointer to register */
457static inline void emit_load_ptr(unsigned int dst, unsigned int src,
458 int imm, struct jit_ctx *ctx)
459{
460 /* src contains the base addr of the 32/64-pointer */
461 if (config_enabled(CONFIG_64BIT))
462 emit_instr(ctx, ld, dst, imm, src);
463 else
464 emit_instr(ctx, lw, dst, imm, src);
465}
466
446/* load a function pointer to register */ 467/* load a function pointer to register */
447static inline void emit_load_func(unsigned int reg, ptr imm, 468static inline void emit_load_func(unsigned int reg, ptr imm,
448 struct jit_ctx *ctx) 469 struct jit_ctx *ctx)
@@ -545,29 +566,13 @@ static inline u16 align_sp(unsigned int num)
545 return num; 566 return num;
546} 567}
547 568
548static inline void update_on_xread(struct jit_ctx *ctx)
549{
550 if (!(ctx->flags & SEEN_X))
551 ctx->flags |= FLAG_NEED_X_RESET;
552
553 ctx->flags |= SEEN_X;
554}
555
556static bool is_load_to_a(u16 inst) 569static bool is_load_to_a(u16 inst)
557{ 570{
558 switch (inst) { 571 switch (inst) {
559 case BPF_S_LD_W_LEN: 572 case BPF_LD | BPF_W | BPF_LEN:
560 case BPF_S_LD_W_ABS: 573 case BPF_LD | BPF_W | BPF_ABS:
561 case BPF_S_LD_H_ABS: 574 case BPF_LD | BPF_H | BPF_ABS:
562 case BPF_S_LD_B_ABS: 575 case BPF_LD | BPF_B | BPF_ABS:
563 case BPF_S_ANC_CPU:
564 case BPF_S_ANC_IFINDEX:
565 case BPF_S_ANC_MARK:
566 case BPF_S_ANC_PROTOCOL:
567 case BPF_S_ANC_RXHASH:
568 case BPF_S_ANC_VLAN_TAG:
569 case BPF_S_ANC_VLAN_TAG_PRESENT:
570 case BPF_S_ANC_QUEUE:
571 return true; 576 return true;
572 default: 577 default:
573 return false; 578 return false;
@@ -618,7 +623,10 @@ static void save_bpf_jit_regs(struct jit_ctx *ctx, unsigned offset)
618 if (ctx->flags & SEEN_MEM) { 623 if (ctx->flags & SEEN_MEM) {
619 if (real_off % (RSIZE * 2)) 624 if (real_off % (RSIZE * 2))
620 real_off += RSIZE; 625 real_off += RSIZE;
621 emit_addiu(r_M, r_sp, real_off, ctx); 626 if (config_enabled(CONFIG_64BIT))
627 emit_daddiu(r_M, r_sp, real_off, ctx);
628 else
629 emit_addiu(r_M, r_sp, real_off, ctx);
622 } 630 }
623} 631}
624 632
@@ -705,11 +713,11 @@ static void build_prologue(struct jit_ctx *ctx)
705 if (ctx->flags & SEEN_SKB) 713 if (ctx->flags & SEEN_SKB)
706 emit_reg_move(r_skb, MIPS_R_A0, ctx); 714 emit_reg_move(r_skb, MIPS_R_A0, ctx);
707 715
708 if (ctx->flags & FLAG_NEED_X_RESET) 716 if (ctx->flags & SEEN_X)
709 emit_jit_reg_move(r_X, r_zero, ctx); 717 emit_jit_reg_move(r_X, r_zero, ctx);
710 718
711 /* Do not leak kernel data to userspace */ 719 /* Do not leak kernel data to userspace */
712 if ((first_inst != BPF_S_RET_K) && !(is_load_to_a(first_inst))) 720 if ((first_inst != (BPF_RET | BPF_K)) && !(is_load_to_a(first_inst)))
713 emit_jit_reg_move(r_A, r_zero, ctx); 721 emit_jit_reg_move(r_A, r_zero, ctx);
714} 722}
715 723
@@ -757,13 +765,17 @@ static u64 jit_get_skb_w(struct sk_buff *skb, unsigned offset)
757 return (u64)err << 32 | ntohl(ret); 765 return (u64)err << 32 | ntohl(ret);
758} 766}
759 767
760#define PKT_TYPE_MAX 7 768#ifdef __BIG_ENDIAN_BITFIELD
769#define PKT_TYPE_MAX (7 << 5)
770#else
771#define PKT_TYPE_MAX 7
772#endif
761static int pkt_type_offset(void) 773static int pkt_type_offset(void)
762{ 774{
763 struct sk_buff skb_probe = { 775 struct sk_buff skb_probe = {
764 .pkt_type = ~0, 776 .pkt_type = ~0,
765 }; 777 };
766 char *ct = (char *)&skb_probe; 778 u8 *ct = (u8 *)&skb_probe;
767 unsigned int off; 779 unsigned int off;
768 780
769 for (off = 0; off < sizeof(struct sk_buff); off++) { 781 for (off = 0; off < sizeof(struct sk_buff); off++) {
@@ -783,46 +795,62 @@ static int build_body(struct jit_ctx *ctx)
783 u32 k, b_off __maybe_unused; 795 u32 k, b_off __maybe_unused;
784 796
785 for (i = 0; i < prog->len; i++) { 797 for (i = 0; i < prog->len; i++) {
798 u16 code;
799
786 inst = &(prog->insns[i]); 800 inst = &(prog->insns[i]);
787 pr_debug("%s: code->0x%02x, jt->0x%x, jf->0x%x, k->0x%x\n", 801 pr_debug("%s: code->0x%02x, jt->0x%x, jf->0x%x, k->0x%x\n",
788 __func__, inst->code, inst->jt, inst->jf, inst->k); 802 __func__, inst->code, inst->jt, inst->jf, inst->k);
789 k = inst->k; 803 k = inst->k;
804 code = bpf_anc_helper(inst);
790 805
791 if (ctx->target == NULL) 806 if (ctx->target == NULL)
792 ctx->offsets[i] = ctx->idx * 4; 807 ctx->offsets[i] = ctx->idx * 4;
793 808
794 switch (inst->code) { 809 switch (code) {
795 case BPF_S_LD_IMM: 810 case BPF_LD | BPF_IMM:
796 /* A <- k ==> li r_A, k */ 811 /* A <- k ==> li r_A, k */
797 ctx->flags |= SEEN_A; 812 ctx->flags |= SEEN_A;
798 emit_load_imm(r_A, k, ctx); 813 emit_load_imm(r_A, k, ctx);
799 break; 814 break;
800 case BPF_S_LD_W_LEN: 815 case BPF_LD | BPF_W | BPF_LEN:
801 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4); 816 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
802 /* A <- len ==> lw r_A, offset(skb) */ 817 /* A <- len ==> lw r_A, offset(skb) */
803 ctx->flags |= SEEN_SKB | SEEN_A; 818 ctx->flags |= SEEN_SKB | SEEN_A;
804 off = offsetof(struct sk_buff, len); 819 off = offsetof(struct sk_buff, len);
805 emit_load(r_A, r_skb, off, ctx); 820 emit_load(r_A, r_skb, off, ctx);
806 break; 821 break;
807 case BPF_S_LD_MEM: 822 case BPF_LD | BPF_MEM:
808 /* A <- M[k] ==> lw r_A, offset(M) */ 823 /* A <- M[k] ==> lw r_A, offset(M) */
809 ctx->flags |= SEEN_MEM | SEEN_A; 824 ctx->flags |= SEEN_MEM | SEEN_A;
810 emit_load(r_A, r_M, SCRATCH_OFF(k), ctx); 825 emit_load(r_A, r_M, SCRATCH_OFF(k), ctx);
811 break; 826 break;
812 case BPF_S_LD_W_ABS: 827 case BPF_LD | BPF_W | BPF_ABS:
813 /* A <- P[k:4] */ 828 /* A <- P[k:4] */
814 load_order = 2; 829 load_order = 2;
815 goto load; 830 goto load;
816 case BPF_S_LD_H_ABS: 831 case BPF_LD | BPF_H | BPF_ABS:
817 /* A <- P[k:2] */ 832 /* A <- P[k:2] */
818 load_order = 1; 833 load_order = 1;
819 goto load; 834 goto load;
820 case BPF_S_LD_B_ABS: 835 case BPF_LD | BPF_B | BPF_ABS:
821 /* A <- P[k:1] */ 836 /* A <- P[k:1] */
822 load_order = 0; 837 load_order = 0;
823load: 838load:
839 /* the interpreter will deal with the negative K */
840 if ((int)k < 0)
841 return -ENOTSUPP;
842
824 emit_load_imm(r_off, k, ctx); 843 emit_load_imm(r_off, k, ctx);
825load_common: 844load_common:
845 /*
846 * We may got here from the indirect loads so
847 * return if offset is negative.
848 */
849 emit_slt(r_s0, r_off, r_zero, ctx);
850 emit_bcond(MIPS_COND_NE, r_s0, r_zero,
851 b_imm(prog->len, ctx), ctx);
852 emit_reg_move(r_ret, r_zero, ctx);
853
826 ctx->flags |= SEEN_CALL | SEEN_OFF | SEEN_S0 | 854 ctx->flags |= SEEN_CALL | SEEN_OFF | SEEN_S0 |
827 SEEN_SKB | SEEN_A; 855 SEEN_SKB | SEEN_A;
828 856
@@ -852,39 +880,42 @@ load_common:
852 emit_b(b_imm(prog->len, ctx), ctx); 880 emit_b(b_imm(prog->len, ctx), ctx);
853 emit_reg_move(r_ret, r_zero, ctx); 881 emit_reg_move(r_ret, r_zero, ctx);
854 break; 882 break;
855 case BPF_S_LD_W_IND: 883 case BPF_LD | BPF_W | BPF_IND:
856 /* A <- P[X + k:4] */ 884 /* A <- P[X + k:4] */
857 load_order = 2; 885 load_order = 2;
858 goto load_ind; 886 goto load_ind;
859 case BPF_S_LD_H_IND: 887 case BPF_LD | BPF_H | BPF_IND:
860 /* A <- P[X + k:2] */ 888 /* A <- P[X + k:2] */
861 load_order = 1; 889 load_order = 1;
862 goto load_ind; 890 goto load_ind;
863 case BPF_S_LD_B_IND: 891 case BPF_LD | BPF_B | BPF_IND:
864 /* A <- P[X + k:1] */ 892 /* A <- P[X + k:1] */
865 load_order = 0; 893 load_order = 0;
866load_ind: 894load_ind:
867 update_on_xread(ctx);
868 ctx->flags |= SEEN_OFF | SEEN_X; 895 ctx->flags |= SEEN_OFF | SEEN_X;
869 emit_addiu(r_off, r_X, k, ctx); 896 emit_addiu(r_off, r_X, k, ctx);
870 goto load_common; 897 goto load_common;
871 case BPF_S_LDX_IMM: 898 case BPF_LDX | BPF_IMM:
872 /* X <- k */ 899 /* X <- k */
873 ctx->flags |= SEEN_X; 900 ctx->flags |= SEEN_X;
874 emit_load_imm(r_X, k, ctx); 901 emit_load_imm(r_X, k, ctx);
875 break; 902 break;
876 case BPF_S_LDX_MEM: 903 case BPF_LDX | BPF_MEM:
877 /* X <- M[k] */ 904 /* X <- M[k] */
878 ctx->flags |= SEEN_X | SEEN_MEM; 905 ctx->flags |= SEEN_X | SEEN_MEM;
879 emit_load(r_X, r_M, SCRATCH_OFF(k), ctx); 906 emit_load(r_X, r_M, SCRATCH_OFF(k), ctx);
880 break; 907 break;
881 case BPF_S_LDX_W_LEN: 908 case BPF_LDX | BPF_W | BPF_LEN:
882 /* X <- len */ 909 /* X <- len */
883 ctx->flags |= SEEN_X | SEEN_SKB; 910 ctx->flags |= SEEN_X | SEEN_SKB;
884 off = offsetof(struct sk_buff, len); 911 off = offsetof(struct sk_buff, len);
885 emit_load(r_X, r_skb, off, ctx); 912 emit_load(r_X, r_skb, off, ctx);
886 break; 913 break;
887 case BPF_S_LDX_B_MSH: 914 case BPF_LDX | BPF_B | BPF_MSH:
915 /* the interpreter will deal with the negative K */
916 if ((int)k < 0)
917 return -ENOTSUPP;
918
888 /* X <- 4 * (P[k:1] & 0xf) */ 919 /* X <- 4 * (P[k:1] & 0xf) */
889 ctx->flags |= SEEN_X | SEEN_CALL | SEEN_S0 | SEEN_SKB; 920 ctx->flags |= SEEN_X | SEEN_CALL | SEEN_S0 | SEEN_SKB;
890 /* Load offset to a1 */ 921 /* Load offset to a1 */
@@ -917,50 +948,49 @@ load_ind:
917 emit_b(b_imm(prog->len, ctx), ctx); 948 emit_b(b_imm(prog->len, ctx), ctx);
918 emit_load_imm(r_ret, 0, ctx); /* delay slot */ 949 emit_load_imm(r_ret, 0, ctx); /* delay slot */
919 break; 950 break;
920 case BPF_S_ST: 951 case BPF_ST:
921 /* M[k] <- A */ 952 /* M[k] <- A */
922 ctx->flags |= SEEN_MEM | SEEN_A; 953 ctx->flags |= SEEN_MEM | SEEN_A;
923 emit_store(r_A, r_M, SCRATCH_OFF(k), ctx); 954 emit_store(r_A, r_M, SCRATCH_OFF(k), ctx);
924 break; 955 break;
925 case BPF_S_STX: 956 case BPF_STX:
926 /* M[k] <- X */ 957 /* M[k] <- X */
927 ctx->flags |= SEEN_MEM | SEEN_X; 958 ctx->flags |= SEEN_MEM | SEEN_X;
928 emit_store(r_X, r_M, SCRATCH_OFF(k), ctx); 959 emit_store(r_X, r_M, SCRATCH_OFF(k), ctx);
929 break; 960 break;
930 case BPF_S_ALU_ADD_K: 961 case BPF_ALU | BPF_ADD | BPF_K:
931 /* A += K */ 962 /* A += K */
932 ctx->flags |= SEEN_A; 963 ctx->flags |= SEEN_A;
933 emit_addiu(r_A, r_A, k, ctx); 964 emit_addiu(r_A, r_A, k, ctx);
934 break; 965 break;
935 case BPF_S_ALU_ADD_X: 966 case BPF_ALU | BPF_ADD | BPF_X:
936 /* A += X */ 967 /* A += X */
937 ctx->flags |= SEEN_A | SEEN_X; 968 ctx->flags |= SEEN_A | SEEN_X;
938 emit_addu(r_A, r_A, r_X, ctx); 969 emit_addu(r_A, r_A, r_X, ctx);
939 break; 970 break;
940 case BPF_S_ALU_SUB_K: 971 case BPF_ALU | BPF_SUB | BPF_K:
941 /* A -= K */ 972 /* A -= K */
942 ctx->flags |= SEEN_A; 973 ctx->flags |= SEEN_A;
943 emit_addiu(r_A, r_A, -k, ctx); 974 emit_addiu(r_A, r_A, -k, ctx);
944 break; 975 break;
945 case BPF_S_ALU_SUB_X: 976 case BPF_ALU | BPF_SUB | BPF_X:
946 /* A -= X */ 977 /* A -= X */
947 ctx->flags |= SEEN_A | SEEN_X; 978 ctx->flags |= SEEN_A | SEEN_X;
948 emit_subu(r_A, r_A, r_X, ctx); 979 emit_subu(r_A, r_A, r_X, ctx);
949 break; 980 break;
950 case BPF_S_ALU_MUL_K: 981 case BPF_ALU | BPF_MUL | BPF_K:
951 /* A *= K */ 982 /* A *= K */
952 /* Load K to scratch register before MUL */ 983 /* Load K to scratch register before MUL */
953 ctx->flags |= SEEN_A | SEEN_S0; 984 ctx->flags |= SEEN_A | SEEN_S0;
954 emit_load_imm(r_s0, k, ctx); 985 emit_load_imm(r_s0, k, ctx);
955 emit_mul(r_A, r_A, r_s0, ctx); 986 emit_mul(r_A, r_A, r_s0, ctx);
956 break; 987 break;
957 case BPF_S_ALU_MUL_X: 988 case BPF_ALU | BPF_MUL | BPF_X:
958 /* A *= X */ 989 /* A *= X */
959 update_on_xread(ctx);
960 ctx->flags |= SEEN_A | SEEN_X; 990 ctx->flags |= SEEN_A | SEEN_X;
961 emit_mul(r_A, r_A, r_X, ctx); 991 emit_mul(r_A, r_A, r_X, ctx);
962 break; 992 break;
963 case BPF_S_ALU_DIV_K: 993 case BPF_ALU | BPF_DIV | BPF_K:
964 /* A /= k */ 994 /* A /= k */
965 if (k == 1) 995 if (k == 1)
966 break; 996 break;
@@ -973,7 +1003,7 @@ load_ind:
973 emit_load_imm(r_s0, k, ctx); 1003 emit_load_imm(r_s0, k, ctx);
974 emit_div(r_A, r_s0, ctx); 1004 emit_div(r_A, r_s0, ctx);
975 break; 1005 break;
976 case BPF_S_ALU_MOD_K: 1006 case BPF_ALU | BPF_MOD | BPF_K:
977 /* A %= k */ 1007 /* A %= k */
978 if (k == 1 || optimize_div(&k)) { 1008 if (k == 1 || optimize_div(&k)) {
979 ctx->flags |= SEEN_A; 1009 ctx->flags |= SEEN_A;
@@ -984,9 +1014,8 @@ load_ind:
984 emit_mod(r_A, r_s0, ctx); 1014 emit_mod(r_A, r_s0, ctx);
985 } 1015 }
986 break; 1016 break;
987 case BPF_S_ALU_DIV_X: 1017 case BPF_ALU | BPF_DIV | BPF_X:
988 /* A /= X */ 1018 /* A /= X */
989 update_on_xread(ctx);
990 ctx->flags |= SEEN_X | SEEN_A; 1019 ctx->flags |= SEEN_X | SEEN_A;
991 /* Check if r_X is zero */ 1020 /* Check if r_X is zero */
992 emit_bcond(MIPS_COND_EQ, r_X, r_zero, 1021 emit_bcond(MIPS_COND_EQ, r_X, r_zero,
@@ -994,9 +1023,8 @@ load_ind:
994 emit_load_imm(r_val, 0, ctx); /* delay slot */ 1023 emit_load_imm(r_val, 0, ctx); /* delay slot */
995 emit_div(r_A, r_X, ctx); 1024 emit_div(r_A, r_X, ctx);
996 break; 1025 break;
997 case BPF_S_ALU_MOD_X: 1026 case BPF_ALU | BPF_MOD | BPF_X:
998 /* A %= X */ 1027 /* A %= X */
999 update_on_xread(ctx);
1000 ctx->flags |= SEEN_X | SEEN_A; 1028 ctx->flags |= SEEN_X | SEEN_A;
1001 /* Check if r_X is zero */ 1029 /* Check if r_X is zero */
1002 emit_bcond(MIPS_COND_EQ, r_X, r_zero, 1030 emit_bcond(MIPS_COND_EQ, r_X, r_zero,
@@ -1004,94 +1032,89 @@ load_ind:
1004 emit_load_imm(r_val, 0, ctx); /* delay slot */ 1032 emit_load_imm(r_val, 0, ctx); /* delay slot */
1005 emit_mod(r_A, r_X, ctx); 1033 emit_mod(r_A, r_X, ctx);
1006 break; 1034 break;
1007 case BPF_S_ALU_OR_K: 1035 case BPF_ALU | BPF_OR | BPF_K:
1008 /* A |= K */ 1036 /* A |= K */
1009 ctx->flags |= SEEN_A; 1037 ctx->flags |= SEEN_A;
1010 emit_ori(r_A, r_A, k, ctx); 1038 emit_ori(r_A, r_A, k, ctx);
1011 break; 1039 break;
1012 case BPF_S_ALU_OR_X: 1040 case BPF_ALU | BPF_OR | BPF_X:
1013 /* A |= X */ 1041 /* A |= X */
1014 update_on_xread(ctx);
1015 ctx->flags |= SEEN_A; 1042 ctx->flags |= SEEN_A;
1016 emit_ori(r_A, r_A, r_X, ctx); 1043 emit_ori(r_A, r_A, r_X, ctx);
1017 break; 1044 break;
1018 case BPF_S_ALU_XOR_K: 1045 case BPF_ALU | BPF_XOR | BPF_K:
1019 /* A ^= k */ 1046 /* A ^= k */
1020 ctx->flags |= SEEN_A; 1047 ctx->flags |= SEEN_A;
1021 emit_xori(r_A, r_A, k, ctx); 1048 emit_xori(r_A, r_A, k, ctx);
1022 break; 1049 break;
1023 case BPF_S_ANC_ALU_XOR_X: 1050 case BPF_ANC | SKF_AD_ALU_XOR_X:
1024 case BPF_S_ALU_XOR_X: 1051 case BPF_ALU | BPF_XOR | BPF_X:
1025 /* A ^= X */ 1052 /* A ^= X */
1026 update_on_xread(ctx);
1027 ctx->flags |= SEEN_A; 1053 ctx->flags |= SEEN_A;
1028 emit_xor(r_A, r_A, r_X, ctx); 1054 emit_xor(r_A, r_A, r_X, ctx);
1029 break; 1055 break;
1030 case BPF_S_ALU_AND_K: 1056 case BPF_ALU | BPF_AND | BPF_K:
1031 /* A &= K */ 1057 /* A &= K */
1032 ctx->flags |= SEEN_A; 1058 ctx->flags |= SEEN_A;
1033 emit_andi(r_A, r_A, k, ctx); 1059 emit_andi(r_A, r_A, k, ctx);
1034 break; 1060 break;
1035 case BPF_S_ALU_AND_X: 1061 case BPF_ALU | BPF_AND | BPF_X:
1036 /* A &= X */ 1062 /* A &= X */
1037 update_on_xread(ctx);
1038 ctx->flags |= SEEN_A | SEEN_X; 1063 ctx->flags |= SEEN_A | SEEN_X;
1039 emit_and(r_A, r_A, r_X, ctx); 1064 emit_and(r_A, r_A, r_X, ctx);
1040 break; 1065 break;
1041 case BPF_S_ALU_LSH_K: 1066 case BPF_ALU | BPF_LSH | BPF_K:
1042 /* A <<= K */ 1067 /* A <<= K */
1043 ctx->flags |= SEEN_A; 1068 ctx->flags |= SEEN_A;
1044 emit_sll(r_A, r_A, k, ctx); 1069 emit_sll(r_A, r_A, k, ctx);
1045 break; 1070 break;
1046 case BPF_S_ALU_LSH_X: 1071 case BPF_ALU | BPF_LSH | BPF_X:
1047 /* A <<= X */ 1072 /* A <<= X */
1048 ctx->flags |= SEEN_A | SEEN_X; 1073 ctx->flags |= SEEN_A | SEEN_X;
1049 update_on_xread(ctx);
1050 emit_sllv(r_A, r_A, r_X, ctx); 1074 emit_sllv(r_A, r_A, r_X, ctx);
1051 break; 1075 break;
1052 case BPF_S_ALU_RSH_K: 1076 case BPF_ALU | BPF_RSH | BPF_K:
1053 /* A >>= K */ 1077 /* A >>= K */
1054 ctx->flags |= SEEN_A; 1078 ctx->flags |= SEEN_A;
1055 emit_srl(r_A, r_A, k, ctx); 1079 emit_srl(r_A, r_A, k, ctx);
1056 break; 1080 break;
1057 case BPF_S_ALU_RSH_X: 1081 case BPF_ALU | BPF_RSH | BPF_X:
1058 ctx->flags |= SEEN_A | SEEN_X; 1082 ctx->flags |= SEEN_A | SEEN_X;
1059 update_on_xread(ctx);
1060 emit_srlv(r_A, r_A, r_X, ctx); 1083 emit_srlv(r_A, r_A, r_X, ctx);
1061 break; 1084 break;
1062 case BPF_S_ALU_NEG: 1085 case BPF_ALU | BPF_NEG:
1063 /* A = -A */ 1086 /* A = -A */
1064 ctx->flags |= SEEN_A; 1087 ctx->flags |= SEEN_A;
1065 emit_neg(r_A, ctx); 1088 emit_neg(r_A, ctx);
1066 break; 1089 break;
1067 case BPF_S_JMP_JA: 1090 case BPF_JMP | BPF_JA:
1068 /* pc += K */ 1091 /* pc += K */
1069 emit_b(b_imm(i + k + 1, ctx), ctx); 1092 emit_b(b_imm(i + k + 1, ctx), ctx);
1070 emit_nop(ctx); 1093 emit_nop(ctx);
1071 break; 1094 break;
1072 case BPF_S_JMP_JEQ_K: 1095 case BPF_JMP | BPF_JEQ | BPF_K:
1073 /* pc += ( A == K ) ? pc->jt : pc->jf */ 1096 /* pc += ( A == K ) ? pc->jt : pc->jf */
1074 condt = MIPS_COND_EQ | MIPS_COND_K; 1097 condt = MIPS_COND_EQ | MIPS_COND_K;
1075 goto jmp_cmp; 1098 goto jmp_cmp;
1076 case BPF_S_JMP_JEQ_X: 1099 case BPF_JMP | BPF_JEQ | BPF_X:
1077 ctx->flags |= SEEN_X; 1100 ctx->flags |= SEEN_X;
1078 /* pc += ( A == X ) ? pc->jt : pc->jf */ 1101 /* pc += ( A == X ) ? pc->jt : pc->jf */
1079 condt = MIPS_COND_EQ | MIPS_COND_X; 1102 condt = MIPS_COND_EQ | MIPS_COND_X;
1080 goto jmp_cmp; 1103 goto jmp_cmp;
1081 case BPF_S_JMP_JGE_K: 1104 case BPF_JMP | BPF_JGE | BPF_K:
1082 /* pc += ( A >= K ) ? pc->jt : pc->jf */ 1105 /* pc += ( A >= K ) ? pc->jt : pc->jf */
1083 condt = MIPS_COND_GE | MIPS_COND_K; 1106 condt = MIPS_COND_GE | MIPS_COND_K;
1084 goto jmp_cmp; 1107 goto jmp_cmp;
1085 case BPF_S_JMP_JGE_X: 1108 case BPF_JMP | BPF_JGE | BPF_X:
1086 ctx->flags |= SEEN_X; 1109 ctx->flags |= SEEN_X;
1087 /* pc += ( A >= X ) ? pc->jt : pc->jf */ 1110 /* pc += ( A >= X ) ? pc->jt : pc->jf */
1088 condt = MIPS_COND_GE | MIPS_COND_X; 1111 condt = MIPS_COND_GE | MIPS_COND_X;
1089 goto jmp_cmp; 1112 goto jmp_cmp;
1090 case BPF_S_JMP_JGT_K: 1113 case BPF_JMP | BPF_JGT | BPF_K:
1091 /* pc += ( A > K ) ? pc->jt : pc->jf */ 1114 /* pc += ( A > K ) ? pc->jt : pc->jf */
1092 condt = MIPS_COND_GT | MIPS_COND_K; 1115 condt = MIPS_COND_GT | MIPS_COND_K;
1093 goto jmp_cmp; 1116 goto jmp_cmp;
1094 case BPF_S_JMP_JGT_X: 1117 case BPF_JMP | BPF_JGT | BPF_X:
1095 ctx->flags |= SEEN_X; 1118 ctx->flags |= SEEN_X;
1096 /* pc += ( A > X ) ? pc->jt : pc->jf */ 1119 /* pc += ( A > X ) ? pc->jt : pc->jf */
1097 condt = MIPS_COND_GT | MIPS_COND_X; 1120 condt = MIPS_COND_GT | MIPS_COND_X;
@@ -1109,7 +1132,7 @@ jmp_cmp:
1109 } 1132 }
1110 /* A < (K|X) ? r_scrach = 1 */ 1133 /* A < (K|X) ? r_scrach = 1 */
1111 b_off = b_imm(i + inst->jf + 1, ctx); 1134 b_off = b_imm(i + inst->jf + 1, ctx);
1112 emit_bcond(MIPS_COND_GT, r_s0, r_zero, b_off, 1135 emit_bcond(MIPS_COND_NE, r_s0, r_zero, b_off,
1113 ctx); 1136 ctx);
1114 emit_nop(ctx); 1137 emit_nop(ctx);
1115 /* A > (K|X) ? scratch = 0 */ 1138 /* A > (K|X) ? scratch = 0 */
@@ -1167,7 +1190,7 @@ jmp_cmp:
1167 } 1190 }
1168 } 1191 }
1169 break; 1192 break;
1170 case BPF_S_JMP_JSET_K: 1193 case BPF_JMP | BPF_JSET | BPF_K:
1171 ctx->flags |= SEEN_S0 | SEEN_S1 | SEEN_A; 1194 ctx->flags |= SEEN_S0 | SEEN_S1 | SEEN_A;
1172 /* pc += (A & K) ? pc -> jt : pc -> jf */ 1195 /* pc += (A & K) ? pc -> jt : pc -> jf */
1173 emit_load_imm(r_s1, k, ctx); 1196 emit_load_imm(r_s1, k, ctx);
@@ -1181,7 +1204,7 @@ jmp_cmp:
1181 emit_b(b_off, ctx); 1204 emit_b(b_off, ctx);
1182 emit_nop(ctx); 1205 emit_nop(ctx);
1183 break; 1206 break;
1184 case BPF_S_JMP_JSET_X: 1207 case BPF_JMP | BPF_JSET | BPF_X:
1185 ctx->flags |= SEEN_S0 | SEEN_X | SEEN_A; 1208 ctx->flags |= SEEN_S0 | SEEN_X | SEEN_A;
1186 /* pc += (A & X) ? pc -> jt : pc -> jf */ 1209 /* pc += (A & X) ? pc -> jt : pc -> jf */
1187 emit_and(r_s0, r_A, r_X, ctx); 1210 emit_and(r_s0, r_A, r_X, ctx);
@@ -1194,7 +1217,7 @@ jmp_cmp:
1194 emit_b(b_off, ctx); 1217 emit_b(b_off, ctx);
1195 emit_nop(ctx); 1218 emit_nop(ctx);
1196 break; 1219 break;
1197 case BPF_S_RET_A: 1220 case BPF_RET | BPF_A:
1198 ctx->flags |= SEEN_A; 1221 ctx->flags |= SEEN_A;
1199 if (i != prog->len - 1) 1222 if (i != prog->len - 1)
1200 /* 1223 /*
@@ -1204,7 +1227,7 @@ jmp_cmp:
1204 emit_b(b_imm(prog->len, ctx), ctx); 1227 emit_b(b_imm(prog->len, ctx), ctx);
1205 emit_reg_move(r_ret, r_A, ctx); /* delay slot */ 1228 emit_reg_move(r_ret, r_A, ctx); /* delay slot */
1206 break; 1229 break;
1207 case BPF_S_RET_K: 1230 case BPF_RET | BPF_K:
1208 /* 1231 /*
1209 * It can emit two instructions so it does not fit on 1232 * It can emit two instructions so it does not fit on
1210 * the delay slot. 1233 * the delay slot.
@@ -1219,19 +1242,18 @@ jmp_cmp:
1219 emit_nop(ctx); 1242 emit_nop(ctx);
1220 } 1243 }
1221 break; 1244 break;
1222 case BPF_S_MISC_TAX: 1245 case BPF_MISC | BPF_TAX:
1223 /* X = A */ 1246 /* X = A */
1224 ctx->flags |= SEEN_X | SEEN_A; 1247 ctx->flags |= SEEN_X | SEEN_A;
1225 emit_jit_reg_move(r_X, r_A, ctx); 1248 emit_jit_reg_move(r_X, r_A, ctx);
1226 break; 1249 break;
1227 case BPF_S_MISC_TXA: 1250 case BPF_MISC | BPF_TXA:
1228 /* A = X */ 1251 /* A = X */
1229 ctx->flags |= SEEN_A | SEEN_X; 1252 ctx->flags |= SEEN_A | SEEN_X;
1230 update_on_xread(ctx);
1231 emit_jit_reg_move(r_A, r_X, ctx); 1253 emit_jit_reg_move(r_A, r_X, ctx);
1232 break; 1254 break;
1233 /* AUX */ 1255 /* AUX */
1234 case BPF_S_ANC_PROTOCOL: 1256 case BPF_ANC | SKF_AD_PROTOCOL:
1235 /* A = ntohs(skb->protocol */ 1257 /* A = ntohs(skb->protocol */
1236 ctx->flags |= SEEN_SKB | SEEN_OFF | SEEN_A; 1258 ctx->flags |= SEEN_SKB | SEEN_OFF | SEEN_A;
1237 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, 1259 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
@@ -1256,7 +1278,7 @@ jmp_cmp:
1256 } 1278 }
1257#endif 1279#endif
1258 break; 1280 break;
1259 case BPF_S_ANC_CPU: 1281 case BPF_ANC | SKF_AD_CPU:
1260 ctx->flags |= SEEN_A | SEEN_OFF; 1282 ctx->flags |= SEEN_A | SEEN_OFF;
1261 /* A = current_thread_info()->cpu */ 1283 /* A = current_thread_info()->cpu */
1262 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, 1284 BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info,
@@ -1265,11 +1287,12 @@ jmp_cmp:
1265 /* $28/gp points to the thread_info struct */ 1287 /* $28/gp points to the thread_info struct */
1266 emit_load(r_A, 28, off, ctx); 1288 emit_load(r_A, 28, off, ctx);
1267 break; 1289 break;
1268 case BPF_S_ANC_IFINDEX: 1290 case BPF_ANC | SKF_AD_IFINDEX:
1269 /* A = skb->dev->ifindex */ 1291 /* A = skb->dev->ifindex */
1270 ctx->flags |= SEEN_SKB | SEEN_A | SEEN_S0; 1292 ctx->flags |= SEEN_SKB | SEEN_A | SEEN_S0;
1271 off = offsetof(struct sk_buff, dev); 1293 off = offsetof(struct sk_buff, dev);
1272 emit_load(r_s0, r_skb, off, ctx); 1294 /* Load *dev pointer */
1295 emit_load_ptr(r_s0, r_skb, off, ctx);
1273 /* error (0) in the delay slot */ 1296 /* error (0) in the delay slot */
1274 emit_bcond(MIPS_COND_EQ, r_s0, r_zero, 1297 emit_bcond(MIPS_COND_EQ, r_s0, r_zero,
1275 b_imm(prog->len, ctx), ctx); 1298 b_imm(prog->len, ctx), ctx);
@@ -1279,31 +1302,36 @@ jmp_cmp:
1279 off = offsetof(struct net_device, ifindex); 1302 off = offsetof(struct net_device, ifindex);
1280 emit_load(r_A, r_s0, off, ctx); 1303 emit_load(r_A, r_s0, off, ctx);
1281 break; 1304 break;
1282 case BPF_S_ANC_MARK: 1305 case BPF_ANC | SKF_AD_MARK:
1283 ctx->flags |= SEEN_SKB | SEEN_A; 1306 ctx->flags |= SEEN_SKB | SEEN_A;
1284 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4); 1307 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4);
1285 off = offsetof(struct sk_buff, mark); 1308 off = offsetof(struct sk_buff, mark);
1286 emit_load(r_A, r_skb, off, ctx); 1309 emit_load(r_A, r_skb, off, ctx);
1287 break; 1310 break;
1288 case BPF_S_ANC_RXHASH: 1311 case BPF_ANC | SKF_AD_RXHASH:
1289 ctx->flags |= SEEN_SKB | SEEN_A; 1312 ctx->flags |= SEEN_SKB | SEEN_A;
1290 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4); 1313 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4);
1291 off = offsetof(struct sk_buff, hash); 1314 off = offsetof(struct sk_buff, hash);
1292 emit_load(r_A, r_skb, off, ctx); 1315 emit_load(r_A, r_skb, off, ctx);
1293 break; 1316 break;
1294 case BPF_S_ANC_VLAN_TAG: 1317 case BPF_ANC | SKF_AD_VLAN_TAG:
1295 case BPF_S_ANC_VLAN_TAG_PRESENT: 1318 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT:
1296 ctx->flags |= SEEN_SKB | SEEN_S0 | SEEN_A; 1319 ctx->flags |= SEEN_SKB | SEEN_S0 | SEEN_A;
1297 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, 1320 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
1298 vlan_tci) != 2); 1321 vlan_tci) != 2);
1299 off = offsetof(struct sk_buff, vlan_tci); 1322 off = offsetof(struct sk_buff, vlan_tci);
1300 emit_half_load(r_s0, r_skb, off, ctx); 1323 emit_half_load(r_s0, r_skb, off, ctx);
1301 if (inst->code == BPF_S_ANC_VLAN_TAG) 1324 if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) {
1302 emit_and(r_A, r_s0, VLAN_VID_MASK, ctx); 1325 emit_andi(r_A, r_s0, (u16)~VLAN_TAG_PRESENT, ctx);
1303 else 1326 } else {
1304 emit_and(r_A, r_s0, VLAN_TAG_PRESENT, ctx); 1327 emit_andi(r_A, r_s0, VLAN_TAG_PRESENT, ctx);
1328 /* return 1 if present */
1329 emit_sltu(r_A, r_zero, r_A, ctx);
1330 }
1305 break; 1331 break;
1306 case BPF_S_ANC_PKTTYPE: 1332 case BPF_ANC | SKF_AD_PKTTYPE:
1333 ctx->flags |= SEEN_SKB;
1334
1307 off = pkt_type_offset(); 1335 off = pkt_type_offset();
1308 1336
1309 if (off < 0) 1337 if (off < 0)
@@ -1311,8 +1339,12 @@ jmp_cmp:
1311 emit_load_byte(r_tmp, r_skb, off, ctx); 1339 emit_load_byte(r_tmp, r_skb, off, ctx);
1312 /* Keep only the last 3 bits */ 1340 /* Keep only the last 3 bits */
1313 emit_andi(r_A, r_tmp, PKT_TYPE_MAX, ctx); 1341 emit_andi(r_A, r_tmp, PKT_TYPE_MAX, ctx);
1342#ifdef __BIG_ENDIAN_BITFIELD
1343 /* Get the actual packet type to the lower 3 bits */
1344 emit_srl(r_A, r_A, 5, ctx);
1345#endif
1314 break; 1346 break;
1315 case BPF_S_ANC_QUEUE: 1347 case BPF_ANC | SKF_AD_QUEUE:
1316 ctx->flags |= SEEN_SKB | SEEN_A; 1348 ctx->flags |= SEEN_SKB | SEEN_A;
1317 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, 1349 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff,
1318 queue_mapping) != 2); 1350 queue_mapping) != 2);
@@ -1322,8 +1354,8 @@ jmp_cmp:
1322 emit_half_load(r_A, r_skb, off, ctx); 1354 emit_half_load(r_A, r_skb, off, ctx);
1323 break; 1355 break;
1324 default: 1356 default:
1325 pr_warn("%s: Unhandled opcode: 0x%02x\n", __FILE__, 1357 pr_debug("%s: Unhandled opcode: 0x%02x\n", __FILE__,
1326 inst->code); 1358 inst->code);
1327 return -1; 1359 return -1;
1328 } 1360 }
1329 } 1361 }
diff --git a/arch/parisc/kernel/hardware.c b/arch/parisc/kernel/hardware.c
index 608716f8496b..af3bc359dc70 100644
--- a/arch/parisc/kernel/hardware.c
+++ b/arch/parisc/kernel/hardware.c
@@ -1210,7 +1210,8 @@ static struct hp_hardware hp_hardware_list[] = {
1210 {HPHW_FIO, 0x004, 0x00320, 0x0, "Metheus Frame Buffer"}, 1210 {HPHW_FIO, 0x004, 0x00320, 0x0, "Metheus Frame Buffer"},
1211 {HPHW_FIO, 0x004, 0x00340, 0x0, "BARCO CX4500 VME Grphx Cnsl"}, 1211 {HPHW_FIO, 0x004, 0x00340, 0x0, "BARCO CX4500 VME Grphx Cnsl"},
1212 {HPHW_FIO, 0x004, 0x00360, 0x0, "Hughes TOG VME FDDI"}, 1212 {HPHW_FIO, 0x004, 0x00360, 0x0, "Hughes TOG VME FDDI"},
1213 {HPHW_FIO, 0x076, 0x000AD, 0x00, "Crestone Peak RS-232"}, 1213 {HPHW_FIO, 0x076, 0x000AD, 0x0, "Crestone Peak Core RS-232"},
1214 {HPHW_FIO, 0x077, 0x000AD, 0x0, "Crestone Peak Fast? Core RS-232"},
1214 {HPHW_IOA, 0x185, 0x0000B, 0x00, "Java BC Summit Port"}, 1215 {HPHW_IOA, 0x185, 0x0000B, 0x00, "Java BC Summit Port"},
1215 {HPHW_IOA, 0x1FF, 0x0000B, 0x00, "Hitachi Ghostview Summit Port"}, 1216 {HPHW_IOA, 0x1FF, 0x0000B, 0x00, "Hitachi Ghostview Summit Port"},
1216 {HPHW_IOA, 0x580, 0x0000B, 0x10, "U2-IOA BC Runway Port"}, 1217 {HPHW_IOA, 0x580, 0x0000B, 0x10, "U2-IOA BC Runway Port"},
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index bb9f3b64de55..93c1963d76fe 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -4,6 +4,7 @@
4 * Copyright (C) 2000-2001 Hewlett Packard Company 4 * Copyright (C) 2000-2001 Hewlett Packard Company
5 * Copyright (C) 2000 John Marvin 5 * Copyright (C) 2000 John Marvin
6 * Copyright (C) 2001 Matthew Wilcox 6 * Copyright (C) 2001 Matthew Wilcox
7 * Copyright (C) 2014 Helge Deller <deller@gmx.de>
7 * 8 *
8 * These routines maintain argument size conversion between 32bit and 64bit 9 * These routines maintain argument size conversion between 32bit and 64bit
9 * environment. Based heavily on sys_ia32.c and sys_sparc32.c. 10 * environment. Based heavily on sys_ia32.c and sys_sparc32.c.
@@ -11,44 +12,8 @@
11 12
12#include <linux/compat.h> 13#include <linux/compat.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/sched.h>
15#include <linux/fs.h>
16#include <linux/mm.h>
17#include <linux/file.h>
18#include <linux/signal.h>
19#include <linux/resource.h>
20#include <linux/times.h>
21#include <linux/time.h>
22#include <linux/smp.h>
23#include <linux/sem.h>
24#include <linux/shm.h>
25#include <linux/slab.h>
26#include <linux/uio.h>
27#include <linux/ncp_fs.h>
28#include <linux/poll.h>
29#include <linux/personality.h>
30#include <linux/stat.h>
31#include <linux/highmem.h>
32#include <linux/highuid.h>
33#include <linux/mman.h>
34#include <linux/binfmts.h>
35#include <linux/namei.h>
36#include <linux/vfs.h>
37#include <linux/ptrace.h>
38#include <linux/swap.h>
39#include <linux/syscalls.h> 15#include <linux/syscalls.h>
40 16
41#include <asm/types.h>
42#include <asm/uaccess.h>
43#include <asm/mmu_context.h>
44
45#undef DEBUG
46
47#ifdef DEBUG
48#define DBG(x) printk x
49#else
50#define DBG(x)
51#endif
52 17
53asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23, 18asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23,
54 int r22, int r21, int r20) 19 int r22, int r21, int r20)
@@ -57,3 +22,12 @@ asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23,
57 current->comm, current->pid, r20); 22 current->comm, current->pid, r20);
58 return -ENOSYS; 23 return -ENOSYS;
59} 24}
25
26asmlinkage long sys32_fanotify_mark(compat_int_t fanotify_fd, compat_uint_t flags,
27 compat_uint_t mask0, compat_uint_t mask1, compat_int_t dfd,
28 const char __user * pathname)
29{
30 return sys_fanotify_mark(fanotify_fd, flags,
31 ((__u64)mask1 << 32) | mask0,
32 dfd, pathname);
33}
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S
index c5fa7a697fba..84c5d3a58fa1 100644
--- a/arch/parisc/kernel/syscall_table.S
+++ b/arch/parisc/kernel/syscall_table.S
@@ -418,7 +418,7 @@
418 ENTRY_SAME(accept4) /* 320 */ 418 ENTRY_SAME(accept4) /* 320 */
419 ENTRY_SAME(prlimit64) 419 ENTRY_SAME(prlimit64)
420 ENTRY_SAME(fanotify_init) 420 ENTRY_SAME(fanotify_init)
421 ENTRY_COMP(fanotify_mark) 421 ENTRY_DIFF(fanotify_mark)
422 ENTRY_COMP(clock_adjtime) 422 ENTRY_COMP(clock_adjtime)
423 ENTRY_SAME(name_to_handle_at) /* 325 */ 423 ENTRY_SAME(name_to_handle_at) /* 325 */
424 ENTRY_COMP(open_by_handle_at) 424 ENTRY_COMP(open_by_handle_at)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index bd6dd6ed3a9f..fefe7c8bf05f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -414,7 +414,7 @@ config KEXEC
414config CRASH_DUMP 414config CRASH_DUMP
415 bool "Build a kdump crash kernel" 415 bool "Build a kdump crash kernel"
416 depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP) 416 depends on PPC64 || 6xx || FSL_BOOKE || (44x && !SMP)
417 select RELOCATABLE if PPC64 || 44x || FSL_BOOKE 417 select RELOCATABLE if (PPC64 && !COMPILE_TEST) || 44x || FSL_BOOKE
418 help 418 help
419 Build a kernel suitable for use as a kdump capture kernel. 419 Build a kernel suitable for use as a kdump capture kernel.
420 The same kernel binary can be used as production kernel and dump 420 The same kernel binary can be used as production kernel and dump
@@ -1017,6 +1017,7 @@ endmenu
1017if PPC64 1017if PPC64
1018config RELOCATABLE 1018config RELOCATABLE
1019 bool "Build a relocatable kernel" 1019 bool "Build a relocatable kernel"
1020 depends on !COMPILE_TEST
1020 select NONSTATIC_KERNEL 1021 select NONSTATIC_KERNEL
1021 help 1022 help
1022 This builds a kernel image that is capable of running anywhere 1023 This builds a kernel image that is capable of running anywhere
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 790352f93700..35d16bd2760b 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -303,7 +303,6 @@ config PPC_EARLY_DEBUG_OPAL_VTERMNO
303 This correspond to which /dev/hvcN you want to use for early 303 This correspond to which /dev/hvcN you want to use for early
304 debug. 304 debug.
305 305
306 On OPAL v1 (takeover) this should always be 0
307 On OPAL v2, this will be 0 for network console and 1 or 2 for 306 On OPAL v2, this will be 0 for network console and 1 or 2 for
308 the machine built-in serial ports. 307 the machine built-in serial ports.
309 308
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 37991e154ef8..840a5509b3f1 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -88,4 +88,15 @@ static inline unsigned long ppc_function_entry(void *func)
88#endif 88#endif
89} 89}
90 90
91static inline unsigned long ppc_global_function_entry(void *func)
92{
93#if defined(CONFIG_PPC64) && defined(_CALL_ELF) && _CALL_ELF == 2
94 /* PPC64 ABIv2 the global entry point is at the address */
95 return (unsigned long)func;
96#else
97 /* All other cases there is no change vs ppc_function_entry() */
98 return ppc_function_entry(func);
99#endif
100}
101
91#endif /* _ASM_POWERPC_CODE_PATCHING_H */ 102#endif /* _ASM_POWERPC_CODE_PATCHING_H */
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index f8d1d6dcf7db..e61f24ed4e65 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -19,8 +19,7 @@
19#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004) 19#define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
20#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008) 20#define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
21#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010) 21#define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
22#define MMU_FTR_TYPE_3E ASM_CONST(0x00000020) 22#define MMU_FTR_TYPE_47x ASM_CONST(0x00000020)
23#define MMU_FTR_TYPE_47x ASM_CONST(0x00000040)
24 23
25/* 24/*
26 * This is individual features 25 * This is individual features
@@ -106,13 +105,6 @@
106 MMU_FTR_CI_LARGE_PAGE 105 MMU_FTR_CI_LARGE_PAGE
107#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \ 106#define MMU_FTRS_PA6T MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
108 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B 107 MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
109#define MMU_FTRS_A2 MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | \
110 MMU_FTR_USE_TLBIVAX_BCAST | \
111 MMU_FTR_LOCK_BCAST_INVAL | \
112 MMU_FTR_USE_TLBRSRV | \
113 MMU_FTR_USE_PAIRED_MAS | \
114 MMU_FTR_TLBIEL | \
115 MMU_FTR_16M_PAGE
116#ifndef __ASSEMBLY__ 108#ifndef __ASSEMBLY__
117#include <asm/cputable.h> 109#include <asm/cputable.h>
118 110
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 460018889ba9..0da1dbd42e02 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -12,27 +12,7 @@
12#ifndef __OPAL_H 12#ifndef __OPAL_H
13#define __OPAL_H 13#define __OPAL_H
14 14
15/****** Takeover interface ********/
16
17/* PAPR H-Call used to querty the HAL existence and/or instanciate
18 * it from within pHyp (tech preview only).
19 *
20 * This is exclusively used in prom_init.c
21 */
22
23#ifndef __ASSEMBLY__ 15#ifndef __ASSEMBLY__
24
25struct opal_takeover_args {
26 u64 k_image; /* r4 */
27 u64 k_size; /* r5 */
28 u64 k_entry; /* r6 */
29 u64 k_entry2; /* r7 */
30 u64 hal_addr; /* r8 */
31 u64 rd_image; /* r9 */
32 u64 rd_size; /* r10 */
33 u64 rd_loc; /* r11 */
34};
35
36/* 16/*
37 * SG entry 17 * SG entry
38 * 18 *
@@ -55,15 +35,6 @@ struct opal_sg_list {
55/* We calculate number of sg entries based on PAGE_SIZE */ 35/* We calculate number of sg entries based on PAGE_SIZE */
56#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry)) 36#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
57 37
58extern long opal_query_takeover(u64 *hal_size, u64 *hal_align);
59
60extern long opal_do_takeover(struct opal_takeover_args *args);
61
62struct rtas_args;
63extern int opal_enter_rtas(struct rtas_args *args,
64 unsigned long data,
65 unsigned long entry);
66
67#endif /* __ASSEMBLY__ */ 38#endif /* __ASSEMBLY__ */
68 39
69/****** OPAL APIs ******/ 40/****** OPAL APIs ******/
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 9ed737146dbb..b3e936027b26 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -61,8 +61,7 @@ struct power_pmu {
61#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */ 61#define PPMU_SIAR_VALID 0x00000010 /* Processor has SIAR Valid bit */
62#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */ 62#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
63#define PPMU_HAS_SIER 0x00000040 /* Has SIER */ 63#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
64#define PPMU_BHRB 0x00000080 /* has BHRB feature enabled */ 64#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
65#define PPMU_EBB 0x00000100 /* supports event based branch */
66 65
67/* 66/*
68 * Values for flags to get_alternatives() 67 * Values for flags to get_alternatives()
diff --git a/arch/powerpc/include/asm/swab.h b/arch/powerpc/include/asm/swab.h
index b9bd1ca944d0..96f59de61855 100644
--- a/arch/powerpc/include/asm/swab.h
+++ b/arch/powerpc/include/asm/swab.h
@@ -9,10 +9,6 @@
9 9
10#include <uapi/asm/swab.h> 10#include <uapi/asm/swab.h>
11 11
12#ifdef __GNUC__
13#ifndef __powerpc64__
14#endif /* __powerpc64__ */
15
16static __inline__ __u16 ld_le16(const volatile __u16 *addr) 12static __inline__ __u16 ld_le16(const volatile __u16 *addr)
17{ 13{
18 __u16 val; 14 __u16 val;
@@ -20,19 +16,12 @@ static __inline__ __u16 ld_le16(const volatile __u16 *addr)
20 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); 16 __asm__ __volatile__ ("lhbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
21 return val; 17 return val;
22} 18}
23#define __arch_swab16p ld_le16
24 19
25static __inline__ void st_le16(volatile __u16 *addr, const __u16 val) 20static __inline__ void st_le16(volatile __u16 *addr, const __u16 val)
26{ 21{
27 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); 22 __asm__ __volatile__ ("sthbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
28} 23}
29 24
30static inline void __arch_swab16s(__u16 *addr)
31{
32 st_le16(addr, *addr);
33}
34#define __arch_swab16s __arch_swab16s
35
36static __inline__ __u32 ld_le32(const volatile __u32 *addr) 25static __inline__ __u32 ld_le32(const volatile __u32 *addr)
37{ 26{
38 __u32 val; 27 __u32 val;
@@ -40,42 +29,10 @@ static __inline__ __u32 ld_le32(const volatile __u32 *addr)
40 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr)); 29 __asm__ __volatile__ ("lwbrx %0,0,%1" : "=r" (val) : "r" (addr), "m" (*addr));
41 return val; 30 return val;
42} 31}
43#define __arch_swab32p ld_le32
44 32
45static __inline__ void st_le32(volatile __u32 *addr, const __u32 val) 33static __inline__ void st_le32(volatile __u32 *addr, const __u32 val)
46{ 34{
47 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr)); 35 __asm__ __volatile__ ("stwbrx %1,0,%2" : "=m" (*addr) : "r" (val), "r" (addr));
48} 36}
49 37
50static inline void __arch_swab32s(__u32 *addr)
51{
52 st_le32(addr, *addr);
53}
54#define __arch_swab32s __arch_swab32s
55
56static inline __attribute_const__ __u16 __arch_swab16(__u16 value)
57{
58 __u16 result;
59
60 __asm__("rlwimi %0,%1,8,16,23"
61 : "=r" (result)
62 : "r" (value), "0" (value >> 8));
63 return result;
64}
65#define __arch_swab16 __arch_swab16
66
67static inline __attribute_const__ __u32 __arch_swab32(__u32 value)
68{
69 __u32 result;
70
71 __asm__("rlwimi %0,%1,24,16,23\n\t"
72 "rlwimi %0,%1,8,8,15\n\t"
73 "rlwimi %0,%1,24,0,7"
74 : "=r" (result)
75 : "r" (value), "0" (value >> 24));
76 return result;
77}
78#define __arch_swab32 __arch_swab32
79
80#endif /* __GNUC__ */
81#endif /* _ASM_POWERPC_SWAB_H */ 38#endif /* _ASM_POWERPC_SWAB_H */
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index f202d0731b06..d178834fe508 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -10,6 +10,8 @@
10 * 10 *
11 */ 11 */
12 12
13#define pr_fmt(fmt) "ftrace-powerpc: " fmt
14
13#include <linux/spinlock.h> 15#include <linux/spinlock.h>
14#include <linux/hardirq.h> 16#include <linux/hardirq.h>
15#include <linux/uaccess.h> 17#include <linux/uaccess.h>
@@ -105,7 +107,7 @@ __ftrace_make_nop(struct module *mod,
105 struct dyn_ftrace *rec, unsigned long addr) 107 struct dyn_ftrace *rec, unsigned long addr)
106{ 108{
107 unsigned int op; 109 unsigned int op;
108 unsigned long ptr; 110 unsigned long entry, ptr;
109 unsigned long ip = rec->ip; 111 unsigned long ip = rec->ip;
110 void *tramp; 112 void *tramp;
111 113
@@ -115,7 +117,7 @@ __ftrace_make_nop(struct module *mod,
115 117
116 /* Make sure that that this is still a 24bit jump */ 118 /* Make sure that that this is still a 24bit jump */
117 if (!is_bl_op(op)) { 119 if (!is_bl_op(op)) {
118 printk(KERN_ERR "Not expected bl: opcode is %x\n", op); 120 pr_err("Not expected bl: opcode is %x\n", op);
119 return -EINVAL; 121 return -EINVAL;
120 } 122 }
121 123
@@ -125,21 +127,21 @@ __ftrace_make_nop(struct module *mod,
125 pr_devel("ip:%lx jumps to %p", ip, tramp); 127 pr_devel("ip:%lx jumps to %p", ip, tramp);
126 128
127 if (!is_module_trampoline(tramp)) { 129 if (!is_module_trampoline(tramp)) {
128 printk(KERN_ERR "Not a trampoline\n"); 130 pr_err("Not a trampoline\n");
129 return -EINVAL; 131 return -EINVAL;
130 } 132 }
131 133
132 if (module_trampoline_target(mod, tramp, &ptr)) { 134 if (module_trampoline_target(mod, tramp, &ptr)) {
133 printk(KERN_ERR "Failed to get trampoline target\n"); 135 pr_err("Failed to get trampoline target\n");
134 return -EFAULT; 136 return -EFAULT;
135 } 137 }
136 138
137 pr_devel("trampoline target %lx", ptr); 139 pr_devel("trampoline target %lx", ptr);
138 140
141 entry = ppc_global_function_entry((void *)addr);
139 /* This should match what was called */ 142 /* This should match what was called */
140 if (ptr != ppc_function_entry((void *)addr)) { 143 if (ptr != entry) {
141 printk(KERN_ERR "addr %lx does not match expected %lx\n", 144 pr_err("addr %lx does not match expected %lx\n", ptr, entry);
142 ptr, ppc_function_entry((void *)addr));
143 return -EINVAL; 145 return -EINVAL;
144 } 146 }
145 147
@@ -179,7 +181,7 @@ __ftrace_make_nop(struct module *mod,
179 181
180 /* Make sure that that this is still a 24bit jump */ 182 /* Make sure that that this is still a 24bit jump */
181 if (!is_bl_op(op)) { 183 if (!is_bl_op(op)) {
182 printk(KERN_ERR "Not expected bl: opcode is %x\n", op); 184 pr_err("Not expected bl: opcode is %x\n", op);
183 return -EINVAL; 185 return -EINVAL;
184 } 186 }
185 187
@@ -198,7 +200,7 @@ __ftrace_make_nop(struct module *mod,
198 200
199 /* Find where the trampoline jumps to */ 201 /* Find where the trampoline jumps to */
200 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) { 202 if (probe_kernel_read(jmp, (void *)tramp, sizeof(jmp))) {
201 printk(KERN_ERR "Failed to read %lx\n", tramp); 203 pr_err("Failed to read %lx\n", tramp);
202 return -EFAULT; 204 return -EFAULT;
203 } 205 }
204 206
@@ -209,7 +211,7 @@ __ftrace_make_nop(struct module *mod,
209 ((jmp[1] & 0xffff0000) != 0x398c0000) || 211 ((jmp[1] & 0xffff0000) != 0x398c0000) ||
210 (jmp[2] != 0x7d8903a6) || 212 (jmp[2] != 0x7d8903a6) ||
211 (jmp[3] != 0x4e800420)) { 213 (jmp[3] != 0x4e800420)) {
212 printk(KERN_ERR "Not a trampoline\n"); 214 pr_err("Not a trampoline\n");
213 return -EINVAL; 215 return -EINVAL;
214 } 216 }
215 217
@@ -221,8 +223,7 @@ __ftrace_make_nop(struct module *mod,
221 pr_devel(" %lx ", tramp); 223 pr_devel(" %lx ", tramp);
222 224
223 if (tramp != addr) { 225 if (tramp != addr) {
224 printk(KERN_ERR 226 pr_err("Trampoline location %08lx does not match addr\n",
225 "Trampoline location %08lx does not match addr\n",
226 tramp); 227 tramp);
227 return -EINVAL; 228 return -EINVAL;
228 } 229 }
@@ -263,15 +264,13 @@ int ftrace_make_nop(struct module *mod,
263 */ 264 */
264 if (!rec->arch.mod) { 265 if (!rec->arch.mod) {
265 if (!mod) { 266 if (!mod) {
266 printk(KERN_ERR "No module loaded addr=%lx\n", 267 pr_err("No module loaded addr=%lx\n", addr);
267 addr);
268 return -EFAULT; 268 return -EFAULT;
269 } 269 }
270 rec->arch.mod = mod; 270 rec->arch.mod = mod;
271 } else if (mod) { 271 } else if (mod) {
272 if (mod != rec->arch.mod) { 272 if (mod != rec->arch.mod) {
273 printk(KERN_ERR 273 pr_err("Record mod %p not equal to passed in mod %p\n",
274 "Record mod %p not equal to passed in mod %p\n",
275 rec->arch.mod, mod); 274 rec->arch.mod, mod);
276 return -EINVAL; 275 return -EINVAL;
277 } 276 }
@@ -307,26 +306,25 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
307 * The load offset is different depending on the ABI. For simplicity 306 * The load offset is different depending on the ABI. For simplicity
308 * just mask it out when doing the compare. 307 * just mask it out when doing the compare.
309 */ 308 */
310 if ((op[0] != 0x48000008) || ((op[1] & 0xffff00000) != 0xe8410000)) { 309 if ((op[0] != 0x48000008) || ((op[1] & 0xffff0000) != 0xe8410000)) {
311 printk(KERN_ERR "Unexpected call sequence: %x %x\n", 310 pr_err("Unexpected call sequence: %x %x\n", op[0], op[1]);
312 op[0], op[1]);
313 return -EINVAL; 311 return -EINVAL;
314 } 312 }
315 313
316 /* If we never set up a trampoline to ftrace_caller, then bail */ 314 /* If we never set up a trampoline to ftrace_caller, then bail */
317 if (!rec->arch.mod->arch.tramp) { 315 if (!rec->arch.mod->arch.tramp) {
318 printk(KERN_ERR "No ftrace trampoline\n"); 316 pr_err("No ftrace trampoline\n");
319 return -EINVAL; 317 return -EINVAL;
320 } 318 }
321 319
322 /* Ensure branch is within 24 bits */ 320 /* Ensure branch is within 24 bits */
323 if (create_branch(ip, rec->arch.mod->arch.tramp, BRANCH_SET_LINK)) { 321 if (!create_branch(ip, rec->arch.mod->arch.tramp, BRANCH_SET_LINK)) {
324 printk(KERN_ERR "Branch out of range"); 322 pr_err("Branch out of range\n");
325 return -EINVAL; 323 return -EINVAL;
326 } 324 }
327 325
328 if (patch_branch(ip, rec->arch.mod->arch.tramp, BRANCH_SET_LINK)) { 326 if (patch_branch(ip, rec->arch.mod->arch.tramp, BRANCH_SET_LINK)) {
329 printk(KERN_ERR "REL24 out of range!\n"); 327 pr_err("REL24 out of range!\n");
330 return -EINVAL; 328 return -EINVAL;
331 } 329 }
332 330
@@ -345,13 +343,13 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
345 343
346 /* It should be pointing to a nop */ 344 /* It should be pointing to a nop */
347 if (op != PPC_INST_NOP) { 345 if (op != PPC_INST_NOP) {
348 printk(KERN_ERR "Expected NOP but have %x\n", op); 346 pr_err("Expected NOP but have %x\n", op);
349 return -EINVAL; 347 return -EINVAL;
350 } 348 }
351 349
352 /* If we never set up a trampoline to ftrace_caller, then bail */ 350 /* If we never set up a trampoline to ftrace_caller, then bail */
353 if (!rec->arch.mod->arch.tramp) { 351 if (!rec->arch.mod->arch.tramp) {
354 printk(KERN_ERR "No ftrace trampoline\n"); 352 pr_err("No ftrace trampoline\n");
355 return -EINVAL; 353 return -EINVAL;
356 } 354 }
357 355
@@ -359,7 +357,7 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
359 op = create_branch((unsigned int *)ip, 357 op = create_branch((unsigned int *)ip,
360 rec->arch.mod->arch.tramp, BRANCH_SET_LINK); 358 rec->arch.mod->arch.tramp, BRANCH_SET_LINK);
361 if (!op) { 359 if (!op) {
362 printk(KERN_ERR "REL24 out of range!\n"); 360 pr_err("REL24 out of range!\n");
363 return -EINVAL; 361 return -EINVAL;
364 } 362 }
365 363
@@ -397,7 +395,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
397 * already have a module defined. 395 * already have a module defined.
398 */ 396 */
399 if (!rec->arch.mod) { 397 if (!rec->arch.mod) {
400 printk(KERN_ERR "No module loaded\n"); 398 pr_err("No module loaded\n");
401 return -EINVAL; 399 return -EINVAL;
402 } 400 }
403 401
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index 2480256272d4..5cf3d367190d 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -131,7 +131,7 @@ _GLOBAL(power7_nap)
131 131
132_GLOBAL(power7_sleep) 132_GLOBAL(power7_sleep)
133 li r3,1 133 li r3,1
134 li r4,0 134 li r4,1
135 b power7_powersave_common 135 b power7_powersave_common
136 /* No return */ 136 /* No return */
137 137
diff --git a/arch/powerpc/kernel/iomap.c b/arch/powerpc/kernel/iomap.c
index b82227e7e21b..12e48d56f771 100644
--- a/arch/powerpc/kernel/iomap.c
+++ b/arch/powerpc/kernel/iomap.c
@@ -23,7 +23,7 @@ unsigned int ioread16(void __iomem *addr)
23} 23}
24unsigned int ioread16be(void __iomem *addr) 24unsigned int ioread16be(void __iomem *addr)
25{ 25{
26 return in_be16(addr); 26 return readw_be(addr);
27} 27}
28unsigned int ioread32(void __iomem *addr) 28unsigned int ioread32(void __iomem *addr)
29{ 29{
@@ -31,7 +31,7 @@ unsigned int ioread32(void __iomem *addr)
31} 31}
32unsigned int ioread32be(void __iomem *addr) 32unsigned int ioread32be(void __iomem *addr)
33{ 33{
34 return in_be32(addr); 34 return readl_be(addr);
35} 35}
36EXPORT_SYMBOL(ioread8); 36EXPORT_SYMBOL(ioread8);
37EXPORT_SYMBOL(ioread16); 37EXPORT_SYMBOL(ioread16);
@@ -49,7 +49,7 @@ void iowrite16(u16 val, void __iomem *addr)
49} 49}
50void iowrite16be(u16 val, void __iomem *addr) 50void iowrite16be(u16 val, void __iomem *addr)
51{ 51{
52 out_be16(addr, val); 52 writew_be(val, addr);
53} 53}
54void iowrite32(u32 val, void __iomem *addr) 54void iowrite32(u32 val, void __iomem *addr)
55{ 55{
@@ -57,7 +57,7 @@ void iowrite32(u32 val, void __iomem *addr)
57} 57}
58void iowrite32be(u32 val, void __iomem *addr) 58void iowrite32be(u32 val, void __iomem *addr)
59{ 59{
60 out_be32(addr, val); 60 writel_be(val, addr);
61} 61}
62EXPORT_SYMBOL(iowrite8); 62EXPORT_SYMBOL(iowrite8);
63EXPORT_SYMBOL(iowrite16); 63EXPORT_SYMBOL(iowrite16);
@@ -75,15 +75,15 @@ EXPORT_SYMBOL(iowrite32be);
75 */ 75 */
76void ioread8_rep(void __iomem *addr, void *dst, unsigned long count) 76void ioread8_rep(void __iomem *addr, void *dst, unsigned long count)
77{ 77{
78 _insb((u8 __iomem *) addr, dst, count); 78 readsb(addr, dst, count);
79} 79}
80void ioread16_rep(void __iomem *addr, void *dst, unsigned long count) 80void ioread16_rep(void __iomem *addr, void *dst, unsigned long count)
81{ 81{
82 _insw_ns((u16 __iomem *) addr, dst, count); 82 readsw(addr, dst, count);
83} 83}
84void ioread32_rep(void __iomem *addr, void *dst, unsigned long count) 84void ioread32_rep(void __iomem *addr, void *dst, unsigned long count)
85{ 85{
86 _insl_ns((u32 __iomem *) addr, dst, count); 86 readsl(addr, dst, count);
87} 87}
88EXPORT_SYMBOL(ioread8_rep); 88EXPORT_SYMBOL(ioread8_rep);
89EXPORT_SYMBOL(ioread16_rep); 89EXPORT_SYMBOL(ioread16_rep);
@@ -91,15 +91,15 @@ EXPORT_SYMBOL(ioread32_rep);
91 91
92void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count) 92void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
93{ 93{
94 _outsb((u8 __iomem *) addr, src, count); 94 writesb(addr, src, count);
95} 95}
96void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count) 96void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
97{ 97{
98 _outsw_ns((u16 __iomem *) addr, src, count); 98 writesw(addr, src, count);
99} 99}
100void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) 100void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
101{ 101{
102 _outsl_ns((u32 __iomem *) addr, src, count); 102 writesl(addr, src, count);
103} 103}
104EXPORT_SYMBOL(iowrite8_rep); 104EXPORT_SYMBOL(iowrite8_rep);
105EXPORT_SYMBOL(iowrite16_rep); 105EXPORT_SYMBOL(iowrite16_rep);
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index 90fab64d911d..2f72af82513c 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -32,6 +32,7 @@
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/kdebug.h> 33#include <linux/kdebug.h>
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <asm/code-patching.h>
35#include <asm/cacheflush.h> 36#include <asm/cacheflush.h>
36#include <asm/sstep.h> 37#include <asm/sstep.h>
37#include <asm/uaccess.h> 38#include <asm/uaccess.h>
@@ -491,12 +492,10 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
491 return ret; 492 return ret;
492} 493}
493 494
494#ifdef CONFIG_PPC64
495unsigned long arch_deref_entry_point(void *entry) 495unsigned long arch_deref_entry_point(void *entry)
496{ 496{
497 return ((func_descr_t *)entry)->entry; 497 return ppc_global_function_entry(entry);
498} 498}
499#endif
500 499
501int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs) 500int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
502{ 501{
@@ -508,8 +507,12 @@ int __kprobes setjmp_pre_handler(struct kprobe *p, struct pt_regs *regs)
508 /* setup return addr to the jprobe handler routine */ 507 /* setup return addr to the jprobe handler routine */
509 regs->nip = arch_deref_entry_point(jp->entry); 508 regs->nip = arch_deref_entry_point(jp->entry);
510#ifdef CONFIG_PPC64 509#ifdef CONFIG_PPC64
510#if defined(_CALL_ELF) && _CALL_ELF == 2
511 regs->gpr[12] = (unsigned long)jp->entry;
512#else
511 regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc); 513 regs->gpr[2] = (unsigned long)(((func_descr_t *)jp->entry)->toc);
512#endif 514#endif
515#endif
513 516
514 return 1; 517 return 1;
515} 518}
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 077d2ce6c5a7..d807ee626af9 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -315,8 +315,17 @@ static void dedotify_versions(struct modversion_info *vers,
315 struct modversion_info *end; 315 struct modversion_info *end;
316 316
317 for (end = (void *)vers + size; vers < end; vers++) 317 for (end = (void *)vers + size; vers < end; vers++)
318 if (vers->name[0] == '.') 318 if (vers->name[0] == '.') {
319 memmove(vers->name, vers->name+1, strlen(vers->name)); 319 memmove(vers->name, vers->name+1, strlen(vers->name));
320#ifdef ARCH_RELOCATES_KCRCTAB
321 /* The TOC symbol has no CRC computed. To avoid CRC
322 * check failing, we must force it to the expected
323 * value (see CRC check in module.c).
324 */
325 if (!strcmp(vers->name, "TOC."))
326 vers->crc = -(unsigned long)reloc_start;
327#endif
328 }
320} 329}
321 330
322/* Undefined symbols which refer to .funcname, hack to funcname (or .TOC.) */ 331/* Undefined symbols which refer to .funcname, hack to funcname (or .TOC.) */
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 613a860a203c..b694b0730971 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -662,13 +662,6 @@ void __init early_init_devtree(void *params)
662 of_scan_flat_dt(early_init_dt_scan_fw_dump, NULL); 662 of_scan_flat_dt(early_init_dt_scan_fw_dump, NULL);
663#endif 663#endif
664 664
665 /* Pre-initialize the cmd_line with the content of boot_commmand_line,
666 * which will be empty except when the content of the variable has
667 * been overriden by a bootloading mechanism. This happens typically
668 * with HAL takeover
669 */
670 strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
671
672 /* Retrieve various informations from the /chosen node of the 665 /* Retrieve various informations from the /chosen node of the
673 * device-tree, including the platform type, initrd location and 666 * device-tree, including the platform type, initrd location and
674 * size, TCE reserve, and more ... 667 * size, TCE reserve, and more ...
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 078145acf7fb..1a85d8f96739 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1268,201 +1268,6 @@ static u64 __initdata prom_opal_base;
1268static u64 __initdata prom_opal_entry; 1268static u64 __initdata prom_opal_entry;
1269#endif 1269#endif
1270 1270
1271#ifdef __BIG_ENDIAN__
1272/* XXX Don't change this structure without updating opal-takeover.S */
1273static struct opal_secondary_data {
1274 s64 ack; /* 0 */
1275 u64 go; /* 8 */
1276 struct opal_takeover_args args; /* 16 */
1277} opal_secondary_data;
1278
1279static u64 __initdata prom_opal_align;
1280static u64 __initdata prom_opal_size;
1281static int __initdata prom_rtas_start_cpu;
1282static u64 __initdata prom_rtas_data;
1283static u64 __initdata prom_rtas_entry;
1284
1285extern char opal_secondary_entry;
1286
1287static void __init prom_query_opal(void)
1288{
1289 long rc;
1290
1291 /* We must not query for OPAL presence on a machine that
1292 * supports TNK takeover (970 blades), as this uses the same
1293 * h-call with different arguments and will crash
1294 */
1295 if (PHANDLE_VALID(call_prom("finddevice", 1, 1,
1296 ADDR("/tnk-memory-map")))) {
1297 prom_printf("TNK takeover detected, skipping OPAL check\n");
1298 return;
1299 }
1300
1301 prom_printf("Querying for OPAL presence... ");
1302
1303 rc = opal_query_takeover(&prom_opal_size,
1304 &prom_opal_align);
1305 prom_debug("(rc = %ld) ", rc);
1306 if (rc != 0) {
1307 prom_printf("not there.\n");
1308 return;
1309 }
1310 of_platform = PLATFORM_OPAL;
1311 prom_printf(" there !\n");
1312 prom_debug(" opal_size = 0x%lx\n", prom_opal_size);
1313 prom_debug(" opal_align = 0x%lx\n", prom_opal_align);
1314 if (prom_opal_align < 0x10000)
1315 prom_opal_align = 0x10000;
1316}
1317
1318static int __init prom_rtas_call(int token, int nargs, int nret,
1319 int *outputs, ...)
1320{
1321 struct rtas_args rtas_args;
1322 va_list list;
1323 int i;
1324
1325 rtas_args.token = token;
1326 rtas_args.nargs = nargs;
1327 rtas_args.nret = nret;
1328 rtas_args.rets = (rtas_arg_t *)&(rtas_args.args[nargs]);
1329 va_start(list, outputs);
1330 for (i = 0; i < nargs; ++i)
1331 rtas_args.args[i] = va_arg(list, rtas_arg_t);
1332 va_end(list);
1333
1334 for (i = 0; i < nret; ++i)
1335 rtas_args.rets[i] = 0;
1336
1337 opal_enter_rtas(&rtas_args, prom_rtas_data,
1338 prom_rtas_entry);
1339
1340 if (nret > 1 && outputs != NULL)
1341 for (i = 0; i < nret-1; ++i)
1342 outputs[i] = rtas_args.rets[i+1];
1343 return (nret > 0)? rtas_args.rets[0]: 0;
1344}
1345
1346static void __init prom_opal_hold_cpus(void)
1347{
1348 int i, cnt, cpu, rc;
1349 long j;
1350 phandle node;
1351 char type[64];
1352 u32 servers[8];
1353 void *entry = (unsigned long *)&opal_secondary_entry;
1354 struct opal_secondary_data *data = &opal_secondary_data;
1355
1356 prom_debug("prom_opal_hold_cpus: start...\n");
1357 prom_debug(" - entry = 0x%x\n", entry);
1358 prom_debug(" - data = 0x%x\n", data);
1359
1360 data->ack = -1;
1361 data->go = 0;
1362
1363 /* look for cpus */
1364 for (node = 0; prom_next_node(&node); ) {
1365 type[0] = 0;
1366 prom_getprop(node, "device_type", type, sizeof(type));
1367 if (strcmp(type, "cpu") != 0)
1368 continue;
1369
1370 /* Skip non-configured cpus. */
1371 if (prom_getprop(node, "status", type, sizeof(type)) > 0)
1372 if (strcmp(type, "okay") != 0)
1373 continue;
1374
1375 cnt = prom_getprop(node, "ibm,ppc-interrupt-server#s", servers,
1376 sizeof(servers));
1377 if (cnt == PROM_ERROR)
1378 break;
1379 cnt >>= 2;
1380 for (i = 0; i < cnt; i++) {
1381 cpu = servers[i];
1382 prom_debug("CPU %d ... ", cpu);
1383 if (cpu == prom.cpu) {
1384 prom_debug("booted !\n");
1385 continue;
1386 }
1387 prom_debug("starting ... ");
1388
1389 /* Init the acknowledge var which will be reset by
1390 * the secondary cpu when it awakens from its OF
1391 * spinloop.
1392 */
1393 data->ack = -1;
1394 rc = prom_rtas_call(prom_rtas_start_cpu, 3, 1,
1395 NULL, cpu, entry, data);
1396 prom_debug("rtas rc=%d ...", rc);
1397
1398 for (j = 0; j < 100000000 && data->ack == -1; j++) {
1399 HMT_low();
1400 mb();
1401 }
1402 HMT_medium();
1403 if (data->ack != -1)
1404 prom_debug("done, PIR=0x%x\n", data->ack);
1405 else
1406 prom_debug("timeout !\n");
1407 }
1408 }
1409 prom_debug("prom_opal_hold_cpus: end...\n");
1410}
1411
1412static void __init prom_opal_takeover(void)
1413{
1414 struct opal_secondary_data *data = &opal_secondary_data;
1415 struct opal_takeover_args *args = &data->args;
1416 u64 align = prom_opal_align;
1417 u64 top_addr, opal_addr;
1418
1419 args->k_image = (u64)_stext;
1420 args->k_size = _end - _stext;
1421 args->k_entry = 0;
1422 args->k_entry2 = 0x60;
1423
1424 top_addr = _ALIGN_UP(args->k_size, align);
1425
1426 if (prom_initrd_start != 0) {
1427 args->rd_image = prom_initrd_start;
1428 args->rd_size = prom_initrd_end - args->rd_image;
1429 args->rd_loc = top_addr;
1430 top_addr = _ALIGN_UP(args->rd_loc + args->rd_size, align);
1431 }
1432
1433 /* Pickup an address for the HAL. We want to go really high
1434 * up to avoid problem with future kexecs. On the other hand
1435 * we don't want to be all over the TCEs on P5IOC2 machines
1436 * which are going to be up there too. We assume the machine
1437 * has plenty of memory, and we ask for the HAL for now to
1438 * be just below the 1G point, or above the initrd
1439 */
1440 opal_addr = _ALIGN_DOWN(0x40000000 - prom_opal_size, align);
1441 if (opal_addr < top_addr)
1442 opal_addr = top_addr;
1443 args->hal_addr = opal_addr;
1444
1445 /* Copy the command line to the kernel image */
1446 strlcpy(boot_command_line, prom_cmd_line,
1447 COMMAND_LINE_SIZE);
1448
1449 prom_debug(" k_image = 0x%lx\n", args->k_image);
1450 prom_debug(" k_size = 0x%lx\n", args->k_size);
1451 prom_debug(" k_entry = 0x%lx\n", args->k_entry);
1452 prom_debug(" k_entry2 = 0x%lx\n", args->k_entry2);
1453 prom_debug(" hal_addr = 0x%lx\n", args->hal_addr);
1454 prom_debug(" rd_image = 0x%lx\n", args->rd_image);
1455 prom_debug(" rd_size = 0x%lx\n", args->rd_size);
1456 prom_debug(" rd_loc = 0x%lx\n", args->rd_loc);
1457 prom_printf("Performing OPAL takeover,this can take a few minutes..\n");
1458 prom_close_stdin();
1459 mb();
1460 data->go = 1;
1461 for (;;)
1462 opal_do_takeover(args);
1463}
1464#endif /* __BIG_ENDIAN__ */
1465
1466/* 1271/*
1467 * Allocate room for and instantiate OPAL 1272 * Allocate room for and instantiate OPAL
1468 */ 1273 */
@@ -1597,12 +1402,6 @@ static void __init prom_instantiate_rtas(void)
1597 &val, sizeof(val)) != PROM_ERROR) 1402 &val, sizeof(val)) != PROM_ERROR)
1598 rtas_has_query_cpu_stopped = true; 1403 rtas_has_query_cpu_stopped = true;
1599 1404
1600#if defined(CONFIG_PPC_POWERNV) && defined(__BIG_ENDIAN__)
1601 /* PowerVN takeover hack */
1602 prom_rtas_data = base;
1603 prom_rtas_entry = entry;
1604 prom_getprop(rtas_node, "start-cpu", &prom_rtas_start_cpu, 4);
1605#endif
1606 prom_debug("rtas base = 0x%x\n", base); 1405 prom_debug("rtas base = 0x%x\n", base);
1607 prom_debug("rtas entry = 0x%x\n", entry); 1406 prom_debug("rtas entry = 0x%x\n", entry);
1608 prom_debug("rtas size = 0x%x\n", (long)size); 1407 prom_debug("rtas size = 0x%x\n", (long)size);
@@ -3027,16 +2826,6 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
3027 prom_instantiate_rtas(); 2826 prom_instantiate_rtas();
3028 2827
3029#ifdef CONFIG_PPC_POWERNV 2828#ifdef CONFIG_PPC_POWERNV
3030#ifdef __BIG_ENDIAN__
3031 /* Detect HAL and try instanciating it & doing takeover */
3032 if (of_platform == PLATFORM_PSERIES_LPAR) {
3033 prom_query_opal();
3034 if (of_platform == PLATFORM_OPAL) {
3035 prom_opal_hold_cpus();
3036 prom_opal_takeover();
3037 }
3038 } else
3039#endif /* __BIG_ENDIAN__ */
3040 if (of_platform == PLATFORM_OPAL) 2829 if (of_platform == PLATFORM_OPAL)
3041 prom_instantiate_opal(); 2830 prom_instantiate_opal();
3042#endif /* CONFIG_PPC_POWERNV */ 2831#endif /* CONFIG_PPC_POWERNV */
diff --git a/arch/powerpc/kernel/prom_init_check.sh b/arch/powerpc/kernel/prom_init_check.sh
index 77aa1e95e904..fe8e54b9ef7d 100644
--- a/arch/powerpc/kernel/prom_init_check.sh
+++ b/arch/powerpc/kernel/prom_init_check.sh
@@ -21,9 +21,7 @@ _end enter_prom memcpy memset reloc_offset __secondary_hold
21__secondary_hold_acknowledge __secondary_hold_spinloop __start 21__secondary_hold_acknowledge __secondary_hold_spinloop __start
22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224 22strcmp strcpy strlcpy strlen strncmp strstr logo_linux_clut224
23reloc_got2 kernstart_addr memstart_addr linux_banner _stext 23reloc_got2 kernstart_addr memstart_addr linux_banner _stext
24opal_query_takeover opal_do_takeover opal_enter_rtas opal_secondary_entry 24__prom_init_toc_start __prom_init_toc_end btext_setup_display TOC."
25boot_command_line __prom_init_toc_start __prom_init_toc_end
26btext_setup_display TOC."
27 25
28NM="$1" 26NM="$1"
29OBJ="$2" 27OBJ="$2"
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index e239df3768ac..e5b022c55ccd 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -469,9 +469,17 @@ void __init smp_setup_cpu_maps(void)
469 } 469 }
470 470
471 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 471 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
472 bool avail;
473
472 DBG(" thread %d -> cpu %d (hard id %d)\n", 474 DBG(" thread %d -> cpu %d (hard id %d)\n",
473 j, cpu, be32_to_cpu(intserv[j])); 475 j, cpu, be32_to_cpu(intserv[j]));
474 set_cpu_present(cpu, of_device_is_available(dn)); 476
477 avail = of_device_is_available(dn);
478 if (!avail)
479 avail = !of_property_match_string(dn,
480 "enable-method", "spin-table");
481
482 set_cpu_present(cpu, avail);
475 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); 483 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j]));
476 set_cpu_possible(cpu, true); 484 set_cpu_possible(cpu, true);
477 cpu++; 485 cpu++;
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index 4e47db686b5d..1bc5a1755ed4 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -54,7 +54,6 @@
54 54
55#include "signal.h" 55#include "signal.h"
56 56
57#undef DEBUG_SIG
58 57
59#ifdef CONFIG_PPC64 58#ifdef CONFIG_PPC64
60#define sys_rt_sigreturn compat_sys_rt_sigreturn 59#define sys_rt_sigreturn compat_sys_rt_sigreturn
@@ -1063,10 +1062,6 @@ int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
1063 return 1; 1062 return 1;
1064 1063
1065badframe: 1064badframe:
1066#ifdef DEBUG_SIG
1067 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
1068 regs, frame, newsp);
1069#endif
1070 if (show_unhandled_signals) 1065 if (show_unhandled_signals)
1071 printk_ratelimited(KERN_INFO 1066 printk_ratelimited(KERN_INFO
1072 "%s[%d]: bad frame in handle_rt_signal32: " 1067 "%s[%d]: bad frame in handle_rt_signal32: "
@@ -1484,10 +1479,6 @@ int handle_signal32(unsigned long sig, struct k_sigaction *ka,
1484 return 1; 1479 return 1;
1485 1480
1486badframe: 1481badframe:
1487#ifdef DEBUG_SIG
1488 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
1489 regs, frame, newsp);
1490#endif
1491 if (show_unhandled_signals) 1482 if (show_unhandled_signals)
1492 printk_ratelimited(KERN_INFO 1483 printk_ratelimited(KERN_INFO
1493 "%s[%d]: bad frame in handle_signal32: " 1484 "%s[%d]: bad frame in handle_signal32: "
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index d501dc4dc3e6..97c1e4b683fc 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -38,7 +38,6 @@
38 38
39#include "signal.h" 39#include "signal.h"
40 40
41#define DEBUG_SIG 0
42 41
43#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs)) 42#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
44#define FP_REGS_SIZE sizeof(elf_fpregset_t) 43#define FP_REGS_SIZE sizeof(elf_fpregset_t)
@@ -700,10 +699,6 @@ int sys_rt_sigreturn(unsigned long r3, unsigned long r4, unsigned long r5,
700 return 0; 699 return 0;
701 700
702badframe: 701badframe:
703#if DEBUG_SIG
704 printk("badframe in sys_rt_sigreturn, regs=%p uc=%p &uc->uc_mcontext=%p\n",
705 regs, uc, &uc->uc_mcontext);
706#endif
707 if (show_unhandled_signals) 702 if (show_unhandled_signals)
708 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, 703 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
709 current->comm, current->pid, "rt_sigreturn", 704 current->comm, current->pid, "rt_sigreturn",
@@ -809,10 +804,6 @@ int handle_rt_signal64(int signr, struct k_sigaction *ka, siginfo_t *info,
809 return 1; 804 return 1;
810 805
811badframe: 806badframe:
812#if DEBUG_SIG
813 printk("badframe in setup_rt_frame, regs=%p frame=%p newsp=%lx\n",
814 regs, frame, newsp);
815#endif
816 if (show_unhandled_signals) 807 if (show_unhandled_signals)
817 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32, 808 printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
818 current->comm, current->pid, "setup_rt_frame", 809 current->comm, current->pid, "setup_rt_frame",
diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S
index 8c86422a1e37..731be7478b27 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -127,11 +127,6 @@ BEGIN_FTR_SECTION
127 stw r10, HSTATE_PMC + 24(r13) 127 stw r10, HSTATE_PMC + 24(r13)
128 stw r11, HSTATE_PMC + 28(r13) 128 stw r11, HSTATE_PMC + 28(r13)
129END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201) 129END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
130BEGIN_FTR_SECTION
131 mfspr r9, SPRN_SIER
132 std r8, HSTATE_MMCR + 40(r13)
133 std r9, HSTATE_MMCR + 48(r13)
134END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
13531: 13031:
136 131
137 /* 132 /*
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index af3d78e19302..928ebe79668b 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -410,17 +410,7 @@ void __init mmu_context_init(void)
410 } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) { 410 } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
411 first_context = 1; 411 first_context = 1;
412 last_context = 65535; 412 last_context = 65535;
413 } else 413 } else {
414#ifdef CONFIG_PPC_BOOK3E_MMU
415 if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
416 u32 mmucfg = mfspr(SPRN_MMUCFG);
417 u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
418 >> MMUCFG_PIDSIZE_SHIFT;
419 first_context = 1;
420 last_context = (1UL << (pid_bits + 1)) - 1;
421 } else
422#endif
423 {
424 first_context = 1; 414 first_context = 1;
425 last_context = 255; 415 last_context = 255;
426 } 416 }
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 4520c9356b54..6b0641c3f03f 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -485,7 +485,7 @@ static bool is_ebb_event(struct perf_event *event)
485 * check that the PMU supports EBB, meaning those that don't can still 485 * check that the PMU supports EBB, meaning those that don't can still
486 * use bit 63 of the event code for something else if they wish. 486 * use bit 63 of the event code for something else if they wish.
487 */ 487 */
488 return (ppmu->flags & PPMU_EBB) && 488 return (ppmu->flags & PPMU_ARCH_207S) &&
489 ((event->attr.config >> PERF_EVENT_CONFIG_EBB_SHIFT) & 1); 489 ((event->attr.config >> PERF_EVENT_CONFIG_EBB_SHIFT) & 1);
490} 490}
491 491
@@ -777,7 +777,7 @@ void perf_event_print_debug(void)
777 if (ppmu->flags & PPMU_HAS_SIER) 777 if (ppmu->flags & PPMU_HAS_SIER)
778 sier = mfspr(SPRN_SIER); 778 sier = mfspr(SPRN_SIER);
779 779
780 if (ppmu->flags & PPMU_EBB) { 780 if (ppmu->flags & PPMU_ARCH_207S) {
781 pr_info("MMCR2: %016lx EBBHR: %016lx\n", 781 pr_info("MMCR2: %016lx EBBHR: %016lx\n",
782 mfspr(SPRN_MMCR2), mfspr(SPRN_EBBHR)); 782 mfspr(SPRN_MMCR2), mfspr(SPRN_EBBHR));
783 pr_info("EBBRR: %016lx BESCR: %016lx\n", 783 pr_info("EBBRR: %016lx BESCR: %016lx\n",
@@ -996,7 +996,22 @@ static void power_pmu_read(struct perf_event *event)
996 } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev); 996 } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
997 997
998 local64_add(delta, &event->count); 998 local64_add(delta, &event->count);
999 local64_sub(delta, &event->hw.period_left); 999
1000 /*
1001 * A number of places program the PMC with (0x80000000 - period_left).
1002 * We never want period_left to be less than 1 because we will program
1003 * the PMC with a value >= 0x800000000 and an edge detected PMC will
1004 * roll around to 0 before taking an exception. We have seen this
1005 * on POWER8.
1006 *
1007 * To fix this, clamp the minimum value of period_left to 1.
1008 */
1009 do {
1010 prev = local64_read(&event->hw.period_left);
1011 val = prev - delta;
1012 if (val < 1)
1013 val = 1;
1014 } while (local64_cmpxchg(&event->hw.period_left, prev, val) != prev);
1000} 1015}
1001 1016
1002/* 1017/*
@@ -1300,6 +1315,9 @@ static void power_pmu_enable(struct pmu *pmu)
1300 1315
1301 write_mmcr0(cpuhw, mmcr0); 1316 write_mmcr0(cpuhw, mmcr0);
1302 1317
1318 if (ppmu->flags & PPMU_ARCH_207S)
1319 mtspr(SPRN_MMCR2, 0);
1320
1303 /* 1321 /*
1304 * Enable instruction sampling if necessary 1322 * Enable instruction sampling if necessary
1305 */ 1323 */
@@ -1696,7 +1714,7 @@ static int power_pmu_event_init(struct perf_event *event)
1696 1714
1697 if (has_branch_stack(event)) { 1715 if (has_branch_stack(event)) {
1698 /* PMU has BHRB enabled */ 1716 /* PMU has BHRB enabled */
1699 if (!(ppmu->flags & PPMU_BHRB)) 1717 if (!(ppmu->flags & PPMU_ARCH_207S))
1700 return -EOPNOTSUPP; 1718 return -EOPNOTSUPP;
1701 } 1719 }
1702 1720
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index fe2763b6e039..639cd9156585 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -792,7 +792,7 @@ static struct power_pmu power8_pmu = {
792 .get_constraint = power8_get_constraint, 792 .get_constraint = power8_get_constraint,
793 .get_alternatives = power8_get_alternatives, 793 .get_alternatives = power8_get_alternatives,
794 .disable_pmc = power8_disable_pmc, 794 .disable_pmc = power8_disable_pmc,
795 .flags = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_BHRB | PPMU_EBB, 795 .flags = PPMU_HAS_SSLOT | PPMU_HAS_SIER | PPMU_ARCH_207S,
796 .n_generic = ARRAY_SIZE(power8_generic_events), 796 .n_generic = ARRAY_SIZE(power8_generic_events),
797 .generic_events = power8_generic_events, 797 .generic_events = power8_generic_events,
798 .cache_events = &power8_cache_events, 798 .cache_events = &power8_cache_events,
diff --git a/arch/powerpc/platforms/cell/cbe_thermal.c b/arch/powerpc/platforms/cell/cbe_thermal.c
index 94560db788bf..2c15ff094483 100644
--- a/arch/powerpc/platforms/cell/cbe_thermal.c
+++ b/arch/powerpc/platforms/cell/cbe_thermal.c
@@ -125,7 +125,7 @@ static ssize_t show_throttle(struct cbe_pmd_regs __iomem *pmd_regs, char *buf, i
125static ssize_t store_throttle(struct cbe_pmd_regs __iomem *pmd_regs, const char *buf, size_t size, int pos) 125static ssize_t store_throttle(struct cbe_pmd_regs __iomem *pmd_regs, const char *buf, size_t size, int pos)
126{ 126{
127 u64 reg_value; 127 u64 reg_value;
128 int temp; 128 unsigned int temp;
129 u64 new_value; 129 u64 new_value;
130 int ret; 130 int ret;
131 131
diff --git a/arch/powerpc/platforms/cell/spu_syscalls.c b/arch/powerpc/platforms/cell/spu_syscalls.c
index 38e0a1a5cec3..5e6e0bad6db6 100644
--- a/arch/powerpc/platforms/cell/spu_syscalls.c
+++ b/arch/powerpc/platforms/cell/spu_syscalls.c
@@ -111,6 +111,7 @@ asmlinkage long sys_spu_run(int fd, __u32 __user *unpc, __u32 __user *ustatus)
111 return ret; 111 return ret;
112} 112}
113 113
114#ifdef CONFIG_COREDUMP
114int elf_coredump_extra_notes_size(void) 115int elf_coredump_extra_notes_size(void)
115{ 116{
116 struct spufs_calls *calls; 117 struct spufs_calls *calls;
@@ -142,6 +143,7 @@ int elf_coredump_extra_notes_write(struct coredump_params *cprm)
142 143
143 return ret; 144 return ret;
144} 145}
146#endif
145 147
146void notify_spus_active(void) 148void notify_spus_active(void)
147{ 149{
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile
index b9d5d678aa44..52a7d2596d30 100644
--- a/arch/powerpc/platforms/cell/spufs/Makefile
+++ b/arch/powerpc/platforms/cell/spufs/Makefile
@@ -1,8 +1,9 @@
1 1
2obj-$(CONFIG_SPU_FS) += spufs.o 2obj-$(CONFIG_SPU_FS) += spufs.o
3spufs-y += inode.o file.o context.o syscalls.o coredump.o 3spufs-y += inode.o file.o context.o syscalls.o
4spufs-y += sched.o backing_ops.o hw_ops.o run.o gang.o 4spufs-y += sched.o backing_ops.o hw_ops.o run.o gang.o
5spufs-y += switch.o fault.o lscsa_alloc.o 5spufs-y += switch.o fault.o lscsa_alloc.o
6spufs-$(CONFIG_COREDUMP) += coredump.o
6 7
7# magic for the trace events 8# magic for the trace events
8CFLAGS_sched.o := -I$(src) 9CFLAGS_sched.o := -I$(src)
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index b045fdda4845..a87200a535fa 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -79,8 +79,10 @@ static long do_spu_create(const char __user *pathname, unsigned int flags,
79struct spufs_calls spufs_calls = { 79struct spufs_calls spufs_calls = {
80 .create_thread = do_spu_create, 80 .create_thread = do_spu_create,
81 .spu_run = do_spu_run, 81 .spu_run = do_spu_run,
82 .coredump_extra_notes_size = spufs_coredump_extra_notes_size,
83 .coredump_extra_notes_write = spufs_coredump_extra_notes_write,
84 .notify_spus_active = do_notify_spus_active, 82 .notify_spus_active = do_notify_spus_active,
85 .owner = THIS_MODULE, 83 .owner = THIS_MODULE,
84#ifdef CONFIG_COREDUMP
85 .coredump_extra_notes_size = spufs_coredump_extra_notes_size,
86 .coredump_extra_notes_write = spufs_coredump_extra_notes_write,
87#endif
86}; 88};
diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile
index d55891f89a2c..4ad227d04c1a 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,4 +1,4 @@
1obj-y += setup.o opal-takeover.o opal-wrappers.o opal.o opal-async.o 1obj-y += setup.o opal-wrappers.o opal.o opal-async.o
2obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o 2obj-y += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
3obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o 3obj-y += rng.o opal-elog.o opal-dump.o opal-sysparam.o opal-sensor.o
4obj-y += opal-msglog.o 4obj-y += opal-msglog.o
diff --git a/arch/powerpc/platforms/powernv/opal-takeover.S b/arch/powerpc/platforms/powernv/opal-takeover.S
deleted file mode 100644
index 11a3169ee583..000000000000
--- a/arch/powerpc/platforms/powernv/opal-takeover.S
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * PowerNV OPAL takeover assembly code, for use by prom_init.c
3 *
4 * Copyright 2011 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <asm/ppc_asm.h>
13#include <asm/hvcall.h>
14#include <asm/asm-offsets.h>
15#include <asm/opal.h>
16
17#define H_HAL_TAKEOVER 0x5124
18#define H_HAL_TAKEOVER_QUERY_MAGIC -1
19
20 .text
21_GLOBAL(opal_query_takeover)
22 mfcr r0
23 stw r0,8(r1)
24 stdu r1,-STACKFRAMESIZE(r1)
25 std r3,STK_PARAM(R3)(r1)
26 std r4,STK_PARAM(R4)(r1)
27 li r3,H_HAL_TAKEOVER
28 li r4,H_HAL_TAKEOVER_QUERY_MAGIC
29 HVSC
30 addi r1,r1,STACKFRAMESIZE
31 ld r10,STK_PARAM(R3)(r1)
32 std r4,0(r10)
33 ld r10,STK_PARAM(R4)(r1)
34 std r5,0(r10)
35 lwz r0,8(r1)
36 mtcrf 0xff,r0
37 blr
38
39_GLOBAL(opal_do_takeover)
40 mfcr r0
41 stw r0,8(r1)
42 mflr r0
43 std r0,16(r1)
44 bl __opal_do_takeover
45 ld r0,16(r1)
46 mtlr r0
47 lwz r0,8(r1)
48 mtcrf 0xff,r0
49 blr
50
51__opal_do_takeover:
52 ld r4,0(r3)
53 ld r5,0x8(r3)
54 ld r6,0x10(r3)
55 ld r7,0x18(r3)
56 ld r8,0x20(r3)
57 ld r9,0x28(r3)
58 ld r10,0x30(r3)
59 ld r11,0x38(r3)
60 li r3,H_HAL_TAKEOVER
61 HVSC
62 blr
63
64 .globl opal_secondary_entry
65opal_secondary_entry:
66 mr r31,r3
67 mfmsr r11
68 li r12,(MSR_SF | MSR_ISF)@highest
69 sldi r12,r12,48
70 or r11,r11,r12
71 mtmsrd r11
72 isync
73 mfspr r4,SPRN_PIR
74 std r4,0(r3)
751: HMT_LOW
76 ld r4,8(r3)
77 cmpli cr0,r4,0
78 beq 1b
79 HMT_MEDIUM
801: addi r3,r31,16
81 bl __opal_do_takeover
82 b 1b
83
84_GLOBAL(opal_enter_rtas)
85 mflr r0
86 std r0,16(r1)
87 stdu r1,-PROM_FRAME_SIZE(r1) /* Save SP and create stack space */
88
89 /* Because PROM is running in 32b mode, it clobbers the high order half
90 * of all registers that it saves. We therefore save those registers
91 * PROM might touch to the stack. (r0, r3-r13 are caller saved)
92 */
93 SAVE_GPR(2, r1)
94 SAVE_GPR(13, r1)
95 SAVE_8GPRS(14, r1)
96 SAVE_10GPRS(22, r1)
97 mfcr r10
98 mfmsr r11
99 std r10,_CCR(r1)
100 std r11,_MSR(r1)
101
102 /* Get the PROM entrypoint */
103 mtlr r5
104
105 /* Switch MSR to 32 bits mode
106 */
107 li r12,1
108 rldicr r12,r12,MSR_SF_LG,(63-MSR_SF_LG)
109 andc r11,r11,r12
110 li r12,1
111 rldicr r12,r12,MSR_ISF_LG,(63-MSR_ISF_LG)
112 andc r11,r11,r12
113 mtmsrd r11
114 isync
115
116 /* Enter RTAS here... */
117 blrl
118
119 /* Just make sure that r1 top 32 bits didn't get
120 * corrupt by OF
121 */
122 rldicl r1,r1,0,32
123
124 /* Restore the MSR (back to 64 bits) */
125 ld r0,_MSR(r1)
126 MTMSRD(r0)
127 isync
128
129 /* Restore other registers */
130 REST_GPR(2, r1)
131 REST_GPR(13, r1)
132 REST_8GPRS(14, r1)
133 REST_10GPRS(22, r1)
134 ld r4,_CCR(r1)
135 mtcr r4
136
137 addi r1,r1,PROM_FRAME_SIZE
138 ld r0,16(r1)
139 mtlr r0
140 blr
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 62c47bb76517..9e5353ff6d1b 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -476,6 +476,11 @@ void __init alloc_dart_table(void)
476 */ 476 */
477 dart_tablebase = (unsigned long) 477 dart_tablebase = (unsigned long)
478 __va(memblock_alloc_base(1UL<<24, 1UL<<24, 0x80000000L)); 478 __va(memblock_alloc_base(1UL<<24, 1UL<<24, 0x80000000L));
479 /*
480 * The DART space is later unmapped from the kernel linear mapping and
481 * accessing dart_tablebase during kmemleak scanning will fault.
482 */
483 kmemleak_no_scan((void *)dart_tablebase);
479 484
480 printk(KERN_INFO "DART table allocated at: %lx\n", dart_tablebase); 485 printk(KERN_INFO "DART table allocated at: %lx\n", dart_tablebase);
481} 486}
diff --git a/arch/s390/include/uapi/asm/Kbuild b/arch/s390/include/uapi/asm/Kbuild
index 6a9a9eb645f5..736637363d31 100644
--- a/arch/s390/include/uapi/asm/Kbuild
+++ b/arch/s390/include/uapi/asm/Kbuild
@@ -36,6 +36,7 @@ header-y += signal.h
36header-y += socket.h 36header-y += socket.h
37header-y += sockios.h 37header-y += sockios.h
38header-y += sclp_ctl.h 38header-y += sclp_ctl.h
39header-y += sie.h
39header-y += stat.h 40header-y += stat.h
40header-y += statfs.h 41header-y += statfs.h
41header-y += swab.h 42header-y += swab.h
diff --git a/arch/s390/include/uapi/asm/sie.h b/arch/s390/include/uapi/asm/sie.h
index 3d97f610198d..5d9cc19462c4 100644
--- a/arch/s390/include/uapi/asm/sie.h
+++ b/arch/s390/include/uapi/asm/sie.h
@@ -1,8 +1,6 @@
1#ifndef _UAPI_ASM_S390_SIE_H 1#ifndef _UAPI_ASM_S390_SIE_H
2#define _UAPI_ASM_S390_SIE_H 2#define _UAPI_ASM_S390_SIE_H
3 3
4#include <asm/sigp.h>
5
6#define diagnose_codes \ 4#define diagnose_codes \
7 { 0x10, "DIAG (0x10) release pages" }, \ 5 { 0x10, "DIAG (0x10) release pages" }, \
8 { 0x44, "DIAG (0x44) time slice end" }, \ 6 { 0x44, "DIAG (0x44) time slice end" }, \
@@ -13,18 +11,18 @@
13 { 0x500, "DIAG (0x500) KVM virtio functions" }, \ 11 { 0x500, "DIAG (0x500) KVM virtio functions" }, \
14 { 0x501, "DIAG (0x501) KVM breakpoint" } 12 { 0x501, "DIAG (0x501) KVM breakpoint" }
15 13
16#define sigp_order_codes \ 14#define sigp_order_codes \
17 { SIGP_SENSE, "SIGP sense" }, \ 15 { 0x01, "SIGP sense" }, \
18 { SIGP_EXTERNAL_CALL, "SIGP external call" }, \ 16 { 0x02, "SIGP external call" }, \
19 { SIGP_EMERGENCY_SIGNAL, "SIGP emergency signal" }, \ 17 { 0x03, "SIGP emergency signal" }, \
20 { SIGP_STOP, "SIGP stop" }, \ 18 { 0x05, "SIGP stop" }, \
21 { SIGP_STOP_AND_STORE_STATUS, "SIGP stop and store status" }, \ 19 { 0x06, "SIGP restart" }, \
22 { SIGP_SET_ARCHITECTURE, "SIGP set architecture" }, \ 20 { 0x09, "SIGP stop and store status" }, \
23 { SIGP_SET_PREFIX, "SIGP set prefix" }, \ 21 { 0x0b, "SIGP initial cpu reset" }, \
24 { SIGP_SENSE_RUNNING, "SIGP sense running" }, \ 22 { 0x0d, "SIGP set prefix" }, \
25 { SIGP_RESTART, "SIGP restart" }, \ 23 { 0x0e, "SIGP store status at address" }, \
26 { SIGP_INITIAL_CPU_RESET, "SIGP initial cpu reset" }, \ 24 { 0x12, "SIGP set architecture" }, \
27 { SIGP_STORE_STATUS_AT_ADDRESS, "SIGP store status at address" } 25 { 0x15, "SIGP sense running" }
28 26
29#define icpt_prog_codes \ 27#define icpt_prog_codes \
30 { 0x0001, "Prog Operation" }, \ 28 { 0x0001, "Prog Operation" }, \
diff --git a/arch/sparc/include/asm/irq_64.h b/arch/sparc/include/asm/irq_64.h
index 375cffcf7dbd..91d219381306 100644
--- a/arch/sparc/include/asm/irq_64.h
+++ b/arch/sparc/include/asm/irq_64.h
@@ -89,7 +89,7 @@ static inline unsigned long get_softint(void)
89 return retval; 89 return retval;
90} 90}
91 91
92void arch_trigger_all_cpu_backtrace(void); 92void arch_trigger_all_cpu_backtrace(bool);
93#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace 93#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
94 94
95extern void *hardirq_stack[NR_CPUS]; 95extern void *hardirq_stack[NR_CPUS];
diff --git a/arch/sparc/kernel/process_64.c b/arch/sparc/kernel/process_64.c
index b2988f25e230..027e09986194 100644
--- a/arch/sparc/kernel/process_64.c
+++ b/arch/sparc/kernel/process_64.c
@@ -239,7 +239,7 @@ static void __global_reg_poll(struct global_reg_snapshot *gp)
239 } 239 }
240} 240}
241 241
242void arch_trigger_all_cpu_backtrace(void) 242void arch_trigger_all_cpu_backtrace(bool include_self)
243{ 243{
244 struct thread_info *tp = current_thread_info(); 244 struct thread_info *tp = current_thread_info();
245 struct pt_regs *regs = get_irq_regs(); 245 struct pt_regs *regs = get_irq_regs();
@@ -251,16 +251,22 @@ void arch_trigger_all_cpu_backtrace(void)
251 251
252 spin_lock_irqsave(&global_cpu_snapshot_lock, flags); 252 spin_lock_irqsave(&global_cpu_snapshot_lock, flags);
253 253
254 memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot));
255
256 this_cpu = raw_smp_processor_id(); 254 this_cpu = raw_smp_processor_id();
257 255
258 __global_reg_self(tp, regs, this_cpu); 256 memset(global_cpu_snapshot, 0, sizeof(global_cpu_snapshot));
257
258 if (include_self)
259 __global_reg_self(tp, regs, this_cpu);
259 260
260 smp_fetch_global_regs(); 261 smp_fetch_global_regs();
261 262
262 for_each_online_cpu(cpu) { 263 for_each_online_cpu(cpu) {
263 struct global_reg_snapshot *gp = &global_cpu_snapshot[cpu].reg; 264 struct global_reg_snapshot *gp;
265
266 if (!include_self && cpu == this_cpu)
267 continue;
268
269 gp = &global_cpu_snapshot[cpu].reg;
264 270
265 __global_reg_poll(gp); 271 __global_reg_poll(gp);
266 272
@@ -292,7 +298,7 @@ void arch_trigger_all_cpu_backtrace(void)
292 298
293static void sysrq_handle_globreg(int key) 299static void sysrq_handle_globreg(int key)
294{ 300{
295 arch_trigger_all_cpu_backtrace(); 301 arch_trigger_all_cpu_backtrace(true);
296} 302}
297 303
298static struct sysrq_key_op sparc_globalreg_op = { 304static struct sysrq_key_op sparc_globalreg_op = {
diff --git a/arch/x86/crypto/sha512_ssse3_glue.c b/arch/x86/crypto/sha512_ssse3_glue.c
index f30cd10293f0..8626b03e83b7 100644
--- a/arch/x86/crypto/sha512_ssse3_glue.c
+++ b/arch/x86/crypto/sha512_ssse3_glue.c
@@ -141,7 +141,7 @@ static int sha512_ssse3_final(struct shash_desc *desc, u8 *out)
141 141
142 /* save number of bits */ 142 /* save number of bits */
143 bits[1] = cpu_to_be64(sctx->count[0] << 3); 143 bits[1] = cpu_to_be64(sctx->count[0] << 3);
144 bits[0] = cpu_to_be64(sctx->count[1] << 3) | sctx->count[0] >> 61; 144 bits[0] = cpu_to_be64(sctx->count[1] << 3 | sctx->count[0] >> 61);
145 145
146 /* Pad out to 112 mod 128 and append length */ 146 /* Pad out to 112 mod 128 and append length */
147 index = sctx->count[0] & 0x7f; 147 index = sctx->count[0] & 0x7f;
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index cb6cfcd034cf..a80cbb88ea91 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -43,7 +43,7 @@ extern int vector_used_by_percpu_irq(unsigned int vector);
43extern void init_ISA_irqs(void); 43extern void init_ISA_irqs(void);
44 44
45#ifdef CONFIG_X86_LOCAL_APIC 45#ifdef CONFIG_X86_LOCAL_APIC
46void arch_trigger_all_cpu_backtrace(void); 46void arch_trigger_all_cpu_backtrace(bool);
47#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace 47#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace
48#endif 48#endif
49 49
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 49314155b66c..49205d01b9ad 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -95,7 +95,7 @@ static inline gfn_t gfn_to_index(gfn_t gfn, gfn_t base_gfn, int level)
95#define KVM_REFILL_PAGES 25 95#define KVM_REFILL_PAGES 25
96#define KVM_MAX_CPUID_ENTRIES 80 96#define KVM_MAX_CPUID_ENTRIES 80
97#define KVM_NR_FIXED_MTRR_REGION 88 97#define KVM_NR_FIXED_MTRR_REGION 88
98#define KVM_NR_VAR_MTRR 8 98#define KVM_NR_VAR_MTRR 10
99 99
100#define ASYNC_PF_PER_VCPU 64 100#define ASYNC_PF_PER_VCPU 64
101 101
@@ -461,7 +461,7 @@ struct kvm_vcpu_arch {
461 bool nmi_injected; /* Trying to inject an NMI this entry */ 461 bool nmi_injected; /* Trying to inject an NMI this entry */
462 462
463 struct mtrr_state_type mtrr_state; 463 struct mtrr_state_type mtrr_state;
464 u32 pat; 464 u64 pat;
465 465
466 unsigned switch_db_regs; 466 unsigned switch_db_regs;
467 unsigned long db[KVM_NR_DB_REGS]; 467 unsigned long db[KVM_NR_DB_REGS];
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h
index 14fd6fd75a19..6205f0c434db 100644
--- a/arch/x86/include/asm/ptrace.h
+++ b/arch/x86/include/asm/ptrace.h
@@ -231,6 +231,22 @@ static inline unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,
231 231
232#define ARCH_HAS_USER_SINGLE_STEP_INFO 232#define ARCH_HAS_USER_SINGLE_STEP_INFO
233 233
234/*
235 * When hitting ptrace_stop(), we cannot return using SYSRET because
236 * that does not restore the full CPU state, only a minimal set. The
237 * ptracer can change arbitrary register values, which is usually okay
238 * because the usual ptrace stops run off the signal delivery path which
239 * forces IRET; however, ptrace_event() stops happen in arbitrary places
240 * in the kernel and don't force IRET path.
241 *
242 * So force IRET path after a ptrace stop.
243 */
244#define arch_ptrace_stop_needed(code, info) \
245({ \
246 set_thread_flag(TIF_NOTIFY_RESUME); \
247 false; \
248})
249
234struct user_desc; 250struct user_desc;
235extern int do_get_thread_area(struct task_struct *p, int idx, 251extern int do_get_thread_area(struct task_struct *p, int idx,
236 struct user_desc __user *info); 252 struct user_desc __user *info);
diff --git a/arch/x86/kernel/apic/hw_nmi.c b/arch/x86/kernel/apic/hw_nmi.c
index c3fcb5de5083..6a1e71bde323 100644
--- a/arch/x86/kernel/apic/hw_nmi.c
+++ b/arch/x86/kernel/apic/hw_nmi.c
@@ -33,31 +33,41 @@ static DECLARE_BITMAP(backtrace_mask, NR_CPUS) __read_mostly;
33/* "in progress" flag of arch_trigger_all_cpu_backtrace */ 33/* "in progress" flag of arch_trigger_all_cpu_backtrace */
34static unsigned long backtrace_flag; 34static unsigned long backtrace_flag;
35 35
36void arch_trigger_all_cpu_backtrace(void) 36void arch_trigger_all_cpu_backtrace(bool include_self)
37{ 37{
38 int i; 38 int i;
39 int cpu = get_cpu();
39 40
40 if (test_and_set_bit(0, &backtrace_flag)) 41 if (test_and_set_bit(0, &backtrace_flag)) {
41 /* 42 /*
42 * If there is already a trigger_all_cpu_backtrace() in progress 43 * If there is already a trigger_all_cpu_backtrace() in progress
43 * (backtrace_flag == 1), don't output double cpu dump infos. 44 * (backtrace_flag == 1), don't output double cpu dump infos.
44 */ 45 */
46 put_cpu();
45 return; 47 return;
48 }
46 49
47 cpumask_copy(to_cpumask(backtrace_mask), cpu_online_mask); 50 cpumask_copy(to_cpumask(backtrace_mask), cpu_online_mask);
51 if (!include_self)
52 cpumask_clear_cpu(cpu, to_cpumask(backtrace_mask));
48 53
49 printk(KERN_INFO "sending NMI to all CPUs:\n"); 54 if (!cpumask_empty(to_cpumask(backtrace_mask))) {
50 apic->send_IPI_all(NMI_VECTOR); 55 pr_info("sending NMI to %s CPUs:\n",
56 (include_self ? "all" : "other"));
57 apic->send_IPI_mask(to_cpumask(backtrace_mask), NMI_VECTOR);
58 }
51 59
52 /* Wait for up to 10 seconds for all CPUs to do the backtrace */ 60 /* Wait for up to 10 seconds for all CPUs to do the backtrace */
53 for (i = 0; i < 10 * 1000; i++) { 61 for (i = 0; i < 10 * 1000; i++) {
54 if (cpumask_empty(to_cpumask(backtrace_mask))) 62 if (cpumask_empty(to_cpumask(backtrace_mask)))
55 break; 63 break;
56 mdelay(1); 64 mdelay(1);
65 touch_softlockup_watchdog();
57 } 66 }
58 67
59 clear_bit(0, &backtrace_flag); 68 clear_bit(0, &backtrace_flag);
60 smp_mb__after_atomic(); 69 smp_mb__after_atomic();
70 put_cpu();
61} 71}
62 72
63static int 73static int
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index f0da82b8e634..dbaa23e78b36 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -423,9 +423,10 @@ sysenter_past_esp:
423 jnz sysenter_audit 423 jnz sysenter_audit
424sysenter_do_call: 424sysenter_do_call:
425 cmpl $(NR_syscalls), %eax 425 cmpl $(NR_syscalls), %eax
426 jae syscall_badsys 426 jae sysenter_badsys
427 call *sys_call_table(,%eax,4) 427 call *sys_call_table(,%eax,4)
428 movl %eax,PT_EAX(%esp) 428 movl %eax,PT_EAX(%esp)
429sysenter_after_call:
429 LOCKDEP_SYS_EXIT 430 LOCKDEP_SYS_EXIT
430 DISABLE_INTERRUPTS(CLBR_ANY) 431 DISABLE_INTERRUPTS(CLBR_ANY)
431 TRACE_IRQS_OFF 432 TRACE_IRQS_OFF
@@ -675,7 +676,12 @@ END(syscall_fault)
675 676
676syscall_badsys: 677syscall_badsys:
677 movl $-ENOSYS,PT_EAX(%esp) 678 movl $-ENOSYS,PT_EAX(%esp)
678 jmp resume_userspace 679 jmp syscall_exit
680END(syscall_badsys)
681
682sysenter_badsys:
683 movl $-ENOSYS,PT_EAX(%esp)
684 jmp sysenter_after_call
679END(syscall_badsys) 685END(syscall_badsys)
680 CFI_ENDPROC 686 CFI_ENDPROC
681 687
diff --git a/arch/x86/kernel/signal.c b/arch/x86/kernel/signal.c
index a0da58db43a8..2851d63c1202 100644
--- a/arch/x86/kernel/signal.c
+++ b/arch/x86/kernel/signal.c
@@ -363,7 +363,7 @@ static int __setup_rt_frame(int sig, struct ksignal *ksig,
363 363
364 /* Set up to return from userspace. */ 364 /* Set up to return from userspace. */
365 restorer = current->mm->context.vdso + 365 restorer = current->mm->context.vdso +
366 selected_vdso32->sym___kernel_sigreturn; 366 selected_vdso32->sym___kernel_rt_sigreturn;
367 if (ksig->ka.sa.sa_flags & SA_RESTORER) 367 if (ksig->ka.sa.sa_flags & SA_RESTORER)
368 restorer = ksig->ka.sa.sa_restorer; 368 restorer = ksig->ka.sa.sa_restorer;
369 put_user_ex(restorer, &frame->pretcode); 369 put_user_ex(restorer, &frame->pretcode);
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index ec8366c5cfea..b5e994ad0135 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1462,6 +1462,7 @@ static void svm_get_segment(struct kvm_vcpu *vcpu,
1462 */ 1462 */
1463 if (var->unusable) 1463 if (var->unusable)
1464 var->db = 0; 1464 var->db = 0;
1465 var->dpl = to_svm(vcpu)->vmcb->save.cpl;
1465 break; 1466 break;
1466 } 1467 }
1467} 1468}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index f32a02578c0d..f6449334ec45 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -1898,7 +1898,7 @@ static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1898 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE)) 1898 if (!(data & HV_X64_MSR_TSC_REFERENCE_ENABLE))
1899 break; 1899 break;
1900 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT; 1900 gfn = data >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
1901 if (kvm_write_guest(kvm, data, 1901 if (kvm_write_guest(kvm, gfn << HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT,
1902 &tsc_ref, sizeof(tsc_ref))) 1902 &tsc_ref, sizeof(tsc_ref)))
1903 return 1; 1903 return 1;
1904 mark_page_dirty(kvm, gfn); 1904 mark_page_dirty(kvm, gfn);
diff --git a/arch/x86/vdso/Makefile b/arch/x86/vdso/Makefile
index 3c0809a0631f..61b04fe36e66 100644
--- a/arch/x86/vdso/Makefile
+++ b/arch/x86/vdso/Makefile
@@ -11,7 +11,6 @@ VDSO32-$(CONFIG_COMPAT) := y
11 11
12# files to link into the vdso 12# files to link into the vdso
13vobjs-y := vdso-note.o vclock_gettime.o vgetcpu.o vdso-fakesections.o 13vobjs-y := vdso-note.o vclock_gettime.o vgetcpu.o vdso-fakesections.o
14vobjs-nox32 := vdso-fakesections.o
15 14
16# files to link into kernel 15# files to link into kernel
17obj-y += vma.o 16obj-y += vma.o
@@ -67,7 +66,8 @@ $(obj)/vdso-image-%.c: $(obj)/vdso%.so.dbg $(obj)/vdso2c FORCE
67# 66#
68CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \ 67CFL := $(PROFILING) -mcmodel=small -fPIC -O2 -fasynchronous-unwind-tables -m64 \
69 $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector) \ 68 $(filter -g%,$(KBUILD_CFLAGS)) $(call cc-option, -fno-stack-protector) \
70 -fno-omit-frame-pointer -foptimize-sibling-calls 69 -fno-omit-frame-pointer -foptimize-sibling-calls \
70 -DDISABLE_BRANCH_PROFILING
71 71
72$(vobjs): KBUILD_CFLAGS += $(CFL) 72$(vobjs): KBUILD_CFLAGS += $(CFL)
73 73
@@ -134,7 +134,7 @@ override obj-dirs = $(dir $(obj)) $(obj)/vdso32/
134 134
135targets += vdso32/vdso32.lds 135targets += vdso32/vdso32.lds
136targets += vdso32/note.o vdso32/vclock_gettime.o $(vdso32.so-y:%=vdso32/%.o) 136targets += vdso32/note.o vdso32/vclock_gettime.o $(vdso32.so-y:%=vdso32/%.o)
137targets += vdso32/vclock_gettime.o 137targets += vdso32/vclock_gettime.o vdso32/vdso-fakesections.o
138 138
139$(obj)/vdso32.o: $(vdso32-images:%=$(obj)/%) 139$(obj)/vdso32.o: $(vdso32-images:%=$(obj)/%)
140 140
@@ -150,11 +150,13 @@ KBUILD_CFLAGS_32 += -m32 -msoft-float -mregparm=0 -fpic
150KBUILD_CFLAGS_32 += $(call cc-option, -fno-stack-protector) 150KBUILD_CFLAGS_32 += $(call cc-option, -fno-stack-protector)
151KBUILD_CFLAGS_32 += $(call cc-option, -foptimize-sibling-calls) 151KBUILD_CFLAGS_32 += $(call cc-option, -foptimize-sibling-calls)
152KBUILD_CFLAGS_32 += -fno-omit-frame-pointer 152KBUILD_CFLAGS_32 += -fno-omit-frame-pointer
153KBUILD_CFLAGS_32 += -DDISABLE_BRANCH_PROFILING
153$(vdso32-images:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_32) 154$(vdso32-images:%=$(obj)/%.dbg): KBUILD_CFLAGS = $(KBUILD_CFLAGS_32)
154 155
155$(vdso32-images:%=$(obj)/%.dbg): $(obj)/vdso32-%.so.dbg: FORCE \ 156$(vdso32-images:%=$(obj)/%.dbg): $(obj)/vdso32-%.so.dbg: FORCE \
156 $(obj)/vdso32/vdso32.lds \ 157 $(obj)/vdso32/vdso32.lds \
157 $(obj)/vdso32/vclock_gettime.o \ 158 $(obj)/vdso32/vclock_gettime.o \
159 $(obj)/vdso32/vdso-fakesections.o \
158 $(obj)/vdso32/note.o \ 160 $(obj)/vdso32/note.o \
159 $(obj)/vdso32/%.o 161 $(obj)/vdso32/%.o
160 $(call if_changed,vdso) 162 $(call if_changed,vdso)
@@ -169,14 +171,24 @@ quiet_cmd_vdso = VDSO $@
169 sh $(srctree)/$(src)/checkundef.sh '$(NM)' '$@' 171 sh $(srctree)/$(src)/checkundef.sh '$(NM)' '$@'
170 172
171VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) \ 173VDSO_LDFLAGS = -fPIC -shared $(call cc-ldoption, -Wl$(comma)--hash-style=sysv) \
172 -Wl,-Bsymbolic $(LTO_CFLAGS) 174 $(call cc-ldoption, -Wl$(comma)--build-id) -Wl,-Bsymbolic $(LTO_CFLAGS)
173GCOV_PROFILE := n 175GCOV_PROFILE := n
174 176
175# 177#
176# Install the unstripped copies of vdso*.so. 178# Install the unstripped copies of vdso*.so. If our toolchain supports
179# build-id, install .build-id links as well.
177# 180#
178quiet_cmd_vdso_install = INSTALL $(@:install_%=%) 181quiet_cmd_vdso_install = INSTALL $(@:install_%=%)
179 cmd_vdso_install = cp $< $(MODLIB)/vdso/$(@:install_%=%) 182define cmd_vdso_install
183 cp $< "$(MODLIB)/vdso/$(@:install_%=%)"; \
184 if readelf -n $< |grep -q 'Build ID'; then \
185 buildid=`readelf -n $< |grep 'Build ID' |sed -e 's/^.*Build ID: \(.*\)$$/\1/'`; \
186 first=`echo $$buildid | cut -b-2`; \
187 last=`echo $$buildid | cut -b3-`; \
188 mkdir -p "$(MODLIB)/vdso/.build-id/$$first"; \
189 ln -sf "../../$(@:install_%=%)" "$(MODLIB)/vdso/.build-id/$$first/$$last.debug"; \
190 fi
191endef
180 192
181vdso_img_insttargets := $(vdso_img_sodbg:%.dbg=install_%) 193vdso_img_insttargets := $(vdso_img_sodbg:%.dbg=install_%)
182 194
diff --git a/arch/x86/vdso/vclock_gettime.c b/arch/x86/vdso/vclock_gettime.c
index b2e4f493e5b0..9793322751e0 100644
--- a/arch/x86/vdso/vclock_gettime.c
+++ b/arch/x86/vdso/vclock_gettime.c
@@ -11,9 +11,6 @@
11 * Check with readelf after changing. 11 * Check with readelf after changing.
12 */ 12 */
13 13
14/* Disable profiling for userspace code: */
15#define DISABLE_BRANCH_PROFILING
16
17#include <uapi/linux/time.h> 14#include <uapi/linux/time.h>
18#include <asm/vgtod.h> 15#include <asm/vgtod.h>
19#include <asm/hpet.h> 16#include <asm/hpet.h>
diff --git a/arch/x86/vdso/vdso-fakesections.c b/arch/x86/vdso/vdso-fakesections.c
index cb8a8d72c24b..aa5fbfab20a5 100644
--- a/arch/x86/vdso/vdso-fakesections.c
+++ b/arch/x86/vdso/vdso-fakesections.c
@@ -2,31 +2,20 @@
2 * Copyright 2014 Andy Lutomirski 2 * Copyright 2014 Andy Lutomirski
3 * Subject to the GNU Public License, v.2 3 * Subject to the GNU Public License, v.2
4 * 4 *
5 * Hack to keep broken Go programs working. 5 * String table for loadable section headers. See vdso2c.h for why
6 * 6 * this exists.
7 * The Go runtime had a couple of bugs: it would read the section table to try
8 * to figure out how many dynamic symbols there were (it shouldn't have looked
9 * at the section table at all) and, if there were no SHT_SYNDYM section table
10 * entry, it would use an uninitialized value for the number of symbols. As a
11 * workaround, we supply a minimal section table. vdso2c will adjust the
12 * in-memory image so that "vdso_fake_sections" becomes the section table.
13 *
14 * The bug was introduced by:
15 * https://code.google.com/p/go/source/detail?r=56ea40aac72b (2012-08-31)
16 * and is being addressed in the Go runtime in this issue:
17 * https://code.google.com/p/go/issues/detail?id=8197
18 */ 7 */
19 8
20#ifndef __x86_64__ 9const char fake_shstrtab[] __attribute__((section(".fake_shstrtab"))) =
21#error This hack is specific to the 64-bit vDSO 10 ".hash\0"
22#endif 11 ".dynsym\0"
23 12 ".dynstr\0"
24#include <linux/elf.h> 13 ".gnu.version\0"
25 14 ".gnu.version_d\0"
26extern const __visible struct elf64_shdr vdso_fake_sections[]; 15 ".dynamic\0"
27const __visible struct elf64_shdr vdso_fake_sections[] = { 16 ".rodata\0"
28 { 17 ".fake_shstrtab\0" /* Yay, self-referential code. */
29 .sh_type = SHT_DYNSYM, 18 ".note\0"
30 .sh_entsize = sizeof(Elf64_Sym), 19 ".eh_frame_hdr\0"
31 } 20 ".eh_frame\0"
32}; 21 ".text";
diff --git a/arch/x86/vdso/vdso-layout.lds.S b/arch/x86/vdso/vdso-layout.lds.S
index 2ec72f651ebf..9197544eea9a 100644
--- a/arch/x86/vdso/vdso-layout.lds.S
+++ b/arch/x86/vdso/vdso-layout.lds.S
@@ -6,6 +6,16 @@
6 * This script controls its layout. 6 * This script controls its layout.
7 */ 7 */
8 8
9#if defined(BUILD_VDSO64)
10# define SHDR_SIZE 64
11#elif defined(BUILD_VDSO32) || defined(BUILD_VDSOX32)
12# define SHDR_SIZE 40
13#else
14# error unknown VDSO target
15#endif
16
17#define NUM_FAKE_SHDRS 13
18
9SECTIONS 19SECTIONS
10{ 20{
11 . = SIZEOF_HEADERS; 21 . = SIZEOF_HEADERS;
@@ -18,36 +28,53 @@ SECTIONS
18 .gnu.version_d : { *(.gnu.version_d) } 28 .gnu.version_d : { *(.gnu.version_d) }
19 .gnu.version_r : { *(.gnu.version_r) } 29 .gnu.version_r : { *(.gnu.version_r) }
20 30
31 .dynamic : { *(.dynamic) } :text :dynamic
32
33 .rodata : {
34 *(.rodata*)
35 *(.data*)
36 *(.sdata*)
37 *(.got.plt) *(.got)
38 *(.gnu.linkonce.d.*)
39 *(.bss*)
40 *(.dynbss*)
41 *(.gnu.linkonce.b.*)
42
43 /*
44 * Ideally this would live in a C file, but that won't
45 * work cleanly for x32 until we start building the x32
46 * C code using an x32 toolchain.
47 */
48 VDSO_FAKE_SECTION_TABLE_START = .;
49 . = . + NUM_FAKE_SHDRS * SHDR_SIZE;
50 VDSO_FAKE_SECTION_TABLE_END = .;
51 } :text
52
53 .fake_shstrtab : { *(.fake_shstrtab) } :text
54
55
21 .note : { *(.note.*) } :text :note 56 .note : { *(.note.*) } :text :note
22 57
23 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr 58 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
24 .eh_frame : { KEEP (*(.eh_frame)) } :text 59 .eh_frame : { KEEP (*(.eh_frame)) } :text
25 60
26 .dynamic : { *(.dynamic) } :text :dynamic
27
28 .rodata : { *(.rodata*) } :text
29 .data : {
30 *(.data*)
31 *(.sdata*)
32 *(.got.plt) *(.got)
33 *(.gnu.linkonce.d.*)
34 *(.bss*)
35 *(.dynbss*)
36 *(.gnu.linkonce.b.*)
37 }
38
39 .altinstructions : { *(.altinstructions) }
40 .altinstr_replacement : { *(.altinstr_replacement) }
41 61
42 /* 62 /*
43 * Align the actual code well away from the non-instruction data. 63 * Text is well-separated from actual data: there's plenty of
44 * This is the best thing for the I-cache. 64 * stuff that isn't used at runtime in between.
45 */ 65 */
46 . = ALIGN(0x100);
47 66
48 .text : { *(.text*) } :text =0x90909090, 67 .text : { *(.text*) } :text =0x90909090,
49 68
50 /* 69 /*
70 * At the end so that eu-elflint stays happy when vdso2c strips
71 * these. A better implementation would avoid allocating space
72 * for these.
73 */
74 .altinstructions : { *(.altinstructions) } :text
75 .altinstr_replacement : { *(.altinstr_replacement) } :text
76
77 /*
51 * The remainder of the vDSO consists of special pages that are 78 * The remainder of the vDSO consists of special pages that are
52 * shared between the kernel and userspace. It needs to be at the 79 * shared between the kernel and userspace. It needs to be at the
53 * end so that it doesn't overlap the mapping of the actual 80 * end so that it doesn't overlap the mapping of the actual
@@ -75,6 +102,7 @@ SECTIONS
75 /DISCARD/ : { 102 /DISCARD/ : {
76 *(.discard) 103 *(.discard)
77 *(.discard.*) 104 *(.discard.*)
105 *(__bug_table)
78 } 106 }
79} 107}
80 108
diff --git a/arch/x86/vdso/vdso.lds.S b/arch/x86/vdso/vdso.lds.S
index 75e3404c83b1..6807932643c2 100644
--- a/arch/x86/vdso/vdso.lds.S
+++ b/arch/x86/vdso/vdso.lds.S
@@ -6,6 +6,8 @@
6 * the DSO. 6 * the DSO.
7 */ 7 */
8 8
9#define BUILD_VDSO64
10
9#include "vdso-layout.lds.S" 11#include "vdso-layout.lds.S"
10 12
11/* 13/*
diff --git a/arch/x86/vdso/vdso2c.c b/arch/x86/vdso/vdso2c.c
index 7a6bf50f9165..238dbe82776e 100644
--- a/arch/x86/vdso/vdso2c.c
+++ b/arch/x86/vdso/vdso2c.c
@@ -23,6 +23,8 @@ enum {
23 sym_vvar_page, 23 sym_vvar_page,
24 sym_hpet_page, 24 sym_hpet_page,
25 sym_end_mapping, 25 sym_end_mapping,
26 sym_VDSO_FAKE_SECTION_TABLE_START,
27 sym_VDSO_FAKE_SECTION_TABLE_END,
26}; 28};
27 29
28const int special_pages[] = { 30const int special_pages[] = {
@@ -30,15 +32,26 @@ const int special_pages[] = {
30 sym_hpet_page, 32 sym_hpet_page,
31}; 33};
32 34
33char const * const required_syms[] = { 35struct vdso_sym {
34 [sym_vvar_page] = "vvar_page", 36 const char *name;
35 [sym_hpet_page] = "hpet_page", 37 bool export;
36 [sym_end_mapping] = "end_mapping", 38};
37 "VDSO32_NOTE_MASK", 39
38 "VDSO32_SYSENTER_RETURN", 40struct vdso_sym required_syms[] = {
39 "__kernel_vsyscall", 41 [sym_vvar_page] = {"vvar_page", true},
40 "__kernel_sigreturn", 42 [sym_hpet_page] = {"hpet_page", true},
41 "__kernel_rt_sigreturn", 43 [sym_end_mapping] = {"end_mapping", true},
44 [sym_VDSO_FAKE_SECTION_TABLE_START] = {
45 "VDSO_FAKE_SECTION_TABLE_START", false
46 },
47 [sym_VDSO_FAKE_SECTION_TABLE_END] = {
48 "VDSO_FAKE_SECTION_TABLE_END", false
49 },
50 {"VDSO32_NOTE_MASK", true},
51 {"VDSO32_SYSENTER_RETURN", true},
52 {"__kernel_vsyscall", true},
53 {"__kernel_sigreturn", true},
54 {"__kernel_rt_sigreturn", true},
42}; 55};
43 56
44__attribute__((format(printf, 1, 2))) __attribute__((noreturn)) 57__attribute__((format(printf, 1, 2))) __attribute__((noreturn))
@@ -83,37 +96,21 @@ extern void bad_put_le(void);
83 96
84#define NSYMS (sizeof(required_syms) / sizeof(required_syms[0])) 97#define NSYMS (sizeof(required_syms) / sizeof(required_syms[0]))
85 98
86#define BITS 64 99#define BITSFUNC3(name, bits) name##bits
87#define GOFUNC go64 100#define BITSFUNC2(name, bits) BITSFUNC3(name, bits)
88#define Elf_Ehdr Elf64_Ehdr 101#define BITSFUNC(name) BITSFUNC2(name, ELF_BITS)
89#define Elf_Shdr Elf64_Shdr 102
90#define Elf_Phdr Elf64_Phdr 103#define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x
91#define Elf_Sym Elf64_Sym 104#define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x)
92#define Elf_Dyn Elf64_Dyn 105#define ELF(x) ELF_BITS_XFORM(ELF_BITS, x)
106
107#define ELF_BITS 64
93#include "vdso2c.h" 108#include "vdso2c.h"
94#undef BITS 109#undef ELF_BITS
95#undef GOFUNC 110
96#undef Elf_Ehdr 111#define ELF_BITS 32
97#undef Elf_Shdr
98#undef Elf_Phdr
99#undef Elf_Sym
100#undef Elf_Dyn
101
102#define BITS 32
103#define GOFUNC go32
104#define Elf_Ehdr Elf32_Ehdr
105#define Elf_Shdr Elf32_Shdr
106#define Elf_Phdr Elf32_Phdr
107#define Elf_Sym Elf32_Sym
108#define Elf_Dyn Elf32_Dyn
109#include "vdso2c.h" 112#include "vdso2c.h"
110#undef BITS 113#undef ELF_BITS
111#undef GOFUNC
112#undef Elf_Ehdr
113#undef Elf_Shdr
114#undef Elf_Phdr
115#undef Elf_Sym
116#undef Elf_Dyn
117 114
118static void go(void *addr, size_t len, FILE *outfile, const char *name) 115static void go(void *addr, size_t len, FILE *outfile, const char *name)
119{ 116{
diff --git a/arch/x86/vdso/vdso2c.h b/arch/x86/vdso/vdso2c.h
index c6eefaf389b9..11b65d4f9414 100644
--- a/arch/x86/vdso/vdso2c.h
+++ b/arch/x86/vdso/vdso2c.h
@@ -4,23 +4,139 @@
4 * are built for 32-bit userspace. 4 * are built for 32-bit userspace.
5 */ 5 */
6 6
7static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name) 7/*
8 * We're writing a section table for a few reasons:
9 *
10 * The Go runtime had a couple of bugs: it would read the section
11 * table to try to figure out how many dynamic symbols there were (it
12 * shouldn't have looked at the section table at all) and, if there
13 * were no SHT_SYNDYM section table entry, it would use an
14 * uninitialized value for the number of symbols. An empty DYNSYM
15 * table would work, but I see no reason not to write a valid one (and
16 * keep full performance for old Go programs). This hack is only
17 * needed on x86_64.
18 *
19 * The bug was introduced on 2012-08-31 by:
20 * https://code.google.com/p/go/source/detail?r=56ea40aac72b
21 * and was fixed on 2014-06-13 by:
22 * https://code.google.com/p/go/source/detail?r=fc1cd5e12595
23 *
24 * Binutils has issues debugging the vDSO: it reads the section table to
25 * find SHT_NOTE; it won't look at PT_NOTE for the in-memory vDSO, which
26 * would break build-id if we removed the section table. Binutils
27 * also requires that shstrndx != 0. See:
28 * https://sourceware.org/bugzilla/show_bug.cgi?id=17064
29 *
30 * elfutils might not look for PT_NOTE if there is a section table at
31 * all. I don't know whether this matters for any practical purpose.
32 *
33 * For simplicity, rather than hacking up a partial section table, we
34 * just write a mostly complete one. We omit non-dynamic symbols,
35 * though, since they're rather large.
36 *
37 * Once binutils gets fixed, we might be able to drop this for all but
38 * the 64-bit vdso, since build-id only works in kernel RPMs, and
39 * systems that update to new enough kernel RPMs will likely update
40 * binutils in sync. build-id has never worked for home-built kernel
41 * RPMs without manual symlinking, and I suspect that no one ever does
42 * that.
43 */
44struct BITSFUNC(fake_sections)
45{
46 ELF(Shdr) *table;
47 unsigned long table_offset;
48 int count, max_count;
49
50 int in_shstrndx;
51 unsigned long shstr_offset;
52 const char *shstrtab;
53 size_t shstrtab_len;
54
55 int out_shstrndx;
56};
57
58static unsigned int BITSFUNC(find_shname)(struct BITSFUNC(fake_sections) *out,
59 const char *name)
60{
61 const char *outname = out->shstrtab;
62 while (outname - out->shstrtab < out->shstrtab_len) {
63 if (!strcmp(name, outname))
64 return (outname - out->shstrtab) + out->shstr_offset;
65 outname += strlen(outname) + 1;
66 }
67
68 if (*name)
69 printf("Warning: could not find output name \"%s\"\n", name);
70 return out->shstr_offset + out->shstrtab_len - 1; /* Use a null. */
71}
72
73static void BITSFUNC(init_sections)(struct BITSFUNC(fake_sections) *out)
74{
75 if (!out->in_shstrndx)
76 fail("didn't find the fake shstrndx\n");
77
78 memset(out->table, 0, out->max_count * sizeof(ELF(Shdr)));
79
80 if (out->max_count < 1)
81 fail("we need at least two fake output sections\n");
82
83 PUT_LE(&out->table[0].sh_type, SHT_NULL);
84 PUT_LE(&out->table[0].sh_name, BITSFUNC(find_shname)(out, ""));
85
86 out->count = 1;
87}
88
89static void BITSFUNC(copy_section)(struct BITSFUNC(fake_sections) *out,
90 int in_idx, const ELF(Shdr) *in,
91 const char *name)
92{
93 uint64_t flags = GET_LE(&in->sh_flags);
94
95 bool copy = flags & SHF_ALLOC &&
96 (GET_LE(&in->sh_size) ||
97 (GET_LE(&in->sh_type) != SHT_RELA &&
98 GET_LE(&in->sh_type) != SHT_REL)) &&
99 strcmp(name, ".altinstructions") &&
100 strcmp(name, ".altinstr_replacement");
101
102 if (!copy)
103 return;
104
105 if (out->count >= out->max_count)
106 fail("too many copied sections (max = %d)\n", out->max_count);
107
108 if (in_idx == out->in_shstrndx)
109 out->out_shstrndx = out->count;
110
111 out->table[out->count] = *in;
112 PUT_LE(&out->table[out->count].sh_name,
113 BITSFUNC(find_shname)(out, name));
114
115 /* elfutils requires that a strtab have the correct type. */
116 if (!strcmp(name, ".fake_shstrtab"))
117 PUT_LE(&out->table[out->count].sh_type, SHT_STRTAB);
118
119 out->count++;
120}
121
122static void BITSFUNC(go)(void *addr, size_t len,
123 FILE *outfile, const char *name)
8{ 124{
9 int found_load = 0; 125 int found_load = 0;
10 unsigned long load_size = -1; /* Work around bogus warning */ 126 unsigned long load_size = -1; /* Work around bogus warning */
11 unsigned long data_size; 127 unsigned long data_size;
12 Elf_Ehdr *hdr = (Elf_Ehdr *)addr; 128 ELF(Ehdr) *hdr = (ELF(Ehdr) *)addr;
13 int i; 129 int i;
14 unsigned long j; 130 unsigned long j;
15 Elf_Shdr *symtab_hdr = NULL, *strtab_hdr, *secstrings_hdr, 131 ELF(Shdr) *symtab_hdr = NULL, *strtab_hdr, *secstrings_hdr,
16 *alt_sec = NULL; 132 *alt_sec = NULL;
17 Elf_Dyn *dyn = 0, *dyn_end = 0; 133 ELF(Dyn) *dyn = 0, *dyn_end = 0;
18 const char *secstrings; 134 const char *secstrings;
19 uint64_t syms[NSYMS] = {}; 135 uint64_t syms[NSYMS] = {};
20 136
21 uint64_t fake_sections_value = 0, fake_sections_size = 0; 137 struct BITSFUNC(fake_sections) fake_sections = {};
22 138
23 Elf_Phdr *pt = (Elf_Phdr *)(addr + GET_LE(&hdr->e_phoff)); 139 ELF(Phdr) *pt = (ELF(Phdr) *)(addr + GET_LE(&hdr->e_phoff));
24 140
25 /* Walk the segment table. */ 141 /* Walk the segment table. */
26 for (i = 0; i < GET_LE(&hdr->e_phnum); i++) { 142 for (i = 0; i < GET_LE(&hdr->e_phnum); i++) {
@@ -51,7 +167,7 @@ static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name)
51 for (i = 0; dyn + i < dyn_end && 167 for (i = 0; dyn + i < dyn_end &&
52 GET_LE(&dyn[i].d_tag) != DT_NULL; i++) { 168 GET_LE(&dyn[i].d_tag) != DT_NULL; i++) {
53 typeof(dyn[i].d_tag) tag = GET_LE(&dyn[i].d_tag); 169 typeof(dyn[i].d_tag) tag = GET_LE(&dyn[i].d_tag);
54 if (tag == DT_REL || tag == DT_RELSZ || 170 if (tag == DT_REL || tag == DT_RELSZ || tag == DT_RELA ||
55 tag == DT_RELENT || tag == DT_TEXTREL) 171 tag == DT_RELENT || tag == DT_TEXTREL)
56 fail("vdso image contains dynamic relocations\n"); 172 fail("vdso image contains dynamic relocations\n");
57 } 173 }
@@ -61,7 +177,7 @@ static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name)
61 GET_LE(&hdr->e_shentsize)*GET_LE(&hdr->e_shstrndx); 177 GET_LE(&hdr->e_shentsize)*GET_LE(&hdr->e_shstrndx);
62 secstrings = addr + GET_LE(&secstrings_hdr->sh_offset); 178 secstrings = addr + GET_LE(&secstrings_hdr->sh_offset);
63 for (i = 0; i < GET_LE(&hdr->e_shnum); i++) { 179 for (i = 0; i < GET_LE(&hdr->e_shnum); i++) {
64 Elf_Shdr *sh = addr + GET_LE(&hdr->e_shoff) + 180 ELF(Shdr) *sh = addr + GET_LE(&hdr->e_shoff) +
65 GET_LE(&hdr->e_shentsize) * i; 181 GET_LE(&hdr->e_shentsize) * i;
66 if (GET_LE(&sh->sh_type) == SHT_SYMTAB) 182 if (GET_LE(&sh->sh_type) == SHT_SYMTAB)
67 symtab_hdr = sh; 183 symtab_hdr = sh;
@@ -82,29 +198,63 @@ static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name)
82 i < GET_LE(&symtab_hdr->sh_size) / GET_LE(&symtab_hdr->sh_entsize); 198 i < GET_LE(&symtab_hdr->sh_size) / GET_LE(&symtab_hdr->sh_entsize);
83 i++) { 199 i++) {
84 int k; 200 int k;
85 Elf_Sym *sym = addr + GET_LE(&symtab_hdr->sh_offset) + 201 ELF(Sym) *sym = addr + GET_LE(&symtab_hdr->sh_offset) +
86 GET_LE(&symtab_hdr->sh_entsize) * i; 202 GET_LE(&symtab_hdr->sh_entsize) * i;
87 const char *name = addr + GET_LE(&strtab_hdr->sh_offset) + 203 const char *name = addr + GET_LE(&strtab_hdr->sh_offset) +
88 GET_LE(&sym->st_name); 204 GET_LE(&sym->st_name);
89 205
90 for (k = 0; k < NSYMS; k++) { 206 for (k = 0; k < NSYMS; k++) {
91 if (!strcmp(name, required_syms[k])) { 207 if (!strcmp(name, required_syms[k].name)) {
92 if (syms[k]) { 208 if (syms[k]) {
93 fail("duplicate symbol %s\n", 209 fail("duplicate symbol %s\n",
94 required_syms[k]); 210 required_syms[k].name);
95 } 211 }
96 syms[k] = GET_LE(&sym->st_value); 212 syms[k] = GET_LE(&sym->st_value);
97 } 213 }
98 } 214 }
99 215
100 if (!strcmp(name, "vdso_fake_sections")) { 216 if (!strcmp(name, "fake_shstrtab")) {
101 if (fake_sections_value) 217 ELF(Shdr) *sh;
102 fail("duplicate vdso_fake_sections\n"); 218
103 fake_sections_value = GET_LE(&sym->st_value); 219 fake_sections.in_shstrndx = GET_LE(&sym->st_shndx);
104 fake_sections_size = GET_LE(&sym->st_size); 220 fake_sections.shstrtab = addr + GET_LE(&sym->st_value);
221 fake_sections.shstrtab_len = GET_LE(&sym->st_size);
222 sh = addr + GET_LE(&hdr->e_shoff) +
223 GET_LE(&hdr->e_shentsize) *
224 fake_sections.in_shstrndx;
225 fake_sections.shstr_offset = GET_LE(&sym->st_value) -
226 GET_LE(&sh->sh_addr);
105 } 227 }
106 } 228 }
107 229
230 /* Build the output section table. */
231 if (!syms[sym_VDSO_FAKE_SECTION_TABLE_START] ||
232 !syms[sym_VDSO_FAKE_SECTION_TABLE_END])
233 fail("couldn't find fake section table\n");
234 if ((syms[sym_VDSO_FAKE_SECTION_TABLE_END] -
235 syms[sym_VDSO_FAKE_SECTION_TABLE_START]) % sizeof(ELF(Shdr)))
236 fail("fake section table size isn't a multiple of sizeof(Shdr)\n");
237 fake_sections.table = addr + syms[sym_VDSO_FAKE_SECTION_TABLE_START];
238 fake_sections.table_offset = syms[sym_VDSO_FAKE_SECTION_TABLE_START];
239 fake_sections.max_count = (syms[sym_VDSO_FAKE_SECTION_TABLE_END] -
240 syms[sym_VDSO_FAKE_SECTION_TABLE_START]) /
241 sizeof(ELF(Shdr));
242
243 BITSFUNC(init_sections)(&fake_sections);
244 for (i = 0; i < GET_LE(&hdr->e_shnum); i++) {
245 ELF(Shdr) *sh = addr + GET_LE(&hdr->e_shoff) +
246 GET_LE(&hdr->e_shentsize) * i;
247 BITSFUNC(copy_section)(&fake_sections, i, sh,
248 secstrings + GET_LE(&sh->sh_name));
249 }
250 if (!fake_sections.out_shstrndx)
251 fail("didn't generate shstrndx?!?\n");
252
253 PUT_LE(&hdr->e_shoff, fake_sections.table_offset);
254 PUT_LE(&hdr->e_shentsize, sizeof(ELF(Shdr)));
255 PUT_LE(&hdr->e_shnum, fake_sections.count);
256 PUT_LE(&hdr->e_shstrndx, fake_sections.out_shstrndx);
257
108 /* Validate mapping addresses. */ 258 /* Validate mapping addresses. */
109 for (i = 0; i < sizeof(special_pages) / sizeof(special_pages[0]); i++) { 259 for (i = 0; i < sizeof(special_pages) / sizeof(special_pages[0]); i++) {
110 if (!syms[i]) 260 if (!syms[i])
@@ -112,25 +262,17 @@ static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name)
112 262
113 if (syms[i] % 4096) 263 if (syms[i] % 4096)
114 fail("%s must be a multiple of 4096\n", 264 fail("%s must be a multiple of 4096\n",
115 required_syms[i]); 265 required_syms[i].name);
116 if (syms[i] < data_size) 266 if (syms[i] < data_size)
117 fail("%s must be after the text mapping\n", 267 fail("%s must be after the text mapping\n",
118 required_syms[i]); 268 required_syms[i].name);
119 if (syms[sym_end_mapping] < syms[i] + 4096) 269 if (syms[sym_end_mapping] < syms[i] + 4096)
120 fail("%s overruns end_mapping\n", required_syms[i]); 270 fail("%s overruns end_mapping\n",
271 required_syms[i].name);
121 } 272 }
122 if (syms[sym_end_mapping] % 4096) 273 if (syms[sym_end_mapping] % 4096)
123 fail("end_mapping must be a multiple of 4096\n"); 274 fail("end_mapping must be a multiple of 4096\n");
124 275
125 /* Remove sections or use fakes */
126 if (fake_sections_size % sizeof(Elf_Shdr))
127 fail("vdso_fake_sections size is not a multiple of %ld\n",
128 (long)sizeof(Elf_Shdr));
129 PUT_LE(&hdr->e_shoff, fake_sections_value);
130 PUT_LE(&hdr->e_shentsize, fake_sections_value ? sizeof(Elf_Shdr) : 0);
131 PUT_LE(&hdr->e_shnum, fake_sections_size / sizeof(Elf_Shdr));
132 PUT_LE(&hdr->e_shstrndx, SHN_UNDEF);
133
134 if (!name) { 276 if (!name) {
135 fwrite(addr, load_size, 1, outfile); 277 fwrite(addr, load_size, 1, outfile);
136 return; 278 return;
@@ -168,9 +310,9 @@ static void GOFUNC(void *addr, size_t len, FILE *outfile, const char *name)
168 (unsigned long)GET_LE(&alt_sec->sh_size)); 310 (unsigned long)GET_LE(&alt_sec->sh_size));
169 } 311 }
170 for (i = 0; i < NSYMS; i++) { 312 for (i = 0; i < NSYMS; i++) {
171 if (syms[i]) 313 if (required_syms[i].export && syms[i])
172 fprintf(outfile, "\t.sym_%s = 0x%" PRIx64 ",\n", 314 fprintf(outfile, "\t.sym_%s = 0x%" PRIx64 ",\n",
173 required_syms[i], syms[i]); 315 required_syms[i].name, syms[i]);
174 } 316 }
175 fprintf(outfile, "};\n"); 317 fprintf(outfile, "};\n");
176} 318}
diff --git a/arch/x86/vdso/vdso32/vdso-fakesections.c b/arch/x86/vdso/vdso32/vdso-fakesections.c
new file mode 100644
index 000000000000..541468e25265
--- /dev/null
+++ b/arch/x86/vdso/vdso32/vdso-fakesections.c
@@ -0,0 +1 @@
#include "../vdso-fakesections.c"
diff --git a/arch/x86/vdso/vdsox32.lds.S b/arch/x86/vdso/vdsox32.lds.S
index 46b991b578a8..697c11ece90c 100644
--- a/arch/x86/vdso/vdsox32.lds.S
+++ b/arch/x86/vdso/vdsox32.lds.S
@@ -6,6 +6,8 @@
6 * the DSO. 6 * the DSO.
7 */ 7 */
8 8
9#define BUILD_VDSOX32
10
9#include "vdso-layout.lds.S" 11#include "vdso-layout.lds.S"
10 12
11/* 13/*
diff --git a/arch/x86/vdso/vma.c b/arch/x86/vdso/vma.c
index e1513c47872a..5a5176de8d0a 100644
--- a/arch/x86/vdso/vma.c
+++ b/arch/x86/vdso/vma.c
@@ -62,6 +62,9 @@ struct linux_binprm;
62 Only used for the 64-bit and x32 vdsos. */ 62 Only used for the 64-bit and x32 vdsos. */
63static unsigned long vdso_addr(unsigned long start, unsigned len) 63static unsigned long vdso_addr(unsigned long start, unsigned len)
64{ 64{
65#ifdef CONFIG_X86_32
66 return 0;
67#else
65 unsigned long addr, end; 68 unsigned long addr, end;
66 unsigned offset; 69 unsigned offset;
67 end = (start + PMD_SIZE - 1) & PMD_MASK; 70 end = (start + PMD_SIZE - 1) & PMD_MASK;
@@ -83,6 +86,7 @@ static unsigned long vdso_addr(unsigned long start, unsigned len)
83 addr = align_vdso_addr(addr); 86 addr = align_vdso_addr(addr);
84 87
85 return addr; 88 return addr;
89#endif
86} 90}
87 91
88static int map_vdso(const struct vdso_image *image, bool calculate_addr) 92static int map_vdso(const struct vdso_image *image, bool calculate_addr)