aboutsummaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2013-03-14 18:57:57 -0400
committerArnd Bergmann <arnd@arndb.de>2013-03-14 18:57:57 -0400
commita5e9902842d24d8af0a21a8df3e5f3abba757288 (patch)
treed7cb7a288e8f6c3d28efbde14afdecd5214d55f0 /arch
parent7ac6c89189c669fd5f883937f291f18d324d470b (diff)
parent0a96d4d36978c8aeebf5fce1f3041c2d60f23ac0 (diff)
Merge branch 'v3.9-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes
From Kukjin Kim <kgene.kim@samsung.com>: * 'v3.9-samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Add dma-cells for generic dma binding support for PL330 ARM: S5PV210: Fix PL330 DMA controller clkdev entries Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi9
-rw-r--r--arch/arm/boot/dts/exynos5440.dtsi6
-rw-r--r--arch/arm/mach-s5pv210/clock.c36
3 files changed, 33 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index e1347fceb5bc..1a62bcf18aa3 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -275,18 +275,27 @@
275 compatible = "arm,pl330", "arm,primecell"; 275 compatible = "arm,pl330", "arm,primecell";
276 reg = <0x12680000 0x1000>; 276 reg = <0x12680000 0x1000>;
277 interrupts = <0 35 0>; 277 interrupts = <0 35 0>;
278 #dma-cells = <1>;
279 #dma-channels = <8>;
280 #dma-requests = <32>;
278 }; 281 };
279 282
280 pdma1: pdma@12690000 { 283 pdma1: pdma@12690000 {
281 compatible = "arm,pl330", "arm,primecell"; 284 compatible = "arm,pl330", "arm,primecell";
282 reg = <0x12690000 0x1000>; 285 reg = <0x12690000 0x1000>;
283 interrupts = <0 36 0>; 286 interrupts = <0 36 0>;
287 #dma-cells = <1>;
288 #dma-channels = <8>;
289 #dma-requests = <32>;
284 }; 290 };
285 291
286 mdma1: mdma@12850000 { 292 mdma1: mdma@12850000 {
287 compatible = "arm,pl330", "arm,primecell"; 293 compatible = "arm,pl330", "arm,primecell";
288 reg = <0x12850000 0x1000>; 294 reg = <0x12850000 0x1000>;
289 interrupts = <0 34 0>; 295 interrupts = <0 34 0>;
296 #dma-cells = <1>;
297 #dma-channels = <8>;
298 #dma-requests = <1>;
290 }; 299 };
291 }; 300 };
292}; 301};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 5f3562ad6746..9a99755920c0 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -142,12 +142,18 @@
142 compatible = "arm,pl330", "arm,primecell"; 142 compatible = "arm,pl330", "arm,primecell";
143 reg = <0x120000 0x1000>; 143 reg = <0x120000 0x1000>;
144 interrupts = <0 34 0>; 144 interrupts = <0 34 0>;
145 #dma-cells = <1>;
146 #dma-channels = <8>;
147 #dma-requests = <32>;
145 }; 148 };
146 149
147 pdma1: pdma@121B0000 { 150 pdma1: pdma@121B0000 {
148 compatible = "arm,pl330", "arm,primecell"; 151 compatible = "arm,pl330", "arm,primecell";
149 reg = <0x121000 0x1000>; 152 reg = <0x121000 0x1000>;
150 interrupts = <0 35 0>; 153 interrupts = <0 35 0>;
154 #dma-cells = <1>;
155 #dma-channels = <8>;
156 #dma-requests = <32>;
151 }; 157 };
152 }; 158 };
153 159
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index fcdf52dbcc49..f051f53e35b7 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -214,11 +214,6 @@ static struct clk clk_pcmcdclk2 = {
214 .name = "pcmcdclk", 214 .name = "pcmcdclk",
215}; 215};
216 216
217static struct clk dummy_apb_pclk = {
218 .name = "apb_pclk",
219 .id = -1,
220};
221
222static struct clk *clkset_vpllsrc_list[] = { 217static struct clk *clkset_vpllsrc_list[] = {
223 [0] = &clk_fin_vpll, 218 [0] = &clk_fin_vpll,
224 [1] = &clk_sclk_hdmi27m, 219 [1] = &clk_sclk_hdmi27m,
@@ -305,18 +300,6 @@ static struct clk_ops clk_fout_apll_ops = {
305 300
306static struct clk init_clocks_off[] = { 301static struct clk init_clocks_off[] = {
307 { 302 {
308 .name = "dma",
309 .devname = "dma-pl330.0",
310 .parent = &clk_hclk_psys.clk,
311 .enable = s5pv210_clk_ip0_ctrl,
312 .ctrlbit = (1 << 3),
313 }, {
314 .name = "dma",
315 .devname = "dma-pl330.1",
316 .parent = &clk_hclk_psys.clk,
317 .enable = s5pv210_clk_ip0_ctrl,
318 .ctrlbit = (1 << 4),
319 }, {
320 .name = "rot", 303 .name = "rot",
321 .parent = &clk_hclk_dsys.clk, 304 .parent = &clk_hclk_dsys.clk,
322 .enable = s5pv210_clk_ip0_ctrl, 305 .enable = s5pv210_clk_ip0_ctrl,
@@ -573,6 +556,20 @@ static struct clk clk_hsmmc3 = {
573 .ctrlbit = (1<<19), 556 .ctrlbit = (1<<19),
574}; 557};
575 558
559static struct clk clk_pdma0 = {
560 .name = "pdma0",
561 .parent = &clk_hclk_psys.clk,
562 .enable = s5pv210_clk_ip0_ctrl,
563 .ctrlbit = (1 << 3),
564};
565
566static struct clk clk_pdma1 = {
567 .name = "pdma1",
568 .parent = &clk_hclk_psys.clk,
569 .enable = s5pv210_clk_ip0_ctrl,
570 .ctrlbit = (1 << 4),
571};
572
576static struct clk *clkset_uart_list[] = { 573static struct clk *clkset_uart_list[] = {
577 [6] = &clk_mout_mpll.clk, 574 [6] = &clk_mout_mpll.clk,
578 [7] = &clk_mout_epll.clk, 575 [7] = &clk_mout_epll.clk,
@@ -1075,6 +1072,8 @@ static struct clk *clk_cdev[] = {
1075 &clk_hsmmc1, 1072 &clk_hsmmc1,
1076 &clk_hsmmc2, 1073 &clk_hsmmc2,
1077 &clk_hsmmc3, 1074 &clk_hsmmc3,
1075 &clk_pdma0,
1076 &clk_pdma1,
1078}; 1077};
1079 1078
1080/* Clock initialisation code */ 1079/* Clock initialisation code */
@@ -1333,6 +1332,8 @@ static struct clk_lookup s5pv210_clk_lookup[] = {
1333 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), 1332 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
1334 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), 1333 CLKDEV_INIT("s5pv210-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
1335 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 1334 CLKDEV_INIT("s5pv210-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
1335 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
1336 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1336}; 1337};
1337 1338
1338void __init s5pv210_register_clocks(void) 1339void __init s5pv210_register_clocks(void)
@@ -1361,6 +1362,5 @@ void __init s5pv210_register_clocks(void)
1361 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) 1362 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1362 s3c_disable_clocks(clk_cdev[ptr], 1); 1363 s3c_disable_clocks(clk_cdev[ptr], 1);
1363 1364
1364 s3c24xx_register_clock(&dummy_apb_pclk);
1365 s3c_pwmclk_init(); 1365 s3c_pwmclk_init();
1366} 1366}