diff options
author | Christian Hemp <c.hemp@phytec.de> | 2013-06-11 13:48:21 -0400 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 04:04:31 -0400 |
commit | a5770904d7220a31a4a160ca793a029d6382a8da (patch) | |
tree | 946672ce7e1f992b49143e1cf9bab3481eb2861b /arch | |
parent | c14ceb42983b16cb7c5a933401020a4b15e07e7c (diff) |
ARM: dts: imx6q: Add pinctrl for usdhc2 and enet
Add a group to the usdhc2 and enet pinctrl.
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index d79455d226cb..312a22e4e9b0 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi | |||
@@ -157,6 +157,27 @@ | |||
157 | MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | 157 | MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 |
158 | >; | 158 | >; |
159 | }; | 159 | }; |
160 | |||
161 | pinctrl_enet_3: enetgrp-3 { | ||
162 | fsl,pins = < | ||
163 | MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 | ||
164 | MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0 | ||
165 | MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 | ||
166 | MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 | ||
167 | MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 | ||
168 | MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 | ||
169 | MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 | ||
170 | MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 | ||
171 | MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 | ||
172 | MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 | ||
173 | MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 | ||
174 | MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 | ||
175 | MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 | ||
176 | MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 | ||
177 | MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 | ||
178 | MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 | ||
179 | >; | ||
180 | }; | ||
160 | }; | 181 | }; |
161 | 182 | ||
162 | gpmi-nand { | 183 | gpmi-nand { |
@@ -266,6 +287,17 @@ | |||
266 | MX6Q_PAD_NANDF_D7__SD2_DATA7 0x17059 | 287 | MX6Q_PAD_NANDF_D7__SD2_DATA7 0x17059 |
267 | >; | 288 | >; |
268 | }; | 289 | }; |
290 | |||
291 | pinctrl_usdhc2_2: usdhc2grp-2 { | ||
292 | fsl,pins = < | ||
293 | MX6Q_PAD_SD2_CMD__SD2_CMD 0x17059 | ||
294 | MX6Q_PAD_SD2_CLK__SD2_CLK 0x10059 | ||
295 | MX6Q_PAD_SD2_DAT0__SD2_DATA0 0x17059 | ||
296 | MX6Q_PAD_SD2_DAT1__SD2_DATA1 0x17059 | ||
297 | MX6Q_PAD_SD2_DAT2__SD2_DATA2 0x17059 | ||
298 | MX6Q_PAD_SD2_DAT3__SD2_DATA3 0x17059 | ||
299 | >; | ||
300 | }; | ||
269 | }; | 301 | }; |
270 | 302 | ||
271 | usdhc3 { | 303 | usdhc3 { |