diff options
author | Magnus Damm <damm@opensource.se> | 2011-01-06 06:12:27 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-12 00:36:52 -0500 |
commit | 9bbe7b984096ac45586da2adf26c14069ecb79b2 (patch) | |
tree | 90f14d14642536907d5e17bc700c3391ff3ecec9 /arch | |
parent | 3a0f4c78999f9e8c1b66ddb98c8326be4b33cb49 (diff) |
sh: sh7366 Enable SDIO IRQs
This patch enables interrupt generation for SDIO IRQs
of the SDHI block on the sh7366 processor. Use together
with a recent SDHI driver using TMIO_MMC_SDIO_IRQ and
with the MMC_CAP_SDIO_IRQ flag in the board code.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/setup-sh7366.c | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c index 8dab9e1bbd89..9b3a6aa9081c 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7366.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7366.c | |||
@@ -319,6 +319,8 @@ void __init plat_early_device_setup(void) | |||
319 | 319 | ||
320 | enum { | 320 | enum { |
321 | UNUSED=0, | 321 | UNUSED=0, |
322 | ENABLED, | ||
323 | DISABLED, | ||
322 | 324 | ||
323 | /* interrupt sources */ | 325 | /* interrupt sources */ |
324 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, | 326 | IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, |
@@ -332,14 +334,13 @@ enum { | |||
332 | DENC, MSIOF, | 334 | DENC, MSIOF, |
333 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, | 335 | FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, |
334 | I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, | 336 | I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI, |
335 | SDHI0, SDHI1, SDHI2, SDHI3, | 337 | SDHI, CMT, TSIF, SIU, |
336 | CMT, TSIF, SIU, | ||
337 | TMU0, TMU1, TMU2, | 338 | TMU0, TMU1, TMU2, |
338 | VEU2, LCDC, | 339 | VEU2, LCDC, |
339 | 340 | ||
340 | /* interrupt groups */ | 341 | /* interrupt groups */ |
341 | 342 | ||
342 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, SDHI, | 343 | DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C, |
343 | }; | 344 | }; |
344 | 345 | ||
345 | static struct intc_vect vectors[] __initdata = { | 346 | static struct intc_vect vectors[] __initdata = { |
@@ -364,8 +365,8 @@ static struct intc_vect vectors[] __initdata = { | |||
364 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), | 365 | INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), |
365 | INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), | 366 | INTC_VECT(I2C_ALI, 0xe00), INTC_VECT(I2C_TACKI, 0xe20), |
366 | INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), | 367 | INTC_VECT(I2C_WAITI, 0xe40), INTC_VECT(I2C_DTEI, 0xe60), |
367 | INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), | 368 | INTC_VECT(SDHI, 0xe80), INTC_VECT(SDHI, 0xea0), |
368 | INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), | 369 | INTC_VECT(SDHI, 0xec0), INTC_VECT(SDHI, 0xee0), |
369 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), | 370 | INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), |
370 | INTC_VECT(SIU, 0xf80), | 371 | INTC_VECT(SIU, 0xf80), |
371 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), | 372 | INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), |
@@ -381,7 +382,6 @@ static struct intc_group groups[] __initdata = { | |||
381 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, | 382 | INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, |
382 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), | 383 | FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), |
383 | INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), | 384 | INTC_GROUP(I2C, I2C_ALI, I2C_TACKI, I2C_WAITI, I2C_DTEI), |
384 | INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), | ||
385 | }; | 385 | }; |
386 | 386 | ||
387 | static struct intc_mask_reg mask_registers[] __initdata = { | 387 | static struct intc_mask_reg mask_registers[] __initdata = { |
@@ -403,7 +403,7 @@ static struct intc_mask_reg mask_registers[] __initdata = { | |||
403 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, | 403 | { I2C_DTEI, I2C_WAITI, I2C_TACKI, I2C_ALI, |
404 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, | 404 | FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, |
405 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ | 405 | { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ |
406 | { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, | 406 | { DISABLED, ENABLED, ENABLED, ENABLED, 0, 0, 0, SIU } }, |
407 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ | 407 | { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ |
408 | { 0, 0, 0, CMT, 0, USB, } }, | 408 | { 0, 0, 0, CMT, 0, USB, } }, |
409 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ | 409 | { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ |
@@ -441,9 +441,13 @@ static struct intc_mask_reg ack_registers[] __initdata = { | |||
441 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, | 441 | { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, |
442 | }; | 442 | }; |
443 | 443 | ||
444 | static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, | 444 | static struct intc_desc intc_desc __initdata = { |
445 | mask_registers, prio_registers, sense_registers, | 445 | .name = "sh7366", |
446 | ack_registers); | 446 | .force_enable = ENABLED, |
447 | .force_disable = DISABLED, | ||
448 | .hw = INTC_HW_DESC(vectors, groups, mask_registers, | ||
449 | prio_registers, sense_registers, ack_registers), | ||
450 | }; | ||
447 | 451 | ||
448 | void __init plat_irq_setup(void) | 452 | void __init plat_irq_setup(void) |
449 | { | 453 | { |