diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 09:23:44 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 09:23:44 -0400 |
commit | 94314a40bcc537c396012e37cf887572f0d82aef (patch) | |
tree | 489b42e181317730713f8800ac2889039b0faae3 /arch | |
parent | 929f58aeeb46f964d9468ce1addd993f5d92b11d (diff) | |
parent | f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef (diff) |
Merge branch 'dt/gic' into imx/imx6q
Diffstat (limited to 'arch')
143 files changed, 628 insertions, 1466 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ca2e1b40e0b5..0c5f37f4eddb 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -196,7 +196,8 @@ config VECTORS_BASE | |||
196 | The base address of exception vectors. | 196 | The base address of exception vectors. |
197 | 197 | ||
198 | config ARM_PATCH_PHYS_VIRT | 198 | config ARM_PATCH_PHYS_VIRT |
199 | bool "Patch physical to virtual translations at runtime" | 199 | bool "Patch physical to virtual translations at runtime" if EMBEDDED |
200 | default y | ||
200 | depends on !XIP_KERNEL && MMU | 201 | depends on !XIP_KERNEL && MMU |
201 | depends on !ARCH_REALVIEW || !SPARSEMEM | 202 | depends on !ARCH_REALVIEW || !SPARSEMEM |
202 | help | 203 | help |
@@ -205,16 +206,25 @@ config ARM_PATCH_PHYS_VIRT | |||
205 | kernel in system memory. | 206 | kernel in system memory. |
206 | 207 | ||
207 | This can only be used with non-XIP MMU kernels where the base | 208 | This can only be used with non-XIP MMU kernels where the base |
208 | of physical memory is at a 16MB boundary, or theoretically 64K | 209 | of physical memory is at a 16MB boundary. |
209 | for the MSM machine class. | ||
210 | 210 | ||
211 | config ARM_PATCH_PHYS_VIRT_16BIT | 211 | Only disable this option if you know that you do not require |
212 | def_bool y | 212 | this feature (eg, building a kernel for a single machine) and |
213 | depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM | 213 | you need to shrink the kernel to the minimal size. |
214 | |||
215 | config NEED_MACH_MEMORY_H | ||
216 | bool | ||
217 | help | ||
218 | Select this when mach/memory.h is required to provide special | ||
219 | definitions for this platform. The need for mach/memory.h should | ||
220 | be avoided when possible. | ||
221 | |||
222 | config PHYS_OFFSET | ||
223 | hex "Physical address of main memory" | ||
224 | depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H | ||
214 | help | 225 | help |
215 | This option extends the physical to virtual translation patching | 226 | Please provide the physical address corresponding to the |
216 | to allow physical memory down to a theoretical minimum of 64K | 227 | location of main memory in your system. |
217 | boundaries. | ||
218 | 228 | ||
219 | source "init/Kconfig" | 229 | source "init/Kconfig" |
220 | 230 | ||
@@ -247,6 +257,7 @@ config ARCH_INTEGRATOR | |||
247 | select GENERIC_CLOCKEVENTS | 257 | select GENERIC_CLOCKEVENTS |
248 | select PLAT_VERSATILE | 258 | select PLAT_VERSATILE |
249 | select PLAT_VERSATILE_FPGA_IRQ | 259 | select PLAT_VERSATILE_FPGA_IRQ |
260 | select NEED_MACH_MEMORY_H | ||
250 | help | 261 | help |
251 | Support for ARM's Integrator platform. | 262 | Support for ARM's Integrator platform. |
252 | 263 | ||
@@ -262,6 +273,7 @@ config ARCH_REALVIEW | |||
262 | select PLAT_VERSATILE_CLCD | 273 | select PLAT_VERSATILE_CLCD |
263 | select ARM_TIMER_SP804 | 274 | select ARM_TIMER_SP804 |
264 | select GPIO_PL061 if GPIOLIB | 275 | select GPIO_PL061 if GPIOLIB |
276 | select NEED_MACH_MEMORY_H | ||
265 | help | 277 | help |
266 | This enables support for ARM Ltd RealView boards. | 278 | This enables support for ARM Ltd RealView boards. |
267 | 279 | ||
@@ -302,7 +314,6 @@ config ARCH_AT91 | |||
302 | select ARCH_REQUIRE_GPIOLIB | 314 | select ARCH_REQUIRE_GPIOLIB |
303 | select HAVE_CLK | 315 | select HAVE_CLK |
304 | select CLKDEV_LOOKUP | 316 | select CLKDEV_LOOKUP |
305 | select ARM_PATCH_PHYS_VIRT if MMU | ||
306 | help | 317 | help |
307 | This enables support for systems based on the Atmel AT91RM9200, | 318 | This enables support for systems based on the Atmel AT91RM9200, |
308 | AT91SAM9 and AT91CAP9 processors. | 319 | AT91SAM9 and AT91CAP9 processors. |
@@ -323,6 +334,7 @@ config ARCH_CLPS711X | |||
323 | bool "Cirrus Logic CLPS711x/EP721x-based" | 334 | bool "Cirrus Logic CLPS711x/EP721x-based" |
324 | select CPU_ARM720T | 335 | select CPU_ARM720T |
325 | select ARCH_USES_GETTIMEOFFSET | 336 | select ARCH_USES_GETTIMEOFFSET |
337 | select NEED_MACH_MEMORY_H | ||
326 | help | 338 | help |
327 | Support for Cirrus Logic 711x/721x based boards. | 339 | Support for Cirrus Logic 711x/721x based boards. |
328 | 340 | ||
@@ -363,6 +375,7 @@ config ARCH_EBSA110 | |||
363 | select ISA | 375 | select ISA |
364 | select NO_IOPORT | 376 | select NO_IOPORT |
365 | select ARCH_USES_GETTIMEOFFSET | 377 | select ARCH_USES_GETTIMEOFFSET |
378 | select NEED_MACH_MEMORY_H | ||
366 | help | 379 | help |
367 | This is an evaluation board for the StrongARM processor available | 380 | This is an evaluation board for the StrongARM processor available |
368 | from Digital. It has limited hardware on-board, including an | 381 | from Digital. It has limited hardware on-board, including an |
@@ -378,6 +391,7 @@ config ARCH_EP93XX | |||
378 | select ARCH_REQUIRE_GPIOLIB | 391 | select ARCH_REQUIRE_GPIOLIB |
379 | select ARCH_HAS_HOLES_MEMORYMODEL | 392 | select ARCH_HAS_HOLES_MEMORYMODEL |
380 | select ARCH_USES_GETTIMEOFFSET | 393 | select ARCH_USES_GETTIMEOFFSET |
394 | select NEED_MEMORY_H | ||
381 | help | 395 | help |
382 | This enables support for the Cirrus EP93xx series of CPUs. | 396 | This enables support for the Cirrus EP93xx series of CPUs. |
383 | 397 | ||
@@ -386,6 +400,7 @@ config ARCH_FOOTBRIDGE | |||
386 | select CPU_SA110 | 400 | select CPU_SA110 |
387 | select FOOTBRIDGE | 401 | select FOOTBRIDGE |
388 | select GENERIC_CLOCKEVENTS | 402 | select GENERIC_CLOCKEVENTS |
403 | select NEED_MACH_MEMORY_H | ||
389 | help | 404 | help |
390 | Support for systems based on the DC21285 companion chip | 405 | Support for systems based on the DC21285 companion chip |
391 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. | 406 | ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder. |
@@ -435,6 +450,7 @@ config ARCH_IOP13XX | |||
435 | select PCI | 450 | select PCI |
436 | select ARCH_SUPPORTS_MSI | 451 | select ARCH_SUPPORTS_MSI |
437 | select VMSPLIT_1G | 452 | select VMSPLIT_1G |
453 | select NEED_MACH_MEMORY_H | ||
438 | help | 454 | help |
439 | Support for Intel's IOP13XX (XScale) family of processors. | 455 | Support for Intel's IOP13XX (XScale) family of processors. |
440 | 456 | ||
@@ -465,6 +481,7 @@ config ARCH_IXP23XX | |||
465 | select CPU_XSC3 | 481 | select CPU_XSC3 |
466 | select PCI | 482 | select PCI |
467 | select ARCH_USES_GETTIMEOFFSET | 483 | select ARCH_USES_GETTIMEOFFSET |
484 | select NEED_MACH_MEMORY_H | ||
468 | help | 485 | help |
469 | Support for Intel's IXP23xx (XScale) family of processors. | 486 | Support for Intel's IXP23xx (XScale) family of processors. |
470 | 487 | ||
@@ -474,6 +491,7 @@ config ARCH_IXP2000 | |||
474 | select CPU_XSCALE | 491 | select CPU_XSCALE |
475 | select PCI | 492 | select PCI |
476 | select ARCH_USES_GETTIMEOFFSET | 493 | select ARCH_USES_GETTIMEOFFSET |
494 | select NEED_MACH_MEMORY_H | ||
477 | help | 495 | help |
478 | Support for Intel's IXP2400/2800 (XScale) family of processors. | 496 | Support for Intel's IXP2400/2800 (XScale) family of processors. |
479 | 497 | ||
@@ -567,6 +585,7 @@ config ARCH_KS8695 | |||
567 | select CPU_ARM922T | 585 | select CPU_ARM922T |
568 | select ARCH_REQUIRE_GPIOLIB | 586 | select ARCH_REQUIRE_GPIOLIB |
569 | select ARCH_USES_GETTIMEOFFSET | 587 | select ARCH_USES_GETTIMEOFFSET |
588 | select NEED_MACH_MEMORY_H | ||
570 | help | 589 | help |
571 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based | 590 | Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based |
572 | System-on-Chip devices. | 591 | System-on-Chip devices. |
@@ -658,6 +677,7 @@ config ARCH_SHMOBILE | |||
658 | select SPARSE_IRQ | 677 | select SPARSE_IRQ |
659 | select MULTI_IRQ_HANDLER | 678 | select MULTI_IRQ_HANDLER |
660 | select PM_GENERIC_DOMAINS if PM | 679 | select PM_GENERIC_DOMAINS if PM |
680 | select NEED_MACH_MEMORY_H | ||
661 | help | 681 | help |
662 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. | 682 | Support for Renesas's SH-Mobile and R-Mobile ARM platforms. |
663 | 683 | ||
@@ -672,6 +692,7 @@ config ARCH_RPC | |||
672 | select NO_IOPORT | 692 | select NO_IOPORT |
673 | select ARCH_SPARSEMEM_ENABLE | 693 | select ARCH_SPARSEMEM_ENABLE |
674 | select ARCH_USES_GETTIMEOFFSET | 694 | select ARCH_USES_GETTIMEOFFSET |
695 | select NEED_MACH_MEMORY_H | ||
675 | help | 696 | help |
676 | On the Acorn Risc-PC, Linux can support the internal IDE disk and | 697 | On the Acorn Risc-PC, Linux can support the internal IDE disk and |
677 | CD-ROM interface, serial and parallel port, and the floppy drive. | 698 | CD-ROM interface, serial and parallel port, and the floppy drive. |
@@ -690,6 +711,7 @@ config ARCH_SA1100 | |||
690 | select HAVE_SCHED_CLOCK | 711 | select HAVE_SCHED_CLOCK |
691 | select TICK_ONESHOT | 712 | select TICK_ONESHOT |
692 | select ARCH_REQUIRE_GPIOLIB | 713 | select ARCH_REQUIRE_GPIOLIB |
714 | select NEED_MACH_MEMORY_H | ||
693 | help | 715 | help |
694 | Support for StrongARM 11x0 based boards. | 716 | Support for StrongARM 11x0 based boards. |
695 | 717 | ||
@@ -782,6 +804,7 @@ config ARCH_S5PV210 | |||
782 | select HAVE_S3C2410_I2C if I2C | 804 | select HAVE_S3C2410_I2C if I2C |
783 | select HAVE_S3C_RTC if RTC_CLASS | 805 | select HAVE_S3C_RTC if RTC_CLASS |
784 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | 806 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
807 | select NEED_MACH_MEMORY_H | ||
785 | help | 808 | help |
786 | Samsung S5PV210/S5PC110 series based systems | 809 | Samsung S5PV210/S5PC110 series based systems |
787 | 810 | ||
@@ -798,6 +821,7 @@ config ARCH_EXYNOS4 | |||
798 | select HAVE_S3C_RTC if RTC_CLASS | 821 | select HAVE_S3C_RTC if RTC_CLASS |
799 | select HAVE_S3C2410_I2C if I2C | 822 | select HAVE_S3C2410_I2C if I2C |
800 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | 823 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
824 | select NEED_MACH_MEMORY_H | ||
801 | help | 825 | help |
802 | Samsung EXYNOS4 series based systems | 826 | Samsung EXYNOS4 series based systems |
803 | 827 | ||
@@ -809,6 +833,7 @@ config ARCH_SHARK | |||
809 | select ZONE_DMA | 833 | select ZONE_DMA |
810 | select PCI | 834 | select PCI |
811 | select ARCH_USES_GETTIMEOFFSET | 835 | select ARCH_USES_GETTIMEOFFSET |
836 | select NEED_MACH_MEMORY_H | ||
812 | help | 837 | help |
813 | Support for the StrongARM based Digital DNARD machine, also known | 838 | Support for the StrongARM based Digital DNARD machine, also known |
814 | as "Shark" (<http://www.shark-linux.de/shark.html>). | 839 | as "Shark" (<http://www.shark-linux.de/shark.html>). |
@@ -836,6 +861,7 @@ config ARCH_U300 | |||
836 | select CLKDEV_LOOKUP | 861 | select CLKDEV_LOOKUP |
837 | select HAVE_MACH_CLKDEV | 862 | select HAVE_MACH_CLKDEV |
838 | select GENERIC_GPIO | 863 | select GENERIC_GPIO |
864 | select NEED_MACH_MEMORY_H | ||
839 | help | 865 | help |
840 | Support for ST-Ericsson U300 series mobile platforms. | 866 | Support for ST-Ericsson U300 series mobile platforms. |
841 | 867 | ||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 70c424eaf7b0..5665c2a3b652 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -128,6 +128,9 @@ textofs-$(CONFIG_PM_H1940) := 0x00108000 | |||
128 | ifeq ($(CONFIG_ARCH_SA1100),y) | 128 | ifeq ($(CONFIG_ARCH_SA1100),y) |
129 | textofs-$(CONFIG_SA1111) := 0x00208000 | 129 | textofs-$(CONFIG_SA1111) := 0x00208000 |
130 | endif | 130 | endif |
131 | textofs-$(CONFIG_ARCH_MSM7X30) := 0x00208000 | ||
132 | textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 | ||
133 | textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 | ||
131 | 134 | ||
132 | # Machine directory name. This list is sorted alphanumerically | 135 | # Machine directory name. This list is sorted alphanumerically |
133 | # by CONFIG_* macro name. | 136 | # by CONFIG_* macro name. |
diff --git a/arch/arm/common/Kconfig b/arch/arm/common/Kconfig index 4b71766fb21d..74df9ca2be31 100644 --- a/arch/arm/common/Kconfig +++ b/arch/arm/common/Kconfig | |||
@@ -1,4 +1,5 @@ | |||
1 | config ARM_GIC | 1 | config ARM_GIC |
2 | select IRQ_DOMAIN | ||
2 | bool | 3 | bool |
3 | 4 | ||
4 | config ARM_VIC | 5 | config ARM_VIC |
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index 8b5be72eb9b9..9d77777076f0 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c | |||
@@ -24,11 +24,20 @@ | |||
24 | */ | 24 | */ |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
27 | #include <linux/err.h> | ||
28 | #include <linux/export.h> | ||
27 | #include <linux/list.h> | 29 | #include <linux/list.h> |
28 | #include <linux/smp.h> | 30 | #include <linux/smp.h> |
29 | #include <linux/cpu_pm.h> | 31 | #include <linux/cpu_pm.h> |
30 | #include <linux/cpumask.h> | 32 | #include <linux/cpumask.h> |
31 | #include <linux/io.h> | 33 | #include <linux/io.h> |
34 | #include <linux/of.h> | ||
35 | #include <linux/of_address.h> | ||
36 | #include <linux/of_irq.h> | ||
37 | #include <linux/irqdomain.h> | ||
38 | #include <linux/interrupt.h> | ||
39 | #include <linux/percpu.h> | ||
40 | #include <linux/slab.h> | ||
32 | 41 | ||
33 | #include <asm/irq.h> | 42 | #include <asm/irq.h> |
34 | #include <asm/mach/irq.h> | 43 | #include <asm/mach/irq.h> |
@@ -72,8 +81,7 @@ static inline void __iomem *gic_cpu_base(struct irq_data *d) | |||
72 | 81 | ||
73 | static inline unsigned int gic_irq(struct irq_data *d) | 82 | static inline unsigned int gic_irq(struct irq_data *d) |
74 | { | 83 | { |
75 | struct gic_chip_data *gic_data = irq_data_get_irq_chip_data(d); | 84 | return d->hwirq; |
76 | return d->irq - gic_data->irq_offset; | ||
77 | } | 85 | } |
78 | 86 | ||
79 | /* | 87 | /* |
@@ -81,7 +89,7 @@ static inline unsigned int gic_irq(struct irq_data *d) | |||
81 | */ | 89 | */ |
82 | static void gic_mask_irq(struct irq_data *d) | 90 | static void gic_mask_irq(struct irq_data *d) |
83 | { | 91 | { |
84 | u32 mask = 1 << (d->irq % 32); | 92 | u32 mask = 1 << (gic_irq(d) % 32); |
85 | 93 | ||
86 | spin_lock(&irq_controller_lock); | 94 | spin_lock(&irq_controller_lock); |
87 | writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); | 95 | writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); |
@@ -92,7 +100,7 @@ static void gic_mask_irq(struct irq_data *d) | |||
92 | 100 | ||
93 | static void gic_unmask_irq(struct irq_data *d) | 101 | static void gic_unmask_irq(struct irq_data *d) |
94 | { | 102 | { |
95 | u32 mask = 1 << (d->irq % 32); | 103 | u32 mask = 1 << (gic_irq(d) % 32); |
96 | 104 | ||
97 | spin_lock(&irq_controller_lock); | 105 | spin_lock(&irq_controller_lock); |
98 | if (gic_arch_extn.irq_unmask) | 106 | if (gic_arch_extn.irq_unmask) |
@@ -173,7 +181,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, | |||
173 | bool force) | 181 | bool force) |
174 | { | 182 | { |
175 | void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); | 183 | void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); |
176 | unsigned int shift = (d->irq % 4) * 8; | 184 | unsigned int shift = (gic_irq(d) % 4) * 8; |
177 | unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); | 185 | unsigned int cpu = cpumask_any_and(mask_val, cpu_online_mask); |
178 | u32 val, mask, bit; | 186 | u32 val, mask, bit; |
179 | 187 | ||
@@ -224,7 +232,7 @@ static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | |||
224 | if (gic_irq == 1023) | 232 | if (gic_irq == 1023) |
225 | goto out; | 233 | goto out; |
226 | 234 | ||
227 | cascade_irq = gic_irq + chip_data->irq_offset; | 235 | cascade_irq = irq_domain_to_irq(&chip_data->domain, gic_irq); |
228 | if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) | 236 | if (unlikely(gic_irq < 32 || gic_irq > 1020 || cascade_irq >= NR_IRQS)) |
229 | do_bad_IRQ(cascade_irq, desc); | 237 | do_bad_IRQ(cascade_irq, desc); |
230 | else | 238 | else |
@@ -256,11 +264,12 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) | |||
256 | irq_set_chained_handler(irq, gic_handle_cascade_irq); | 264 | irq_set_chained_handler(irq, gic_handle_cascade_irq); |
257 | } | 265 | } |
258 | 266 | ||
259 | static void __init gic_dist_init(struct gic_chip_data *gic, | 267 | static void __init gic_dist_init(struct gic_chip_data *gic) |
260 | unsigned int irq_start) | ||
261 | { | 268 | { |
262 | unsigned int gic_irqs, irq_limit, i; | 269 | unsigned int i, irq; |
263 | u32 cpumask; | 270 | u32 cpumask; |
271 | unsigned int gic_irqs = gic->gic_irqs; | ||
272 | struct irq_domain *domain = &gic->domain; | ||
264 | void __iomem *base = gic->dist_base; | 273 | void __iomem *base = gic->dist_base; |
265 | u32 cpu = 0; | 274 | u32 cpu = 0; |
266 | 275 | ||
@@ -275,17 +284,6 @@ static void __init gic_dist_init(struct gic_chip_data *gic, | |||
275 | writel_relaxed(0, base + GIC_DIST_CTRL); | 284 | writel_relaxed(0, base + GIC_DIST_CTRL); |
276 | 285 | ||
277 | /* | 286 | /* |
278 | * Find out how many interrupts are supported. | ||
279 | * The GIC only supports up to 1020 interrupt sources. | ||
280 | */ | ||
281 | gic_irqs = readl_relaxed(base + GIC_DIST_CTR) & 0x1f; | ||
282 | gic_irqs = (gic_irqs + 1) * 32; | ||
283 | if (gic_irqs > 1020) | ||
284 | gic_irqs = 1020; | ||
285 | |||
286 | gic->gic_irqs = gic_irqs; | ||
287 | |||
288 | /* | ||
289 | * Set all global interrupts to be level triggered, active low. | 287 | * Set all global interrupts to be level triggered, active low. |
290 | */ | 288 | */ |
291 | for (i = 32; i < gic_irqs; i += 16) | 289 | for (i = 32; i < gic_irqs; i += 16) |
@@ -311,19 +309,20 @@ static void __init gic_dist_init(struct gic_chip_data *gic, | |||
311 | writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); | 309 | writel_relaxed(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); |
312 | 310 | ||
313 | /* | 311 | /* |
314 | * Limit number of interrupts registered to the platform maximum | ||
315 | */ | ||
316 | irq_limit = gic->irq_offset + gic_irqs; | ||
317 | if (WARN_ON(irq_limit > NR_IRQS)) | ||
318 | irq_limit = NR_IRQS; | ||
319 | |||
320 | /* | ||
321 | * Setup the Linux IRQ subsystem. | 312 | * Setup the Linux IRQ subsystem. |
322 | */ | 313 | */ |
323 | for (i = irq_start; i < irq_limit; i++) { | 314 | irq_domain_for_each_irq(domain, i, irq) { |
324 | irq_set_chip_and_handler(i, &gic_chip, handle_fasteoi_irq); | 315 | if (i < 32) { |
325 | irq_set_chip_data(i, gic); | 316 | irq_set_percpu_devid(irq); |
326 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | 317 | irq_set_chip_and_handler(irq, &gic_chip, |
318 | handle_percpu_devid_irq); | ||
319 | set_irq_flags(irq, IRQF_VALID | IRQF_NOAUTOEN); | ||
320 | } else { | ||
321 | irq_set_chip_and_handler(irq, &gic_chip, | ||
322 | handle_fasteoi_irq); | ||
323 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | ||
324 | } | ||
325 | irq_set_chip_data(irq, gic); | ||
327 | } | 326 | } |
328 | 327 | ||
329 | writel_relaxed(1, base + GIC_DIST_CTRL); | 328 | writel_relaxed(1, base + GIC_DIST_CTRL); |
@@ -535,23 +534,85 @@ static void __init gic_pm_init(struct gic_chip_data *gic) | |||
535 | } | 534 | } |
536 | #endif | 535 | #endif |
537 | 536 | ||
538 | void __init gic_init(unsigned int gic_nr, unsigned int irq_start, | 537 | #ifdef CONFIG_OF |
538 | static int gic_irq_domain_dt_translate(struct irq_domain *d, | ||
539 | struct device_node *controller, | ||
540 | const u32 *intspec, unsigned int intsize, | ||
541 | unsigned long *out_hwirq, unsigned int *out_type) | ||
542 | { | ||
543 | if (d->of_node != controller) | ||
544 | return -EINVAL; | ||
545 | if (intsize < 3) | ||
546 | return -EINVAL; | ||
547 | |||
548 | /* Get the interrupt number and add 16 to skip over SGIs */ | ||
549 | *out_hwirq = intspec[1] + 16; | ||
550 | |||
551 | /* For SPIs, we need to add 16 more to get the GIC irq ID number */ | ||
552 | if (!intspec[0]) | ||
553 | *out_hwirq += 16; | ||
554 | |||
555 | *out_type = intspec[2] & IRQ_TYPE_SENSE_MASK; | ||
556 | return 0; | ||
557 | } | ||
558 | #endif | ||
559 | |||
560 | const struct irq_domain_ops gic_irq_domain_ops = { | ||
561 | #ifdef CONFIG_OF | ||
562 | .dt_translate = gic_irq_domain_dt_translate, | ||
563 | #endif | ||
564 | }; | ||
565 | |||
566 | void __init gic_init(unsigned int gic_nr, int irq_start, | ||
539 | void __iomem *dist_base, void __iomem *cpu_base) | 567 | void __iomem *dist_base, void __iomem *cpu_base) |
540 | { | 568 | { |
541 | struct gic_chip_data *gic; | 569 | struct gic_chip_data *gic; |
570 | struct irq_domain *domain; | ||
571 | int gic_irqs; | ||
542 | 572 | ||
543 | BUG_ON(gic_nr >= MAX_GIC_NR); | 573 | BUG_ON(gic_nr >= MAX_GIC_NR); |
544 | 574 | ||
545 | gic = &gic_data[gic_nr]; | 575 | gic = &gic_data[gic_nr]; |
576 | domain = &gic->domain; | ||
546 | gic->dist_base = dist_base; | 577 | gic->dist_base = dist_base; |
547 | gic->cpu_base = cpu_base; | 578 | gic->cpu_base = cpu_base; |
548 | gic->irq_offset = (irq_start - 1) & ~31; | ||
549 | 579 | ||
550 | if (gic_nr == 0) | 580 | /* |
581 | * For primary GICs, skip over SGIs. | ||
582 | * For secondary GICs, skip over PPIs, too. | ||
583 | */ | ||
584 | if (gic_nr == 0) { | ||
551 | gic_cpu_base_addr = cpu_base; | 585 | gic_cpu_base_addr = cpu_base; |
586 | domain->hwirq_base = 16; | ||
587 | if (irq_start > 0) | ||
588 | irq_start = (irq_start & ~31) + 16; | ||
589 | } else | ||
590 | domain->hwirq_base = 32; | ||
591 | |||
592 | /* | ||
593 | * Find out how many interrupts are supported. | ||
594 | * The GIC only supports up to 1020 interrupt sources. | ||
595 | */ | ||
596 | gic_irqs = readl_relaxed(dist_base + GIC_DIST_CTR) & 0x1f; | ||
597 | gic_irqs = (gic_irqs + 1) * 32; | ||
598 | if (gic_irqs > 1020) | ||
599 | gic_irqs = 1020; | ||
600 | gic->gic_irqs = gic_irqs; | ||
601 | |||
602 | domain->nr_irq = gic_irqs - domain->hwirq_base; | ||
603 | domain->irq_base = irq_alloc_descs(irq_start, 16, domain->nr_irq, | ||
604 | numa_node_id()); | ||
605 | if (IS_ERR_VALUE(domain->irq_base)) { | ||
606 | WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n", | ||
607 | irq_start); | ||
608 | domain->irq_base = irq_start; | ||
609 | } | ||
610 | domain->priv = gic; | ||
611 | domain->ops = &gic_irq_domain_ops; | ||
612 | irq_domain_add(domain); | ||
552 | 613 | ||
553 | gic_chip.flags |= gic_arch_extn.flags; | 614 | gic_chip.flags |= gic_arch_extn.flags; |
554 | gic_dist_init(gic, irq_start); | 615 | gic_dist_init(gic); |
555 | gic_cpu_init(gic); | 616 | gic_cpu_init(gic); |
556 | gic_pm_init(gic); | 617 | gic_pm_init(gic); |
557 | } | 618 | } |
@@ -563,16 +624,6 @@ void __cpuinit gic_secondary_init(unsigned int gic_nr) | |||
563 | gic_cpu_init(&gic_data[gic_nr]); | 624 | gic_cpu_init(&gic_data[gic_nr]); |
564 | } | 625 | } |
565 | 626 | ||
566 | void __cpuinit gic_enable_ppi(unsigned int irq) | ||
567 | { | ||
568 | unsigned long flags; | ||
569 | |||
570 | local_irq_save(flags); | ||
571 | irq_set_status_flags(irq, IRQ_NOPROBE); | ||
572 | gic_unmask_irq(irq_get_irq_data(irq)); | ||
573 | local_irq_restore(flags); | ||
574 | } | ||
575 | |||
576 | #ifdef CONFIG_SMP | 627 | #ifdef CONFIG_SMP |
577 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) | 628 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) |
578 | { | 629 | { |
@@ -593,3 +644,35 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) | |||
593 | writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); | 644 | writel_relaxed(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT); |
594 | } | 645 | } |
595 | #endif | 646 | #endif |
647 | |||
648 | #ifdef CONFIG_OF | ||
649 | static int gic_cnt __initdata = 0; | ||
650 | |||
651 | int __init gic_of_init(struct device_node *node, struct device_node *parent) | ||
652 | { | ||
653 | void __iomem *cpu_base; | ||
654 | void __iomem *dist_base; | ||
655 | int irq; | ||
656 | struct irq_domain *domain = &gic_data[gic_cnt].domain; | ||
657 | |||
658 | if (WARN_ON(!node)) | ||
659 | return -ENODEV; | ||
660 | |||
661 | dist_base = of_iomap(node, 0); | ||
662 | WARN(!dist_base, "unable to map gic dist registers\n"); | ||
663 | |||
664 | cpu_base = of_iomap(node, 1); | ||
665 | WARN(!cpu_base, "unable to map gic cpu registers\n"); | ||
666 | |||
667 | domain->of_node = of_node_get(node); | ||
668 | |||
669 | gic_init(gic_cnt, -1, dist_base, cpu_base); | ||
670 | |||
671 | if (parent) { | ||
672 | irq = irq_of_parse_and_map(node, 0); | ||
673 | gic_cascade_irq(gic_cnt, irq); | ||
674 | } | ||
675 | gic_cnt++; | ||
676 | return 0; | ||
677 | } | ||
678 | #endif | ||
diff --git a/arch/arm/include/asm/entry-macro-multi.S b/arch/arm/include/asm/entry-macro-multi.S index 2f1e2098dfe7..88d61815f0c0 100644 --- a/arch/arm/include/asm/entry-macro-multi.S +++ b/arch/arm/include/asm/entry-macro-multi.S | |||
@@ -25,13 +25,6 @@ | |||
25 | movne r1, sp | 25 | movne r1, sp |
26 | adrne lr, BSYM(1b) | 26 | adrne lr, BSYM(1b) |
27 | bne do_IPI | 27 | bne do_IPI |
28 | |||
29 | #ifdef CONFIG_LOCAL_TIMERS | ||
30 | test_for_ltirq r0, r2, r6, lr | ||
31 | movne r0, sp | ||
32 | adrne lr, BSYM(1b) | ||
33 | bne do_local_timer | ||
34 | #endif | ||
35 | #endif | 28 | #endif |
36 | 9997: | 29 | 9997: |
37 | .endm | 30 | .endm |
diff --git a/arch/arm/include/asm/hardirq.h b/arch/arm/include/asm/hardirq.h index 89ad1805e579..ddf07a92a6c8 100644 --- a/arch/arm/include/asm/hardirq.h +++ b/arch/arm/include/asm/hardirq.h | |||
@@ -9,9 +9,6 @@ | |||
9 | 9 | ||
10 | typedef struct { | 10 | typedef struct { |
11 | unsigned int __softirq_pending; | 11 | unsigned int __softirq_pending; |
12 | #ifdef CONFIG_LOCAL_TIMERS | ||
13 | unsigned int local_timer_irqs; | ||
14 | #endif | ||
15 | #ifdef CONFIG_SMP | 12 | #ifdef CONFIG_SMP |
16 | unsigned int ipi_irqs[NR_IPI]; | 13 | unsigned int ipi_irqs[NR_IPI]; |
17 | #endif | 14 | #endif |
diff --git a/arch/arm/include/asm/hardware/entry-macro-gic.S b/arch/arm/include/asm/hardware/entry-macro-gic.S index c115b82fe80a..74ebc803904d 100644 --- a/arch/arm/include/asm/hardware/entry-macro-gic.S +++ b/arch/arm/include/asm/hardware/entry-macro-gic.S | |||
@@ -22,15 +22,11 @@ | |||
22 | * interrupt controller spec. To wit: | 22 | * interrupt controller spec. To wit: |
23 | * | 23 | * |
24 | * Interrupts 0-15 are IPI | 24 | * Interrupts 0-15 are IPI |
25 | * 16-28 are reserved | 25 | * 16-31 are local. We allow 30 to be used for the watchdog. |
26 | * 29-31 are local. We allow 30 to be used for the watchdog. | ||
27 | * 32-1020 are global | 26 | * 32-1020 are global |
28 | * 1021-1022 are reserved | 27 | * 1021-1022 are reserved |
29 | * 1023 is "spurious" (no interrupt) | 28 | * 1023 is "spurious" (no interrupt) |
30 | * | 29 | * |
31 | * For now, we ignore all local interrupts so only return an interrupt if it's | ||
32 | * between 30 and 1020. The test_for_ipi routine below will pick up on IPIs. | ||
33 | * | ||
34 | * A simple read from the controller will tell us the number of the highest | 30 | * A simple read from the controller will tell us the number of the highest |
35 | * priority enabled interrupt. We then just need to check whether it is in the | 31 | * priority enabled interrupt. We then just need to check whether it is in the |
36 | * valid range for an IRQ (30-1020 inclusive). | 32 | * valid range for an IRQ (30-1020 inclusive). |
@@ -43,7 +39,7 @@ | |||
43 | 39 | ||
44 | ldr \tmp, =1021 | 40 | ldr \tmp, =1021 |
45 | bic \irqnr, \irqstat, #0x1c00 | 41 | bic \irqnr, \irqstat, #0x1c00 |
46 | cmp \irqnr, #29 | 42 | cmp \irqnr, #15 |
47 | cmpcc \irqnr, \irqnr | 43 | cmpcc \irqnr, \irqnr |
48 | cmpne \irqnr, \tmp | 44 | cmpne \irqnr, \tmp |
49 | cmpcs \irqnr, \irqnr | 45 | cmpcs \irqnr, \irqnr |
@@ -62,14 +58,3 @@ | |||
62 | strcc \irqstat, [\base, #GIC_CPU_EOI] | 58 | strcc \irqstat, [\base, #GIC_CPU_EOI] |
63 | cmpcs \irqnr, \irqnr | 59 | cmpcs \irqnr, \irqnr |
64 | .endm | 60 | .endm |
65 | |||
66 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
67 | |||
68 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
69 | bic \irqnr, \irqstat, #0x1c00 | ||
70 | mov \tmp, #0 | ||
71 | cmp \irqnr, #29 | ||
72 | moveq \tmp, #1 | ||
73 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
74 | cmp \tmp, #0 | ||
75 | .endm | ||
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index c5627057b1c7..3e91f22046f5 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h | |||
@@ -33,17 +33,19 @@ | |||
33 | #define GIC_DIST_SOFTINT 0xf00 | 33 | #define GIC_DIST_SOFTINT 0xf00 |
34 | 34 | ||
35 | #ifndef __ASSEMBLY__ | 35 | #ifndef __ASSEMBLY__ |
36 | #include <linux/irqdomain.h> | ||
37 | struct device_node; | ||
38 | |||
36 | extern void __iomem *gic_cpu_base_addr; | 39 | extern void __iomem *gic_cpu_base_addr; |
37 | extern struct irq_chip gic_arch_extn; | 40 | extern struct irq_chip gic_arch_extn; |
38 | 41 | ||
39 | void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); | 42 | void gic_init(unsigned int, int, void __iomem *, void __iomem *); |
43 | int gic_of_init(struct device_node *node, struct device_node *parent); | ||
40 | void gic_secondary_init(unsigned int); | 44 | void gic_secondary_init(unsigned int); |
41 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); | 45 | void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |
42 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); | 46 | void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); |
43 | void gic_enable_ppi(unsigned int); | ||
44 | 47 | ||
45 | struct gic_chip_data { | 48 | struct gic_chip_data { |
46 | unsigned int irq_offset; | ||
47 | void __iomem *dist_base; | 49 | void __iomem *dist_base; |
48 | void __iomem *cpu_base; | 50 | void __iomem *cpu_base; |
49 | #ifdef CONFIG_CPU_PM | 51 | #ifdef CONFIG_CPU_PM |
@@ -53,6 +55,9 @@ struct gic_chip_data { | |||
53 | u32 __percpu *saved_ppi_enable; | 55 | u32 __percpu *saved_ppi_enable; |
54 | u32 __percpu *saved_ppi_conf; | 56 | u32 __percpu *saved_ppi_conf; |
55 | #endif | 57 | #endif |
58 | #ifdef CONFIG_IRQ_DOMAIN | ||
59 | struct irq_domain domain; | ||
60 | #endif | ||
56 | unsigned int gic_irqs; | 61 | unsigned int gic_irqs; |
57 | }; | 62 | }; |
58 | #endif | 63 | #endif |
diff --git a/arch/arm/include/asm/localtimer.h b/arch/arm/include/asm/localtimer.h index 3306f281333c..f5e1cec7e35c 100644 --- a/arch/arm/include/asm/localtimer.h +++ b/arch/arm/include/asm/localtimer.h | |||
@@ -10,6 +10,8 @@ | |||
10 | #ifndef __ASM_ARM_LOCALTIMER_H | 10 | #ifndef __ASM_ARM_LOCALTIMER_H |
11 | #define __ASM_ARM_LOCALTIMER_H | 11 | #define __ASM_ARM_LOCALTIMER_H |
12 | 12 | ||
13 | #include <linux/interrupt.h> | ||
14 | |||
13 | struct clock_event_device; | 15 | struct clock_event_device; |
14 | 16 | ||
15 | /* | 17 | /* |
@@ -17,31 +19,20 @@ struct clock_event_device; | |||
17 | */ | 19 | */ |
18 | void percpu_timer_setup(void); | 20 | void percpu_timer_setup(void); |
19 | 21 | ||
20 | /* | ||
21 | * Called from assembly, this is the local timer IRQ handler | ||
22 | */ | ||
23 | asmlinkage void do_local_timer(struct pt_regs *); | ||
24 | |||
25 | /* | ||
26 | * Called from C code | ||
27 | */ | ||
28 | void handle_local_timer(struct pt_regs *); | ||
29 | |||
30 | #ifdef CONFIG_LOCAL_TIMERS | 22 | #ifdef CONFIG_LOCAL_TIMERS |
31 | 23 | ||
32 | #ifdef CONFIG_HAVE_ARM_TWD | 24 | #ifdef CONFIG_HAVE_ARM_TWD |
33 | 25 | ||
34 | #include "smp_twd.h" | 26 | #include "smp_twd.h" |
35 | 27 | ||
36 | #define local_timer_ack() twd_timer_ack() | 28 | #define local_timer_stop(c) twd_timer_stop((c)) |
37 | 29 | ||
38 | #else | 30 | #else |
39 | 31 | ||
40 | /* | 32 | /* |
41 | * Platform provides this to acknowledge a local timer IRQ. | 33 | * Stop the local timer |
42 | * Returns true if the local timer IRQ is to be processed. | ||
43 | */ | 34 | */ |
44 | int local_timer_ack(void); | 35 | void local_timer_stop(struct clock_event_device *); |
45 | 36 | ||
46 | #endif | 37 | #endif |
47 | 38 | ||
@@ -56,6 +47,10 @@ static inline int local_timer_setup(struct clock_event_device *evt) | |||
56 | { | 47 | { |
57 | return -ENXIO; | 48 | return -ENXIO; |
58 | } | 49 | } |
50 | |||
51 | static inline void local_timer_stop(struct clock_event_device *evt) | ||
52 | { | ||
53 | } | ||
59 | #endif | 54 | #endif |
60 | 55 | ||
61 | #endif | 56 | #endif |
diff --git a/arch/arm/include/asm/memory.h b/arch/arm/include/asm/memory.h index 652fccca4952..a8997d71084e 100644 --- a/arch/arm/include/asm/memory.h +++ b/arch/arm/include/asm/memory.h | |||
@@ -16,9 +16,12 @@ | |||
16 | #include <linux/compiler.h> | 16 | #include <linux/compiler.h> |
17 | #include <linux/const.h> | 17 | #include <linux/const.h> |
18 | #include <linux/types.h> | 18 | #include <linux/types.h> |
19 | #include <mach/memory.h> | ||
20 | #include <asm/sizes.h> | 19 | #include <asm/sizes.h> |
21 | 20 | ||
21 | #ifdef CONFIG_NEED_MACH_MEMORY_H | ||
22 | #include <mach/memory.h> | ||
23 | #endif | ||
24 | |||
22 | /* | 25 | /* |
23 | * Allow for constants defined here to be used from assembly code | 26 | * Allow for constants defined here to be used from assembly code |
24 | * by prepending the UL suffix only with actual C code compilation. | 27 | * by prepending the UL suffix only with actual C code compilation. |
@@ -151,7 +154,6 @@ | |||
151 | * so that all we need to do is modify the 8-bit constant field. | 154 | * so that all we need to do is modify the 8-bit constant field. |
152 | */ | 155 | */ |
153 | #define __PV_BITS_31_24 0x81000000 | 156 | #define __PV_BITS_31_24 0x81000000 |
154 | #define __PV_BITS_23_16 0x00810000 | ||
155 | 157 | ||
156 | extern unsigned long __pv_phys_offset; | 158 | extern unsigned long __pv_phys_offset; |
157 | #define PHYS_OFFSET __pv_phys_offset | 159 | #define PHYS_OFFSET __pv_phys_offset |
@@ -169,9 +171,6 @@ static inline unsigned long __virt_to_phys(unsigned long x) | |||
169 | { | 171 | { |
170 | unsigned long t; | 172 | unsigned long t; |
171 | __pv_stub(x, t, "add", __PV_BITS_31_24); | 173 | __pv_stub(x, t, "add", __PV_BITS_31_24); |
172 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | ||
173 | __pv_stub(t, t, "add", __PV_BITS_23_16); | ||
174 | #endif | ||
175 | return t; | 174 | return t; |
176 | } | 175 | } |
177 | 176 | ||
@@ -179,9 +178,6 @@ static inline unsigned long __phys_to_virt(unsigned long x) | |||
179 | { | 178 | { |
180 | unsigned long t; | 179 | unsigned long t; |
181 | __pv_stub(x, t, "sub", __PV_BITS_31_24); | 180 | __pv_stub(x, t, "sub", __PV_BITS_31_24); |
182 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | ||
183 | __pv_stub(t, t, "sub", __PV_BITS_23_16); | ||
184 | #endif | ||
185 | return t; | 181 | return t; |
186 | } | 182 | } |
187 | #else | 183 | #else |
@@ -191,7 +187,11 @@ static inline unsigned long __phys_to_virt(unsigned long x) | |||
191 | #endif | 187 | #endif |
192 | 188 | ||
193 | #ifndef PHYS_OFFSET | 189 | #ifndef PHYS_OFFSET |
190 | #ifdef PLAT_PHYS_OFFSET | ||
194 | #define PHYS_OFFSET PLAT_PHYS_OFFSET | 191 | #define PHYS_OFFSET PLAT_PHYS_OFFSET |
192 | #else | ||
193 | #define PHYS_OFFSET UL(CONFIG_PHYS_OFFSET) | ||
194 | #endif | ||
195 | #endif | 195 | #endif |
196 | 196 | ||
197 | /* | 197 | /* |
diff --git a/arch/arm/include/asm/module.h b/arch/arm/include/asm/module.h index 543b44916d2c..6c6809f982f1 100644 --- a/arch/arm/include/asm/module.h +++ b/arch/arm/include/asm/module.h | |||
@@ -31,11 +31,7 @@ struct mod_arch_specific { | |||
31 | 31 | ||
32 | /* Add __virt_to_phys patching state as well */ | 32 | /* Add __virt_to_phys patching state as well */ |
33 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT | 33 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT |
34 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | ||
35 | #define MODULE_ARCH_VERMAGIC_P2V "p2v16 " | ||
36 | #else | ||
37 | #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " | 34 | #define MODULE_ARCH_VERMAGIC_P2V "p2v8 " |
38 | #endif | ||
39 | #else | 35 | #else |
40 | #define MODULE_ARCH_VERMAGIC_P2V "" | 36 | #define MODULE_ARCH_VERMAGIC_P2V "" |
41 | #endif | 37 | #endif |
diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 0a17b62538c2..1e5717afc4ac 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h | |||
@@ -99,9 +99,4 @@ extern void platform_cpu_enable(unsigned int cpu); | |||
99 | extern void arch_send_call_function_single_ipi(int cpu); | 99 | extern void arch_send_call_function_single_ipi(int cpu); |
100 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); | 100 | extern void arch_send_call_function_ipi_mask(const struct cpumask *mask); |
101 | 101 | ||
102 | /* | ||
103 | * show local interrupt info | ||
104 | */ | ||
105 | extern void show_local_irqs(struct seq_file *, int); | ||
106 | |||
107 | #endif /* ifndef __ASM_ARM_SMP_H */ | 102 | #endif /* ifndef __ASM_ARM_SMP_H */ |
diff --git a/arch/arm/include/asm/smp_twd.h b/arch/arm/include/asm/smp_twd.h index fed9981fba08..ef9ffba97ad8 100644 --- a/arch/arm/include/asm/smp_twd.h +++ b/arch/arm/include/asm/smp_twd.h | |||
@@ -22,7 +22,7 @@ struct clock_event_device; | |||
22 | 22 | ||
23 | extern void __iomem *twd_base; | 23 | extern void __iomem *twd_base; |
24 | 24 | ||
25 | int twd_timer_ack(void); | ||
26 | void twd_timer_setup(struct clock_event_device *); | 25 | void twd_timer_setup(struct clock_event_device *); |
26 | void twd_timer_stop(struct clock_event_device *); | ||
27 | 27 | ||
28 | #endif | 28 | #endif |
diff --git a/arch/arm/kernel/debug.S b/arch/arm/kernel/debug.S index bcd66e00bdbe..b7685f1bb04a 100644 --- a/arch/arm/kernel/debug.S +++ b/arch/arm/kernel/debug.S | |||
@@ -22,7 +22,7 @@ | |||
22 | #if defined(CONFIG_DEBUG_ICEDCC) | 22 | #if defined(CONFIG_DEBUG_ICEDCC) |
23 | @@ debug using ARM EmbeddedICE DCC channel | 23 | @@ debug using ARM EmbeddedICE DCC channel |
24 | 24 | ||
25 | .macro addruart, rp, rv | 25 | .macro addruart, rp, rv, tmp |
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) | 28 | #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) |
@@ -106,7 +106,7 @@ | |||
106 | 106 | ||
107 | #ifdef CONFIG_MMU | 107 | #ifdef CONFIG_MMU |
108 | .macro addruart_current, rx, tmp1, tmp2 | 108 | .macro addruart_current, rx, tmp1, tmp2 |
109 | addruart \tmp1, \tmp2 | 109 | addruart \tmp1, \tmp2, \rx |
110 | mrc p15, 0, \rx, c1, c0 | 110 | mrc p15, 0, \rx, c1, c0 |
111 | tst \rx, #1 | 111 | tst \rx, #1 |
112 | moveq \rx, \tmp1 | 112 | moveq \rx, \tmp1 |
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 742b6108a001..673c806cc106 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S | |||
@@ -95,7 +95,7 @@ ENTRY(stext) | |||
95 | sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) | 95 | sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET) |
96 | add r8, r8, r4 @ PHYS_OFFSET | 96 | add r8, r8, r4 @ PHYS_OFFSET |
97 | #else | 97 | #else |
98 | ldr r8, =PLAT_PHYS_OFFSET | 98 | ldr r8, =PHYS_OFFSET @ always constant in this case |
99 | #endif | 99 | #endif |
100 | 100 | ||
101 | /* | 101 | /* |
@@ -234,7 +234,7 @@ __create_page_tables: | |||
234 | * This allows debug messages to be output | 234 | * This allows debug messages to be output |
235 | * via a serial console before paging_init. | 235 | * via a serial console before paging_init. |
236 | */ | 236 | */ |
237 | addruart r7, r3 | 237 | addruart r7, r3, r0 |
238 | 238 | ||
239 | mov r3, r3, lsr #20 | 239 | mov r3, r3, lsr #20 |
240 | mov r3, r3, lsl #2 | 240 | mov r3, r3, lsl #2 |
@@ -488,13 +488,8 @@ __fixup_pv_table: | |||
488 | add r5, r5, r3 @ adjust table end address | 488 | add r5, r5, r3 @ adjust table end address |
489 | add r7, r7, r3 @ adjust __pv_phys_offset address | 489 | add r7, r7, r3 @ adjust __pv_phys_offset address |
490 | str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset | 490 | str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset |
491 | #ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | ||
492 | mov r6, r3, lsr #24 @ constant for add/sub instructions | 491 | mov r6, r3, lsr #24 @ constant for add/sub instructions |
493 | teq r3, r6, lsl #24 @ must be 16MiB aligned | 492 | teq r3, r6, lsl #24 @ must be 16MiB aligned |
494 | #else | ||
495 | mov r6, r3, lsr #16 @ constant for add/sub instructions | ||
496 | teq r3, r6, lsl #16 @ must be 64kiB aligned | ||
497 | #endif | ||
498 | THUMB( it ne @ cross section branch ) | 493 | THUMB( it ne @ cross section branch ) |
499 | bne __error | 494 | bne __error |
500 | str r6, [r7, #4] @ save to __pv_offset | 495 | str r6, [r7, #4] @ save to __pv_offset |
@@ -510,20 +505,8 @@ ENDPROC(__fixup_pv_table) | |||
510 | .text | 505 | .text |
511 | __fixup_a_pv_table: | 506 | __fixup_a_pv_table: |
512 | #ifdef CONFIG_THUMB2_KERNEL | 507 | #ifdef CONFIG_THUMB2_KERNEL |
513 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | 508 | lsls r6, #24 |
514 | lsls r0, r6, #24 | 509 | beq 2f |
515 | lsr r6, #8 | ||
516 | beq 1f | ||
517 | clz r7, r0 | ||
518 | lsr r0, #24 | ||
519 | lsl r0, r7 | ||
520 | bic r0, 0x0080 | ||
521 | lsrs r7, #1 | ||
522 | orrcs r0, #0x0080 | ||
523 | orr r0, r0, r7, lsl #12 | ||
524 | #endif | ||
525 | 1: lsls r6, #24 | ||
526 | beq 4f | ||
527 | clz r7, r6 | 510 | clz r7, r6 |
528 | lsr r6, #24 | 511 | lsr r6, #24 |
529 | lsl r6, r7 | 512 | lsl r6, r7 |
@@ -532,43 +515,25 @@ __fixup_a_pv_table: | |||
532 | orrcs r6, #0x0080 | 515 | orrcs r6, #0x0080 |
533 | orr r6, r6, r7, lsl #12 | 516 | orr r6, r6, r7, lsl #12 |
534 | orr r6, #0x4000 | 517 | orr r6, #0x4000 |
535 | b 4f | 518 | b 2f |
536 | 2: @ at this point the C flag is always clear | 519 | 1: add r7, r3 |
537 | add r7, r3 | 520 | ldrh ip, [r7, #2] |
538 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | ||
539 | ldrh ip, [r7] | ||
540 | tst ip, 0x0400 @ the i bit tells us LS or MS byte | ||
541 | beq 3f | ||
542 | cmp r0, #0 @ set C flag, and ... | ||
543 | biceq ip, 0x0400 @ immediate zero value has a special encoding | ||
544 | streqh ip, [r7] @ that requires the i bit cleared | ||
545 | #endif | ||
546 | 3: ldrh ip, [r7, #2] | ||
547 | and ip, 0x8f00 | 521 | and ip, 0x8f00 |
548 | orrcc ip, r6 @ mask in offset bits 31-24 | 522 | orr ip, r6 @ mask in offset bits 31-24 |
549 | orrcs ip, r0 @ mask in offset bits 23-16 | ||
550 | strh ip, [r7, #2] | 523 | strh ip, [r7, #2] |
551 | 4: cmp r4, r5 | 524 | 2: cmp r4, r5 |
552 | ldrcc r7, [r4], #4 @ use branch for delay slot | 525 | ldrcc r7, [r4], #4 @ use branch for delay slot |
553 | bcc 2b | 526 | bcc 1b |
554 | bx lr | 527 | bx lr |
555 | #else | 528 | #else |
556 | #ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT | 529 | b 2f |
557 | and r0, r6, #255 @ offset bits 23-16 | 530 | 1: ldr ip, [r7, r3] |
558 | mov r6, r6, lsr #8 @ offset bits 31-24 | ||
559 | #else | ||
560 | mov r0, #0 @ just in case... | ||
561 | #endif | ||
562 | b 3f | ||
563 | 2: ldr ip, [r7, r3] | ||
564 | bic ip, ip, #0x000000ff | 531 | bic ip, ip, #0x000000ff |
565 | tst ip, #0x400 @ rotate shift tells us LS or MS byte | 532 | orr ip, ip, r6 @ mask in offset bits 31-24 |
566 | orrne ip, ip, r6 @ mask in offset bits 31-24 | ||
567 | orreq ip, ip, r0 @ mask in offset bits 23-16 | ||
568 | str ip, [r7, r3] | 533 | str ip, [r7, r3] |
569 | 3: cmp r4, r5 | 534 | 2: cmp r4, r5 |
570 | ldrcc r7, [r4], #4 @ use branch for delay slot | 535 | ldrcc r7, [r4], #4 @ use branch for delay slot |
571 | bcc 2b | 536 | bcc 1b |
572 | mov pc, lr | 537 | mov pc, lr |
573 | #endif | 538 | #endif |
574 | ENDPROC(__fixup_a_pv_table) | 539 | ENDPROC(__fixup_a_pv_table) |
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c index 53919b230e8b..7cb29261249a 100644 --- a/arch/arm/kernel/irq.c +++ b/arch/arm/kernel/irq.c | |||
@@ -59,9 +59,6 @@ int arch_show_interrupts(struct seq_file *p, int prec) | |||
59 | #ifdef CONFIG_SMP | 59 | #ifdef CONFIG_SMP |
60 | show_ipi_list(p, prec); | 60 | show_ipi_list(p, prec); |
61 | #endif | 61 | #endif |
62 | #ifdef CONFIG_LOCAL_TIMERS | ||
63 | show_local_irqs(p, prec); | ||
64 | #endif | ||
65 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); | 62 | seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); |
66 | return 0; | 63 | return 0; |
67 | } | 64 | } |
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 35417d0fb8ab..a96c08cd6125 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c | |||
@@ -457,10 +457,6 @@ u64 smp_irq_stat_cpu(unsigned int cpu) | |||
457 | for (i = 0; i < NR_IPI; i++) | 457 | for (i = 0; i < NR_IPI; i++) |
458 | sum += __get_irq_stat(cpu, ipi_irqs[i]); | 458 | sum += __get_irq_stat(cpu, ipi_irqs[i]); |
459 | 459 | ||
460 | #ifdef CONFIG_LOCAL_TIMERS | ||
461 | sum += __get_irq_stat(cpu, local_timer_irqs); | ||
462 | #endif | ||
463 | |||
464 | return sum; | 460 | return sum; |
465 | } | 461 | } |
466 | 462 | ||
@@ -477,38 +473,6 @@ static void ipi_timer(void) | |||
477 | irq_exit(); | 473 | irq_exit(); |
478 | } | 474 | } |
479 | 475 | ||
480 | #ifdef CONFIG_LOCAL_TIMERS | ||
481 | asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs) | ||
482 | { | ||
483 | handle_local_timer(regs); | ||
484 | } | ||
485 | |||
486 | void handle_local_timer(struct pt_regs *regs) | ||
487 | { | ||
488 | struct pt_regs *old_regs = set_irq_regs(regs); | ||
489 | int cpu = smp_processor_id(); | ||
490 | |||
491 | if (local_timer_ack()) { | ||
492 | __inc_irq_stat(cpu, local_timer_irqs); | ||
493 | ipi_timer(); | ||
494 | } | ||
495 | |||
496 | set_irq_regs(old_regs); | ||
497 | } | ||
498 | |||
499 | void show_local_irqs(struct seq_file *p, int prec) | ||
500 | { | ||
501 | unsigned int cpu; | ||
502 | |||
503 | seq_printf(p, "%*s: ", prec, "LOC"); | ||
504 | |||
505 | for_each_present_cpu(cpu) | ||
506 | seq_printf(p, "%10u ", __get_irq_stat(cpu, local_timer_irqs)); | ||
507 | |||
508 | seq_printf(p, " Local timer interrupts\n"); | ||
509 | } | ||
510 | #endif | ||
511 | |||
512 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST | 476 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
513 | static void smp_timer_broadcast(const struct cpumask *mask) | 477 | static void smp_timer_broadcast(const struct cpumask *mask) |
514 | { | 478 | { |
@@ -559,7 +523,7 @@ static void percpu_timer_stop(void) | |||
559 | unsigned int cpu = smp_processor_id(); | 523 | unsigned int cpu = smp_processor_id(); |
560 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); | 524 | struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu); |
561 | 525 | ||
562 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); | 526 | local_timer_stop(evt); |
563 | } | 527 | } |
564 | #endif | 528 | #endif |
565 | 529 | ||
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c index 01c186222f3b..a8a6682d6b52 100644 --- a/arch/arm/kernel/smp_twd.c +++ b/arch/arm/kernel/smp_twd.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/io.h> | 19 | #include <linux/io.h> |
20 | 20 | ||
21 | #include <asm/smp_twd.h> | 21 | #include <asm/smp_twd.h> |
22 | #include <asm/localtimer.h> | ||
22 | #include <asm/hardware/gic.h> | 23 | #include <asm/hardware/gic.h> |
23 | 24 | ||
24 | /* set up by the platform code */ | 25 | /* set up by the platform code */ |
@@ -26,6 +27,8 @@ void __iomem *twd_base; | |||
26 | 27 | ||
27 | static unsigned long twd_timer_rate; | 28 | static unsigned long twd_timer_rate; |
28 | 29 | ||
30 | static struct clock_event_device __percpu **twd_evt; | ||
31 | |||
29 | static void twd_set_mode(enum clock_event_mode mode, | 32 | static void twd_set_mode(enum clock_event_mode mode, |
30 | struct clock_event_device *clk) | 33 | struct clock_event_device *clk) |
31 | { | 34 | { |
@@ -80,6 +83,12 @@ int twd_timer_ack(void) | |||
80 | return 0; | 83 | return 0; |
81 | } | 84 | } |
82 | 85 | ||
86 | void twd_timer_stop(struct clock_event_device *clk) | ||
87 | { | ||
88 | twd_set_mode(CLOCK_EVT_MODE_UNUSED, clk); | ||
89 | disable_percpu_irq(clk->irq); | ||
90 | } | ||
91 | |||
83 | static void __cpuinit twd_calibrate_rate(void) | 92 | static void __cpuinit twd_calibrate_rate(void) |
84 | { | 93 | { |
85 | unsigned long count; | 94 | unsigned long count; |
@@ -119,11 +128,43 @@ static void __cpuinit twd_calibrate_rate(void) | |||
119 | } | 128 | } |
120 | } | 129 | } |
121 | 130 | ||
131 | static irqreturn_t twd_handler(int irq, void *dev_id) | ||
132 | { | ||
133 | struct clock_event_device *evt = *(struct clock_event_device **)dev_id; | ||
134 | |||
135 | if (twd_timer_ack()) { | ||
136 | evt->event_handler(evt); | ||
137 | return IRQ_HANDLED; | ||
138 | } | ||
139 | |||
140 | return IRQ_NONE; | ||
141 | } | ||
142 | |||
122 | /* | 143 | /* |
123 | * Setup the local clock events for a CPU. | 144 | * Setup the local clock events for a CPU. |
124 | */ | 145 | */ |
125 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) | 146 | void __cpuinit twd_timer_setup(struct clock_event_device *clk) |
126 | { | 147 | { |
148 | struct clock_event_device **this_cpu_clk; | ||
149 | |||
150 | if (!twd_evt) { | ||
151 | int err; | ||
152 | |||
153 | twd_evt = alloc_percpu(struct clock_event_device *); | ||
154 | if (!twd_evt) { | ||
155 | pr_err("twd: can't allocate memory\n"); | ||
156 | return; | ||
157 | } | ||
158 | |||
159 | err = request_percpu_irq(clk->irq, twd_handler, | ||
160 | "twd", twd_evt); | ||
161 | if (err) { | ||
162 | pr_err("twd: can't register interrupt %d (%d)\n", | ||
163 | clk->irq, err); | ||
164 | return; | ||
165 | } | ||
166 | } | ||
167 | |||
127 | twd_calibrate_rate(); | 168 | twd_calibrate_rate(); |
128 | 169 | ||
129 | clk->name = "local_timer"; | 170 | clk->name = "local_timer"; |
@@ -137,8 +178,10 @@ void __cpuinit twd_timer_setup(struct clock_event_device *clk) | |||
137 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); | 178 | clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); |
138 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); | 179 | clk->min_delta_ns = clockevent_delta2ns(0xf, clk); |
139 | 180 | ||
181 | this_cpu_clk = __this_cpu_ptr(twd_evt); | ||
182 | *this_cpu_clk = clk; | ||
183 | |||
140 | clockevents_register_device(clk); | 184 | clockevents_register_device(clk); |
141 | 185 | ||
142 | /* Make sure our local interrupt controller has this enabled */ | 186 | enable_percpu_irq(clk->irq, 0); |
143 | gic_enable_ppi(clk->irq); | ||
144 | } | 187 | } |
diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S index bc1e0b2e2f4f..0ed8648c6452 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/mach-at91/include/mach/debug-macro.S | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/at91_dbgu.h> | 15 | #include <mach/at91_dbgu.h> |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv, tmp |
18 | ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) | 18 | ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) |
19 | ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) | 19 | ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) |
20 | .endm | 20 | .endm |
diff --git a/arch/arm/mach-bcmring/include/mach/hardware.h b/arch/arm/mach-bcmring/include/mach/hardware.h index ed78aabb8e9f..6ae20a649a97 100644 --- a/arch/arm/mach-bcmring/include/mach/hardware.h +++ b/arch/arm/mach-bcmring/include/mach/hardware.h | |||
@@ -22,7 +22,6 @@ | |||
22 | #define __ASM_ARCH_HARDWARE_H | 22 | #define __ASM_ARCH_HARDWARE_H |
23 | 23 | ||
24 | #include <asm/sizes.h> | 24 | #include <asm/sizes.h> |
25 | #include <mach/memory.h> | ||
26 | #include <cfg_global.h> | 25 | #include <cfg_global.h> |
27 | #include <mach/csp/mm_io.h> | 26 | #include <mach/csp/mm_io.h> |
28 | 27 | ||
@@ -31,7 +30,7 @@ | |||
31 | * *_SIZE is the size of the region | 30 | * *_SIZE is the size of the region |
32 | * *_BASE is the virtual address | 31 | * *_BASE is the virtual address |
33 | */ | 32 | */ |
34 | #define RAM_START PLAT_PHYS_OFFSET | 33 | #define RAM_START PHYS_OFFSET |
35 | 34 | ||
36 | #define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED) | 35 | #define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED) |
37 | #define RAM_BASE PAGE_OFFSET | 36 | #define RAM_BASE PAGE_OFFSET |
diff --git a/arch/arm/mach-bcmring/include/mach/memory.h b/arch/arm/mach-bcmring/include/mach/memory.h deleted file mode 100644 index 8848a5bb3445..000000000000 --- a/arch/arm/mach-bcmring/include/mach/memory.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /***************************************************************************** | ||
2 | * Copyright 2005 - 2008 Broadcom Corporation. All rights reserved. | ||
3 | * | ||
4 | * Unless you and Broadcom execute a separate written software license | ||
5 | * agreement governing use of this software, this software is licensed to you | ||
6 | * under the terms of the GNU General Public License version 2, available at | ||
7 | * http://www.broadcom.com/licenses/GPLv2.php (the "GPL"). | ||
8 | * | ||
9 | * Notwithstanding the above, under no circumstances may you combine this | ||
10 | * software in any way with any other Broadcom software provided under a | ||
11 | * license other than the GPL, without Broadcom's express prior written | ||
12 | * consent. | ||
13 | *****************************************************************************/ | ||
14 | |||
15 | #ifndef __ASM_ARCH_MEMORY_H | ||
16 | #define __ASM_ARCH_MEMORY_H | ||
17 | |||
18 | #include <cfg_global.h> | ||
19 | |||
20 | /* | ||
21 | * Physical vs virtual RAM address space conversion. These are | ||
22 | * private definitions which should NOT be used outside memory.h | ||
23 | * files. Use virt_to_phys/phys_to_virt/__pa/__va instead. | ||
24 | */ | ||
25 | |||
26 | #define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-clps711x/include/mach/debug-macro.S b/arch/arm/mach-clps711x/include/mach/debug-macro.S index 507c6873b7ee..b802e8a51831 100644 --- a/arch/arm/mach-clps711x/include/mach/debug-macro.S +++ b/arch/arm/mach-clps711x/include/mach/debug-macro.S | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <asm/hardware/clps7111.h> | 15 | #include <asm/hardware/clps7111.h> |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv, tmp |
18 | #ifndef CONFIG_DEBUG_CLPS711X_UART2 | 18 | #ifndef CONFIG_DEBUG_CLPS711X_UART2 |
19 | mov \rp, #0x0000 @ UART1 | 19 | mov \rp, #0x0000 @ UART1 |
20 | #else | 20 | #else |
diff --git a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S index 56d828634db5..d04c150baa1c 100644 --- a/arch/arm/mach-cns3xxx/include/mach/debug-macro.S +++ b/arch/arm/mach-cns3xxx/include/mach/debug-macro.S | |||
@@ -10,7 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | .macro addruart,rp,rv | 13 | .macro addruart,rp,rv,tmp |
14 | mov \rp, #0x00009000 | 14 | mov \rp, #0x00009000 |
15 | orr \rv, \rp, #0xf0000000 @ virtual base | 15 | orr \rv, \rp, #0xf0000000 @ virtual base |
16 | orr \rp, \rp, #0x10000000 | 16 | orr \rp, \rp, #0x10000000 |
diff --git a/arch/arm/mach-cns3xxx/include/mach/memory.h b/arch/arm/mach-cns3xxx/include/mach/memory.h deleted file mode 100644 index dc16c5c5d86b..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/memory.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2003 ARM Limited | ||
3 | * Copyright 2008 Cavium Networks | ||
4 | * | ||
5 | * This file is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License, Version 2, as | ||
7 | * published by the Free Software Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __MACH_MEMORY_H | ||
11 | #define __MACH_MEMORY_H | ||
12 | |||
13 | /* | ||
14 | * Physical DRAM offset. | ||
15 | */ | ||
16 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
17 | |||
18 | #define __phys_to_bus(x) ((x) + PHYS_OFFSET) | ||
19 | #define __bus_to_phys(x) ((x) - PHYS_OFFSET) | ||
20 | |||
21 | #define __virt_to_bus(v) __phys_to_bus(__virt_to_phys(v)) | ||
22 | #define __bus_to_virt(b) __phys_to_virt(__bus_to_phys(b)) | ||
23 | #define __pfn_to_bus(p) __phys_to_bus(__pfn_to_phys(p)) | ||
24 | #define __bus_to_pfn(b) __phys_to_pfn(__bus_to_phys(b)) | ||
25 | |||
26 | #endif | ||
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c index bd59f31b8a95..0b314bf16f7f 100644 --- a/arch/arm/mach-davinci/cpuidle.c +++ b/arch/arm/mach-davinci/cpuidle.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <asm/proc-fns.h> | 19 | #include <asm/proc-fns.h> |
20 | 20 | ||
21 | #include <mach/cpuidle.h> | 21 | #include <mach/cpuidle.h> |
22 | #include <mach/memory.h> | 22 | #include <mach/ddr2.h> |
23 | 23 | ||
24 | #define DAVINCI_CPUIDLE_MAX_STATES 2 | 24 | #define DAVINCI_CPUIDLE_MAX_STATES 2 |
25 | 25 | ||
diff --git a/arch/arm/mach-davinci/include/mach/ddr2.h b/arch/arm/mach-davinci/include/mach/ddr2.h new file mode 100644 index 000000000000..c19e047d0e6a --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/ddr2.h | |||
@@ -0,0 +1,4 @@ | |||
1 | #define DDR2_SDRCR_OFFSET 0xc | ||
2 | #define DDR2_SRPD_BIT (1 << 23) | ||
3 | #define DDR2_MCLKSTOPEN_BIT (1 << 30) | ||
4 | #define DDR2_LPMODEN_BIT (1 << 31) | ||
diff --git a/arch/arm/mach-davinci/include/mach/debug-macro.S b/arch/arm/mach-davinci/include/mach/debug-macro.S index f8b7ea4f6235..cf94552d5274 100644 --- a/arch/arm/mach-davinci/include/mach/debug-macro.S +++ b/arch/arm/mach-davinci/include/mach/debug-macro.S | |||
@@ -18,56 +18,50 @@ | |||
18 | 18 | ||
19 | #include <linux/serial_reg.h> | 19 | #include <linux/serial_reg.h> |
20 | 20 | ||
21 | #include <asm/memory.h> | ||
22 | |||
23 | #include <mach/serial.h> | 21 | #include <mach/serial.h> |
24 | 22 | ||
25 | #define UART_SHIFT 2 | 23 | #define UART_SHIFT 2 |
26 | 24 | ||
27 | #define davinci_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) | ||
28 | #define davinci_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) | ||
29 | |||
30 | .pushsection .data | 25 | .pushsection .data |
31 | davinci_uart_phys: .word 0 | 26 | davinci_uart_phys: .word 0 |
32 | davinci_uart_virt: .word 0 | 27 | davinci_uart_virt: .word 0 |
33 | .popsection | 28 | .popsection |
34 | 29 | ||
35 | .macro addruart, rp, rv | 30 | .macro addruart, rp, rv, tmp |
36 | 31 | ||
37 | /* Use davinci_uart_phys/virt if already configured */ | 32 | /* Use davinci_uart_phys/virt if already configured */ |
38 | 10: mrc p15, 0, \rp, c1, c0 | 33 | 10: adr \rp, 99f @ get effective addr of 99f |
39 | tst \rp, #1 @ MMU enabled? | 34 | ldr \rv, [\rp] @ get absolute addr of 99f |
40 | ldreq \rp, =davinci_uart_v2p(davinci_uart_phys) | 35 | sub \rv, \rv, \rp @ offset between the two |
41 | ldrne \rp, =davinci_uart_phys | 36 | ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys |
42 | add \rv, \rp, #4 @ davinci_uart_virt | 37 | sub \tmp, \rp, \rv @ make it effective |
43 | ldr \rp, [\rp, #0] | 38 | ldr \rp, [\tmp, #0] @ davinci_uart_phys |
44 | ldr \rv, [\rv, #0] | 39 | ldr \rv, [\tmp, #4] @ davinci_uart_virt |
45 | cmp \rp, #0 @ is port configured? | 40 | cmp \rp, #0 @ is port configured? |
46 | cmpne \rv, #0 | 41 | cmpne \rv, #0 |
47 | bne 99f @ already configured | 42 | bne 100f @ already configured |
48 | 43 | ||
49 | /* Check the debug UART address set in uncompress.h */ | 44 | /* Check the debug UART address set in uncompress.h */ |
50 | mrc p15, 0, \rp, c1, c0 | 45 | and \rp, pc, #0xff000000 |
51 | tst \rp, #1 @ MMU enabled? | 46 | ldr \rv, =DAVINCI_UART_INFO_OFS |
47 | add \rp, \rp, \rv | ||
52 | 48 | ||
53 | /* Copy uart phys address from decompressor uart info */ | 49 | /* Copy uart phys address from decompressor uart info */ |
54 | ldreq \rv, =davinci_uart_v2p(davinci_uart_phys) | 50 | ldr \rv, [\rp, #0] |
55 | ldrne \rv, =davinci_uart_phys | 51 | str \rv, [\tmp, #0] |
56 | ldreq \rp, =DAVINCI_UART_INFO | ||
57 | ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) | ||
58 | ldr \rp, [\rp, #0] | ||
59 | str \rp, [\rv] | ||
60 | 52 | ||
61 | /* Copy uart virt address from decompressor uart info */ | 53 | /* Copy uart virt address from decompressor uart info */ |
62 | ldreq \rv, =davinci_uart_v2p(davinci_uart_virt) | 54 | ldr \rv, [\rp, #4] |
63 | ldrne \rv, =davinci_uart_virt | 55 | str \rv, [\tmp, #4] |
64 | ldreq \rp, =DAVINCI_UART_INFO | ||
65 | ldrne \rp, =davinci_uart_p2v(DAVINCI_UART_INFO) | ||
66 | ldr \rp, [\rp, #4] | ||
67 | str \rp, [\rv] | ||
68 | 56 | ||
69 | b 10b | 57 | b 10b |
70 | 99: | 58 | |
59 | .align | ||
60 | 99: .word . | ||
61 | .word davinci_uart_phys | ||
62 | .ltorg | ||
63 | |||
64 | 100: | ||
71 | .endm | 65 | .endm |
72 | 66 | ||
73 | .macro senduart,rd,rx | 67 | .macro senduart,rd,rx |
diff --git a/arch/arm/mach-davinci/include/mach/memory.h b/arch/arm/mach-davinci/include/mach/memory.h deleted file mode 100644 index 885d23319668..000000000000 --- a/arch/arm/mach-davinci/include/mach/memory.h +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * DaVinci memory space definitions | ||
3 | * | ||
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_MEMORY_H | ||
12 | #define __ASM_ARCH_MEMORY_H | ||
13 | |||
14 | /************************************************************************** | ||
15 | * Included Files | ||
16 | **************************************************************************/ | ||
17 | #include <asm/page.h> | ||
18 | #include <asm/sizes.h> | ||
19 | |||
20 | /************************************************************************** | ||
21 | * Definitions | ||
22 | **************************************************************************/ | ||
23 | #define DAVINCI_DDR_BASE 0x80000000 | ||
24 | #define DA8XX_DDR_BASE 0xc0000000 | ||
25 | |||
26 | #if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx) | ||
27 | #error Cannot enable DaVinci and DA8XX platforms concurrently | ||
28 | #elif defined(CONFIG_ARCH_DAVINCI_DA8XX) | ||
29 | #define PLAT_PHYS_OFFSET DA8XX_DDR_BASE | ||
30 | #else | ||
31 | #define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE | ||
32 | #endif | ||
33 | |||
34 | #define DDR2_SDRCR_OFFSET 0xc | ||
35 | #define DDR2_SRPD_BIT BIT(23) | ||
36 | #define DDR2_MCLKSTOPEN_BIT BIT(30) | ||
37 | #define DDR2_LPMODEN_BIT BIT(31) | ||
38 | |||
39 | #endif /* __ASM_ARCH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h index c9e6ce185a66..e347d88fef91 100644 --- a/arch/arm/mach-davinci/include/mach/serial.h +++ b/arch/arm/mach-davinci/include/mach/serial.h | |||
@@ -21,8 +21,9 @@ | |||
21 | * macros in debug-macro.S. | 21 | * macros in debug-macro.S. |
22 | * | 22 | * |
23 | * This area sits just below the page tables (see arch/arm/kernel/head.S). | 23 | * This area sits just below the page tables (see arch/arm/kernel/head.S). |
24 | * We define it as a relative offset from start of usable RAM. | ||
24 | */ | 25 | */ |
25 | #define DAVINCI_UART_INFO (PLAT_PHYS_OFFSET + 0x3ff8) | 26 | #define DAVINCI_UART_INFO_OFS 0x3ff8 |
26 | 27 | ||
27 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) | 28 | #define DAVINCI_UART0_BASE (IO_PHYS + 0x20000) |
28 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) | 29 | #define DAVINCI_UART1_BASE (IO_PHYS + 0x20400) |
diff --git a/arch/arm/mach-davinci/include/mach/uncompress.h b/arch/arm/mach-davinci/include/mach/uncompress.h index 78d80683cdc2..9dc7cf9664fe 100644 --- a/arch/arm/mach-davinci/include/mach/uncompress.h +++ b/arch/arm/mach-davinci/include/mach/uncompress.h | |||
@@ -43,7 +43,12 @@ static inline void flush(void) | |||
43 | 43 | ||
44 | static inline void set_uart_info(u32 phys, void * __iomem virt) | 44 | static inline void set_uart_info(u32 phys, void * __iomem virt) |
45 | { | 45 | { |
46 | u32 *uart_info = (u32 *)(DAVINCI_UART_INFO); | 46 | /* |
47 | * Get address of some.bss variable and round it down | ||
48 | * a la CONFIG_AUTO_ZRELADDR. | ||
49 | */ | ||
50 | u32 ram_start = (u32)&uart & 0xf8000000; | ||
51 | u32 *uart_info = (u32 *)(ram_start + DAVINCI_UART_INFO_OFS); | ||
47 | 52 | ||
48 | uart = (u32 *)phys; | 53 | uart = (u32 *)phys; |
49 | uart_info[0] = phys; | 54 | uart_info[0] = phys; |
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S index 5f1e045a3ad1..d4e9316ecacb 100644 --- a/arch/arm/mach-davinci/sleep.S +++ b/arch/arm/mach-davinci/sleep.S | |||
@@ -22,7 +22,7 @@ | |||
22 | #include <linux/linkage.h> | 22 | #include <linux/linkage.h> |
23 | #include <asm/assembler.h> | 23 | #include <asm/assembler.h> |
24 | #include <mach/psc.h> | 24 | #include <mach/psc.h> |
25 | #include <mach/memory.h> | 25 | #include <mach/ddr2.h> |
26 | 26 | ||
27 | #include "clock.h" | 27 | #include "clock.h" |
28 | 28 | ||
diff --git a/arch/arm/mach-dove/include/mach/debug-macro.S b/arch/arm/mach-dove/include/mach/debug-macro.S index da8bf2bad3b1..5929cbc59161 100644 --- a/arch/arm/mach-dove/include/mach/debug-macro.S +++ b/arch/arm/mach-dove/include/mach/debug-macro.S | |||
@@ -8,7 +8,7 @@ | |||
8 | 8 | ||
9 | #include <mach/bridge-regs.h> | 9 | #include <mach/bridge-regs.h> |
10 | 10 | ||
11 | .macro addruart, rp, rv | 11 | .macro addruart, rp, rv, tmp |
12 | ldr \rp, =DOVE_SB_REGS_PHYS_BASE | 12 | ldr \rp, =DOVE_SB_REGS_PHYS_BASE |
13 | ldr \rv, =DOVE_SB_REGS_VIRT_BASE | 13 | ldr \rv, =DOVE_SB_REGS_VIRT_BASE |
14 | orr \rp, \rp, #0x00012000 | 14 | orr \rp, \rp, #0x00012000 |
diff --git a/arch/arm/mach-dove/include/mach/memory.h b/arch/arm/mach-dove/include/mach/memory.h deleted file mode 100644 index bbc93fee6c75..000000000000 --- a/arch/arm/mach-dove/include/mach/memory.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-dove/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #ifndef __ASM_ARCH_MEMORY_H | ||
6 | #define __ASM_ARCH_MEMORY_H | ||
7 | |||
8 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
9 | |||
10 | #endif | ||
diff --git a/arch/arm/mach-ebsa110/include/mach/debug-macro.S b/arch/arm/mach-ebsa110/include/mach/debug-macro.S index 7ef5690fd08c..bb02c05e6812 100644 --- a/arch/arm/mach-ebsa110/include/mach/debug-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | **/ | 12 | **/ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0xf0000000 | 15 | mov \rp, #0xf0000000 |
16 | orr \rp, \rp, #0x00000be0 | 16 | orr \rp, \rp, #0x00000be0 |
17 | mov \rp, \rv | 17 | mov \rp, \rv |
diff --git a/arch/arm/mach-ep93xx/include/mach/debug-macro.S b/arch/arm/mach-ep93xx/include/mach/debug-macro.S index b25bc9076367..af54e43132cf 100644 --- a/arch/arm/mach-ep93xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ep93xx/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | #include <mach/ep93xx-regs.h> | 12 | #include <mach/ep93xx-regs.h> |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base | 15 | ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base |
16 | ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base | 16 | ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base |
17 | orr \rp, \rp, #0x000c0000 | 17 | orr \rp, \rp, #0x000c0000 |
diff --git a/arch/arm/mach-exynos4/include/mach/debug-macro.S b/arch/arm/mach-exynos4/include/mach/debug-macro.S index a442ef861167..6cacf16a67a6 100644 --- a/arch/arm/mach-exynos4/include/mach/debug-macro.S +++ b/arch/arm/mach-exynos4/include/mach/debug-macro.S | |||
@@ -20,7 +20,7 @@ | |||
20 | * aligned and add in the offset when we load the value here. | 20 | * aligned and add in the offset when we load the value here. |
21 | */ | 21 | */ |
22 | 22 | ||
23 | .macro addruart, rp, rv | 23 | .macro addruart, rp, rv, tmp |
24 | ldr \rp, = S3C_PA_UART | 24 | ldr \rp, = S3C_PA_UART |
25 | ldr \rv, = S3C_VA_UART | 25 | ldr \rv, = S3C_VA_UART |
26 | #if CONFIG_DEBUG_S3C_UART != 0 | 26 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S index d7a1e281ce7a..006a4f4c65c6 100644 --- a/arch/arm/mach-exynos4/include/mach/entry-macro.S +++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S | |||
@@ -55,7 +55,7 @@ | |||
55 | 55 | ||
56 | bic \irqnr, \irqstat, #0x1c00 | 56 | bic \irqnr, \irqstat, #0x1c00 |
57 | 57 | ||
58 | cmp \irqnr, #29 | 58 | cmp \irqnr, #15 |
59 | cmpcc \irqnr, \irqnr | 59 | cmpcc \irqnr, \irqnr |
60 | cmpne \irqnr, \tmp | 60 | cmpne \irqnr, \tmp |
61 | cmpcs \irqnr, \irqnr | 61 | cmpcs \irqnr, \irqnr |
@@ -76,8 +76,3 @@ | |||
76 | strcc \irqstat, [\base, #GIC_CPU_EOI] | 76 | strcc \irqstat, [\base, #GIC_CPU_EOI] |
77 | cmpcs \irqnr, \irqnr | 77 | cmpcs \irqnr, \irqnr |
78 | .endm | 78 | .endm |
79 | |||
80 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
81 | |||
82 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
83 | .endm | ||
diff --git a/arch/arm/mach-exynos4/mct.c b/arch/arm/mach-exynos4/mct.c index ddd86864fb83..582b874aab0e 100644 --- a/arch/arm/mach-exynos4/mct.c +++ b/arch/arm/mach-exynos4/mct.c | |||
@@ -386,9 +386,11 @@ static void exynos4_mct_tick_init(struct clock_event_device *evt) | |||
386 | 386 | ||
387 | if (cpu == 0) { | 387 | if (cpu == 0) { |
388 | mct_tick0_event_irq.dev_id = &mct_tick[cpu]; | 388 | mct_tick0_event_irq.dev_id = &mct_tick[cpu]; |
389 | evt->irq = IRQ_MCT_L0; | ||
389 | setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq); | 390 | setup_irq(IRQ_MCT_L0, &mct_tick0_event_irq); |
390 | } else { | 391 | } else { |
391 | mct_tick1_event_irq.dev_id = &mct_tick[cpu]; | 392 | mct_tick1_event_irq.dev_id = &mct_tick[cpu]; |
393 | evt->irq = IRQ_MCT_L1; | ||
392 | setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq); | 394 | setup_irq(IRQ_MCT_L1, &mct_tick1_event_irq); |
393 | irq_set_affinity(IRQ_MCT_L1, cpumask_of(1)); | 395 | irq_set_affinity(IRQ_MCT_L1, cpumask_of(1)); |
394 | } | 396 | } |
@@ -402,9 +404,10 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) | |||
402 | return 0; | 404 | return 0; |
403 | } | 405 | } |
404 | 406 | ||
405 | int local_timer_ack(void) | 407 | void local_timer_stop(struct clock_event_device *evt) |
406 | { | 408 | { |
407 | return 0; | 409 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); |
410 | disable_irq(evt->irq); | ||
408 | } | 411 | } |
409 | 412 | ||
410 | #endif /* CONFIG_LOCAL_TIMERS */ | 413 | #endif /* CONFIG_LOCAL_TIMERS */ |
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c index df6ef1b2f98b..0c90896ad9a0 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos4/platsmp.c | |||
@@ -193,12 +193,10 @@ void __init smp_init_cpus(void) | |||
193 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; | 193 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; |
194 | 194 | ||
195 | /* sanity check */ | 195 | /* sanity check */ |
196 | if (ncores > NR_CPUS) { | 196 | if (ncores > nr_cpu_ids) { |
197 | printk(KERN_WARNING | 197 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", |
198 | "EXYNOS4: no. of cores (%d) greater than configured " | 198 | ncores, nr_cpu_ids); |
199 | "maximum of %d - clipping\n", | 199 | ncores = nr_cpu_ids; |
200 | ncores, NR_CPUS); | ||
201 | ncores = NR_CPUS; | ||
202 | } | 200 | } |
203 | 201 | ||
204 | for (i = 0; i < ncores; i++) | 202 | for (i = 0; i < ncores; i++) |
diff --git a/arch/arm/mach-footbridge/include/mach/debug-macro.S b/arch/arm/mach-footbridge/include/mach/debug-macro.S index 1be2eeb7a0a0..e5acde25ffc5 100644 --- a/arch/arm/mach-footbridge/include/mach/debug-macro.S +++ b/arch/arm/mach-footbridge/include/mach/debug-macro.S | |||
@@ -15,7 +15,7 @@ | |||
15 | 15 | ||
16 | #ifndef CONFIG_DEBUG_DC21285_PORT | 16 | #ifndef CONFIG_DEBUG_DC21285_PORT |
17 | /* For NetWinder debugging */ | 17 | /* For NetWinder debugging */ |
18 | .macro addruart, rp, rv | 18 | .macro addruart, rp, rv, tmp |
19 | mov \rp, #0x000003f8 | 19 | mov \rp, #0x000003f8 |
20 | orr \rv, \rp, #0xff000000 @ virtual | 20 | orr \rv, \rp, #0xff000000 @ virtual |
21 | orr \rp, \rp, #0x7c000000 @ physical | 21 | orr \rp, \rp, #0x7c000000 @ physical |
@@ -31,7 +31,7 @@ | |||
31 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 | 31 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 |
32 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff | 32 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff |
33 | 33 | ||
34 | .macro addruart, rp, rv | 34 | .macro addruart, rp, rv, tmp |
35 | .if dc21285_low | 35 | .if dc21285_low |
36 | mov \rp, #dc21285_low | 36 | mov \rp, #dc21285_low |
37 | .else | 37 | .else |
diff --git a/arch/arm/mach-gemini/include/mach/debug-macro.S b/arch/arm/mach-gemini/include/mach/debug-macro.S index f40e006d296e..837670763b85 100644 --- a/arch/arm/mach-gemini/include/mach/debug-macro.S +++ b/arch/arm/mach-gemini/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | #include <mach/hardware.h> | 12 | #include <mach/hardware.h> |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | ldr \rp, =GEMINI_UART_BASE @ physical | 15 | ldr \rp, =GEMINI_UART_BASE @ physical |
16 | ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual | 16 | ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual |
17 | .endm | 17 | .endm |
diff --git a/arch/arm/mach-gemini/include/mach/memory.h b/arch/arm/mach-gemini/include/mach/memory.h deleted file mode 100644 index a50915f764d8..000000000000 --- a/arch/arm/mach-gemini/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2001-2006 Storlink, Corp. | ||
3 | * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | */ | ||
10 | #ifndef __MACH_MEMORY_H | ||
11 | #define __MACH_MEMORY_H | ||
12 | |||
13 | #ifdef CONFIG_GEMINI_MEM_SWAP | ||
14 | # define PLAT_PHYS_OFFSET UL(0x00000000) | ||
15 | #else | ||
16 | # define PLAT_PHYS_OFFSET UL(0x10000000) | ||
17 | #endif | ||
18 | |||
19 | #endif /* __MACH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-h720x/include/mach/debug-macro.S b/arch/arm/mach-h720x/include/mach/debug-macro.S index c2093e835720..8a46157b0582 100644 --- a/arch/arm/mach-h720x/include/mach/debug-macro.S +++ b/arch/arm/mach-h720x/include/mach/debug-macro.S | |||
@@ -16,7 +16,7 @@ | |||
16 | .equ io_virt, IO_VIRT | 16 | .equ io_virt, IO_VIRT |
17 | .equ io_phys, IO_PHYS | 17 | .equ io_phys, IO_PHYS |
18 | 18 | ||
19 | .macro addruart, rp, rv | 19 | .macro addruart, rp, rv, tmp |
20 | mov \rp, #0x00020000 @ UART1 | 20 | mov \rp, #0x00020000 @ UART1 |
21 | add \rv, \rp, #io_virt @ virtual address | 21 | add \rv, \rp, #io_virt @ virtual address |
22 | add \rp, \rp, #io_phys @ physical base address | 22 | add \rp, \rp, #io_phys @ physical base address |
diff --git a/arch/arm/mach-h720x/include/mach/memory.h b/arch/arm/mach-h720x/include/mach/memory.h deleted file mode 100644 index 96dcf50c51d3..000000000000 --- a/arch/arm/mach-h720x/include/mach/memory.h +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-h720x/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2000 Jungjun Kim | ||
5 | * | ||
6 | */ | ||
7 | #ifndef __ASM_ARCH_MEMORY_H | ||
8 | #define __ASM_ARCH_MEMORY_H | ||
9 | |||
10 | #define PLAT_PHYS_OFFSET UL(0x40000000) | ||
11 | #endif | ||
diff --git a/arch/arm/mach-integrator/include/mach/debug-macro.S b/arch/arm/mach-integrator/include/mach/debug-macro.S index a1f598fd3a56..411b116077e4 100644 --- a/arch/arm/mach-integrator/include/mach/debug-macro.S +++ b/arch/arm/mach-integrator/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x16000000 @ physical base address | 15 | mov \rp, #0x16000000 @ physical base address |
16 | mov \rv, #0xf0000000 @ virtual base | 16 | mov \rv, #0xf0000000 @ virtual base |
17 | add \rv, \rv, #0x16000000 >> 4 | 17 | add \rv, \rv, #0x16000000 >> 4 |
diff --git a/arch/arm/mach-iop13xx/include/mach/debug-macro.S b/arch/arm/mach-iop13xx/include/mach/debug-macro.S index e664466d51bf..d869a6f67e5c 100644 --- a/arch/arm/mach-iop13xx/include/mach/debug-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00002300 | 15 | mov \rp, #0x00002300 |
16 | orr \rp, \rp, #0x00000040 | 16 | orr \rp, \rp, #0x00000040 |
17 | orr \rv, \rp, #0xfe000000 @ virtual | 17 | orr \rv, \rp, #0xfe000000 @ virtual |
diff --git a/arch/arm/mach-iop32x/include/mach/debug-macro.S b/arch/arm/mach-iop32x/include/mach/debug-macro.S index ff9e76c09f35..363bdf90b34d 100644 --- a/arch/arm/mach-iop32x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop32x/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0xfe000000 @ physical as well as virtual | 15 | mov \rp, #0xfe000000 @ physical as well as virtual |
16 | orr \rp, \rp, #0x00800000 @ location of the UART | 16 | orr \rp, \rp, #0x00800000 @ location of the UART |
17 | mov \rv, \rp | 17 | mov \rv, \rp |
diff --git a/arch/arm/mach-iop32x/include/mach/memory.h b/arch/arm/mach-iop32x/include/mach/memory.h deleted file mode 100644 index 169cc239f76c..000000000000 --- a/arch/arm/mach-iop32x/include/mach/memory.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop32x/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #ifndef __MEMORY_H | ||
6 | #define __MEMORY_H | ||
7 | |||
8 | /* | ||
9 | * Physical DRAM offset. | ||
10 | */ | ||
11 | #define PLAT_PHYS_OFFSET UL(0xa0000000) | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-iop33x/include/mach/debug-macro.S b/arch/arm/mach-iop33x/include/mach/debug-macro.S index 40c500dd1fac..361be1f6026e 100644 --- a/arch/arm/mach-iop33x/include/mach/debug-macro.S +++ b/arch/arm/mach-iop33x/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00ff0000 | 15 | mov \rp, #0x00ff0000 |
16 | orr \rp, \rp, #0x0000f700 | 16 | orr \rp, \rp, #0x0000f700 |
17 | orr \rv, #0xfe000000 @ virtual | 17 | orr \rv, #0xfe000000 @ virtual |
diff --git a/arch/arm/mach-iop33x/include/mach/memory.h b/arch/arm/mach-iop33x/include/mach/memory.h deleted file mode 100644 index 8e1daf7006b6..000000000000 --- a/arch/arm/mach-iop33x/include/mach/memory.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop33x/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #ifndef __MEMORY_H | ||
6 | #define __MEMORY_H | ||
7 | |||
8 | /* | ||
9 | * Physical DRAM offset. | ||
10 | */ | ||
11 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-ixp2000/include/mach/debug-macro.S b/arch/arm/mach-ixp2000/include/mach/debug-macro.S index 0ef533b20972..bdd3ccdc2890 100644 --- a/arch/arm/mach-ixp2000/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00030000 | 15 | mov \rp, #0x00030000 |
16 | #ifdef __ARMEB__ | 16 | #ifdef __ARMEB__ |
17 | orr \rp, \rp, #0x00000003 | 17 | orr \rp, \rp, #0x00000003 |
diff --git a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S index f7c6eef7fa22..5ff524c13744 100644 --- a/arch/arm/mach-ixp23xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/debug-macro.S | |||
@@ -12,7 +12,7 @@ | |||
12 | */ | 12 | */ |
13 | #include <mach/ixp23xx.h> | 13 | #include <mach/ixp23xx.h> |
14 | 14 | ||
15 | .macro addruart, rp, rv | 15 | .macro addruart, rp, rv, tmp |
16 | ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical | 16 | ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical |
17 | ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual | 17 | ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual |
18 | #ifdef __ARMEB__ | 18 | #ifdef __ARMEB__ |
diff --git a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S index b974a49c0aff..8c9f8d564492 100644 --- a/arch/arm/mach-ixp4xx/include/mach/debug-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/debug-macro.S | |||
@@ -10,7 +10,7 @@ | |||
10 | * published by the Free Software Foundation. | 10 | * published by the Free Software Foundation. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | .macro addruart, rp, rv | 13 | .macro addruart, rp, rv, tmp |
14 | #ifdef __ARMEB__ | 14 | #ifdef __ARMEB__ |
15 | mov \rp, #3 @ Uart regs are at off set of 3 if | 15 | mov \rp, #3 @ Uart regs are at off set of 3 if |
16 | @ byte writes used - Big Endian. | 16 | @ byte writes used - Big Endian. |
diff --git a/arch/arm/mach-ixp4xx/include/mach/memory.h b/arch/arm/mach-ixp4xx/include/mach/memory.h deleted file mode 100644 index 4caf1761f1e2..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/memory.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp4xx/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2001-2004 MontaVista Software, Inc. | ||
5 | */ | ||
6 | |||
7 | #ifndef __ASM_ARCH_MEMORY_H | ||
8 | #define __ASM_ARCH_MEMORY_H | ||
9 | |||
10 | #include <asm/sizes.h> | ||
11 | |||
12 | /* | ||
13 | * Physical DRAM offset. | ||
14 | */ | ||
15 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/debug-macro.S b/arch/arm/mach-kirkwood/include/mach/debug-macro.S index db06ae437d08..f785d401a607 100644 --- a/arch/arm/mach-kirkwood/include/mach/debug-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/debug-macro.S | |||
@@ -8,7 +8,7 @@ | |||
8 | 8 | ||
9 | #include <mach/bridge-regs.h> | 9 | #include <mach/bridge-regs.h> |
10 | 10 | ||
11 | .macro addruart, rp, rv | 11 | .macro addruart, rp, rv, tmp |
12 | ldr \rp, =KIRKWOOD_REGS_PHYS_BASE | 12 | ldr \rp, =KIRKWOOD_REGS_PHYS_BASE |
13 | ldr \rv, =KIRKWOOD_REGS_VIRT_BASE | 13 | ldr \rv, =KIRKWOOD_REGS_VIRT_BASE |
14 | orr \rp, \rp, #0x00012000 | 14 | orr \rp, \rp, #0x00012000 |
diff --git a/arch/arm/mach-kirkwood/include/mach/memory.h b/arch/arm/mach-kirkwood/include/mach/memory.h deleted file mode 100644 index 4600b44e3ad3..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/memory.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #ifndef __ASM_ARCH_MEMORY_H | ||
6 | #define __ASM_ARCH_MEMORY_H | ||
7 | |||
8 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
9 | |||
10 | #endif | ||
diff --git a/arch/arm/mach-ks8695/include/mach/debug-macro.S b/arch/arm/mach-ks8695/include/mach/debug-macro.S index bf516adf1925..a79e48981202 100644 --- a/arch/arm/mach-ks8695/include/mach/debug-macro.S +++ b/arch/arm/mach-ks8695/include/mach/debug-macro.S | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/regs-uart.h> | 15 | #include <mach/regs-uart.h> |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv, tmp |
18 | ldr \rp, =KS8695_UART_PA @ physical base address | 18 | ldr \rp, =KS8695_UART_PA @ physical base address |
19 | ldr \rv, =KS8695_UART_VA @ virtual base address | 19 | ldr \rv, =KS8695_UART_VA @ virtual base address |
20 | .endm | 20 | .endm |
diff --git a/arch/arm/mach-l7200/include/mach/debug-macro.S b/arch/arm/mach-l7200/include/mach/debug-macro.S index b0a2db77d392..0b4e760159b9 100644 --- a/arch/arm/mach-l7200/include/mach/debug-macro.S +++ b/arch/arm/mach-l7200/include/mach/debug-macro.S | |||
@@ -14,7 +14,7 @@ | |||
14 | .equ io_virt, IO_BASE | 14 | .equ io_virt, IO_BASE |
15 | .equ io_phys, IO_START | 15 | .equ io_phys, IO_START |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv, tmp |
18 | mov \rp, #0x00044000 @ UART1 | 18 | mov \rp, #0x00044000 @ UART1 |
19 | @ mov \rp, #0x00045000 @ UART2 | 19 | @ mov \rp, #0x00045000 @ UART2 |
20 | add \rv, \rp, #io_virt @ virtual address | 20 | add \rv, \rp, #io_virt @ virtual address |
diff --git a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S index 629e744aeb9e..351bd6c84909 100644 --- a/arch/arm/mach-lpc32xx/include/mach/debug-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/debug-macro.S | |||
@@ -20,7 +20,7 @@ | |||
20 | * Debug output is hardcoded to standard UART 5 | 20 | * Debug output is hardcoded to standard UART 5 |
21 | */ | 21 | */ |
22 | 22 | ||
23 | .macro addruart, rp, rv | 23 | .macro addruart, rp, rv, tmp |
24 | ldreq \rp, =0x40090000 | 24 | ldreq \rp, =0x40090000 |
25 | ldrne \rv, =0xF4090000 | 25 | ldrne \rv, =0xF4090000 |
26 | .endm | 26 | .endm |
diff --git a/arch/arm/mach-lpc32xx/include/mach/memory.h b/arch/arm/mach-lpc32xx/include/mach/memory.h deleted file mode 100644 index a647dd624afa..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/memory.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/memory.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_MEMORY_H | ||
20 | #define __ASM_ARCH_MEMORY_H | ||
21 | |||
22 | /* | ||
23 | * Physical DRAM offset of bank 0 | ||
24 | */ | ||
25 | #define PLAT_PHYS_OFFSET UL(0x80000000) | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-mmp/include/mach/debug-macro.S b/arch/arm/mach-mmp/include/mach/debug-macro.S index 7e2ebd3efc7c..b6f14d203c25 100644 --- a/arch/arm/mach-mmp/include/mach/debug-macro.S +++ b/arch/arm/mach-mmp/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | #include <mach/addr-map.h> | 12 | #include <mach/addr-map.h> |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | ldr \rp, =APB_PHYS_BASE @ physical | 15 | ldr \rp, =APB_PHYS_BASE @ physical |
16 | ldr \rv, =APB_VIRT_BASE @ virtual | 16 | ldr \rv, =APB_VIRT_BASE @ virtual |
17 | orr \rp, \rp, #0x00017000 | 17 | orr \rp, \rp, #0x00017000 |
diff --git a/arch/arm/mach-mmp/include/mach/memory.h b/arch/arm/mach-mmp/include/mach/memory.h deleted file mode 100644 index d68b50a2d6a0..000000000000 --- a/arch/arm/mach-mmp/include/mach/memory.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/memory.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_MACH_MEMORY_H | ||
10 | #define __ASM_MACH_MEMORY_H | ||
11 | |||
12 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
13 | |||
14 | #endif /* __ASM_MACH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-msm/board-msm7x30.c b/arch/arm/mach-msm/board-msm7x30.c index 5a2ab6855183..bb72ea0383b7 100644 --- a/arch/arm/mach-msm/board-msm7x30.c +++ b/arch/arm/mach-msm/board-msm7x30.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/smsc911x.h> | 24 | #include <linux/smsc911x.h> |
25 | #include <linux/usb/msm_hsusb.h> | 25 | #include <linux/usb/msm_hsusb.h> |
26 | #include <linux/clkdev.h> | 26 | #include <linux/clkdev.h> |
27 | #include <linux/memblock.h> | ||
27 | 28 | ||
28 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
29 | #include <asm/mach/arch.h> | 30 | #include <asm/mach/arch.h> |
@@ -42,6 +43,21 @@ | |||
42 | 43 | ||
43 | extern struct sys_timer msm_timer; | 44 | extern struct sys_timer msm_timer; |
44 | 45 | ||
46 | static void __init msm7x30_fixup(struct machine_desc *desc, struct tag *tag, | ||
47 | char **cmdline, struct meminfo *mi) | ||
48 | { | ||
49 | for (; tag->hdr.size; tag = tag_next(tag)) | ||
50 | if (tag->hdr.tag == ATAG_MEM && tag->u.mem.start == 0x200000) { | ||
51 | tag->u.mem.start = 0; | ||
52 | tag->u.mem.size += SZ_2M; | ||
53 | } | ||
54 | } | ||
55 | |||
56 | static void __init msm7x30_reserve(void) | ||
57 | { | ||
58 | memblock_remove(0x0, SZ_2M); | ||
59 | } | ||
60 | |||
45 | static int hsusb_phy_init_seq[] = { | 61 | static int hsusb_phy_init_seq[] = { |
46 | 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ | 62 | 0x30, 0x32, /* Enable and set Pre-Emphasis Depth to 20% */ |
47 | 0x02, 0x36, /* Disable CDR Auto Reset feature */ | 63 | 0x02, 0x36, /* Disable CDR Auto Reset feature */ |
@@ -107,6 +123,8 @@ static void __init msm7x30_map_io(void) | |||
107 | 123 | ||
108 | MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") | 124 | MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF") |
109 | .atag_offset = 0x100, | 125 | .atag_offset = 0x100, |
126 | .fixup = msm7x30_fixup, | ||
127 | .reserve = msm7x30_reserve, | ||
110 | .map_io = msm7x30_map_io, | 128 | .map_io = msm7x30_map_io, |
111 | .init_irq = msm7x30_init_irq, | 129 | .init_irq = msm7x30_init_irq, |
112 | .init_machine = msm7x30_init, | 130 | .init_machine = msm7x30_init, |
@@ -115,6 +133,8 @@ MACHINE_END | |||
115 | 133 | ||
116 | MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") | 134 | MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA") |
117 | .atag_offset = 0x100, | 135 | .atag_offset = 0x100, |
136 | .fixup = msm7x30_fixup, | ||
137 | .reserve = msm7x30_reserve, | ||
118 | .map_io = msm7x30_map_io, | 138 | .map_io = msm7x30_map_io, |
119 | .init_irq = msm7x30_init_irq, | 139 | .init_irq = msm7x30_init_irq, |
120 | .init_machine = msm7x30_init, | 140 | .init_machine = msm7x30_init, |
@@ -123,6 +143,8 @@ MACHINE_END | |||
123 | 143 | ||
124 | MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") | 144 | MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID") |
125 | .atag_offset = 0x100, | 145 | .atag_offset = 0x100, |
146 | .fixup = msm7x30_fixup, | ||
147 | .reserve = msm7x30_reserve, | ||
126 | .map_io = msm7x30_map_io, | 148 | .map_io = msm7x30_map_io, |
127 | .init_irq = msm7x30_init_irq, | 149 | .init_irq = msm7x30_init_irq, |
128 | .init_machine = msm7x30_init, | 150 | .init_machine = msm7x30_init, |
diff --git a/arch/arm/mach-msm/board-msm8960.c b/arch/arm/mach-msm/board-msm8960.c index 35c7ceeb3f29..b04468e7d00e 100644 --- a/arch/arm/mach-msm/board-msm8960.c +++ b/arch/arm/mach-msm/board-msm8960.c | |||
@@ -20,16 +20,34 @@ | |||
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
22 | #include <linux/clkdev.h> | 22 | #include <linux/clkdev.h> |
23 | #include <linux/memblock.h> | ||
23 | 24 | ||
24 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
25 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
26 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | #include <asm/setup.h> | ||
27 | 29 | ||
28 | #include <mach/board.h> | 30 | #include <mach/board.h> |
29 | #include <mach/msm_iomap.h> | 31 | #include <mach/msm_iomap.h> |
30 | 32 | ||
31 | #include "devices.h" | 33 | #include "devices.h" |
32 | 34 | ||
35 | static void __init msm8960_fixup(struct machine_desc *desc, struct tag *tag, | ||
36 | char **cmdline, struct meminfo *mi) | ||
37 | { | ||
38 | for (; tag->hdr.size; tag = tag_next(tag)) | ||
39 | if (tag->hdr.tag == ATAG_MEM && | ||
40 | tag->u.mem.start == 0x40200000) { | ||
41 | tag->u.mem.start = 0x40000000; | ||
42 | tag->u.mem.size += SZ_2M; | ||
43 | } | ||
44 | } | ||
45 | |||
46 | static void __init msm8960_reserve(void) | ||
47 | { | ||
48 | memblock_remove(0x40000000, SZ_2M); | ||
49 | } | ||
50 | |||
33 | static void __init msm8960_map_io(void) | 51 | static void __init msm8960_map_io(void) |
34 | { | 52 | { |
35 | msm_map_msm8960_io(); | 53 | msm_map_msm8960_io(); |
@@ -76,6 +94,8 @@ static void __init msm8960_rumi3_init(void) | |||
76 | } | 94 | } |
77 | 95 | ||
78 | MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") | 96 | MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") |
97 | .fixup = msm8960_fixup, | ||
98 | .reserve = msm8960_reserve, | ||
79 | .map_io = msm8960_map_io, | 99 | .map_io = msm8960_map_io, |
80 | .init_irq = msm8960_init_irq, | 100 | .init_irq = msm8960_init_irq, |
81 | .timer = &msm_timer, | 101 | .timer = &msm_timer, |
@@ -83,6 +103,8 @@ MACHINE_START(MSM8960_SIM, "QCT MSM8960 SIMULATOR") | |||
83 | MACHINE_END | 103 | MACHINE_END |
84 | 104 | ||
85 | MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") | 105 | MACHINE_START(MSM8960_RUMI3, "QCT MSM8960 RUMI3") |
106 | .fixup = msm8960_fixup, | ||
107 | .reserve = msm8960_reserve, | ||
86 | .map_io = msm8960_map_io, | 108 | .map_io = msm8960_map_io, |
87 | .init_irq = msm8960_init_irq, | 109 | .init_irq = msm8960_init_irq, |
88 | .timer = &msm_timer, | 110 | .timer = &msm_timer, |
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c index 1163b6fd05d2..106170fb1844 100644 --- a/arch/arm/mach-msm/board-msm8x60.c +++ b/arch/arm/mach-msm/board-msm8x60.c | |||
@@ -20,14 +20,31 @@ | |||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/io.h> | 21 | #include <linux/io.h> |
22 | #include <linux/irq.h> | 22 | #include <linux/irq.h> |
23 | #include <linux/memblock.h> | ||
23 | 24 | ||
24 | #include <asm/mach-types.h> | 25 | #include <asm/mach-types.h> |
25 | #include <asm/mach/arch.h> | 26 | #include <asm/mach/arch.h> |
26 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | #include <asm/setup.h> | ||
27 | 29 | ||
28 | #include <mach/board.h> | 30 | #include <mach/board.h> |
29 | #include <mach/msm_iomap.h> | 31 | #include <mach/msm_iomap.h> |
30 | 32 | ||
33 | static void __init msm8x60_fixup(struct machine_desc *desc, struct tag *tag, | ||
34 | char **cmdline, struct meminfo *mi) | ||
35 | { | ||
36 | for (; tag->hdr.size; tag = tag_next(tag)) | ||
37 | if (tag->hdr.tag == ATAG_MEM && | ||
38 | tag->u.mem.start == 0x40200000) { | ||
39 | tag->u.mem.start = 0x40000000; | ||
40 | tag->u.mem.size += SZ_2M; | ||
41 | } | ||
42 | } | ||
43 | |||
44 | static void __init msm8x60_reserve(void) | ||
45 | { | ||
46 | memblock_remove(0x40000000, SZ_2M); | ||
47 | } | ||
31 | 48 | ||
32 | static void __init msm8x60_map_io(void) | 49 | static void __init msm8x60_map_io(void) |
33 | { | 50 | { |
@@ -36,8 +53,6 @@ static void __init msm8x60_map_io(void) | |||
36 | 53 | ||
37 | static void __init msm8x60_init_irq(void) | 54 | static void __init msm8x60_init_irq(void) |
38 | { | 55 | { |
39 | unsigned int i; | ||
40 | |||
41 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, | 56 | gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, |
42 | (void *)MSM_QGIC_CPU_BASE); | 57 | (void *)MSM_QGIC_CPU_BASE); |
43 | 58 | ||
@@ -49,15 +64,6 @@ static void __init msm8x60_init_irq(void) | |||
49 | */ | 64 | */ |
50 | if (!machine_is_msm8x60_sim()) | 65 | if (!machine_is_msm8x60_sim()) |
51 | writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); | 66 | writel(0x0000FFFF, MSM_QGIC_DIST_BASE + GIC_DIST_ENABLE_SET); |
52 | |||
53 | /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet | ||
54 | * as they are configured as level, which does not play nice with | ||
55 | * handle_percpu_irq. | ||
56 | */ | ||
57 | for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { | ||
58 | if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) | ||
59 | irq_set_handler(i, handle_percpu_irq); | ||
60 | } | ||
61 | } | 67 | } |
62 | 68 | ||
63 | static void __init msm8x60_init(void) | 69 | static void __init msm8x60_init(void) |
@@ -65,6 +71,8 @@ static void __init msm8x60_init(void) | |||
65 | } | 71 | } |
66 | 72 | ||
67 | MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") | 73 | MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") |
74 | .fixup = msm8x60_fixup, | ||
75 | .reserve = msm8x60_reserve, | ||
68 | .map_io = msm8x60_map_io, | 76 | .map_io = msm8x60_map_io, |
69 | .init_irq = msm8x60_init_irq, | 77 | .init_irq = msm8x60_init_irq, |
70 | .init_machine = msm8x60_init, | 78 | .init_machine = msm8x60_init, |
@@ -72,6 +80,8 @@ MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") | |||
72 | MACHINE_END | 80 | MACHINE_END |
73 | 81 | ||
74 | MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") | 82 | MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") |
83 | .fixup = msm8x60_fixup, | ||
84 | .reserve = msm8x60_reserve, | ||
75 | .map_io = msm8x60_map_io, | 85 | .map_io = msm8x60_map_io, |
76 | .init_irq = msm8x60_init_irq, | 86 | .init_irq = msm8x60_init_irq, |
77 | .init_machine = msm8x60_init, | 87 | .init_machine = msm8x60_init, |
@@ -79,6 +89,8 @@ MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF") | |||
79 | MACHINE_END | 89 | MACHINE_END |
80 | 90 | ||
81 | MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") | 91 | MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") |
92 | .fixup = msm8x60_fixup, | ||
93 | .reserve = msm8x60_reserve, | ||
82 | .map_io = msm8x60_map_io, | 94 | .map_io = msm8x60_map_io, |
83 | .init_irq = msm8x60_init_irq, | 95 | .init_irq = msm8x60_init_irq, |
84 | .init_machine = msm8x60_init, | 96 | .init_machine = msm8x60_init, |
@@ -86,6 +98,8 @@ MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR") | |||
86 | MACHINE_END | 98 | MACHINE_END |
87 | 99 | ||
88 | MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") | 100 | MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA") |
101 | .fixup = msm8x60_fixup, | ||
102 | .reserve = msm8x60_reserve, | ||
89 | .map_io = msm8x60_map_io, | 103 | .map_io = msm8x60_map_io, |
90 | .init_irq = msm8x60_init_irq, | 104 | .init_irq = msm8x60_init_irq, |
91 | .init_machine = msm8x60_init, | 105 | .init_machine = msm8x60_init, |
diff --git a/arch/arm/mach-msm/include/mach/debug-macro.S b/arch/arm/mach-msm/include/mach/debug-macro.S index 646b99ebc773..2dc73ccddb11 100644 --- a/arch/arm/mach-msm/include/mach/debug-macro.S +++ b/arch/arm/mach-msm/include/mach/debug-macro.S | |||
@@ -20,7 +20,7 @@ | |||
20 | #include <mach/msm_iomap.h> | 20 | #include <mach/msm_iomap.h> |
21 | 21 | ||
22 | #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) | 22 | #if defined(CONFIG_HAS_MSM_DEBUG_UART_PHYS) && !defined(CONFIG_MSM_DEBUG_UART_NONE) |
23 | .macro addruart, rp, rv | 23 | .macro addruart, rp, rv, tmp |
24 | ldr \rp, =MSM_DEBUG_UART_PHYS | 24 | ldr \rp, =MSM_DEBUG_UART_PHYS |
25 | ldr \rv, =MSM_DEBUG_UART_BASE | 25 | ldr \rv, =MSM_DEBUG_UART_BASE |
26 | .endm | 26 | .endm |
@@ -37,7 +37,7 @@ | |||
37 | beq 1001b | 37 | beq 1001b |
38 | .endm | 38 | .endm |
39 | #else | 39 | #else |
40 | .macro addruart, rp, rv | 40 | .macro addruart, rp, rv, tmp |
41 | mov \rv, #0xff000000 | 41 | mov \rv, #0xff000000 |
42 | orr \rv, \rv, #0x00f00000 | 42 | orr \rv, \rv, #0x00f00000 |
43 | .endm | 43 | .endm |
diff --git a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S index 12467157afb9..717076f3ca73 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro-qgic.S +++ b/arch/arm/mach-msm/include/mach/entry-macro-qgic.S | |||
@@ -8,81 +8,10 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <mach/hardware.h> | 11 | #include <asm/hardware/entry-macro-gic.S> |
12 | #include <asm/hardware/gic.h> | ||
13 | 12 | ||
14 | .macro disable_fiq | 13 | .macro disable_fiq |
15 | .endm | 14 | .endm |
16 | 15 | ||
17 | .macro get_irqnr_preamble, base, tmp | ||
18 | ldr \base, =gic_cpu_base_addr | ||
19 | ldr \base, [\base] | ||
20 | .endm | ||
21 | |||
22 | .macro arch_ret_to_user, tmp1, tmp2 | 16 | .macro arch_ret_to_user, tmp1, tmp2 |
23 | .endm | 17 | .endm |
24 | |||
25 | /* | ||
26 | * The interrupt numbering scheme is defined in the | ||
27 | * interrupt controller spec. To wit: | ||
28 | * | ||
29 | * Migrated the code from ARM MP port to be more consistent | ||
30 | * with interrupt processing , the following still holds true | ||
31 | * however, all interrupts are treated the same regardless of | ||
32 | * if they are local IPI or PPI | ||
33 | * | ||
34 | * Interrupts 0-15 are IPI | ||
35 | * 16-31 are PPI | ||
36 | * (16-18 are the timers) | ||
37 | * 32-1020 are global | ||
38 | * 1021-1022 are reserved | ||
39 | * 1023 is "spurious" (no interrupt) | ||
40 | * | ||
41 | * A simple read from the controller will tell us the number of the | ||
42 | * highest priority enabled interrupt. We then just need to check | ||
43 | * whether it is in the valid range for an IRQ (0-1020 inclusive). | ||
44 | * | ||
45 | * Base ARM code assumes that the local (private) peripheral interrupts | ||
46 | * are not valid, we treat them differently, in that the privates are | ||
47 | * handled like normal shared interrupts with the exception that only | ||
48 | * one processor can register the interrupt and the handler must be | ||
49 | * the same for all processors. | ||
50 | */ | ||
51 | |||
52 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
53 | |||
54 | ldr \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 =srcCPU, | ||
55 | 9-0 =int # */ | ||
56 | |||
57 | bic \irqnr, \irqstat, #0x1c00 @mask src | ||
58 | cmp \irqnr, #15 | ||
59 | ldr \tmp, =1021 | ||
60 | cmpcc \irqnr, \irqnr | ||
61 | cmpne \irqnr, \tmp | ||
62 | cmpcs \irqnr, \irqnr | ||
63 | |||
64 | .endm | ||
65 | |||
66 | /* We assume that irqstat (the raw value of the IRQ acknowledge | ||
67 | * register) is preserved from the macro above. | ||
68 | * If there is an IPI, we immediately signal end of interrupt on the | ||
69 | * controller, since this requires the original irqstat value which | ||
70 | * we won't easily be able to recreate later. | ||
71 | */ | ||
72 | .macro test_for_ipi, irqnr, irqstat, base, tmp | ||
73 | bic \irqnr, \irqstat, #0x1c00 | ||
74 | cmp \irqnr, #16 | ||
75 | strcc \irqstat, [\base, #GIC_CPU_EOI] | ||
76 | cmpcs \irqnr, \irqnr | ||
77 | .endm | ||
78 | |||
79 | /* As above, this assumes that irqstat and base are preserved.. */ | ||
80 | |||
81 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
82 | bic \irqnr, \irqstat, #0x1c00 | ||
83 | mov \tmp, #0 | ||
84 | cmp \irqnr, #16 | ||
85 | moveq \tmp, #1 | ||
86 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
87 | cmp \tmp, #0 | ||
88 | .endm | ||
diff --git a/arch/arm/mach-msm/include/mach/memory.h b/arch/arm/mach-msm/include/mach/memory.h deleted file mode 100644 index f2f8d299ba95..000000000000 --- a/arch/arm/mach-msm/include/mach/memory.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (C) 2007 Google, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_MEMORY_H | ||
17 | #define __ASM_ARCH_MEMORY_H | ||
18 | |||
19 | /* physical offset of RAM */ | ||
20 | #if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A) | ||
21 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
22 | #elif defined(CONFIG_ARCH_QSD8X50) | ||
23 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
24 | #elif defined(CONFIG_ARCH_MSM7X30) | ||
25 | #define PLAT_PHYS_OFFSET UL(0x00200000) | ||
26 | #elif defined(CONFIG_ARCH_MSM8X60) | ||
27 | #define PLAT_PHYS_OFFSET UL(0x40200000) | ||
28 | #elif defined(CONFIG_ARCH_MSM8960) | ||
29 | #define PLAT_PHYS_OFFSET UL(0x40200000) | ||
30 | #else | ||
31 | #define PLAT_PHYS_OFFSET UL(0x10000000) | ||
32 | #endif | ||
33 | |||
34 | #endif | ||
35 | |||
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index 1a1af9e56250..727659520912 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c | |||
@@ -156,6 +156,12 @@ void __init smp_init_cpus(void) | |||
156 | { | 156 | { |
157 | unsigned int i, ncores = get_core_count(); | 157 | unsigned int i, ncores = get_core_count(); |
158 | 158 | ||
159 | if (ncores > nr_cpu_ids) { | ||
160 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | ||
161 | ncores, nr_cpu_ids); | ||
162 | ncores = nr_cpu_ids; | ||
163 | } | ||
164 | |||
159 | for (i = 0; i < ncores; i++) | 165 | for (i = 0; i < ncores; i++) |
160 | set_cpu_possible(i, true); | 166 | set_cpu_possible(i, true); |
161 | 167 | ||
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c index 63621f152c98..afeeca52fc66 100644 --- a/arch/arm/mach-msm/timer.c +++ b/arch/arm/mach-msm/timer.c | |||
@@ -71,12 +71,16 @@ enum timer_location { | |||
71 | struct msm_clock { | 71 | struct msm_clock { |
72 | struct clock_event_device clockevent; | 72 | struct clock_event_device clockevent; |
73 | struct clocksource clocksource; | 73 | struct clocksource clocksource; |
74 | struct irqaction irq; | 74 | unsigned int irq; |
75 | void __iomem *regbase; | 75 | void __iomem *regbase; |
76 | uint32_t freq; | 76 | uint32_t freq; |
77 | uint32_t shift; | 77 | uint32_t shift; |
78 | void __iomem *global_counter; | 78 | void __iomem *global_counter; |
79 | void __iomem *local_counter; | 79 | void __iomem *local_counter; |
80 | union { | ||
81 | struct clock_event_device *evt; | ||
82 | struct clock_event_device __percpu **percpu_evt; | ||
83 | }; | ||
80 | }; | 84 | }; |
81 | 85 | ||
82 | enum { | 86 | enum { |
@@ -87,13 +91,10 @@ enum { | |||
87 | 91 | ||
88 | 92 | ||
89 | static struct msm_clock msm_clocks[]; | 93 | static struct msm_clock msm_clocks[]; |
90 | static struct clock_event_device *local_clock_event; | ||
91 | 94 | ||
92 | static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) | 95 | static irqreturn_t msm_timer_interrupt(int irq, void *dev_id) |
93 | { | 96 | { |
94 | struct clock_event_device *evt = dev_id; | 97 | struct clock_event_device *evt = *(struct clock_event_device **)dev_id; |
95 | if (smp_processor_id() != 0) | ||
96 | evt = local_clock_event; | ||
97 | if (evt->event_handler == NULL) | 98 | if (evt->event_handler == NULL) |
98 | return IRQ_HANDLED; | 99 | return IRQ_HANDLED; |
99 | evt->event_handler(evt); | 100 | evt->event_handler(evt); |
@@ -171,13 +172,7 @@ static struct msm_clock msm_clocks[] = { | |||
171 | .mask = CLOCKSOURCE_MASK(32), | 172 | .mask = CLOCKSOURCE_MASK(32), |
172 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 173 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
173 | }, | 174 | }, |
174 | .irq = { | 175 | .irq = INT_GP_TIMER_EXP, |
175 | .name = "gp_timer", | ||
176 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, | ||
177 | .handler = msm_timer_interrupt, | ||
178 | .dev_id = &msm_clocks[0].clockevent, | ||
179 | .irq = INT_GP_TIMER_EXP | ||
180 | }, | ||
181 | .freq = GPT_HZ, | 176 | .freq = GPT_HZ, |
182 | }, | 177 | }, |
183 | [MSM_CLOCK_DGT] = { | 178 | [MSM_CLOCK_DGT] = { |
@@ -196,13 +191,7 @@ static struct msm_clock msm_clocks[] = { | |||
196 | .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), | 191 | .mask = CLOCKSOURCE_MASK((32 - MSM_DGT_SHIFT)), |
197 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | 192 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
198 | }, | 193 | }, |
199 | .irq = { | 194 | .irq = INT_DEBUG_TIMER_EXP, |
200 | .name = "dg_timer", | ||
201 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_TRIGGER_RISING, | ||
202 | .handler = msm_timer_interrupt, | ||
203 | .dev_id = &msm_clocks[1].clockevent, | ||
204 | .irq = INT_DEBUG_TIMER_EXP | ||
205 | }, | ||
206 | .freq = DGT_HZ >> MSM_DGT_SHIFT, | 195 | .freq = DGT_HZ >> MSM_DGT_SHIFT, |
207 | .shift = MSM_DGT_SHIFT, | 196 | .shift = MSM_DGT_SHIFT, |
208 | } | 197 | } |
@@ -261,10 +250,30 @@ static void __init msm_timer_init(void) | |||
261 | printk(KERN_ERR "msm_timer_init: clocksource_register " | 250 | printk(KERN_ERR "msm_timer_init: clocksource_register " |
262 | "failed for %s\n", cs->name); | 251 | "failed for %s\n", cs->name); |
263 | 252 | ||
264 | res = setup_irq(clock->irq.irq, &clock->irq); | 253 | ce->irq = clock->irq; |
254 | if (cpu_is_msm8x60() || cpu_is_msm8960()) { | ||
255 | clock->percpu_evt = alloc_percpu(struct clock_event_device *); | ||
256 | if (!clock->percpu_evt) { | ||
257 | pr_err("msm_timer_init: memory allocation " | ||
258 | "failed for %s\n", ce->name); | ||
259 | continue; | ||
260 | } | ||
261 | |||
262 | *__this_cpu_ptr(clock->percpu_evt) = ce; | ||
263 | res = request_percpu_irq(ce->irq, msm_timer_interrupt, | ||
264 | ce->name, clock->percpu_evt); | ||
265 | if (!res) | ||
266 | enable_percpu_irq(ce->irq, 0); | ||
267 | } else { | ||
268 | clock->evt = ce; | ||
269 | res = request_irq(ce->irq, msm_timer_interrupt, | ||
270 | IRQF_TIMER | IRQF_NOBALANCING | IRQF_TRIGGER_RISING, | ||
271 | ce->name, &clock->evt); | ||
272 | } | ||
273 | |||
265 | if (res) | 274 | if (res) |
266 | printk(KERN_ERR "msm_timer_init: setup_irq " | 275 | pr_err("msm_timer_init: request_irq failed for %s\n", |
267 | "failed for %s\n", cs->name); | 276 | ce->name); |
268 | 277 | ||
269 | clockevents_register_device(ce); | 278 | clockevents_register_device(ce); |
270 | } | 279 | } |
@@ -273,6 +282,7 @@ static void __init msm_timer_init(void) | |||
273 | #ifdef CONFIG_SMP | 282 | #ifdef CONFIG_SMP |
274 | int __cpuinit local_timer_setup(struct clock_event_device *evt) | 283 | int __cpuinit local_timer_setup(struct clock_event_device *evt) |
275 | { | 284 | { |
285 | static bool local_timer_inited; | ||
276 | struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; | 286 | struct msm_clock *clock = &msm_clocks[MSM_GLOBAL_TIMER]; |
277 | 287 | ||
278 | /* Use existing clock_event for cpu 0 */ | 288 | /* Use existing clock_event for cpu 0 */ |
@@ -281,12 +291,13 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) | |||
281 | 291 | ||
282 | writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); | 292 | writel(DGT_CLK_CTL_DIV_4, MSM_TMR_BASE + DGT_CLK_CTL); |
283 | 293 | ||
284 | if (!local_clock_event) { | 294 | if (!local_timer_inited) { |
285 | writel(0, clock->regbase + TIMER_ENABLE); | 295 | writel(0, clock->regbase + TIMER_ENABLE); |
286 | writel(0, clock->regbase + TIMER_CLEAR); | 296 | writel(0, clock->regbase + TIMER_CLEAR); |
287 | writel(~0, clock->regbase + TIMER_MATCH_VAL); | 297 | writel(~0, clock->regbase + TIMER_MATCH_VAL); |
298 | local_timer_inited = true; | ||
288 | } | 299 | } |
289 | evt->irq = clock->irq.irq; | 300 | evt->irq = clock->irq; |
290 | evt->name = "local_timer"; | 301 | evt->name = "local_timer"; |
291 | evt->features = CLOCK_EVT_FEAT_ONESHOT; | 302 | evt->features = CLOCK_EVT_FEAT_ONESHOT; |
292 | evt->rating = clock->clockevent.rating; | 303 | evt->rating = clock->clockevent.rating; |
@@ -298,17 +309,17 @@ int __cpuinit local_timer_setup(struct clock_event_device *evt) | |||
298 | clockevent_delta2ns(0xf0000000 >> clock->shift, evt); | 309 | clockevent_delta2ns(0xf0000000 >> clock->shift, evt); |
299 | evt->min_delta_ns = clockevent_delta2ns(4, evt); | 310 | evt->min_delta_ns = clockevent_delta2ns(4, evt); |
300 | 311 | ||
301 | local_clock_event = evt; | 312 | *__this_cpu_ptr(clock->percpu_evt) = evt; |
302 | 313 | enable_percpu_irq(evt->irq, 0); | |
303 | gic_enable_ppi(clock->irq.irq); | ||
304 | 314 | ||
305 | clockevents_register_device(evt); | 315 | clockevents_register_device(evt); |
306 | return 0; | 316 | return 0; |
307 | } | 317 | } |
308 | 318 | ||
309 | inline int local_timer_ack(void) | 319 | void local_timer_stop(struct clock_event_device *evt) |
310 | { | 320 | { |
311 | return 1; | 321 | evt->set_mode(CLOCK_EVT_MODE_UNUSED, evt); |
322 | disable_percpu_irq(evt->irq); | ||
312 | } | 323 | } |
313 | 324 | ||
314 | #endif | 325 | #endif |
diff --git a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S index 04891428e48b..a7df02b049b7 100644 --- a/arch/arm/mach-mv78xx0/include/mach/debug-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/debug-macro.S | |||
@@ -8,7 +8,7 @@ | |||
8 | 8 | ||
9 | #include <mach/mv78xx0.h> | 9 | #include <mach/mv78xx0.h> |
10 | 10 | ||
11 | .macro addruart, rp, rv | 11 | .macro addruart, rp, rv, tmp |
12 | ldr \rp, =MV78XX0_REGS_PHYS_BASE | 12 | ldr \rp, =MV78XX0_REGS_PHYS_BASE |
13 | ldr \rv, =MV78XX0_REGS_VIRT_BASE | 13 | ldr \rv, =MV78XX0_REGS_VIRT_BASE |
14 | orr \rp, \rp, #0x00012000 | 14 | orr \rp, \rp, #0x00012000 |
diff --git a/arch/arm/mach-mv78xx0/include/mach/memory.h b/arch/arm/mach-mv78xx0/include/mach/memory.h deleted file mode 100644 index a648c51f2e42..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/memory.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-mv78xx0/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #ifndef __ASM_ARCH_MEMORY_H | ||
6 | #define __ASM_ARCH_MEMORY_H | ||
7 | |||
8 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
9 | |||
10 | #endif | ||
diff --git a/arch/arm/mach-mxs/include/mach/debug-macro.S b/arch/arm/mach-mxs/include/mach/debug-macro.S index 79650a1ad78d..714570d83668 100644 --- a/arch/arm/mach-mxs/include/mach/debug-macro.S +++ b/arch/arm/mach-mxs/include/mach/debug-macro.S | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | #define UART_VADDR MXS_IO_ADDRESS(UART_PADDR) | 31 | #define UART_VADDR MXS_IO_ADDRESS(UART_PADDR) |
32 | 32 | ||
33 | .macro addruart, rp, rv | 33 | .macro addruart, rp, rv, tmp |
34 | ldr \rp, =UART_PADDR @ physical | 34 | ldr \rp, =UART_PADDR @ physical |
35 | ldr \rv, =UART_VADDR @ virtual | 35 | ldr \rv, =UART_VADDR @ virtual |
36 | .endm | 36 | .endm |
diff --git a/arch/arm/mach-mxs/include/mach/memory.h b/arch/arm/mach-mxs/include/mach/memory.h deleted file mode 100644 index b5420a5c2d4b..000000000000 --- a/arch/arm/mach-mxs/include/mach/memory.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009-2010 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. | ||
17 | */ | ||
18 | |||
19 | #ifndef __MACH_MXS_MEMORY_H__ | ||
20 | #define __MACH_MXS_MEMORY_H__ | ||
21 | |||
22 | #define PHYS_OFFSET UL(0x40000000) | ||
23 | |||
24 | #endif /* __MACH_MXS_MEMORY_H__ */ | ||
diff --git a/arch/arm/mach-netx/include/mach/debug-macro.S b/arch/arm/mach-netx/include/mach/debug-macro.S index 56a915228180..247781e096e2 100644 --- a/arch/arm/mach-netx/include/mach/debug-macro.S +++ b/arch/arm/mach-netx/include/mach/debug-macro.S | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | #include "hardware.h" | 14 | #include "hardware.h" |
15 | 15 | ||
16 | .macro addruart, rp, rv | 16 | .macro addruart, rp, rv, tmp |
17 | mov \rp, #0x00000a00 | 17 | mov \rp, #0x00000a00 |
18 | orr \rv, \rp, #io_p2v(0x00100000) @ virtual | 18 | orr \rv, \rp, #io_p2v(0x00100000) @ virtual |
19 | orr \rp, \rp, #0x00100000 @ physical | 19 | orr \rp, \rp, #0x00100000 @ physical |
diff --git a/arch/arm/mach-netx/include/mach/memory.h b/arch/arm/mach-netx/include/mach/memory.h deleted file mode 100644 index 59561496c36e..000000000000 --- a/arch/arm/mach-netx/include/mach/memory.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | #define PLAT_PHYS_OFFSET UL(0x80000000) | ||
24 | |||
25 | #endif | ||
26 | |||
diff --git a/arch/arm/mach-nomadik/include/mach/debug-macro.S b/arch/arm/mach-nomadik/include/mach/debug-macro.S index e7151b4b8889..735417922ce2 100644 --- a/arch/arm/mach-nomadik/include/mach/debug-macro.S +++ b/arch/arm/mach-nomadik/include/mach/debug-macro.S | |||
@@ -10,7 +10,7 @@ | |||
10 | * | 10 | * |
11 | */ | 11 | */ |
12 | 12 | ||
13 | .macro addruart, rp, rv | 13 | .macro addruart, rp, rv, tmp |
14 | mov \rp, #0x00100000 | 14 | mov \rp, #0x00100000 |
15 | add \rp, \rp, #0x000fb000 | 15 | add \rp, \rp, #0x000fb000 |
16 | add \rv, \rp, #0xf0000000 @ virtual base | 16 | add \rv, \rp, #0xf0000000 @ virtual base |
diff --git a/arch/arm/mach-nomadik/include/mach/memory.h b/arch/arm/mach-nomadik/include/mach/memory.h deleted file mode 100644 index d3325211ba6a..000000000000 --- a/arch/arm/mach-nomadik/include/mach/memory.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * mach-nomadik/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | /* | ||
24 | * Physical DRAM offset. | ||
25 | */ | ||
26 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-nuc93x/include/mach/memory.h b/arch/arm/mach-nuc93x/include/mach/memory.h deleted file mode 100644 index ef9864b002a6..000000000000 --- a/arch/arm/mach-nuc93x/include/mach/memory.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-nuc93x/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2008 Nuvoton technology corporation | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Wan ZongShun <mcuos.com@gmail.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | #ifndef __ASM_ARCH_MEMORY_H | ||
17 | #define __ASM_ARCH_MEMORY_H | ||
18 | |||
19 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
20 | |||
21 | #endif | ||
diff --git a/arch/arm/mach-omap1/include/mach/debug-macro.S b/arch/arm/mach-omap1/include/mach/debug-macro.S index 62856044eb63..2b36a281dc84 100644 --- a/arch/arm/mach-omap1/include/mach/debug-macro.S +++ b/arch/arm/mach-omap1/include/mach/debug-macro.S | |||
@@ -13,13 +13,8 @@ | |||
13 | 13 | ||
14 | #include <linux/serial_reg.h> | 14 | #include <linux/serial_reg.h> |
15 | 15 | ||
16 | #include <asm/memory.h> | ||
17 | |||
18 | #include <plat/serial.h> | 16 | #include <plat/serial.h> |
19 | 17 | ||
20 | #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) | ||
21 | #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) | ||
22 | |||
23 | .pushsection .data | 18 | .pushsection .data |
24 | omap_uart_phys: .word 0x0 | 19 | omap_uart_phys: .word 0x0 |
25 | omap_uart_virt: .word 0x0 | 20 | omap_uart_virt: .word 0x0 |
@@ -31,26 +26,24 @@ omap_uart_virt: .word 0x0 | |||
31 | * the desired UART phys and virt addresses temporarily into | 26 | * the desired UART phys and virt addresses temporarily into |
32 | * the omap_uart_phys and omap_uart_virt above. | 27 | * the omap_uart_phys and omap_uart_virt above. |
33 | */ | 28 | */ |
34 | .macro addruart, rp, rv | 29 | .macro addruart, rp, rv, tmp |
35 | 30 | ||
36 | /* Use omap_uart_phys/virt if already configured */ | 31 | /* Use omap_uart_phys/virt if already configured */ |
37 | 9: mrc p15, 0, \rp, c1, c0 | 32 | 9: adr \rp, 99f @ get effective addr of 99f |
38 | tst \rp, #1 @ MMU enabled? | 33 | ldr \rv, [\rp] @ get absolute addr of 99f |
39 | ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | 34 | sub \rv, \rv, \rp @ offset between the two |
40 | ldrne \rp, =omap_uart_phys @ MMU enabled | 35 | ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys |
41 | add \rv, \rp, #4 @ omap_uart_virt | 36 | sub \tmp, \rp, \rv @ make it effective |
42 | ldr \rp, [\rp, #0] | 37 | ldr \rp, [\tmp, #0] @ omap_uart_phys |
43 | ldr \rv, [\rv, #0] | 38 | ldr \rv, [\tmp, #4] @ omap_uart_virt |
44 | cmp \rp, #0 @ is port configured? | 39 | cmp \rp, #0 @ is port configured? |
45 | cmpne \rv, #0 | 40 | cmpne \rv, #0 |
46 | bne 99f @ already configured | 41 | bne 100f @ already configured |
47 | 42 | ||
48 | /* Check the debug UART configuration set in uncompress.h */ | 43 | /* Check the debug UART configuration set in uncompress.h */ |
49 | mrc p15, 0, \rp, c1, c0 | 44 | and \rp, pc, #0xff000000 |
50 | tst \rp, #1 @ MMU enabled? | 45 | ldr \rv, =OMAP_UART_INFO_OFS |
51 | ldreq \rp, =OMAP_UART_INFO @ MMU not enabled | 46 | ldr \rp, [\rp, \rv] |
52 | ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled | ||
53 | ldr \rp, [\rp, #0] | ||
54 | 47 | ||
55 | /* Select the UART to use based on the UART1 scratchpad value */ | 48 | /* Select the UART to use based on the UART1 scratchpad value */ |
56 | 10: cmp \rp, #0 @ no port configured? | 49 | 10: cmp \rp, #0 @ no port configured? |
@@ -74,17 +67,18 @@ omap_uart_virt: .word 0x0 | |||
74 | 67 | ||
75 | /* Store both phys and virt address for the uart */ | 68 | /* Store both phys and virt address for the uart */ |
76 | 98: add \rp, \rp, #0xff000000 @ phys base | 69 | 98: add \rp, \rp, #0xff000000 @ phys base |
77 | mrc p15, 0, \rv, c1, c0 | 70 | str \rp, [\tmp, #0] @ omap_uart_phys |
78 | tst \rv, #1 @ MMU enabled? | ||
79 | ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | ||
80 | ldrne \rv, =omap_uart_phys @ MMU enabled | ||
81 | str \rp, [\rv, #0] | ||
82 | sub \rp, \rp, #0xff000000 @ phys base | 71 | sub \rp, \rp, #0xff000000 @ phys base |
83 | add \rp, \rp, #0xfe000000 @ virt base | 72 | add \rp, \rp, #0xfe000000 @ virt base |
84 | add \rv, \rv, #4 @ omap_uart_lsr | 73 | str \rp, [\tmp, #4] @ omap_uart_virt |
85 | str \rp, [\rv, #0] | ||
86 | b 9b | 74 | b 9b |
87 | 99: | 75 | |
76 | .align | ||
77 | 99: .word . | ||
78 | .word omap_uart_phys | ||
79 | .ltorg | ||
80 | |||
81 | 100: | ||
88 | .endm | 82 | .endm |
89 | 83 | ||
90 | .macro senduart,rd,rx | 84 | .macro senduart,rd,rx |
diff --git a/arch/arm/mach-omap1/include/mach/memory.h b/arch/arm/mach-omap1/include/mach/memory.h index e9b600c113ef..c6337645ba8a 100644 --- a/arch/arm/mach-omap1/include/mach/memory.h +++ b/arch/arm/mach-omap1/include/mach/memory.h | |||
@@ -2,4 +2,55 @@ | |||
2 | * arch/arm/mach-omap1/include/mach/memory.h | 2 | * arch/arm/mach-omap1/include/mach/memory.h |
3 | */ | 3 | */ |
4 | 4 | ||
5 | #include <plat/memory.h> | 5 | #ifndef __ASM_ARCH_MEMORY_H |
6 | #define __ASM_ARCH_MEMORY_H | ||
7 | |||
8 | /* | ||
9 | * Physical DRAM offset. | ||
10 | */ | ||
11 | #define PLAT_PHYS_OFFSET UL(0x10000000) | ||
12 | |||
13 | /* | ||
14 | * Bus address is physical address, except for OMAP-1510 Local Bus. | ||
15 | * OMAP-1510 bus address is translated into a Local Bus address if the | ||
16 | * OMAP bus type is lbus. We do the address translation based on the | ||
17 | * device overriding the defaults used in the dma-mapping API. | ||
18 | * Note that the is_lbus_device() test is not very efficient on 1510 | ||
19 | * because of the strncmp(). | ||
20 | */ | ||
21 | #ifdef CONFIG_ARCH_OMAP15XX | ||
22 | |||
23 | /* | ||
24 | * OMAP-1510 Local Bus address offset | ||
25 | */ | ||
26 | #define OMAP1510_LB_OFFSET UL(0x30000000) | ||
27 | |||
28 | #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) | ||
29 | #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) | ||
30 | #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) | ||
31 | |||
32 | #define __arch_pfn_to_dma(dev, pfn) \ | ||
33 | ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ | ||
34 | if (is_lbus_device(dev)) \ | ||
35 | __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ | ||
36 | __dma; }) | ||
37 | |||
38 | #define __arch_dma_to_pfn(dev, addr) \ | ||
39 | ({ dma_addr_t __dma = addr; \ | ||
40 | if (is_lbus_device(dev)) \ | ||
41 | __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ | ||
42 | __phys_to_pfn(__dma); \ | ||
43 | }) | ||
44 | |||
45 | #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ | ||
46 | lbus_to_virt(addr) : \ | ||
47 | __phys_to_virt(addr)); }) | ||
48 | |||
49 | #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ | ||
50 | (dma_addr_t) (is_lbus_device(dev) ? \ | ||
51 | virt_to_lbus(__addr) : \ | ||
52 | __virt_to_phys(__addr)); }) | ||
53 | |||
54 | #endif /* CONFIG_ARCH_OMAP15XX */ | ||
55 | |||
56 | #endif | ||
diff --git a/arch/arm/mach-omap2/include/mach/debug-macro.S b/arch/arm/mach-omap2/include/mach/debug-macro.S index 48adfe9fe4f3..13f98e59cfef 100644 --- a/arch/arm/mach-omap2/include/mach/debug-macro.S +++ b/arch/arm/mach-omap2/include/mach/debug-macro.S | |||
@@ -13,15 +13,10 @@ | |||
13 | 13 | ||
14 | #include <linux/serial_reg.h> | 14 | #include <linux/serial_reg.h> |
15 | 15 | ||
16 | #include <asm/memory.h> | ||
17 | |||
18 | #include <plat/serial.h> | 16 | #include <plat/serial.h> |
19 | 17 | ||
20 | #define UART_OFFSET(addr) ((addr) & 0x00ffffff) | 18 | #define UART_OFFSET(addr) ((addr) & 0x00ffffff) |
21 | 19 | ||
22 | #define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET) | ||
23 | #define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET) | ||
24 | |||
25 | .pushsection .data | 20 | .pushsection .data |
26 | omap_uart_phys: .word 0 | 21 | omap_uart_phys: .word 0 |
27 | omap_uart_virt: .word 0 | 22 | omap_uart_virt: .word 0 |
@@ -34,26 +29,25 @@ omap_uart_lsr: .word 0 | |||
34 | * the desired UART phys and virt addresses temporarily into | 29 | * the desired UART phys and virt addresses temporarily into |
35 | * the omap_uart_phys and omap_uart_virt above. | 30 | * the omap_uart_phys and omap_uart_virt above. |
36 | */ | 31 | */ |
37 | .macro addruart, rp, rv | 32 | .macro addruart, rp, rv, tmp |
38 | 33 | ||
39 | /* Use omap_uart_phys/virt if already configured */ | 34 | /* Use omap_uart_phys/virt if already configured */ |
40 | 10: mrc p15, 0, \rp, c1, c0 | 35 | 10: adr \rp, 99f @ get effective addr of 99f |
41 | tst \rp, #1 @ MMU enabled? | 36 | ldr \rv, [\rp] @ get absolute addr of 99f |
42 | ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | 37 | sub \rv, \rv, \rp @ offset between the two |
43 | ldrne \rp, =omap_uart_phys @ MMU enabled | 38 | ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys |
44 | add \rv, \rp, #4 @ omap_uart_virt | 39 | sub \tmp, \rp, \rv @ make it effective |
45 | ldr \rp, [\rp, #0] | 40 | ldr \rp, [\tmp, #0] @ omap_uart_phys |
46 | ldr \rv, [\rv, #0] | 41 | ldr \rv, [\tmp, #4] @ omap_uart_virt |
47 | cmp \rp, #0 @ is port configured? | 42 | cmp \rp, #0 @ is port configured? |
48 | cmpne \rv, #0 | 43 | cmpne \rv, #0 |
49 | bne 99f @ already configured | 44 | bne 100f @ already configured |
50 | 45 | ||
51 | /* Check the debug UART configuration set in uncompress.h */ | 46 | /* Check the debug UART configuration set in uncompress.h */ |
52 | mrc p15, 0, \rp, c1, c0 | 47 | mov \rp, pc |
53 | tst \rp, #1 @ MMU enabled? | 48 | ldr \rv, =OMAP_UART_INFO_OFS |
54 | ldreq \rp, =OMAP_UART_INFO @ MMU not enabled | 49 | and \rp, \rp, #0xff000000 |
55 | ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled | 50 | ldr \rp, [\rp, \rv] |
56 | ldr \rp, [\rp, #0] | ||
57 | 51 | ||
58 | /* Select the UART to use based on the UART1 scratchpad value */ | 52 | /* Select the UART to use based on the UART1 scratchpad value */ |
59 | cmp \rp, #0 @ no port configured? | 53 | cmp \rp, #0 @ no port configured? |
@@ -106,50 +100,47 @@ omap_uart_lsr: .word 0 | |||
106 | b 98f | 100 | b 98f |
107 | 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) | 101 | 83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE) |
108 | b 98f | 102 | b 98f |
103 | |||
109 | 95: ldr \rp, =ZOOM_UART_BASE | 104 | 95: ldr \rp, =ZOOM_UART_BASE |
110 | mrc p15, 0, \rv, c1, c0 | 105 | str \rp, [\tmp, #0] @ omap_uart_phys |
111 | tst \rv, #1 @ MMU enabled? | ||
112 | ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | ||
113 | ldrne \rv, =omap_uart_phys @ MMU enabled | ||
114 | str \rp, [\rv, #0] | ||
115 | ldr \rp, =ZOOM_UART_VIRT | 106 | ldr \rp, =ZOOM_UART_VIRT |
116 | add \rv, \rv, #4 @ omap_uart_virt | 107 | str \rp, [\tmp, #4] @ omap_uart_virt |
117 | str \rp, [\rv, #0] | ||
118 | mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) | 108 | mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) |
119 | add \rv, \rv, #4 @ omap_uart_lsr | 109 | str \rp, [\tmp, #8] @ omap_uart_lsr |
120 | str \rp, [\rv, #0] | ||
121 | b 10b | 110 | b 10b |
122 | 111 | ||
123 | /* Store both phys and virt address for the uart */ | 112 | /* Store both phys and virt address for the uart */ |
124 | 98: add \rp, \rp, #0x48000000 @ phys base | 113 | 98: add \rp, \rp, #0x48000000 @ phys base |
125 | mrc p15, 0, \rv, c1, c0 | 114 | str \rp, [\tmp, #0] @ omap_uart_phys |
126 | tst \rv, #1 @ MMU enabled? | ||
127 | ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled | ||
128 | ldrne \rv, =omap_uart_phys @ MMU enabled | ||
129 | str \rp, [\rv, #0] | ||
130 | sub \rp, \rp, #0x48000000 @ phys base | 115 | sub \rp, \rp, #0x48000000 @ phys base |
131 | add \rp, \rp, #0xfa000000 @ virt base | 116 | add \rp, \rp, #0xfa000000 @ virt base |
132 | add \rv, \rv, #4 @ omap_uart_virt | 117 | str \rp, [\tmp, #4] @ omap_uart_virt |
133 | str \rp, [\rv, #0] | ||
134 | mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) | 118 | mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) |
135 | add \rv, \rv, #4 @ omap_uart_lsr | 119 | str \rp, [\tmp, #8] @ omap_uart_lsr |
136 | str \rp, [\rv, #0] | ||
137 | 120 | ||
138 | b 10b | 121 | b 10b |
139 | 99: | 122 | |
123 | .align | ||
124 | 99: .word . | ||
125 | .word omap_uart_phys | ||
126 | .ltorg | ||
127 | |||
128 | 100: /* Pass the UART_LSR reg address */ | ||
129 | ldr \tmp, [\tmp, #8] @ omap_uart_lsr | ||
130 | add \rp, \rp, \tmp | ||
131 | add \rv, \rv, \tmp | ||
140 | .endm | 132 | .endm |
141 | 133 | ||
142 | .macro senduart,rd,rx | 134 | .macro senduart,rd,rx |
143 | strb \rd, [\rx] | 135 | orr \rd, \rd, \rx, lsl #24 @ preserve LSR reg offset |
136 | bic \rx, \rx, #0xff @ get base (THR) reg address | ||
137 | strb \rd, [\rx] @ send lower byte of rd | ||
138 | orr \rx, \rx, \rd, lsr #24 @ restore original rx (LSR) | ||
139 | bic \rd, \rd, #(0xff << 24) @ restore original rd | ||
144 | .endm | 140 | .endm |
145 | 141 | ||
146 | .macro busyuart,rd,rx | 142 | .macro busyuart,rd,rx |
147 | 1001: mrc p15, 0, \rd, c1, c0 | 143 | 1001: ldrb \rd, [\rx] @ rx contains UART_LSR address |
148 | tst \rd, #1 @ MMU enabled? | ||
149 | ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled | ||
150 | ldrne \rd, =omap_uart_lsr @ MMU enabled | ||
151 | ldr \rd, [\rd, #0] | ||
152 | ldrb \rd, [\rx, \rd] | ||
153 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | 144 | and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE) |
154 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) | 145 | teq \rd, #(UART_LSR_TEMT | UART_LSR_THRE) |
155 | bne 1001b | 146 | bne 1001b |
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index ceb8b7e593d7..feb90a10945a 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S | |||
@@ -78,7 +78,7 @@ | |||
78 | 4401: ldr \irqstat, [\base, #GIC_CPU_INTACK] | 78 | 4401: ldr \irqstat, [\base, #GIC_CPU_INTACK] |
79 | ldr \tmp, =1021 | 79 | ldr \tmp, =1021 |
80 | bic \irqnr, \irqstat, #0x1c00 | 80 | bic \irqnr, \irqstat, #0x1c00 |
81 | cmp \irqnr, #29 | 81 | cmp \irqnr, #15 |
82 | cmpcc \irqnr, \irqnr | 82 | cmpcc \irqnr, \irqnr |
83 | cmpne \irqnr, \tmp | 83 | cmpne \irqnr, \tmp |
84 | cmpcs \irqnr, \irqnr | 84 | cmpcs \irqnr, \irqnr |
@@ -101,18 +101,6 @@ | |||
101 | it cs | 101 | it cs |
102 | cmpcs \irqnr, \irqnr | 102 | cmpcs \irqnr, \irqnr |
103 | .endm | 103 | .endm |
104 | |||
105 | /* As above, this assumes that irqstat and base are preserved */ | ||
106 | |||
107 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
108 | bic \irqnr, \irqstat, #0x1c00 | ||
109 | mov \tmp, #0 | ||
110 | cmp \irqnr, #29 | ||
111 | itt eq | ||
112 | moveq \tmp, #1 | ||
113 | streq \irqstat, [\base, #GIC_CPU_EOI] | ||
114 | cmp \tmp, #0 | ||
115 | .endm | ||
116 | #endif /* CONFIG_SMP */ | 104 | #endif /* CONFIG_SMP */ |
117 | 105 | ||
118 | #else /* MULTI_OMAP2 */ | 106 | #else /* MULTI_OMAP2 */ |
diff --git a/arch/arm/mach-omap2/include/mach/memory.h b/arch/arm/mach-omap2/include/mach/memory.h deleted file mode 100644 index ca6d32a917dd..000000000000 --- a/arch/arm/mach-omap2/include/mach/memory.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap2/include/mach/memory.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/memory.h> | ||
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index ce65e9329c7b..889464dc7b2d 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c | |||
@@ -109,12 +109,10 @@ void __init smp_init_cpus(void) | |||
109 | ncores = scu_get_core_count(scu_base); | 109 | ncores = scu_get_core_count(scu_base); |
110 | 110 | ||
111 | /* sanity check */ | 111 | /* sanity check */ |
112 | if (ncores > NR_CPUS) { | 112 | if (ncores > nr_cpu_ids) { |
113 | printk(KERN_WARNING | 113 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", |
114 | "OMAP4: no. of cores (%d) greater than configured " | 114 | ncores, nr_cpu_ids); |
115 | "maximum of %d - clipping\n", | 115 | ncores = nr_cpu_ids; |
116 | ncores, NR_CPUS); | ||
117 | ncores = NR_CPUS; | ||
118 | } | 116 | } |
119 | 117 | ||
120 | for (i = 0; i < ncores; i++) | 118 | for (i = 0; i < ncores; i++) |
diff --git a/arch/arm/mach-orion5x/include/mach/debug-macro.S b/arch/arm/mach-orion5x/include/mach/debug-macro.S index 5e3bf5b68aec..f340ed8f8dd0 100644 --- a/arch/arm/mach-orion5x/include/mach/debug-macro.S +++ b/arch/arm/mach-orion5x/include/mach/debug-macro.S | |||
@@ -10,7 +10,7 @@ | |||
10 | 10 | ||
11 | #include <mach/orion5x.h> | 11 | #include <mach/orion5x.h> |
12 | 12 | ||
13 | .macro addruart, rp, rv | 13 | .macro addruart, rp, rv, tmp |
14 | ldr \rp, =ORION5X_REGS_PHYS_BASE | 14 | ldr \rp, =ORION5X_REGS_PHYS_BASE |
15 | ldr \rv, =ORION5X_REGS_VIRT_BASE | 15 | ldr \rv, =ORION5X_REGS_VIRT_BASE |
16 | orr \rp, \rp, #0x00012000 | 16 | orr \rp, \rp, #0x00012000 |
diff --git a/arch/arm/mach-orion5x/include/mach/memory.h b/arch/arm/mach-orion5x/include/mach/memory.h deleted file mode 100644 index 6769917882fe..000000000000 --- a/arch/arm/mach-orion5x/include/mach/memory.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion5x/include/mach/memory.h | ||
3 | * | ||
4 | * Marvell Orion memory definitions | ||
5 | */ | ||
6 | |||
7 | #ifndef __ASM_ARCH_MEMORY_H | ||
8 | #define __ASM_ARCH_MEMORY_H | ||
9 | |||
10 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
11 | |||
12 | #endif | ||
diff --git a/arch/arm/mach-pnx4008/include/mach/debug-macro.S b/arch/arm/mach-pnx4008/include/mach/debug-macro.S index 931afebaf064..469d60d97f5c 100644 --- a/arch/arm/mach-pnx4008/include/mach/debug-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00090000 | 15 | mov \rp, #0x00090000 |
16 | add \rv, \rp, #0xf4000000 @ virtual | 16 | add \rv, \rp, #0xf4000000 @ virtual |
17 | add \rp, \rp, #0x40000000 @ physical | 17 | add \rp, \rp, #0x40000000 @ physical |
diff --git a/arch/arm/mach-pnx4008/include/mach/memory.h b/arch/arm/mach-pnx4008/include/mach/memory.h deleted file mode 100644 index 1275db61cee5..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/memory.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2005 Philips Semiconductors | ||
5 | * Copyright (c) 2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | /* | ||
17 | * Physical DRAM offset. | ||
18 | */ | ||
19 | #define PLAT_PHYS_OFFSET UL(0x80000000) | ||
20 | |||
21 | #endif | ||
diff --git a/arch/arm/mach-prima2/include/mach/debug-macro.S b/arch/arm/mach-prima2/include/mach/debug-macro.S index bf75106333ff..cd97492bb075 100644 --- a/arch/arm/mach-prima2/include/mach/debug-macro.S +++ b/arch/arm/mach-prima2/include/mach/debug-macro.S | |||
@@ -9,7 +9,7 @@ | |||
9 | #include <mach/hardware.h> | 9 | #include <mach/hardware.h> |
10 | #include <mach/uart.h> | 10 | #include <mach/uart.h> |
11 | 11 | ||
12 | .macro addruart, rp, rv | 12 | .macro addruart, rp, rv, tmp |
13 | ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical | 13 | ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical |
14 | ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual | 14 | ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual |
15 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-prima2/include/mach/memory.h b/arch/arm/mach-prima2/include/mach/memory.h deleted file mode 100644 index 368cd5a0601a..000000000000 --- a/arch/arm/mach-prima2/include/mach/memory.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-prima2/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2010 – 2011 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
5 | * | ||
6 | * Licensed under GPLv2 or later. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_MEMORY_H | ||
10 | #define __ASM_ARCH_MEMORY_H | ||
11 | |||
12 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
13 | |||
14 | /* | ||
15 | * Restrict DMA-able region to workaround silicon limitation. | ||
16 | * The limitation restricts buffers available for DMA to SD/MMC | ||
17 | * hardware to be below 256MB | ||
18 | */ | ||
19 | #define ARM_DMA_ZONE_SIZE (SZ_256M) | ||
20 | |||
21 | #endif | ||
diff --git a/arch/arm/mach-prima2/l2x0.c b/arch/arm/mach-prima2/l2x0.c index 9cda2057bcfb..66c6387e5a04 100644 --- a/arch/arm/mach-prima2/l2x0.c +++ b/arch/arm/mach-prima2/l2x0.c | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/of.h> | 13 | #include <linux/of.h> |
14 | #include <linux/of_address.h> | 14 | #include <linux/of_address.h> |
15 | #include <asm/hardware/cache-l2x0.h> | 15 | #include <asm/hardware/cache-l2x0.h> |
16 | #include <mach/memory.h> | ||
17 | 16 | ||
18 | #define L2X0_ADDR_FILTERING_START 0xC00 | 17 | #define L2X0_ADDR_FILTERING_START 0xC00 |
19 | #define L2X0_ADDR_FILTERING_END 0xC04 | 18 | #define L2X0_ADDR_FILTERING_END 0xC04 |
@@ -41,9 +40,9 @@ static int __init sirfsoc_of_l2x_init(void) | |||
41 | /* | 40 | /* |
42 | * set the physical memory windows L2 cache will cover | 41 | * set the physical memory windows L2 cache will cover |
43 | */ | 42 | */ |
44 | writel_relaxed(PLAT_PHYS_OFFSET + 1024 * 1024 * 1024, | 43 | writel_relaxed(PHYS_OFFSET + 1024 * 1024 * 1024, |
45 | sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END); | 44 | sirfsoc_l2x_base + L2X0_ADDR_FILTERING_END); |
46 | writel_relaxed(PLAT_PHYS_OFFSET | 0x1, | 45 | writel_relaxed(PHYS_OFFSET | 0x1, |
47 | sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START); | 46 | sirfsoc_l2x_base + L2X0_ADDR_FILTERING_START); |
48 | 47 | ||
49 | writel_relaxed(0, | 48 | writel_relaxed(0, |
diff --git a/arch/arm/mach-prima2/prima2.c b/arch/arm/mach-prima2/prima2.c index 5654a04319fd..ee33c3d458f5 100644 --- a/arch/arm/mach-prima2/prima2.c +++ b/arch/arm/mach-prima2/prima2.c | |||
@@ -36,6 +36,7 @@ MACHINE_START(PRIMA2_EVB, "prima2cb") | |||
36 | .map_io = sirfsoc_map_lluart, | 36 | .map_io = sirfsoc_map_lluart, |
37 | .init_irq = sirfsoc_of_irq_init, | 37 | .init_irq = sirfsoc_of_irq_init, |
38 | .timer = &sirfsoc_timer, | 38 | .timer = &sirfsoc_timer, |
39 | .dma_zone_size = SZ_256M, | ||
39 | .init_machine = sirfsoc_mach_init, | 40 | .init_machine = sirfsoc_mach_init, |
40 | .dt_compat = prima2cb_dt_match, | 41 | .dt_compat = prima2cb_dt_match, |
41 | MACHINE_END | 42 | MACHINE_END |
diff --git a/arch/arm/mach-pxa/include/mach/debug-macro.S b/arch/arm/mach-pxa/include/mach/debug-macro.S index 7d5c75125d65..70b112e8ef68 100644 --- a/arch/arm/mach-pxa/include/mach/debug-macro.S +++ b/arch/arm/mach-pxa/include/mach/debug-macro.S | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | #include "hardware.h" | 14 | #include "hardware.h" |
15 | 15 | ||
16 | .macro addruart, rp, rv | 16 | .macro addruart, rp, rv, tmp |
17 | mov \rp, #0x00100000 | 17 | mov \rp, #0x00100000 |
18 | orr \rv, \rp, #io_p2v(0x40000000) @ virtual | 18 | orr \rv, \rp, #io_p2v(0x40000000) @ virtual |
19 | orr \rp, \rp, #0x40000000 @ physical | 19 | orr \rp, \rp, #0x40000000 @ physical |
diff --git a/arch/arm/mach-pxa/include/mach/memory.h b/arch/arm/mach-pxa/include/mach/memory.h deleted file mode 100644 index d05a59727d66..000000000000 --- a/arch/arm/mach-pxa/include/mach/memory.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/memory.h | ||
3 | * | ||
4 | * Author: Nicolas Pitre | ||
5 | * Copyright: (C) 2001 MontaVista Software Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_ARCH_MEMORY_H | ||
13 | #define __ASM_ARCH_MEMORY_H | ||
14 | |||
15 | /* | ||
16 | * Physical DRAM offset. | ||
17 | */ | ||
18 | #define PLAT_PHYS_OFFSET UL(0xa0000000) | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c index 65fed3753fa2..84ed72de53b5 100644 --- a/arch/arm/mach-pxa/z2.c +++ b/arch/arm/mach-pxa/z2.c | |||
@@ -686,7 +686,7 @@ static void z2_power_off(void) | |||
686 | */ | 686 | */ |
687 | PSPR = 0x0; | 687 | PSPR = 0x0; |
688 | local_irq_disable(); | 688 | local_irq_disable(); |
689 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PLAT_PHYS_OFFSET - PAGE_OFFSET); | 689 | pxa27x_cpu_suspend(PWRMODE_DEEPSLEEP, PHYS_OFFSET - PAGE_OFFSET); |
690 | } | 690 | } |
691 | #else | 691 | #else |
692 | #define z2_power_off NULL | 692 | #define z2_power_off NULL |
diff --git a/arch/arm/mach-realview/include/mach/debug-macro.S b/arch/arm/mach-realview/include/mach/debug-macro.S index 90b687cbe04e..fb4901c4ef04 100644 --- a/arch/arm/mach-realview/include/mach/debug-macro.S +++ b/arch/arm/mach-realview/include/mach/debug-macro.S | |||
@@ -33,7 +33,7 @@ | |||
33 | #error "Unknown RealView platform" | 33 | #error "Unknown RealView platform" |
34 | #endif | 34 | #endif |
35 | 35 | ||
36 | .macro addruart, rp, rv | 36 | .macro addruart, rp, rv, tmp |
37 | mov \rp, #DEBUG_LL_UART_OFFSET | 37 | mov \rp, #DEBUG_LL_UART_OFFSET |
38 | orr \rv, \rp, #0xfb000000 @ virtual base | 38 | orr \rv, \rp, #0xfb000000 @ virtual base |
39 | orr \rp, \rp, #0x10000000 @ physical base | 39 | orr \rp, \rp, #0x10000000 @ physical base |
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index 4ae943bafa92..e83c654a58d0 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c | |||
@@ -52,12 +52,10 @@ void __init smp_init_cpus(void) | |||
52 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; | 52 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; |
53 | 53 | ||
54 | /* sanity check */ | 54 | /* sanity check */ |
55 | if (ncores > NR_CPUS) { | 55 | if (ncores > nr_cpu_ids) { |
56 | printk(KERN_WARNING | 56 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", |
57 | "Realview: no. of cores (%d) greater than configured " | 57 | ncores, nr_cpu_ids); |
58 | "maximum of %d - clipping\n", | 58 | ncores = nr_cpu_ids; |
59 | ncores, NR_CPUS); | ||
60 | ncores = NR_CPUS; | ||
61 | } | 59 | } |
62 | 60 | ||
63 | for (i = 0; i < ncores; i++) | 61 | for (i = 0; i < ncores; i++) |
diff --git a/arch/arm/mach-rpc/include/mach/debug-macro.S b/arch/arm/mach-rpc/include/mach/debug-macro.S index 85effffdc2b2..6d28cc99b124 100644 --- a/arch/arm/mach-rpc/include/mach/debug-macro.S +++ b/arch/arm/mach-rpc/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00010000 | 15 | mov \rp, #0x00010000 |
16 | orr \rp, \rp, #0x00000fe0 | 16 | orr \rp, \rp, #0x00000fe0 |
17 | orr \rv, \rp, #0xe0000000 @ virtual | 17 | orr \rv, \rp, #0xe0000000 @ virtual |
diff --git a/arch/arm/mach-s3c2400/include/mach/memory.h b/arch/arm/mach-s3c2400/include/mach/memory.h deleted file mode 100644 index 3f33670dd012..000000000000 --- a/arch/arm/mach-s3c2400/include/mach/memory.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2400/include/mach/memory.h | ||
2 | * from arch/arm/mach-rpc/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright 2007 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Copyright (C) 1996,1997,1998 Russell King. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __ASM_ARCH_MEMORY_H | ||
16 | #define __ASM_ARCH_MEMORY_H | ||
17 | |||
18 | #define PLAT_PHYS_OFFSET UL(0x0C000000) | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/debug-macro.S b/arch/arm/mach-s3c2410/include/mach/debug-macro.S index 5882deaa56be..4135de87d1f7 100644 --- a/arch/arm/mach-s3c2410/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/debug-macro.S | |||
@@ -19,7 +19,7 @@ | |||
19 | #define S3C2410_UART1_OFF (0x4000) | 19 | #define S3C2410_UART1_OFF (0x4000) |
20 | #define SHIFT_2440TXF (14-9) | 20 | #define SHIFT_2440TXF (14-9) |
21 | 21 | ||
22 | .macro addruart, rp, rv | 22 | .macro addruart, rp, rv, tmp |
23 | ldr \rp, = S3C24XX_PA_UART | 23 | ldr \rp, = S3C24XX_PA_UART |
24 | ldr \rv, = S3C24XX_VA_UART | 24 | ldr \rv, = S3C24XX_VA_UART |
25 | #if CONFIG_DEBUG_S3C_UART != 0 | 25 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/mach-s3c2410/include/mach/memory.h b/arch/arm/mach-s3c2410/include/mach/memory.h deleted file mode 100644 index f92b97b89c0c..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/memory.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/memory.h | ||
2 | * from arch/arm/mach-rpc/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 1996,1997,1998 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_MEMORY_H | ||
12 | #define __ASM_ARCH_MEMORY_H | ||
13 | |||
14 | #define PLAT_PHYS_OFFSET UL(0x30000000) | ||
15 | |||
16 | #endif | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S index a29e70550c70..c0c076a90f27 100644 --- a/arch/arm/mach-s3c64xx/include/mach/debug-macro.S +++ b/arch/arm/mach-s3c64xx/include/mach/debug-macro.S | |||
@@ -21,7 +21,7 @@ | |||
21 | * aligned and add in the offset when we load the value here. | 21 | * aligned and add in the offset when we load the value here. |
22 | */ | 22 | */ |
23 | 23 | ||
24 | .macro addruart, rp, rv | 24 | .macro addruart, rp, rv, tmp |
25 | ldr \rp, = S3C_PA_UART | 25 | ldr \rp, = S3C_PA_UART |
26 | ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) | 26 | ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) |
27 | #if CONFIG_DEBUG_S3C_UART != 0 | 27 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h deleted file mode 100644 index b704669f95ff..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/memory.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x50000000) | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S index 79b04e6a6f8e..e80ba3c69814 100644 --- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S +++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S | |||
@@ -15,7 +15,7 @@ | |||
15 | 15 | ||
16 | #include <plat/regs-serial.h> | 16 | #include <plat/regs-serial.h> |
17 | 17 | ||
18 | .macro addruart, rp, rv | 18 | .macro addruart, rp, rv, tmp |
19 | mov \rp, #0xE0000000 | 19 | mov \rp, #0xE0000000 |
20 | orr \rp, \rp, #0x00100000 | 20 | orr \rp, \rp, #0x00100000 |
21 | ldr \rp, [\rp, #0x118 ] | 21 | ldr \rp, [\rp, #0x118 ] |
diff --git a/arch/arm/mach-s5p64x0/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h deleted file mode 100644 index b14cbc3f521b..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/memory.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - Memory definitions | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H __FILE__ | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
17 | |||
18 | #endif /* __ASM_ARCH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-s5pc100/include/mach/debug-macro.S b/arch/arm/mach-s5pc100/include/mach/debug-macro.S index b2ba95ddf8e0..694f75937000 100644 --- a/arch/arm/mach-s5pc100/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/debug-macro.S | |||
@@ -22,7 +22,7 @@ | |||
22 | * aligned and add in the offset when we load the value here. | 22 | * aligned and add in the offset when we load the value here. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | .macro addruart, rp, rv | 25 | .macro addruart, rp, rv, tmp |
26 | ldr \rp, = S3C_PA_UART | 26 | ldr \rp, = S3C_PA_UART |
27 | ldr \rv, = S3C_VA_UART | 27 | ldr \rv, = S3C_VA_UART |
28 | #if CONFIG_DEBUG_S3C_UART != 0 | 28 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/mach-s5pc100/include/mach/memory.h b/arch/arm/mach-s5pc100/include/mach/memory.h deleted file mode 100644 index bda4e79fd5fc..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/memory.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* arch/arm/mach-s5pc100/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright 2008 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * Based on mach-s3c6400/include/mach/memory.h | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_MEMORY_H | ||
14 | #define __ASM_ARCH_MEMORY_H | ||
15 | |||
16 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/debug-macro.S b/arch/arm/mach-s5pv210/include/mach/debug-macro.S index 169fe654a59e..79e55597ab63 100644 --- a/arch/arm/mach-s5pv210/include/mach/debug-macro.S +++ b/arch/arm/mach-s5pv210/include/mach/debug-macro.S | |||
@@ -21,7 +21,7 @@ | |||
21 | * aligned and add in the offset when we load the value here. | 21 | * aligned and add in the offset when we load the value here. |
22 | */ | 22 | */ |
23 | 23 | ||
24 | .macro addruart, rp, rv | 24 | .macro addruart, rp, rv, tmp |
25 | ldr \rp, = S3C_PA_UART | 25 | ldr \rp, = S3C_PA_UART |
26 | ldr \rv, = S3C_VA_UART | 26 | ldr \rv, = S3C_VA_UART |
27 | #if CONFIG_DEBUG_S3C_UART != 0 | 27 | #if CONFIG_DEBUG_S3C_UART != 0 |
diff --git a/arch/arm/mach-sa1100/include/mach/debug-macro.S b/arch/arm/mach-sa1100/include/mach/debug-macro.S index 0cd0fc9635b6..530772d937ad 100644 --- a/arch/arm/mach-sa1100/include/mach/debug-macro.S +++ b/arch/arm/mach-sa1100/include/mach/debug-macro.S | |||
@@ -12,7 +12,7 @@ | |||
12 | */ | 12 | */ |
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | 14 | ||
15 | .macro addruart, rp, rv | 15 | .macro addruart, rp, rv, tmp |
16 | mrc p15, 0, \rp, c1, c0 | 16 | mrc p15, 0, \rp, c1, c0 |
17 | tst \rp, #1 @ MMU enabled? | 17 | tst \rp, #1 @ MMU enabled? |
18 | moveq \rp, #0x80000000 @ physical base address | 18 | moveq \rp, #0x80000000 @ physical base address |
diff --git a/arch/arm/mach-shark/include/mach/debug-macro.S b/arch/arm/mach-shark/include/mach/debug-macro.S index a473f55dc71f..20eb2bf2a42b 100644 --- a/arch/arm/mach-shark/include/mach/debug-macro.S +++ b/arch/arm/mach-shark/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0xe0000000 | 15 | mov \rp, #0xe0000000 |
16 | orr \rp, \rp, #0x000003f8 | 16 | orr \rp, \rp, #0x000003f8 |
17 | mov \rv, \rp | 17 | mov \rv, \rp |
diff --git a/arch/arm/mach-shmobile/entry-intc.S b/arch/arm/mach-shmobile/entry-intc.S index cac0a7ae2084..1a1c00ca39a2 100644 --- a/arch/arm/mach-shmobile/entry-intc.S +++ b/arch/arm/mach-shmobile/entry-intc.S | |||
@@ -51,7 +51,4 @@ | |||
51 | .macro test_for_ipi, irqnr, irqstat, base, tmp | 51 | .macro test_for_ipi, irqnr, irqstat, base, tmp |
52 | .endm | 52 | .endm |
53 | 53 | ||
54 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
55 | .endm | ||
56 | |||
57 | arch_irq_handler shmobile_handle_irq_intc | 54 | arch_irq_handler shmobile_handle_irq_intc |
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S index d791f10eeac7..8d4a416d4285 100644 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S | |||
@@ -27,8 +27,5 @@ | |||
27 | .macro test_for_ipi, irqnr, irqstat, base, tmp | 27 | .macro test_for_ipi, irqnr, irqstat, base, tmp |
28 | .endm | 28 | .endm |
29 | 29 | ||
30 | .macro test_for_ltirq, irqnr, irqstat, base, tmp | ||
31 | .endm | ||
32 | |||
33 | .macro arch_ret_to_user, tmp1, tmp2 | 30 | .macro arch_ret_to_user, tmp1, tmp2 |
34 | .endm | 31 | .endm |
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c index 66f980625a33..e4e485fa2532 100644 --- a/arch/arm/mach-shmobile/platsmp.c +++ b/arch/arm/mach-shmobile/platsmp.c | |||
@@ -56,6 +56,12 @@ void __init smp_init_cpus(void) | |||
56 | unsigned int ncores = shmobile_smp_get_core_count(); | 56 | unsigned int ncores = shmobile_smp_get_core_count(); |
57 | unsigned int i; | 57 | unsigned int i; |
58 | 58 | ||
59 | if (ncores > nr_cpu_ids) { | ||
60 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | ||
61 | ncores, nr_cpu_ids); | ||
62 | ncores = nr_cpu_ids; | ||
63 | } | ||
64 | |||
59 | for (i = 0; i < ncores; i++) | 65 | for (i = 0; i < ncores; i++) |
60 | set_cpu_possible(i, true); | 66 | set_cpu_possible(i, true); |
61 | 67 | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/memory.h b/arch/arm/mach-spear3xx/include/mach/memory.h deleted file mode 100644 index 51735221ea19..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/memory.h | ||
3 | * | ||
4 | * Memory map for SPEAr3xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_MEMORY_H | ||
15 | #define __MACH_MEMORY_H | ||
16 | |||
17 | #include <plat/memory.h> | ||
18 | |||
19 | #endif /* __MACH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-spear6xx/include/mach/memory.h b/arch/arm/mach-spear6xx/include/mach/memory.h deleted file mode 100644 index 781f088fc228..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/memory.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/memory.h | ||
3 | * | ||
4 | * Memory map for SPEAr6xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_MEMORY_H | ||
15 | #define __MACH_MEMORY_H | ||
16 | |||
17 | #include <plat/memory.h> | ||
18 | |||
19 | #endif /* __MACH_MEMORY_H */ | ||
diff --git a/arch/arm/mach-tegra/include/mach/debug-macro.S b/arch/arm/mach-tegra/include/mach/debug-macro.S index e0ebe65c1657..619abc63aee8 100644 --- a/arch/arm/mach-tegra/include/mach/debug-macro.S +++ b/arch/arm/mach-tegra/include/mach/debug-macro.S | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <mach/io.h> | 21 | #include <mach/io.h> |
22 | #include <mach/iomap.h> | 22 | #include <mach/iomap.h> |
23 | 23 | ||
24 | .macro addruart, rp, rv | 24 | .macro addruart, rp, rv, tmp |
25 | ldr \rp, =IO_APB_PHYS @ physical | 25 | ldr \rp, =IO_APB_PHYS @ physical |
26 | ldr \rv, =IO_APB_VIRT @ virtual | 26 | ldr \rv, =IO_APB_VIRT @ virtual |
27 | orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF) | 27 | orr \rp, \rp, #(TEGRA_DEBUG_UART_BASE & 0xFF) |
diff --git a/arch/arm/mach-tegra/include/mach/memory.h b/arch/arm/mach-tegra/include/mach/memory.h deleted file mode 100644 index 537db3aa81a7..000000000000 --- a/arch/arm/mach-tegra/include/mach/memory.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-tegra/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Google, Inc. | ||
5 | * | ||
6 | * Author: | ||
7 | * Colin Cross <ccross@google.com> | ||
8 | * Erik Gilling <konkers@google.com> | ||
9 | * | ||
10 | * This software is licensed under the terms of the GNU General Public | ||
11 | * License version 2, as published by the Free Software Foundation, and | ||
12 | * may be copied, distributed, and modified under those terms. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_TEGRA_MEMORY_H | ||
22 | #define __MACH_TEGRA_MEMORY_H | ||
23 | |||
24 | /* physical offset of RAM */ | ||
25 | #define PLAT_PHYS_OFFSET UL(0) | ||
26 | |||
27 | #endif | ||
28 | |||
diff --git a/arch/arm/mach-tegra/platsmp.c b/arch/arm/mach-tegra/platsmp.c index 0886cbccddee..7d2b5d03c1df 100644 --- a/arch/arm/mach-tegra/platsmp.c +++ b/arch/arm/mach-tegra/platsmp.c | |||
@@ -114,10 +114,10 @@ void __init smp_init_cpus(void) | |||
114 | { | 114 | { |
115 | unsigned int i, ncores = scu_get_core_count(scu_base); | 115 | unsigned int i, ncores = scu_get_core_count(scu_base); |
116 | 116 | ||
117 | if (ncores > NR_CPUS) { | 117 | if (ncores > nr_cpu_ids) { |
118 | printk(KERN_ERR "Tegra: no. of cores (%u) greater than configured (%u), clipping\n", | 118 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", |
119 | ncores, NR_CPUS); | 119 | ncores, nr_cpu_ids); |
120 | ncores = NR_CPUS; | 120 | ncores = nr_cpu_ids; |
121 | } | 121 | } |
122 | 122 | ||
123 | for (i = 0; i < ncores; i++) | 123 | for (i = 0; i < ncores; i++) |
diff --git a/arch/arm/mach-u300/include/mach/debug-macro.S b/arch/arm/mach-u300/include/mach/debug-macro.S index df715707bead..8ae8e4ab34b0 100644 --- a/arch/arm/mach-u300/include/mach/debug-macro.S +++ b/arch/arm/mach-u300/include/mach/debug-macro.S | |||
@@ -10,7 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | #include <mach/hardware.h> | 11 | #include <mach/hardware.h> |
12 | 12 | ||
13 | .macro addruart, rp, rv | 13 | .macro addruart, rp, rv, tmp |
14 | /* If we move the address using MMU, use this. */ | 14 | /* If we move the address using MMU, use this. */ |
15 | ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address | 15 | ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address |
16 | ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address | 16 | ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address |
diff --git a/arch/arm/mach-ux500/include/mach/debug-macro.S b/arch/arm/mach-ux500/include/mach/debug-macro.S index 700fb05ee815..8d74d927d4e2 100644 --- a/arch/arm/mach-ux500/include/mach/debug-macro.S +++ b/arch/arm/mach-ux500/include/mach/debug-macro.S | |||
@@ -35,7 +35,7 @@ | |||
35 | #define UX500_UART(n) __UX500_UART(n) | 35 | #define UX500_UART(n) __UX500_UART(n) |
36 | #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) | 36 | #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) |
37 | 37 | ||
38 | .macro addruart, rp, rv | 38 | .macro addruart, rp, rv, tmp |
39 | ldr \rp, =UART_BASE @ no, physical address | 39 | ldr \rp, =UART_BASE @ no, physical address |
40 | ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address | 40 | ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address |
41 | .endm | 41 | .endm |
diff --git a/arch/arm/mach-ux500/include/mach/memory.h b/arch/arm/mach-ux500/include/mach/memory.h deleted file mode 100644 index 2ef697a67006..000000000000 --- a/arch/arm/mach-ux500/include/mach/memory.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | */ | ||
9 | #ifndef __ASM_ARCH_MEMORY_H | ||
10 | #define __ASM_ARCH_MEMORY_H | ||
11 | |||
12 | /* | ||
13 | * Physical DRAM offset. | ||
14 | */ | ||
15 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
16 | #define BUS_OFFSET UL(0x00000000) | ||
17 | |||
18 | #endif | ||
diff --git a/arch/arm/mach-ux500/platsmp.c b/arch/arm/mach-ux500/platsmp.c index a33df5f4c27a..eb5199102cfa 100644 --- a/arch/arm/mach-ux500/platsmp.c +++ b/arch/arm/mach-ux500/platsmp.c | |||
@@ -156,12 +156,10 @@ void __init smp_init_cpus(void) | |||
156 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; | 156 | ncores = scu_base ? scu_get_core_count(scu_base) : 1; |
157 | 157 | ||
158 | /* sanity check */ | 158 | /* sanity check */ |
159 | if (ncores > NR_CPUS) { | 159 | if (ncores > nr_cpu_ids) { |
160 | printk(KERN_WARNING | 160 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", |
161 | "U8500: no. of cores (%d) greater than configured " | 161 | ncores, nr_cpu_ids); |
162 | "maximum of %d - clipping\n", | 162 | ncores = nr_cpu_ids; |
163 | ncores, NR_CPUS); | ||
164 | ncores = NR_CPUS; | ||
165 | } | 163 | } |
166 | 164 | ||
167 | for (i = 0; i < ncores; i++) | 165 | for (i = 0; i < ncores; i++) |
diff --git a/arch/arm/mach-versatile/include/mach/debug-macro.S b/arch/arm/mach-versatile/include/mach/debug-macro.S index eb2cf7dc5c44..d0fbd7f1cb00 100644 --- a/arch/arm/mach-versatile/include/mach/debug-macro.S +++ b/arch/arm/mach-versatile/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x001F0000 | 15 | mov \rp, #0x001F0000 |
16 | orr \rp, \rp, #0x00001000 | 16 | orr \rp, \rp, #0x00001000 |
17 | orr \rv, \rp, #0xf1000000 @ virtual base | 17 | orr \rv, \rp, #0xf1000000 @ virtual base |
diff --git a/arch/arm/mach-versatile/include/mach/memory.h b/arch/arm/mach-versatile/include/mach/memory.h deleted file mode 100644 index dacc9d8e4e6a..000000000000 --- a/arch/arm/mach-versatile/include/mach/memory.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | /* | ||
24 | * Physical DRAM offset. | ||
25 | */ | ||
26 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index bfd32f52c2db..2b1e836a76ed 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -221,6 +221,12 @@ static void ct_ca9x4_init_cpu_map(void) | |||
221 | { | 221 | { |
222 | int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); | 222 | int i, ncores = scu_get_core_count(MMIO_P2V(A9_MPCORE_SCU)); |
223 | 223 | ||
224 | if (ncores > nr_cpu_ids) { | ||
225 | pr_warn("SMP: %u cores greater than maximum (%u), clipping\n", | ||
226 | ncores, nr_cpu_ids); | ||
227 | ncores = nr_cpu_ids; | ||
228 | } | ||
229 | |||
224 | for (i = 0; i < ncores; ++i) | 230 | for (i = 0; i < ncores; ++i) |
225 | set_cpu_possible(i, true); | 231 | set_cpu_possible(i, true); |
226 | 232 | ||
diff --git a/arch/arm/mach-vexpress/include/mach/debug-macro.S b/arch/arm/mach-vexpress/include/mach/debug-macro.S index 050d65e02a42..fd9e6c7ea49f 100644 --- a/arch/arm/mach-vexpress/include/mach/debug-macro.S +++ b/arch/arm/mach-vexpress/include/mach/debug-macro.S | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | #define DEBUG_LL_UART_OFFSET 0x00009000 | 13 | #define DEBUG_LL_UART_OFFSET 0x00009000 |
14 | 14 | ||
15 | .macro addruart,rp,rv | 15 | .macro addruart,rp,rv,tmp |
16 | mov \rp, #DEBUG_LL_UART_OFFSET | 16 | mov \rp, #DEBUG_LL_UART_OFFSET |
17 | orr \rv, \rp, #0xf8000000 @ virtual base | 17 | orr \rv, \rp, #0xf8000000 @ virtual base |
18 | orr \rp, \rp, #0x10000000 @ physical base | 18 | orr \rp, \rp, #0x10000000 @ physical base |
diff --git a/arch/arm/mach-vexpress/include/mach/memory.h b/arch/arm/mach-vexpress/include/mach/memory.h deleted file mode 100644 index 5b7fcd439d87..000000000000 --- a/arch/arm/mach-vexpress/include/mach/memory.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vexpress/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | #define PLAT_PHYS_OFFSET UL(0x60000000) | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-vt8500/include/mach/debug-macro.S b/arch/arm/mach-vt8500/include/mach/debug-macro.S index f1191626ad51..ca292f29d4a3 100644 --- a/arch/arm/mach-vt8500/include/mach/debug-macro.S +++ b/arch/arm/mach-vt8500/include/mach/debug-macro.S | |||
@@ -11,7 +11,7 @@ | |||
11 | * | 11 | * |
12 | */ | 12 | */ |
13 | 13 | ||
14 | .macro addruart, rp, rv | 14 | .macro addruart, rp, rv, tmp |
15 | mov \rp, #0x00200000 | 15 | mov \rp, #0x00200000 |
16 | orr \rv, \rp, #0xf8000000 | 16 | orr \rv, \rp, #0xf8000000 |
17 | orr \rp, \rp, #0xd8000000 | 17 | orr \rp, \rp, #0xd8000000 |
diff --git a/arch/arm/mach-vt8500/include/mach/memory.h b/arch/arm/mach-vt8500/include/mach/memory.h deleted file mode 100644 index 175f914eff93..000000000000 --- a/arch/arm/mach-vt8500/include/mach/memory.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vt8500/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_MEMORY_H | ||
21 | #define __ASM_ARCH_MEMORY_H | ||
22 | |||
23 | /* | ||
24 | * Physical DRAM offset. | ||
25 | */ | ||
26 | #define PHYS_OFFSET UL(0x00000000) | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-w90x900/include/mach/memory.h b/arch/arm/mach-w90x900/include/mach/memory.h deleted file mode 100644 index f02905ba7746..000000000000 --- a/arch/arm/mach-w90x900/include/mach/memory.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-w90x900/include/mach/memory.h | ||
3 | * | ||
4 | * Copyright (c) 2008 Nuvoton technology corporation | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Wan ZongShun <mcuos.com@gmail.com> | ||
8 | * | ||
9 | * Based on arch/arm/mach-s3c2410/include/mach/memory.h | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM_ARCH_MEMORY_H | ||
19 | #define __ASM_ARCH_MEMORY_H | ||
20 | |||
21 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/mach-zynq/include/mach/debug-macro.S b/arch/arm/mach-zynq/include/mach/debug-macro.S index 9f664d5eb81d..3ab0be1f6191 100644 --- a/arch/arm/mach-zynq/include/mach/debug-macro.S +++ b/arch/arm/mach-zynq/include/mach/debug-macro.S | |||
@@ -17,7 +17,7 @@ | |||
17 | #include <mach/zynq_soc.h> | 17 | #include <mach/zynq_soc.h> |
18 | #include <mach/uart.h> | 18 | #include <mach/uart.h> |
19 | 19 | ||
20 | .macro addruart, rp, rv | 20 | .macro addruart, rp, rv, tmp |
21 | ldr \rp, =LL_UART_PADDR @ physical | 21 | ldr \rp, =LL_UART_PADDR @ physical |
22 | ldr \rv, =LL_UART_VADDR @ virtual | 22 | ldr \rv, =LL_UART_VADDR @ virtual |
23 | .endm | 23 | .endm |
diff --git a/arch/arm/mach-zynq/include/mach/memory.h b/arch/arm/mach-zynq/include/mach/memory.h deleted file mode 100644 index 35a92634dcc1..000000000000 --- a/arch/arm/mach-zynq/include/mach/memory.h +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/memory.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_MEMORY_H__ | ||
16 | #define __MACH_MEMORY_H__ | ||
17 | |||
18 | #include <asm/sizes.h> | ||
19 | |||
20 | #define PLAT_PHYS_OFFSET UL(0x0) | ||
21 | |||
22 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/debug-macro.S b/arch/arm/plat-mxc/include/mach/debug-macro.S index e4dde91f0231..a3045937fc2f 100644 --- a/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/arch/arm/plat-mxc/include/mach/debug-macro.S | |||
@@ -54,7 +54,7 @@ | |||
54 | 54 | ||
55 | #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) | 55 | #define UART_VADDR IMX_IO_ADDRESS(UART_PADDR) |
56 | 56 | ||
57 | .macro addruart, rp, rv | 57 | .macro addruart, rp, rv, tmp |
58 | ldr \rp, =UART_PADDR @ physical | 58 | ldr \rp, =UART_PADDR @ physical |
59 | ldr \rv, =UART_VADDR @ virtual | 59 | ldr \rv, =UART_VADDR @ virtual |
60 | .endm | 60 | .endm |
diff --git a/arch/arm/plat-mxc/include/mach/memory.h b/arch/arm/plat-mxc/include/mach/memory.h deleted file mode 100644 index 3ec84b902243..000000000000 --- a/arch/arm/plat-mxc/include/mach/memory.h +++ /dev/null | |||
@@ -1,43 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_MXC_MEMORY_H__ | ||
12 | #define __ASM_ARCH_MXC_MEMORY_H__ | ||
13 | |||
14 | #define MX1_PHYS_OFFSET UL(0x08000000) | ||
15 | #define MX21_PHYS_OFFSET UL(0xc0000000) | ||
16 | #define MX25_PHYS_OFFSET UL(0x80000000) | ||
17 | #define MX27_PHYS_OFFSET UL(0xa0000000) | ||
18 | #define MX3x_PHYS_OFFSET UL(0x80000000) | ||
19 | #define MX50_PHYS_OFFSET UL(0x70000000) | ||
20 | #define MX51_PHYS_OFFSET UL(0x90000000) | ||
21 | #define MX53_PHYS_OFFSET UL(0x70000000) | ||
22 | |||
23 | #if !defined(CONFIG_RUNTIME_PHYS_OFFSET) | ||
24 | # if defined CONFIG_ARCH_MX1 | ||
25 | # define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET | ||
26 | # elif defined CONFIG_MACH_MX21 | ||
27 | # define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET | ||
28 | # elif defined CONFIG_ARCH_MX25 | ||
29 | # define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET | ||
30 | # elif defined CONFIG_MACH_MX27 | ||
31 | # define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET | ||
32 | # elif defined CONFIG_ARCH_MX3 | ||
33 | # define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET | ||
34 | # elif defined CONFIG_ARCH_MX50 | ||
35 | # define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET | ||
36 | # elif defined CONFIG_ARCH_MX51 | ||
37 | # define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET | ||
38 | # elif defined CONFIG_ARCH_MX53 | ||
39 | # define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET | ||
40 | # endif | ||
41 | #endif | ||
42 | |||
43 | #endif /* __ASM_ARCH_MXC_MEMORY_H__ */ | ||
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig index bb8f4a6b3e37..95732af7b208 100644 --- a/arch/arm/plat-omap/Kconfig +++ b/arch/arm/plat-omap/Kconfig | |||
@@ -14,6 +14,7 @@ config ARCH_OMAP1 | |||
14 | select CLKDEV_LOOKUP | 14 | select CLKDEV_LOOKUP |
15 | select CLKSRC_MMIO | 15 | select CLKSRC_MMIO |
16 | select GENERIC_IRQ_CHIP | 16 | select GENERIC_IRQ_CHIP |
17 | select NEED_MACH_MEMORY_H | ||
17 | help | 18 | help |
18 | "Systems based on omap7xx, omap15xx or omap16xx" | 19 | "Systems based on omap7xx, omap15xx or omap16xx" |
19 | 20 | ||
diff --git a/arch/arm/plat-omap/include/plat/memory.h b/arch/arm/plat-omap/include/plat/memory.h deleted file mode 100644 index 7f9df6f1e113..000000000000 --- a/arch/arm/plat-omap/include/plat/memory.h +++ /dev/null | |||
@@ -1,89 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/memory.h | ||
3 | * | ||
4 | * Memory map for OMAP-1510 and 1610 | ||
5 | * | ||
6 | * Copyright (C) 2000 RidgeRun, Inc. | ||
7 | * Author: Greg Lonnon <glonnon@ridgerun.com> | ||
8 | * | ||
9 | * This file was derived from arch/arm/mach-intergrator/include/mach/memory.h | ||
10 | * Copyright (C) 1999 ARM Limited | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License as published by the | ||
14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
15 | * option) any later version. | ||
16 | * | ||
17 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | ||
18 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | ||
19 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN | ||
20 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | ||
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | ||
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF | ||
23 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | ||
24 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | ||
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
27 | * | ||
28 | * You should have received a copy of the GNU General Public License along | ||
29 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
31 | */ | ||
32 | |||
33 | #ifndef __ASM_ARCH_MEMORY_H | ||
34 | #define __ASM_ARCH_MEMORY_H | ||
35 | |||
36 | /* | ||
37 | * Physical DRAM offset. | ||
38 | */ | ||
39 | #if defined(CONFIG_ARCH_OMAP1) | ||
40 | #define PLAT_PHYS_OFFSET UL(0x10000000) | ||
41 | #else | ||
42 | #define PLAT_PHYS_OFFSET UL(0x80000000) | ||
43 | #endif | ||
44 | |||
45 | /* | ||
46 | * Bus address is physical address, except for OMAP-1510 Local Bus. | ||
47 | * OMAP-1510 bus address is translated into a Local Bus address if the | ||
48 | * OMAP bus type is lbus. We do the address translation based on the | ||
49 | * device overriding the defaults used in the dma-mapping API. | ||
50 | * Note that the is_lbus_device() test is not very efficient on 1510 | ||
51 | * because of the strncmp(). | ||
52 | */ | ||
53 | #ifdef CONFIG_ARCH_OMAP15XX | ||
54 | |||
55 | /* | ||
56 | * OMAP-1510 Local Bus address offset | ||
57 | */ | ||
58 | #define OMAP1510_LB_OFFSET UL(0x30000000) | ||
59 | |||
60 | #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) | ||
61 | #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) | ||
62 | #define is_lbus_device(dev) (cpu_is_omap15xx() && dev && (strncmp(dev_name(dev), "ohci", 4) == 0)) | ||
63 | |||
64 | #define __arch_pfn_to_dma(dev, pfn) \ | ||
65 | ({ dma_addr_t __dma = __pfn_to_phys(pfn); \ | ||
66 | if (is_lbus_device(dev)) \ | ||
67 | __dma = __dma - PHYS_OFFSET + OMAP1510_LB_OFFSET; \ | ||
68 | __dma; }) | ||
69 | |||
70 | #define __arch_dma_to_pfn(dev, addr) \ | ||
71 | ({ dma_addr_t __dma = addr; \ | ||
72 | if (is_lbus_device(dev)) \ | ||
73 | __dma += PHYS_OFFSET - OMAP1510_LB_OFFSET; \ | ||
74 | __phys_to_pfn(__dma); \ | ||
75 | }) | ||
76 | |||
77 | #define __arch_dma_to_virt(dev, addr) ({ (void *) (is_lbus_device(dev) ? \ | ||
78 | lbus_to_virt(addr) : \ | ||
79 | __phys_to_virt(addr)); }) | ||
80 | |||
81 | #define __arch_virt_to_dma(dev, addr) ({ unsigned long __addr = (unsigned long)(addr); \ | ||
82 | (dma_addr_t) (is_lbus_device(dev) ? \ | ||
83 | virt_to_lbus(__addr) : \ | ||
84 | __virt_to_phys(__addr)); }) | ||
85 | |||
86 | #endif /* CONFIG_ARCH_OMAP15XX */ | ||
87 | |||
88 | #endif | ||
89 | |||
diff --git a/arch/arm/plat-omap/include/plat/serial.h b/arch/arm/plat-omap/include/plat/serial.h index de3b10c18127..1ab9fd6abe6d 100644 --- a/arch/arm/plat-omap/include/plat/serial.h +++ b/arch/arm/plat-omap/include/plat/serial.h | |||
@@ -16,8 +16,8 @@ | |||
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | 17 | ||
18 | /* | 18 | /* |
19 | * Memory entry used for the DEBUG_LL UART configuration. See also | 19 | * Memory entry used for the DEBUG_LL UART configuration, relative to |
20 | * uncompress.h and debug-macro.S. | 20 | * start of RAM. See also uncompress.h and debug-macro.S. |
21 | * | 21 | * |
22 | * Note that using a memory location for storing the UART configuration | 22 | * Note that using a memory location for storing the UART configuration |
23 | * has at least two limitations: | 23 | * has at least two limitations: |
@@ -27,7 +27,7 @@ | |||
27 | * 2. We assume printascii is called at least once before paging_init, | 27 | * 2. We assume printascii is called at least once before paging_init, |
28 | * and addruart has a chance to read OMAP_UART_INFO | 28 | * and addruart has a chance to read OMAP_UART_INFO |
29 | */ | 29 | */ |
30 | #define OMAP_UART_INFO (PLAT_PHYS_OFFSET + 0x3ffc) | 30 | #define OMAP_UART_INFO_OFS 0x3ffc |
31 | 31 | ||
32 | /* OMAP1 serial ports */ | 32 | /* OMAP1 serial ports */ |
33 | #define OMAP1_UART1_BASE 0xfffb0000 | 33 | #define OMAP1_UART1_BASE 0xfffb0000 |
diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index a067484cc4a2..2f472e989ec6 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h | |||
@@ -36,7 +36,13 @@ int uart_shift; | |||
36 | */ | 36 | */ |
37 | static void set_omap_uart_info(unsigned char port) | 37 | static void set_omap_uart_info(unsigned char port) |
38 | { | 38 | { |
39 | *(volatile u32 *)OMAP_UART_INFO = port; | 39 | /* |
40 | * Get address of some.bss variable and round it down | ||
41 | * a la CONFIG_AUTO_ZRELADDR. | ||
42 | */ | ||
43 | u32 ram_start = (u32)&uart_shift & 0xf8000000; | ||
44 | u32 *uart_info = (u32 *)(ram_start + OMAP_UART_INFO_OFS); | ||
45 | *uart_info = port; | ||
40 | } | 46 | } |
41 | 47 | ||
42 | static void putc(int c) | 48 | static void putc(int c) |
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S index 8501bbf2c092..02b160a1ec9b 100644 --- a/arch/arm/plat-spear/include/plat/debug-macro.S +++ b/arch/arm/plat-spear/include/plat/debug-macro.S | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/amba/serial.h> | 14 | #include <linux/amba/serial.h> |
15 | #include <mach/hardware.h> | 15 | #include <mach/hardware.h> |
16 | 16 | ||
17 | .macro addruart, rp, rv | 17 | .macro addruart, rp, rv, tmp |
18 | mov \rp, #SPEAR_DBG_UART_BASE @ Physical base | 18 | mov \rp, #SPEAR_DBG_UART_BASE @ Physical base |
19 | mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base | 19 | mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base |
20 | .endm | 20 | .endm |
diff --git a/arch/arm/plat-spear/include/plat/memory.h b/arch/arm/plat-spear/include/plat/memory.h deleted file mode 100644 index 7e3599e1104e..000000000000 --- a/arch/arm/plat-spear/include/plat/memory.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/include/plat/memory.h | ||
3 | * | ||
4 | * Memory map for SPEAr platform | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __PLAT_MEMORY_H | ||
15 | #define __PLAT_MEMORY_H | ||
16 | |||
17 | /* Physical DRAM offset */ | ||
18 | #define PLAT_PHYS_OFFSET UL(0x00000000) | ||
19 | |||
20 | #endif /* __PLAT_MEMORY_H */ | ||
diff --git a/arch/arm/plat-tcc/include/mach/debug-macro.S b/arch/arm/plat-tcc/include/mach/debug-macro.S index 7662f736e42b..cf17d04ec30d 100644 --- a/arch/arm/plat-tcc/include/mach/debug-macro.S +++ b/arch/arm/plat-tcc/include/mach/debug-macro.S | |||
@@ -9,7 +9,7 @@ | |||
9 | * | 9 | * |
10 | */ | 10 | */ |
11 | 11 | ||
12 | .macro addruart, rp, rv | 12 | .macro addruart, rp, rv, tmp |
13 | moveq \rp, #0x90000000 @ physical base address | 13 | moveq \rp, #0x90000000 @ physical base address |
14 | movne \rv, #0xF1000000 @ virtual base | 14 | movne \rv, #0xF1000000 @ virtual base |
15 | orr \rp, \rp, #0x00007000 @ UART0 | 15 | orr \rp, \rp, #0x00007000 @ UART0 |
diff --git a/arch/arm/plat-tcc/include/mach/memory.h b/arch/arm/plat-tcc/include/mach/memory.h deleted file mode 100644 index 28a6e0cd13b3..000000000000 --- a/arch/arm/plat-tcc/include/mach/memory.h +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 RidgeRun, Inc. | ||
4 | * Copyright (C) 2008-2009 Telechips | ||
5 | * Copyright (C) 2010 Hans J. Koch <hjk@linutronix.de> | ||
6 | * | ||
7 | * Licensed under the terms of the GPL v2. | ||
8 | */ | ||
9 | |||
10 | #ifndef __ASM_ARCH_MEMORY_H | ||
11 | #define __ASM_ARCH_MEMORY_H | ||
12 | |||
13 | /* | ||
14 | * Physical DRAM offset. | ||
15 | */ | ||
16 | #define PLAT_PHYS_OFFSET UL(0x20000000) | ||
17 | |||
18 | #endif | ||