diff options
author | Jiang Liu <jiang.liu@linux.intel.com> | 2014-06-09 04:19:33 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2014-06-21 17:05:40 -0400 |
commit | 8d7cdcb9d8f366c0567b66cce0d5ce37d3311aaf (patch) | |
tree | 521c0ecd7fdbfd6a0513b1b9c26d1cf7932f0391 /arch | |
parent | a491cc902ca495365e9cd45154b60d8c702d86da (diff) |
x86, acpi: Reorganize code to avoid forward declaration in boot.c
Reorganize code to avoid forward declaration in boot.c, no function
changes.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Cc: Yinghai Lu <yinghai@kernel.org>
Cc: Len Brown <len.brown@intel.com>
Cc: Pavel Machek <pavel@ucw.cz>
Link: http://lkml.kernel.org/r/1402302011-23642-5-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/x86/kernel/acpi/boot.c | 236 |
1 files changed, 116 insertions, 120 deletions
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index b41b47021f53..ceb3b36f2b2c 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c | |||
@@ -345,10 +345,123 @@ acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long e | |||
345 | #endif /*CONFIG_X86_LOCAL_APIC */ | 345 | #endif /*CONFIG_X86_LOCAL_APIC */ |
346 | 346 | ||
347 | #ifdef CONFIG_X86_IO_APIC | 347 | #ifdef CONFIG_X86_IO_APIC |
348 | static void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | 348 | #define MP_ISA_BUS 0 |
349 | u32 gsi); | 349 | |
350 | static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | ||
351 | u32 gsi) | ||
352 | { | ||
353 | int ioapic; | ||
354 | int pin; | ||
355 | struct mpc_intsrc mp_irq; | ||
356 | |||
357 | /* | ||
358 | * Convert 'gsi' to 'ioapic.pin'. | ||
359 | */ | ||
360 | ioapic = mp_find_ioapic(gsi); | ||
361 | if (ioapic < 0) | ||
362 | return; | ||
363 | pin = mp_find_ioapic_pin(ioapic, gsi); | ||
364 | |||
365 | /* | ||
366 | * TBD: This check is for faulty timer entries, where the override | ||
367 | * erroneously sets the trigger to level, resulting in a HUGE | ||
368 | * increase of timer interrupts! | ||
369 | */ | ||
370 | if ((bus_irq == 0) && (trigger == 3)) | ||
371 | trigger = 1; | ||
372 | |||
373 | mp_irq.type = MP_INTSRC; | ||
374 | mp_irq.irqtype = mp_INT; | ||
375 | mp_irq.irqflag = (trigger << 2) | polarity; | ||
376 | mp_irq.srcbus = MP_ISA_BUS; | ||
377 | mp_irq.srcbusirq = bus_irq; /* IRQ */ | ||
378 | mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */ | ||
379 | mp_irq.dstirq = pin; /* INTIN# */ | ||
380 | |||
381 | mp_save_irq(&mp_irq); | ||
382 | |||
383 | isa_irq_to_gsi[bus_irq] = gsi; | ||
384 | } | ||
385 | |||
386 | static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, | ||
387 | int polarity) | ||
388 | { | ||
389 | #ifdef CONFIG_X86_MPPARSE | ||
390 | struct mpc_intsrc mp_irq; | ||
391 | struct pci_dev *pdev; | ||
392 | unsigned char number; | ||
393 | unsigned int devfn; | ||
394 | int ioapic; | ||
395 | u8 pin; | ||
396 | |||
397 | if (!acpi_ioapic) | ||
398 | return 0; | ||
399 | if (!dev || !dev_is_pci(dev)) | ||
400 | return 0; | ||
401 | |||
402 | pdev = to_pci_dev(dev); | ||
403 | number = pdev->bus->number; | ||
404 | devfn = pdev->devfn; | ||
405 | pin = pdev->pin; | ||
406 | /* print the entry should happen on mptable identically */ | ||
407 | mp_irq.type = MP_INTSRC; | ||
408 | mp_irq.irqtype = mp_INT; | ||
409 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | ||
410 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | ||
411 | mp_irq.srcbus = number; | ||
412 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | ||
413 | ioapic = mp_find_ioapic(gsi); | ||
414 | mp_irq.dstapic = mpc_ioapic_id(ioapic); | ||
415 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | ||
416 | |||
417 | mp_save_irq(&mp_irq); | ||
418 | #endif | ||
419 | return 0; | ||
420 | } | ||
421 | |||
350 | static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, | 422 | static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, |
351 | int polarity); | 423 | int polarity) |
424 | { | ||
425 | int ioapic; | ||
426 | int ioapic_pin; | ||
427 | struct io_apic_irq_attr irq_attr; | ||
428 | int ret; | ||
429 | |||
430 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | ||
431 | return gsi; | ||
432 | |||
433 | /* Don't set up the ACPI SCI because it's already set up */ | ||
434 | if (acpi_gbl_FADT.sci_interrupt == gsi) | ||
435 | return gsi; | ||
436 | |||
437 | ioapic = mp_find_ioapic(gsi); | ||
438 | if (ioapic < 0) { | ||
439 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | ||
440 | return gsi; | ||
441 | } | ||
442 | |||
443 | ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); | ||
444 | |||
445 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | ||
446 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | ||
447 | "%d-%d\n", mpc_ioapic_id(ioapic), | ||
448 | ioapic_pin); | ||
449 | return gsi; | ||
450 | } | ||
451 | |||
452 | if (enable_update_mptable) | ||
453 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); | ||
454 | |||
455 | set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin, | ||
456 | trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, | ||
457 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | ||
458 | ret = io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr); | ||
459 | if (ret < 0) | ||
460 | gsi = INT_MIN; | ||
461 | |||
462 | return gsi; | ||
463 | } | ||
464 | |||
352 | 465 | ||
353 | static int __init | 466 | static int __init |
354 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) | 467 | acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end) |
@@ -905,44 +1018,6 @@ static int __init acpi_parse_madt_lapic_entries(void) | |||
905 | #endif /* CONFIG_X86_LOCAL_APIC */ | 1018 | #endif /* CONFIG_X86_LOCAL_APIC */ |
906 | 1019 | ||
907 | #ifdef CONFIG_X86_IO_APIC | 1020 | #ifdef CONFIG_X86_IO_APIC |
908 | #define MP_ISA_BUS 0 | ||
909 | |||
910 | static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger, | ||
911 | u32 gsi) | ||
912 | { | ||
913 | int ioapic; | ||
914 | int pin; | ||
915 | struct mpc_intsrc mp_irq; | ||
916 | |||
917 | /* | ||
918 | * Convert 'gsi' to 'ioapic.pin'. | ||
919 | */ | ||
920 | ioapic = mp_find_ioapic(gsi); | ||
921 | if (ioapic < 0) | ||
922 | return; | ||
923 | pin = mp_find_ioapic_pin(ioapic, gsi); | ||
924 | |||
925 | /* | ||
926 | * TBD: This check is for faulty timer entries, where the override | ||
927 | * erroneously sets the trigger to level, resulting in a HUGE | ||
928 | * increase of timer interrupts! | ||
929 | */ | ||
930 | if ((bus_irq == 0) && (trigger == 3)) | ||
931 | trigger = 1; | ||
932 | |||
933 | mp_irq.type = MP_INTSRC; | ||
934 | mp_irq.irqtype = mp_INT; | ||
935 | mp_irq.irqflag = (trigger << 2) | polarity; | ||
936 | mp_irq.srcbus = MP_ISA_BUS; | ||
937 | mp_irq.srcbusirq = bus_irq; /* IRQ */ | ||
938 | mp_irq.dstapic = mpc_ioapic_id(ioapic); /* APIC ID */ | ||
939 | mp_irq.dstirq = pin; /* INTIN# */ | ||
940 | |||
941 | mp_save_irq(&mp_irq); | ||
942 | |||
943 | isa_irq_to_gsi[bus_irq] = gsi; | ||
944 | } | ||
945 | |||
946 | static void __init mp_config_acpi_legacy_irqs(void) | 1021 | static void __init mp_config_acpi_legacy_irqs(void) |
947 | { | 1022 | { |
948 | int i; | 1023 | int i; |
@@ -1009,85 +1084,6 @@ static void __init mp_config_acpi_legacy_irqs(void) | |||
1009 | } | 1084 | } |
1010 | } | 1085 | } |
1011 | 1086 | ||
1012 | static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger, | ||
1013 | int polarity) | ||
1014 | { | ||
1015 | #ifdef CONFIG_X86_MPPARSE | ||
1016 | struct mpc_intsrc mp_irq; | ||
1017 | struct pci_dev *pdev; | ||
1018 | unsigned char number; | ||
1019 | unsigned int devfn; | ||
1020 | int ioapic; | ||
1021 | u8 pin; | ||
1022 | |||
1023 | if (!acpi_ioapic) | ||
1024 | return 0; | ||
1025 | if (!dev || !dev_is_pci(dev)) | ||
1026 | return 0; | ||
1027 | |||
1028 | pdev = to_pci_dev(dev); | ||
1029 | number = pdev->bus->number; | ||
1030 | devfn = pdev->devfn; | ||
1031 | pin = pdev->pin; | ||
1032 | /* print the entry should happen on mptable identically */ | ||
1033 | mp_irq.type = MP_INTSRC; | ||
1034 | mp_irq.irqtype = mp_INT; | ||
1035 | mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) | | ||
1036 | (polarity == ACPI_ACTIVE_HIGH ? 1 : 3); | ||
1037 | mp_irq.srcbus = number; | ||
1038 | mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3); | ||
1039 | ioapic = mp_find_ioapic(gsi); | ||
1040 | mp_irq.dstapic = mpc_ioapic_id(ioapic); | ||
1041 | mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi); | ||
1042 | |||
1043 | mp_save_irq(&mp_irq); | ||
1044 | #endif | ||
1045 | return 0; | ||
1046 | } | ||
1047 | |||
1048 | static int mp_register_gsi(struct device *dev, u32 gsi, int trigger, | ||
1049 | int polarity) | ||
1050 | { | ||
1051 | int ioapic; | ||
1052 | int ioapic_pin; | ||
1053 | struct io_apic_irq_attr irq_attr; | ||
1054 | int ret; | ||
1055 | |||
1056 | if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) | ||
1057 | return gsi; | ||
1058 | |||
1059 | /* Don't set up the ACPI SCI because it's already set up */ | ||
1060 | if (acpi_gbl_FADT.sci_interrupt == gsi) | ||
1061 | return gsi; | ||
1062 | |||
1063 | ioapic = mp_find_ioapic(gsi); | ||
1064 | if (ioapic < 0) { | ||
1065 | printk(KERN_WARNING "No IOAPIC for GSI %u\n", gsi); | ||
1066 | return gsi; | ||
1067 | } | ||
1068 | |||
1069 | ioapic_pin = mp_find_ioapic_pin(ioapic, gsi); | ||
1070 | |||
1071 | if (ioapic_pin > MP_MAX_IOAPIC_PIN) { | ||
1072 | printk(KERN_ERR "Invalid reference to IOAPIC pin " | ||
1073 | "%d-%d\n", mpc_ioapic_id(ioapic), | ||
1074 | ioapic_pin); | ||
1075 | return gsi; | ||
1076 | } | ||
1077 | |||
1078 | if (enable_update_mptable) | ||
1079 | mp_config_acpi_gsi(dev, gsi, trigger, polarity); | ||
1080 | |||
1081 | set_io_apic_irq_attr(&irq_attr, ioapic, ioapic_pin, | ||
1082 | trigger == ACPI_EDGE_SENSITIVE ? 0 : 1, | ||
1083 | polarity == ACPI_ACTIVE_HIGH ? 0 : 1); | ||
1084 | ret = io_apic_set_pci_routing(dev, gsi_to_irq(gsi), &irq_attr); | ||
1085 | if (ret < 0) | ||
1086 | gsi = INT_MIN; | ||
1087 | |||
1088 | return gsi; | ||
1089 | } | ||
1090 | |||
1091 | /* | 1087 | /* |
1092 | * Parse IOAPIC related entries in MADT | 1088 | * Parse IOAPIC related entries in MADT |
1093 | * returns 0 on success, < 0 on error | 1089 | * returns 0 on success, < 0 on error |