Merge 3.14-rc5 into usb-next

We want the fixes here too.

44 files changed, 598 insertions, 470 deletions

diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 1d8248ea5669..bd18bb8b2770 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -878,7 +878,8 @@ static int hyp_init_cpu_pm_notifier(struct notifier_block *self,
                                     unsigned long cmd,
                                     void *v)
 {
-        if (cmd == CPU_PM_EXIT) {
+        if (cmd == CPU_PM_EXIT &&
+            __hyp_get_vectors() == hyp_default_vectors) {
                 cpu_init_hyp_mode(NULL);
                 return NOTIFY_OK;
         }
diff --git a/arch/arm/kvm/interrupts.S b/arch/arm/kvm/interrupts.S
index ddc15539bad2..0d68d4073068 100644
--- a/arch/arm/kvm/interrupts.S
+++ b/arch/arm/kvm/interrupts.S
@@ -220,6 +220,10 @@ after_vfp_restore:
  * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c).  Return values are
  * passed in r0 and r1.
  *
+ * A function pointer with a value of 0xffffffff has a special meaning,
+ * and is used to implement __hyp_get_vectors in the same way as in
+ * arch/arm/kernel/hyp_stub.S.
+ *
  * The calling convention follows the standard AAPCS:
  *   r0 - r3: caller save
  *   r12:     caller save
@@ -363,6 +367,11 @@ hyp_hvc:
 host_switch_to_hyp:
         pop     {r0, r1, r2}
 
+        /* Check for __hyp_get_vectors */
+        cmp     r0, #-1
+        mrceq   p15, 4, r0, c12, c0, 0  @ get HVBAR
+        beq     1f
+
         push    {lr}
         mrs     lr, SPSR
         push    {lr}
@@ -378,7 +387,7 @@ THUMB(	orr	lr, #1)
         pop     {lr}
         msr     SPSR_csxf, lr
         pop     {lr}
-        eret
+1:      eret
 
 guest_trap:
         load_vcpu                       @ Load VCPU pointer to r0
diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h
index 13fb0b3efc5f..453a179469a3 100644
--- a/arch/arm64/include/asm/percpu.h
+++ b/arch/arm64/include/asm/percpu.h
@@ -16,6 +16,8 @@
 #ifndef __ASM_PERCPU_H
 #define __ASM_PERCPU_H
 
+#ifdef CONFIG_SMP
+
 static inline void set_my_cpu_offset(unsigned long off)
 {
         asm volatile("msr tpidr_el1, %0" :: "r" (off) : "memory");
@@ -36,6 +38,12 @@ static inline unsigned long __my_cpu_offset(void)
 }
 #define __my_cpu_offset __my_cpu_offset()
 
+#else   /* !CONFIG_SMP */
+
+#define set_my_cpu_offset(x)    do { } while (0)
+
+#endif /* CONFIG_SMP */
+
 #include <asm-generic/percpu.h>
 
 #endif /* __ASM_PERCPU_H */
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index b524dcd17243..aa3917c8b623 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -136,11 +136,11 @@ extern struct page *empty_zero_page;
 /*
  * The following only work if pte_present(). Undefined behaviour otherwise.
  */
-#define pte_present(pte)        (pte_val(pte) & (PTE_VALID | PTE_PROT_NONE))
-#define pte_dirty(pte)          (pte_val(pte) & PTE_DIRTY)
-#define pte_young(pte)          (pte_val(pte) & PTE_AF)
-#define pte_special(pte)        (pte_val(pte) & PTE_SPECIAL)
-#define pte_write(pte)          (pte_val(pte) & PTE_WRITE)
+#define pte_present(pte)        (!!(pte_val(pte) & (PTE_VALID | PTE_PROT_NONE)))
+#define pte_dirty(pte)          (!!(pte_val(pte) & PTE_DIRTY))
+#define pte_young(pte)          (!!(pte_val(pte) & PTE_AF))
+#define pte_special(pte)        (!!(pte_val(pte) & PTE_SPECIAL))
+#define pte_write(pte)          (!!(pte_val(pte) & PTE_WRITE))
 #define pte_exec(pte)           (!(pte_val(pte) & PTE_UXN))
 
 #define pte_valid_user(pte) \
diff --git a/arch/arm64/kernel/stacktrace.c b/arch/arm64/kernel/stacktrace.c
index c3b6c63ea5fb..38f0558f0c0a 100644
--- a/arch/arm64/kernel/stacktrace.c
+++ b/arch/arm64/kernel/stacktrace.c
@@ -48,7 +48,11 @@ int unwind_frame(struct stackframe *frame)
 
         frame->sp = fp + 0x10;
         frame->fp = *(unsigned long *)(fp);
-        frame->pc = *(unsigned long *)(fp + 8);
+        /*
+         * -4 here because we care about the PC at time of bl,
+         * not where the return will go.
+         */
+        frame->pc = *(unsigned long *)(fp + 8) - 4;
 
         return 0;
 }
diff --git a/arch/arm64/kvm/hyp.S b/arch/arm64/kvm/hyp.S
index 3b47c36e10ff..2c56012cb2d2 100644
--- a/arch/arm64/kvm/hyp.S
+++ b/arch/arm64/kvm/hyp.S
@@ -694,6 +694,24 @@ __hyp_panic_str:
 
         .align  2
 
+/*
+ * u64 kvm_call_hyp(void *hypfn, ...);
+ *
+ * This is not really a variadic function in the classic C-way and care must
+ * be taken when calling this to ensure parameters are passed in registers
+ * only, since the stack will change between the caller and the callee.
+ *
+ * Call the function with the first argument containing a pointer to the
+ * function you wish to call in Hyp mode, and subsequent arguments will be
+ * passed as x0, x1, and x2 (a maximum of 3 arguments in addition to the
+ * function pointer can be passed).  The function being called must be mapped
+ * in Hyp mode (see init_hyp_mode in arch/arm/kvm/arm.c).  Return values are
+ * passed in r0 and r1.
+ *
+ * A function pointer with a value of 0 has a special meaning, and is
+ * used to implement __hyp_get_vectors in the same way as in
+ * arch/arm64/kernel/hyp_stub.S.
+ */
 ENTRY(kvm_call_hyp)
         hvc     #0
         ret
@@ -737,7 +755,12 @@ el1_sync:					// Guest trapped into EL2
         pop     x2, x3
         pop     x0, x1
 
-        push    lr, xzr
+        /* Check for __hyp_get_vectors */
+        cbnz    x0, 1f
+        mrs     x0, vbar_el2
+        b       2f
+
+1:      push    lr, xzr
 
         /*
          * Compute the function address in EL2, and shuffle the parameters.
@@ -750,7 +773,7 @@ el1_sync:					// Guest trapped into EL2
         blr     lr
 
         pop     lr, xzr
-        eret
+2:      eret
 
 el1_trap:
         /*
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 7cc8c364924d..6fb9e813a910 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,4 +1,4 @@
-
+generic-y += barrier.h
 generic-y += bitsperlong.h
 generic-y += clkdev.h
 generic-y += cputime.h
@@ -6,6 +6,7 @@ generic-y += device.h
 generic-y += emergency-restart.h
 generic-y += errno.h
 generic-y += exec.h
+generic-y += hash.h
 generic-y += hw_irq.h
 generic-y += ioctl.h
 generic-y += ipcbuf.h
@@ -18,6 +19,7 @@ generic-y += local.h
 generic-y += mman.h
 generic-y += mutex.h
 generic-y += percpu.h
+generic-y += preempt.h
 generic-y += resource.h
 generic-y += scatterlist.h
 generic-y += sections.h
@@ -31,5 +33,3 @@ generic-y += trace_clock.h
 generic-y += types.h
 generic-y += word-at-a-time.h
 generic-y += xor.h
-generic-y += preempt.h
-generic-y += hash.h
diff --git a/arch/m68k/include/asm/barrier.h b/arch/m68k/include/asm/barrier.h
deleted file mode 100644
index 15c5f77c1614..000000000000
--- a/arch/m68k/include/asm/barrier.h
+++ /dev/null
@@ -1,8 +0,0 @@
-#ifndef _M68K_BARRIER_H
-#define _M68K_BARRIER_H
-
-#define nop()           do { asm volatile ("nop"); barrier(); } while (0)
-
-#include <asm-generic/barrier.h>
-
-#endif /* _M68K_BARRIER_H */
diff --git a/arch/m68k/include/asm/unistd.h b/arch/m68k/include/asm/unistd.h
index 014f288fc813..9d38b73989eb 100644
--- a/arch/m68k/include/asm/unistd.h
+++ b/arch/m68k/include/asm/unistd.h
@@ -4,7 +4,7 @@
 #include <uapi/asm/unistd.h>
 
 
-#define NR_syscalls             349
+#define NR_syscalls             351
 
 #define __ARCH_WANT_OLD_READDIR
 #define __ARCH_WANT_OLD_STAT
diff --git a/arch/m68k/include/uapi/asm/unistd.h b/arch/m68k/include/uapi/asm/unistd.h
index 625f321001dc..b932dd470041 100644
--- a/arch/m68k/include/uapi/asm/unistd.h
+++ b/arch/m68k/include/uapi/asm/unistd.h
@@ -354,5 +354,7 @@
 #define __NR_process_vm_writev  346
 #define __NR_kcmp               347
 #define __NR_finit_module       348
+#define __NR_sched_setattr      349
+#define __NR_sched_getattr      350
 
 #endif /* _UAPI_ASM_M68K_UNISTD_H_ */
diff --git a/arch/m68k/kernel/syscalltable.S b/arch/m68k/kernel/syscalltable.S
index 3f04ea0ab802..b6223dc41d82 100644
--- a/arch/m68k/kernel/syscalltable.S
+++ b/arch/m68k/kernel/syscalltable.S
@@ -369,4 +369,6 @@ ENTRY(sys_call_table)
         .long sys_process_vm_writev
         .long sys_kcmp
         .long sys_finit_module
+        .long sys_sched_setattr
+        .long sys_sched_getattr         /* 350 */
 
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index 84fdf6857c31..a613d2c82fd9 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -200,10 +200,11 @@ static inline void __user *arch_compat_alloc_user_space(long len)
 
         /*
          * We can't access below the stack pointer in the 32bit ABI and
-         * can access 288 bytes in the 64bit ABI
+         * can access 288 bytes in the 64bit big-endian ABI,
+         * or 512 bytes with the new ELFv2 little-endian ABI.
          */
         if (!is_32bit_task())
-                usp -= 288;
+                usp -= USER_REDZONE_SIZE;
 
         return (void __user *) (usp - len);
 }
diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 40157e2ca691..ed82142a3251 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -816,8 +816,8 @@ int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe,
 int64_t opal_pci_poll(uint64_t phb_id);
 int64_t opal_return_cpu(void);
 
-int64_t opal_xscom_read(uint32_t gcid, uint32_t pcb_addr, __be64 *val);
-int64_t opal_xscom_write(uint32_t gcid, uint32_t pcb_addr, uint64_t val);
+int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
+int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
 
 int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
                        uint32_t addr, uint32_t data, uint32_t sz);
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index becc08e6a65c..279b80f3bb29 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -28,11 +28,23 @@
 
 #ifdef __powerpc64__
 
+/*
+ * Size of redzone that userspace is allowed to use below the stack
+ * pointer.  This is 288 in the 64-bit big-endian ELF ABI, and 512 in
+ * the new ELFv2 little-endian ABI, so we allow the larger amount.
+ *
+ * For kernel code we allow a 288-byte redzone, in order to conserve
+ * kernel stack space; gcc currently only uses 288 bytes, and will
+ * hopefully allow explicit control of the redzone size in future.
+ */
+#define USER_REDZONE_SIZE       512
+#define KERNEL_REDZONE_SIZE     288
+
 #define STACK_FRAME_OVERHEAD    112     /* size of minimum stack frame */
 #define STACK_FRAME_LR_SAVE     2       /* Location of LR in stack frame */
 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x7265677368657265)
 #define STACK_INT_FRAME_SIZE    (sizeof(struct pt_regs) + \
-                                        STACK_FRAME_OVERHEAD + 288)
+                                 STACK_FRAME_OVERHEAD + KERNEL_REDZONE_SIZE)
 #define STACK_FRAME_MARKER      12
 
 /* Size of dummy stack frame allocated when calling signal handler. */
@@ -41,6 +53,8 @@
 
 #else /* __powerpc64__ */
 
+#define USER_REDZONE_SIZE       0
+#define KERNEL_REDZONE_SIZE     0
 #define STACK_FRAME_OVERHEAD    16      /* size of minimum stack frame */
 #define STACK_FRAME_LR_SAVE     1       /* Location of LR in stack frame */
 #define STACK_FRAME_REGS_MARKER ASM_CONST(0x72656773)
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 11c1d069d920..7a13f378ca2c 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -98,17 +98,19 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
                         size_t csize, unsigned long offset, int userbuf)
 {
         void  *vaddr;
+        phys_addr_t paddr;
 
         if (!csize)
                 return 0;
 
         csize = min_t(size_t, csize, PAGE_SIZE);
+        paddr = pfn << PAGE_SHIFT;
 
-        if ((min_low_pfn < pfn) && (pfn < max_pfn)) {
-                vaddr = __va(pfn << PAGE_SHIFT);
+        if (memblock_is_region_memory(paddr, csize)) {
+                vaddr = __va(paddr);
                 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
         } else {
-                vaddr = __ioremap(pfn << PAGE_SHIFT, PAGE_SIZE, 0);
+                vaddr = __ioremap(paddr, PAGE_SIZE, 0);
                 csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
                 iounmap(vaddr);
         }
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 9b27b293a922..b0ded97ee4e1 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -74,6 +74,7 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
  */
 static int test_24bit_addr(unsigned long ip, unsigned long addr)
 {
+        addr = ppc_function_entry((void *)addr);
 
         /* use the create_branch to verify that this offset can be branched */
         return create_branch((unsigned int *)ip, addr, 0);
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index e35bf773df7a..8d253c29649b 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -65,8 +65,8 @@ struct rt_sigframe {
         struct siginfo __user *pinfo;
         void __user *puc;
         struct siginfo info;
-        /* 64 bit ABI allows for 288 bytes below sp before decrementing it. */
-        char abigap[288];
+        /* New 64 bit little-endian ABI allows redzone of 512 bytes below sp */
+        char abigap[USER_REDZONE_SIZE];
 } __attribute__ ((aligned (16)));
 
 static const char fmt32[] = KERN_INFO \
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f51474336460..253fefe3d1a0 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -114,6 +114,7 @@ DEFINE_SIMPLE_ATTRIBUTE(ioda_eeh_inbB_dbgfs_ops, ioda_eeh_inbB_dbgfs_get,
                         ioda_eeh_inbB_dbgfs_set, "0x%llx\n");
 #endif /* CONFIG_DEBUG_FS */
 
+
 /**
  * ioda_eeh_post_init - Chip dependent post initialization
  * @hose: PCI controller
@@ -221,6 +222,22 @@ static int ioda_eeh_set_option(struct eeh_pe *pe, int option)
         return ret;
 }
 
+static void ioda_eeh_phb_diag(struct pci_controller *hose)
+{
+        struct pnv_phb *phb = hose->private_data;
+        long rc;
+
+        rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
+                                         PNV_PCI_DIAG_BUF_SIZE);
+        if (rc != OPAL_SUCCESS) {
+                pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
+                            __func__, hose->global_number, rc);
+                return;
+        }
+
+        pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
+}
+
 /**
  * ioda_eeh_get_state - Retrieve the state of PE
  * @pe: EEH PE
@@ -272,6 +289,9 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
                         result |= EEH_STATE_DMA_ACTIVE;
                         result |= EEH_STATE_MMIO_ENABLED;
                         result |= EEH_STATE_DMA_ENABLED;
+                } else if (!(pe->state & EEH_PE_ISOLATED)) {
+                        eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
+                        ioda_eeh_phb_diag(hose);
                 }
 
                 return result;
@@ -315,6 +335,15 @@ static int ioda_eeh_get_state(struct eeh_pe *pe)
                            __func__, fstate, hose->global_number, pe_no);
         }
 
+        /* Dump PHB diag-data for frozen PE */
+        if (result != EEH_STATE_NOT_SUPPORT &&
+            (result & (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE)) !=
+            (EEH_STATE_MMIO_ACTIVE | EEH_STATE_DMA_ACTIVE) &&
+            !(pe->state & EEH_PE_ISOLATED)) {
+                eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
+                ioda_eeh_phb_diag(hose);
+        }
+
         return result;
 }
 
@@ -530,42 +559,6 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option)
 }
 
 /**
- * ioda_eeh_get_log - Retrieve error log
- * @pe: EEH PE
- * @severity: Severity level of the log
- * @drv_log: buffer to store the log
- * @len: space of the log buffer
- *
- * The function is used to retrieve error log from P7IOC.
- */
-static int ioda_eeh_get_log(struct eeh_pe *pe, int severity,
-                            char *drv_log, unsigned long len)
-{
-        s64 ret;
-        unsigned long flags;
-        struct pci_controller *hose = pe->phb;
-        struct pnv_phb *phb = hose->private_data;
-
-        spin_lock_irqsave(&phb->lock, flags);
-
-        ret = opal_pci_get_phb_diag_data2(phb->opal_id,
-                        phb->diag.blob, PNV_PCI_DIAG_BUF_SIZE);
-        if (ret) {
-                spin_unlock_irqrestore(&phb->lock, flags);
-                pr_warning("%s: Can't get log for PHB#%x-PE#%x (%lld)\n",
-                           __func__, hose->global_number, pe->addr, ret);
-                return -EIO;
-        }
-
-        /* The PHB diag-data is always indicative */
-        pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
-
-        spin_unlock_irqrestore(&phb->lock, flags);
-
-        return 0;
-}
-
-/**
  * ioda_eeh_configure_bridge - Configure the PCI bridges for the indicated PE
  * @pe: EEH PE
  *
@@ -646,22 +639,6 @@ static void ioda_eeh_hub_diag(struct pci_controller *hose)
         }
 }
 
-static void ioda_eeh_phb_diag(struct pci_controller *hose)
-{
-        struct pnv_phb *phb = hose->private_data;
-        long rc;
-
-        rc = opal_pci_get_phb_diag_data2(phb->opal_id, phb->diag.blob,
-                                         PNV_PCI_DIAG_BUF_SIZE);
-        if (rc != OPAL_SUCCESS) {
-                pr_warning("%s: Failed to get diag-data for PHB#%x (%ld)\n",
-                            __func__, hose->global_number, rc);
-                return;
-        }
-
-        pnv_pci_dump_phb_diag_data(hose, phb->diag.blob);
-}
-
 static int ioda_eeh_get_phb_pe(struct pci_controller *hose,
                                struct eeh_pe **pe)
 {
@@ -835,6 +812,20 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
                 }
 
                 /*
+                 * EEH core will try recover from fenced PHB or
+                 * frozen PE. In the time for frozen PE, EEH core
+                 * enable IO path for that before collecting logs,
+                 * but it ruins the site. So we have to dump the
+                 * log in advance here.
+                 */
+                if ((ret == EEH_NEXT_ERR_FROZEN_PE  ||
+                    ret == EEH_NEXT_ERR_FENCED_PHB) &&
+                    !((*pe)->state & EEH_PE_ISOLATED)) {
+                        eeh_pe_state_mark(*pe, EEH_PE_ISOLATED);
+                        ioda_eeh_phb_diag(hose);
+                }
+
+                /*
                  * If we have no errors on the specific PHB or only
                  * informative error there, we continue poking it.
                  * Otherwise, we need actions to be taken by upper
@@ -852,7 +843,6 @@ struct pnv_eeh_ops ioda_eeh_ops = {
         .set_option             = ioda_eeh_set_option,
         .get_state              = ioda_eeh_get_state,
         .reset                  = ioda_eeh_reset,
-        .get_log                = ioda_eeh_get_log,
         .configure_bridge       = ioda_eeh_configure_bridge,
         .next_error             = ioda_eeh_next_error
 };
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index 4fbf276ac99e..4cd2ea6c0dbe 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -71,11 +71,11 @@ static int opal_xscom_err_xlate(int64_t rc)
         }
 }
 
-static u64 opal_scom_unmangle(u64 reg)
+static u64 opal_scom_unmangle(u64 addr)
 {
         /*
          * XSCOM indirect addresses have the top bit set. Additionally
-         * the reset of the top 3 nibbles is always 0.
+         * the rest of the top 3 nibbles is always 0.
          *
          * Because the debugfs interface uses signed offsets and shifts
          * the address left by 3, we basically cannot use the top 4 bits
@@ -86,10 +86,13 @@ static u64 opal_scom_unmangle(u64 reg)
          * conversion here. To leave room for further xscom address
          * expansion, we only clear out the top byte
          *
+         * For in-kernel use, we also support the real indirect bit, so
+         * we test for any of the top 5 bits
+         *
          */
-        if (reg & (1ull << 59))
-                reg = (reg & ~(0xffull << 56)) | (1ull << 63);
-        return reg;
+        if (addr & (0x1full << 59))
+                addr = (addr & ~(0xffull << 56)) | (1ull << 63);
+        return addr;
 }
 
 static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
@@ -98,8 +101,8 @@ static int opal_scom_read(scom_map_t map, u64 reg, u64 *value)
         int64_t rc;
         __be64 v;
 
-        reg = opal_scom_unmangle(reg);
-        rc = opal_xscom_read(m->chip, m->addr + reg, (__be64 *)__pa(&v));
+        reg = opal_scom_unmangle(m->addr + reg);
+        rc = opal_xscom_read(m->chip, reg, (__be64 *)__pa(&v));
         *value = be64_to_cpu(v);
         return opal_xscom_err_xlate(rc);
 }
@@ -109,8 +112,8 @@ static int opal_scom_write(scom_map_t map, u64 reg, u64 value)
         struct opal_scom_map *m = map;
         int64_t rc;
 
-        reg = opal_scom_unmangle(reg);
-        rc = opal_xscom_write(m->chip, m->addr + reg, value);
+        reg = opal_scom_unmangle(m->addr + reg);
+        rc = opal_xscom_write(m->chip, reg, value);
         return opal_xscom_err_xlate(rc);
 }
 
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index 95633d79ef5d..8518817dcdfd 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -134,57 +134,72 @@ static void pnv_pci_dump_p7ioc_diag_data(struct pci_controller *hose,
         pr_info("P7IOC PHB#%d Diag-data (Version: %d)\n\n",
                 hose->global_number, common->version);
 
-        pr_info("  brdgCtl:              %08x\n", data->brdgCtl);
-
-        pr_info("  portStatusReg:        %08x\n", data->portStatusReg);
-        pr_info("  rootCmplxStatus:      %08x\n", data->rootCmplxStatus);
-        pr_info("  busAgentStatus:       %08x\n", data->busAgentStatus);
-
-        pr_info("  deviceStatus:         %08x\n", data->deviceStatus);
-        pr_info("  slotStatus:           %08x\n", data->slotStatus);
-        pr_info("  linkStatus:           %08x\n", data->linkStatus);
-        pr_info("  devCmdStatus:         %08x\n", data->devCmdStatus);
-        pr_info("  devSecStatus:         %08x\n", data->devSecStatus);
-
-        pr_info("  rootErrorStatus:      %08x\n", data->rootErrorStatus);
-        pr_info("  uncorrErrorStatus:    %08x\n", data->uncorrErrorStatus);
-        pr_info("  corrErrorStatus:      %08x\n", data->corrErrorStatus);
-        pr_info("  tlpHdr1:              %08x\n", data->tlpHdr1);
-        pr_info("  tlpHdr2:              %08x\n", data->tlpHdr2);
-        pr_info("  tlpHdr3:              %08x\n", data->tlpHdr3);
-        pr_info("  tlpHdr4:              %08x\n", data->tlpHdr4);
-        pr_info("  sourceId:             %08x\n", data->sourceId);
-        pr_info("  errorClass:           %016llx\n", data->errorClass);
-        pr_info("  correlator:           %016llx\n", data->correlator);
-        pr_info("  p7iocPlssr:           %016llx\n", data->p7iocPlssr);
-        pr_info("  p7iocCsr:             %016llx\n", data->p7iocCsr);
-        pr_info("  lemFir:               %016llx\n", data->lemFir);
-        pr_info("  lemErrorMask:         %016llx\n", data->lemErrorMask);
-        pr_info("  lemWOF:               %016llx\n", data->lemWOF);
-        pr_info("  phbErrorStatus:       %016llx\n", data->phbErrorStatus);
-        pr_info("  phbFirstErrorStatus:  %016llx\n", data->phbFirstErrorStatus);
-        pr_info("  phbErrorLog0:         %016llx\n", data->phbErrorLog0);
-        pr_info("  phbErrorLog1:         %016llx\n", data->phbErrorLog1);
-        pr_info("  mmioErrorStatus:      %016llx\n", data->mmioErrorStatus);
-        pr_info("  mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus);
-        pr_info("  mmioErrorLog0:        %016llx\n", data->mmioErrorLog0);
-        pr_info("  mmioErrorLog1:        %016llx\n", data->mmioErrorLog1);
-        pr_info("  dma0ErrorStatus:      %016llx\n", data->dma0ErrorStatus);
-        pr_info("  dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus);
-        pr_info("  dma0ErrorLog0:        %016llx\n", data->dma0ErrorLog0);
-        pr_info("  dma0ErrorLog1:        %016llx\n", data->dma0ErrorLog1);
-        pr_info("  dma1ErrorStatus:      %016llx\n", data->dma1ErrorStatus);
-        pr_info("  dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus);
-        pr_info("  dma1ErrorLog0:        %016llx\n", data->dma1ErrorLog0);
-        pr_info("  dma1ErrorLog1:        %016llx\n", data->dma1ErrorLog1);
+        if (data->brdgCtl)
+                pr_info("  brdgCtl:     %08x\n",
+                        data->brdgCtl);
+        if (data->portStatusReg || data->rootCmplxStatus ||
+            data->busAgentStatus)
+                pr_info("  UtlSts:      %08x %08x %08x\n",
+                        data->portStatusReg, data->rootCmplxStatus,
+                        data->busAgentStatus);
+        if (data->deviceStatus || data->slotStatus   ||
+            data->linkStatus   || data->devCmdStatus ||
+            data->devSecStatus)
+                pr_info("  RootSts:     %08x %08x %08x %08x %08x\n",
+                        data->deviceStatus, data->slotStatus,
+                        data->linkStatus, data->devCmdStatus,
+                        data->devSecStatus);
+        if (data->rootErrorStatus   || data->uncorrErrorStatus ||
+            data->corrErrorStatus)
+                pr_info("  RootErrSts:  %08x %08x %08x\n",
+                        data->rootErrorStatus, data->uncorrErrorStatus,
+                        data->corrErrorStatus);
+        if (data->tlpHdr1 || data->tlpHdr2 ||
+            data->tlpHdr3 || data->tlpHdr4)
+                pr_info("  RootErrLog:  %08x %08x %08x %08x\n",
+                        data->tlpHdr1, data->tlpHdr2,
+                        data->tlpHdr3, data->tlpHdr4);
+        if (data->sourceId || data->errorClass ||
+            data->correlator)
+                pr_info("  RootErrLog1: %08x %016llx %016llx\n",
+                        data->sourceId, data->errorClass,
+                        data->correlator);
+        if (data->p7iocPlssr || data->p7iocCsr)
+                pr_info("  PhbSts:      %016llx %016llx\n",
+                        data->p7iocPlssr, data->p7iocCsr);
+        if (data->lemFir || data->lemErrorMask ||
+            data->lemWOF)
+                pr_info("  Lem:         %016llx %016llx %016llx\n",
+                        data->lemFir, data->lemErrorMask,
+                        data->lemWOF);
+        if (data->phbErrorStatus || data->phbFirstErrorStatus ||
+            data->phbErrorLog0   || data->phbErrorLog1)
+                pr_info("  PhbErr:      %016llx %016llx %016llx %016llx\n",
+                        data->phbErrorStatus, data->phbFirstErrorStatus,
+                        data->phbErrorLog0, data->phbErrorLog1);
+        if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
+            data->mmioErrorLog0   || data->mmioErrorLog1)
+                pr_info("  OutErr:      %016llx %016llx %016llx %016llx\n",
+                        data->mmioErrorStatus, data->mmioFirstErrorStatus,
+                        data->mmioErrorLog0, data->mmioErrorLog1);
+        if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
+            data->dma0ErrorLog0   || data->dma0ErrorLog1)
+                pr_info("  InAErr:      %016llx %016llx %016llx %016llx\n",
+                        data->dma0ErrorStatus, data->dma0FirstErrorStatus,
+                        data->dma0ErrorLog0, data->dma0ErrorLog1);
+        if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
+            data->dma1ErrorLog0   || data->dma1ErrorLog1)
+                pr_info("  InBErr:      %016llx %016llx %016llx %016llx\n",
+                        data->dma1ErrorStatus, data->dma1FirstErrorStatus,
+                        data->dma1ErrorLog0, data->dma1ErrorLog1);
 
         for (i = 0; i < OPAL_P7IOC_NUM_PEST_REGS; i++) {
                 if ((data->pestA[i] >> 63) == 0 &&
                     (data->pestB[i] >> 63) == 0)
                         continue;
 
-                pr_info("  PE[%3d] PESTA:        %016llx\n", i, data->pestA[i]);
-                pr_info("          PESTB:        %016llx\n", data->pestB[i]);
+                pr_info("  PE[%3d] A/B: %016llx %016llx\n",
+                        i, data->pestA[i], data->pestB[i]);
         }
 }
 
@@ -197,62 +212,77 @@ static void pnv_pci_dump_phb3_diag_data(struct pci_controller *hose,
         data = (struct OpalIoPhb3ErrorData*)common;
         pr_info("PHB3 PHB#%d Diag-data (Version: %d)\n\n",
                 hose->global_number, common->version);
-
-        pr_info("  brdgCtl:              %08x\n", data->brdgCtl);
-
-        pr_info("  portStatusReg:        %08x\n", data->portStatusReg);
-        pr_info("  rootCmplxStatus:      %08x\n", data->rootCmplxStatus);
-        pr_info("  busAgentStatus:       %08x\n", data->busAgentStatus);
-
-        pr_info("  deviceStatus:         %08x\n", data->deviceStatus);
-        pr_info("  slotStatus:           %08x\n", data->slotStatus);
-        pr_info("  linkStatus:           %08x\n", data->linkStatus);
-        pr_info("  devCmdStatus:         %08x\n", data->devCmdStatus);
-        pr_info("  devSecStatus:         %08x\n", data->devSecStatus);
-
-        pr_info("  rootErrorStatus:      %08x\n", data->rootErrorStatus);
-        pr_info("  uncorrErrorStatus:    %08x\n", data->uncorrErrorStatus);
-        pr_info("  corrErrorStatus:      %08x\n", data->corrErrorStatus);
-        pr_info("  tlpHdr1:              %08x\n", data->tlpHdr1);
-        pr_info("  tlpHdr2:              %08x\n", data->tlpHdr2);
-        pr_info("  tlpHdr3:              %08x\n", data->tlpHdr3);
-        pr_info("  tlpHdr4:              %08x\n", data->tlpHdr4);
-        pr_info("  sourceId:             %08x\n", data->sourceId);
-        pr_info("  errorClass:           %016llx\n", data->errorClass);
-        pr_info("  correlator:           %016llx\n", data->correlator);
-
-        pr_info("  nFir:                 %016llx\n", data->nFir);
-        pr_info("  nFirMask:             %016llx\n", data->nFirMask);
-        pr_info("  nFirWOF:              %016llx\n", data->nFirWOF);
-        pr_info("  PhbPlssr:             %016llx\n", data->phbPlssr);
-        pr_info("  PhbCsr:               %016llx\n", data->phbCsr);
-        pr_info("  lemFir:               %016llx\n", data->lemFir);
-        pr_info("  lemErrorMask:         %016llx\n", data->lemErrorMask);
-        pr_info("  lemWOF:               %016llx\n", data->lemWOF);
-        pr_info("  phbErrorStatus:       %016llx\n", data->phbErrorStatus);
-        pr_info("  phbFirstErrorStatus:  %016llx\n", data->phbFirstErrorStatus);
-        pr_info("  phbErrorLog0:         %016llx\n", data->phbErrorLog0);
-        pr_info("  phbErrorLog1:         %016llx\n", data->phbErrorLog1);
-        pr_info("  mmioErrorStatus:      %016llx\n", data->mmioErrorStatus);
-        pr_info("  mmioFirstErrorStatus: %016llx\n", data->mmioFirstErrorStatus);
-        pr_info("  mmioErrorLog0:        %016llx\n", data->mmioErrorLog0);
-        pr_info("  mmioErrorLog1:        %016llx\n", data->mmioErrorLog1);
-        pr_info("  dma0ErrorStatus:      %016llx\n", data->dma0ErrorStatus);
-        pr_info("  dma0FirstErrorStatus: %016llx\n", data->dma0FirstErrorStatus);
-        pr_info("  dma0ErrorLog0:        %016llx\n", data->dma0ErrorLog0);
-        pr_info("  dma0ErrorLog1:        %016llx\n", data->dma0ErrorLog1);
-        pr_info("  dma1ErrorStatus:      %016llx\n", data->dma1ErrorStatus);
-        pr_info("  dma1FirstErrorStatus: %016llx\n", data->dma1FirstErrorStatus);
-        pr_info("  dma1ErrorLog0:        %016llx\n", data->dma1ErrorLog0);
-        pr_info("  dma1ErrorLog1:        %016llx\n", data->dma1ErrorLog1);
+        if (data->brdgCtl)
+                pr_info("  brdgCtl:     %08x\n",
+                        data->brdgCtl);
+        if (data->portStatusReg || data->rootCmplxStatus ||
+            data->busAgentStatus)
+                pr_info("  UtlSts:      %08x %08x %08x\n",
+                        data->portStatusReg, data->rootCmplxStatus,
+                        data->busAgentStatus);
+        if (data->deviceStatus || data->slotStatus   ||
+            data->linkStatus   || data->devCmdStatus ||
+            data->devSecStatus)
+                pr_info("  RootSts:     %08x %08x %08x %08x %08x\n",
+                        data->deviceStatus, data->slotStatus,
+                        data->linkStatus, data->devCmdStatus,
+                        data->devSecStatus);
+        if (data->rootErrorStatus || data->uncorrErrorStatus ||
+            data->corrErrorStatus)
+                pr_info("  RootErrSts:  %08x %08x %08x\n",
+                        data->rootErrorStatus, data->uncorrErrorStatus,
+                        data->corrErrorStatus);
+        if (data->tlpHdr1 || data->tlpHdr2 ||
+            data->tlpHdr3 || data->tlpHdr4)
+                pr_info("  RootErrLog:  %08x %08x %08x %08x\n",
+                        data->tlpHdr1, data->tlpHdr2,
+                        data->tlpHdr3, data->tlpHdr4);
+        if (data->sourceId || data->errorClass ||
+            data->correlator)
+                pr_info("  RootErrLog1: %08x %016llx %016llx\n",
+                        data->sourceId, data->errorClass,
+                        data->correlator);
+        if (data->nFir || data->nFirMask ||
+            data->nFirWOF)
+                pr_info("  nFir:        %016llx %016llx %016llx\n",
+                        data->nFir, data->nFirMask,
+                        data->nFirWOF);
+        if (data->phbPlssr || data->phbCsr)
+                pr_info("  PhbSts:      %016llx %016llx\n",
+                        data->phbPlssr, data->phbCsr);
+        if (data->lemFir || data->lemErrorMask ||
+            data->lemWOF)
+                pr_info("  Lem:         %016llx %016llx %016llx\n",
+                        data->lemFir, data->lemErrorMask,
+                        data->lemWOF);
+        if (data->phbErrorStatus || data->phbFirstErrorStatus ||
+            data->phbErrorLog0   || data->phbErrorLog1)
+                pr_info("  PhbErr:      %016llx %016llx %016llx %016llx\n",
+                        data->phbErrorStatus, data->phbFirstErrorStatus,
+                        data->phbErrorLog0, data->phbErrorLog1);
+        if (data->mmioErrorStatus || data->mmioFirstErrorStatus ||
+            data->mmioErrorLog0   || data->mmioErrorLog1)
+                pr_info("  OutErr:      %016llx %016llx %016llx %016llx\n",
+                        data->mmioErrorStatus, data->mmioFirstErrorStatus,
+                        data->mmioErrorLog0, data->mmioErrorLog1);
+        if (data->dma0ErrorStatus || data->dma0FirstErrorStatus ||
+            data->dma0ErrorLog0   || data->dma0ErrorLog1)
+                pr_info("  InAErr:      %016llx %016llx %016llx %016llx\n",
+                        data->dma0ErrorStatus, data->dma0FirstErrorStatus,
+                        data->dma0ErrorLog0, data->dma0ErrorLog1);
+        if (data->dma1ErrorStatus || data->dma1FirstErrorStatus ||
+            data->dma1ErrorLog0   || data->dma1ErrorLog1)
+                pr_info("  InBErr:      %016llx %016llx %016llx %016llx\n",
+                        data->dma1ErrorStatus, data->dma1FirstErrorStatus,
+                        data->dma1ErrorLog0, data->dma1ErrorLog1);
 
         for (i = 0; i < OPAL_PHB3_NUM_PEST_REGS; i++) {
                 if ((data->pestA[i] >> 63) == 0 &&
                     (data->pestB[i] >> 63) == 0)
                         continue;
 
-                pr_info("  PE[%3d] PESTA:        %016llx\n", i, data->pestA[i]);
-                pr_info("          PESTB:        %016llx\n", data->pestB[i]);
+                pr_info("  PE[%3d] A/B: %016llx %016llx\n",
+                        i, data->pestA[i], data->pestB[i]);
         }
 }
 
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 82789e79e539..0ea99e3d4815 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -35,12 +35,7 @@
 #include "offline_states.h"
 
 /* This version can't take the spinlock, because it never returns */
-static struct rtas_args rtas_stop_self_args = {
-        .token = RTAS_UNKNOWN_SERVICE,
-        .nargs = 0,
-        .nret = 1,
-        .rets = &rtas_stop_self_args.args[0],
-};
+static int rtas_stop_self_token = RTAS_UNKNOWN_SERVICE;
 
 static DEFINE_PER_CPU(enum cpu_state_vals, preferred_offline_state) =
                                                         CPU_STATE_OFFLINE;
@@ -93,15 +88,20 @@ void set_default_offline_state(int cpu)
 
 static void rtas_stop_self(void)
 {
-        struct rtas_args *args = &rtas_stop_self_args;
+        struct rtas_args args = {
+                .token = cpu_to_be32(rtas_stop_self_token),
+                .nargs = 0,
+                .nret = 1,
+                .rets = &args.args[0],
+        };
 
         local_irq_disable();
 
-        BUG_ON(args->token == RTAS_UNKNOWN_SERVICE);
+        BUG_ON(rtas_stop_self_token == RTAS_UNKNOWN_SERVICE);
 
         printk("cpu %u (hwid %u) Ready to die...\n",
                smp_processor_id(), hard_smp_processor_id());
-        enter_rtas(__pa(args));
+        enter_rtas(__pa(&args));
 
         panic("Alas, I survived.\n");
 }
@@ -392,10 +392,10 @@ static int __init pseries_cpu_hotplug_init(void)
                 }
         }
 
-        rtas_stop_self_args.token = rtas_token("stop-self");
+        rtas_stop_self_token = rtas_token("stop-self");
         qcss_tok = rtas_token("query-cpu-stopped-state");
 
-        if (rtas_stop_self_args.token == RTAS_UNKNOWN_SERVICE ||
+        if (rtas_stop_self_token == RTAS_UNKNOWN_SERVICE ||
                         qcss_tok == RTAS_UNKNOWN_SERVICE) {
                 printk(KERN_INFO "CPU Hotplug not supported by firmware "
                                 "- disabling.\n");
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S
index 59c8efce1b99..0248949a756d 100644
--- a/arch/s390/kernel/compat_wrapper.S
+++ b/arch/s390/kernel/compat_wrapper.S
@@ -1421,5 +1421,5 @@ ENTRY(sys_sched_setattr_wrapper)
 ENTRY(sys_sched_getattr_wrapper)
         lgfr    %r2,%r2                 # pid_t
         llgtr   %r3,%r3                 # const char __user *
-        llgfr   %r3,%r3                 # unsigned int
+        llgfr   %r4,%r4                 # unsigned int
         jg      sys_sched_getattr
diff --git a/arch/s390/pci/pci_dma.c b/arch/s390/pci/pci_dma.c
index 60c11a629d96..f91c03119804 100644
--- a/arch/s390/pci/pci_dma.c
+++ b/arch/s390/pci/pci_dma.c
@@ -206,11 +206,13 @@ static void dma_cleanup_tables(struct zpci_dev *zdev)
         zdev->dma_table = NULL;
 }
 
-static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev, unsigned long start,
-                                   int size)
+static unsigned long __dma_alloc_iommu(struct zpci_dev *zdev,
+                                       unsigned long start, int size)
 {
-        unsigned long boundary_size = 0x1000000;
+        unsigned long boundary_size;
 
+        boundary_size = ALIGN(dma_get_seg_boundary(&zdev->pdev->dev) + 1,
+                              PAGE_SIZE) >> PAGE_SHIFT;
         return iommu_area_alloc(zdev->iommu_bitmap, zdev->iommu_pages,
                                 start, size, 0, boundary_size, 0);
 }
diff --git a/arch/x86/boot/compressed/aslr.c b/arch/x86/boot/compressed/aslr.c
index 90a21f430117..4dbf967da50d 100644
--- a/arch/x86/boot/compressed/aslr.c
+++ b/arch/x86/boot/compressed/aslr.c
@@ -111,7 +111,7 @@ struct mem_vector {
 };
 
 #define MEM_AVOID_MAX 5
-struct mem_vector mem_avoid[MEM_AVOID_MAX];
+static struct mem_vector mem_avoid[MEM_AVOID_MAX];
 
 static bool mem_contains(struct mem_vector *region, struct mem_vector *item)
 {
@@ -180,7 +180,7 @@ static void mem_avoid_init(unsigned long input, unsigned long input_size,
 }
 
 /* Does this memory vector overlap a known avoided area? */
-bool mem_avoid_overlap(struct mem_vector *img)
+static bool mem_avoid_overlap(struct mem_vector *img)
 {
         int i;
 
@@ -192,8 +192,9 @@ bool mem_avoid_overlap(struct mem_vector *img)
         return false;
 }
 
-unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET / CONFIG_PHYSICAL_ALIGN];
-unsigned long slot_max = 0;
+static unsigned long slots[CONFIG_RANDOMIZE_BASE_MAX_OFFSET /
+                           CONFIG_PHYSICAL_ALIGN];
+static unsigned long slot_max;
 
 static void slots_append(unsigned long addr)
 {
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index 895604f2e916..79f9f848bee4 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1192,6 +1192,9 @@ static void x86_pmu_del(struct perf_event *event, int flags)
         for (i = 0; i < cpuc->n_events; i++) {
                 if (event == cpuc->event_list[i]) {
 
+                        if (i >= cpuc->n_events - cpuc->n_added)
+                                --cpuc->n_added;
+
                         if (x86_pmu.put_event_constraints)
                                 x86_pmu.put_event_constraints(cpuc, event);
 
diff --git a/arch/x86/kernel/machine_kexec_64.c b/arch/x86/kernel/machine_kexec_64.c
index 4eabc160696f..679cef0791cd 100644
--- a/arch/x86/kernel/machine_kexec_64.c
+++ b/arch/x86/kernel/machine_kexec_64.c
@@ -279,5 +279,7 @@ void arch_crash_save_vmcoreinfo(void)
         VMCOREINFO_SYMBOL(node_data);
         VMCOREINFO_LENGTH(node_data, MAX_NUMNODES);
 #endif
+        vmcoreinfo_append_str("KERNELOFFSET=%lx\n",
+                              (unsigned long)&_text - __START_KERNEL);
 }
 
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index e50425d0f5f7..9b531351a587 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -2672,6 +2672,7 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
                         break;
                 }
 
+                drop_large_spte(vcpu, iterator.sptep);
                 if (!is_shadow_present_pte(*iterator.sptep)) {
                         u64 base_addr = iterator.addr;
 
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a06f101ef64b..392752834751 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -6688,7 +6688,7 @@ static bool nested_vmx_exit_handled(struct kvm_vcpu *vcpu)
                 else if (is_page_fault(intr_info))
                         return enable_ept;
                 else if (is_no_device(intr_info) &&
-                         !(nested_read_cr0(vmcs12) & X86_CR0_TS))
+                         !(vmcs12->guest_cr0 & X86_CR0_TS))
                         return 0;
                 return vmcs12->exception_bitmap &
                                 (1u << (intr_info & INTR_INFO_VECTOR_MASK));
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 39c28f09dfd5..2b8578432d5b 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -6186,7 +6186,7 @@ static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
                 frag->len -= len;
         }
 
-        if (vcpu->mmio_cur_fragment == vcpu->mmio_nr_fragments) {
+        if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
                 vcpu->mmio_needed = 0;
 
                 /* FIXME: return into emulator if single-stepping.  */
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index ba56e11cbf77..c87ae7c6e5f9 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -20,6 +20,7 @@ config XTENSA
         select HAVE_FUNCTION_TRACER
         select HAVE_IRQ_TIME_ACCOUNTING
         select HAVE_PERF_EVENTS
+        select COMMON_CLK
         help
           Xtensa processors are 32-bit RISC machines designed by Tensilica
           primarily for embedded systems.  These processors are both
@@ -80,7 +81,6 @@ choice
 config XTENSA_VARIANT_FSF
         bool "fsf - default (not generic) configuration"
         select MMU
-        select HAVE_XTENSA_GPIO32
 
 config XTENSA_VARIANT_DC232B
         bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
@@ -135,7 +135,6 @@ config HAVE_SMP
 config SMP
         bool "Enable Symmetric multi-processing support"
         depends on HAVE_SMP
-        select USE_GENERIC_SMP_HELPERS
         select GENERIC_SMP_IDLE_THREAD
         help
           Enabled SMP Software; allows more than one CPU/CORE
diff --git a/arch/xtensa/boot/dts/xtfpga.dtsi b/arch/xtensa/boot/dts/xtfpga.dtsi
index 46b4f5eab421..e7370b11348e 100644
--- a/arch/xtensa/boot/dts/xtfpga.dtsi
+++ b/arch/xtensa/boot/dts/xtfpga.dtsi
@@ -35,6 +35,13 @@
                 interrupt-controller;
         };
 
+        clocks {
+                osc: main-oscillator {
+                        #clock-cells = <0>;
+                        compatible = "fixed-clock";
+                };
+        };
+
         serial0: serial@fd050020 {
                 device_type = "serial";
                 compatible = "ns16550a";
@@ -42,9 +49,7 @@
                 reg = <0xfd050020 0x20>;
                 reg-shift = <2>;
                 interrupts = <0 1>; /* external irq 0 */
-                /* Filled in by platform_setup from FPGA register
-                 * clock-frequency = <100000000>;
-                 */
+                clocks = <&osc>;
         };
 
         enet0: ethoc@fd030000 {
@@ -52,5 +57,6 @@
                 reg = <0xfd030000 0x4000 0xfd800000 0x4000>;
                 interrupts = <1 1>; /* external irq 1 */
                 local-mac-address = [00 50 c2 13 6f 00];
+                clocks = <&osc>;
         };
 };
diff --git a/arch/xtensa/include/asm/io.h b/arch/xtensa/include/asm/io.h
index 2a042d430c25..74944207167e 100644
--- a/arch/xtensa/include/asm/io.h
+++ b/arch/xtensa/include/asm/io.h
@@ -25,7 +25,7 @@
 
 #ifdef CONFIG_MMU
 
-#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF
+#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
 extern unsigned long xtensa_kio_paddr;
 
 static inline unsigned long xtensa_get_kio_paddr(void)
diff --git a/arch/xtensa/include/asm/traps.h b/arch/xtensa/include/asm/traps.h
index 8c194f6af45e..677bfcf4ee5d 100644
--- a/arch/xtensa/include/asm/traps.h
+++ b/arch/xtensa/include/asm/traps.h
@@ -23,25 +23,37 @@ void secondary_trap_init(void);
 
 static inline void spill_registers(void)
 {
-
+#if XCHAL_NUM_AREGS > 16
         __asm__ __volatile__ (
-                "movi   a14, "__stringify((1 << PS_EXCM_BIT) | LOCKLEVEL)"\n\t"
-                "mov    a12, a0\n\t"
-                "rsr    a13, sar\n\t"
-                "xsr    a14, ps\n\t"
-                "movi   a0, _spill_registers\n\t"
-                "rsync\n\t"
-                "callx0 a0\n\t"
-                "mov    a0, a12\n\t"
-                "wsr    a13, sar\n\t"
-                "wsr    a14, ps\n\t"
-                : :
-#if defined(CONFIG_FRAME_POINTER)
-                : "a2", "a3", "a4",       "a11", "a12", "a13", "a14", "a15",
+                "       call12  1f\n"
+                "       _j      2f\n"
+                "       retw\n"
+                "       .align  4\n"
+                "1:\n"
+                "       _entry  a1, 48\n"
+                "       addi    a12, a0, 3\n"
+#if XCHAL_NUM_AREGS > 32
+                "       .rept   (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n"
+                "       _entry  a1, 48\n"
+                "       mov     a12, a0\n"
+                "       .endr\n"
+#endif
+                "       _entry  a1, 48\n"
+#if XCHAL_NUM_AREGS % 12 == 0
+                "       mov     a8, a8\n"
+#elif XCHAL_NUM_AREGS % 12 == 4
+                "       mov     a12, a12\n"
+#elif XCHAL_NUM_AREGS % 12 == 8
+                "       mov     a4, a4\n"
+#endif
+                "       retw\n"
+                "2:\n"
+                : : : "a12", "a13", "memory");
 #else
-                : "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15",
+        __asm__ __volatile__ (
+                "       mov     a12, a12\n"
+                : : : "memory");
 #endif
-                  "memory");
 }
 
 #endif /* _XTENSA_TRAPS_H */
diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h
index 5791b45d5a5d..f74ddfbb92ef 100644
--- a/arch/xtensa/include/asm/vectors.h
+++ b/arch/xtensa/include/asm/vectors.h
@@ -25,7 +25,7 @@
 #define XCHAL_KIO_DEFAULT_PADDR         0xf0000000
 #define XCHAL_KIO_SIZE                  0x10000000
 
-#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF
+#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
 #define XCHAL_KIO_PADDR                 xtensa_get_kio_paddr()
 #else
 #define XCHAL_KIO_PADDR                 XCHAL_KIO_DEFAULT_PADDR
diff --git a/arch/xtensa/include/uapi/asm/unistd.h b/arch/xtensa/include/uapi/asm/unistd.h
index 51940fec6990..b9395529f02d 100644
--- a/arch/xtensa/include/uapi/asm/unistd.h
+++ b/arch/xtensa/include/uapi/asm/unistd.h
@@ -734,7 +734,12 @@ __SYSCALL(332, sys_finit_module, 3)
 #define __NR_accept4                            333
 __SYSCALL(333, sys_accept4, 4)
 
-#define __NR_syscall_count                      334
+#define __NR_sched_setattr                      334
+__SYSCALL(334, sys_sched_setattr, 2)
+#define __NR_sched_getattr                      335
+__SYSCALL(335, sys_sched_getattr, 3)
+
+#define __NR_syscall_count                      336
 
 /*
  * sysxtensa syscall handler
diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S
index 21dbe6bdb8ed..ef7f4990722b 100644
--- a/arch/xtensa/kernel/entry.S
+++ b/arch/xtensa/kernel/entry.S
@@ -1081,196 +1081,53 @@ ENTRY(fast_syscall_spill_registers)
 
         rsr     a0, sar
         s32i    a3, a2, PT_AREG3
-        s32i    a4, a2, PT_AREG4
-        s32i    a0, a2, PT_AREG5        # store SAR to PT_AREG5
+        s32i    a0, a2, PT_SAR
 
-        /* The spill routine might clobber a7, a11, and a15. */
+        /* The spill routine might clobber a4, a7, a8, a11, a12, and a15. */
 
+        s32i    a4, a2, PT_AREG4
         s32i    a7, a2, PT_AREG7
+        s32i    a8, a2, PT_AREG8
         s32i    a11, a2, PT_AREG11
+        s32i    a12, a2, PT_AREG12
         s32i    a15, a2, PT_AREG15
 
-        call0   _spill_registers        # destroys a3, a4, and SAR
-
-        /* Advance PC, restore registers and SAR, and return from exception. */
-
-        l32i    a3, a2, PT_AREG5
-        l32i    a4, a2, PT_AREG4
-        l32i    a0, a2, PT_AREG0
-        wsr     a3, sar
-        l32i    a3, a2, PT_AREG3
-
-        /* Restore clobbered registers. */
-
-        l32i    a7, a2, PT_AREG7
-        l32i    a11, a2, PT_AREG11
-        l32i    a15, a2, PT_AREG15
-
-        movi    a2, 0
-        rfe
-
-ENDPROC(fast_syscall_spill_registers)
-
-/* Fixup handler.
- *
- * We get here if the spill routine causes an exception, e.g. tlb miss.
- * We basically restore WINDOWBASE and WINDOWSTART to the condition when
- * we entered the spill routine and jump to the user exception handler.
- *
- * a0: value of depc, original value in depc
- * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
- * a3: exctable, original value in excsave1
- */
-
-ENTRY(fast_syscall_spill_registers_fixup)
-
-        rsr     a2, windowbase  # get current windowbase (a2 is saved)
-        xsr     a0, depc        # restore depc and a0
-        ssl     a2              # set shift (32 - WB)
-
-        /* We need to make sure the current registers (a0-a3) are preserved.
-         * To do this, we simply set the bit for the current window frame
-         * in WS, so that the exception handlers save them to the task stack.
-         */
-
-        xsr     a3, excsave1    # get spill-mask
-        slli    a3, a3, 1       # shift left by one
-
-        slli    a2, a3, 32-WSBITS
-        src     a2, a3, a2      # a2 = xxwww1yyxxxwww1yy......
-        wsr     a2, windowstart # set corrected windowstart
-
-        srli    a3, a3, 1
-        rsr     a2, excsave1
-        l32i    a2, a2, EXC_TABLE_DOUBLE_SAVE   # restore a2
-        xsr     a2, excsave1
-        s32i    a3, a2, EXC_TABLE_DOUBLE_SAVE   # save a3
-        l32i    a3, a2, EXC_TABLE_PARAM # original WB (in user task)
-        xsr     a2, excsave1
-
-        /* Return to the original (user task) WINDOWBASE.
-         * We leave the following frame behind:
-         * a0, a1, a2   same
-         * a3:          trashed (saved in EXC_TABLE_DOUBLE_SAVE)
-         * depc:        depc (we have to return to that address)
-         * excsave_1:   exctable
-         */
-
-        wsr     a3, windowbase
-        rsync
-
-        /* We are now in the original frame when we entered _spill_registers:
-         *  a0: return address
-         *  a1: used, stack pointer
-         *  a2: kernel stack pointer
-         *  a3: available
-         *  depc: exception address
-         *  excsave: exctable
-         * Note: This frame might be the same as above.
-         */
-
-        /* Setup stack pointer. */
-
-        addi    a2, a2, -PT_USER_SIZE
-        s32i    a0, a2, PT_AREG0
-
-        /* Make sure we return to this fixup handler. */
-
-        movi    a3, fast_syscall_spill_registers_fixup_return
-        s32i    a3, a2, PT_DEPC         # setup depc
-
-        /* Jump to the exception handler. */
-
-        rsr     a3, excsave1
-        rsr     a0, exccause
-        addx4   a0, a0, a3                      # find entry in table
-        l32i    a0, a0, EXC_TABLE_FAST_USER     # load handler
-        l32i    a3, a3, EXC_TABLE_DOUBLE_SAVE
-        jx      a0
-
-ENDPROC(fast_syscall_spill_registers_fixup)
-
-ENTRY(fast_syscall_spill_registers_fixup_return)
-
-        /* When we return here, all registers have been restored (a2: DEPC) */
-
-        wsr     a2, depc                # exception address
-
-        /* Restore fixup handler. */
-
-        rsr     a2, excsave1
-        s32i    a3, a2, EXC_TABLE_DOUBLE_SAVE
-        movi    a3, fast_syscall_spill_registers_fixup
-        s32i    a3, a2, EXC_TABLE_FIXUP
-        rsr     a3, windowbase
-        s32i    a3, a2, EXC_TABLE_PARAM
-        l32i    a2, a2, EXC_TABLE_KSTK
-
-        /* Load WB at the time the exception occurred. */
-
-        rsr     a3, sar                 # WB is still in SAR
-        neg     a3, a3
-        wsr     a3, windowbase
-        rsync
-
-        rsr     a3, excsave1
-        l32i    a3, a3, EXC_TABLE_DOUBLE_SAVE
-
-        rfde
-
-ENDPROC(fast_syscall_spill_registers_fixup_return)
-
-/*
- * spill all registers.
- *
- * This is not a real function. The following conditions must be met:
- *
- *  - must be called with call0.
- *  - uses a3, a4 and SAR.
- *  - the last 'valid' register of each frame are clobbered.
- *  - the caller must have registered a fixup handler
- *    (or be inside a critical section)
- *  - PS_EXCM must be set (PS_WOE cleared?)
- */
-
-ENTRY(_spill_registers)
-
         /*
          * Rotate ws so that the current windowbase is at bit 0.
          * Assume ws = xxxwww1yy (www1 current window frame).
          * Rotate ws right so that a4 = yyxxxwww1.
          */
 
-        rsr     a4, windowbase
+        rsr     a0, windowbase
         rsr     a3, windowstart         # a3 = xxxwww1yy
-        ssr     a4                      # holds WB
-        slli    a4, a3, WSBITS
-        or      a3, a3, a4              # a3 = xxxwww1yyxxxwww1yy
+        ssr     a0                      # holds WB
+        slli    a0, a3, WSBITS
+        or      a3, a3, a0              # a3 = xxxwww1yyxxxwww1yy
         srl     a3, a3                  # a3 = 00xxxwww1yyxxxwww1
 
         /* We are done if there are no more than the current register frame. */
 
         extui   a3, a3, 1, WSBITS-1     # a3 = 0yyxxxwww
-        movi    a4, (1 << (WSBITS-1))
+        movi    a0, (1 << (WSBITS-1))
         _beqz   a3, .Lnospill           # only one active frame? jump
 
         /* We want 1 at the top, so that we return to the current windowbase */
 
-        or      a3, a3, a4              # 1yyxxxwww
+        or      a3, a3, a0              # 1yyxxxwww
 
         /* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
 
         wsr     a3, windowstart         # save shifted windowstart
-        neg     a4, a3
-        and     a3, a4, a3              # first bit set from right: 000010000
+        neg     a0, a3
+        and     a3, a0, a3              # first bit set from right: 000010000
 
-        ffs_ws  a4, a3                  # a4: shifts to skip empty frames
+        ffs_ws  a0, a3                  # a0: shifts to skip empty frames
         movi    a3, WSBITS
-        sub     a4, a3, a4              # WSBITS-a4:number of 0-bits from right
-        ssr     a4                      # save in SAR for later.
+        sub     a0, a3, a0              # WSBITS-a0:number of 0-bits from right
+        ssr     a0                      # save in SAR for later.
 
         rsr     a3, windowbase
-        add     a3, a3, a4
+        add     a3, a3, a0
         wsr     a3, windowbase
         rsync
 
@@ -1285,22 +1142,6 @@ ENTRY(_spill_registers)
          * we have to save 4,8. or 12 registers.
          */
 
-        _bbsi.l a3, 1, .Lc4
-        _bbsi.l a3, 2, .Lc8
-
-        /* Special case: we have a call12-frame starting at a4. */
-
-        _bbci.l a3, 3, .Lc12    # bit 3 shouldn't be zero! (Jump to Lc12 first)
-
-        s32e    a4, a1, -16     # a1 is valid with an empty spill area
-        l32e    a4, a5, -12
-        s32e    a8, a4, -48
-        mov     a8, a4
-        l32e    a4, a1, -16
-        j       .Lc12c
-
-.Lnospill:
-        ret
 
 .Lloop: _bbsi.l a3, 1, .Lc4
         _bbci.l a3, 2, .Lc12
@@ -1314,20 +1155,10 @@ ENTRY(_spill_registers)
         s32e    a9, a4, -28
         s32e    a10, a4, -24
         s32e    a11, a4, -20
-
         srli    a11, a3, 2              # shift windowbase by 2
         rotw    2
         _bnei   a3, 1, .Lloop
-
-.Lexit: /* Done. Do the final rotation, set WS, and return. */
-
-        rotw    1
-        rsr     a3, windowbase
-        ssl     a3
-        movi    a3, 1
-        sll     a3, a3
-        wsr     a3, windowstart
-        ret
+        j       .Lexit
 
 .Lc4:   s32e    a4, a9, -16
         s32e    a5, a9, -12
@@ -1343,11 +1174,11 @@ ENTRY(_spill_registers)
 
         /* 12-register frame (call12) */
 
-        l32e    a2, a5, -12
-        s32e    a8, a2, -48
-        mov     a8, a2
+        l32e    a0, a5, -12
+        s32e    a8, a0, -48
+        mov     a8, a0
 
-.Lc12c: s32e    a9, a8, -44
+        s32e    a9, a8, -44
         s32e    a10, a8, -40
         s32e    a11, a8, -36
         s32e    a12, a8, -32
@@ -1367,30 +1198,54 @@ ENTRY(_spill_registers)
          */
 
         rotw    1
-        mov     a5, a13
+        mov     a4, a13
         rotw    -1
 
-        s32e    a4, a9, -16
-        s32e    a5, a9, -12
-        s32e    a6, a9, -8
-        s32e    a7, a9, -4
+        s32e    a4, a8, -16
+        s32e    a5, a8, -12
+        s32e    a6, a8, -8
+        s32e    a7, a8, -4
 
         rotw    3
 
         _beqi   a3, 1, .Lexit
         j       .Lloop
 
-.Linvalid_mask:
+.Lexit:
 
-        /* We get here because of an unrecoverable error in the window
-         * registers. If we are in user space, we kill the application,
-         * however, this condition is unrecoverable in kernel space.
-         */
+        /* Done. Do the final rotation and set WS */
+
+        rotw    1
+        rsr     a3, windowbase
+        ssl     a3
+        movi    a3, 1
+        sll     a3, a3
+        wsr     a3, windowstart
+.Lnospill:
+
+        /* Advance PC, restore registers and SAR, and return from exception. */
+
+        l32i    a3, a2, PT_SAR
+        l32i    a0, a2, PT_AREG0
+        wsr     a3, sar
+        l32i    a3, a2, PT_AREG3
 
-        rsr     a0, ps
-        _bbci.l a0, PS_UM_BIT, 1f
+        /* Restore clobbered registers. */
 
-        /* User space: Setup a dummy frame and kill application.
+        l32i    a4, a2, PT_AREG4
+        l32i    a7, a2, PT_AREG7
+        l32i    a8, a2, PT_AREG8
+        l32i    a11, a2, PT_AREG11
+        l32i    a12, a2, PT_AREG12
+        l32i    a15, a2, PT_AREG15
+
+        movi    a2, 0
+        rfe
+
+.Linvalid_mask:
+
+        /* We get here because of an unrecoverable error in the window
+         * registers, so set up a dummy frame and kill the user application.
          * Note: We assume EXC_TABLE_KSTK contains a valid stack pointer.
          */
 
@@ -1414,14 +1269,136 @@ ENTRY(_spill_registers)
         movi    a4, do_exit
         callx4  a4
 
-1:      /* Kernel space: PANIC! */
+        /* shouldn't return, so panic */
 
         wsr     a0, excsave1
         movi    a0, unrecoverable_exception
         callx0  a0              # should not return
 1:      j       1b
 
-ENDPROC(_spill_registers)
+
+ENDPROC(fast_syscall_spill_registers)
+
+/* Fixup handler.
+ *
+ * We get here if the spill routine causes an exception, e.g. tlb miss.
+ * We basically restore WINDOWBASE and WINDOWSTART to the condition when
+ * we entered the spill routine and jump to the user exception handler.
+ *
+ * Note that we only need to restore the bits in windowstart that have not
+ * been spilled yet by the _spill_register routine. Luckily, a3 contains a
+ * rotated windowstart with only those bits set for frames that haven't been
+ * spilled yet. Because a3 is rotated such that bit 0 represents the register
+ * frame for the current windowbase - 1, we need to rotate a3 left by the
+ * value of the current windowbase + 1 and move it to windowstart.
+ *
+ * a0: value of depc, original value in depc
+ * a2: trashed, original value in EXC_TABLE_DOUBLE_SAVE
+ * a3: exctable, original value in excsave1
+ */
+
+ENTRY(fast_syscall_spill_registers_fixup)
+
+        rsr     a2, windowbase  # get current windowbase (a2 is saved)
+        xsr     a0, depc        # restore depc and a0
+        ssl     a2              # set shift (32 - WB)
+
+        /* We need to make sure the current registers (a0-a3) are preserved.
+         * To do this, we simply set the bit for the current window frame
+         * in WS, so that the exception handlers save them to the task stack.
+         *
+         * Note: we use a3 to set the windowbase, so we take a special care
+         * of it, saving it in the original _spill_registers frame across
+         * the exception handler call.
+         */
+
+        xsr     a3, excsave1    # get spill-mask
+        slli    a3, a3, 1       # shift left by one
+        addi    a3, a3, 1       # set the bit for the current window frame
+
+        slli    a2, a3, 32-WSBITS
+        src     a2, a3, a2      # a2 = xxwww1yyxxxwww1yy......
+        wsr     a2, windowstart # set corrected windowstart
+
+        srli    a3, a3, 1
+        rsr     a2, excsave1
+        l32i    a2, a2, EXC_TABLE_DOUBLE_SAVE   # restore a2
+        xsr     a2, excsave1
+        s32i    a3, a2, EXC_TABLE_DOUBLE_SAVE   # save a3
+        l32i    a3, a2, EXC_TABLE_PARAM # original WB (in user task)
+        xsr     a2, excsave1
+
+        /* Return to the original (user task) WINDOWBASE.
+         * We leave the following frame behind:
+         * a0, a1, a2   same
+         * a3:          trashed (saved in EXC_TABLE_DOUBLE_SAVE)
+         * depc:        depc (we have to return to that address)
+         * excsave_1:   exctable
+         */
+
+        wsr     a3, windowbase
+        rsync
+
+        /* We are now in the original frame when we entered _spill_registers:
+         *  a0: return address
+         *  a1: used, stack pointer
+         *  a2: kernel stack pointer
+         *  a3: available
+         *  depc: exception address
+         *  excsave: exctable
+         * Note: This frame might be the same as above.
+         */
+
+        /* Setup stack pointer. */
+
+        addi    a2, a2, -PT_USER_SIZE
+        s32i    a0, a2, PT_AREG0
+
+        /* Make sure we return to this fixup handler. */
+
+        movi    a3, fast_syscall_spill_registers_fixup_return
+        s32i    a3, a2, PT_DEPC         # setup depc
+
+        /* Jump to the exception handler. */
+
+        rsr     a3, excsave1
+        rsr     a0, exccause
+        addx4   a0, a0, a3                      # find entry in table
+        l32i    a0, a0, EXC_TABLE_FAST_USER     # load handler
+        l32i    a3, a3, EXC_TABLE_DOUBLE_SAVE
+        jx      a0
+
+ENDPROC(fast_syscall_spill_registers_fixup)
+
+ENTRY(fast_syscall_spill_registers_fixup_return)
+
+        /* When we return here, all registers have been restored (a2: DEPC) */
+
+        wsr     a2, depc                # exception address
+
+        /* Restore fixup handler. */
+
+        rsr     a2, excsave1
+        s32i    a3, a2, EXC_TABLE_DOUBLE_SAVE
+        movi    a3, fast_syscall_spill_registers_fixup
+        s32i    a3, a2, EXC_TABLE_FIXUP
+        rsr     a3, windowbase
+        s32i    a3, a2, EXC_TABLE_PARAM
+        l32i    a2, a2, EXC_TABLE_KSTK
+
+        /* Load WB at the time the exception occurred. */
+
+        rsr     a3, sar                 # WB is still in SAR
+        neg     a3, a3
+        wsr     a3, windowbase
+        rsync
+
+        rsr     a3, excsave1
+        l32i    a3, a3, EXC_TABLE_DOUBLE_SAVE
+
+        rfde
+
+ENDPROC(fast_syscall_spill_registers_fixup_return)
 
 #ifdef CONFIG_MMU
 /*
@@ -1794,6 +1771,43 @@ ENTRY(system_call)
 
 ENDPROC(system_call)
 
+/*
+ * Spill live registers on the kernel stack macro.
+ *
+ * Entry condition: ps.woe is set, ps.excm is cleared
+ * Exit condition: windowstart has single bit set
+ * May clobber: a12, a13
+ */
+        .macro  spill_registers_kernel
+
+#if XCHAL_NUM_AREGS > 16
+        call12  1f
+        _j      2f
+        retw
+        .align  4
+1:
+        _entry  a1, 48
+        addi    a12, a0, 3
+#if XCHAL_NUM_AREGS > 32
+        .rept   (XCHAL_NUM_AREGS - 32) / 12
+        _entry  a1, 48
+        mov     a12, a0
+        .endr
+#endif
+        _entry  a1, 48
+#if XCHAL_NUM_AREGS % 12 == 0
+        mov     a8, a8
+#elif XCHAL_NUM_AREGS % 12 == 4
+        mov     a12, a12
+#elif XCHAL_NUM_AREGS % 12 == 8
+        mov     a4, a4
+#endif
+        retw
+2:
+#else
+        mov     a12, a12
+#endif
+        .endm
 
 /*
  * Task switch.
@@ -1806,21 +1820,20 @@ ENTRY(_switch_to)
 
         entry   a1, 16
 
-        mov     a12, a2                 # preserve 'prev' (a2)
-        mov     a13, a3                 # and 'next' (a3)
+        mov     a10, a2                 # preserve 'prev' (a2)
+        mov     a11, a3                 # and 'next' (a3)
 
         l32i    a4, a2, TASK_THREAD_INFO
         l32i    a5, a3, TASK_THREAD_INFO
 
-        save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
+        save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
 
-        s32i    a0, a12, THREAD_RA      # save return address
-        s32i    a1, a12, THREAD_SP      # save stack pointer
+        s32i    a0, a10, THREAD_RA      # save return address
+        s32i    a1, a10, THREAD_SP      # save stack pointer
 
         /* Disable ints while we manipulate the stack pointer. */
 
-        movi    a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
-        xsr     a14, ps
+        rsil    a14, LOCKLEVEL
         rsr     a3, excsave1
         rsync
         s32i    a3, a3, EXC_TABLE_FIXUP /* enter critical section */
@@ -1835,7 +1848,7 @@ ENTRY(_switch_to)
 
         /* Flush register file. */
 
-        call0   _spill_registers        # destroys a3, a4, and SAR
+        spill_registers_kernel
 
         /* Set kernel stack (and leave critical section)
          * Note: It's save to set it here. The stack will not be overwritten
@@ -1851,13 +1864,13 @@ ENTRY(_switch_to)
 
         /* restore context of the task 'next' */
 
-        l32i    a0, a13, THREAD_RA      # restore return address
-        l32i    a1, a13, THREAD_SP      # restore stack pointer
+        l32i    a0, a11, THREAD_RA      # restore return address
+        l32i    a1, a11, THREAD_SP      # restore stack pointer
 
-        load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
+        load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
 
         wsr     a14, ps
-        mov     a2, a12                 # return 'prev'
+        mov     a2, a10                 # return 'prev'
         rsync
 
         retw
diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c
index 7d12af1317f1..84fe931bb60e 100644
--- a/arch/xtensa/kernel/setup.c
+++ b/arch/xtensa/kernel/setup.c
@@ -22,6 +22,7 @@
 #include <linux/bootmem.h>
 #include <linux/kernel.h>
 #include <linux/percpu.h>
+#include <linux/clk-provider.h>
 #include <linux/cpu.h>
 #include <linux/of_fdt.h>
 #include <linux/of_platform.h>
@@ -276,6 +277,7 @@ void __init early_init_devtree(void *params)
 
 static int __init xtensa_device_probe(void)
 {
+        of_clk_init(NULL);
         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
         return 0;
 }
diff --git a/arch/xtensa/kernel/time.c b/arch/xtensa/kernel/time.c
index 08b769d3b3a1..2a1823de69cc 100644
--- a/arch/xtensa/kernel/time.c
+++ b/arch/xtensa/kernel/time.c
@@ -30,6 +30,7 @@
 #include <asm/platform.h>
 
 unsigned long ccount_freq;              /* ccount Hz */
+EXPORT_SYMBOL(ccount_freq);
 
 static cycle_t ccount_read(struct clocksource *cs)
 {
diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S
index cb8fd44caabc..f9e1ec346e35 100644
--- a/arch/xtensa/kernel/vectors.S
+++ b/arch/xtensa/kernel/vectors.S
@@ -235,7 +235,7 @@ ENTRY(_DoubleExceptionVector)
 
         /* Check for overflow/underflow exception, jump if overflow. */
 
-        _bbci.l a0, 6, _DoubleExceptionVector_WindowOverflow
+        bbci.l  a0, 6, _DoubleExceptionVector_WindowOverflow
 
         /*
          * Restart window underflow exception.
diff --git a/arch/xtensa/kernel/xtensa_ksyms.c b/arch/xtensa/kernel/xtensa_ksyms.c
index 74a60c7e085e..80b33ed51f31 100644
--- a/arch/xtensa/kernel/xtensa_ksyms.c
+++ b/arch/xtensa/kernel/xtensa_ksyms.c
@@ -122,9 +122,7 @@ EXPORT_SYMBOL(insw);
 EXPORT_SYMBOL(insl);
 
 extern long common_exception_return;
-extern long _spill_registers;
 EXPORT_SYMBOL(common_exception_return);
-EXPORT_SYMBOL(_spill_registers);
 
 #ifdef CONFIG_FUNCTION_TRACER
 EXPORT_SYMBOL(_mcount);
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index 479d7537a32a..aff108df92d3 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -90,7 +90,7 @@ int __init mem_reserve(unsigned long start, unsigned long end, int must_exist)
 
 
 /*
- * Initialize the bootmem system and give it all the memory we have available.
+ * Initialize the bootmem system and give it all low memory we have available.
  */
 
 void __init bootmem_init(void)
@@ -142,9 +142,14 @@ void __init bootmem_init(void)
 
         /* Add all remaining memory pieces into the bootmem map */
 
-        for (i=0; i<sysmem.nr_banks; i++)
-                free_bootmem(sysmem.bank[i].start,
-                             sysmem.bank[i].end - sysmem.bank[i].start);
+        for (i = 0; i < sysmem.nr_banks; i++) {
+                if (sysmem.bank[i].start >> PAGE_SHIFT < max_low_pfn) {
+                        unsigned long end = min(max_low_pfn << PAGE_SHIFT,
+                                                sysmem.bank[i].end);
+                        free_bootmem(sysmem.bank[i].start,
+                                     end - sysmem.bank[i].start);
+                }
+        }
 
 }
 
diff --git a/arch/xtensa/mm/mmu.c b/arch/xtensa/mm/mmu.c
index 36ec171698b8..861203e958da 100644
--- a/arch/xtensa/mm/mmu.c
+++ b/arch/xtensa/mm/mmu.c
@@ -39,7 +39,7 @@ void init_mmu(void)
         set_itlbcfg_register(0);
         set_dtlbcfg_register(0);
 #endif
-#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && CONFIG_OF
+#if XCHAL_HAVE_PTP_MMU && XCHAL_HAVE_SPANNING_WAY && defined(CONFIG_OF)
         /*
          * Update the IO area mapping in case xtensa_kio_paddr has changed
          */
diff --git a/arch/xtensa/platforms/xtfpga/setup.c b/arch/xtensa/platforms/xtfpga/setup.c
index 800227862fe8..57fd08b36f51 100644
--- a/arch/xtensa/platforms/xtfpga/setup.c
+++ b/arch/xtensa/platforms/xtfpga/setup.c
@@ -135,11 +135,11 @@ static void __init update_local_mac(struct device_node *node)
 
 static int __init machine_setup(void)
 {
-        struct device_node *serial;
+        struct device_node *clock;
         struct device_node *eth = NULL;
 
-        for_each_compatible_node(serial, NULL, "ns16550a")
-                update_clock_frequency(serial);
+        for_each_node_by_name(clock, "main-oscillator")
+                update_clock_frequency(clock);
 
         if ((eth = of_find_compatible_node(eth, NULL, "opencores,ethoc")))
                 update_local_mac(eth);
@@ -290,6 +290,7 @@ static int __init xtavnet_init(void)
          * knows whether they set it correctly on the DIP switches.
          */
         pr_info("XTFPGA: Ethernet MAC %pM\n", ethoc_pdata.hwaddr);
+        ethoc_pdata.eth_clkfreq = *(long *)XTFPGA_CLKFRQ_VADDR;
 
         return 0;
 }
diff --git a/arch/xtensa/variants/fsf/include/variant/tie.h b/arch/xtensa/variants/fsf/include/variant/tie.h
index bf4020116df5..244cdea4dee5 100644
--- a/arch/xtensa/variants/fsf/include/variant/tie.h
+++ b/arch/xtensa/variants/fsf/include/variant/tie.h
@@ -18,13 +18,6 @@
 #define XCHAL_CP_MASK                   0x00    /* bitmask of all CPs by ID */
 #define XCHAL_CP_PORT_MASK              0x00    /* bitmask of only port CPs */
 
-/*  Basic parameters of each coprocessor:  */
-#define XCHAL_CP7_NAME                  "XTIOP"
-#define XCHAL_CP7_IDENT                 XTIOP
-#define XCHAL_CP7_SA_SIZE               0       /* size of state save area */
-#define XCHAL_CP7_SA_ALIGN              1       /* min alignment of save area */
-#define XCHAL_CP_ID_XTIOP               7       /* coprocessor ID (0..7) */
-
 /*  Filler info for unassigned coprocessors, to simplify arrays etc:  */
 #define XCHAL_NCP_SA_SIZE               0
 #define XCHAL_NCP_SA_ALIGN              1
@@ -42,6 +35,8 @@
 #define XCHAL_CP5_SA_ALIGN              1
 #define XCHAL_CP6_SA_SIZE               0
 #define XCHAL_CP6_SA_ALIGN              1
+#define XCHAL_CP7_SA_SIZE               0
+#define XCHAL_CP7_SA_ALIGN              1
 
 /*  Save area for non-coprocessor optional and custom (TIE) state:  */
 #define XCHAL_NCP_SA_SIZE               0