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authorOlof Johansson <olof@lixom.net>2013-08-14 02:33:07 -0400
committerOlof Johansson <olof@lixom.net>2013-08-14 02:33:07 -0400
commit8b2496a22810531cb9157191cd0264bae8efeca0 (patch)
tree04b3e07e094df65b2ea083eea30af6ac9a15c34e /arch
parentbee22087faf5bbf33fcb61e6c5e8f8ef7ebd77a5 (diff)
parent4380c39ad3efbe58d7ed3b6adf6e602b23402b1e (diff)
Merge tag 'v3.12-pwm-cleanup-for-olof' of git://github.com/tom3q/linux into next/cleanup
From Tomasz Figa: Here is the Samsung PWM cleanup series. Particular patches of the series involve following modifications: - fixing up few things in samsung_pwm_timer clocksource driver, - moving remaining Samsung platforms to the new clocksource driver, - removing old clocksource driver, - adding new multiplatform- and DT-aware PWM driver, - moving all Samsung platforms to use the new PWM driver, - removing old PWM driver, - removing all PWM-related code that is not used anymore. * tag 'v3.12-pwm-cleanup-for-olof' of git://github.com/tom3q/linux: (684 commits) ARM: SAMSUNG: Remove plat/regs-timer.h header ARM: SAMSUNG: Remove remaining uses of plat/regs-timer.h header ARM: SAMSUNG: Remove pwm-clock infrastructure ARM: SAMSUNG: Remove old PWM timer platform devices pwm: Remove superseded pwm-samsung-legacy driver ARM: SAMSUNG: Modify board files to use new PWM platform device ARM: SAMSUNG: Rework private data handling in dev-backlight pwm: Add new pwm-samsung driver pwm: samsung: Rename to pwm-samsung-legacy ARM: SAMSUNG: Remove unused PWM timer IRQ chip code ARM: SAMSUNG: Remove old samsung-time driver ARM: SAMSUNG: Move all platforms to new clocksource driver ARM: SAMSUNG: Set PWM platform data ARM: SAMSUNG: Add new PWM platform device ARM: SAMSUNG: Unify base address definitions of timer block clocksource: samsung_pwm_timer: Handle suspend/resume correctly clocksource: samsung_pwm_timer: Do not use clocksource_mmio clocksource: samsung_pwm_timer: Cache clocksource register address clocksource: samsung_pwm_timer: Correct definition of AUTORELOAD bit clocksource: samsung_pwm_timer: Do not request PWM mem region + v3.11-rc4 Conflicts: arch/arm/Kconfig.debug Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch')
-rw-r--r--arch/alpha/Kconfig1
-rw-r--r--arch/alpha/include/asm/atomic.h88
-rw-r--r--arch/alpha/include/asm/param.h8
-rw-r--r--arch/alpha/include/asm/spinlock.h4
-rw-r--r--arch/alpha/include/asm/unistd.h3
-rw-r--r--arch/alpha/include/uapi/asm/param.h7
-rw-r--r--arch/alpha/include/uapi/asm/unistd.h2
-rw-r--r--arch/alpha/kernel/entry.S399
-rw-r--r--arch/alpha/kernel/irq_alpha.c2
-rw-r--r--arch/alpha/kernel/smp.c5
-rw-r--r--arch/alpha/kernel/sys_dp264.c8
-rw-r--r--arch/alpha/kernel/sys_marvel.c3
-rw-r--r--arch/alpha/kernel/systbls.S2
-rw-r--r--arch/alpha/kernel/time.c4
-rw-r--r--arch/alpha/kernel/traps.c8
-rw-r--r--arch/arc/include/asm/entry.h1
-rw-r--r--arch/arm/Kconfig18
-rw-r--r--arch/arm/Kconfig.debug14
-rw-r--r--arch/arm/Makefile18
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi22
-rw-r--r--arch/arm/boot/dts/imx28-apx4devkit.dts2
-rw-r--r--arch/arm/boot/dts/imx28-evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28-m28evk.dts2
-rw-r--r--arch/arm/boot/dts/imx28.dtsi1
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts13
-rw-r--r--arch/arm/boot/dts/imx53-mba53.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi32
-rw-r--r--arch/arm/boot/dts/prima2.dtsi16
-rw-r--r--arch/arm/boot/dts/stih416-pinctrl.dtsi10
-rw-r--r--arch/arm/boot/dts/stih416.dtsi2
-rw-r--r--arch/arm/boot/dts/twl4030.dtsi6
-rw-r--r--arch/arm/boot/dts/vf610.dtsi8
-rw-r--r--arch/arm/common/edma.c1
-rw-r--r--arch/arm/configs/da8xx_omapl_defconfig2
-rw-r--r--arch/arm/configs/davinci_all_defconfig2
-rw-r--r--arch/arm/configs/multi_v7_defconfig6
-rw-r--r--arch/arm/configs/nhk8815_defconfig7
-rw-r--r--arch/arm/include/asm/a.out-core.h45
-rw-r--r--arch/arm/include/asm/cputype.h7
-rw-r--r--arch/arm/include/asm/elf.h6
-rw-r--r--arch/arm/include/asm/mmu.h3
-rw-r--r--arch/arm/include/asm/mmu_context.h20
-rw-r--r--arch/arm/include/asm/page.h2
-rw-r--r--arch/arm/include/asm/processor.h4
-rw-r--r--arch/arm/include/asm/thread_info.h1
-rw-r--r--arch/arm/include/asm/tlbflush.h16
-rw-r--r--arch/arm/include/asm/virt.h12
-rw-r--r--arch/arm/include/uapi/asm/Kbuild1
-rw-r--r--arch/arm/include/uapi/asm/a.out.h34
-rw-r--r--arch/arm/kernel/entry-armv.S103
-rw-r--r--arch/arm/kernel/entry-v7m.S2
-rw-r--r--arch/arm/kernel/fiq.c19
-rw-r--r--arch/arm/kernel/head-nommu.S1
-rw-r--r--arch/arm/kernel/head.S1
-rw-r--r--arch/arm/kernel/hyp-stub.S4
-rw-r--r--arch/arm/kernel/process.c49
-rw-r--r--arch/arm/kernel/setup.c3
-rw-r--r--arch/arm/kernel/signal.c56
-rw-r--r--arch/arm/kernel/signal.h12
-rw-r--r--arch/arm/kernel/smp_tlb.c17
-rw-r--r--arch/arm/kernel/traps.c46
-rw-r--r--arch/arm/kernel/vmlinux.lds.S17
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/dm355.c2
-rw-r--r--arch/arm/mach-davinci/dm365.c2
-rw-r--r--arch/arm/mach-exynos/Kconfig1
-rw-r--r--arch/arm/mach-exynos/Makefile2
-rw-r--r--arch/arm/mach-exynos/common.c26
-rw-r--r--arch/arm/mach-exynos/common.h1
-rw-r--r--arch/arm/mach-exynos/cpuidle.c1
-rw-r--r--arch/arm/mach-exynos/include/mach/memory.h5
-rw-r--r--arch/arm/mach-exynos/pm.c6
-rw-r--r--arch/arm/mach-footbridge/dc21285.c2
-rw-r--r--arch/arm/mach-highbank/highbank.c7
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c5
-rw-r--r--arch/arm/mach-imx/clk-vf610.c2
-rw-r--r--arch/arm/mach-imx/mx27.h2
-rw-r--r--arch/arm/mach-keystone/keystone.c2
-rw-r--r--arch/arm/mach-omap2/Kconfig2
-rw-r--r--arch/arm/mach-omap2/board-generic.c23
-rw-r--r--arch/arm/mach-pxa/em-x270.c17
-rw-r--r--arch/arm/mach-pxa/mainstone.c3
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c3
-rw-r--r--arch/arm/mach-pxa/poodle.c4
-rw-r--r--arch/arm/mach-pxa/spitz.c4
-rw-r--r--arch/arm/mach-pxa/stargate2.c3
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig6
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2410.c162
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2412.c1
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2416.c2
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2440.c3
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2443.c2
-rw-r--r--arch/arm/mach-s3c24xx/common.c27
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/map.h2
-rw-r--r--arch/arm/mach-s3c24xx/mach-h1940.c4
-rw-r--r--arch/arm/mach-s3c24xx/mach-rx1950.c5
-rw-r--r--arch/arm/mach-s3c64xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c64xx/clock.c2
-rw-r--r--arch/arm/mach-s3c64xx/common.c32
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/irqs.h8
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h1
-rw-r--r--arch/arm/mach-s3c64xx/irq-pm.c2
-rw-r--r--arch/arm/mach-s3c64xx/mach-crag6410.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-hmt.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smartq.c4
-rw-r--r--arch/arm/mach-s3c64xx/mach-smdk6410.c5
-rw-r--r--arch/arm/mach-s5p64x0/Kconfig2
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6440.c2
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c2
-rw-r--r--arch/arm/mach-s5p64x0/common.c27
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/map.h1
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c5
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c5
-rw-r--r--arch/arm/mach-s5p64x0/pm.c3
-rw-r--r--arch/arm/mach-s5pc100/Kconfig1
-rw-r--r--arch/arm/mach-s5pc100/clock.c2
-rw-r--r--arch/arm/mach-s5pc100/common.c28
-rw-r--r--arch/arm/mach-s5pc100/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/map.h1
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c5
-rw-r--r--arch/arm/mach-s5pv210/Kconfig1
-rw-r--r--arch/arm/mach-s5pv210/clock.c1
-rw-r--r--arch/arm/mach-s5pv210/common.c28
-rw-r--r--arch/arm/mach-s5pv210/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/map.h1
-rw-r--r--arch/arm/mach-s5pv210/mach-smdkv210.c5
-rw-r--r--arch/arm/mach-s5pv210/pm.c10
-rw-r--r--arch/arm/mach-sti/Kconfig3
-rw-r--r--arch/arm/mach-zynq/common.c2
-rw-r--r--arch/arm/mm/Kconfig34
-rw-r--r--arch/arm/mm/context.c3
-rw-r--r--arch/arm/mm/mmu.c57
-rw-r--r--arch/arm/mm/proc-v7-2level.S2
-rw-r--r--arch/arm/mm/proc-v7-3level.S2
-rw-r--r--arch/arm/mm/proc-v7.S11
-rw-r--r--arch/arm/plat-samsung/Kconfig21
-rw-r--r--arch/arm/plat-samsung/Makefile5
-rw-r--r--arch/arm/plat-samsung/dev-backlight.c61
-rw-r--r--arch/arm/plat-samsung/devs.c42
-rw-r--r--arch/arm/plat-samsung/include/plat/clock.h9
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/irq-vic-timer.h13
-rw-r--r--arch/arm/plat-samsung/include/plat/irqs.h9
-rw-r--r--arch/arm/plat-samsung/include/plat/pm.h8
-rw-r--r--arch/arm/plat-samsung/include/plat/pwm-clock.h81
-rw-r--r--arch/arm/plat-samsung/include/plat/pwm-core.h22
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-timer.h124
-rw-r--r--arch/arm/plat-samsung/include/plat/samsung-time.h23
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c98
-rw-r--r--arch/arm/plat-samsung/pm.c14
-rw-r--r--arch/arm/plat-samsung/pwm-clock.c474
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c4
-rw-r--r--arch/arm/plat-samsung/samsung-time.c394
-rw-r--r--arch/arm/xen/enlighten.c2
-rw-r--r--arch/arm64/include/asm/thread_info.h4
-rw-r--r--arch/arm64/include/asm/virt.h13
-rw-r--r--arch/arm64/kernel/entry.S2
-rw-r--r--arch/arm64/kernel/process.c2
-rw-r--r--arch/ia64/configs/generic_defconfig2
-rw-r--r--arch/ia64/configs/gensparse_defconfig2
-rw-r--r--arch/ia64/configs/tiger_defconfig2
-rw-r--r--arch/ia64/configs/xen_domu_defconfig2
-rw-r--r--arch/mips/Kconfig1
-rw-r--r--arch/mips/bcm47xx/Kconfig1
-rw-r--r--arch/mips/include/asm/mach-generic/spaces.h4
-rw-r--r--arch/mips/include/uapi/asm/siginfo.h7
-rw-r--r--arch/mips/kernel/bmips_vec.S6
-rw-r--r--arch/mips/kernel/smp-bmips.c18
-rw-r--r--arch/mips/powertv/asic/asic_devices.c3
-rw-r--r--arch/parisc/configs/c8000_defconfig279
-rw-r--r--arch/parisc/include/asm/parisc-device.h3
-rw-r--r--arch/parisc/kernel/cache.c135
-rw-r--r--arch/parisc/kernel/inventory.c1
-rw-r--r--arch/parisc/kernel/signal.c7
-rw-r--r--arch/parisc/kernel/signal32.c1
-rw-r--r--arch/parisc/kernel/sys32.h36
-rw-r--r--arch/parisc/kernel/sys_parisc32.c2
-rw-r--r--arch/powerpc/configs/ppc64_defconfig2
-rw-r--r--arch/powerpc/configs/ppc64e_defconfig2
-rw-r--r--arch/powerpc/configs/pseries_defconfig2
-rw-r--r--arch/powerpc/include/asm/eeh.h30
-rw-r--r--arch/powerpc/include/asm/hw_irq.h7
-rw-r--r--arch/powerpc/include/asm/module.h5
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h1
-rw-r--r--arch/powerpc/include/asm/perf_event_server.h6
-rw-r--r--arch/powerpc/include/asm/reg.h3
-rw-r--r--arch/powerpc/include/asm/smp.h4
-rw-r--r--arch/powerpc/include/uapi/asm/Kbuild1
-rw-r--r--arch/powerpc/include/uapi/asm/perf_event.h18
-rw-r--r--arch/powerpc/kernel/cputable.c20
-rw-r--r--arch/powerpc/kernel/eeh.c70
-rw-r--r--arch/powerpc/kernel/eeh_cache.c18
-rw-r--r--arch/powerpc/kernel/eeh_driver.c77
-rw-r--r--arch/powerpc/kernel/eeh_pe.c58
-rw-r--r--arch/powerpc/kernel/eeh_sysfs.c21
-rw-r--r--arch/powerpc/kernel/irq.c2
-rw-r--r--arch/powerpc/kernel/pci-common.c2
-rw-r--r--arch/powerpc/kernel/pci-hotplug.c49
-rw-r--r--arch/powerpc/kernel/pci_of_scan.c56
-rw-r--r--arch/powerpc/kernel/prom_init.c5
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S3
-rw-r--r--arch/powerpc/mm/hash_native_64.c12
-rw-r--r--arch/powerpc/mm/numa.c59
-rw-r--r--arch/powerpc/perf/core-book3s.c7
-rw-r--r--arch/powerpc/perf/power8-pmu.c30
-rw-r--r--arch/powerpc/platforms/powernv/eeh-powernv.c17
-rw-r--r--arch/powerpc/platforms/powernv/pci-ioda.c2
-rw-r--r--arch/powerpc/platforms/pseries/Kconfig1
-rw-r--r--arch/powerpc/platforms/pseries/eeh_pseries.c67
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c2
-rw-r--r--arch/powerpc/platforms/pseries/ras.c3
-rw-r--r--arch/sh/configs/sh03_defconfig2
-rw-r--r--arch/x86/crypto/Makefile2
-rw-r--r--arch/x86/crypto/crct10dif-pcl-asm_64.S643
-rw-r--r--arch/x86/crypto/crct10dif-pclmul_glue.c151
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce-severity.c4
-rw-r--r--arch/x86/platform/ce4100/ce4100.c1
218 files changed, 2165 insertions, 3105 deletions
diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig
index 837a1f2d8b96..082d9b4b5472 100644
--- a/arch/alpha/Kconfig
+++ b/arch/alpha/Kconfig
@@ -15,6 +15,7 @@ config ALPHA
15 select ARCH_WANT_OPTIONAL_GPIOLIB 15 select ARCH_WANT_OPTIONAL_GPIOLIB
16 select ARCH_WANT_IPC_PARSE_VERSION 16 select ARCH_WANT_IPC_PARSE_VERSION
17 select ARCH_HAVE_NMI_SAFE_CMPXCHG 17 select ARCH_HAVE_NMI_SAFE_CMPXCHG
18 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
18 select GENERIC_SMP_IDLE_THREAD 19 select GENERIC_SMP_IDLE_THREAD
19 select GENERIC_CMOS_UPDATE 20 select GENERIC_CMOS_UPDATE
20 select GENERIC_STRNCPY_FROM_USER 21 select GENERIC_STRNCPY_FROM_USER
diff --git a/arch/alpha/include/asm/atomic.h b/arch/alpha/include/asm/atomic.h
index c2cbe4fc391c..78b03ef39f6f 100644
--- a/arch/alpha/include/asm/atomic.h
+++ b/arch/alpha/include/asm/atomic.h
@@ -186,17 +186,24 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
186 */ 186 */
187static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) 187static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
188{ 188{
189 int c, old; 189 int c, new, old;
190 c = atomic_read(v); 190 smp_mb();
191 for (;;) { 191 __asm__ __volatile__(
192 if (unlikely(c == (u))) 192 "1: ldl_l %[old],%[mem]\n"
193 break; 193 " cmpeq %[old],%[u],%[c]\n"
194 old = atomic_cmpxchg((v), c, c + (a)); 194 " addl %[old],%[a],%[new]\n"
195 if (likely(old == c)) 195 " bne %[c],2f\n"
196 break; 196 " stl_c %[new],%[mem]\n"
197 c = old; 197 " beq %[new],3f\n"
198 } 198 "2:\n"
199 return c; 199 ".subsection 2\n"
200 "3: br 1b\n"
201 ".previous"
202 : [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
203 : [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
204 : "memory");
205 smp_mb();
206 return old;
200} 207}
201 208
202 209
@@ -207,21 +214,56 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
207 * @u: ...unless v is equal to u. 214 * @u: ...unless v is equal to u.
208 * 215 *
209 * Atomically adds @a to @v, so long as it was not @u. 216 * Atomically adds @a to @v, so long as it was not @u.
210 * Returns the old value of @v. 217 * Returns true iff @v was not @u.
211 */ 218 */
212static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) 219static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
213{ 220{
214 long c, old; 221 long c, tmp;
215 c = atomic64_read(v); 222 smp_mb();
216 for (;;) { 223 __asm__ __volatile__(
217 if (unlikely(c == (u))) 224 "1: ldq_l %[tmp],%[mem]\n"
218 break; 225 " cmpeq %[tmp],%[u],%[c]\n"
219 old = atomic64_cmpxchg((v), c, c + (a)); 226 " addq %[tmp],%[a],%[tmp]\n"
220 if (likely(old == c)) 227 " bne %[c],2f\n"
221 break; 228 " stq_c %[tmp],%[mem]\n"
222 c = old; 229 " beq %[tmp],3f\n"
223 } 230 "2:\n"
224 return c != (u); 231 ".subsection 2\n"
232 "3: br 1b\n"
233 ".previous"
234 : [tmp] "=&r"(tmp), [c] "=&r"(c)
235 : [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
236 : "memory");
237 smp_mb();
238 return !c;
239}
240
241/*
242 * atomic64_dec_if_positive - decrement by 1 if old value positive
243 * @v: pointer of type atomic_t
244 *
245 * The function returns the old value of *v minus 1, even if
246 * the atomic variable, v, was not decremented.
247 */
248static inline long atomic64_dec_if_positive(atomic64_t *v)
249{
250 long old, tmp;
251 smp_mb();
252 __asm__ __volatile__(
253 "1: ldq_l %[old],%[mem]\n"
254 " subq %[old],1,%[tmp]\n"
255 " ble %[old],2f\n"
256 " stq_c %[tmp],%[mem]\n"
257 " beq %[tmp],3f\n"
258 "2:\n"
259 ".subsection 2\n"
260 "3: br 1b\n"
261 ".previous"
262 : [old] "=&r"(old), [tmp] "=&r"(tmp)
263 : [mem] "m"(*v)
264 : "memory");
265 smp_mb();
266 return old - 1;
225} 267}
226 268
227#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) 269#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
diff --git a/arch/alpha/include/asm/param.h b/arch/alpha/include/asm/param.h
index bf46af51941b..a5b68b268bcf 100644
--- a/arch/alpha/include/asm/param.h
+++ b/arch/alpha/include/asm/param.h
@@ -3,7 +3,9 @@
3 3
4#include <uapi/asm/param.h> 4#include <uapi/asm/param.h>
5 5
6#define HZ CONFIG_HZ 6# undef HZ
7#define USER_HZ HZ 7# define HZ CONFIG_HZ
8# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */ 8# define USER_HZ 1024
9# define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
10
9#endif /* _ASM_ALPHA_PARAM_H */ 11#endif /* _ASM_ALPHA_PARAM_H */
diff --git a/arch/alpha/include/asm/spinlock.h b/arch/alpha/include/asm/spinlock.h
index 3bba21e41b81..37b570d01202 100644
--- a/arch/alpha/include/asm/spinlock.h
+++ b/arch/alpha/include/asm/spinlock.h
@@ -168,8 +168,4 @@ static inline void arch_write_unlock(arch_rwlock_t * lock)
168#define arch_read_lock_flags(lock, flags) arch_read_lock(lock) 168#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
169#define arch_write_lock_flags(lock, flags) arch_write_lock(lock) 169#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
170 170
171#define arch_spin_relax(lock) cpu_relax()
172#define arch_read_relax(lock) cpu_relax()
173#define arch_write_relax(lock) cpu_relax()
174
175#endif /* _ALPHA_SPINLOCK_H */ 171#endif /* _ALPHA_SPINLOCK_H */
diff --git a/arch/alpha/include/asm/unistd.h b/arch/alpha/include/asm/unistd.h
index 43baee17acdf..f2c94402e2c8 100644
--- a/arch/alpha/include/asm/unistd.h
+++ b/arch/alpha/include/asm/unistd.h
@@ -3,8 +3,7 @@
3 3
4#include <uapi/asm/unistd.h> 4#include <uapi/asm/unistd.h>
5 5
6 6#define NR_SYSCALLS 508
7#define NR_SYSCALLS 506
8 7
9#define __ARCH_WANT_OLD_READDIR 8#define __ARCH_WANT_OLD_READDIR
10#define __ARCH_WANT_STAT64 9#define __ARCH_WANT_STAT64
diff --git a/arch/alpha/include/uapi/asm/param.h b/arch/alpha/include/uapi/asm/param.h
index 29daed819ebd..dbcd9834af6d 100644
--- a/arch/alpha/include/uapi/asm/param.h
+++ b/arch/alpha/include/uapi/asm/param.h
@@ -1,13 +1,7 @@
1#ifndef _UAPI_ASM_ALPHA_PARAM_H 1#ifndef _UAPI_ASM_ALPHA_PARAM_H
2#define _UAPI_ASM_ALPHA_PARAM_H 2#define _UAPI_ASM_ALPHA_PARAM_H
3 3
4/* ??? Gross. I don't want to parameterize this, and supposedly the
5 hardware ignores reprogramming. We also need userland buy-in to the
6 change in HZ, since this is visible in the wait4 resources etc. */
7
8#ifndef __KERNEL__
9#define HZ 1024 4#define HZ 1024
10#endif
11 5
12#define EXEC_PAGESIZE 8192 6#define EXEC_PAGESIZE 8192
13 7
@@ -17,5 +11,4 @@
17 11
18#define MAXHOSTNAMELEN 64 /* max length of hostname */ 12#define MAXHOSTNAMELEN 64 /* max length of hostname */
19 13
20
21#endif /* _UAPI_ASM_ALPHA_PARAM_H */ 14#endif /* _UAPI_ASM_ALPHA_PARAM_H */
diff --git a/arch/alpha/include/uapi/asm/unistd.h b/arch/alpha/include/uapi/asm/unistd.h
index 801d28bcea51..53ae7bb1bfd1 100644
--- a/arch/alpha/include/uapi/asm/unistd.h
+++ b/arch/alpha/include/uapi/asm/unistd.h
@@ -467,5 +467,7 @@
467#define __NR_sendmmsg 503 467#define __NR_sendmmsg 503
468#define __NR_process_vm_readv 504 468#define __NR_process_vm_readv 504
469#define __NR_process_vm_writev 505 469#define __NR_process_vm_writev 505
470#define __NR_kcmp 506
471#define __NR_finit_module 507
470 472
471#endif /* _UAPI_ALPHA_UNISTD_H */ 473#endif /* _UAPI_ALPHA_UNISTD_H */
diff --git a/arch/alpha/kernel/entry.S b/arch/alpha/kernel/entry.S
index f62a994ef126..a969b95ee5ac 100644
--- a/arch/alpha/kernel/entry.S
+++ b/arch/alpha/kernel/entry.S
@@ -12,11 +12,32 @@
12 12
13 .text 13 .text
14 .set noat 14 .set noat
15 .cfi_sections .debug_frame
15 16
16/* Stack offsets. */ 17/* Stack offsets. */
17#define SP_OFF 184 18#define SP_OFF 184
18#define SWITCH_STACK_SIZE 320 19#define SWITCH_STACK_SIZE 320
19 20
21.macro CFI_START_OSF_FRAME func
22 .align 4
23 .globl \func
24 .type \func,@function
25\func:
26 .cfi_startproc simple
27 .cfi_return_column 64
28 .cfi_def_cfa $sp, 48
29 .cfi_rel_offset 64, 8
30 .cfi_rel_offset $gp, 16
31 .cfi_rel_offset $16, 24
32 .cfi_rel_offset $17, 32
33 .cfi_rel_offset $18, 40
34.endm
35
36.macro CFI_END_OSF_FRAME func
37 .cfi_endproc
38 .size \func, . - \func
39.endm
40
20/* 41/*
21 * This defines the normal kernel pt-regs layout. 42 * This defines the normal kernel pt-regs layout.
22 * 43 *
@@ -27,100 +48,158 @@
27 * the palcode-provided values are available to the signal handler. 48 * the palcode-provided values are available to the signal handler.
28 */ 49 */
29 50
30#define SAVE_ALL \ 51.macro SAVE_ALL
31 subq $sp, SP_OFF, $sp; \ 52 subq $sp, SP_OFF, $sp
32 stq $0, 0($sp); \ 53 .cfi_adjust_cfa_offset SP_OFF
33 stq $1, 8($sp); \ 54 stq $0, 0($sp)
34 stq $2, 16($sp); \ 55 stq $1, 8($sp)
35 stq $3, 24($sp); \ 56 stq $2, 16($sp)
36 stq $4, 32($sp); \ 57 stq $3, 24($sp)
37 stq $28, 144($sp); \ 58 stq $4, 32($sp)
38 lda $2, alpha_mv; \ 59 stq $28, 144($sp)
39 stq $5, 40($sp); \ 60 .cfi_rel_offset $0, 0
40 stq $6, 48($sp); \ 61 .cfi_rel_offset $1, 8
41 stq $7, 56($sp); \ 62 .cfi_rel_offset $2, 16
42 stq $8, 64($sp); \ 63 .cfi_rel_offset $3, 24
43 stq $19, 72($sp); \ 64 .cfi_rel_offset $4, 32
44 stq $20, 80($sp); \ 65 .cfi_rel_offset $28, 144
45 stq $21, 88($sp); \ 66 lda $2, alpha_mv
46 ldq $2, HAE_CACHE($2); \ 67 stq $5, 40($sp)
47 stq $22, 96($sp); \ 68 stq $6, 48($sp)
48 stq $23, 104($sp); \ 69 stq $7, 56($sp)
49 stq $24, 112($sp); \ 70 stq $8, 64($sp)
50 stq $25, 120($sp); \ 71 stq $19, 72($sp)
51 stq $26, 128($sp); \ 72 stq $20, 80($sp)
52 stq $27, 136($sp); \ 73 stq $21, 88($sp)
53 stq $2, 152($sp); \ 74 ldq $2, HAE_CACHE($2)
54 stq $16, 160($sp); \ 75 stq $22, 96($sp)
55 stq $17, 168($sp); \ 76 stq $23, 104($sp)
77 stq $24, 112($sp)
78 stq $25, 120($sp)
79 stq $26, 128($sp)
80 stq $27, 136($sp)
81 stq $2, 152($sp)
82 stq $16, 160($sp)
83 stq $17, 168($sp)
56 stq $18, 176($sp) 84 stq $18, 176($sp)
85 .cfi_rel_offset $5, 40
86 .cfi_rel_offset $6, 48
87 .cfi_rel_offset $7, 56
88 .cfi_rel_offset $8, 64
89 .cfi_rel_offset $19, 72
90 .cfi_rel_offset $20, 80
91 .cfi_rel_offset $21, 88
92 .cfi_rel_offset $22, 96
93 .cfi_rel_offset $23, 104
94 .cfi_rel_offset $24, 112
95 .cfi_rel_offset $25, 120
96 .cfi_rel_offset $26, 128
97 .cfi_rel_offset $27, 136
98.endm
57 99
58#define RESTORE_ALL \ 100.macro RESTORE_ALL
59 lda $19, alpha_mv; \ 101 lda $19, alpha_mv
60 ldq $0, 0($sp); \ 102 ldq $0, 0($sp)
61 ldq $1, 8($sp); \ 103 ldq $1, 8($sp)
62 ldq $2, 16($sp); \ 104 ldq $2, 16($sp)
63 ldq $3, 24($sp); \ 105 ldq $3, 24($sp)
64 ldq $21, 152($sp); \ 106 ldq $21, 152($sp)
65 ldq $20, HAE_CACHE($19); \ 107 ldq $20, HAE_CACHE($19)
66 ldq $4, 32($sp); \ 108 ldq $4, 32($sp)
67 ldq $5, 40($sp); \ 109 ldq $5, 40($sp)
68 ldq $6, 48($sp); \ 110 ldq $6, 48($sp)
69 ldq $7, 56($sp); \ 111 ldq $7, 56($sp)
70 subq $20, $21, $20; \ 112 subq $20, $21, $20
71 ldq $8, 64($sp); \ 113 ldq $8, 64($sp)
72 beq $20, 99f; \ 114 beq $20, 99f
73 ldq $20, HAE_REG($19); \ 115 ldq $20, HAE_REG($19)
74 stq $21, HAE_CACHE($19); \ 116 stq $21, HAE_CACHE($19)
75 stq $21, 0($20); \ 117 stq $21, 0($20)
7699:; \ 11899: ldq $19, 72($sp)
77 ldq $19, 72($sp); \ 119 ldq $20, 80($sp)
78 ldq $20, 80($sp); \ 120 ldq $21, 88($sp)
79 ldq $21, 88($sp); \ 121 ldq $22, 96($sp)
80 ldq $22, 96($sp); \ 122 ldq $23, 104($sp)
81 ldq $23, 104($sp); \ 123 ldq $24, 112($sp)
82 ldq $24, 112($sp); \ 124 ldq $25, 120($sp)
83 ldq $25, 120($sp); \ 125 ldq $26, 128($sp)
84 ldq $26, 128($sp); \ 126 ldq $27, 136($sp)
85 ldq $27, 136($sp); \ 127 ldq $28, 144($sp)
86 ldq $28, 144($sp); \
87 addq $sp, SP_OFF, $sp 128 addq $sp, SP_OFF, $sp
129 .cfi_restore $0
130 .cfi_restore $1
131 .cfi_restore $2
132 .cfi_restore $3
133 .cfi_restore $4
134 .cfi_restore $5
135 .cfi_restore $6
136 .cfi_restore $7
137 .cfi_restore $8
138 .cfi_restore $19
139 .cfi_restore $20
140 .cfi_restore $21
141 .cfi_restore $22
142 .cfi_restore $23
143 .cfi_restore $24
144 .cfi_restore $25
145 .cfi_restore $26
146 .cfi_restore $27
147 .cfi_restore $28
148 .cfi_adjust_cfa_offset -SP_OFF
149.endm
150
151.macro DO_SWITCH_STACK
152 bsr $1, do_switch_stack
153 .cfi_adjust_cfa_offset SWITCH_STACK_SIZE
154 .cfi_rel_offset $9, 0
155 .cfi_rel_offset $10, 8
156 .cfi_rel_offset $11, 16
157 .cfi_rel_offset $12, 24
158 .cfi_rel_offset $13, 32
159 .cfi_rel_offset $14, 40
160 .cfi_rel_offset $15, 48
161 /* We don't really care about the FP registers for debugging. */
162.endm
163
164.macro UNDO_SWITCH_STACK
165 bsr $1, undo_switch_stack
166 .cfi_restore $9
167 .cfi_restore $10
168 .cfi_restore $11
169 .cfi_restore $12
170 .cfi_restore $13
171 .cfi_restore $14
172 .cfi_restore $15
173 .cfi_adjust_cfa_offset -SWITCH_STACK_SIZE
174.endm
88 175
89/* 176/*
90 * Non-syscall kernel entry points. 177 * Non-syscall kernel entry points.
91 */ 178 */
92 179
93 .align 4 180CFI_START_OSF_FRAME entInt
94 .globl entInt
95 .ent entInt
96entInt:
97 SAVE_ALL 181 SAVE_ALL
98 lda $8, 0x3fff 182 lda $8, 0x3fff
99 lda $26, ret_from_sys_call 183 lda $26, ret_from_sys_call
100 bic $sp, $8, $8 184 bic $sp, $8, $8
101 mov $sp, $19 185 mov $sp, $19
102 jsr $31, do_entInt 186 jsr $31, do_entInt
103.end entInt 187CFI_END_OSF_FRAME entInt
104 188
105 .align 4 189CFI_START_OSF_FRAME entArith
106 .globl entArith
107 .ent entArith
108entArith:
109 SAVE_ALL 190 SAVE_ALL
110 lda $8, 0x3fff 191 lda $8, 0x3fff
111 lda $26, ret_from_sys_call 192 lda $26, ret_from_sys_call
112 bic $sp, $8, $8 193 bic $sp, $8, $8
113 mov $sp, $18 194 mov $sp, $18
114 jsr $31, do_entArith 195 jsr $31, do_entArith
115.end entArith 196CFI_END_OSF_FRAME entArith
116 197
117 .align 4 198CFI_START_OSF_FRAME entMM
118 .globl entMM
119 .ent entMM
120entMM:
121 SAVE_ALL 199 SAVE_ALL
122/* save $9 - $15 so the inline exception code can manipulate them. */ 200/* save $9 - $15 so the inline exception code can manipulate them. */
123 subq $sp, 56, $sp 201 subq $sp, 56, $sp
202 .cfi_adjust_cfa_offset 56
124 stq $9, 0($sp) 203 stq $9, 0($sp)
125 stq $10, 8($sp) 204 stq $10, 8($sp)
126 stq $11, 16($sp) 205 stq $11, 16($sp)
@@ -128,6 +207,13 @@ entMM:
128 stq $13, 32($sp) 207 stq $13, 32($sp)
129 stq $14, 40($sp) 208 stq $14, 40($sp)
130 stq $15, 48($sp) 209 stq $15, 48($sp)
210 .cfi_rel_offset $9, 0
211 .cfi_rel_offset $10, 8
212 .cfi_rel_offset $11, 16
213 .cfi_rel_offset $12, 24
214 .cfi_rel_offset $13, 32
215 .cfi_rel_offset $14, 40
216 .cfi_rel_offset $15, 48
131 addq $sp, 56, $19 217 addq $sp, 56, $19
132/* handle the fault */ 218/* handle the fault */
133 lda $8, 0x3fff 219 lda $8, 0x3fff
@@ -142,28 +228,33 @@ entMM:
142 ldq $14, 40($sp) 228 ldq $14, 40($sp)
143 ldq $15, 48($sp) 229 ldq $15, 48($sp)
144 addq $sp, 56, $sp 230 addq $sp, 56, $sp
231 .cfi_restore $9
232 .cfi_restore $10
233 .cfi_restore $11
234 .cfi_restore $12
235 .cfi_restore $13
236 .cfi_restore $14
237 .cfi_restore $15
238 .cfi_adjust_cfa_offset -56
145/* finish up the syscall as normal. */ 239/* finish up the syscall as normal. */
146 br ret_from_sys_call 240 br ret_from_sys_call
147.end entMM 241CFI_END_OSF_FRAME entMM
148 242
149 .align 4 243CFI_START_OSF_FRAME entIF
150 .globl entIF
151 .ent entIF
152entIF:
153 SAVE_ALL 244 SAVE_ALL
154 lda $8, 0x3fff 245 lda $8, 0x3fff
155 lda $26, ret_from_sys_call 246 lda $26, ret_from_sys_call
156 bic $sp, $8, $8 247 bic $sp, $8, $8
157 mov $sp, $17 248 mov $sp, $17
158 jsr $31, do_entIF 249 jsr $31, do_entIF
159.end entIF 250CFI_END_OSF_FRAME entIF
160 251
161 .align 4 252CFI_START_OSF_FRAME entUna
162 .globl entUna
163 .ent entUna
164entUna:
165 lda $sp, -256($sp) 253 lda $sp, -256($sp)
254 .cfi_adjust_cfa_offset 256
166 stq $0, 0($sp) 255 stq $0, 0($sp)
256 .cfi_rel_offset $0, 0
257 .cfi_remember_state
167 ldq $0, 256($sp) /* get PS */ 258 ldq $0, 256($sp) /* get PS */
168 stq $1, 8($sp) 259 stq $1, 8($sp)
169 stq $2, 16($sp) 260 stq $2, 16($sp)
@@ -195,6 +286,32 @@ entUna:
195 stq $28, 224($sp) 286 stq $28, 224($sp)
196 mov $sp, $19 287 mov $sp, $19
197 stq $gp, 232($sp) 288 stq $gp, 232($sp)
289 .cfi_rel_offset $1, 1*8
290 .cfi_rel_offset $2, 2*8
291 .cfi_rel_offset $3, 3*8
292 .cfi_rel_offset $4, 4*8
293 .cfi_rel_offset $5, 5*8
294 .cfi_rel_offset $6, 6*8
295 .cfi_rel_offset $7, 7*8
296 .cfi_rel_offset $8, 8*8
297 .cfi_rel_offset $9, 9*8
298 .cfi_rel_offset $10, 10*8
299 .cfi_rel_offset $11, 11*8
300 .cfi_rel_offset $12, 12*8
301 .cfi_rel_offset $13, 13*8
302 .cfi_rel_offset $14, 14*8
303 .cfi_rel_offset $15, 15*8
304 .cfi_rel_offset $19, 19*8
305 .cfi_rel_offset $20, 20*8
306 .cfi_rel_offset $21, 21*8
307 .cfi_rel_offset $22, 22*8
308 .cfi_rel_offset $23, 23*8
309 .cfi_rel_offset $24, 24*8
310 .cfi_rel_offset $25, 25*8
311 .cfi_rel_offset $26, 26*8
312 .cfi_rel_offset $27, 27*8
313 .cfi_rel_offset $28, 28*8
314 .cfi_rel_offset $29, 29*8
198 lda $8, 0x3fff 315 lda $8, 0x3fff
199 stq $31, 248($sp) 316 stq $31, 248($sp)
200 bic $sp, $8, $8 317 bic $sp, $8, $8
@@ -228,16 +345,45 @@ entUna:
228 ldq $28, 224($sp) 345 ldq $28, 224($sp)
229 ldq $gp, 232($sp) 346 ldq $gp, 232($sp)
230 lda $sp, 256($sp) 347 lda $sp, 256($sp)
348 .cfi_restore $1
349 .cfi_restore $2
350 .cfi_restore $3
351 .cfi_restore $4
352 .cfi_restore $5
353 .cfi_restore $6
354 .cfi_restore $7
355 .cfi_restore $8
356 .cfi_restore $9
357 .cfi_restore $10
358 .cfi_restore $11
359 .cfi_restore $12
360 .cfi_restore $13
361 .cfi_restore $14
362 .cfi_restore $15
363 .cfi_restore $19
364 .cfi_restore $20
365 .cfi_restore $21
366 .cfi_restore $22
367 .cfi_restore $23
368 .cfi_restore $24
369 .cfi_restore $25
370 .cfi_restore $26
371 .cfi_restore $27
372 .cfi_restore $28
373 .cfi_restore $29
374 .cfi_adjust_cfa_offset -256
231 call_pal PAL_rti 375 call_pal PAL_rti
232.end entUna
233 376
234 .align 4 377 .align 4
235 .ent entUnaUser
236entUnaUser: 378entUnaUser:
379 .cfi_restore_state
237 ldq $0, 0($sp) /* restore original $0 */ 380 ldq $0, 0($sp) /* restore original $0 */
238 lda $sp, 256($sp) /* pop entUna's stack frame */ 381 lda $sp, 256($sp) /* pop entUna's stack frame */
382 .cfi_restore $0
383 .cfi_adjust_cfa_offset -256
239 SAVE_ALL /* setup normal kernel stack */ 384 SAVE_ALL /* setup normal kernel stack */
240 lda $sp, -56($sp) 385 lda $sp, -56($sp)
386 .cfi_adjust_cfa_offset 56
241 stq $9, 0($sp) 387 stq $9, 0($sp)
242 stq $10, 8($sp) 388 stq $10, 8($sp)
243 stq $11, 16($sp) 389 stq $11, 16($sp)
@@ -245,6 +391,13 @@ entUnaUser:
245 stq $13, 32($sp) 391 stq $13, 32($sp)
246 stq $14, 40($sp) 392 stq $14, 40($sp)
247 stq $15, 48($sp) 393 stq $15, 48($sp)
394 .cfi_rel_offset $9, 0
395 .cfi_rel_offset $10, 8
396 .cfi_rel_offset $11, 16
397 .cfi_rel_offset $12, 24
398 .cfi_rel_offset $13, 32
399 .cfi_rel_offset $14, 40
400 .cfi_rel_offset $15, 48
248 lda $8, 0x3fff 401 lda $8, 0x3fff
249 addq $sp, 56, $19 402 addq $sp, 56, $19
250 bic $sp, $8, $8 403 bic $sp, $8, $8
@@ -257,20 +410,25 @@ entUnaUser:
257 ldq $14, 40($sp) 410 ldq $14, 40($sp)
258 ldq $15, 48($sp) 411 ldq $15, 48($sp)
259 lda $sp, 56($sp) 412 lda $sp, 56($sp)
413 .cfi_restore $9
414 .cfi_restore $10
415 .cfi_restore $11
416 .cfi_restore $12
417 .cfi_restore $13
418 .cfi_restore $14
419 .cfi_restore $15
420 .cfi_adjust_cfa_offset -56
260 br ret_from_sys_call 421 br ret_from_sys_call
261.end entUnaUser 422CFI_END_OSF_FRAME entUna
262 423
263 .align 4 424CFI_START_OSF_FRAME entDbg
264 .globl entDbg
265 .ent entDbg
266entDbg:
267 SAVE_ALL 425 SAVE_ALL
268 lda $8, 0x3fff 426 lda $8, 0x3fff
269 lda $26, ret_from_sys_call 427 lda $26, ret_from_sys_call
270 bic $sp, $8, $8 428 bic $sp, $8, $8
271 mov $sp, $16 429 mov $sp, $16
272 jsr $31, do_entDbg 430 jsr $31, do_entDbg
273.end entDbg 431CFI_END_OSF_FRAME entDbg
274 432
275/* 433/*
276 * The system call entry point is special. Most importantly, it looks 434 * The system call entry point is special. Most importantly, it looks
@@ -285,8 +443,12 @@ entDbg:
285 443
286 .align 4 444 .align 4
287 .globl entSys 445 .globl entSys
288 .globl ret_from_sys_call 446 .type entSys, @function
289 .ent entSys 447 .cfi_startproc simple
448 .cfi_return_column 64
449 .cfi_def_cfa $sp, 48
450 .cfi_rel_offset 64, 8
451 .cfi_rel_offset $gp, 16
290entSys: 452entSys:
291 SAVE_ALL 453 SAVE_ALL
292 lda $8, 0x3fff 454 lda $8, 0x3fff
@@ -300,6 +462,9 @@ entSys:
300 stq $17, SP_OFF+32($sp) 462 stq $17, SP_OFF+32($sp)
301 s8addq $0, $5, $5 463 s8addq $0, $5, $5
302 stq $18, SP_OFF+40($sp) 464 stq $18, SP_OFF+40($sp)
465 .cfi_rel_offset $16, SP_OFF+24
466 .cfi_rel_offset $17, SP_OFF+32
467 .cfi_rel_offset $18, SP_OFF+40
303 blbs $3, strace 468 blbs $3, strace
304 beq $4, 1f 469 beq $4, 1f
305 ldq $27, 0($5) 470 ldq $27, 0($5)
@@ -310,6 +475,7 @@ entSys:
310 stq $31, 72($sp) /* a3=0 => no error */ 475 stq $31, 72($sp) /* a3=0 => no error */
311 476
312 .align 4 477 .align 4
478 .globl ret_from_sys_call
313ret_from_sys_call: 479ret_from_sys_call:
314 cmovne $26, 0, $18 /* $18 = 0 => non-restartable */ 480 cmovne $26, 0, $18 /* $18 = 0 => non-restartable */
315 ldq $0, SP_OFF($sp) 481 ldq $0, SP_OFF($sp)
@@ -324,10 +490,12 @@ ret_to_user:
324 and $17, _TIF_WORK_MASK, $2 490 and $17, _TIF_WORK_MASK, $2
325 bne $2, work_pending 491 bne $2, work_pending
326restore_all: 492restore_all:
493 .cfi_remember_state
327 RESTORE_ALL 494 RESTORE_ALL
328 call_pal PAL_rti 495 call_pal PAL_rti
329 496
330ret_to_kernel: 497ret_to_kernel:
498 .cfi_restore_state
331 lda $16, 7 499 lda $16, 7
332 call_pal PAL_swpipl 500 call_pal PAL_swpipl
333 br restore_all 501 br restore_all
@@ -356,7 +524,6 @@ $ret_success:
356 stq $0, 0($sp) 524 stq $0, 0($sp)
357 stq $31, 72($sp) /* a3=0 => no error */ 525 stq $31, 72($sp) /* a3=0 => no error */
358 br ret_from_sys_call 526 br ret_from_sys_call
359.end entSys
360 527
361/* 528/*
362 * Do all cleanup when returning from all interrupts and system calls. 529 * Do all cleanup when returning from all interrupts and system calls.
@@ -370,7 +537,7 @@ $ret_success:
370 */ 537 */
371 538
372 .align 4 539 .align 4
373 .ent work_pending 540 .type work_pending, @function
374work_pending: 541work_pending:
375 and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2 542 and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
376 bne $2, $work_notifysig 543 bne $2, $work_notifysig
@@ -387,23 +554,22 @@ $work_resched:
387 554
388$work_notifysig: 555$work_notifysig:
389 mov $sp, $16 556 mov $sp, $16
390 bsr $1, do_switch_stack 557 DO_SWITCH_STACK
391 jsr $26, do_work_pending 558 jsr $26, do_work_pending
392 bsr $1, undo_switch_stack 559 UNDO_SWITCH_STACK
393 br restore_all 560 br restore_all
394.end work_pending
395 561
396/* 562/*
397 * PTRACE syscall handler 563 * PTRACE syscall handler
398 */ 564 */
399 565
400 .align 4 566 .align 4
401 .ent strace 567 .type strace, @function
402strace: 568strace:
403 /* set up signal stack, call syscall_trace */ 569 /* set up signal stack, call syscall_trace */
404 bsr $1, do_switch_stack 570 DO_SWITCH_STACK
405 jsr $26, syscall_trace_enter /* returns the syscall number */ 571 jsr $26, syscall_trace_enter /* returns the syscall number */
406 bsr $1, undo_switch_stack 572 UNDO_SWITCH_STACK
407 573
408 /* get the arguments back.. */ 574 /* get the arguments back.. */
409 ldq $16, SP_OFF+24($sp) 575 ldq $16, SP_OFF+24($sp)
@@ -431,9 +597,9 @@ ret_from_straced:
431$strace_success: 597$strace_success:
432 stq $0, 0($sp) /* save return value */ 598 stq $0, 0($sp) /* save return value */
433 599
434 bsr $1, do_switch_stack 600 DO_SWITCH_STACK
435 jsr $26, syscall_trace_leave 601 jsr $26, syscall_trace_leave
436 bsr $1, undo_switch_stack 602 UNDO_SWITCH_STACK
437 br $31, ret_from_sys_call 603 br $31, ret_from_sys_call
438 604
439 .align 3 605 .align 3
@@ -447,26 +613,31 @@ $strace_error:
447 stq $0, 0($sp) 613 stq $0, 0($sp)
448 stq $1, 72($sp) /* a3 for return */ 614 stq $1, 72($sp) /* a3 for return */
449 615
450 bsr $1, do_switch_stack 616 DO_SWITCH_STACK
451 mov $18, $9 /* save old syscall number */ 617 mov $18, $9 /* save old syscall number */
452 mov $19, $10 /* save old a3 */ 618 mov $19, $10 /* save old a3 */
453 jsr $26, syscall_trace_leave 619 jsr $26, syscall_trace_leave
454 mov $9, $18 620 mov $9, $18
455 mov $10, $19 621 mov $10, $19
456 bsr $1, undo_switch_stack 622 UNDO_SWITCH_STACK
457 623
458 mov $31, $26 /* tell "ret_from_sys_call" we can restart */ 624 mov $31, $26 /* tell "ret_from_sys_call" we can restart */
459 br ret_from_sys_call 625 br ret_from_sys_call
460.end strace 626CFI_END_OSF_FRAME entSys
461 627
462/* 628/*
463 * Save and restore the switch stack -- aka the balance of the user context. 629 * Save and restore the switch stack -- aka the balance of the user context.
464 */ 630 */
465 631
466 .align 4 632 .align 4
467 .ent do_switch_stack 633 .type do_switch_stack, @function
634 .cfi_startproc simple
635 .cfi_return_column 64
636 .cfi_def_cfa $sp, 0
637 .cfi_register 64, $1
468do_switch_stack: 638do_switch_stack:
469 lda $sp, -SWITCH_STACK_SIZE($sp) 639 lda $sp, -SWITCH_STACK_SIZE($sp)
640 .cfi_adjust_cfa_offset SWITCH_STACK_SIZE
470 stq $9, 0($sp) 641 stq $9, 0($sp)
471 stq $10, 8($sp) 642 stq $10, 8($sp)
472 stq $11, 16($sp) 643 stq $11, 16($sp)
@@ -510,10 +681,14 @@ do_switch_stack:
510 stt $f0, 312($sp) # save fpcr in slot of $f31 681 stt $f0, 312($sp) # save fpcr in slot of $f31
511 ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state. 682 ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state.
512 ret $31, ($1), 1 683 ret $31, ($1), 1
513.end do_switch_stack 684 .cfi_endproc
685 .size do_switch_stack, .-do_switch_stack
514 686
515 .align 4 687 .align 4
516 .ent undo_switch_stack 688 .type undo_switch_stack, @function
689 .cfi_startproc simple
690 .cfi_def_cfa $sp, 0
691 .cfi_register 64, $1
517undo_switch_stack: 692undo_switch_stack:
518 ldq $9, 0($sp) 693 ldq $9, 0($sp)
519 ldq $10, 8($sp) 694 ldq $10, 8($sp)
@@ -558,7 +733,8 @@ undo_switch_stack:
558 ldt $f30, 304($sp) 733 ldt $f30, 304($sp)
559 lda $sp, SWITCH_STACK_SIZE($sp) 734 lda $sp, SWITCH_STACK_SIZE($sp)
560 ret $31, ($1), 1 735 ret $31, ($1), 1
561.end undo_switch_stack 736 .cfi_endproc
737 .size undo_switch_stack, .-undo_switch_stack
562 738
563/* 739/*
564 * The meat of the context switch code. 740 * The meat of the context switch code.
@@ -566,17 +742,18 @@ undo_switch_stack:
566 742
567 .align 4 743 .align 4
568 .globl alpha_switch_to 744 .globl alpha_switch_to
569 .ent alpha_switch_to 745 .type alpha_switch_to, @function
746 .cfi_startproc
570alpha_switch_to: 747alpha_switch_to:
571 .prologue 0 748 DO_SWITCH_STACK
572 bsr $1, do_switch_stack
573 call_pal PAL_swpctx 749 call_pal PAL_swpctx
574 lda $8, 0x3fff 750 lda $8, 0x3fff
575 bsr $1, undo_switch_stack 751 UNDO_SWITCH_STACK
576 bic $sp, $8, $8 752 bic $sp, $8, $8
577 mov $17, $0 753 mov $17, $0
578 ret 754 ret
579.end alpha_switch_to 755 .cfi_endproc
756 .size alpha_switch_to, .-alpha_switch_to
580 757
581/* 758/*
582 * New processes begin life here. 759 * New processes begin life here.
diff --git a/arch/alpha/kernel/irq_alpha.c b/arch/alpha/kernel/irq_alpha.c
index f433fc11877a..28e4429596f3 100644
--- a/arch/alpha/kernel/irq_alpha.c
+++ b/arch/alpha/kernel/irq_alpha.c
@@ -236,7 +236,7 @@ void __init
236init_rtc_irq(void) 236init_rtc_irq(void)
237{ 237{
238 irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip, 238 irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
239 handle_simple_irq, "RTC"); 239 handle_percpu_irq, "RTC");
240 setup_irq(RTC_IRQ, &timer_irqaction); 240 setup_irq(RTC_IRQ, &timer_irqaction);
241} 241}
242 242
diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
index 53b18a620e1c..9dbbcb3b9146 100644
--- a/arch/alpha/kernel/smp.c
+++ b/arch/alpha/kernel/smp.c
@@ -264,9 +264,10 @@ recv_secondary_console_msg(void)
264 if (cnt <= 0 || cnt >= 80) 264 if (cnt <= 0 || cnt >= 80)
265 strcpy(buf, "<<< BOGUS MSG >>>"); 265 strcpy(buf, "<<< BOGUS MSG >>>");
266 else { 266 else {
267 cp1 = (char *) &cpu->ipc_buffer[11]; 267 cp1 = (char *) &cpu->ipc_buffer[1];
268 cp2 = buf; 268 cp2 = buf;
269 strcpy(cp2, cp1); 269 memcpy(cp2, cp1, cnt);
270 cp2[cnt] = '\0';
270 271
271 while ((cp2 = strchr(cp2, '\r')) != 0) { 272 while ((cp2 = strchr(cp2, '\r')) != 0) {
272 *cp2 = ' '; 273 *cp2 = ' ';
diff --git a/arch/alpha/kernel/sys_dp264.c b/arch/alpha/kernel/sys_dp264.c
index 5bf401f7ea97..6c35159bc00e 100644
--- a/arch/alpha/kernel/sys_dp264.c
+++ b/arch/alpha/kernel/sys_dp264.c
@@ -190,9 +190,6 @@ static struct irq_chip clipper_irq_type = {
190static void 190static void
191dp264_device_interrupt(unsigned long vector) 191dp264_device_interrupt(unsigned long vector)
192{ 192{
193#if 1
194 printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
195#else
196 unsigned long pld; 193 unsigned long pld;
197 unsigned int i; 194 unsigned int i;
198 195
@@ -210,12 +207,7 @@ dp264_device_interrupt(unsigned long vector)
210 isa_device_interrupt(vector); 207 isa_device_interrupt(vector);
211 else 208 else
212 handle_irq(16 + i); 209 handle_irq(16 + i);
213#if 0
214 TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
215 tmp = TSUNAMI_cchip->dir0.csr;
216#endif
217 } 210 }
218#endif
219} 211}
220 212
221static void 213static void
diff --git a/arch/alpha/kernel/sys_marvel.c b/arch/alpha/kernel/sys_marvel.c
index 407accc80877..c92e389ff219 100644
--- a/arch/alpha/kernel/sys_marvel.c
+++ b/arch/alpha/kernel/sys_marvel.c
@@ -317,8 +317,9 @@ marvel_init_irq(void)
317} 317}
318 318
319static int 319static int
320marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 320marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
321{ 321{
322 struct pci_dev *dev = (struct pci_dev *)cdev;
322 struct pci_controller *hose = dev->sysdata; 323 struct pci_controller *hose = dev->sysdata;
323 struct io7_port *io7_port = hose->sysdata; 324 struct io7_port *io7_port = hose->sysdata;
324 struct io7 *io7 = io7_port->io7; 325 struct io7 *io7 = io7_port->io7;
diff --git a/arch/alpha/kernel/systbls.S b/arch/alpha/kernel/systbls.S
index 4284ec798ec9..dca9b3fb0071 100644
--- a/arch/alpha/kernel/systbls.S
+++ b/arch/alpha/kernel/systbls.S
@@ -524,6 +524,8 @@ sys_call_table:
524 .quad sys_sendmmsg 524 .quad sys_sendmmsg
525 .quad sys_process_vm_readv 525 .quad sys_process_vm_readv
526 .quad sys_process_vm_writev /* 505 */ 526 .quad sys_process_vm_writev /* 505 */
527 .quad sys_kcmp
528 .quad sys_finit_module
527 529
528 .size sys_call_table, . - sys_call_table 530 .size sys_call_table, . - sys_call_table
529 .type sys_call_table, @object 531 .type sys_call_table, @object
diff --git a/arch/alpha/kernel/time.c b/arch/alpha/kernel/time.c
index e336694ca042..ea3395036556 100644
--- a/arch/alpha/kernel/time.c
+++ b/arch/alpha/kernel/time.c
@@ -105,9 +105,7 @@ void arch_irq_work_raise(void)
105 105
106static inline __u32 rpcc(void) 106static inline __u32 rpcc(void)
107{ 107{
108 __u32 result; 108 return __builtin_alpha_rpcc();
109 asm volatile ("rpcc %0" : "=r"(result));
110 return result;
111} 109}
112 110
113int update_persistent_clock(struct timespec now) 111int update_persistent_clock(struct timespec now)
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index be1fba334bd0..bd0665cdc840 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -66,8 +66,8 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
66{ 66{
67 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", 67 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
68 regs->pc, regs->r26, regs->ps, print_tainted()); 68 regs->pc, regs->r26, regs->ps, print_tainted());
69 print_symbol("pc is at %s\n", regs->pc); 69 printk("pc is at %pSR\n", (void *)regs->pc);
70 print_symbol("ra is at %s\n", regs->r26 ); 70 printk("ra is at %pSR\n", (void *)regs->r26);
71 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", 71 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
72 regs->r0, regs->r1, regs->r2); 72 regs->r0, regs->r1, regs->r2);
73 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", 73 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
@@ -132,9 +132,7 @@ dik_show_trace(unsigned long *sp)
132 continue; 132 continue;
133 if (tmp >= (unsigned long) &_etext) 133 if (tmp >= (unsigned long) &_etext)
134 continue; 134 continue;
135 printk("[<%lx>]", tmp); 135 printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
136 print_symbol(" %s", tmp);
137 printk("\n");
138 if (i > 40) { 136 if (i > 40) {
139 printk(" ..."); 137 printk(" ...");
140 break; 138 break;
diff --git a/arch/arc/include/asm/entry.h b/arch/arc/include/asm/entry.h
index 8943c028d4bb..df57611652e5 100644
--- a/arch/arc/include/asm/entry.h
+++ b/arch/arc/include/asm/entry.h
@@ -38,6 +38,7 @@
38#include <asm/ptrace.h> 38#include <asm/ptrace.h>
39#include <asm/processor.h> /* For VMALLOC_START */ 39#include <asm/processor.h> /* For VMALLOC_START */
40#include <asm/thread_info.h> /* For THREAD_SIZE */ 40#include <asm/thread_info.h> /* For THREAD_SIZE */
41#include <asm/mmu.h>
41 42
42/* Note on the LD/ST addr modes with addr reg wback 43/* Note on the LD/ST addr modes with addr reg wback
43 * 44 *
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 944fd5ae44cb..39119d64287c 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -20,7 +20,6 @@ config ARM
20 select GENERIC_STRNCPY_FROM_USER 20 select GENERIC_STRNCPY_FROM_USER
21 select GENERIC_STRNLEN_USER 21 select GENERIC_STRNLEN_USER
22 select HARDIRQS_SW_RESEND 22 select HARDIRQS_SW_RESEND
23 select HAVE_AOUT
24 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL 23 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
25 select HAVE_ARCH_KGDB 24 select HAVE_ARCH_KGDB
26 select HAVE_ARCH_SECCOMP_FILTER 25 select HAVE_ARCH_SECCOMP_FILTER
@@ -218,7 +217,8 @@ config VECTORS_BASE
218 default DRAM_BASE if REMAP_VECTORS_TO_RAM 217 default DRAM_BASE if REMAP_VECTORS_TO_RAM
219 default 0x00000000 218 default 0x00000000
220 help 219 help
221 The base address of exception vectors. 220 The base address of exception vectors. This must be two pages
221 in size.
222 222
223config ARM_PATCH_PHYS_VIRT 223config ARM_PATCH_PHYS_VIRT
224 bool "Patch physical to virtual translations at runtime" if EMBEDDED 224 bool "Patch physical to virtual translations at runtime" if EMBEDDED
@@ -701,7 +701,7 @@ config ARCH_S3C24XX
701 select ARCH_HAS_CPUFREQ 701 select ARCH_HAS_CPUFREQ
702 select ARCH_REQUIRE_GPIOLIB 702 select ARCH_REQUIRE_GPIOLIB
703 select CLKDEV_LOOKUP 703 select CLKDEV_LOOKUP
704 select CLKSRC_MMIO 704 select CLKSRC_SAMSUNG_PWM
705 select GENERIC_CLOCKEVENTS 705 select GENERIC_CLOCKEVENTS
706 select GPIO_SAMSUNG 706 select GPIO_SAMSUNG
707 select HAVE_CLK 707 select HAVE_CLK
@@ -724,7 +724,7 @@ config ARCH_S3C64XX
724 select ARCH_REQUIRE_GPIOLIB 724 select ARCH_REQUIRE_GPIOLIB
725 select ARM_VIC 725 select ARM_VIC
726 select CLKDEV_LOOKUP 726 select CLKDEV_LOOKUP
727 select CLKSRC_MMIO 727 select CLKSRC_SAMSUNG_PWM
728 select CPU_V6 728 select CPU_V6
729 select GENERIC_CLOCKEVENTS 729 select GENERIC_CLOCKEVENTS
730 select GPIO_SAMSUNG 730 select GPIO_SAMSUNG
@@ -740,7 +740,6 @@ config ARCH_S3C64XX
740 select SAMSUNG_ATAGS 740 select SAMSUNG_ATAGS
741 select SAMSUNG_CLKSRC 741 select SAMSUNG_CLKSRC
742 select SAMSUNG_GPIOLIB_4BIT 742 select SAMSUNG_GPIOLIB_4BIT
743 select SAMSUNG_IRQ_VIC_TIMER
744 select SAMSUNG_WDT_RESET 743 select SAMSUNG_WDT_RESET
745 select USB_ARCH_HAS_OHCI 744 select USB_ARCH_HAS_OHCI
746 help 745 help
@@ -749,7 +748,7 @@ config ARCH_S3C64XX
749config ARCH_S5P64X0 748config ARCH_S5P64X0
750 bool "Samsung S5P6440 S5P6450" 749 bool "Samsung S5P6440 S5P6450"
751 select CLKDEV_LOOKUP 750 select CLKDEV_LOOKUP
752 select CLKSRC_MMIO 751 select CLKSRC_SAMSUNG_PWM
753 select CPU_V6 752 select CPU_V6
754 select GENERIC_CLOCKEVENTS 753 select GENERIC_CLOCKEVENTS
755 select GPIO_SAMSUNG 754 select GPIO_SAMSUNG
@@ -768,7 +767,7 @@ config ARCH_S5PC100
768 bool "Samsung S5PC100" 767 bool "Samsung S5PC100"
769 select ARCH_REQUIRE_GPIOLIB 768 select ARCH_REQUIRE_GPIOLIB
770 select CLKDEV_LOOKUP 769 select CLKDEV_LOOKUP
771 select CLKSRC_MMIO 770 select CLKSRC_SAMSUNG_PWM
772 select CPU_V7 771 select CPU_V7
773 select GENERIC_CLOCKEVENTS 772 select GENERIC_CLOCKEVENTS
774 select GPIO_SAMSUNG 773 select GPIO_SAMSUNG
@@ -788,7 +787,7 @@ config ARCH_S5PV210
788 select ARCH_HAS_HOLES_MEMORYMODEL 787 select ARCH_HAS_HOLES_MEMORYMODEL
789 select ARCH_SPARSEMEM_ENABLE 788 select ARCH_SPARSEMEM_ENABLE
790 select CLKDEV_LOOKUP 789 select CLKDEV_LOOKUP
791 select CLKSRC_MMIO 790 select CLKSRC_SAMSUNG_PWM
792 select CPU_V7 791 select CPU_V7
793 select GENERIC_CLOCKEVENTS 792 select GENERIC_CLOCKEVENTS
794 select GPIO_SAMSUNG 793 select GPIO_SAMSUNG
@@ -1591,8 +1590,7 @@ config ARM_PSCI
1591config ARCH_NR_GPIO 1590config ARCH_NR_GPIO
1592 int 1591 int
1593 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1592 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1594 default 512 if SOC_OMAP5 1593 default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
1595 default 512 if ARCH_KEYSTONE
1596 default 392 if ARCH_U8500 1594 default 392 if ARCH_U8500
1597 default 352 if ARCH_VT8500 1595 default 352 if ARCH_VT8500
1598 default 288 if ARCH_SUNXI 1596 default 288 if ARCH_SUNXI
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 4a62a8d4f3b6..15337833d05d 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -809,9 +809,19 @@ config DEBUG_LL_INCLUDE
809 809
810config DEBUG_UNCOMPRESS 810config DEBUG_UNCOMPRESS
811 bool 811 bool
812 default y if (ARCH_MULTIPLATFORM || ARCH_MSM) && DEBUG_LL && \ 812 depends on ARCH_MULTIPLATFORM || ARCH_MSM
813 !DEBUG_OMAP2PLUS_UART && \ 813 default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
814 !DEBUG_TEGRA_UART 814 !DEBUG_TEGRA_UART
815 help
816 This option influences the normal decompressor output for
817 multiplatform kernels. Normally, multiplatform kernels disable
818 decompressor output because it is not possible to know where to
819 send the decompressor output.
820
821 When this option is set, the selected DEBUG_LL output method
822 will be re-used for normal decompressor output on multiplatform
823 kernels.
824
815 825
816config UNCOMPRESS_INCLUDE 826config UNCOMPRESS_INCLUDE
817 string 827 string
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index c0ac0f5e5e5c..6fd2ceae305a 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -153,6 +153,7 @@ machine-$(CONFIG_ARCH_DAVINCI) += davinci
153machine-$(CONFIG_ARCH_DOVE) += dove 153machine-$(CONFIG_ARCH_DOVE) += dove
154machine-$(CONFIG_ARCH_EBSA110) += ebsa110 154machine-$(CONFIG_ARCH_EBSA110) += ebsa110
155machine-$(CONFIG_ARCH_EP93XX) += ep93xx 155machine-$(CONFIG_ARCH_EP93XX) += ep93xx
156machine-$(CONFIG_ARCH_EXYNOS) += exynos
156machine-$(CONFIG_ARCH_GEMINI) += gemini 157machine-$(CONFIG_ARCH_GEMINI) += gemini
157machine-$(CONFIG_ARCH_HIGHBANK) += highbank 158machine-$(CONFIG_ARCH_HIGHBANK) += highbank
158machine-$(CONFIG_ARCH_INTEGRATOR) += integrator 159machine-$(CONFIG_ARCH_INTEGRATOR) += integrator
@@ -160,15 +161,16 @@ machine-$(CONFIG_ARCH_IOP13XX) += iop13xx
160machine-$(CONFIG_ARCH_IOP32X) += iop32x 161machine-$(CONFIG_ARCH_IOP32X) += iop32x
161machine-$(CONFIG_ARCH_IOP33X) += iop33x 162machine-$(CONFIG_ARCH_IOP33X) += iop33x
162machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx 163machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx
164machine-$(CONFIG_ARCH_KEYSTONE) += keystone
163machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood 165machine-$(CONFIG_ARCH_KIRKWOOD) += kirkwood
164machine-$(CONFIG_ARCH_KS8695) += ks8695 166machine-$(CONFIG_ARCH_KS8695) += ks8695
165machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx 167machine-$(CONFIG_ARCH_LPC32XX) += lpc32xx
166machine-$(CONFIG_ARCH_MMP) += mmp 168machine-$(CONFIG_ARCH_MMP) += mmp
167machine-$(CONFIG_ARCH_MSM) += msm 169machine-$(CONFIG_ARCH_MSM) += msm
168machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0 170machine-$(CONFIG_ARCH_MV78XX0) += mv78xx0
171machine-$(CONFIG_ARCH_MVEBU) += mvebu
169machine-$(CONFIG_ARCH_MXC) += imx 172machine-$(CONFIG_ARCH_MXC) += imx
170machine-$(CONFIG_ARCH_MXS) += mxs 173machine-$(CONFIG_ARCH_MXS) += mxs
171machine-$(CONFIG_ARCH_MVEBU) += mvebu
172machine-$(CONFIG_ARCH_NETX) += netx 174machine-$(CONFIG_ARCH_NETX) += netx
173machine-$(CONFIG_ARCH_NOMADIK) += nomadik 175machine-$(CONFIG_ARCH_NOMADIK) += nomadik
174machine-$(CONFIG_ARCH_NSPIRE) += nspire 176machine-$(CONFIG_ARCH_NSPIRE) += nspire
@@ -176,7 +178,6 @@ machine-$(CONFIG_ARCH_OMAP1) += omap1
176machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2 178machine-$(CONFIG_ARCH_OMAP2PLUS) += omap2
177machine-$(CONFIG_ARCH_ORION5X) += orion5x 179machine-$(CONFIG_ARCH_ORION5X) += orion5x
178machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell 180machine-$(CONFIG_ARCH_PICOXCELL) += picoxcell
179machine-$(CONFIG_ARCH_SIRF) += prima2
180machine-$(CONFIG_ARCH_PXA) += pxa 181machine-$(CONFIG_ARCH_PXA) += pxa
181machine-$(CONFIG_ARCH_REALVIEW) += realview 182machine-$(CONFIG_ARCH_REALVIEW) += realview
182machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip 183machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
@@ -186,25 +187,24 @@ machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
186machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0 187machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0
187machine-$(CONFIG_ARCH_S5PC100) += s5pc100 188machine-$(CONFIG_ARCH_S5PC100) += s5pc100
188machine-$(CONFIG_ARCH_S5PV210) += s5pv210 189machine-$(CONFIG_ARCH_S5PV210) += s5pv210
189machine-$(CONFIG_ARCH_EXYNOS) += exynos
190machine-$(CONFIG_ARCH_SA1100) += sa1100 190machine-$(CONFIG_ARCH_SA1100) += sa1100
191machine-$(CONFIG_ARCH_SHARK) += shark 191machine-$(CONFIG_ARCH_SHARK) += shark
192machine-$(CONFIG_ARCH_SHMOBILE) += shmobile 192machine-$(CONFIG_ARCH_SHMOBILE) += shmobile
193machine-$(CONFIG_ARCH_SIRF) += prima2
194machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
195machine-$(CONFIG_ARCH_STI) += sti
196machine-$(CONFIG_ARCH_SUNXI) += sunxi
193machine-$(CONFIG_ARCH_TEGRA) += tegra 197machine-$(CONFIG_ARCH_TEGRA) += tegra
194machine-$(CONFIG_ARCH_U300) += u300 198machine-$(CONFIG_ARCH_U300) += u300
195machine-$(CONFIG_ARCH_U8500) += ux500 199machine-$(CONFIG_ARCH_U8500) += ux500
196machine-$(CONFIG_ARCH_VERSATILE) += versatile 200machine-$(CONFIG_ARCH_VERSATILE) += versatile
197machine-$(CONFIG_ARCH_VEXPRESS) += vexpress 201machine-$(CONFIG_ARCH_VEXPRESS) += vexpress
202machine-$(CONFIG_ARCH_VIRT) += virt
198machine-$(CONFIG_ARCH_VT8500) += vt8500 203machine-$(CONFIG_ARCH_VT8500) += vt8500
199machine-$(CONFIG_ARCH_W90X900) += w90x900 204machine-$(CONFIG_ARCH_W90X900) += w90x900
205machine-$(CONFIG_ARCH_ZYNQ) += zynq
200machine-$(CONFIG_FOOTBRIDGE) += footbridge 206machine-$(CONFIG_FOOTBRIDGE) += footbridge
201machine-$(CONFIG_ARCH_SOCFPGA) += socfpga
202machine-$(CONFIG_PLAT_SPEAR) += spear 207machine-$(CONFIG_PLAT_SPEAR) += spear
203machine-$(CONFIG_ARCH_STI) += sti
204machine-$(CONFIG_ARCH_VIRT) += virt
205machine-$(CONFIG_ARCH_ZYNQ) += zynq
206machine-$(CONFIG_ARCH_SUNXI) += sunxi
207machine-$(CONFIG_ARCH_KEYSTONE) += keystone
208 208
209# Platform directory name. This list is sorted alphanumerically 209# Platform directory name. This list is sorted alphanumerically
210# by CONFIG_* macro name. 210# by CONFIG_* macro name.
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index 9866cd736dee..a0f2721ea583 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -485,6 +485,12 @@
485 sirf,function = "usp0"; 485 sirf,function = "usp0";
486 }; 486 };
487 }; 487 };
488 usp0_uart_nostreamctrl_pins_a: usp0@1 {
489 usp0 {
490 sirf,pins = "usp0_uart_nostreamctrl_grp";
491 sirf,function = "usp0_uart_nostreamctrl";
492 };
493 };
488 usp1_pins_a: usp1@0 { 494 usp1_pins_a: usp1@0 {
489 usp1 { 495 usp1 {
490 sirf,pins = "usp1grp"; 496 sirf,pins = "usp1grp";
@@ -515,16 +521,16 @@
515 sirf,function = "pulse_count"; 521 sirf,function = "pulse_count";
516 }; 522 };
517 }; 523 };
518 cko0_rst_pins_a: cko0_rst@0 { 524 cko0_pins_a: cko0@0 {
519 cko0_rst { 525 cko0 {
520 sirf,pins = "cko0_rstgrp"; 526 sirf,pins = "cko0grp";
521 sirf,function = "cko0_rst"; 527 sirf,function = "cko0";
522 }; 528 };
523 }; 529 };
524 cko1_rst_pins_a: cko1_rst@0 { 530 cko1_pins_a: cko1@0 {
525 cko1_rst { 531 cko1 {
526 sirf,pins = "cko1_rstgrp"; 532 sirf,pins = "cko1grp";
527 sirf,function = "cko1_rst"; 533 sirf,function = "cko1";
528 }; 534 };
529 }; 535 };
530 }; 536 };
diff --git a/arch/arm/boot/dts/imx28-apx4devkit.dts b/arch/arm/boot/dts/imx28-apx4devkit.dts
index 43bf3c796cba..0e7fed47bd8d 100644
--- a/arch/arm/boot/dts/imx28-apx4devkit.dts
+++ b/arch/arm/boot/dts/imx28-apx4devkit.dts
@@ -147,7 +147,7 @@
147 reg = <0x0a>; 147 reg = <0x0a>;
148 VDDA-supply = <&reg_3p3v>; 148 VDDA-supply = <&reg_3p3v>;
149 VDDIO-supply = <&reg_3p3v>; 149 VDDIO-supply = <&reg_3p3v>;
150 150 clocks = <&saif0>;
151 }; 151 };
152 152
153 pcf8563: rtc@51 { 153 pcf8563: rtc@51 {
diff --git a/arch/arm/boot/dts/imx28-evk.dts b/arch/arm/boot/dts/imx28-evk.dts
index 1f0d38d7b16f..e035f4664b97 100644
--- a/arch/arm/boot/dts/imx28-evk.dts
+++ b/arch/arm/boot/dts/imx28-evk.dts
@@ -195,7 +195,7 @@
195 reg = <0x0a>; 195 reg = <0x0a>;
196 VDDA-supply = <&reg_3p3v>; 196 VDDA-supply = <&reg_3p3v>;
197 VDDIO-supply = <&reg_3p3v>; 197 VDDIO-supply = <&reg_3p3v>;
198 198 clocks = <&saif0>;
199 }; 199 };
200 200
201 at24@51 { 201 at24@51 {
diff --git a/arch/arm/boot/dts/imx28-m28evk.dts b/arch/arm/boot/dts/imx28-m28evk.dts
index 880df2f13be8..44d9da57736e 100644
--- a/arch/arm/boot/dts/imx28-m28evk.dts
+++ b/arch/arm/boot/dts/imx28-m28evk.dts
@@ -184,7 +184,7 @@
184 reg = <0x0a>; 184 reg = <0x0a>;
185 VDDA-supply = <&reg_3p3v>; 185 VDDA-supply = <&reg_3p3v>;
186 VDDIO-supply = <&reg_3p3v>; 186 VDDIO-supply = <&reg_3p3v>;
187 187 clocks = <&saif0>;
188 }; 188 };
189 189
190 eeprom: eeprom@51 { 190 eeprom: eeprom@51 {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index 6a8acb01b1d3..9524a0571281 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -837,6 +837,7 @@
837 compatible = "fsl,imx28-saif"; 837 compatible = "fsl,imx28-saif";
838 reg = <0x80042000 0x2000>; 838 reg = <0x80042000 0x2000>;
839 interrupts = <59 80>; 839 interrupts = <59 80>;
840 #clock-cells = <0>;
840 clocks = <&clks 53>; 841 clocks = <&clks 53>;
841 dmas = <&dma_apbx 4>; 842 dmas = <&dma_apbx 4>;
842 dma-names = "rx-tx"; 843 dma-names = "rx-tx";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index 6dd9486c755b..ad3471ca17c7 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -61,6 +61,16 @@
61 mux-int-port = <2>; 61 mux-int-port = <2>;
62 mux-ext-port = <3>; 62 mux-ext-port = <3>;
63 }; 63 };
64
65 clocks {
66 clk_26M: codec_clock {
67 compatible = "fixed-clock";
68 reg=<0>;
69 #clock-cells = <0>;
70 clock-frequency = <26000000>;
71 gpios = <&gpio4 26 1>;
72 };
73 };
64}; 74};
65 75
66&esdhc1 { 76&esdhc1 {
@@ -229,6 +239,7 @@
229 MX51_PAD_EIM_A27__GPIO2_21 0x5 239 MX51_PAD_EIM_A27__GPIO2_21 0x5
230 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 240 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
231 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85 241 MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
242 MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
232 >; 243 >;
233 }; 244 };
234 }; 245 };
@@ -255,7 +266,7 @@
255 sgtl5000: codec@0a { 266 sgtl5000: codec@0a {
256 compatible = "fsl,sgtl5000"; 267 compatible = "fsl,sgtl5000";
257 reg = <0x0a>; 268 reg = <0x0a>;
258 clock-frequency = <26000000>; 269 clocks = <&clk_26M>;
259 VDDA-supply = <&vdig_reg>; 270 VDDA-supply = <&vdig_reg>;
260 VDDIO-supply = <&vvideo_reg>; 271 VDDIO-supply = <&vvideo_reg>;
261 }; 272 };
diff --git a/arch/arm/boot/dts/imx53-mba53.dts b/arch/arm/boot/dts/imx53-mba53.dts
index aaa33bc99f78..a63090267941 100644
--- a/arch/arm/boot/dts/imx53-mba53.dts
+++ b/arch/arm/boot/dts/imx53-mba53.dts
@@ -27,7 +27,7 @@
27 27
28 backlight { 28 backlight {
29 compatible = "pwm-backlight"; 29 compatible = "pwm-backlight";
30 pwms = <&pwm2 0 50000 0 0>; 30 pwms = <&pwm2 0 50000>;
31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>; 31 brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
32 default-brightness-level = <10>; 32 default-brightness-level = <10>;
33 enable-gpios = <&gpio7 7 0>; 33 enable-gpios = <&gpio7 7 0>;
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 3895fbba8fce..569aa9f2c4ed 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -725,15 +725,15 @@
725 uart1 { 725 uart1 {
726 pinctrl_uart1_1: uart1grp-1 { 726 pinctrl_uart1_1: uart1grp-1 {
727 fsl,pins = < 727 fsl,pins = <
728 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5 728 MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
729 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5 729 MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
730 >; 730 >;
731 }; 731 };
732 732
733 pinctrl_uart1_2: uart1grp-2 { 733 pinctrl_uart1_2: uart1grp-2 {
734 fsl,pins = < 734 fsl,pins = <
735 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5 735 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
736 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5 736 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
737 >; 737 >;
738 }; 738 };
739 739
@@ -748,8 +748,8 @@
748 uart2 { 748 uart2 {
749 pinctrl_uart2_1: uart2grp-1 { 749 pinctrl_uart2_1: uart2grp-1 {
750 fsl,pins = < 750 fsl,pins = <
751 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 751 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
752 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 752 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
753 >; 753 >;
754 }; 754 };
755 755
@@ -766,17 +766,17 @@
766 uart3 { 766 uart3 {
767 pinctrl_uart3_1: uart3grp-1 { 767 pinctrl_uart3_1: uart3grp-1 {
768 fsl,pins = < 768 fsl,pins = <
769 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 769 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
770 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 770 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
771 MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5 771 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
772 MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5 772 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
773 >; 773 >;
774 }; 774 };
775 775
776 pinctrl_uart3_2: uart3grp-2 { 776 pinctrl_uart3_2: uart3grp-2 {
777 fsl,pins = < 777 fsl,pins = <
778 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 778 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
779 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 779 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
780 >; 780 >;
781 }; 781 };
782 782
@@ -785,8 +785,8 @@
785 uart4 { 785 uart4 {
786 pinctrl_uart4_1: uart4grp-1 { 786 pinctrl_uart4_1: uart4grp-1 {
787 fsl,pins = < 787 fsl,pins = <
788 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5 788 MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
789 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5 789 MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
790 >; 790 >;
791 }; 791 };
792 }; 792 };
@@ -794,8 +794,8 @@
794 uart5 { 794 uart5 {
795 pinctrl_uart5_1: uart5grp-1 { 795 pinctrl_uart5_1: uart5grp-1 {
796 fsl,pins = < 796 fsl,pins = <
797 MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5 797 MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
798 MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5 798 MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
799 >; 799 >;
800 }; 800 };
801 }; 801 };
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 05e9489cf95c..bbeb623fc2c6 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -515,16 +515,16 @@
515 sirf,function = "pulse_count"; 515 sirf,function = "pulse_count";
516 }; 516 };
517 }; 517 };
518 cko0_rst_pins_a: cko0_rst@0 { 518 cko0_pins_a: cko0@0 {
519 cko0_rst { 519 cko0 {
520 sirf,pins = "cko0_rstgrp"; 520 sirf,pins = "cko0grp";
521 sirf,function = "cko0_rst"; 521 sirf,function = "cko0";
522 }; 522 };
523 }; 523 };
524 cko1_rst_pins_a: cko1_rst@0 { 524 cko1_pins_a: cko1@0 {
525 cko1_rst { 525 cko1 {
526 sirf,pins = "cko1_rstgrp"; 526 sirf,pins = "cko1grp";
527 sirf,function = "cko1_rst"; 527 sirf,function = "cko1";
528 }; 528 };
529 }; 529 };
530 }; 530 };
diff --git a/arch/arm/boot/dts/stih416-pinctrl.dtsi b/arch/arm/boot/dts/stih416-pinctrl.dtsi
index 957b21a71b4b..0f246c979262 100644
--- a/arch/arm/boot/dts/stih416-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih416-pinctrl.dtsi
@@ -166,6 +166,15 @@
166 reg = <0x9000 0x100>; 166 reg = <0x9000 0x100>;
167 st,bank-name = "PIO31"; 167 st,bank-name = "PIO31";
168 }; 168 };
169
170 serial2-oe {
171 pinctrl_serial2_oe: serial2-1 {
172 st,pins {
173 output-enable = <&PIO11 3 ALT2 OUT>;
174 };
175 };
176 };
177
169 }; 178 };
170 179
171 pin-controller-rear { 180 pin-controller-rear {
@@ -218,7 +227,6 @@
218 st,pins { 227 st,pins {
219 tx = <&PIO17 4 ALT2 OUT>; 228 tx = <&PIO17 4 ALT2 OUT>;
220 rx = <&PIO17 5 ALT2 IN>; 229 rx = <&PIO17 5 ALT2 IN>;
221 output-enable = <&PIO11 3 ALT2 OUT>;
222 }; 230 };
223 }; 231 };
224 }; 232 };
diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi
index 3cecd9689a49..1a0326ea7d07 100644
--- a/arch/arm/boot/dts/stih416.dtsi
+++ b/arch/arm/boot/dts/stih416.dtsi
@@ -79,7 +79,7 @@
79 interrupts = <0 197 0>; 79 interrupts = <0 197 0>;
80 clocks = <&CLK_S_ICN_REG_0>; 80 clocks = <&CLK_S_ICN_REG_0>;
81 pinctrl-names = "default"; 81 pinctrl-names = "default";
82 pinctrl-0 = <&pinctrl_serial2>; 82 pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
83 }; 83 };
84 84
85 /* SBC_UART1 */ 85 /* SBC_UART1 */
diff --git a/arch/arm/boot/dts/twl4030.dtsi b/arch/arm/boot/dts/twl4030.dtsi
index b3034da00a37..ae6a17aed9ee 100644
--- a/arch/arm/boot/dts/twl4030.dtsi
+++ b/arch/arm/boot/dts/twl4030.dtsi
@@ -47,6 +47,12 @@
47 regulator-max-microvolt = <3150000>; 47 regulator-max-microvolt = <3150000>;
48 }; 48 };
49 49
50 vmmc2: regulator-vmmc2 {
51 compatible = "ti,twl4030-vmmc2";
52 regulator-min-microvolt = <1850000>;
53 regulator-max-microvolt = <3150000>;
54 };
55
50 vusb1v5: regulator-vusb1v5 { 56 vusb1v5: regulator-vusb1v5 {
51 compatible = "ti,twl4030-vusb1v5"; 57 compatible = "ti,twl4030-vusb1v5";
52 }; 58 };
diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
index e1eb7dadda80..67d929cf9804 100644
--- a/arch/arm/boot/dts/vf610.dtsi
+++ b/arch/arm/boot/dts/vf610.dtsi
@@ -442,8 +442,8 @@
442 compatible = "fsl,mvf600-fec"; 442 compatible = "fsl,mvf600-fec";
443 reg = <0x400d0000 0x1000>; 443 reg = <0x400d0000 0x1000>;
444 interrupts = <0 78 0x04>; 444 interrupts = <0 78 0x04>;
445 clocks = <&clks VF610_CLK_ENET>, 445 clocks = <&clks VF610_CLK_ENET0>,
446 <&clks VF610_CLK_ENET>, 446 <&clks VF610_CLK_ENET0>,
447 <&clks VF610_CLK_ENET>; 447 <&clks VF610_CLK_ENET>;
448 clock-names = "ipg", "ahb", "ptp"; 448 clock-names = "ipg", "ahb", "ptp";
449 status = "disabled"; 449 status = "disabled";
@@ -453,8 +453,8 @@
453 compatible = "fsl,mvf600-fec"; 453 compatible = "fsl,mvf600-fec";
454 reg = <0x400d1000 0x1000>; 454 reg = <0x400d1000 0x1000>;
455 interrupts = <0 79 0x04>; 455 interrupts = <0 79 0x04>;
456 clocks = <&clks VF610_CLK_ENET>, 456 clocks = <&clks VF610_CLK_ENET1>,
457 <&clks VF610_CLK_ENET>, 457 <&clks VF610_CLK_ENET1>,
458 <&clks VF610_CLK_ENET>; 458 <&clks VF610_CLK_ENET>;
459 clock-names = "ipg", "ahb", "ptp"; 459 clock-names = "ipg", "ahb", "ptp";
460 status = "disabled"; 460 status = "disabled";
diff --git a/arch/arm/common/edma.c b/arch/arm/common/edma.c
index a432e6c1dac1..39ad030ac0c7 100644
--- a/arch/arm/common/edma.c
+++ b/arch/arm/common/edma.c
@@ -26,7 +26,6 @@
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/slab.h> 27#include <linux/slab.h>
28#include <linux/edma.h> 28#include <linux/edma.h>
29#include <linux/err.h>
30#include <linux/of_address.h> 29#include <linux/of_address.h>
31#include <linux/of_device.h> 30#include <linux/of_device.h>
32#include <linux/of_dma.h> 31#include <linux/of_dma.h>
diff --git a/arch/arm/configs/da8xx_omapl_defconfig b/arch/arm/configs/da8xx_omapl_defconfig
index 7c868139bdb0..1571bea48bed 100644
--- a/arch/arm/configs/da8xx_omapl_defconfig
+++ b/arch/arm/configs/da8xx_omapl_defconfig
@@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
102CONFIG_SND_DAVINCI_SOC=m 102CONFIG_SND_DAVINCI_SOC=m
103# CONFIG_HID_SUPPORT is not set 103# CONFIG_HID_SUPPORT is not set
104# CONFIG_USB_SUPPORT is not set 104# CONFIG_USB_SUPPORT is not set
105CONFIG_DMADEVICES=y
106CONFIG_TI_EDMA=y
105CONFIG_EXT2_FS=y 107CONFIG_EXT2_FS=y
106CONFIG_EXT3_FS=y 108CONFIG_EXT3_FS=y
107CONFIG_XFS_FS=m 109CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/davinci_all_defconfig b/arch/arm/configs/davinci_all_defconfig
index c86fd75e181a..ab2f7378352c 100644
--- a/arch/arm/configs/davinci_all_defconfig
+++ b/arch/arm/configs/davinci_all_defconfig
@@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
162CONFIG_LEDS_TRIGGER_TIMER=m 162CONFIG_LEDS_TRIGGER_TIMER=m
163CONFIG_LEDS_TRIGGER_HEARTBEAT=m 163CONFIG_LEDS_TRIGGER_HEARTBEAT=m
164CONFIG_RTC_CLASS=y 164CONFIG_RTC_CLASS=y
165CONFIG_DMADEVICES=y
166CONFIG_TI_EDMA=y
165CONFIG_EXT2_FS=y 167CONFIG_EXT2_FS=y
166CONFIG_EXT3_FS=y 168CONFIG_EXT3_FS=y
167CONFIG_XFS_FS=m 169CONFIG_XFS_FS=m
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index fe0bdc361d2c..6e572c64cf5a 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
53CONFIG_IP_PNP_DHCP=y 53CONFIG_IP_PNP_DHCP=y
54CONFIG_DEVTMPFS=y 54CONFIG_DEVTMPFS=y
55CONFIG_DEVTMPFS_MOUNT=y 55CONFIG_DEVTMPFS_MOUNT=y
56CONFIG_OMAP_OCP2SCP=y
56CONFIG_BLK_DEV_SD=y 57CONFIG_BLK_DEV_SD=y
57CONFIG_ATA=y 58CONFIG_ATA=y
58CONFIG_SATA_AHCI_PLATFORM=y 59CONFIG_SATA_AHCI_PLATFORM=y
@@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
61CONFIG_NETDEVICES=y 62CONFIG_NETDEVICES=y
62CONFIG_SUN4I_EMAC=y 63CONFIG_SUN4I_EMAC=y
63CONFIG_NET_CALXEDA_XGMAC=y 64CONFIG_NET_CALXEDA_XGMAC=y
65CONFIG_KS8851=y
64CONFIG_SMSC911X=y 66CONFIG_SMSC911X=y
65CONFIG_STMMAC_ETH=y 67CONFIG_STMMAC_ETH=y
66CONFIG_MDIO_SUN4I=y 68CONFIG_MDIO_SUN4I=y
@@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
89CONFIG_I2C_SIRF=y 91CONFIG_I2C_SIRF=y
90CONFIG_I2C_TEGRA=y 92CONFIG_I2C_TEGRA=y
91CONFIG_SPI=y 93CONFIG_SPI=y
94CONFIG_SPI_OMAP24XX=y
92CONFIG_SPI_PL022=y 95CONFIG_SPI_PL022=y
93CONFIG_SPI_SIRF=y 96CONFIG_SPI_SIRF=y
94CONFIG_SPI_TEGRA114=y 97CONFIG_SPI_TEGRA114=y
@@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
111CONFIG_USB=y 114CONFIG_USB=y
112CONFIG_USB_XHCI_HCD=y 115CONFIG_USB_XHCI_HCD=y
113CONFIG_USB_EHCI_HCD=y 116CONFIG_USB_EHCI_HCD=y
114CONFIG_USB_EHCI_MXC=y
115CONFIG_USB_EHCI_TEGRA=y 117CONFIG_USB_EHCI_TEGRA=y
116CONFIG_USB_EHCI_HCD_PLATFORM=y 118CONFIG_USB_EHCI_HCD_PLATFORM=y
117CONFIG_USB_ISP1760_HCD=y 119CONFIG_USB_ISP1760_HCD=y
118CONFIG_USB_STORAGE=y 120CONFIG_USB_STORAGE=y
121CONFIG_USB_CHIPIDEA=y
122CONFIG_USB_CHIPIDEA_HOST=y
119CONFIG_AB8500_USB=y 123CONFIG_AB8500_USB=y
120CONFIG_NOP_USB_XCEIV=y 124CONFIG_NOP_USB_XCEIV=y
121CONFIG_OMAP_USB2=y 125CONFIG_OMAP_USB2=y
diff --git a/arch/arm/configs/nhk8815_defconfig b/arch/arm/configs/nhk8815_defconfig
index 35f8cf299fa2..263ae3869e32 100644
--- a/arch/arm/configs/nhk8815_defconfig
+++ b/arch/arm/configs/nhk8815_defconfig
@@ -1,6 +1,8 @@
1# CONFIG_LOCALVERSION_AUTO is not set 1# CONFIG_LOCALVERSION_AUTO is not set
2# CONFIG_SWAP is not set 2# CONFIG_SWAP is not set
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_NO_HZ_IDLE=y
5CONFIG_HIGH_RES_TIMERS=y
4CONFIG_IKCONFIG=y 6CONFIG_IKCONFIG=y
5CONFIG_IKCONFIG_PROC=y 7CONFIG_IKCONFIG_PROC=y
6CONFIG_LOG_BUF_SHIFT=14 8CONFIG_LOG_BUF_SHIFT=14
@@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
48CONFIG_MTD=y 50CONFIG_MTD=y
49CONFIG_MTD_TESTS=m 51CONFIG_MTD_TESTS=m
50CONFIG_MTD_CMDLINE_PARTS=y 52CONFIG_MTD_CMDLINE_PARTS=y
51CONFIG_MTD_CHAR=y
52CONFIG_MTD_BLOCK=y 53CONFIG_MTD_BLOCK=y
53CONFIG_MTD_NAND_ECC_SMC=y 54CONFIG_MTD_NAND_ECC_SMC=y
54CONFIG_MTD_NAND=y 55CONFIG_MTD_NAND=y
@@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
94CONFIG_I2C_NOMADIK=y 95CONFIG_I2C_NOMADIK=y
95CONFIG_DEBUG_GPIO=y 96CONFIG_DEBUG_GPIO=y
96# CONFIG_HWMON is not set 97# CONFIG_HWMON is not set
98CONFIG_REGULATOR=y
97CONFIG_MMC=y 99CONFIG_MMC=y
98CONFIG_MMC_CLKGATE=y 100CONFIG_MMC_UNSAFE_RESUME=y
101# CONFIG_MMC_BLOCK_BOUNCE is not set
99CONFIG_MMC_ARMMMCI=y 102CONFIG_MMC_ARMMMCI=y
100CONFIG_NEW_LEDS=y 103CONFIG_NEW_LEDS=y
101CONFIG_LEDS_CLASS=y 104CONFIG_LEDS_CLASS=y
diff --git a/arch/arm/include/asm/a.out-core.h b/arch/arm/include/asm/a.out-core.h
deleted file mode 100644
index 92f10cb5c70c..000000000000
--- a/arch/arm/include/asm/a.out-core.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/* a.out coredump register dumper
2 *
3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4 * Written by David Howells (dhowells@redhat.com)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public Licence
8 * as published by the Free Software Foundation; either version
9 * 2 of the Licence, or (at your option) any later version.
10 */
11
12#ifndef _ASM_A_OUT_CORE_H
13#define _ASM_A_OUT_CORE_H
14
15#ifdef __KERNEL__
16
17#include <linux/user.h>
18#include <linux/elfcore.h>
19
20/*
21 * fill in the user structure for an a.out core dump
22 */
23static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
24{
25 struct task_struct *tsk = current;
26
27 dump->magic = CMAGIC;
28 dump->start_code = tsk->mm->start_code;
29 dump->start_stack = regs->ARM_sp & ~(PAGE_SIZE - 1);
30
31 dump->u_tsize = (tsk->mm->end_code - tsk->mm->start_code) >> PAGE_SHIFT;
32 dump->u_dsize = (tsk->mm->brk - tsk->mm->start_data + PAGE_SIZE - 1) >> PAGE_SHIFT;
33 dump->u_ssize = 0;
34
35 memset(dump->u_debugreg, 0, sizeof(dump->u_debugreg));
36
37 if (dump->start_stack < 0x04000000)
38 dump->u_ssize = (0x04000000 - dump->start_stack) >> PAGE_SHIFT;
39
40 dump->regs = *regs;
41 dump->u_fpvalid = dump_fpu (regs, &dump->u_fp);
42}
43
44#endif /* __KERNEL__ */
45#endif /* _ASM_A_OUT_CORE_H */
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index 8c25dc4e9851..9672e978d50d 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -89,13 +89,18 @@ extern unsigned int processor_id;
89 __val; \ 89 __val; \
90 }) 90 })
91 91
92/*
93 * The memory clobber prevents gcc 4.5 from reordering the mrc before
94 * any is_smp() tests, which can cause undefined instruction aborts on
95 * ARM1136 r0 due to the missing extended CP15 registers.
96 */
92#define read_cpuid_ext(ext_reg) \ 97#define read_cpuid_ext(ext_reg) \
93 ({ \ 98 ({ \
94 unsigned int __val; \ 99 unsigned int __val; \
95 asm("mrc p15, 0, %0, c0, " ext_reg \ 100 asm("mrc p15, 0, %0, c0, " ext_reg \
96 : "=r" (__val) \ 101 : "=r" (__val) \
97 : \ 102 : \
98 : "cc"); \ 103 : "memory"); \
99 __val; \ 104 __val; \
100 }) 105 })
101 106
diff --git a/arch/arm/include/asm/elf.h b/arch/arm/include/asm/elf.h
index 38050b1c4800..56211f2084ef 100644
--- a/arch/arm/include/asm/elf.h
+++ b/arch/arm/include/asm/elf.h
@@ -130,4 +130,10 @@ struct mm_struct;
130extern unsigned long arch_randomize_brk(struct mm_struct *mm); 130extern unsigned long arch_randomize_brk(struct mm_struct *mm);
131#define arch_randomize_brk arch_randomize_brk 131#define arch_randomize_brk arch_randomize_brk
132 132
133#ifdef CONFIG_MMU
134#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
135struct linux_binprm;
136int arch_setup_additional_pages(struct linux_binprm *, int);
137#endif
138
133#endif 139#endif
diff --git a/arch/arm/include/asm/mmu.h b/arch/arm/include/asm/mmu.h
index e3d55547e755..6f18da09668b 100644
--- a/arch/arm/include/asm/mmu.h
+++ b/arch/arm/include/asm/mmu.h
@@ -6,8 +6,11 @@
6typedef struct { 6typedef struct {
7#ifdef CONFIG_CPU_HAS_ASID 7#ifdef CONFIG_CPU_HAS_ASID
8 atomic64_t id; 8 atomic64_t id;
9#else
10 int switch_pending;
9#endif 11#endif
10 unsigned int vmalloc_seq; 12 unsigned int vmalloc_seq;
13 unsigned long sigpage;
11} mm_context_t; 14} mm_context_t;
12 15
13#ifdef CONFIG_CPU_HAS_ASID 16#ifdef CONFIG_CPU_HAS_ASID
diff --git a/arch/arm/include/asm/mmu_context.h b/arch/arm/include/asm/mmu_context.h
index b5792b7fd8d3..9b32f76bb0dd 100644
--- a/arch/arm/include/asm/mmu_context.h
+++ b/arch/arm/include/asm/mmu_context.h
@@ -56,7 +56,7 @@ static inline void check_and_switch_context(struct mm_struct *mm,
56 * on non-ASID CPUs, the old mm will remain valid until the 56 * on non-ASID CPUs, the old mm will remain valid until the
57 * finish_arch_post_lock_switch() call. 57 * finish_arch_post_lock_switch() call.
58 */ 58 */
59 set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM); 59 mm->context.switch_pending = 1;
60 else 60 else
61 cpu_switch_mm(mm->pgd, mm); 61 cpu_switch_mm(mm->pgd, mm);
62} 62}
@@ -65,9 +65,21 @@ static inline void check_and_switch_context(struct mm_struct *mm,
65 finish_arch_post_lock_switch 65 finish_arch_post_lock_switch
66static inline void finish_arch_post_lock_switch(void) 66static inline void finish_arch_post_lock_switch(void)
67{ 67{
68 if (test_and_clear_thread_flag(TIF_SWITCH_MM)) { 68 struct mm_struct *mm = current->mm;
69 struct mm_struct *mm = current->mm; 69
70 cpu_switch_mm(mm->pgd, mm); 70 if (mm && mm->context.switch_pending) {
71 /*
72 * Preemption must be disabled during cpu_switch_mm() as we
73 * have some stateful cache flush implementations. Check
74 * switch_pending again in case we were preempted and the
75 * switch to this mm was already done.
76 */
77 preempt_disable();
78 if (mm->context.switch_pending) {
79 mm->context.switch_pending = 0;
80 cpu_switch_mm(mm->pgd, mm);
81 }
82 preempt_enable_no_resched();
71 } 83 }
72} 84}
73 85
diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h
index 6363f3d1d505..4355f0ec44d6 100644
--- a/arch/arm/include/asm/page.h
+++ b/arch/arm/include/asm/page.h
@@ -142,7 +142,9 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from,
142#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 142#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE)
143extern void copy_page(void *to, const void *from); 143extern void copy_page(void *to, const void *from);
144 144
145#ifdef CONFIG_KUSER_HELPERS
145#define __HAVE_ARCH_GATE_AREA 1 146#define __HAVE_ARCH_GATE_AREA 1
147#endif
146 148
147#ifdef CONFIG_ARM_LPAE 149#ifdef CONFIG_ARM_LPAE
148#include <asm/pgtable-3level-types.h> 150#include <asm/pgtable-3level-types.h>
diff --git a/arch/arm/include/asm/processor.h b/arch/arm/include/asm/processor.h
index 06e7d509eaac..413f3876341c 100644
--- a/arch/arm/include/asm/processor.h
+++ b/arch/arm/include/asm/processor.h
@@ -54,7 +54,6 @@ struct thread_struct {
54 54
55#define start_thread(regs,pc,sp) \ 55#define start_thread(regs,pc,sp) \
56({ \ 56({ \
57 unsigned long *stack = (unsigned long *)sp; \
58 memset(regs->uregs, 0, sizeof(regs->uregs)); \ 57 memset(regs->uregs, 0, sizeof(regs->uregs)); \
59 if (current->personality & ADDR_LIMIT_32BIT) \ 58 if (current->personality & ADDR_LIMIT_32BIT) \
60 regs->ARM_cpsr = USR_MODE; \ 59 regs->ARM_cpsr = USR_MODE; \
@@ -65,9 +64,6 @@ struct thread_struct {
65 regs->ARM_cpsr |= PSR_ENDSTATE; \ 64 regs->ARM_cpsr |= PSR_ENDSTATE; \
66 regs->ARM_pc = pc & ~1; /* pc */ \ 65 regs->ARM_pc = pc & ~1; /* pc */ \
67 regs->ARM_sp = sp; /* sp */ \ 66 regs->ARM_sp = sp; /* sp */ \
68 regs->ARM_r2 = stack[2]; /* r2 (envp) */ \
69 regs->ARM_r1 = stack[1]; /* r1 (argv) */ \
70 regs->ARM_r0 = stack[0]; /* r0 (argc) */ \
71 nommu_start_thread(regs); \ 67 nommu_start_thread(regs); \
72}) 68})
73 69
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index 214d4158089a..2b8114fcba09 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -156,7 +156,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
156#define TIF_USING_IWMMXT 17 156#define TIF_USING_IWMMXT 17
157#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 157#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
158#define TIF_RESTORE_SIGMASK 20 158#define TIF_RESTORE_SIGMASK 20
159#define TIF_SWITCH_MM 22 /* deferred switch_mm */
160 159
161#define _TIF_SIGPENDING (1 << TIF_SIGPENDING) 160#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
162#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) 161#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
diff --git a/arch/arm/include/asm/tlbflush.h b/arch/arm/include/asm/tlbflush.h
index fdbb9e369745..f467e9b3f8d5 100644
--- a/arch/arm/include/asm/tlbflush.h
+++ b/arch/arm/include/asm/tlbflush.h
@@ -443,7 +443,18 @@ static inline void local_flush_bp_all(void)
443 isb(); 443 isb();
444} 444}
445 445
446#include <asm/cputype.h>
446#ifdef CONFIG_ARM_ERRATA_798181 447#ifdef CONFIG_ARM_ERRATA_798181
448static inline int erratum_a15_798181(void)
449{
450 unsigned int midr = read_cpuid_id();
451
452 /* Cortex-A15 r0p0..r3p2 affected */
453 if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
454 return 0;
455 return 1;
456}
457
447static inline void dummy_flush_tlb_a15_erratum(void) 458static inline void dummy_flush_tlb_a15_erratum(void)
448{ 459{
449 /* 460 /*
@@ -453,6 +464,11 @@ static inline void dummy_flush_tlb_a15_erratum(void)
453 dsb(); 464 dsb();
454} 465}
455#else 466#else
467static inline int erratum_a15_798181(void)
468{
469 return 0;
470}
471
456static inline void dummy_flush_tlb_a15_erratum(void) 472static inline void dummy_flush_tlb_a15_erratum(void)
457{ 473{
458} 474}
diff --git a/arch/arm/include/asm/virt.h b/arch/arm/include/asm/virt.h
index 50af92bac737..4371f45c5784 100644
--- a/arch/arm/include/asm/virt.h
+++ b/arch/arm/include/asm/virt.h
@@ -29,6 +29,7 @@
29#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT 29#define BOOT_CPU_MODE_MISMATCH PSR_N_BIT
30 30
31#ifndef __ASSEMBLY__ 31#ifndef __ASSEMBLY__
32#include <asm/cacheflush.h>
32 33
33#ifdef CONFIG_ARM_VIRT_EXT 34#ifdef CONFIG_ARM_VIRT_EXT
34/* 35/*
@@ -41,10 +42,21 @@
41 */ 42 */
42extern int __boot_cpu_mode; 43extern int __boot_cpu_mode;
43 44
45static inline void sync_boot_mode(void)
46{
47 /*
48 * As secondaries write to __boot_cpu_mode with caches disabled, we
49 * must flush the corresponding cache entries to ensure the visibility
50 * of their writes.
51 */
52 sync_cache_r(&__boot_cpu_mode);
53}
54
44void __hyp_set_vectors(unsigned long phys_vector_base); 55void __hyp_set_vectors(unsigned long phys_vector_base);
45unsigned long __hyp_get_vectors(void); 56unsigned long __hyp_get_vectors(void);
46#else 57#else
47#define __boot_cpu_mode (SVC_MODE) 58#define __boot_cpu_mode (SVC_MODE)
59#define sync_boot_mode()
48#endif 60#endif
49 61
50#ifndef ZIMAGE 62#ifndef ZIMAGE
diff --git a/arch/arm/include/uapi/asm/Kbuild b/arch/arm/include/uapi/asm/Kbuild
index 47bcb2d254af..18d76fd5a2af 100644
--- a/arch/arm/include/uapi/asm/Kbuild
+++ b/arch/arm/include/uapi/asm/Kbuild
@@ -1,7 +1,6 @@
1# UAPI Header export list 1# UAPI Header export list
2include include/uapi/asm-generic/Kbuild.asm 2include include/uapi/asm-generic/Kbuild.asm
3 3
4header-y += a.out.h
5header-y += byteorder.h 4header-y += byteorder.h
6header-y += fcntl.h 5header-y += fcntl.h
7header-y += hwcap.h 6header-y += hwcap.h
diff --git a/arch/arm/include/uapi/asm/a.out.h b/arch/arm/include/uapi/asm/a.out.h
deleted file mode 100644
index 083894b2e3bc..000000000000
--- a/arch/arm/include/uapi/asm/a.out.h
+++ /dev/null
@@ -1,34 +0,0 @@
1#ifndef __ARM_A_OUT_H__
2#define __ARM_A_OUT_H__
3
4#include <linux/personality.h>
5#include <linux/types.h>
6
7struct exec
8{
9 __u32 a_info; /* Use macros N_MAGIC, etc for access */
10 __u32 a_text; /* length of text, in bytes */
11 __u32 a_data; /* length of data, in bytes */
12 __u32 a_bss; /* length of uninitialized data area for file, in bytes */
13 __u32 a_syms; /* length of symbol table data in file, in bytes */
14 __u32 a_entry; /* start address */
15 __u32 a_trsize; /* length of relocation info for text, in bytes */
16 __u32 a_drsize; /* length of relocation info for data, in bytes */
17};
18
19/*
20 * This is always the same
21 */
22#define N_TXTADDR(a) (0x00008000)
23
24#define N_TRSIZE(a) ((a).a_trsize)
25#define N_DRSIZE(a) ((a).a_drsize)
26#define N_SYMSIZE(a) ((a).a_syms)
27
28#define M_ARM 103
29
30#ifndef LIBRARY_START_TEXT
31#define LIBRARY_START_TEXT (0x00c00000)
32#endif
33
34#endif /* __A_OUT_GNU_H__ */
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index a39cfc2a1f90..d40d0ef389db 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -742,6 +742,18 @@ ENDPROC(__switch_to)
742#endif 742#endif
743 .endm 743 .endm
744 744
745 .macro kuser_pad, sym, size
746 .if (. - \sym) & 3
747 .rept 4 - (. - \sym) & 3
748 .byte 0
749 .endr
750 .endif
751 .rept (\size - (. - \sym)) / 4
752 .word 0xe7fddef1
753 .endr
754 .endm
755
756#ifdef CONFIG_KUSER_HELPERS
745 .align 5 757 .align 5
746 .globl __kuser_helper_start 758 .globl __kuser_helper_start
747__kuser_helper_start: 759__kuser_helper_start:
@@ -832,18 +844,13 @@ kuser_cmpxchg64_fixup:
832#error "incoherent kernel configuration" 844#error "incoherent kernel configuration"
833#endif 845#endif
834 846
835 /* pad to next slot */ 847 kuser_pad __kuser_cmpxchg64, 64
836 .rept (16 - (. - __kuser_cmpxchg64)/4)
837 .word 0
838 .endr
839
840 .align 5
841 848
842__kuser_memory_barrier: @ 0xffff0fa0 849__kuser_memory_barrier: @ 0xffff0fa0
843 smp_dmb arm 850 smp_dmb arm
844 usr_ret lr 851 usr_ret lr
845 852
846 .align 5 853 kuser_pad __kuser_memory_barrier, 32
847 854
848__kuser_cmpxchg: @ 0xffff0fc0 855__kuser_cmpxchg: @ 0xffff0fc0
849 856
@@ -916,13 +923,14 @@ kuser_cmpxchg32_fixup:
916 923
917#endif 924#endif
918 925
919 .align 5 926 kuser_pad __kuser_cmpxchg, 32
920 927
921__kuser_get_tls: @ 0xffff0fe0 928__kuser_get_tls: @ 0xffff0fe0
922 ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init 929 ldr r0, [pc, #(16 - 8)] @ read TLS, set in kuser_get_tls_init
923 usr_ret lr 930 usr_ret lr
924 mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code 931 mrc p15, 0, r0, c13, c0, 3 @ 0xffff0fe8 hardware TLS code
925 .rep 4 932 kuser_pad __kuser_get_tls, 16
933 .rep 3
926 .word 0 @ 0xffff0ff0 software TLS value, then 934 .word 0 @ 0xffff0ff0 software TLS value, then
927 .endr @ pad up to __kuser_helper_version 935 .endr @ pad up to __kuser_helper_version
928 936
@@ -932,14 +940,16 @@ __kuser_helper_version: @ 0xffff0ffc
932 .globl __kuser_helper_end 940 .globl __kuser_helper_end
933__kuser_helper_end: 941__kuser_helper_end:
934 942
943#endif
944
935 THUMB( .thumb ) 945 THUMB( .thumb )
936 946
937/* 947/*
938 * Vector stubs. 948 * Vector stubs.
939 * 949 *
940 * This code is copied to 0xffff0200 so we can use branches in the 950 * This code is copied to 0xffff1000 so we can use branches in the
941 * vectors, rather than ldr's. Note that this code must not 951 * vectors, rather than ldr's. Note that this code must not exceed
942 * exceed 0x300 bytes. 952 * a page size.
943 * 953 *
944 * Common stub entry macro: 954 * Common stub entry macro:
945 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC 955 * Enter in IRQ mode, spsr = SVC/USR CPSR, lr = SVC/USR PC
@@ -986,8 +996,17 @@ ENDPROC(vector_\name)
9861: 9961:
987 .endm 997 .endm
988 998
989 .globl __stubs_start 999 .section .stubs, "ax", %progbits
990__stubs_start: 1000__stubs_start:
1001 @ This must be the first word
1002 .word vector_swi
1003
1004vector_rst:
1005 ARM( swi SYS_ERROR0 )
1006 THUMB( svc #0 )
1007 THUMB( nop )
1008 b vector_und
1009
991/* 1010/*
992 * Interrupt dispatcher 1011 * Interrupt dispatcher
993 */ 1012 */
@@ -1082,6 +1101,16 @@ __stubs_start:
1082 .align 5 1101 .align 5
1083 1102
1084/*============================================================================= 1103/*=============================================================================
1104 * Address exception handler
1105 *-----------------------------------------------------------------------------
1106 * These aren't too critical.
1107 * (they're not supposed to happen, and won't happen in 32-bit data mode).
1108 */
1109
1110vector_addrexcptn:
1111 b vector_addrexcptn
1112
1113/*=============================================================================
1085 * Undefined FIQs 1114 * Undefined FIQs
1086 *----------------------------------------------------------------------------- 1115 *-----------------------------------------------------------------------------
1087 * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC 1116 * Enter in FIQ mode, spsr = ANY CPSR, lr = ANY PC
@@ -1094,45 +1123,19 @@ __stubs_start:
1094vector_fiq: 1123vector_fiq:
1095 subs pc, lr, #4 1124 subs pc, lr, #4
1096 1125
1097/*============================================================================= 1126 .globl vector_fiq_offset
1098 * Address exception handler 1127 .equ vector_fiq_offset, vector_fiq
1099 *-----------------------------------------------------------------------------
1100 * These aren't too critical.
1101 * (they're not supposed to happen, and won't happen in 32-bit data mode).
1102 */
1103
1104vector_addrexcptn:
1105 b vector_addrexcptn
1106
1107/*
1108 * We group all the following data together to optimise
1109 * for CPUs with separate I & D caches.
1110 */
1111 .align 5
1112
1113.LCvswi:
1114 .word vector_swi
1115
1116 .globl __stubs_end
1117__stubs_end:
1118
1119 .equ stubs_offset, __vectors_start + 0x200 - __stubs_start
1120 1128
1121 .globl __vectors_start 1129 .section .vectors, "ax", %progbits
1122__vectors_start: 1130__vectors_start:
1123 ARM( swi SYS_ERROR0 ) 1131 W(b) vector_rst
1124 THUMB( svc #0 ) 1132 W(b) vector_und
1125 THUMB( nop ) 1133 W(ldr) pc, __vectors_start + 0x1000
1126 W(b) vector_und + stubs_offset 1134 W(b) vector_pabt
1127 W(ldr) pc, .LCvswi + stubs_offset 1135 W(b) vector_dabt
1128 W(b) vector_pabt + stubs_offset 1136 W(b) vector_addrexcptn
1129 W(b) vector_dabt + stubs_offset 1137 W(b) vector_irq
1130 W(b) vector_addrexcptn + stubs_offset 1138 W(b) vector_fiq
1131 W(b) vector_irq + stubs_offset
1132 W(b) vector_fiq + stubs_offset
1133
1134 .globl __vectors_end
1135__vectors_end:
1136 1139
1137 .data 1140 .data
1138 1141
diff --git a/arch/arm/kernel/entry-v7m.S b/arch/arm/kernel/entry-v7m.S
index e00621f1403f..52b26432c9a9 100644
--- a/arch/arm/kernel/entry-v7m.S
+++ b/arch/arm/kernel/entry-v7m.S
@@ -49,7 +49,7 @@ __irq_entry:
49 mov r1, sp 49 mov r1, sp
50 stmdb sp!, {lr} 50 stmdb sp!, {lr}
51 @ routine called with r0 = irq number, r1 = struct pt_regs * 51 @ routine called with r0 = irq number, r1 = struct pt_regs *
52 bl nvic_do_IRQ 52 bl nvic_handle_irq
53 53
54 pop {lr} 54 pop {lr}
55 @ 55 @
diff --git a/arch/arm/kernel/fiq.c b/arch/arm/kernel/fiq.c
index 2adda11f712f..25442f451148 100644
--- a/arch/arm/kernel/fiq.c
+++ b/arch/arm/kernel/fiq.c
@@ -47,6 +47,11 @@
47#include <asm/irq.h> 47#include <asm/irq.h>
48#include <asm/traps.h> 48#include <asm/traps.h>
49 49
50#define FIQ_OFFSET ({ \
51 extern void *vector_fiq_offset; \
52 (unsigned)&vector_fiq_offset; \
53 })
54
50static unsigned long no_fiq_insn; 55static unsigned long no_fiq_insn;
51 56
52/* Default reacquire function 57/* Default reacquire function
@@ -80,13 +85,16 @@ int show_fiq_list(struct seq_file *p, int prec)
80void set_fiq_handler(void *start, unsigned int length) 85void set_fiq_handler(void *start, unsigned int length)
81{ 86{
82#if defined(CONFIG_CPU_USE_DOMAINS) 87#if defined(CONFIG_CPU_USE_DOMAINS)
83 memcpy((void *)0xffff001c, start, length); 88 void *base = (void *)0xffff0000;
84#else 89#else
85 memcpy(vectors_page + 0x1c, start, length); 90 void *base = vectors_page;
86#endif 91#endif
87 flush_icache_range(0xffff001c, 0xffff001c + length); 92 unsigned offset = FIQ_OFFSET;
93
94 memcpy(base + offset, start, length);
95 flush_icache_range(0xffff0000 + offset, 0xffff0000 + offset + length);
88 if (!vectors_high()) 96 if (!vectors_high())
89 flush_icache_range(0x1c, 0x1c + length); 97 flush_icache_range(offset, offset + length);
90} 98}
91 99
92int claim_fiq(struct fiq_handler *f) 100int claim_fiq(struct fiq_handler *f)
@@ -144,6 +152,7 @@ EXPORT_SYMBOL(disable_fiq);
144 152
145void __init init_FIQ(int start) 153void __init init_FIQ(int start)
146{ 154{
147 no_fiq_insn = *(unsigned long *)0xffff001c; 155 unsigned offset = FIQ_OFFSET;
156 no_fiq_insn = *(unsigned long *)(0xffff0000 + offset);
148 fiq_start = start; 157 fiq_start = start;
149} 158}
diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S
index b361de143756..14235ba64a90 100644
--- a/arch/arm/kernel/head-nommu.S
+++ b/arch/arm/kernel/head-nommu.S
@@ -87,6 +87,7 @@ ENTRY(stext)
87ENDPROC(stext) 87ENDPROC(stext)
88 88
89#ifdef CONFIG_SMP 89#ifdef CONFIG_SMP
90 .text
90ENTRY(secondary_startup) 91ENTRY(secondary_startup)
91 /* 92 /*
92 * Common entry point for secondary CPUs. 93 * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index 9cf6063020ae..2c7cc1e03473 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -343,6 +343,7 @@ __turn_mmu_on_loc:
343 .long __turn_mmu_on_end 343 .long __turn_mmu_on_end
344 344
345#if defined(CONFIG_SMP) 345#if defined(CONFIG_SMP)
346 .text
346ENTRY(secondary_startup) 347ENTRY(secondary_startup)
347 /* 348 /*
348 * Common entry point for secondary CPUs. 349 * Common entry point for secondary CPUs.
diff --git a/arch/arm/kernel/hyp-stub.S b/arch/arm/kernel/hyp-stub.S
index 4910232c4833..797b1a6a4906 100644
--- a/arch/arm/kernel/hyp-stub.S
+++ b/arch/arm/kernel/hyp-stub.S
@@ -56,8 +56,8 @@ ENTRY(__boot_cpu_mode)
56 ldr \reg3, [\reg2] 56 ldr \reg3, [\reg2]
57 ldr \reg1, [\reg2, \reg3] 57 ldr \reg1, [\reg2, \reg3]
58 cmp \mode, \reg1 @ matches primary CPU boot mode? 58 cmp \mode, \reg1 @ matches primary CPU boot mode?
59 orrne r7, r7, #BOOT_CPU_MODE_MISMATCH 59 orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
60 strne r7, [r5, r6] @ record what happened and give up 60 strne \reg1, [\reg2, \reg3] @ record what happened and give up
61 .endm 61 .endm
62 62
63#else /* ZIMAGE */ 63#else /* ZIMAGE */
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
index d3ca4f6915af..536c85fe72a8 100644
--- a/arch/arm/kernel/process.c
+++ b/arch/arm/kernel/process.c
@@ -197,6 +197,7 @@ void machine_shutdown(void)
197 */ 197 */
198void machine_halt(void) 198void machine_halt(void)
199{ 199{
200 local_irq_disable();
200 smp_send_stop(); 201 smp_send_stop();
201 202
202 local_irq_disable(); 203 local_irq_disable();
@@ -211,6 +212,7 @@ void machine_halt(void)
211 */ 212 */
212void machine_power_off(void) 213void machine_power_off(void)
213{ 214{
215 local_irq_disable();
214 smp_send_stop(); 216 smp_send_stop();
215 217
216 if (pm_power_off) 218 if (pm_power_off)
@@ -230,6 +232,7 @@ void machine_power_off(void)
230 */ 232 */
231void machine_restart(char *cmd) 233void machine_restart(char *cmd)
232{ 234{
235 local_irq_disable();
233 smp_send_stop(); 236 smp_send_stop();
234 237
235 arm_pm_restart(reboot_mode, cmd); 238 arm_pm_restart(reboot_mode, cmd);
@@ -426,10 +429,11 @@ unsigned long arch_randomize_brk(struct mm_struct *mm)
426} 429}
427 430
428#ifdef CONFIG_MMU 431#ifdef CONFIG_MMU
432#ifdef CONFIG_KUSER_HELPERS
429/* 433/*
430 * The vectors page is always readable from user space for the 434 * The vectors page is always readable from user space for the
431 * atomic helpers and the signal restart code. Insert it into the 435 * atomic helpers. Insert it into the gate_vma so that it is visible
432 * gate_vma so that it is visible through ptrace and /proc/<pid>/mem. 436 * through ptrace and /proc/<pid>/mem.
433 */ 437 */
434static struct vm_area_struct gate_vma = { 438static struct vm_area_struct gate_vma = {
435 .vm_start = 0xffff0000, 439 .vm_start = 0xffff0000,
@@ -458,9 +462,48 @@ int in_gate_area_no_mm(unsigned long addr)
458{ 462{
459 return in_gate_area(NULL, addr); 463 return in_gate_area(NULL, addr);
460} 464}
465#define is_gate_vma(vma) ((vma) = &gate_vma)
466#else
467#define is_gate_vma(vma) 0
468#endif
461 469
462const char *arch_vma_name(struct vm_area_struct *vma) 470const char *arch_vma_name(struct vm_area_struct *vma)
463{ 471{
464 return (vma == &gate_vma) ? "[vectors]" : NULL; 472 return is_gate_vma(vma) ? "[vectors]" :
473 (vma->vm_mm && vma->vm_start == vma->vm_mm->context.sigpage) ?
474 "[sigpage]" : NULL;
475}
476
477static struct page *signal_page;
478extern struct page *get_signal_page(void);
479
480int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
481{
482 struct mm_struct *mm = current->mm;
483 unsigned long addr;
484 int ret;
485
486 if (!signal_page)
487 signal_page = get_signal_page();
488 if (!signal_page)
489 return -ENOMEM;
490
491 down_write(&mm->mmap_sem);
492 addr = get_unmapped_area(NULL, 0, PAGE_SIZE, 0, 0);
493 if (IS_ERR_VALUE(addr)) {
494 ret = addr;
495 goto up_fail;
496 }
497
498 ret = install_special_mapping(mm, addr, PAGE_SIZE,
499 VM_READ | VM_EXEC | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC,
500 &signal_page);
501
502 if (ret == 0)
503 mm->context.sigpage = addr;
504
505 up_fail:
506 up_write(&mm->mmap_sem);
507 return ret;
465} 508}
466#endif 509#endif
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 63af9a7ae512..afc2489ee13b 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -836,6 +836,8 @@ static int __init meminfo_cmp(const void *_a, const void *_b)
836void __init hyp_mode_check(void) 836void __init hyp_mode_check(void)
837{ 837{
838#ifdef CONFIG_ARM_VIRT_EXT 838#ifdef CONFIG_ARM_VIRT_EXT
839 sync_boot_mode();
840
839 if (is_hyp_mode_available()) { 841 if (is_hyp_mode_available()) {
840 pr_info("CPU: All CPU(s) started in HYP mode.\n"); 842 pr_info("CPU: All CPU(s) started in HYP mode.\n");
841 pr_info("CPU: Virtualization extensions available.\n"); 843 pr_info("CPU: Virtualization extensions available.\n");
@@ -971,6 +973,7 @@ static const char *hwcap_str[] = {
971 "vfpv4", 973 "vfpv4",
972 "idiva", 974 "idiva",
973 "idivt", 975 "idivt",
976 "vfpd32",
974 "lpae", 977 "lpae",
975 NULL 978 NULL
976}; 979};
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index 1c16c35c271a..ab3304225272 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#include <linux/errno.h> 10#include <linux/errno.h>
11#include <linux/random.h>
11#include <linux/signal.h> 12#include <linux/signal.h>
12#include <linux/personality.h> 13#include <linux/personality.h>
13#include <linux/uaccess.h> 14#include <linux/uaccess.h>
@@ -15,12 +16,11 @@
15 16
16#include <asm/elf.h> 17#include <asm/elf.h>
17#include <asm/cacheflush.h> 18#include <asm/cacheflush.h>
19#include <asm/traps.h>
18#include <asm/ucontext.h> 20#include <asm/ucontext.h>
19#include <asm/unistd.h> 21#include <asm/unistd.h>
20#include <asm/vfp.h> 22#include <asm/vfp.h>
21 23
22#include "signal.h"
23
24/* 24/*
25 * For ARM syscalls, we encode the syscall number into the instruction. 25 * For ARM syscalls, we encode the syscall number into the instruction.
26 */ 26 */
@@ -40,11 +40,13 @@
40#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)) 40#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
41#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)) 41#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
42 42
43const unsigned long sigreturn_codes[7] = { 43static const unsigned long sigreturn_codes[7] = {
44 MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN, 44 MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
45 MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN, 45 MOV_R7_NR_RT_SIGRETURN, SWI_SYS_RT_SIGRETURN, SWI_THUMB_RT_SIGRETURN,
46}; 46};
47 47
48static unsigned long signal_return_offset;
49
48#ifdef CONFIG_CRUNCH 50#ifdef CONFIG_CRUNCH
49static int preserve_crunch_context(struct crunch_sigframe __user *frame) 51static int preserve_crunch_context(struct crunch_sigframe __user *frame)
50{ 52{
@@ -400,14 +402,20 @@ setup_return(struct pt_regs *regs, struct ksignal *ksig,
400 __put_user(sigreturn_codes[idx+1], rc+1)) 402 __put_user(sigreturn_codes[idx+1], rc+1))
401 return 1; 403 return 1;
402 404
403 if ((cpsr & MODE32_BIT) && !IS_ENABLED(CONFIG_ARM_MPU)) { 405#ifdef CONFIG_MMU
406 if (cpsr & MODE32_BIT) {
407 struct mm_struct *mm = current->mm;
408
404 /* 409 /*
405 * 32-bit code can use the new high-page 410 * 32-bit code can use the signal return page
406 * signal return code support except when the MPU has 411 * except when the MPU has protected the vectors
407 * protected the vectors page from PL0 412 * page from PL0
408 */ 413 */
409 retcode = KERN_SIGRETURN_CODE + (idx << 2) + thumb; 414 retcode = mm->context.sigpage + signal_return_offset +
410 } else { 415 (idx << 2) + thumb;
416 } else
417#endif
418 {
411 /* 419 /*
412 * Ensure that the instruction cache sees 420 * Ensure that the instruction cache sees
413 * the return code written onto the stack. 421 * the return code written onto the stack.
@@ -608,3 +616,33 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall)
608 } while (thread_flags & _TIF_WORK_MASK); 616 } while (thread_flags & _TIF_WORK_MASK);
609 return 0; 617 return 0;
610} 618}
619
620struct page *get_signal_page(void)
621{
622 unsigned long ptr;
623 unsigned offset;
624 struct page *page;
625 void *addr;
626
627 page = alloc_pages(GFP_KERNEL, 0);
628
629 if (!page)
630 return NULL;
631
632 addr = page_address(page);
633
634 /* Give the signal return code some randomness */
635 offset = 0x200 + (get_random_int() & 0x7fc);
636 signal_return_offset = offset;
637
638 /*
639 * Copy signal return handlers into the vector page, and
640 * set sigreturn to be a pointer to these.
641 */
642 memcpy(addr + offset, sigreturn_codes, sizeof(sigreturn_codes));
643
644 ptr = (unsigned long)addr + offset;
645 flush_icache_range(ptr, ptr + sizeof(sigreturn_codes));
646
647 return page;
648}
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
deleted file mode 100644
index 5ff067b7c752..000000000000
--- a/arch/arm/kernel/signal.h
+++ /dev/null
@@ -1,12 +0,0 @@
1/*
2 * linux/arch/arm/kernel/signal.h
3 *
4 * Copyright (C) 2005-2009 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11
12extern const unsigned long sigreturn_codes[7];
diff --git a/arch/arm/kernel/smp_tlb.c b/arch/arm/kernel/smp_tlb.c
index a98b62dca2fa..c2edfff573c2 100644
--- a/arch/arm/kernel/smp_tlb.c
+++ b/arch/arm/kernel/smp_tlb.c
@@ -70,23 +70,6 @@ static inline void ipi_flush_bp_all(void *ignored)
70 local_flush_bp_all(); 70 local_flush_bp_all();
71} 71}
72 72
73#ifdef CONFIG_ARM_ERRATA_798181
74static int erratum_a15_798181(void)
75{
76 unsigned int midr = read_cpuid_id();
77
78 /* Cortex-A15 r0p0..r3p2 affected */
79 if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
80 return 0;
81 return 1;
82}
83#else
84static int erratum_a15_798181(void)
85{
86 return 0;
87}
88#endif
89
90static void ipi_flush_tlb_a15_erratum(void *arg) 73static void ipi_flush_tlb_a15_erratum(void *arg)
91{ 74{
92 dmb(); 75 dmb();
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index cab094c234ee..ab517fcce21b 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -35,8 +35,6 @@
35#include <asm/tls.h> 35#include <asm/tls.h>
36#include <asm/system_misc.h> 36#include <asm/system_misc.h>
37 37
38#include "signal.h"
39
40static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" }; 38static const char *handler[]= { "prefetch abort", "data abort", "address exception", "interrupt" };
41 39
42void *vectors_page; 40void *vectors_page;
@@ -800,15 +798,26 @@ void __init trap_init(void)
800 return; 798 return;
801} 799}
802 800
803static void __init kuser_get_tls_init(unsigned long vectors) 801#ifdef CONFIG_KUSER_HELPERS
802static void __init kuser_init(void *vectors)
804{ 803{
804 extern char __kuser_helper_start[], __kuser_helper_end[];
805 int kuser_sz = __kuser_helper_end - __kuser_helper_start;
806
807 memcpy(vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
808
805 /* 809 /*
806 * vectors + 0xfe0 = __kuser_get_tls 810 * vectors + 0xfe0 = __kuser_get_tls
807 * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8 811 * vectors + 0xfe8 = hardware TLS instruction at 0xffff0fe8
808 */ 812 */
809 if (tls_emu || has_tls_reg) 813 if (tls_emu || has_tls_reg)
810 memcpy((void *)vectors + 0xfe0, (void *)vectors + 0xfe8, 4); 814 memcpy(vectors + 0xfe0, vectors + 0xfe8, 4);
811} 815}
816#else
817static void __init kuser_init(void *vectors)
818{
819}
820#endif
812 821
813void __init early_trap_init(void *vectors_base) 822void __init early_trap_init(void *vectors_base)
814{ 823{
@@ -816,33 +825,30 @@ void __init early_trap_init(void *vectors_base)
816 unsigned long vectors = (unsigned long)vectors_base; 825 unsigned long vectors = (unsigned long)vectors_base;
817 extern char __stubs_start[], __stubs_end[]; 826 extern char __stubs_start[], __stubs_end[];
818 extern char __vectors_start[], __vectors_end[]; 827 extern char __vectors_start[], __vectors_end[];
819 extern char __kuser_helper_start[], __kuser_helper_end[]; 828 unsigned i;
820 int kuser_sz = __kuser_helper_end - __kuser_helper_start;
821 829
822 vectors_page = vectors_base; 830 vectors_page = vectors_base;
823 831
824 /* 832 /*
833 * Poison the vectors page with an undefined instruction. This
834 * instruction is chosen to be undefined for both ARM and Thumb
835 * ISAs. The Thumb version is an undefined instruction with a
836 * branch back to the undefined instruction.
837 */
838 for (i = 0; i < PAGE_SIZE / sizeof(u32); i++)
839 ((u32 *)vectors_base)[i] = 0xe7fddef1;
840
841 /*
825 * Copy the vectors, stubs and kuser helpers (in entry-armv.S) 842 * Copy the vectors, stubs and kuser helpers (in entry-armv.S)
826 * into the vector page, mapped at 0xffff0000, and ensure these 843 * into the vector page, mapped at 0xffff0000, and ensure these
827 * are visible to the instruction stream. 844 * are visible to the instruction stream.
828 */ 845 */
829 memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start); 846 memcpy((void *)vectors, __vectors_start, __vectors_end - __vectors_start);
830 memcpy((void *)vectors + 0x200, __stubs_start, __stubs_end - __stubs_start); 847 memcpy((void *)vectors + 0x1000, __stubs_start, __stubs_end - __stubs_start);
831 memcpy((void *)vectors + 0x1000 - kuser_sz, __kuser_helper_start, kuser_sz);
832 848
833 /* 849 kuser_init(vectors_base);
834 * Do processor specific fixups for the kuser helpers
835 */
836 kuser_get_tls_init(vectors);
837
838 /*
839 * Copy signal return handlers into the vector page, and
840 * set sigreturn to be a pointer to these.
841 */
842 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
843 sigreturn_codes, sizeof(sigreturn_codes));
844 850
845 flush_icache_range(vectors, vectors + PAGE_SIZE); 851 flush_icache_range(vectors, vectors + PAGE_SIZE * 2);
846 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 852 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
847#else /* ifndef CONFIG_CPU_V7M */ 853#else /* ifndef CONFIG_CPU_V7M */
848 /* 854 /*
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index fa25e4e425f6..7bcee5c9b604 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -148,6 +148,23 @@ SECTIONS
148 . = ALIGN(PAGE_SIZE); 148 . = ALIGN(PAGE_SIZE);
149 __init_begin = .; 149 __init_begin = .;
150#endif 150#endif
151 /*
152 * The vectors and stubs are relocatable code, and the
153 * only thing that matters is their relative offsets
154 */
155 __vectors_start = .;
156 .vectors 0 : AT(__vectors_start) {
157 *(.vectors)
158 }
159 . = __vectors_start + SIZEOF(.vectors);
160 __vectors_end = .;
161
162 __stubs_start = .;
163 .stubs 0x1000 : AT(__stubs_start) {
164 *(.stubs)
165 }
166 . = __stubs_start + SIZEOF(.stubs);
167 __stubs_end = .;
151 168
152 INIT_TEXT_SECTION(8) 169 INIT_TEXT_SECTION(8)
153 .exit.text : { 170 .exit.text : {
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index afbc439f11d4..4cdb61c54459 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
505/* 505/*
506 * Amplifiers on the board 506 * Amplifiers on the board
507 */ 507 */
508struct ths7303_platform_data ths7303_pdata = { 508static struct ths7303_platform_data ths7303_pdata = {
509 .ch_1 = 3, 509 .ch_1 = 3,
510 .ch_2 = 3, 510 .ch_2 = 3,
511 .ch_3 = 3, 511 .ch_3 = 3,
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 42ef53f62c6c..86100d179694 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
860 }, 860 },
861}; 861};
862 862
863struct venc_platform_data dm355_venc_pdata = { 863static struct venc_platform_data dm355_venc_pdata = {
864 .setup_pinmux = dm355_vpbe_setup_pinmux, 864 .setup_pinmux = dm355_vpbe_setup_pinmux,
865 .setup_clock = dm355_venc_setup_clock, 865 .setup_clock = dm355_venc_setup_clock,
866}; 866};
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index fa7af5eda52d..dad28029ba9b 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
1349 }, 1349 },
1350}; 1350};
1351 1351
1352struct venc_platform_data dm365_venc_pdata = { 1352static struct venc_platform_data dm365_venc_pdata = {
1353 .setup_pinmux = dm365_vpbe_setup_pinmux, 1353 .setup_pinmux = dm365_vpbe_setup_pinmux,
1354 .setup_clock = dm365_venc_setup_clock, 1354 .setup_clock = dm365_venc_setup_clock,
1355}; 1355};
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 855d4a7b462d..5952e68c76c4 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -92,6 +92,7 @@ config SOC_EXYNOS5440
92 bool "SAMSUNG EXYNOS5440" 92 bool "SAMSUNG EXYNOS5440"
93 default y 93 default y
94 depends on ARCH_EXYNOS5 94 depends on ARCH_EXYNOS5
95 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
95 select ARCH_HAS_OPP 96 select ARCH_HAS_OPP
96 select HAVE_ARM_ARCH_TIMER 97 select HAVE_ARM_ARCH_TIMER
97 select AUTO_ZRELADDR 98 select AUTO_ZRELADDR
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index e970a7a4e278..53696154aead 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -14,7 +14,7 @@ obj- :=
14 14
15obj-$(CONFIG_ARCH_EXYNOS) += common.o 15obj-$(CONFIG_ARCH_EXYNOS) += common.o
16 16
17obj-$(CONFIG_PM) += pm.o 17obj-$(CONFIG_S5P_PM) += pm.o
18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o 18obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
19obj-$(CONFIG_CPU_IDLE) += cpuidle.o 19obj-$(CONFIG_CPU_IDLE) += cpuidle.o
20 20
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 164685bd25c8..ba95e5db2501 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
58 58
59static void exynos4_map_io(void); 59static void exynos4_map_io(void);
60static void exynos5_map_io(void); 60static void exynos5_map_io(void);
61static void exynos5440_map_io(void);
62static int exynos_init(void); 61static int exynos_init(void);
63 62
64static struct cpu_table cpu_ids[] __initdata = { 63static struct cpu_table cpu_ids[] __initdata = {
@@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
95 }, { 94 }, {
96 .idcode = EXYNOS5440_SOC_ID, 95 .idcode = EXYNOS5440_SOC_ID,
97 .idmask = EXYNOS5_SOC_MASK, 96 .idmask = EXYNOS5_SOC_MASK,
98 .map_io = exynos5440_map_io,
99 .init = exynos_init, 97 .init = exynos_init,
100 .name = name_exynos5440, 98 .name = name_exynos5440,
101 }, 99 },
@@ -150,11 +148,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
150 .length = SZ_64K, 148 .length = SZ_64K,
151 .type = MT_DEVICE, 149 .type = MT_DEVICE,
152 }, { 150 }, {
153 .virtual = (unsigned long)S3C_VA_UART,
154 .pfn = __phys_to_pfn(EXYNOS4_PA_UART),
155 .length = SZ_512K,
156 .type = MT_DEVICE,
157 }, {
158 .virtual = (unsigned long)S5P_VA_CMU, 151 .virtual = (unsigned long)S5P_VA_CMU,
159 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 152 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
160 .length = SZ_128K, 153 .length = SZ_128K,
@@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
268 .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), 261 .pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
269 .length = SZ_64K, 262 .length = SZ_64K,
270 .type = MT_DEVICE, 263 .type = MT_DEVICE,
271 }, {
272 .virtual = (unsigned long)S3C_VA_UART,
273 .pfn = __phys_to_pfn(EXYNOS5_PA_UART),
274 .length = SZ_512K,
275 .type = MT_DEVICE,
276 },
277};
278
279static struct map_desc exynos5440_iodesc0[] __initdata = {
280 {
281 .virtual = (unsigned long)S3C_VA_UART,
282 .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
283 .length = SZ_512K,
284 .type = MT_DEVICE,
285 }, 264 },
286}; 265};
287 266
@@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
388 iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); 367 iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
389} 368}
390 369
391static void __init exynos5440_map_io(void)
392{
393 iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
394}
395
396void __init exynos_init_time(void) 370void __init exynos_init_time(void)
397{ 371{
398 of_clk_init(NULL); 372 of_clk_init(NULL);
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 3e156bcddcb4..972490fc09d6 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -97,6 +97,5 @@ struct exynos_pmu_conf {
97}; 97};
98 98
99extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); 99extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
100extern void s3c_cpu_resume(void);
101 100
102#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ 101#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index 17a18ff3d71e..225ee8431c72 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -25,6 +25,7 @@
25#include <mach/regs-pmu.h> 25#include <mach/regs-pmu.h>
26 26
27#include <plat/cpu.h> 27#include <plat/cpu.h>
28#include <plat/pm.h>
28 29
29#include "common.h" 30#include "common.h"
30 31
diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h
index 374ef2cf7152..2a4cdb7cb326 100644
--- a/arch/arm/mach-exynos/include/mach/memory.h
+++ b/arch/arm/mach-exynos/include/mach/memory.h
@@ -15,8 +15,13 @@
15 15
16#define PLAT_PHYS_OFFSET UL(0x40000000) 16#define PLAT_PHYS_OFFSET UL(0x40000000)
17 17
18#ifndef CONFIG_ARM_LPAE
18/* Maximum of 256MiB in one bank */ 19/* Maximum of 256MiB in one bank */
19#define MAX_PHYSMEM_BITS 32 20#define MAX_PHYSMEM_BITS 32
20#define SECTION_SIZE_BITS 28 21#define SECTION_SIZE_BITS 28
22#else
23#define MAX_PHYSMEM_BITS 36
24#define SECTION_SIZE_BITS 31
25#endif
21 26
22#endif /* __ASM_ARCH_MEMORY_H */ 27#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index 41c20692a13f..c679db577269 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
217 struct clk *pll_base; 217 struct clk *pll_base;
218 unsigned int tmp; 218 unsigned int tmp;
219 219
220 if (soc_is_exynos5440())
221 return 0;
222
220 s3c_pm_init(); 223 s3c_pm_init();
221 224
222 /* All wakeup disable */ 225 /* All wakeup disable */
@@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
340 343
341static __init int exynos_pm_syscore_init(void) 344static __init int exynos_pm_syscore_init(void)
342{ 345{
346 if (soc_is_exynos5440())
347 return 0;
348
343 register_syscore_ops(&exynos_pm_syscore_ops); 349 register_syscore_ops(&exynos_pm_syscore_ops);
344 return 0; 350 return 0;
345} 351}
diff --git a/arch/arm/mach-footbridge/dc21285.c b/arch/arm/mach-footbridge/dc21285.c
index a7cd2cf5e08d..3490a24f969e 100644
--- a/arch/arm/mach-footbridge/dc21285.c
+++ b/arch/arm/mach-footbridge/dc21285.c
@@ -276,8 +276,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
276 276
277 sys->mem_offset = DC21285_PCI_MEM; 277 sys->mem_offset = DC21285_PCI_MEM;
278 278
279 pci_ioremap_io(0, DC21285_PCI_IO);
280
281 pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset); 279 pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
282 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset); 280 pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
283 281
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc5d6becd8c7..88815795fe26 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -115,6 +115,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
115{ 115{
116 struct resource *res; 116 struct resource *res;
117 int reg = -1; 117 int reg = -1;
118 u32 val;
118 struct device *dev = __dev; 119 struct device *dev = __dev;
119 120
120 if (event != BUS_NOTIFY_ADD_DEVICE) 121 if (event != BUS_NOTIFY_ADD_DEVICE)
@@ -141,10 +142,10 @@ static int highbank_platform_notifier(struct notifier_block *nb,
141 return NOTIFY_DONE; 142 return NOTIFY_DONE;
142 143
143 if (of_property_read_bool(dev->of_node, "dma-coherent")) { 144 if (of_property_read_bool(dev->of_node, "dma-coherent")) {
144 writel(0xff31, sregs_base + reg); 145 val = readl(sregs_base + reg);
146 writel(val | 0xff01, sregs_base + reg);
145 set_dma_ops(dev, &arm_coherent_dma_ops); 147 set_dma_ops(dev, &arm_coherent_dma_ops);
146 } else 148 }
147 writel(0, sregs_base + reg);
148 149
149 return NOTIFY_OK; 150 return NOTIFY_OK;
150} 151}
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 4282e99f5ca1..86567d980b07 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -199,7 +199,8 @@ static const char *pcie_axi_sels[] = { "axi", "ahb", };
199static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", }; 199static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
200static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", }; 200static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
201static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", }; 201static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
202static const char *emi_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 202static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
203static const char *emi_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
203static const char *vdo_axi_sels[] = { "axi", "ahb", }; 204static const char *vdo_axi_sels[] = { "axi", "ahb", };
204static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", }; 205static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
205static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div", 206static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
@@ -392,7 +393,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
392 clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels)); 393 clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
393 clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels)); 394 clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
394 clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels)); 395 clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels));
395 clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_sels, ARRAY_SIZE(emi_sels)); 396 clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_slow_sels, ARRAY_SIZE(emi_slow_sels));
396 clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels)); 397 clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels));
397 clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels)); 398 clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels));
398 clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels)); 399 clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels));
diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c
index d617c0b7c809..b169a396d93b 100644
--- a/arch/arm/mach-imx/clk-vf610.c
+++ b/arch/arm/mach-imx/clk-vf610.c
@@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7); 183 clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24); 184 clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23); 185 clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
186 clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
187 clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
186 188
187 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7)); 189 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
188 190
diff --git a/arch/arm/mach-imx/mx27.h b/arch/arm/mach-imx/mx27.h
index e074616d54ca..8a65f192e7f3 100644
--- a/arch/arm/mach-imx/mx27.h
+++ b/arch/arm/mach-imx/mx27.h
@@ -135,7 +135,7 @@
135#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4) 135#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4)
136#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5) 136#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5)
137#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6) 137#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6)
138#define MX27_INT_SDHC (NR_IRQS_LEGACY + 7) 138#define MX27_INT_MSHC (NR_IRQS_LEGACY + 7)
139#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8) 139#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8)
140#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9) 140#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9)
141#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10) 141#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10)
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index fe4d9ff93a7e..b661c5c2870a 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -49,7 +49,7 @@ static const char *keystone_match[] __initconst = {
49 NULL, 49 NULL,
50}; 50};
51 51
52void keystone_restart(char mode, const char *cmd) 52void keystone_restart(enum reboot_mode mode, const char *cmd)
53{ 53{
54 u32 val; 54 u32 val;
55 55
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 3d6ee149d3d7..76170dd4d88f 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -61,7 +61,7 @@ config SOC_OMAP5
61 select HAVE_SMP 61 select HAVE_SMP
62 select COMMON_CLK 62 select COMMON_CLK
63 select HAVE_ARM_ARCH_TIMER 63 select HAVE_ARM_ARCH_TIMER
64 select ARM_ERRATA_798181 64 select ARM_ERRATA_798181 if SMP
65 65
66config SOC_AM33XX 66config SOC_AM33XX
67 bool "AM33XX support" 67 bool "AM33XX support"
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index e5fbfed69aa2..be5d005ebad2 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -15,6 +15,7 @@
15#include <linux/of_irq.h> 15#include <linux/of_irq.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/irqdomain.h> 17#include <linux/irqdomain.h>
18#include <linux/clk.h>
18 19
19#include <asm/mach/arch.h> 20#include <asm/mach/arch.h>
20 21
@@ -35,6 +36,21 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
35 { } 36 { }
36}; 37};
37 38
39/*
40 * Create alias for USB host PHY clock.
41 * Remove this when clock phandle can be provided via DT
42 */
43static void __init legacy_init_ehci_clk(char *clkname)
44{
45 int ret;
46
47 ret = clk_add_alias("main_clk", NULL, clkname, NULL);
48 if (ret) {
49 pr_err("%s:Failed to add main_clk alias to %s :%d\n",
50 __func__, clkname, ret);
51 }
52}
53
38static void __init omap_generic_init(void) 54static void __init omap_generic_init(void)
39{ 55{
40 omap_sdrc_init(NULL, NULL); 56 omap_sdrc_init(NULL, NULL);
@@ -45,10 +61,15 @@ static void __init omap_generic_init(void)
45 * HACK: call display setup code for selected boards to enable omapdss. 61 * HACK: call display setup code for selected boards to enable omapdss.
46 * This will be removed when omapdss supports DT. 62 * This will be removed when omapdss supports DT.
47 */ 63 */
48 if (of_machine_is_compatible("ti,omap4-panda")) 64 if (of_machine_is_compatible("ti,omap4-panda")) {
49 omap4_panda_display_init_of(); 65 omap4_panda_display_init_of();
66 legacy_init_ehci_clk("auxclk3_ck");
67
68 }
50 else if (of_machine_is_compatible("ti,omap4-sdp")) 69 else if (of_machine_is_compatible("ti,omap4-sdp"))
51 omap_4430sdp_display_init_of(); 70 omap_4430sdp_display_init_of();
71 else if (of_machine_is_compatible("ti,omap5-uevm"))
72 legacy_init_ehci_clk("auxclk1_ck");
52} 73}
53 74
54#ifdef CONFIG_SOC_OMAP2420 75#ifdef CONFIG_SOC_OMAP2420
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index f6726bb4eb95..3a3362fa793e 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -477,16 +477,24 @@ static int em_x270_usb_hub_init(void)
477 /* USB Hub power-on and reset */ 477 /* USB Hub power-on and reset */
478 gpio_direction_output(usb_hub_reset, 1); 478 gpio_direction_output(usb_hub_reset, 1);
479 gpio_direction_output(GPIO9_USB_VBUS_EN, 0); 479 gpio_direction_output(GPIO9_USB_VBUS_EN, 0);
480 regulator_enable(em_x270_usb_ldo); 480 err = regulator_enable(em_x270_usb_ldo);
481 if (err)
482 goto err_free_rst_gpio;
483
481 gpio_set_value(usb_hub_reset, 0); 484 gpio_set_value(usb_hub_reset, 0);
482 gpio_set_value(usb_hub_reset, 1); 485 gpio_set_value(usb_hub_reset, 1);
483 regulator_disable(em_x270_usb_ldo); 486 regulator_disable(em_x270_usb_ldo);
484 regulator_enable(em_x270_usb_ldo); 487 err = regulator_enable(em_x270_usb_ldo);
488 if (err)
489 goto err_free_rst_gpio;
490
485 gpio_set_value(usb_hub_reset, 0); 491 gpio_set_value(usb_hub_reset, 0);
486 gpio_set_value(GPIO9_USB_VBUS_EN, 1); 492 gpio_set_value(GPIO9_USB_VBUS_EN, 1);
487 493
488 return 0; 494 return 0;
489 495
496err_free_rst_gpio:
497 gpio_free(usb_hub_reset);
490err_free_vbus_gpio: 498err_free_vbus_gpio:
491 gpio_free(GPIO9_USB_VBUS_EN); 499 gpio_free(GPIO9_USB_VBUS_EN);
492err_free_usb_ldo: 500err_free_usb_ldo:
@@ -592,7 +600,7 @@ err_irq:
592 return err; 600 return err;
593} 601}
594 602
595static void em_x270_mci_setpower(struct device *dev, unsigned int vdd) 603static int em_x270_mci_setpower(struct device *dev, unsigned int vdd)
596{ 604{
597 struct pxamci_platform_data* p_d = dev->platform_data; 605 struct pxamci_platform_data* p_d = dev->platform_data;
598 606
@@ -600,10 +608,11 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
600 int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000; 608 int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000;
601 609
602 regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV); 610 regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV);
603 regulator_enable(em_x270_sdio_ldo); 611 return regulator_enable(em_x270_sdio_ldo);
604 } else { 612 } else {
605 regulator_disable(em_x270_sdio_ldo); 613 regulator_disable(em_x270_sdio_ldo);
606 } 614 }
615 return 0;
607} 616}
608 617
609static void em_x270_mci_exit(struct device *dev, void *data) 618static void em_x270_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index d2c652318376..dd70343c8708 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -408,7 +408,7 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in
408 return err; 408 return err;
409} 409}
410 410
411static void mainstone_mci_setpower(struct device *dev, unsigned int vdd) 411static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
412{ 412{
413 struct pxamci_platform_data* p_d = dev->platform_data; 413 struct pxamci_platform_data* p_d = dev->platform_data;
414 414
@@ -420,6 +420,7 @@ static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
420 printk(KERN_DEBUG "%s: off\n", __func__); 420 printk(KERN_DEBUG "%s: off\n", __func__);
421 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; 421 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
422 } 422 }
423 return 0;
423} 424}
424 425
425static void mainstone_mci_exit(struct device *dev, void *data) 426static void mainstone_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index fb7f1d1627dc..13e5b00eae90 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -335,7 +335,7 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
335 return err; 335 return err;
336} 336}
337 337
338static void pcm990_mci_setpower(struct device *dev, unsigned int vdd) 338static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
339{ 339{
340 struct pxamci_platform_data *p_d = dev->platform_data; 340 struct pxamci_platform_data *p_d = dev->platform_data;
341 u8 val; 341 u8 val;
@@ -348,6 +348,7 @@ static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
348 val &= ~PCM990_CTRL_MMC2PWR; 348 val &= ~PCM990_CTRL_MMC2PWR;
349 349
350 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5); 350 pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
351 return 0;
351} 352}
352 353
353static void pcm990_mci_exit(struct device *dev, void *data) 354static void pcm990_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index 711d37e26bd8..aedf053a1de5 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -258,7 +258,7 @@ err_free_2:
258 return err; 258 return err;
259} 259}
260 260
261static void poodle_mci_setpower(struct device *dev, unsigned int vdd) 261static int poodle_mci_setpower(struct device *dev, unsigned int vdd)
262{ 262{
263 struct pxamci_platform_data* p_d = dev->platform_data; 263 struct pxamci_platform_data* p_d = dev->platform_data;
264 264
@@ -270,6 +270,8 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
270 gpio_set_value(POODLE_GPIO_SD_PWR1, 0); 270 gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
271 gpio_set_value(POODLE_GPIO_SD_PWR, 0); 271 gpio_set_value(POODLE_GPIO_SD_PWR, 0);
272 } 272 }
273
274 return 0;
273} 275}
274 276
275static void poodle_mci_exit(struct device *dev, void *data) 277static void poodle_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index 2125df0444e7..4c29173026e8 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -598,7 +598,7 @@ static inline void spitz_spi_init(void) {}
598 * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to 598 * NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to
599 * give the card a chance to fully insert/eject. 599 * give the card a chance to fully insert/eject.
600 */ 600 */
601static void spitz_mci_setpower(struct device *dev, unsigned int vdd) 601static int spitz_mci_setpower(struct device *dev, unsigned int vdd)
602{ 602{
603 struct pxamci_platform_data* p_d = dev->platform_data; 603 struct pxamci_platform_data* p_d = dev->platform_data;
604 604
@@ -606,6 +606,8 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
606 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V); 606 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V);
607 else 607 else
608 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0); 608 spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0);
609
610 return 0;
609} 611}
610 612
611static struct pxamci_platform_data spitz_mci_platform_data = { 613static struct pxamci_platform_data spitz_mci_platform_data = {
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 88fde43c948c..62aea3e835f3 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -734,9 +734,10 @@ static int stargate2_mci_init(struct device *dev,
734 * 734 *
735 * Very simple control. Either it is on or off and is controlled by 735 * Very simple control. Either it is on or off and is controlled by
736 * a gpio pin */ 736 * a gpio pin */
737static void stargate2_mci_setpower(struct device *dev, unsigned int vdd) 737static int stargate2_mci_setpower(struct device *dev, unsigned int vdd)
738{ 738{
739 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd); 739 gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
740 return 0;
740} 741}
741 742
742static void stargate2_mci_exit(struct device *dev, void *data) 743static void stargate2_mci_exit(struct device *dev, void *data)
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index 7791ac76f945..dba2173e70f3 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -30,7 +30,6 @@ config CPU_S3C2410
30 select S3C2410_CLOCK 30 select S3C2410_CLOCK
31 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ 31 select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ
32 select S3C2410_PM if PM 32 select S3C2410_PM if PM
33 select SAMSUNG_HRT
34 select SAMSUNG_WDT_RESET 33 select SAMSUNG_WDT_RESET
35 help 34 help
36 Support for S3C2410 and S3C2410A family from the S3C24XX line 35 Support for S3C2410 and S3C2410A family from the S3C24XX line
@@ -42,7 +41,6 @@ config CPU_S3C2412
42 select CPU_LLSERIAL_S3C2440 41 select CPU_LLSERIAL_S3C2440
43 select S3C2412_DMA if S3C24XX_DMA 42 select S3C2412_DMA if S3C24XX_DMA
44 select S3C2412_PM if PM 43 select S3C2412_PM if PM
45 select SAMSUNG_HRT
46 help 44 help
47 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line 45 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
48 46
@@ -54,7 +52,6 @@ config CPU_S3C2416
54 select S3C2443_COMMON 52 select S3C2443_COMMON
55 select S3C2443_DMA if S3C24XX_DMA 53 select S3C2443_DMA if S3C24XX_DMA
56 select SAMSUNG_CLKSRC 54 select SAMSUNG_CLKSRC
57 select SAMSUNG_HRT
58 help 55 help
59 Support for the S3C2416 SoC from the S3C24XX line 56 Support for the S3C2416 SoC from the S3C24XX line
60 57
@@ -65,7 +62,6 @@ config CPU_S3C2440
65 select S3C2410_CLOCK 62 select S3C2410_CLOCK
66 select S3C2410_PM if PM 63 select S3C2410_PM if PM
67 select S3C2440_DMA if S3C24XX_DMA 64 select S3C2440_DMA if S3C24XX_DMA
68 select SAMSUNG_HRT
69 help 65 help
70 Support for S3C2440 Samsung Mobile CPU based systems. 66 Support for S3C2440 Samsung Mobile CPU based systems.
71 67
@@ -75,7 +71,6 @@ config CPU_S3C2442
75 select CPU_LLSERIAL_S3C2440 71 select CPU_LLSERIAL_S3C2440
76 select S3C2410_CLOCK 72 select S3C2410_CLOCK
77 select S3C2410_PM if PM 73 select S3C2410_PM if PM
78 select SAMSUNG_HRT
79 help 74 help
80 Support for S3C2442 Samsung Mobile CPU based systems. 75 Support for S3C2442 Samsung Mobile CPU based systems.
81 76
@@ -91,7 +86,6 @@ config CPU_S3C2443
91 select S3C2443_COMMON 86 select S3C2443_COMMON
92 select S3C2443_DMA if S3C24XX_DMA 87 select S3C2443_DMA if S3C24XX_DMA
93 select SAMSUNG_CLKSRC 88 select SAMSUNG_CLKSRC
94 select SAMSUNG_HRT
95 help 89 help
96 Support for the S3C2443 SoC from the S3C24XX line 90 Support for the S3C2443 SoC from the S3C24XX line
97 91
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c
index 34fffdf6fc1d..d39d3c787580 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2410.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c
@@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = {
119 } 119 }
120}; 120};
121 121
122static struct clk init_clocks[] = { 122static struct clk clk_lcd = {
123 { 123 .name = "lcd",
124 .name = "lcd", 124 .parent = &clk_h,
125 .parent = &clk_h, 125 .enable = s3c2410_clkcon_enable,
126 .enable = s3c2410_clkcon_enable, 126 .ctrlbit = S3C2410_CLKCON_LCDC,
127 .ctrlbit = S3C2410_CLKCON_LCDC, 127};
128 }, { 128
129 .name = "gpio", 129static struct clk clk_gpio = {
130 .parent = &clk_p, 130 .name = "gpio",
131 .enable = s3c2410_clkcon_enable, 131 .parent = &clk_p,
132 .ctrlbit = S3C2410_CLKCON_GPIO, 132 .enable = s3c2410_clkcon_enable,
133 }, { 133 .ctrlbit = S3C2410_CLKCON_GPIO,
134 .name = "usb-host", 134};
135 .parent = &clk_h, 135
136 .enable = s3c2410_clkcon_enable, 136static struct clk clk_usb_host = {
137 .ctrlbit = S3C2410_CLKCON_USBH, 137 .name = "usb-host",
138 }, { 138 .parent = &clk_h,
139 .name = "usb-device", 139 .enable = s3c2410_clkcon_enable,
140 .parent = &clk_h, 140 .ctrlbit = S3C2410_CLKCON_USBH,
141 .enable = s3c2410_clkcon_enable, 141};
142 .ctrlbit = S3C2410_CLKCON_USBD, 142
143 }, { 143static struct clk clk_usb_device = {
144 .name = "timers", 144 .name = "usb-device",
145 .parent = &clk_p, 145 .parent = &clk_h,
146 .enable = s3c2410_clkcon_enable, 146 .enable = s3c2410_clkcon_enable,
147 .ctrlbit = S3C2410_CLKCON_PWMT, 147 .ctrlbit = S3C2410_CLKCON_USBD,
148 }, { 148};
149 .name = "uart", 149
150 .devname = "s3c2410-uart.0", 150static struct clk clk_timers = {
151 .parent = &clk_p, 151 .name = "timers",
152 .enable = s3c2410_clkcon_enable, 152 .parent = &clk_p,
153 .ctrlbit = S3C2410_CLKCON_UART0, 153 .enable = s3c2410_clkcon_enable,
154 }, { 154 .ctrlbit = S3C2410_CLKCON_PWMT,
155 .name = "uart", 155};
156 .devname = "s3c2410-uart.1", 156
157 .parent = &clk_p, 157struct clk s3c24xx_clk_uart0 = {
158 .enable = s3c2410_clkcon_enable, 158 .name = "uart",
159 .ctrlbit = S3C2410_CLKCON_UART1, 159 .devname = "s3c2410-uart.0",
160 }, { 160 .parent = &clk_p,
161 .name = "uart", 161 .enable = s3c2410_clkcon_enable,
162 .devname = "s3c2410-uart.2", 162 .ctrlbit = S3C2410_CLKCON_UART0,
163 .parent = &clk_p, 163};
164 .enable = s3c2410_clkcon_enable, 164
165 .ctrlbit = S3C2410_CLKCON_UART2, 165struct clk s3c24xx_clk_uart1 = {
166 }, { 166 .name = "uart",
167 .name = "rtc", 167 .devname = "s3c2410-uart.1",
168 .parent = &clk_p, 168 .parent = &clk_p,
169 .enable = s3c2410_clkcon_enable, 169 .enable = s3c2410_clkcon_enable,
170 .ctrlbit = S3C2410_CLKCON_RTC, 170 .ctrlbit = S3C2410_CLKCON_UART1,
171 }, { 171};
172 .name = "watchdog", 172
173 .parent = &clk_p, 173struct clk s3c24xx_clk_uart2 = {
174 .ctrlbit = 0, 174 .name = "uart",
175 }, { 175 .devname = "s3c2410-uart.2",
176 .name = "usb-bus-host", 176 .parent = &clk_p,
177 .parent = &clk_usb_bus, 177 .enable = s3c2410_clkcon_enable,
178 }, { 178 .ctrlbit = S3C2410_CLKCON_UART2,
179 .name = "usb-bus-gadget", 179};
180 .parent = &clk_usb_bus, 180
181 }, 181static struct clk clk_rtc = {
182 .name = "rtc",
183 .parent = &clk_p,
184 .enable = s3c2410_clkcon_enable,
185 .ctrlbit = S3C2410_CLKCON_RTC,
186};
187
188static struct clk clk_watchdog = {
189 .name = "watchdog",
190 .parent = &clk_p,
191 .ctrlbit = 0,
192};
193
194static struct clk clk_usb_bus_host = {
195 .name = "usb-bus-host",
196 .parent = &clk_usb_bus,
197};
198
199static struct clk clk_usb_bus_gadget = {
200 .name = "usb-bus-gadget",
201 .parent = &clk_usb_bus,
202};
203
204static struct clk *init_clocks[] = {
205 &clk_lcd,
206 &clk_gpio,
207 &clk_usb_host,
208 &clk_usb_device,
209 &clk_timers,
210 &s3c24xx_clk_uart0,
211 &s3c24xx_clk_uart1,
212 &s3c24xx_clk_uart2,
213 &clk_rtc,
214 &clk_watchdog,
215 &clk_usb_bus_host,
216 &clk_usb_bus_gadget,
182}; 217};
183 218
184/* s3c2410_baseclk_add() 219/* s3c2410_baseclk_add()
@@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void)
195{ 230{
196 unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); 231 unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
197 unsigned long clkcon = __raw_readl(S3C2410_CLKCON); 232 unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
198 struct clk *clkp;
199 struct clk *xtal; 233 struct clk *xtal;
200 int ret; 234 int ret;
201 int ptr; 235 int ptr;
@@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void)
207 241
208 /* register clocks from clock array */ 242 /* register clocks from clock array */
209 243
210 clkp = init_clocks; 244 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
211 for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { 245 struct clk *clkp = init_clocks[ptr];
246
212 /* ensure that we note the clock state */ 247 /* ensure that we note the clock state */
213 248
214 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; 249 clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
@@ -246,6 +281,5 @@ int __init s3c2410_baseclk_add(void)
246 (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on", 281 (clkslow & S3C2410_CLKSLOW_MPLL_OFF) ? "off" : "on",
247 (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on"); 282 (clkslow & S3C2410_CLKSLOW_UCLK_OFF) ? "off" : "on");
248 283
249 s3c_pwmclk_init();
250 return 0; 284 return 0;
251} 285}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2412.c b/arch/arm/mach-s3c24xx/clock-s3c2412.c
index 2cc017da88fe..d8f253f2b486 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2412.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2412.c
@@ -757,6 +757,5 @@ int __init s3c2412_baseclk_add(void)
757 } 757 }
758 758
759 clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup)); 759 clkdev_add_table(s3c2412_clk_lookup, ARRAY_SIZE(s3c2412_clk_lookup));
760 s3c_pwmclk_init();
761 return 0; 760 return 0;
762} 761}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2416.c b/arch/arm/mach-s3c24xx/clock-s3c2416.c
index 036056cea57c..d421a72920a5 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2416.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2416.c
@@ -168,6 +168,4 @@ void __init s3c2416_init_clocks(int xtal)
168 s3c24xx_register_clock(&hsmmc0_clk); 168 s3c24xx_register_clock(&hsmmc0_clk);
169 clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup)); 169 clkdev_add_table(s3c2416_clk_lookup, ARRAY_SIZE(s3c2416_clk_lookup));
170 170
171 s3c_pwmclk_init();
172
173} 171}
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 1069b5680826..aaf006d1d6dc 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
166 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), 166 CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
167 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), 167 CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
168 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), 168 CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
169 CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
170 CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
171 CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
169 CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll), 172 CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
170}; 173};
171 174
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2443.c b/arch/arm/mach-s3c24xx/clock-s3c2443.c
index 0a53051b0787..76cd31f7804e 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2443.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2443.c
@@ -209,6 +209,4 @@ void __init s3c2443_init_clocks(int xtal)
209 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 209 s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
210 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); 210 s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
211 clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup)); 211 clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));
212
213 s3c_pwmclk_init();
214} 212}
diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c24xx/common.c
index c157103ed8eb..457261c98433 100644
--- a/arch/arm/mach-s3c24xx/common.c
+++ b/arch/arm/mach-s3c24xx/common.c
@@ -27,6 +27,7 @@
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/ioport.h> 28#include <linux/ioport.h>
29#include <linux/serial_core.h> 29#include <linux/serial_core.h>
30#include <clocksource/samsung_pwm.h>
30#include <linux/platform_device.h> 31#include <linux/platform_device.h>
31#include <linux/delay.h> 32#include <linux/delay.h>
32#include <linux/io.h> 33#include <linux/io.h>
@@ -49,6 +50,7 @@
49#include <plat/clock.h> 50#include <plat/clock.h>
50#include <plat/cpu-freq.h> 51#include <plat/cpu-freq.h>
51#include <plat/pll.h> 52#include <plat/pll.h>
53#include <plat/pwm-core.h>
52 54
53#include "common.h" 55#include "common.h"
54 56
@@ -216,6 +218,13 @@ static void s3c24xx_default_idle(void)
216 S3C2410_CLKCON); 218 S3C2410_CLKCON);
217} 219}
218 220
221static struct samsung_pwm_variant s3c24xx_pwm_variant = {
222 .bits = 16,
223 .div_base = 1,
224 .has_tint_cstat = false,
225 .tclk_mask = (1 << 4),
226};
227
219void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) 228void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
220{ 229{
221 arm_pm_idle = s3c24xx_default_idle; 230 arm_pm_idle = s3c24xx_default_idle;
@@ -232,6 +241,24 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size)
232 s3c24xx_init_cpu(); 241 s3c24xx_init_cpu();
233 242
234 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 243 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
244
245 samsung_pwm_set_platdata(&s3c24xx_pwm_variant);
246}
247
248void __init samsung_set_timer_source(unsigned int event, unsigned int source)
249{
250 s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
251 s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
252}
253
254void __init samsung_timer_init(void)
255{
256 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
257 IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4,
258 };
259
260 samsung_pwm_clocksource_init(S3C_VA_TIMER,
261 timer_irqs, &s3c24xx_pwm_variant);
235} 262}
236 263
237/* Serial port registrations */ 264/* Serial port registrations */
diff --git a/arch/arm/mach-s3c24xx/include/mach/map.h b/arch/arm/mach-s3c24xx/include/mach/map.h
index 8ba381f2dbe1..444793f0f5f1 100644
--- a/arch/arm/mach-s3c24xx/include/mach/map.h
+++ b/arch/arm/mach-s3c24xx/include/mach/map.h
@@ -167,4 +167,6 @@
167#define S3C_PA_SPI0 S3C2443_PA_SPI0 167#define S3C_PA_SPI0 S3C2443_PA_SPI0
168#define S3C_PA_SPI1 S3C2443_PA_SPI1 168#define S3C_PA_SPI1 S3C2443_PA_SPI1
169 169
170#define SAMSUNG_PA_TIMER S3C2410_PA_TIMER
171
170#endif /* __ASM_ARCH_MAP_H */ 172#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c24xx/mach-h1940.c
index af4334d6b4d5..74dd47988b41 100644
--- a/arch/arm/mach-s3c24xx/mach-h1940.c
+++ b/arch/arm/mach-s3c24xx/mach-h1940.c
@@ -512,7 +512,7 @@ static struct platform_pwm_backlight_data backlight_data = {
512static struct platform_device h1940_backlight = { 512static struct platform_device h1940_backlight = {
513 .name = "pwm-backlight", 513 .name = "pwm-backlight",
514 .dev = { 514 .dev = {
515 .parent = &s3c_device_timer[0].dev, 515 .parent = &samsung_device_pwm.dev,
516 .platform_data = &backlight_data, 516 .platform_data = &backlight_data,
517 }, 517 },
518 .id = -1, 518 .id = -1,
@@ -632,7 +632,7 @@ static struct platform_device *h1940_devices[] __initdata = {
632 &h1940_device_bluetooth, 632 &h1940_device_bluetooth,
633 &s3c_device_sdi, 633 &s3c_device_sdi,
634 &s3c_device_rtc, 634 &s3c_device_rtc,
635 &s3c_device_timer[0], 635 &samsung_device_pwm,
636 &h1940_backlight, 636 &h1940_backlight,
637 &h1940_lcd_powerdev, 637 &h1940_lcd_powerdev,
638 &s3c_device_adc, 638 &s3c_device_adc,
diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c
index 44ca018e1f96..206b1f7546d1 100644
--- a/arch/arm/mach-s3c24xx/mach-rx1950.c
+++ b/arch/arm/mach-s3c24xx/mach-rx1950.c
@@ -530,7 +530,7 @@ static struct platform_pwm_backlight_data rx1950_backlight_data = {
530static struct platform_device rx1950_backlight = { 530static struct platform_device rx1950_backlight = {
531 .name = "pwm-backlight", 531 .name = "pwm-backlight",
532 .dev = { 532 .dev = {
533 .parent = &s3c_device_timer[0].dev, 533 .parent = &samsung_device_pwm.dev,
534 .platform_data = &rx1950_backlight_data, 534 .platform_data = &rx1950_backlight_data,
535 }, 535 },
536}; 536};
@@ -717,8 +717,7 @@ static struct platform_device *rx1950_devices[] __initdata = {
717 &s3c_device_sdi, 717 &s3c_device_sdi,
718 &s3c_device_adc, 718 &s3c_device_adc,
719 &s3c_device_ts, 719 &s3c_device_ts,
720 &s3c_device_timer[0], 720 &samsung_device_pwm,
721 &s3c_device_timer[1],
722 &rx1950_backlight, 721 &rx1950_backlight,
723 &rx1950_device_gpiokeys, 722 &rx1950_device_gpiokeys,
724 &power_supply, 723 &power_supply,
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig
index 20578536aec7..041da5172423 100644
--- a/arch/arm/mach-s3c64xx/Kconfig
+++ b/arch/arm/mach-s3c64xx/Kconfig
@@ -17,13 +17,11 @@ config PLAT_S3C64XX
17# Configuration options for the S3C6410 CPU 17# Configuration options for the S3C6410 CPU
18 18
19config CPU_S3C6400 19config CPU_S3C6400
20 select SAMSUNG_HRT
21 bool 20 bool
22 help 21 help
23 Enable S3C6400 CPU support 22 Enable S3C6400 CPU support
24 23
25config CPU_S3C6410 24config CPU_S3C6410
26 select SAMSUNG_HRT
27 bool 25 bool
28 help 26 help
29 Enable S3C6410 CPU support 27 Enable S3C6410 CPU support
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 8499415be9cd..c1bcc4a6d3a8 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -1004,6 +1004,4 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
1004 for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++) 1004 for (cnt = 0; cnt < ARRAY_SIZE(clksrc_cdev); cnt++)
1005 s3c_register_clksrc(clksrc_cdev[cnt], 1); 1005 s3c_register_clksrc(clksrc_cdev[cnt], 1);
1006 clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup)); 1006 clkdev_add_table(s3c64xx_clk_lookup, ARRAY_SIZE(s3c64xx_clk_lookup));
1007
1008 s3c_pwmclk_init();
1009} 1007}
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 3f62e467b129..73d79cf5e141 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -27,6 +27,7 @@
27#include <linux/irq.h> 27#include <linux/irq.h>
28#include <linux/gpio.h> 28#include <linux/gpio.h>
29#include <linux/irqchip/arm-vic.h> 29#include <linux/irqchip/arm-vic.h>
30#include <clocksource/samsung_pwm.h>
30 31
31#include <asm/mach/arch.h> 32#include <asm/mach/arch.h>
32#include <asm/mach/map.h> 33#include <asm/mach/map.h>
@@ -42,7 +43,7 @@
42#include <plat/pm.h> 43#include <plat/pm.h>
43#include <plat/gpio-cfg.h> 44#include <plat/gpio-cfg.h>
44#include <plat/irq-uart.h> 45#include <plat/irq-uart.h>
45#include <plat/irq-vic-timer.h> 46#include <plat/pwm-core.h>
46#include <plat/regs-irqtype.h> 47#include <plat/regs-irqtype.h>
47#include <plat/regs-serial.h> 48#include <plat/regs-serial.h>
48#include <plat/watchdog-reset.h> 49#include <plat/watchdog-reset.h>
@@ -149,6 +150,30 @@ static struct device s3c64xx_dev = {
149 .bus = &s3c64xx_subsys, 150 .bus = &s3c64xx_subsys,
150}; 151};
151 152
153static struct samsung_pwm_variant s3c64xx_pwm_variant = {
154 .bits = 32,
155 .div_base = 0,
156 .has_tint_cstat = true,
157 .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5),
158};
159
160void __init samsung_set_timer_source(unsigned int event, unsigned int source)
161{
162 s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
163 s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
164}
165
166void __init samsung_timer_init(void)
167{
168 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
169 IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
170 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
171 };
172
173 samsung_pwm_clocksource_init(S3C_VA_TIMER,
174 timer_irqs, &s3c64xx_pwm_variant);
175}
176
152/* read cpu identification code */ 177/* read cpu identification code */
153 178
154void __init s3c64xx_init_io(struct map_desc *mach_desc, int size) 179void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
@@ -161,6 +186,8 @@ void __init s3c64xx_init_io(struct map_desc *mach_desc, int size)
161 s3c64xx_init_cpu(); 186 s3c64xx_init_cpu();
162 187
163 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 188 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
189
190 samsung_pwm_set_platdata(&s3c64xx_pwm_variant);
164} 191}
165 192
166static __init int s3c64xx_dev_init(void) 193static __init int s3c64xx_dev_init(void)
@@ -195,9 +222,6 @@ void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
195 /* initialise the pair of VICs */ 222 /* initialise the pair of VICs */
196 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME); 223 vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
197 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME); 224 vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
198
199 /* add the timer sub-irqs */
200 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
201} 225}
202 226
203#define eint_offset(irq) ((irq) - IRQ_EINT(0)) 227#define eint_offset(irq) ((irq) - IRQ_EINT(0))
diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c64xx/include/mach/irqs.h
index 96d60e0d9372..67bbd1dd04c2 100644
--- a/arch/arm/mach-s3c64xx/include/mach/irqs.h
+++ b/arch/arm/mach-s3c64xx/include/mach/irqs.h
@@ -107,14 +107,6 @@
107#define IRQ_TC IRQ_PENDN 107#define IRQ_TC IRQ_PENDN
108#define IRQ_ADC S3C64XX_IRQ_VIC1(31) 108#define IRQ_ADC S3C64XX_IRQ_VIC1(31)
109 109
110#define S3C64XX_TIMER_IRQ(x) S3C_IRQ(64 + (x))
111
112#define IRQ_TIMER0 S3C64XX_TIMER_IRQ(0)
113#define IRQ_TIMER1 S3C64XX_TIMER_IRQ(1)
114#define IRQ_TIMER2 S3C64XX_TIMER_IRQ(2)
115#define IRQ_TIMER3 S3C64XX_TIMER_IRQ(3)
116#define IRQ_TIMER4 S3C64XX_TIMER_IRQ(4)
117
118/* compatibility for device defines */ 110/* compatibility for device defines */
119 111
120#define IRQ_IIC1 IRQ_S3C6410_IIC1 112#define IRQ_IIC1 IRQ_S3C6410_IIC1
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index 8e2097bb208a..f55ccb1ce893 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -121,5 +121,6 @@
121#define SAMSUNG_PA_ADC S3C64XX_PA_ADC 121#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
122#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON 122#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
123#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD 123#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
124#define SAMSUNG_PA_TIMER S3C64XX_PA_TIMER
124 125
125#endif /* __ASM_ARCH_6400_MAP_H */ 126#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c64xx/irq-pm.c
index 0c7e1d960ca4..c3da1b68d03e 100644
--- a/arch/arm/mach-s3c64xx/irq-pm.c
+++ b/arch/arm/mach-s3c64xx/irq-pm.c
@@ -22,7 +22,6 @@
22#include <mach/map.h> 22#include <mach/map.h>
23 23
24#include <plat/regs-serial.h> 24#include <plat/regs-serial.h>
25#include <plat/regs-timer.h>
26#include <mach/regs-gpio.h> 25#include <mach/regs-gpio.h>
27#include <plat/cpu.h> 26#include <plat/cpu.h>
28#include <plat/pm.h> 27#include <plat/pm.h>
@@ -43,7 +42,6 @@ static struct sleep_save irq_save[] = {
43 SAVE_ITEM(S3C64XX_EINT0FLTCON2), 42 SAVE_ITEM(S3C64XX_EINT0FLTCON2),
44 SAVE_ITEM(S3C64XX_EINT0FLTCON3), 43 SAVE_ITEM(S3C64XX_EINT0FLTCON3),
45 SAVE_ITEM(S3C64XX_EINT0MASK), 44 SAVE_ITEM(S3C64XX_EINT0MASK),
46 SAVE_ITEM(S3C64XX_TINT_CSTAT),
47}; 45};
48 46
49static struct irq_grp_save { 47static struct irq_grp_save {
diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c64xx/mach-crag6410.c
index 8ad88ace795a..28889cc788b3 100644
--- a/arch/arm/mach-s3c64xx/mach-crag6410.c
+++ b/arch/arm/mach-s3c64xx/mach-crag6410.c
@@ -120,7 +120,7 @@ static struct platform_device crag6410_backlight_device = {
120 .name = "pwm-backlight", 120 .name = "pwm-backlight",
121 .id = -1, 121 .id = -1,
122 .dev = { 122 .dev = {
123 .parent = &s3c_device_timer[0].dev, 123 .parent = &samsung_device_pwm.dev,
124 .platform_data = &crag6410_backlight_data, 124 .platform_data = &crag6410_backlight_data,
125 }, 125 },
126}; 126};
@@ -375,7 +375,7 @@ static struct platform_device *crag6410_devices[] __initdata = {
375 &s3c_device_fb, 375 &s3c_device_fb,
376 &s3c_device_ohci, 376 &s3c_device_ohci,
377 &s3c_device_usb_hsotg, 377 &s3c_device_usb_hsotg,
378 &s3c_device_timer[0], 378 &samsung_device_pwm,
379 &s3c64xx_device_iis0, 379 &s3c64xx_device_iis0,
380 &s3c64xx_device_iis1, 380 &s3c64xx_device_iis1,
381 &samsung_device_keypad, 381 &samsung_device_keypad,
diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c64xx/mach-hmt.c
index 5b7f357d8c22..f39569e0f2e6 100644
--- a/arch/arm/mach-s3c64xx/mach-hmt.c
+++ b/arch/arm/mach-s3c64xx/mach-hmt.c
@@ -123,7 +123,7 @@ static struct platform_pwm_backlight_data hmt_backlight_data = {
123static struct platform_device hmt_backlight_device = { 123static struct platform_device hmt_backlight_device = {
124 .name = "pwm-backlight", 124 .name = "pwm-backlight",
125 .dev = { 125 .dev = {
126 .parent = &s3c_device_timer[1].dev, 126 .parent = &samsung_device_pwm.dev,
127 .platform_data = &hmt_backlight_data, 127 .platform_data = &hmt_backlight_data,
128 }, 128 },
129}; 129};
@@ -239,7 +239,7 @@ static struct platform_device *hmt_devices[] __initdata = {
239 &s3c_device_nand, 239 &s3c_device_nand,
240 &s3c_device_fb, 240 &s3c_device_fb,
241 &s3c_device_ohci, 241 &s3c_device_ohci,
242 &s3c_device_timer[1], 242 &samsung_device_pwm,
243 &hmt_backlight_device, 243 &hmt_backlight_device,
244 &hmt_leds_device, 244 &hmt_leds_device,
245}; 245};
diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c
index 58ac99041274..86d980b448fd 100644
--- a/arch/arm/mach-s3c64xx/mach-smartq.c
+++ b/arch/arm/mach-s3c64xx/mach-smartq.c
@@ -157,7 +157,7 @@ static struct platform_pwm_backlight_data smartq_backlight_data = {
157static struct platform_device smartq_backlight_device = { 157static struct platform_device smartq_backlight_device = {
158 .name = "pwm-backlight", 158 .name = "pwm-backlight",
159 .dev = { 159 .dev = {
160 .parent = &s3c_device_timer[1].dev, 160 .parent = &samsung_device_pwm.dev,
161 .platform_data = &smartq_backlight_data, 161 .platform_data = &smartq_backlight_data,
162 }, 162 },
163}; 163};
@@ -246,7 +246,7 @@ static struct platform_device *smartq_devices[] __initdata = {
246 &s3c_device_i2c0, 246 &s3c_device_i2c0,
247 &s3c_device_ohci, 247 &s3c_device_ohci,
248 &s3c_device_rtc, 248 &s3c_device_rtc,
249 &s3c_device_timer[1], 249 &samsung_device_pwm,
250 &s3c_device_ts, 250 &s3c_device_ts,
251 &s3c_device_usb_hsotg, 251 &s3c_device_usb_hsotg,
252 &s3c64xx_device_iis0, 252 &s3c64xx_device_iis0,
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c
index bd3295a19ad7..d90b450c5645 100644
--- a/arch/arm/mach-s3c64xx/mach-smdk6410.c
+++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c
@@ -274,6 +274,7 @@ static struct platform_device *smdk6410_devices[] __initdata = {
274 &s3c_device_i2c1, 274 &s3c_device_i2c1,
275 &s3c_device_fb, 275 &s3c_device_fb,
276 &s3c_device_ohci, 276 &s3c_device_ohci,
277 &samsung_device_pwm,
277 &s3c_device_usb_hsotg, 278 &s3c_device_usb_hsotg,
278 &s3c64xx_device_iisv4, 279 &s3c64xx_device_iisv4,
279 &samsung_device_keypad, 280 &samsung_device_keypad,
@@ -691,9 +692,9 @@ static void __init smdk6410_machine_init(void)
691 692
692 s3c_ide_set_platdata(&smdk6410_ide_pdata); 693 s3c_ide_set_platdata(&smdk6410_ide_pdata);
693 694
694 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
695
696 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); 695 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
696
697 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
697} 698}
698 699
699MACHINE_START(SMDK6410, "SMDK6410") 700MACHINE_START(SMDK6410, "SMDK6410")
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index 5a707bdb9ea0..bb2111b3751e 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -11,14 +11,12 @@ config CPU_S5P6440
11 bool 11 bool
12 select S5P_SLEEP if PM 12 select S5P_SLEEP if PM
13 select SAMSUNG_DMADEV 13 select SAMSUNG_DMADEV
14 select SAMSUNG_HRT
15 select SAMSUNG_WAKEMASK if PM 14 select SAMSUNG_WAKEMASK if PM
16 help 15 help
17 Enable S5P6440 CPU support 16 Enable S5P6440 CPU support
18 17
19config CPU_S5P6450 18config CPU_S5P6450
20 bool 19 bool
21 select SAMSUNG_HRT
22 select S5P_SLEEP if PM 20 select S5P_SLEEP if PM
23 select SAMSUNG_DMADEV 21 select SAMSUNG_DMADEV
24 select SAMSUNG_WAKEMASK if PM 22 select SAMSUNG_WAKEMASK if PM
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 3537815247f1..ae34a1d5e10a 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -629,6 +629,4 @@ void __init s5p6440_register_clocks(void)
629 clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup)); 629 clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
630 630
631 s3c24xx_register_clock(&dummy_apb_pclk); 631 s3c24xx_register_clock(&dummy_apb_pclk);
632
633 s3c_pwmclk_init();
634} 632}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index af384ddd2dcf..0b3ca2ed53e9 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -698,6 +698,4 @@ void __init s5p6450_register_clocks(void)
698 clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup)); 698 clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
699 699
700 s3c24xx_register_clock(&dummy_apb_pclk); 700 s3c24xx_register_clock(&dummy_apb_pclk);
701
702 s3c_pwmclk_init();
703} 701}
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index dfdfdc320ce7..42e14f2e7ca7 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20#include <linux/device.h> 20#include <linux/device.h>
21#include <linux/serial_core.h> 21#include <linux/serial_core.h>
22#include <clocksource/samsung_pwm.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/sched.h> 24#include <linux/sched.h>
24#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
@@ -47,6 +48,7 @@
47#include <plat/fb-core.h> 48#include <plat/fb-core.h>
48#include <plat/spi-core.h> 49#include <plat/spi-core.h>
49#include <plat/gpio-cfg.h> 50#include <plat/gpio-cfg.h>
51#include <plat/pwm-core.h>
50#include <plat/regs-irqtype.h> 52#include <plat/regs-irqtype.h>
51#include <plat/regs-serial.h> 53#include <plat/regs-serial.h>
52#include <plat/watchdog-reset.h> 54#include <plat/watchdog-reset.h>
@@ -157,6 +159,30 @@ static void s5p64x0_idle(void)
157 cpu_do_idle(); 159 cpu_do_idle();
158} 160}
159 161
162static struct samsung_pwm_variant s5p64x0_pwm_variant = {
163 .bits = 32,
164 .div_base = 0,
165 .has_tint_cstat = true,
166 .tclk_mask = 0,
167};
168
169void __init samsung_set_timer_source(unsigned int event, unsigned int source)
170{
171 s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
172 s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
173}
174
175void __init samsung_timer_init(void)
176{
177 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
178 IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
179 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
180 };
181
182 samsung_pwm_clocksource_init(S3C_VA_TIMER,
183 timer_irqs, &s5p64x0_pwm_variant);
184}
185
160/* 186/*
161 * s5p64x0_map_io 187 * s5p64x0_map_io
162 * 188 *
@@ -176,6 +202,7 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
176 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 202 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
177 samsung_wdt_reset_init(S3C_VA_WATCHDOG); 203 samsung_wdt_reset_init(S3C_VA_WATCHDOG);
178 204
205 samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
179} 206}
180 207
181void __init s5p6440_map_io(void) 208void __init s5p6440_map_io(void)
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 5b845e849b30..53982db9d259 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,8 +141,6 @@
141 141
142#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x)) 142#define IRQ_EINT_GROUP(grp, x) (IRQ_EINT_GROUP##grp##_BASE + (x))
143 143
144#define IRQ_TIMER_BASE (11)
145
146/* Set the default NR_IRQS */ 144/* Set the default NR_IRQS */
147 145
148#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1) 146#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
index 0c0175dbfa34..50a6e96d6389 100644
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -76,6 +76,7 @@
76#define S5P_PA_TIMER S5P64X0_PA_TIMER 76#define S5P_PA_TIMER S5P64X0_PA_TIMER
77 77
78#define SAMSUNG_PA_ADC S5P64X0_PA_ADC 78#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
79#define SAMSUNG_PA_TIMER S5P64X0_PA_TIMER
79 80
80/* UART */ 81/* UART */
81 82
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 73f71a698a34..0b00304c1e91 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -162,6 +162,7 @@ static struct platform_device *smdk6440_devices[] __initdata = {
162 &s3c_device_rtc, 162 &s3c_device_rtc,
163 &s3c_device_i2c0, 163 &s3c_device_i2c0,
164 &s3c_device_i2c1, 164 &s3c_device_i2c1,
165 &samsung_device_pwm,
165 &s3c_device_ts, 166 &s3c_device_ts,
166 &s3c_device_wdt, 167 &s3c_device_wdt,
167 &s5p6440_device_iis, 168 &s5p6440_device_iis,
@@ -254,8 +255,6 @@ static void __init smdk6440_machine_init(void)
254 i2c_register_board_info(1, smdk6440_i2c_devs1, 255 i2c_register_board_info(1, smdk6440_i2c_devs1,
255 ARRAY_SIZE(smdk6440_i2c_devs1)); 256 ARRAY_SIZE(smdk6440_i2c_devs1));
256 257
257 samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
258
259 s5p6440_set_lcd_interface(); 258 s5p6440_set_lcd_interface();
260 s3c_fb_set_platdata(&smdk6440_lcd_pdata); 259 s3c_fb_set_platdata(&smdk6440_lcd_pdata);
261 260
@@ -264,6 +263,8 @@ static void __init smdk6440_machine_init(void)
264 s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata); 263 s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
265 264
266 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); 265 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
266
267 samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
267} 268}
268 269
269MACHINE_START(SMDK6440, "SMDK6440") 270MACHINE_START(SMDK6440, "SMDK6440")
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 18303e12019f..5949296e88fd 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -180,6 +180,7 @@ static struct platform_device *smdk6450_devices[] __initdata = {
180 &s3c_device_rtc, 180 &s3c_device_rtc,
181 &s3c_device_i2c0, 181 &s3c_device_i2c0,
182 &s3c_device_i2c1, 182 &s3c_device_i2c1,
183 &samsung_device_pwm,
183 &s3c_device_ts, 184 &s3c_device_ts,
184 &s3c_device_wdt, 185 &s3c_device_wdt,
185 &s5p6450_device_iis0, 186 &s5p6450_device_iis0,
@@ -273,8 +274,6 @@ static void __init smdk6450_machine_init(void)
273 i2c_register_board_info(1, smdk6450_i2c_devs1, 274 i2c_register_board_info(1, smdk6450_i2c_devs1,
274 ARRAY_SIZE(smdk6450_i2c_devs1)); 275 ARRAY_SIZE(smdk6450_i2c_devs1));
275 276
276 samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
277
278 s5p6450_set_lcd_interface(); 277 s5p6450_set_lcd_interface();
279 s3c_fb_set_platdata(&smdk6450_lcd_pdata); 278 s3c_fb_set_platdata(&smdk6450_lcd_pdata);
280 279
@@ -283,6 +282,8 @@ static void __init smdk6450_machine_init(void)
283 s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata); 282 s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
284 283
285 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); 284 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
285
286 samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
286} 287}
287 288
288MACHINE_START(SMDK6450, "SMDK6450") 289MACHINE_START(SMDK6450, "SMDK6450")
diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c
index 97c2a08ad490..861e15cea691 100644
--- a/arch/arm/mach-s5p64x0/pm.c
+++ b/arch/arm/mach-s5p64x0/pm.c
@@ -18,7 +18,6 @@
18 18
19#include <plat/cpu.h> 19#include <plat/cpu.h>
20#include <plat/pm.h> 20#include <plat/pm.h>
21#include <plat/regs-timer.h>
22#include <plat/wakeup-mask.h> 21#include <plat/wakeup-mask.h>
23 22
24#include <mach/regs-clock.h> 23#include <mach/regs-clock.h>
@@ -48,8 +47,6 @@ static struct sleep_save s5p64x0_misc_save[] = {
48 SAVE_ITEM(S5P64X0_MEM0CONSLP1), 47 SAVE_ITEM(S5P64X0_MEM0CONSLP1),
49 SAVE_ITEM(S5P64X0_MEM0DRVCON), 48 SAVE_ITEM(S5P64X0_MEM0DRVCON),
50 SAVE_ITEM(S5P64X0_MEM1DRVCON), 49 SAVE_ITEM(S5P64X0_MEM1DRVCON),
51
52 SAVE_ITEM(S3C64XX_TINT_CSTAT),
53}; 50};
54 51
55/* DPLL is present only in S5P6450 */ 52/* DPLL is present only in S5P6450 */
diff --git a/arch/arm/mach-s5pc100/Kconfig b/arch/arm/mach-s5pc100/Kconfig
index 2f456a4533ba..15170be97a74 100644
--- a/arch/arm/mach-s5pc100/Kconfig
+++ b/arch/arm/mach-s5pc100/Kconfig
@@ -11,7 +11,6 @@ config CPU_S5PC100
11 bool 11 bool
12 select S5P_EXT_INT 12 select S5P_EXT_INT
13 select SAMSUNG_DMADEV 13 select SAMSUNG_DMADEV
14 select SAMSUNG_HRT
15 help 14 help
16 Enable S5PC100 CPU support 15 Enable S5PC100 CPU support
17 16
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index a206dc35eff1..d0dc10ee7729 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -1358,6 +1358,4 @@ void __init s5pc100_register_clocks(void)
1358 s3c_disable_clocks(clk_cdev[ptr], 1); 1358 s3c_disable_clocks(clk_cdev[ptr], 1);
1359 1359
1360 s3c24xx_register_clock(&dummy_apb_pclk); 1360 s3c24xx_register_clock(&dummy_apb_pclk);
1361
1362 s3c_pwmclk_init();
1363} 1361}
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index 4bdfecf6d024..c5a8eeacf81c 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/serial_core.h> 24#include <linux/serial_core.h>
25#include <clocksource/samsung_pwm.h>
25#include <linux/platform_device.h> 26#include <linux/platform_device.h>
26#include <linux/sched.h> 27#include <linux/sched.h>
27#include <linux/reboot.h> 28#include <linux/reboot.h>
@@ -46,6 +47,7 @@
46#include <plat/fb-core.h> 47#include <plat/fb-core.h>
47#include <plat/iic-core.h> 48#include <plat/iic-core.h>
48#include <plat/onenand-core.h> 49#include <plat/onenand-core.h>
50#include <plat/pwm-core.h>
49#include <plat/spi-core.h> 51#include <plat/spi-core.h>
50#include <plat/regs-serial.h> 52#include <plat/regs-serial.h>
51#include <plat/watchdog-reset.h> 53#include <plat/watchdog-reset.h>
@@ -132,6 +134,30 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
132 } 134 }
133}; 135};
134 136
137static struct samsung_pwm_variant s5pc100_pwm_variant = {
138 .bits = 32,
139 .div_base = 0,
140 .has_tint_cstat = true,
141 .tclk_mask = (1 << 5),
142};
143
144void __init samsung_set_timer_source(unsigned int event, unsigned int source)
145{
146 s5pc100_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
147 s5pc100_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
148}
149
150void __init samsung_timer_init(void)
151{
152 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
153 IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
154 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
155 };
156
157 samsung_pwm_clocksource_init(S3C_VA_TIMER,
158 timer_irqs, &s5pc100_pwm_variant);
159}
160
135/* 161/*
136 * s5pc100_map_io 162 * s5pc100_map_io
137 * 163 *
@@ -149,6 +175,8 @@ void __init s5pc100_init_io(struct map_desc *mach_desc, int size)
149 s5p_init_cpu(S5P_VA_CHIPID); 175 s5p_init_cpu(S5P_VA_CHIPID);
150 176
151 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 177 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
178
179 samsung_pwm_set_platdata(&s5pc100_pwm_variant);
152} 180}
153 181
154void __init s5pc100_map_io(void) 182void __init s5pc100_map_io(void)
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index 2870f12c7926..d2eb4757381f 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,8 +97,6 @@
97#define IRQ_SDMFIQ S5P_IRQ_VIC2(31) 97#define IRQ_SDMFIQ S5P_IRQ_VIC2(31)
98#define IRQ_VIC_END S5P_IRQ_VIC2(31) 98#define IRQ_VIC_END S5P_IRQ_VIC2(31)
99 99
100#define IRQ_TIMER_BASE (11)
101
102#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 100#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
103#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 101#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
104 102
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 54bc4f82e17a..2550b6112b82 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -116,6 +116,7 @@
116#define SAMSUNG_PA_ADC S5PC100_PA_TSADC 116#define SAMSUNG_PA_ADC S5PC100_PA_TSADC
117#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON 117#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON
118#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD 118#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD
119#define SAMSUNG_PA_TIMER S5PC100_PA_TIMER
119 120
120#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000) 121#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
121 122
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 8c880f76f274..7c57a221785e 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -194,6 +194,7 @@ static struct platform_device *smdkc100_devices[] __initdata = {
194 &s3c_device_hsmmc0, 194 &s3c_device_hsmmc0,
195 &s3c_device_hsmmc1, 195 &s3c_device_hsmmc1,
196 &s3c_device_hsmmc2, 196 &s3c_device_hsmmc2,
197 &samsung_device_pwm,
197 &s3c_device_ts, 198 &s3c_device_ts,
198 &s3c_device_wdt, 199 &s3c_device_wdt,
199 &smdkc100_lcd_powerdev, 200 &smdkc100_lcd_powerdev,
@@ -246,9 +247,9 @@ static void __init smdkc100_machine_init(void)
246 gpio_request(S5PC100_GPH0(6), "GPH0"); 247 gpio_request(S5PC100_GPH0(6), "GPH0");
247 smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0); 248 smdkc100_lcd_power_set(&smdkc100_lcd_power_data, 0);
248 249
249 samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
250
251 platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices)); 250 platform_add_devices(smdkc100_devices, ARRAY_SIZE(smdkc100_devices));
251
252 samsung_bl_set(&smdkc100_bl_gpio_info, &smdkc100_bl_data);
252} 253}
253 254
254MACHINE_START(SMDKC100, "SMDKC100") 255MACHINE_START(SMDKC100, "SMDKC100")
diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig
index 0963283a7c5d..caaedafbbf5f 100644
--- a/arch/arm/mach-s5pv210/Kconfig
+++ b/arch/arm/mach-s5pv210/Kconfig
@@ -15,7 +15,6 @@ config CPU_S5PV210
15 select S5P_PM if PM 15 select S5P_PM if PM
16 select S5P_SLEEP if PM 16 select S5P_SLEEP if PM
17 select SAMSUNG_DMADEV 17 select SAMSUNG_DMADEV
18 select SAMSUNG_HRT
19 help 18 help
20 Enable S5PV210 CPU support 19 Enable S5PV210 CPU support
21 20
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index f051f53e35b7..ca463724a3df 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -1362,5 +1362,4 @@ void __init s5pv210_register_clocks(void)
1362 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++) 1362 for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
1363 s3c_disable_clocks(clk_cdev[ptr], 1); 1363 s3c_disable_clocks(clk_cdev[ptr], 1);
1364 1364
1365 s3c_pwmclk_init();
1366} 1365}
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c
index 023f1a796a9c..26027a29b8a1 100644
--- a/arch/arm/mach-s5pv210/common.c
+++ b/arch/arm/mach-s5pv210/common.c
@@ -19,6 +19,7 @@
19#include <linux/clk.h> 19#include <linux/clk.h>
20#include <linux/io.h> 20#include <linux/io.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <clocksource/samsung_pwm.h>
22#include <linux/platform_device.h> 23#include <linux/platform_device.h>
23#include <linux/sched.h> 24#include <linux/sched.h>
24#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
@@ -42,6 +43,7 @@
42#include <plat/fimc-core.h> 43#include <plat/fimc-core.h>
43#include <plat/iic-core.h> 44#include <plat/iic-core.h>
44#include <plat/keypad-core.h> 45#include <plat/keypad-core.h>
46#include <plat/pwm-core.h>
45#include <plat/tv-core.h> 47#include <plat/tv-core.h>
46#include <plat/spi-core.h> 48#include <plat/spi-core.h>
47#include <plat/regs-serial.h> 49#include <plat/regs-serial.h>
@@ -148,6 +150,30 @@ void s5pv210_restart(enum reboot_mode mode, const char *cmd)
148 __raw_writel(0x1, S5P_SWRESET); 150 __raw_writel(0x1, S5P_SWRESET);
149} 151}
150 152
153static struct samsung_pwm_variant s5pv210_pwm_variant = {
154 .bits = 32,
155 .div_base = 0,
156 .has_tint_cstat = true,
157 .tclk_mask = (1 << 5),
158};
159
160void __init samsung_set_timer_source(unsigned int event, unsigned int source)
161{
162 s5pv210_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
163 s5pv210_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
164}
165
166void __init samsung_timer_init(void)
167{
168 unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
169 IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
170 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
171 };
172
173 samsung_pwm_clocksource_init(S3C_VA_TIMER,
174 timer_irqs, &s5pv210_pwm_variant);
175}
176
151/* 177/*
152 * s5pv210_map_io 178 * s5pv210_map_io
153 * 179 *
@@ -165,6 +191,8 @@ void __init s5pv210_init_io(struct map_desc *mach_desc, int size)
165 s5p_init_cpu(S5P_VA_CHIPID); 191 s5p_init_cpu(S5P_VA_CHIPID);
166 192
167 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); 193 s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
194
195 samsung_pwm_set_platdata(&s5pv210_pwm_variant);
168} 196}
169 197
170void __init s5pv210_map_io(void) 198void __init s5pv210_map_io(void)
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index e777e010ed2e..5e0de3a31f3d 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,8 +118,6 @@
118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8) 118#define IRQ_MDNIE3 S5P_IRQ_VIC3(8)
119#define IRQ_VIC_END S5P_IRQ_VIC3(31) 119#define IRQ_VIC_END S5P_IRQ_VIC3(31)
120 120
121#define IRQ_TIMER_BASE (11)
122
123#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0)) 121#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
124#define S5P_EINT_BASE2 (IRQ_VIC_END + 1) 122#define S5P_EINT_BASE2 (IRQ_VIC_END + 1)
125 123
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index b7c8a1917ffc..763929aca52d 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -139,6 +139,7 @@
139#define SAMSUNG_PA_ADC S5PV210_PA_ADC 139#define SAMSUNG_PA_ADC S5PV210_PA_ADC
140#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON 140#define SAMSUNG_PA_CFCON S5PV210_PA_CFCON
141#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD 141#define SAMSUNG_PA_KEYPAD S5PV210_PA_KEYPAD
142#define SAMSUNG_PA_TIMER S5PV210_PA_TIMER
142 143
143/* UART */ 144/* UART */
144 145
diff --git a/arch/arm/mach-s5pv210/mach-smdkv210.c b/arch/arm/mach-s5pv210/mach-smdkv210.c
index d50b6f124465..6d72bb992e38 100644
--- a/arch/arm/mach-s5pv210/mach-smdkv210.c
+++ b/arch/arm/mach-s5pv210/mach-smdkv210.c
@@ -218,6 +218,7 @@ static struct platform_device *smdkv210_devices[] __initdata = {
218 &s3c_device_i2c0, 218 &s3c_device_i2c0,
219 &s3c_device_i2c1, 219 &s3c_device_i2c1,
220 &s3c_device_i2c2, 220 &s3c_device_i2c2,
221 &samsung_device_pwm,
221 &s3c_device_rtc, 222 &s3c_device_rtc,
222 &s3c_device_ts, 223 &s3c_device_ts,
223 &s3c_device_usb_hsotg, 224 &s3c_device_usb_hsotg,
@@ -316,11 +317,11 @@ static void __init smdkv210_machine_init(void)
316 317
317 s3c_fb_set_platdata(&smdkv210_lcd0_pdata); 318 s3c_fb_set_platdata(&smdkv210_lcd0_pdata);
318 319
319 samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
320
321 s3c_hsotg_set_platdata(&smdkv210_hsotg_pdata); 320 s3c_hsotg_set_platdata(&smdkv210_hsotg_pdata);
322 321
323 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices)); 322 platform_add_devices(smdkv210_devices, ARRAY_SIZE(smdkv210_devices));
323
324 samsung_bl_set(&smdkv210_bl_gpio_info, &smdkv210_bl_data);
324} 325}
325 326
326MACHINE_START(SMDKV210, "SMDKV210") 327MACHINE_START(SMDKV210, "SMDKV210")
diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c
index 2b68a67b6e95..3cf3f9c8ddd1 100644
--- a/arch/arm/mach-s5pv210/pm.c
+++ b/arch/arm/mach-s5pv210/pm.c
@@ -21,7 +21,6 @@
21 21
22#include <plat/cpu.h> 22#include <plat/cpu.h>
23#include <plat/pm.h> 23#include <plat/pm.h>
24#include <plat/regs-timer.h>
25 24
26#include <mach/regs-irq.h> 25#include <mach/regs-irq.h>
27#include <mach/regs-clock.h> 26#include <mach/regs-clock.h>
@@ -77,15 +76,6 @@ static struct sleep_save s5pv210_core_save[] = {
77 /* Clock ETC */ 76 /* Clock ETC */
78 SAVE_ITEM(S5P_CLK_OUT), 77 SAVE_ITEM(S5P_CLK_OUT),
79 SAVE_ITEM(S5P_MDNIE_SEL), 78 SAVE_ITEM(S5P_MDNIE_SEL),
80
81 /* PWM Register */
82 SAVE_ITEM(S3C2410_TCFG0),
83 SAVE_ITEM(S3C2410_TCFG1),
84 SAVE_ITEM(S3C64XX_TINT_CSTAT),
85 SAVE_ITEM(S3C2410_TCON),
86 SAVE_ITEM(S3C2410_TCNTB(0)),
87 SAVE_ITEM(S3C2410_TCMPB(0)),
88 SAVE_ITEM(S3C2410_TCNTO(0)),
89}; 79};
90 80
91static int s5pv210_cpu_suspend(unsigned long arg) 81static int s5pv210_cpu_suspend(unsigned long arg)
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index d04e3bfe1918..835833e3c4f8 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -11,8 +11,9 @@ menuconfig ARCH_STI
11 select HAVE_SMP 11 select HAVE_SMP
12 select HAVE_ARM_SCU if SMP 12 select HAVE_ARM_SCU if SMP
13 select ARCH_REQUIRE_GPIOLIB 13 select ARCH_REQUIRE_GPIOLIB
14 select ARM_ERRATA_720789
15 select ARM_ERRATA_754322 14 select ARM_ERRATA_754322
15 select ARM_ERRATA_764369
16 select ARM_ERRATA_775420
16 select PL310_ERRATA_753970 if CACHE_PL310 17 select PL310_ERRATA_753970 if CACHE_PL310
17 select PL310_ERRATA_769419 if CACHE_PL310 18 select PL310_ERRATA_769419 if CACHE_PL310
18 help 19 help
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 5b799c29886e..5f252569c689 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -91,7 +91,7 @@ static void __init zynq_map_io(void)
91 zynq_scu_map_io(); 91 zynq_scu_map_io();
92} 92}
93 93
94static void zynq_system_reset(char mode, const char *cmd) 94static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
95{ 95{
96 zynq_slcr_system_reset(); 96 zynq_slcr_system_reset();
97} 97}
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 6cacdc8dd654..db5c2cab8fda 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -421,24 +421,28 @@ config CPU_32v3
421 select CPU_USE_DOMAINS if MMU 421 select CPU_USE_DOMAINS if MMU
422 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 422 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
423 select TLS_REG_EMUL if SMP || !MMU 423 select TLS_REG_EMUL if SMP || !MMU
424 select NEED_KUSER_HELPERS
424 425
425config CPU_32v4 426config CPU_32v4
426 bool 427 bool
427 select CPU_USE_DOMAINS if MMU 428 select CPU_USE_DOMAINS if MMU
428 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 429 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
429 select TLS_REG_EMUL if SMP || !MMU 430 select TLS_REG_EMUL if SMP || !MMU
431 select NEED_KUSER_HELPERS
430 432
431config CPU_32v4T 433config CPU_32v4T
432 bool 434 bool
433 select CPU_USE_DOMAINS if MMU 435 select CPU_USE_DOMAINS if MMU
434 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 436 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
435 select TLS_REG_EMUL if SMP || !MMU 437 select TLS_REG_EMUL if SMP || !MMU
438 select NEED_KUSER_HELPERS
436 439
437config CPU_32v5 440config CPU_32v5
438 bool 441 bool
439 select CPU_USE_DOMAINS if MMU 442 select CPU_USE_DOMAINS if MMU
440 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP 443 select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
441 select TLS_REG_EMUL if SMP || !MMU 444 select TLS_REG_EMUL if SMP || !MMU
445 select NEED_KUSER_HELPERS
442 446
443config CPU_32v6 447config CPU_32v6
444 bool 448 bool
@@ -776,6 +780,7 @@ config CPU_BPREDICT_DISABLE
776 780
777config TLS_REG_EMUL 781config TLS_REG_EMUL
778 bool 782 bool
783 select NEED_KUSER_HELPERS
779 help 784 help
780 An SMP system using a pre-ARMv6 processor (there are apparently 785 An SMP system using a pre-ARMv6 processor (there are apparently
781 a few prototypes like that in existence) and therefore access to 786 a few prototypes like that in existence) and therefore access to
@@ -783,11 +788,40 @@ config TLS_REG_EMUL
783 788
784config NEEDS_SYSCALL_FOR_CMPXCHG 789config NEEDS_SYSCALL_FOR_CMPXCHG
785 bool 790 bool
791 select NEED_KUSER_HELPERS
786 help 792 help
787 SMP on a pre-ARMv6 processor? Well OK then. 793 SMP on a pre-ARMv6 processor? Well OK then.
788 Forget about fast user space cmpxchg support. 794 Forget about fast user space cmpxchg support.
789 It is just not possible. 795 It is just not possible.
790 796
797config NEED_KUSER_HELPERS
798 bool
799
800config KUSER_HELPERS
801 bool "Enable kuser helpers in vector page" if !NEED_KUSER_HELPERS
802 default y
803 help
804 Warning: disabling this option may break user programs.
805
806 Provide kuser helpers in the vector page. The kernel provides
807 helper code to userspace in read only form at a fixed location
808 in the high vector page to allow userspace to be independent of
809 the CPU type fitted to the system. This permits binaries to be
810 run on ARMv4 through to ARMv7 without modification.
811
812 However, the fixed address nature of these helpers can be used
813 by ROP (return orientated programming) authors when creating
814 exploits.
815
816 If all of the binaries and libraries which run on your platform
817 are built specifically for your platform, and make no use of
818 these helpers, then you can turn this option off. However,
819 when such an binary or library is run, it will receive a SIGILL
820 signal, which will terminate the program.
821
822 Say N here only if you are absolutely certain that you do not
823 need these helpers; otherwise, the safe option is to say Y.
824
791config DMA_CACHE_RWFO 825config DMA_CACHE_RWFO
792 bool "Enable read/write for ownership DMA cache maintenance" 826 bool "Enable read/write for ownership DMA cache maintenance"
793 depends on CPU_V6K && SMP 827 depends on CPU_V6K && SMP
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c
index b55b1015724b..4a0544492f10 100644
--- a/arch/arm/mm/context.c
+++ b/arch/arm/mm/context.c
@@ -245,7 +245,8 @@ void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk)
245 if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) { 245 if (cpumask_test_and_clear_cpu(cpu, &tlb_flush_pending)) {
246 local_flush_bp_all(); 246 local_flush_bp_all();
247 local_flush_tlb_all(); 247 local_flush_tlb_all();
248 dummy_flush_tlb_a15_erratum(); 248 if (erratum_a15_798181())
249 dummy_flush_tlb_a15_erratum();
249 } 250 }
250 251
251 atomic64_set(&per_cpu(active_asids, cpu), asid); 252 atomic64_set(&per_cpu(active_asids, cpu), asid);
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4f56617a2392..53cdbd39ec8e 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -989,6 +989,7 @@ phys_addr_t arm_lowmem_limit __initdata = 0;
989 989
990void __init sanity_check_meminfo(void) 990void __init sanity_check_meminfo(void)
991{ 991{
992 phys_addr_t memblock_limit = 0;
992 int i, j, highmem = 0; 993 int i, j, highmem = 0;
993 phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1; 994 phys_addr_t vmalloc_limit = __pa(vmalloc_min - 1) + 1;
994 995
@@ -1052,9 +1053,32 @@ void __init sanity_check_meminfo(void)
1052 bank->size = size_limit; 1053 bank->size = size_limit;
1053 } 1054 }
1054#endif 1055#endif
1055 if (!bank->highmem && bank->start + bank->size > arm_lowmem_limit) 1056 if (!bank->highmem) {
1056 arm_lowmem_limit = bank->start + bank->size; 1057 phys_addr_t bank_end = bank->start + bank->size;
1057 1058
1059 if (bank_end > arm_lowmem_limit)
1060 arm_lowmem_limit = bank_end;
1061
1062 /*
1063 * Find the first non-section-aligned page, and point
1064 * memblock_limit at it. This relies on rounding the
1065 * limit down to be section-aligned, which happens at
1066 * the end of this function.
1067 *
1068 * With this algorithm, the start or end of almost any
1069 * bank can be non-section-aligned. The only exception
1070 * is that the start of the bank 0 must be section-
1071 * aligned, since otherwise memory would need to be
1072 * allocated when mapping the start of bank 0, which
1073 * occurs before any free memory is mapped.
1074 */
1075 if (!memblock_limit) {
1076 if (!IS_ALIGNED(bank->start, SECTION_SIZE))
1077 memblock_limit = bank->start;
1078 else if (!IS_ALIGNED(bank_end, SECTION_SIZE))
1079 memblock_limit = bank_end;
1080 }
1081 }
1058 j++; 1082 j++;
1059 } 1083 }
1060#ifdef CONFIG_HIGHMEM 1084#ifdef CONFIG_HIGHMEM
@@ -1079,7 +1103,18 @@ void __init sanity_check_meminfo(void)
1079#endif 1103#endif
1080 meminfo.nr_banks = j; 1104 meminfo.nr_banks = j;
1081 high_memory = __va(arm_lowmem_limit - 1) + 1; 1105 high_memory = __va(arm_lowmem_limit - 1) + 1;
1082 memblock_set_current_limit(arm_lowmem_limit); 1106
1107 /*
1108 * Round the memblock limit down to a section size. This
1109 * helps to ensure that we will allocate memory from the
1110 * last full section, which should be mapped.
1111 */
1112 if (memblock_limit)
1113 memblock_limit = round_down(memblock_limit, SECTION_SIZE);
1114 if (!memblock_limit)
1115 memblock_limit = arm_lowmem_limit;
1116
1117 memblock_set_current_limit(memblock_limit);
1083} 1118}
1084 1119
1085static inline void prepare_page_table(void) 1120static inline void prepare_page_table(void)
@@ -1160,7 +1195,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
1160 /* 1195 /*
1161 * Allocate the vector page early. 1196 * Allocate the vector page early.
1162 */ 1197 */
1163 vectors = early_alloc(PAGE_SIZE); 1198 vectors = early_alloc(PAGE_SIZE * 2);
1164 1199
1165 early_trap_init(vectors); 1200 early_trap_init(vectors);
1166 1201
@@ -1205,15 +1240,27 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
1205 map.pfn = __phys_to_pfn(virt_to_phys(vectors)); 1240 map.pfn = __phys_to_pfn(virt_to_phys(vectors));
1206 map.virtual = 0xffff0000; 1241 map.virtual = 0xffff0000;
1207 map.length = PAGE_SIZE; 1242 map.length = PAGE_SIZE;
1243#ifdef CONFIG_KUSER_HELPERS
1208 map.type = MT_HIGH_VECTORS; 1244 map.type = MT_HIGH_VECTORS;
1245#else
1246 map.type = MT_LOW_VECTORS;
1247#endif
1209 create_mapping(&map); 1248 create_mapping(&map);
1210 1249
1211 if (!vectors_high()) { 1250 if (!vectors_high()) {
1212 map.virtual = 0; 1251 map.virtual = 0;
1252 map.length = PAGE_SIZE * 2;
1213 map.type = MT_LOW_VECTORS; 1253 map.type = MT_LOW_VECTORS;
1214 create_mapping(&map); 1254 create_mapping(&map);
1215 } 1255 }
1216 1256
1257 /* Now create a kernel read-only mapping */
1258 map.pfn += 1;
1259 map.virtual = 0xffff0000 + PAGE_SIZE;
1260 map.length = PAGE_SIZE;
1261 map.type = MT_LOW_VECTORS;
1262 create_mapping(&map);
1263
1217 /* 1264 /*
1218 * Ask the machine support to map in the statically mapped devices. 1265 * Ask the machine support to map in the statically mapped devices.
1219 */ 1266 */
@@ -1276,8 +1323,6 @@ void __init paging_init(struct machine_desc *mdesc)
1276{ 1323{
1277 void *zero_page; 1324 void *zero_page;
1278 1325
1279 memblock_set_current_limit(arm_lowmem_limit);
1280
1281 build_mem_type_table(); 1326 build_mem_type_table();
1282 prepare_page_table(); 1327 prepare_page_table();
1283 map_lowmem(); 1328 map_lowmem();
diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S
index f64afb9f1bd5..bdd3be4be77a 100644
--- a/arch/arm/mm/proc-v7-2level.S
+++ b/arch/arm/mm/proc-v7-2level.S
@@ -110,7 +110,7 @@ ENTRY(cpu_v7_set_pte_ext)
110 ARM( str r3, [r0, #2048]! ) 110 ARM( str r3, [r0, #2048]! )
111 THUMB( add r0, r0, #2048 ) 111 THUMB( add r0, r0, #2048 )
112 THUMB( str r3, [r0] ) 112 THUMB( str r3, [r0] )
113 ALT_SMP(mov pc,lr) 113 ALT_SMP(W(nop))
114 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte 114 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
115#endif 115#endif
116 mov pc, lr 116 mov pc, lr
diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S
index c36ac69488c8..01a719e18bb0 100644
--- a/arch/arm/mm/proc-v7-3level.S
+++ b/arch/arm/mm/proc-v7-3level.S
@@ -81,7 +81,7 @@ ENTRY(cpu_v7_set_pte_ext)
81 tst r3, #1 << (55 - 32) @ L_PTE_DIRTY 81 tst r3, #1 << (55 - 32) @ L_PTE_DIRTY
82 orreq r2, #L_PTE_RDONLY 82 orreq r2, #L_PTE_RDONLY
831: strd r2, r3, [r0] 831: strd r2, r3, [r0]
84 ALT_SMP(mov pc, lr) 84 ALT_SMP(W(nop))
85 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte 85 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
86#endif 86#endif
87 mov pc, lr 87 mov pc, lr
diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S
index 5c6d5a3050ea..73398bcf9bd8 100644
--- a/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@ -75,13 +75,14 @@ ENTRY(cpu_v7_do_idle)
75ENDPROC(cpu_v7_do_idle) 75ENDPROC(cpu_v7_do_idle)
76 76
77ENTRY(cpu_v7_dcache_clean_area) 77ENTRY(cpu_v7_dcache_clean_area)
78 ALT_SMP(mov pc, lr) @ MP extensions imply L1 PTW 78 ALT_SMP(W(nop)) @ MP extensions imply L1 PTW
79 ALT_UP(W(nop)) 79 ALT_UP_B(1f)
80 dcache_line_size r2, r3 80 mov pc, lr
811: mcr p15, 0, r0, c7, c10, 1 @ clean D entry 811: dcache_line_size r2, r3
822: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
82 add r0, r0, r2 83 add r0, r0, r2
83 subs r1, r1, r2 84 subs r1, r1, r2
84 bhi 1b 85 bhi 2b
85 dsb 86 dsb
86 mov pc, lr 87 mov pc, lr
87ENDPROC(cpu_v7_dcache_clean_area) 88ENDPROC(cpu_v7_dcache_clean_area)
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 3dc5cbea86cc..7dfba937d8fc 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -25,10 +25,16 @@ config PLAT_S5P
25 select S5P_GPIO_DRVSTR 25 select S5P_GPIO_DRVSTR
26 select SAMSUNG_CLKSRC if !COMMON_CLK 26 select SAMSUNG_CLKSRC if !COMMON_CLK
27 select SAMSUNG_GPIOLIB_4BIT 27 select SAMSUNG_GPIOLIB_4BIT
28 select SAMSUNG_IRQ_VIC_TIMER
29 help 28 help
30 Base platform code for Samsung's S5P series SoC. 29 Base platform code for Samsung's S5P series SoC.
31 30
31config SAMSUNG_PM
32 bool
33 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
34 default y
35 help
36 Base platform power management code for samsung code
37
32if PLAT_SAMSUNG 38if PLAT_SAMSUNG
33 39
34# boot configurations 40# boot configurations
@@ -72,14 +78,6 @@ config SAMSUNG_ATAGS
72 78
73if SAMSUNG_ATAGS 79if SAMSUNG_ATAGS
74 80
75# timer options
76
77config SAMSUNG_HRT
78 bool
79 select SAMSUNG_DEV_PWM
80 help
81 Use the High Resolution timer support
82
83# clock options 81# clock options
84 82
85config SAMSUNG_CLOCK 83config SAMSUNG_CLOCK
@@ -99,11 +97,6 @@ config S5P_CLOCK
99 97
100# options for IRQ support 98# options for IRQ support
101 99
102config SAMSUNG_IRQ_VIC_TIMER
103 bool
104 help
105 Internal configuration to build the VIC timer interrupt code.
106
107config S5P_IRQ 100config S5P_IRQ
108 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210) 101 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
109 help 102 help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 98d07d8fc7a7..498c7c23e9f4 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -12,15 +12,12 @@ obj- :=
12# Objects we always build independent of SoC choice 12# Objects we always build independent of SoC choice
13 13
14obj-y += init.o cpu.o 14obj-y += init.o cpu.o
15obj-$(CONFIG_SAMSUNG_HRT) += samsung-time.o
16 15
17obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o 16obj-$(CONFIG_SAMSUNG_CLOCK) += clock.o
18obj-$(CONFIG_SAMSUNG_CLOCK) += pwm-clock.o
19 17
20obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o 18obj-$(CONFIG_SAMSUNG_CLKSRC) += clock-clksrc.o
21obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o 19obj-$(CONFIG_S5P_CLOCK) += s5p-clock.o
22 20
23obj-$(CONFIG_SAMSUNG_IRQ_VIC_TIMER) += irq-vic-timer.o
24obj-$(CONFIG_S5P_IRQ) += s5p-irq.o 21obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
25obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o 22obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
26obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o 23obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
@@ -51,7 +48,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o
51 48
52# PM support 49# PM support
53 50
54obj-$(CONFIG_PM) += pm.o 51obj-$(CONFIG_SAMSUNG_PM) += pm.o
55obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o 52obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o
56obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o 53obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
57 54
diff --git a/arch/arm/plat-samsung/dev-backlight.c b/arch/arm/plat-samsung/dev-backlight.c
index 5f197dcaf10c..d51f9565567c 100644
--- a/arch/arm/plat-samsung/dev-backlight.c
+++ b/arch/arm/plat-samsung/dev-backlight.c
@@ -20,13 +20,18 @@
20#include <plat/gpio-cfg.h> 20#include <plat/gpio-cfg.h>
21#include <plat/backlight.h> 21#include <plat/backlight.h>
22 22
23struct samsung_bl_drvdata {
24 struct platform_pwm_backlight_data plat_data;
25 struct samsung_bl_gpio_info *gpio_info;
26};
27
23static int samsung_bl_init(struct device *dev) 28static int samsung_bl_init(struct device *dev)
24{ 29{
25 int ret = 0; 30 int ret = 0;
26 struct platform_device *timer_dev = 31 struct platform_pwm_backlight_data *pdata = dev->platform_data;
27 container_of(dev->parent, struct platform_device, dev); 32 struct samsung_bl_drvdata *drvdata = container_of(pdata,
28 struct samsung_bl_gpio_info *bl_gpio_info = 33 struct samsung_bl_drvdata, plat_data);
29 timer_dev->dev.platform_data; 34 struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
30 35
31 ret = gpio_request(bl_gpio_info->no, "Backlight"); 36 ret = gpio_request(bl_gpio_info->no, "Backlight");
32 if (ret) { 37 if (ret) {
@@ -42,10 +47,10 @@ static int samsung_bl_init(struct device *dev)
42 47
43static void samsung_bl_exit(struct device *dev) 48static void samsung_bl_exit(struct device *dev)
44{ 49{
45 struct platform_device *timer_dev = 50 struct platform_pwm_backlight_data *pdata = dev->platform_data;
46 container_of(dev->parent, struct platform_device, dev); 51 struct samsung_bl_drvdata *drvdata = container_of(pdata,
47 struct samsung_bl_gpio_info *bl_gpio_info = 52 struct samsung_bl_drvdata, plat_data);
48 timer_dev->dev.platform_data; 53 struct samsung_bl_gpio_info *bl_gpio_info = drvdata->gpio_info;
49 54
50 s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT); 55 s3c_gpio_cfgpin(bl_gpio_info->no, S3C_GPIO_OUTPUT);
51 gpio_free(bl_gpio_info->no); 56 gpio_free(bl_gpio_info->no);
@@ -60,12 +65,14 @@ static void samsung_bl_exit(struct device *dev)
60 * for their specific boards 65 * for their specific boards
61 */ 66 */
62 67
63static struct platform_pwm_backlight_data samsung_dfl_bl_data __initdata = { 68static struct samsung_bl_drvdata samsung_dfl_bl_data __initdata = {
64 .max_brightness = 255, 69 .plat_data = {
65 .dft_brightness = 255, 70 .max_brightness = 255,
66 .pwm_period_ns = 78770, 71 .dft_brightness = 255,
67 .init = samsung_bl_init, 72 .pwm_period_ns = 78770,
68 .exit = samsung_bl_exit, 73 .init = samsung_bl_init,
74 .exit = samsung_bl_exit,
75 },
69}; 76};
70 77
71static struct platform_device samsung_dfl_bl_device __initdata = { 78static struct platform_device samsung_dfl_bl_device __initdata = {
@@ -82,6 +89,7 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
82{ 89{
83 int ret = 0; 90 int ret = 0;
84 struct platform_device *samsung_bl_device; 91 struct platform_device *samsung_bl_device;
92 struct samsung_bl_drvdata *samsung_bl_drvdata;
85 struct platform_pwm_backlight_data *samsung_bl_data; 93 struct platform_pwm_backlight_data *samsung_bl_data;
86 94
87 samsung_bl_device = kmemdup(&samsung_dfl_bl_device, 95 samsung_bl_device = kmemdup(&samsung_dfl_bl_device,
@@ -91,17 +99,19 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
91 return; 99 return;
92 } 100 }
93 101
94 samsung_bl_data = s3c_set_platdata(&samsung_dfl_bl_data, 102 samsung_bl_drvdata = kmemdup(&samsung_dfl_bl_data,
95 sizeof(struct platform_pwm_backlight_data), samsung_bl_device); 103 sizeof(samsung_dfl_bl_data), GFP_KERNEL);
96 if (!samsung_bl_data) { 104 if (!samsung_bl_drvdata) {
97 printk(KERN_ERR "%s: no memory for platform dev\n", __func__); 105 printk(KERN_ERR "%s: no memory for platform dev\n", __func__);
98 goto err_data; 106 goto err_data;
99 } 107 }
108 samsung_bl_device->dev.platform_data = &samsung_bl_drvdata->plat_data;
109 samsung_bl_drvdata->gpio_info = gpio_info;
110 samsung_bl_data = &samsung_bl_drvdata->plat_data;
100 111
101 /* Copy board specific data provided by user */ 112 /* Copy board specific data provided by user */
102 samsung_bl_data->pwm_id = bl_data->pwm_id; 113 samsung_bl_data->pwm_id = bl_data->pwm_id;
103 samsung_bl_device->dev.parent = 114 samsung_bl_device->dev.parent = &samsung_device_pwm.dev;
104 &s3c_device_timer[samsung_bl_data->pwm_id].dev;
105 115
106 if (bl_data->max_brightness) 116 if (bl_data->max_brightness)
107 samsung_bl_data->max_brightness = bl_data->max_brightness; 117 samsung_bl_data->max_brightness = bl_data->max_brightness;
@@ -122,17 +132,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
122 if (bl_data->check_fb) 132 if (bl_data->check_fb)
123 samsung_bl_data->check_fb = bl_data->check_fb; 133 samsung_bl_data->check_fb = bl_data->check_fb;
124 134
125 /* Keep the GPIO info for future use */
126 s3c_device_timer[samsung_bl_data->pwm_id].dev.platform_data = gpio_info;
127
128 /* Register the specific PWM timer dev for Backlight control */
129 ret = platform_device_register(
130 &s3c_device_timer[samsung_bl_data->pwm_id]);
131 if (ret) {
132 printk(KERN_ERR "failed to register pwm timer for backlight: %d\n", ret);
133 goto err_plat_reg1;
134 }
135
136 /* Register the Backlight dev */ 135 /* Register the Backlight dev */
137 ret = platform_device_register(samsung_bl_device); 136 ret = platform_device_register(samsung_bl_device);
138 if (ret) { 137 if (ret) {
@@ -143,8 +142,6 @@ void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info,
143 return; 142 return;
144 143
145err_plat_reg2: 144err_plat_reg2:
146 platform_device_unregister(&s3c_device_timer[samsung_bl_data->pwm_id]);
147err_plat_reg1:
148 kfree(samsung_bl_data); 145 kfree(samsung_bl_data);
149err_data: 146err_data:
150 kfree(samsung_bl_device); 147 kfree(samsung_bl_device);
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 0f9c3f431a5f..8ce0ac007eb9 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -58,6 +58,7 @@
58#include <plat/keypad.h> 58#include <plat/keypad.h>
59#include <linux/platform_data/mmc-s3cmci.h> 59#include <linux/platform_data/mmc-s3cmci.h>
60#include <linux/platform_data/mtd-nand-s3c2410.h> 60#include <linux/platform_data/mtd-nand-s3c2410.h>
61#include <plat/pwm-core.h>
61#include <plat/sdhci.h> 62#include <plat/sdhci.h>
62#include <linux/platform_data/touchscreen-s3c2410.h> 63#include <linux/platform_data/touchscreen-s3c2410.h>
63#include <linux/platform_data/usb-s3c2410_udc.h> 64#include <linux/platform_data/usb-s3c2410_udc.h>
@@ -1097,36 +1098,21 @@ arch_initcall(s5p_pmu_init);
1097/* PWM Timer */ 1098/* PWM Timer */
1098 1099
1099#ifdef CONFIG_SAMSUNG_DEV_PWM 1100#ifdef CONFIG_SAMSUNG_DEV_PWM
1101static struct resource samsung_pwm_resource[] = {
1102 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
1103};
1100 1104
1101#define TIMER_RESOURCE_SIZE (1) 1105struct platform_device samsung_device_pwm = {
1102 1106 .name = "samsung-pwm",
1103#define TIMER_RESOURCE(_tmr, _irq) \ 1107 .id = -1,
1104 (struct resource [TIMER_RESOURCE_SIZE]) { \ 1108 .num_resources = ARRAY_SIZE(samsung_pwm_resource),
1105 [0] = { \ 1109 .resource = samsung_pwm_resource,
1106 .start = _irq, \
1107 .end = _irq, \
1108 .flags = IORESOURCE_IRQ \
1109 } \
1110 }
1111
1112#define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1113 .name = "s3c24xx-pwm", \
1114 .id = _tmr_no, \
1115 .num_resources = TIMER_RESOURCE_SIZE, \
1116 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1117
1118/*
1119 * since we already have an static mapping for the timer,
1120 * we do not bother setting any IO resource for the base.
1121 */
1122
1123struct platform_device s3c_device_timer[] = {
1124 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1125 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1126 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1127 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1128 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1129}; 1110};
1111
1112void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd)
1113{
1114 samsung_device_pwm.dev.platform_data = pd;
1115}
1130#endif /* CONFIG_SAMSUNG_DEV_PWM */ 1116#endif /* CONFIG_SAMSUNG_DEV_PWM */
1131 1117
1132/* RTC */ 1118/* RTC */
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index a62753dc15ba..63239f409807 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -83,6 +83,11 @@ extern struct clk clk_ext;
83extern struct clksrc_clk clk_epllref; 83extern struct clksrc_clk clk_epllref;
84extern struct clksrc_clk clk_esysclk; 84extern struct clksrc_clk clk_esysclk;
85 85
86/* S3C24XX UART clocks */
87extern struct clk s3c24xx_clk_uart0;
88extern struct clk s3c24xx_clk_uart1;
89extern struct clk s3c24xx_clk_uart2;
90
86/* S3C64XX specific clocks */ 91/* S3C64XX specific clocks */
87extern struct clk clk_h2; 92extern struct clk clk_h2;
88extern struct clk clk_27m; 93extern struct clk clk_27m;
@@ -140,10 +145,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable);
140 145
141extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); 146extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable);
142 147
143/* Init for pwm clock code */
144
145extern void s3c_pwmclk_init(void);
146
147/* Global watchdog clock used by arch_wtd_reset() callback */ 148/* Global watchdog clock used by arch_wtd_reset() callback */
148 149
149extern struct clk *s3c2410_wdtclk; 150extern struct clk *s3c2410_wdtclk;
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 87d501ff3328..0dc4ac4909b0 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -134,6 +134,7 @@ extern struct platform_device exynos4_device_spdif;
134 134
135extern struct platform_device samsung_asoc_idma; 135extern struct platform_device samsung_asoc_idma;
136extern struct platform_device samsung_device_keypad; 136extern struct platform_device samsung_device_keypad;
137extern struct platform_device samsung_device_pwm;
137 138
138/* s3c2440 specific devices */ 139/* s3c2440 specific devices */
139 140
diff --git a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h b/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
deleted file mode 100644
index 5b9c42fd32d7..000000000000
--- a/arch/arm/plat-samsung/include/plat/irq-vic-timer.h
+++ /dev/null
@@ -1,13 +0,0 @@
1/* arch/arm/plat-samsung/include/plat/irq-vic-timer.h
2 *
3 * Copyright (c) 2010 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Header file for Samsung SoC IRQ VIC timer
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13extern void s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq);
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index df46b776976a..039001c0ef05 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,15 +44,6 @@
44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) 44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) 45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
46 46
47#define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x))
48
49#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
50#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
51#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
52#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
53#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
54#define IRQ_TIMER_COUNT (5)
55
56#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ 47#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
57 : ((x) - 16 + S5P_EINT_BASE2)) 48 : ((x) - 16 + S5P_EINT_BASE2))
58 49
diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h
index 5d47ca35cabd..6bc1a8f471e3 100644
--- a/arch/arm/plat-samsung/include/plat/pm.h
+++ b/arch/arm/plat-samsung/include/plat/pm.h
@@ -19,7 +19,7 @@
19 19
20struct device; 20struct device;
21 21
22#ifdef CONFIG_PM 22#ifdef CONFIG_SAMSUNG_PM
23 23
24extern __init int s3c_pm_init(void); 24extern __init int s3c_pm_init(void);
25extern __init int s3c64xx_pm_init(void); 25extern __init int s3c64xx_pm_init(void);
@@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */
58 58
59/* from sleep.S */ 59/* from sleep.S */
60 60
61extern void s3c_cpu_resume(void);
62
63extern int s3c2410_cpu_suspend(unsigned long); 61extern int s3c2410_cpu_suspend(unsigned long);
64 62
65/* sleep save info */ 63/* sleep save info */
@@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count);
106extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); 104extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
107extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); 105extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
108 106
109#ifdef CONFIG_PM 107#ifdef CONFIG_SAMSUNG_PM
110extern int s3c_irq_wake(struct irq_data *data, unsigned int state); 108extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
111extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); 109extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
110extern void s3c_cpu_resume(void);
112#else 111#else
113#define s3c_irq_wake NULL 112#define s3c_irq_wake NULL
114#define s3c_irqext_wake NULL 113#define s3c_irqext_wake NULL
114#define s3c_cpu_resume NULL
115#endif 115#endif
116 116
117/* PM debug functions */ 117/* PM debug functions */
diff --git a/arch/arm/plat-samsung/include/plat/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h
deleted file mode 100644
index bf6a60eb6237..000000000000
--- a/arch/arm/plat-samsung/include/plat/pwm-clock.h
+++ /dev/null
@@ -1,81 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright 2008 Openmoko, Inc.
7 * Copyright 2008 Simtec Electronics
8 * Ben Dooks <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * SAMSUNG - pwm clock and timer support
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16*/
17
18#ifndef __ASM_PLAT_PWM_CLOCK_H
19#define __ASM_PLAT_PWM_CLOCK_H __FILE__
20
21/**
22 * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk
23 * @tcfg: The timer TCFG1 register bits shifted down to 0.
24 *
25 * Return true if the given configuration from TCFG1 is a TCLK instead
26 * any of the TDIV clocks.
27 */
28static inline int pwm_cfg_src_is_tclk(unsigned long tcfg)
29{
30 if (soc_is_s3c24xx())
31 return tcfg == S3C2410_TCFG1_MUX_TCLK;
32 else if (soc_is_s3c64xx() || soc_is_s5pc100())
33 return tcfg >= S3C64XX_TCFG1_MUX_TCLK;
34 else if (soc_is_s5p6440() || soc_is_s5p6450())
35 return 0;
36 else
37 return tcfg == S3C64XX_TCFG1_MUX_TCLK;
38}
39
40/**
41 * tcfg_to_divisor() - convert tcfg1 setting to a divisor
42 * @tcfg1: The tcfg1 setting, shifted down.
43 *
44 * Get the divisor value for the given tcfg1 setting. We assume the
45 * caller has already checked to see if this is not a TCLK source.
46 */
47static inline unsigned long tcfg_to_divisor(unsigned long tcfg1)
48{
49 if (soc_is_s3c24xx())
50 return 1 << (tcfg1 + 1);
51 else
52 return 1 << tcfg1;
53}
54
55/**
56 * pwm_tdiv_has_div1() - does the tdiv setting have a /1
57 *
58 * Return true if we have a /1 in the tdiv setting.
59 */
60static inline unsigned int pwm_tdiv_has_div1(void)
61{
62 if (soc_is_s3c24xx())
63 return 0;
64 else
65 return 1;
66}
67
68/**
69 * pwm_tdiv_div_bits() - calculate TCFG1 divisor value.
70 * @div: The divisor to calculate the bit information for.
71 *
72 * Turn a divisor into the necessary bit field for TCFG1.
73 */
74static inline unsigned long pwm_tdiv_div_bits(unsigned int div)
75{
76 if (soc_is_s3c24xx())
77 return ilog2(div) - 1;
78 else
79 return ilog2(div);
80}
81#endif /* __ASM_PLAT_PWM_CLOCK_H */
diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/plat-samsung/include/plat/pwm-core.h
new file mode 100644
index 000000000000..5bff1facb672
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/pwm-core.h
@@ -0,0 +1,22 @@
1/*
2 * Copyright 2013 Tomasz Figa <tomasz.figa@gmail.com>
3 *
4 * Samsung PWM controller platform data helpers.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_PWM_CORE_H
12#define __ASM_ARCH_PWM_CORE_H __FILE__
13
14#include <clocksource/samsung_pwm.h>
15
16#ifdef CONFIG_SAMSUNG_DEV_PWM
17extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd);
18#else
19static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { }
20#endif
21
22#endif /* __ASM_ARCH_PWM_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-timer.h b/arch/arm/plat-samsung/include/plat/regs-timer.h
deleted file mode 100644
index d097d92f8cc7..000000000000
--- a/arch/arm/plat-samsung/include/plat/regs-timer.h
+++ /dev/null
@@ -1,124 +0,0 @@
1/* arch/arm/mach-s3c2410/include/mach/regs-timer.h
2 *
3 * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
4 * http://www.simtec.co.uk/products/SWLINUX/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * S3C2410 Timer configuration
11*/
12
13#ifndef __ASM_ARCH_REGS_TIMER_H
14#define __ASM_ARCH_REGS_TIMER_H
15
16#define S3C_TIMERREG(x) (S3C_VA_TIMER + (x))
17#define S3C_TIMERREG2(tmr,reg) S3C_TIMERREG((reg)+0x0c+((tmr)*0x0c))
18
19#define S3C2410_TCFG0 S3C_TIMERREG(0x00)
20#define S3C2410_TCFG1 S3C_TIMERREG(0x04)
21#define S3C2410_TCON S3C_TIMERREG(0x08)
22
23#define S3C64XX_TINT_CSTAT S3C_TIMERREG(0x44)
24
25#define S3C2410_TCFG_PRESCALER0_MASK (255<<0)
26#define S3C2410_TCFG_PRESCALER1_MASK (255<<8)
27#define S3C2410_TCFG_PRESCALER1_SHIFT (8)
28#define S3C2410_TCFG_DEADZONE_MASK (255<<16)
29#define S3C2410_TCFG_DEADZONE_SHIFT (16)
30
31#define S3C2410_TCFG1_MUX4_DIV2 (0<<16)
32#define S3C2410_TCFG1_MUX4_DIV4 (1<<16)
33#define S3C2410_TCFG1_MUX4_DIV8 (2<<16)
34#define S3C2410_TCFG1_MUX4_DIV16 (3<<16)
35#define S3C2410_TCFG1_MUX4_TCLK1 (4<<16)
36#define S3C2410_TCFG1_MUX4_MASK (15<<16)
37#define S3C2410_TCFG1_MUX4_SHIFT (16)
38
39#define S3C2410_TCFG1_MUX3_DIV2 (0<<12)
40#define S3C2410_TCFG1_MUX3_DIV4 (1<<12)
41#define S3C2410_TCFG1_MUX3_DIV8 (2<<12)
42#define S3C2410_TCFG1_MUX3_DIV16 (3<<12)
43#define S3C2410_TCFG1_MUX3_TCLK1 (4<<12)
44#define S3C2410_TCFG1_MUX3_MASK (15<<12)
45
46
47#define S3C2410_TCFG1_MUX2_DIV2 (0<<8)
48#define S3C2410_TCFG1_MUX2_DIV4 (1<<8)
49#define S3C2410_TCFG1_MUX2_DIV8 (2<<8)
50#define S3C2410_TCFG1_MUX2_DIV16 (3<<8)
51#define S3C2410_TCFG1_MUX2_TCLK1 (4<<8)
52#define S3C2410_TCFG1_MUX2_MASK (15<<8)
53
54
55#define S3C2410_TCFG1_MUX1_DIV2 (0<<4)
56#define S3C2410_TCFG1_MUX1_DIV4 (1<<4)
57#define S3C2410_TCFG1_MUX1_DIV8 (2<<4)
58#define S3C2410_TCFG1_MUX1_DIV16 (3<<4)
59#define S3C2410_TCFG1_MUX1_TCLK0 (4<<4)
60#define S3C2410_TCFG1_MUX1_MASK (15<<4)
61
62#define S3C2410_TCFG1_MUX0_DIV2 (0<<0)
63#define S3C2410_TCFG1_MUX0_DIV4 (1<<0)
64#define S3C2410_TCFG1_MUX0_DIV8 (2<<0)
65#define S3C2410_TCFG1_MUX0_DIV16 (3<<0)
66#define S3C2410_TCFG1_MUX0_TCLK0 (4<<0)
67#define S3C2410_TCFG1_MUX0_MASK (15<<0)
68
69#define S3C2410_TCFG1_MUX_DIV2 (0<<0)
70#define S3C2410_TCFG1_MUX_DIV4 (1<<0)
71#define S3C2410_TCFG1_MUX_DIV8 (2<<0)
72#define S3C2410_TCFG1_MUX_DIV16 (3<<0)
73#define S3C2410_TCFG1_MUX_TCLK (4<<0)
74#define S3C2410_TCFG1_MUX_MASK (15<<0)
75
76#define S3C64XX_TCFG1_MUX_DIV1 (0<<0)
77#define S3C64XX_TCFG1_MUX_DIV2 (1<<0)
78#define S3C64XX_TCFG1_MUX_DIV4 (2<<0)
79#define S3C64XX_TCFG1_MUX_DIV8 (3<<0)
80#define S3C64XX_TCFG1_MUX_DIV16 (4<<0)
81#define S3C64XX_TCFG1_MUX_TCLK (5<<0) /* 3 sets of TCLK */
82#define S3C64XX_TCFG1_MUX_MASK (15<<0)
83
84#define S3C2410_TCFG1_SHIFT(x) ((x) * 4)
85
86/* for each timer, we have an count buffer, an compare buffer and
87 * an observation buffer
88*/
89
90/* WARNING - timer 4 has no buffer reg, and it's observation is at +4 */
91
92#define S3C2410_TCNTB(tmr) S3C_TIMERREG2(tmr, 0x00)
93#define S3C2410_TCMPB(tmr) S3C_TIMERREG2(tmr, 0x04)
94#define S3C2410_TCNTO(tmr) S3C_TIMERREG2(tmr, (((tmr) == 4) ? 0x04 : 0x08))
95
96#define S3C2410_TCON_T4RELOAD (1<<22)
97#define S3C2410_TCON_T4MANUALUPD (1<<21)
98#define S3C2410_TCON_T4START (1<<20)
99
100#define S3C2410_TCON_T3RELOAD (1<<19)
101#define S3C2410_TCON_T3INVERT (1<<18)
102#define S3C2410_TCON_T3MANUALUPD (1<<17)
103#define S3C2410_TCON_T3START (1<<16)
104
105#define S3C2410_TCON_T2RELOAD (1<<15)
106#define S3C2410_TCON_T2INVERT (1<<14)
107#define S3C2410_TCON_T2MANUALUPD (1<<13)
108#define S3C2410_TCON_T2START (1<<12)
109
110#define S3C2410_TCON_T1RELOAD (1<<11)
111#define S3C2410_TCON_T1INVERT (1<<10)
112#define S3C2410_TCON_T1MANUALUPD (1<<9)
113#define S3C2410_TCON_T1START (1<<8)
114
115#define S3C2410_TCON_T0DEADZONE (1<<4)
116#define S3C2410_TCON_T0RELOAD (1<<3)
117#define S3C2410_TCON_T0INVERT (1<<2)
118#define S3C2410_TCON_T0MANUALUPD (1<<1)
119#define S3C2410_TCON_T0START (1<<0)
120
121#endif /* __ASM_ARCH_REGS_TIMER_H */
122
123
124
diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h
index 4cc99bb1f176..209464adef97 100644
--- a/arch/arm/plat-samsung/include/plat/samsung-time.h
+++ b/arch/arm/plat-samsung/include/plat/samsung-time.h
@@ -22,29 +22,6 @@ enum samsung_timer_mode {
22 SAMSUNG_PWM4, 22 SAMSUNG_PWM4,
23}; 23};
24 24
25struct samsung_timer_source {
26 unsigned int event_id;
27 unsigned int source_id;
28};
29
30/* Be able to sleep for atleast 4 seconds (usually more) */
31#define SAMSUNG_TIMER_MIN_RANGE 4
32
33#if defined(CONFIG_ARCH_S3C24XX) || defined(CONFIG_ARCH_S5PC100)
34#define TCNT_MAX 0xffff
35#define TSCALER_DIV 25
36#define TDIV 50
37#define TSIZE 16
38#else
39#define TCNT_MAX 0xffffffff
40#define TSCALER_DIV 2
41#define TDIV 2
42#define TSIZE 32
43#endif
44
45#define NON_PERIODIC 0
46#define PERIODIC 1
47
48extern void __init samsung_set_timer_source(enum samsung_timer_mode event, 25extern void __init samsung_set_timer_source(enum samsung_timer_mode event,
49 enum samsung_timer_mode source); 26 enum samsung_timer_mode source);
50 27
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
deleted file mode 100644
index 0fceb4273824..000000000000
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ /dev/null
@@ -1,98 +0,0 @@
1/* arch/arm/plat-samsung/irq-vic-timer.c
2 * originally part of arch/arm/plat-s3c64xx/irq.c
3 *
4 * Copyright 2008 Openmoko, Inc.
5 * Copyright 2008 Simtec Electronics
6 * Ben Dooks <ben@simtec.co.uk>
7 * http://armlinux.simtec.co.uk/
8 *
9 * S3C64XX - Interrupt handling
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/irqchip/chained_irq.h>
20#include <linux/io.h>
21
22#include <mach/map.h>
23#include <mach/irqs.h>
24#include <plat/cpu.h>
25#include <plat/irq-vic-timer.h>
26#include <plat/regs-timer.h>
27
28static void s3c_irq_demux_vic_timer(unsigned int irq, struct irq_desc *desc)
29{
30 struct irq_chip *chip = irq_get_chip(irq);
31 chained_irq_enter(chip, desc);
32 generic_handle_irq((int)desc->irq_data.handler_data);
33 chained_irq_exit(chip, desc);
34}
35
36/* We assume the IRQ_TIMER0..IRQ_TIMER4 range is continuous. */
37static void s3c_irq_timer_ack(struct irq_data *d)
38{
39 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
40 u32 mask = (1 << 5) << (d->irq - gc->irq_base);
41
42 irq_reg_writel(mask | gc->mask_cache, gc->reg_base);
43}
44
45/**
46 * s3c_init_vic_timer_irq() - initialise timer irq chanined off VIC.\
47 * @num: Number of timers to initialize
48 * @timer_irq: Base IRQ number to be used for the timers.
49 *
50 * Register the necessary IRQ chaining and support for the timer IRQs
51 * chained of the VIC.
52 */
53void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
54{
55 unsigned int pirq[5] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
56 IRQ_TIMER3_VIC, IRQ_TIMER4_VIC };
57 struct irq_chip_generic *s3c_tgc;
58 struct irq_chip_type *ct;
59 unsigned int i;
60
61#ifdef CONFIG_ARCH_EXYNOS
62 if (soc_is_exynos5250()) {
63 pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
64 pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
65 pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
66 pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
67 pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
68 } else {
69 pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
70 pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
71 pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
72 pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
73 pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
74 }
75#endif
76 s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
77 S3C64XX_TINT_CSTAT, handle_level_irq);
78
79 if (!s3c_tgc) {
80 pr_err("%s: irq_alloc_generic_chip for IRQ %d failed\n",
81 __func__, timer_irq);
82 return;
83 }
84
85 ct = s3c_tgc->chip_types;
86 ct->chip.irq_mask = irq_gc_mask_clr_bit;
87 ct->chip.irq_unmask = irq_gc_mask_set_bit;
88 ct->chip.irq_ack = s3c_irq_timer_ack;
89 irq_setup_generic_chip(s3c_tgc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
90 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
91 /* Clear the upper bits of the mask_cache*/
92 s3c_tgc->mask_cache &= 0x1f;
93
94 for (i = 0; i < num; i++, timer_irq++) {
95 irq_set_chained_handler(pirq[i], s3c_irq_demux_vic_timer);
96 irq_set_handler_data(pirq[i], (void *)timer_irq);
97 }
98}
diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c
index ea3613642451..d0c23010b693 100644
--- a/arch/arm/plat-samsung/pm.c
+++ b/arch/arm/plat-samsung/pm.c
@@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot;
80 80
81#ifdef CONFIG_SAMSUNG_PM_DEBUG 81#ifdef CONFIG_SAMSUNG_PM_DEBUG
82 82
83static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; 83static struct pm_uart_save uart_save;
84 84
85static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) 85static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
86{ 86{
@@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
101 101
102static void s3c_pm_save_uarts(void) 102static void s3c_pm_save_uarts(void)
103{ 103{
104 struct pm_uart_save *save = uart_save; 104 s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
105 unsigned int uart;
106
107 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
108 s3c_pm_save_uart(uart, save);
109} 105}
110 106
111static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) 107static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
@@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
126 122
127static void s3c_pm_restore_uarts(void) 123static void s3c_pm_restore_uarts(void)
128{ 124{
129 struct pm_uart_save *save = uart_save; 125 s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
130 unsigned int uart;
131
132 for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
133 s3c_pm_restore_uart(uart, save);
134} 126}
135#else 127#else
136static void s3c_pm_save_uarts(void) { } 128static void s3c_pm_save_uarts(void) { }
diff --git a/arch/arm/plat-samsung/pwm-clock.c b/arch/arm/plat-samsung/pwm-clock.c
deleted file mode 100644
index a35ff3bcffe4..000000000000
--- a/arch/arm/plat-samsung/pwm-clock.c
+++ /dev/null
@@ -1,474 +0,0 @@
1/* linux/arch/arm/plat-s3c24xx/pwm-clock.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Copyright (c) 2007, 2008 Ben Dooks
5 * Ben Dooks <ben-linux@fluff.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License.
10*/
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/list.h>
16#include <linux/errno.h>
17#include <linux/log2.h>
18#include <linux/clk.h>
19#include <linux/err.h>
20#include <linux/io.h>
21
22#include <mach/hardware.h>
23#include <mach/map.h>
24#include <asm/irq.h>
25
26#include <plat/clock.h>
27#include <plat/cpu.h>
28
29#include <plat/regs-timer.h>
30#include <plat/pwm-clock.h>
31
32/* Each of the timers 0 through 5 go through the following
33 * clock tree, with the inputs depending on the timers.
34 *
35 * pclk ---- [ prescaler 0 ] -+---> timer 0
36 * +---> timer 1
37 *
38 * pclk ---- [ prescaler 1 ] -+---> timer 2
39 * +---> timer 3
40 * \---> timer 4
41 *
42 * Which are fed into the timers as so:
43 *
44 * prescaled 0 ---- [ div 2,4,8,16 ] ---\
45 * [mux] -> timer 0
46 * tclk 0 ------------------------------/
47 *
48 * prescaled 0 ---- [ div 2,4,8,16 ] ---\
49 * [mux] -> timer 1
50 * tclk 0 ------------------------------/
51 *
52 *
53 * prescaled 1 ---- [ div 2,4,8,16 ] ---\
54 * [mux] -> timer 2
55 * tclk 1 ------------------------------/
56 *
57 * prescaled 1 ---- [ div 2,4,8,16 ] ---\
58 * [mux] -> timer 3
59 * tclk 1 ------------------------------/
60 *
61 * prescaled 1 ---- [ div 2,4,8, 16 ] --\
62 * [mux] -> timer 4
63 * tclk 1 ------------------------------/
64 *
65 * Since the mux and the divider are tied together in the
66 * same register space, it is impossible to set the parent
67 * and the rate at the same time. To avoid this, we add an
68 * intermediate 'prescaled-and-divided' clock to select
69 * as the parent for the timer input clock called tdiv.
70 *
71 * prescaled clk --> pwm-tdiv ---\
72 * [ mux ] --> timer X
73 * tclk -------------------------/
74*/
75
76static struct clk clk_timer_scaler[];
77
78static unsigned long clk_pwm_scaler_get_rate(struct clk *clk)
79{
80 unsigned long tcfg0 = __raw_readl(S3C2410_TCFG0);
81
82 if (clk == &clk_timer_scaler[1]) {
83 tcfg0 &= S3C2410_TCFG_PRESCALER1_MASK;
84 tcfg0 >>= S3C2410_TCFG_PRESCALER1_SHIFT;
85 } else {
86 tcfg0 &= S3C2410_TCFG_PRESCALER0_MASK;
87 }
88
89 return clk_get_rate(clk->parent) / (tcfg0 + 1);
90}
91
92static unsigned long clk_pwm_scaler_round_rate(struct clk *clk,
93 unsigned long rate)
94{
95 unsigned long parent_rate = clk_get_rate(clk->parent);
96 unsigned long divisor = parent_rate / rate;
97
98 if (divisor > 256)
99 divisor = 256;
100 else if (divisor < 2)
101 divisor = 2;
102
103 return parent_rate / divisor;
104}
105
106static int clk_pwm_scaler_set_rate(struct clk *clk, unsigned long rate)
107{
108 unsigned long round = clk_pwm_scaler_round_rate(clk, rate);
109 unsigned long tcfg0;
110 unsigned long divisor;
111 unsigned long flags;
112
113 divisor = clk_get_rate(clk->parent) / round;
114 divisor--;
115
116 local_irq_save(flags);
117 tcfg0 = __raw_readl(S3C2410_TCFG0);
118
119 if (clk == &clk_timer_scaler[1]) {
120 tcfg0 &= ~S3C2410_TCFG_PRESCALER1_MASK;
121 tcfg0 |= divisor << S3C2410_TCFG_PRESCALER1_SHIFT;
122 } else {
123 tcfg0 &= ~S3C2410_TCFG_PRESCALER0_MASK;
124 tcfg0 |= divisor;
125 }
126
127 __raw_writel(tcfg0, S3C2410_TCFG0);
128 local_irq_restore(flags);
129
130 return 0;
131}
132
133static struct clk_ops clk_pwm_scaler_ops = {
134 .get_rate = clk_pwm_scaler_get_rate,
135 .set_rate = clk_pwm_scaler_set_rate,
136 .round_rate = clk_pwm_scaler_round_rate,
137};
138
139static struct clk clk_timer_scaler[] = {
140 [0] = {
141 .name = "pwm-scaler0",
142 .id = -1,
143 .ops = &clk_pwm_scaler_ops,
144 },
145 [1] = {
146 .name = "pwm-scaler1",
147 .id = -1,
148 .ops = &clk_pwm_scaler_ops,
149 },
150};
151
152static struct clk clk_timer_tclk[] = {
153 [0] = {
154 .name = "pwm-tclk0",
155 .id = -1,
156 },
157 [1] = {
158 .name = "pwm-tclk1",
159 .id = -1,
160 },
161};
162
163struct pwm_tdiv_clk {
164 struct clk clk;
165 unsigned int divisor;
166};
167
168static inline struct pwm_tdiv_clk *to_tdiv(struct clk *clk)
169{
170 return container_of(clk, struct pwm_tdiv_clk, clk);
171}
172
173static unsigned long clk_pwm_tdiv_get_rate(struct clk *clk)
174{
175 unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
176 unsigned int divisor;
177
178 tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
179 tcfg1 &= S3C2410_TCFG1_MUX_MASK;
180
181 if (pwm_cfg_src_is_tclk(tcfg1))
182 divisor = to_tdiv(clk)->divisor;
183 else
184 divisor = tcfg_to_divisor(tcfg1);
185
186 return clk_get_rate(clk->parent) / divisor;
187}
188
189static unsigned long clk_pwm_tdiv_round_rate(struct clk *clk,
190 unsigned long rate)
191{
192 unsigned long parent_rate;
193 unsigned long divisor;
194
195 parent_rate = clk_get_rate(clk->parent);
196 divisor = parent_rate / rate;
197
198 if (divisor <= 1 && pwm_tdiv_has_div1())
199 divisor = 1;
200 else if (divisor <= 2)
201 divisor = 2;
202 else if (divisor <= 4)
203 divisor = 4;
204 else if (divisor <= 8)
205 divisor = 8;
206 else
207 divisor = 16;
208
209 return parent_rate / divisor;
210}
211
212static unsigned long clk_pwm_tdiv_bits(struct pwm_tdiv_clk *divclk)
213{
214 return pwm_tdiv_div_bits(divclk->divisor);
215}
216
217static void clk_pwm_tdiv_update(struct pwm_tdiv_clk *divclk)
218{
219 unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
220 unsigned long bits = clk_pwm_tdiv_bits(divclk);
221 unsigned long flags;
222 unsigned long shift = S3C2410_TCFG1_SHIFT(divclk->clk.id);
223
224 local_irq_save(flags);
225
226 tcfg1 = __raw_readl(S3C2410_TCFG1);
227 tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
228 tcfg1 |= bits << shift;
229 __raw_writel(tcfg1, S3C2410_TCFG1);
230
231 local_irq_restore(flags);
232}
233
234static int clk_pwm_tdiv_set_rate(struct clk *clk, unsigned long rate)
235{
236 struct pwm_tdiv_clk *divclk = to_tdiv(clk);
237 unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
238 unsigned long parent_rate = clk_get_rate(clk->parent);
239 unsigned long divisor;
240
241 tcfg1 >>= S3C2410_TCFG1_SHIFT(clk->id);
242 tcfg1 &= S3C2410_TCFG1_MUX_MASK;
243
244 rate = clk_round_rate(clk, rate);
245 divisor = parent_rate / rate;
246
247 if (divisor > 16)
248 return -EINVAL;
249
250 divclk->divisor = divisor;
251
252 /* Update the current MUX settings if we are currently
253 * selected as the clock source for this clock. */
254
255 if (!pwm_cfg_src_is_tclk(tcfg1))
256 clk_pwm_tdiv_update(divclk);
257
258 return 0;
259}
260
261static struct clk_ops clk_tdiv_ops = {
262 .get_rate = clk_pwm_tdiv_get_rate,
263 .set_rate = clk_pwm_tdiv_set_rate,
264 .round_rate = clk_pwm_tdiv_round_rate,
265};
266
267static struct pwm_tdiv_clk clk_timer_tdiv[] = {
268 [0] = {
269 .clk = {
270 .name = "pwm-tdiv",
271 .devname = "s3c24xx-pwm.0",
272 .ops = &clk_tdiv_ops,
273 .parent = &clk_timer_scaler[0],
274 },
275 },
276 [1] = {
277 .clk = {
278 .name = "pwm-tdiv",
279 .devname = "s3c24xx-pwm.1",
280 .ops = &clk_tdiv_ops,
281 .parent = &clk_timer_scaler[0],
282 }
283 },
284 [2] = {
285 .clk = {
286 .name = "pwm-tdiv",
287 .devname = "s3c24xx-pwm.2",
288 .ops = &clk_tdiv_ops,
289 .parent = &clk_timer_scaler[1],
290 },
291 },
292 [3] = {
293 .clk = {
294 .name = "pwm-tdiv",
295 .devname = "s3c24xx-pwm.3",
296 .ops = &clk_tdiv_ops,
297 .parent = &clk_timer_scaler[1],
298 },
299 },
300 [4] = {
301 .clk = {
302 .name = "pwm-tdiv",
303 .devname = "s3c24xx-pwm.4",
304 .ops = &clk_tdiv_ops,
305 .parent = &clk_timer_scaler[1],
306 },
307 },
308};
309
310static int __init clk_pwm_tdiv_register(unsigned int id)
311{
312 struct pwm_tdiv_clk *divclk = &clk_timer_tdiv[id];
313 unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
314
315 tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
316 tcfg1 &= S3C2410_TCFG1_MUX_MASK;
317
318 divclk->clk.id = id;
319 divclk->divisor = tcfg_to_divisor(tcfg1);
320
321 return s3c24xx_register_clock(&divclk->clk);
322}
323
324static inline struct clk *s3c24xx_pwmclk_tclk(unsigned int id)
325{
326 return (id >= 2) ? &clk_timer_tclk[1] : &clk_timer_tclk[0];
327}
328
329static inline struct clk *s3c24xx_pwmclk_tdiv(unsigned int id)
330{
331 return &clk_timer_tdiv[id].clk;
332}
333
334static int clk_pwm_tin_set_parent(struct clk *clk, struct clk *parent)
335{
336 unsigned int id = clk->id;
337 unsigned long tcfg1;
338 unsigned long flags;
339 unsigned long bits;
340 unsigned long shift = S3C2410_TCFG1_SHIFT(id);
341
342 unsigned long mux_tclk;
343
344 if (soc_is_s3c24xx())
345 mux_tclk = S3C2410_TCFG1_MUX_TCLK;
346 else if (soc_is_s5p6440() || soc_is_s5p6450())
347 mux_tclk = 0;
348 else
349 mux_tclk = S3C64XX_TCFG1_MUX_TCLK;
350
351 if (parent == s3c24xx_pwmclk_tclk(id))
352 bits = mux_tclk << shift;
353 else if (parent == s3c24xx_pwmclk_tdiv(id))
354 bits = clk_pwm_tdiv_bits(to_tdiv(parent)) << shift;
355 else
356 return -EINVAL;
357
358 clk->parent = parent;
359
360 local_irq_save(flags);
361
362 tcfg1 = __raw_readl(S3C2410_TCFG1);
363 tcfg1 &= ~(S3C2410_TCFG1_MUX_MASK << shift);
364 __raw_writel(tcfg1 | bits, S3C2410_TCFG1);
365
366 local_irq_restore(flags);
367
368 return 0;
369}
370
371static struct clk_ops clk_tin_ops = {
372 .set_parent = clk_pwm_tin_set_parent,
373};
374
375static struct clk clk_tin[] = {
376 [0] = {
377 .name = "pwm-tin",
378 .devname = "s3c24xx-pwm.0",
379 .id = 0,
380 .ops = &clk_tin_ops,
381 },
382 [1] = {
383 .name = "pwm-tin",
384 .devname = "s3c24xx-pwm.1",
385 .id = 1,
386 .ops = &clk_tin_ops,
387 },
388 [2] = {
389 .name = "pwm-tin",
390 .devname = "s3c24xx-pwm.2",
391 .id = 2,
392 .ops = &clk_tin_ops,
393 },
394 [3] = {
395 .name = "pwm-tin",
396 .devname = "s3c24xx-pwm.3",
397 .id = 3,
398 .ops = &clk_tin_ops,
399 },
400 [4] = {
401 .name = "pwm-tin",
402 .devname = "s3c24xx-pwm.4",
403 .id = 4,
404 .ops = &clk_tin_ops,
405 },
406};
407
408static __init int clk_pwm_tin_register(struct clk *pwm)
409{
410 unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
411 unsigned int id = pwm->id;
412
413 struct clk *parent;
414 int ret;
415
416 ret = s3c24xx_register_clock(pwm);
417 if (ret < 0)
418 return ret;
419
420 tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
421 tcfg1 &= S3C2410_TCFG1_MUX_MASK;
422
423 if (pwm_cfg_src_is_tclk(tcfg1))
424 parent = s3c24xx_pwmclk_tclk(id);
425 else
426 parent = s3c24xx_pwmclk_tdiv(id);
427
428 return clk_set_parent(pwm, parent);
429}
430
431/**
432 * s3c_pwmclk_init() - initialise pwm clocks
433 *
434 * Initialise and register the clocks which provide the inputs for the
435 * pwm timer blocks.
436 *
437 * Note, this call is required by the time core, so must be called after
438 * the base clocks are added and before any of the initcalls are run.
439 */
440__init void s3c_pwmclk_init(void)
441{
442 struct clk *clk_timers;
443 unsigned int clk;
444 int ret;
445
446 clk_timers = clk_get(NULL, "timers");
447 if (IS_ERR(clk_timers)) {
448 printk(KERN_ERR "%s: no parent clock\n", __func__);
449 return;
450 }
451
452 for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
453 clk_timer_scaler[clk].parent = clk_timers;
454
455 s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
456 s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
457
458 for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
459 ret = clk_pwm_tdiv_register(clk);
460
461 if (ret < 0) {
462 printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
463 return;
464 }
465 }
466
467 for (clk = 0; clk < ARRAY_SIZE(clk_tin); clk++) {
468 ret = clk_pwm_tin_register(&clk_tin[clk]);
469 if (ret < 0) {
470 printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
471 return;
472 }
473 }
474}
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
index ff1a76011b1e..ddfaca9c79d8 100644
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ b/arch/arm/plat-samsung/s5p-irq.c
@@ -17,9 +17,7 @@
17 17
18#include <mach/irqs.h> 18#include <mach/irqs.h>
19#include <mach/map.h> 19#include <mach/map.h>
20#include <plat/regs-timer.h>
21#include <plat/cpu.h> 20#include <plat/cpu.h>
22#include <plat/irq-vic-timer.h>
23 21
24void __init s5p_init_irq(u32 *vic, u32 num_vic) 22void __init s5p_init_irq(u32 *vic, u32 num_vic)
25{ 23{
@@ -30,6 +28,4 @@ void __init s5p_init_irq(u32 *vic, u32 num_vic)
30 for (irq = 0; irq < num_vic; irq++) 28 for (irq = 0; irq < num_vic; irq++)
31 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); 29 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
32#endif 30#endif
33
34 s3c_init_vic_timer_irq(5, IRQ_TIMER0);
35} 31}
diff --git a/arch/arm/plat-samsung/samsung-time.c b/arch/arm/plat-samsung/samsung-time.c
deleted file mode 100644
index 2957075ca836..000000000000
--- a/arch/arm/plat-samsung/samsung-time.c
+++ /dev/null
@@ -1,394 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * samsung - Common hr-timer support (s3c and s5p)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/interrupt.h>
13#include <linux/irq.h>
14#include <linux/err.h>
15#include <linux/clk.h>
16#include <linux/clockchips.h>
17#include <linux/platform_device.h>
18#include <linux/sched_clock.h>
19
20#include <asm/smp_twd.h>
21#include <asm/mach/time.h>
22#include <asm/mach/arch.h>
23#include <asm/mach/map.h>
24
25#include <mach/map.h>
26#include <plat/devs.h>
27#include <plat/regs-timer.h>
28#include <plat/samsung-time.h>
29
30static struct clk *tin_event;
31static struct clk *tin_source;
32static struct clk *tdiv_event;
33static struct clk *tdiv_source;
34static struct clk *timerclk;
35static struct samsung_timer_source timer_source;
36static unsigned long clock_count_per_tick;
37static void samsung_timer_resume(void);
38
39static void samsung_time_stop(enum samsung_timer_mode mode)
40{
41 unsigned long tcon;
42
43 tcon = __raw_readl(S3C2410_TCON);
44
45 switch (mode) {
46 case SAMSUNG_PWM0:
47 tcon &= ~S3C2410_TCON_T0START;
48 break;
49
50 case SAMSUNG_PWM1:
51 tcon &= ~S3C2410_TCON_T1START;
52 break;
53
54 case SAMSUNG_PWM2:
55 tcon &= ~S3C2410_TCON_T2START;
56 break;
57
58 case SAMSUNG_PWM3:
59 tcon &= ~S3C2410_TCON_T3START;
60 break;
61
62 case SAMSUNG_PWM4:
63 tcon &= ~S3C2410_TCON_T4START;
64 break;
65
66 default:
67 printk(KERN_ERR "Invalid Timer %d\n", mode);
68 break;
69 }
70 __raw_writel(tcon, S3C2410_TCON);
71}
72
73static void samsung_time_setup(enum samsung_timer_mode mode, unsigned long tcnt)
74{
75 unsigned long tcon;
76
77 tcon = __raw_readl(S3C2410_TCON);
78
79 tcnt--;
80
81 switch (mode) {
82 case SAMSUNG_PWM0:
83 tcon &= ~(0x0f << 0);
84 tcon |= S3C2410_TCON_T0MANUALUPD;
85 break;
86
87 case SAMSUNG_PWM1:
88 tcon &= ~(0x0f << 8);
89 tcon |= S3C2410_TCON_T1MANUALUPD;
90 break;
91
92 case SAMSUNG_PWM2:
93 tcon &= ~(0x0f << 12);
94 tcon |= S3C2410_TCON_T2MANUALUPD;
95 break;
96
97 case SAMSUNG_PWM3:
98 tcon &= ~(0x0f << 16);
99 tcon |= S3C2410_TCON_T3MANUALUPD;
100 break;
101
102 case SAMSUNG_PWM4:
103 tcon &= ~(0x07 << 20);
104 tcon |= S3C2410_TCON_T4MANUALUPD;
105 break;
106
107 default:
108 printk(KERN_ERR "Invalid Timer %d\n", mode);
109 break;
110 }
111
112 __raw_writel(tcnt, S3C2410_TCNTB(mode));
113 __raw_writel(tcnt, S3C2410_TCMPB(mode));
114 __raw_writel(tcon, S3C2410_TCON);
115}
116
117static void samsung_time_start(enum samsung_timer_mode mode, bool periodic)
118{
119 unsigned long tcon;
120
121 tcon = __raw_readl(S3C2410_TCON);
122
123 switch (mode) {
124 case SAMSUNG_PWM0:
125 tcon |= S3C2410_TCON_T0START;
126 tcon &= ~S3C2410_TCON_T0MANUALUPD;
127
128 if (periodic)
129 tcon |= S3C2410_TCON_T0RELOAD;
130 else
131 tcon &= ~S3C2410_TCON_T0RELOAD;
132 break;
133
134 case SAMSUNG_PWM1:
135 tcon |= S3C2410_TCON_T1START;
136 tcon &= ~S3C2410_TCON_T1MANUALUPD;
137
138 if (periodic)
139 tcon |= S3C2410_TCON_T1RELOAD;
140 else
141 tcon &= ~S3C2410_TCON_T1RELOAD;
142 break;
143
144 case SAMSUNG_PWM2:
145 tcon |= S3C2410_TCON_T2START;
146 tcon &= ~S3C2410_TCON_T2MANUALUPD;
147
148 if (periodic)
149 tcon |= S3C2410_TCON_T2RELOAD;
150 else
151 tcon &= ~S3C2410_TCON_T2RELOAD;
152 break;
153
154 case SAMSUNG_PWM3:
155 tcon |= S3C2410_TCON_T3START;
156 tcon &= ~S3C2410_TCON_T3MANUALUPD;
157
158 if (periodic)
159 tcon |= S3C2410_TCON_T3RELOAD;
160 else
161 tcon &= ~S3C2410_TCON_T3RELOAD;
162 break;
163
164 case SAMSUNG_PWM4:
165 tcon |= S3C2410_TCON_T4START;
166 tcon &= ~S3C2410_TCON_T4MANUALUPD;
167
168 if (periodic)
169 tcon |= S3C2410_TCON_T4RELOAD;
170 else
171 tcon &= ~S3C2410_TCON_T4RELOAD;
172 break;
173
174 default:
175 printk(KERN_ERR "Invalid Timer %d\n", mode);
176 break;
177 }
178 __raw_writel(tcon, S3C2410_TCON);
179}
180
181static int samsung_set_next_event(unsigned long cycles,
182 struct clock_event_device *evt)
183{
184 samsung_time_setup(timer_source.event_id, cycles);
185 samsung_time_start(timer_source.event_id, NON_PERIODIC);
186
187 return 0;
188}
189
190static void samsung_set_mode(enum clock_event_mode mode,
191 struct clock_event_device *evt)
192{
193 samsung_time_stop(timer_source.event_id);
194
195 switch (mode) {
196 case CLOCK_EVT_MODE_PERIODIC:
197 samsung_time_setup(timer_source.event_id, clock_count_per_tick);
198 samsung_time_start(timer_source.event_id, PERIODIC);
199 break;
200
201 case CLOCK_EVT_MODE_ONESHOT:
202 break;
203
204 case CLOCK_EVT_MODE_UNUSED:
205 case CLOCK_EVT_MODE_SHUTDOWN:
206 break;
207
208 case CLOCK_EVT_MODE_RESUME:
209 samsung_timer_resume();
210 break;
211 }
212}
213
214static void samsung_timer_resume(void)
215{
216 /* event timer restart */
217 samsung_time_setup(timer_source.event_id, clock_count_per_tick);
218 samsung_time_start(timer_source.event_id, PERIODIC);
219
220 /* source timer restart */
221 samsung_time_setup(timer_source.source_id, TCNT_MAX);
222 samsung_time_start(timer_source.source_id, PERIODIC);
223}
224
225void __init samsung_set_timer_source(enum samsung_timer_mode event,
226 enum samsung_timer_mode source)
227{
228 s3c_device_timer[event].dev.bus = &platform_bus_type;
229 s3c_device_timer[source].dev.bus = &platform_bus_type;
230
231 timer_source.event_id = event;
232 timer_source.source_id = source;
233}
234
235static struct clock_event_device time_event_device = {
236 .name = "samsung_event_timer",
237 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
238 .rating = 200,
239 .set_next_event = samsung_set_next_event,
240 .set_mode = samsung_set_mode,
241};
242
243static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
244{
245 struct clock_event_device *evt = dev_id;
246
247 evt->event_handler(evt);
248
249 return IRQ_HANDLED;
250}
251
252static struct irqaction samsung_clock_event_irq = {
253 .name = "samsung_time_irq",
254 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
255 .handler = samsung_clock_event_isr,
256 .dev_id = &time_event_device,
257};
258
259static void __init samsung_clockevent_init(void)
260{
261 unsigned long pclk;
262 unsigned long clock_rate;
263 unsigned int irq_number;
264 struct clk *tscaler;
265
266 pclk = clk_get_rate(timerclk);
267
268 tscaler = clk_get_parent(tdiv_event);
269
270 clk_set_rate(tscaler, pclk / TSCALER_DIV);
271 clk_set_rate(tdiv_event, pclk / TDIV);
272 clk_set_parent(tin_event, tdiv_event);
273
274 clock_rate = clk_get_rate(tin_event);
275 clock_count_per_tick = clock_rate / HZ;
276
277 time_event_device.cpumask = cpumask_of(0);
278 clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
279
280 irq_number = timer_source.event_id + IRQ_TIMER0;
281 setup_irq(irq_number, &samsung_clock_event_irq);
282}
283
284static void __iomem *samsung_timer_reg(void)
285{
286 unsigned long offset = 0;
287
288 switch (timer_source.source_id) {
289 case SAMSUNG_PWM0:
290 case SAMSUNG_PWM1:
291 case SAMSUNG_PWM2:
292 case SAMSUNG_PWM3:
293 offset = (timer_source.source_id * 0x0c) + 0x14;
294 break;
295
296 case SAMSUNG_PWM4:
297 offset = 0x40;
298 break;
299
300 default:
301 printk(KERN_ERR "Invalid Timer %d\n", timer_source.source_id);
302 return NULL;
303 }
304
305 return S3C_TIMERREG(offset);
306}
307
308/*
309 * Override the global weak sched_clock symbol with this
310 * local implementation which uses the clocksource to get some
311 * better resolution when scheduling the kernel. We accept that
312 * this wraps around for now, since it is just a relative time
313 * stamp. (Inspired by U300 implementation.)
314 */
315static u32 notrace samsung_read_sched_clock(void)
316{
317 void __iomem *reg = samsung_timer_reg();
318
319 if (!reg)
320 return 0;
321
322 return ~__raw_readl(reg);
323}
324
325static void __init samsung_clocksource_init(void)
326{
327 unsigned long pclk;
328 unsigned long clock_rate;
329
330 pclk = clk_get_rate(timerclk);
331
332 clk_set_rate(tdiv_source, pclk / TDIV);
333 clk_set_parent(tin_source, tdiv_source);
334
335 clock_rate = clk_get_rate(tin_source);
336
337 samsung_time_setup(timer_source.source_id, TCNT_MAX);
338 samsung_time_start(timer_source.source_id, PERIODIC);
339
340 setup_sched_clock(samsung_read_sched_clock, TSIZE, clock_rate);
341
342 if (clocksource_mmio_init(samsung_timer_reg(), "samsung_clocksource_timer",
343 clock_rate, 250, TSIZE, clocksource_mmio_readl_down))
344 panic("samsung_clocksource_timer: can't register clocksource\n");
345}
346
347static void __init samsung_timer_resources(void)
348{
349
350 unsigned long event_id = timer_source.event_id;
351 unsigned long source_id = timer_source.source_id;
352 char devname[15];
353
354 timerclk = clk_get(NULL, "timers");
355 if (IS_ERR(timerclk))
356 panic("failed to get timers clock for timer");
357
358 clk_enable(timerclk);
359
360 sprintf(devname, "s3c24xx-pwm.%lu", event_id);
361 s3c_device_timer[event_id].id = event_id;
362 s3c_device_timer[event_id].dev.init_name = devname;
363
364 tin_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tin");
365 if (IS_ERR(tin_event))
366 panic("failed to get pwm-tin clock for event timer");
367
368 tdiv_event = clk_get(&s3c_device_timer[event_id].dev, "pwm-tdiv");
369 if (IS_ERR(tdiv_event))
370 panic("failed to get pwm-tdiv clock for event timer");
371
372 clk_enable(tin_event);
373
374 sprintf(devname, "s3c24xx-pwm.%lu", source_id);
375 s3c_device_timer[source_id].id = source_id;
376 s3c_device_timer[source_id].dev.init_name = devname;
377
378 tin_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tin");
379 if (IS_ERR(tin_source))
380 panic("failed to get pwm-tin clock for source timer");
381
382 tdiv_source = clk_get(&s3c_device_timer[source_id].dev, "pwm-tdiv");
383 if (IS_ERR(tdiv_source))
384 panic("failed to get pwm-tdiv clock for source timer");
385
386 clk_enable(tin_source);
387}
388
389void __init samsung_timer_init(void)
390{
391 samsung_timer_resources();
392 samsung_clockevent_init();
393 samsung_clocksource_init();
394}
diff --git a/arch/arm/xen/enlighten.c b/arch/arm/xen/enlighten.c
index f71c37edca26..c9770ba5c7df 100644
--- a/arch/arm/xen/enlighten.c
+++ b/arch/arm/xen/enlighten.c
@@ -172,7 +172,7 @@ static void __init xen_percpu_init(void *unused)
172 enable_percpu_irq(xen_events_irq, 0); 172 enable_percpu_irq(xen_events_irq, 0);
173} 173}
174 174
175static void xen_restart(char str, const char *cmd) 175static void xen_restart(enum reboot_mode reboot_mode, const char *cmd)
176{ 176{
177 struct sched_shutdown r = { .reason = SHUTDOWN_reboot }; 177 struct sched_shutdown r = { .reason = SHUTDOWN_reboot };
178 int rc; 178 int rc;
diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index 3659e460071d..23a3c4791d86 100644
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -24,10 +24,10 @@
24#include <linux/compiler.h> 24#include <linux/compiler.h>
25 25
26#ifndef CONFIG_ARM64_64K_PAGES 26#ifndef CONFIG_ARM64_64K_PAGES
27#define THREAD_SIZE_ORDER 1 27#define THREAD_SIZE_ORDER 2
28#endif 28#endif
29 29
30#define THREAD_SIZE 8192 30#define THREAD_SIZE 16384
31#define THREAD_START_SP (THREAD_SIZE - 16) 31#define THREAD_START_SP (THREAD_SIZE - 16)
32 32
33#ifndef __ASSEMBLY__ 33#ifndef __ASSEMBLY__
diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h
index 439827271e3d..26e310c54344 100644
--- a/arch/arm64/include/asm/virt.h
+++ b/arch/arm64/include/asm/virt.h
@@ -21,6 +21,7 @@
21#define BOOT_CPU_MODE_EL2 (0x0e12b007) 21#define BOOT_CPU_MODE_EL2 (0x0e12b007)
22 22
23#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
24#include <asm/cacheflush.h>
24 25
25/* 26/*
26 * __boot_cpu_mode records what mode CPUs were booted in. 27 * __boot_cpu_mode records what mode CPUs were booted in.
@@ -36,9 +37,20 @@ extern u32 __boot_cpu_mode[2];
36void __hyp_set_vectors(phys_addr_t phys_vector_base); 37void __hyp_set_vectors(phys_addr_t phys_vector_base);
37phys_addr_t __hyp_get_vectors(void); 38phys_addr_t __hyp_get_vectors(void);
38 39
40static inline void sync_boot_mode(void)
41{
42 /*
43 * As secondaries write to __boot_cpu_mode with caches disabled, we
44 * must flush the corresponding cache entries to ensure the visibility
45 * of their writes.
46 */
47 __flush_dcache_area(__boot_cpu_mode, sizeof(__boot_cpu_mode));
48}
49
39/* Reports the availability of HYP mode */ 50/* Reports the availability of HYP mode */
40static inline bool is_hyp_mode_available(void) 51static inline bool is_hyp_mode_available(void)
41{ 52{
53 sync_boot_mode();
42 return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 && 54 return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 &&
43 __boot_cpu_mode[1] == BOOT_CPU_MODE_EL2); 55 __boot_cpu_mode[1] == BOOT_CPU_MODE_EL2);
44} 56}
@@ -46,6 +58,7 @@ static inline bool is_hyp_mode_available(void)
46/* Check if the bootloader has booted CPUs in different modes */ 58/* Check if the bootloader has booted CPUs in different modes */
47static inline bool is_hyp_mode_mismatched(void) 59static inline bool is_hyp_mode_mismatched(void)
48{ 60{
61 sync_boot_mode();
49 return __boot_cpu_mode[0] != __boot_cpu_mode[1]; 62 return __boot_cpu_mode[0] != __boot_cpu_mode[1];
50} 63}
51 64
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 1d1314280a03..6ad781b21c08 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -121,7 +121,7 @@
121 121
122 .macro get_thread_info, rd 122 .macro get_thread_info, rd
123 mov \rd, sp 123 mov \rd, sp
124 and \rd, \rd, #~((1 << 13) - 1) // top of 8K stack 124 and \rd, \rd, #~(THREAD_SIZE - 1) // top of stack
125 .endm 125 .endm
126 126
127/* 127/*
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index 1788bf6b471f..57fb55c44c90 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -81,7 +81,7 @@ void soft_restart(unsigned long addr)
81void (*pm_power_off)(void); 81void (*pm_power_off)(void);
82EXPORT_SYMBOL_GPL(pm_power_off); 82EXPORT_SYMBOL_GPL(pm_power_off);
83 83
84void (*arm_pm_restart)(char str, const char *cmd); 84void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
85EXPORT_SYMBOL_GPL(arm_pm_restart); 85EXPORT_SYMBOL_GPL(arm_pm_restart);
86 86
87void arch_cpu_idle_prepare(void) 87void arch_cpu_idle_prepare(void)
diff --git a/arch/ia64/configs/generic_defconfig b/arch/ia64/configs/generic_defconfig
index 7913695b2fcb..efbd2929aeb7 100644
--- a/arch/ia64/configs/generic_defconfig
+++ b/arch/ia64/configs/generic_defconfig
@@ -31,7 +31,7 @@ CONFIG_ACPI_FAN=m
31CONFIG_ACPI_DOCK=y 31CONFIG_ACPI_DOCK=y
32CONFIG_ACPI_PROCESSOR=m 32CONFIG_ACPI_PROCESSOR=m
33CONFIG_ACPI_CONTAINER=m 33CONFIG_ACPI_CONTAINER=m
34CONFIG_HOTPLUG_PCI=m 34CONFIG_HOTPLUG_PCI=y
35CONFIG_HOTPLUG_PCI_ACPI=m 35CONFIG_HOTPLUG_PCI_ACPI=m
36CONFIG_PACKET=y 36CONFIG_PACKET=y
37CONFIG_UNIX=y 37CONFIG_UNIX=y
diff --git a/arch/ia64/configs/gensparse_defconfig b/arch/ia64/configs/gensparse_defconfig
index f8e913365423..f64980dd20c3 100644
--- a/arch/ia64/configs/gensparse_defconfig
+++ b/arch/ia64/configs/gensparse_defconfig
@@ -25,7 +25,7 @@ CONFIG_ACPI_BUTTON=m
25CONFIG_ACPI_FAN=m 25CONFIG_ACPI_FAN=m
26CONFIG_ACPI_PROCESSOR=m 26CONFIG_ACPI_PROCESSOR=m
27CONFIG_ACPI_CONTAINER=m 27CONFIG_ACPI_CONTAINER=m
28CONFIG_HOTPLUG_PCI=m 28CONFIG_HOTPLUG_PCI=y
29CONFIG_HOTPLUG_PCI_ACPI=m 29CONFIG_HOTPLUG_PCI_ACPI=m
30CONFIG_PACKET=y 30CONFIG_PACKET=y
31CONFIG_UNIX=y 31CONFIG_UNIX=y
diff --git a/arch/ia64/configs/tiger_defconfig b/arch/ia64/configs/tiger_defconfig
index a5a9e02e60a0..0f4e9e41f130 100644
--- a/arch/ia64/configs/tiger_defconfig
+++ b/arch/ia64/configs/tiger_defconfig
@@ -31,7 +31,7 @@ CONFIG_ACPI_BUTTON=m
31CONFIG_ACPI_FAN=m 31CONFIG_ACPI_FAN=m
32CONFIG_ACPI_PROCESSOR=m 32CONFIG_ACPI_PROCESSOR=m
33CONFIG_ACPI_CONTAINER=m 33CONFIG_ACPI_CONTAINER=m
34CONFIG_HOTPLUG_PCI=m 34CONFIG_HOTPLUG_PCI=y
35CONFIG_HOTPLUG_PCI_ACPI=m 35CONFIG_HOTPLUG_PCI_ACPI=m
36CONFIG_PACKET=y 36CONFIG_PACKET=y
37CONFIG_UNIX=y 37CONFIG_UNIX=y
diff --git a/arch/ia64/configs/xen_domu_defconfig b/arch/ia64/configs/xen_domu_defconfig
index 37b9b422caad..b025acfde5c1 100644
--- a/arch/ia64/configs/xen_domu_defconfig
+++ b/arch/ia64/configs/xen_domu_defconfig
@@ -32,7 +32,7 @@ CONFIG_ACPI_BUTTON=m
32CONFIG_ACPI_FAN=m 32CONFIG_ACPI_FAN=m
33CONFIG_ACPI_PROCESSOR=m 33CONFIG_ACPI_PROCESSOR=m
34CONFIG_ACPI_CONTAINER=m 34CONFIG_ACPI_CONTAINER=m
35CONFIG_HOTPLUG_PCI=m 35CONFIG_HOTPLUG_PCI=y
36CONFIG_HOTPLUG_PCI_ACPI=m 36CONFIG_HOTPLUG_PCI_ACPI=m
37CONFIG_PACKET=y 37CONFIG_PACKET=y
38CONFIG_UNIX=y 38CONFIG_UNIX=y
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c3abed332301..e12764c2a9d0 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -114,6 +114,7 @@ config BCM47XX
114 select FW_CFE 114 select FW_CFE
115 select HW_HAS_PCI 115 select HW_HAS_PCI
116 select IRQ_CPU 116 select IRQ_CPU
117 select SYS_HAS_CPU_MIPS32_R1
117 select NO_EXCEPT_FILL 118 select NO_EXCEPT_FILL
118 select SYS_SUPPORTS_32BIT_KERNEL 119 select SYS_SUPPORTS_32BIT_KERNEL
119 select SYS_SUPPORTS_LITTLE_ENDIAN 120 select SYS_SUPPORTS_LITTLE_ENDIAN
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
index ba611927749b..2b8b118398c4 100644
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -2,7 +2,6 @@ if BCM47XX
2 2
3config BCM47XX_SSB 3config BCM47XX_SSB
4 bool "SSB Support for Broadcom BCM47XX" 4 bool "SSB Support for Broadcom BCM47XX"
5 select SYS_HAS_CPU_MIPS32_R1
6 select SSB 5 select SSB
7 select SSB_DRIVER_MIPS 6 select SSB_DRIVER_MIPS
8 select SSB_DRIVER_EXTIF 7 select SSB_DRIVER_EXTIF
diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h
index 5b2f2e68e57f..9488fa5f8866 100644
--- a/arch/mips/include/asm/mach-generic/spaces.h
+++ b/arch/mips/include/asm/mach-generic/spaces.h
@@ -25,8 +25,12 @@
25#else 25#else
26#define CAC_BASE _AC(0x80000000, UL) 26#define CAC_BASE _AC(0x80000000, UL)
27#endif 27#endif
28#ifndef IO_BASE
28#define IO_BASE _AC(0xa0000000, UL) 29#define IO_BASE _AC(0xa0000000, UL)
30#endif
31#ifndef UNCAC_BASE
29#define UNCAC_BASE _AC(0xa0000000, UL) 32#define UNCAC_BASE _AC(0xa0000000, UL)
33#endif
30 34
31#ifndef MAP_BASE 35#ifndef MAP_BASE
32#ifdef CONFIG_KVM_GUEST 36#ifdef CONFIG_KVM_GUEST
diff --git a/arch/mips/include/uapi/asm/siginfo.h b/arch/mips/include/uapi/asm/siginfo.h
index b7a23064841f..88e292b7719e 100644
--- a/arch/mips/include/uapi/asm/siginfo.h
+++ b/arch/mips/include/uapi/asm/siginfo.h
@@ -25,11 +25,12 @@ struct siginfo;
25/* 25/*
26 * Careful to keep union _sifields from shifting ... 26 * Careful to keep union _sifields from shifting ...
27 */ 27 */
28#if __SIZEOF_LONG__ == 4 28#if _MIPS_SZLONG == 32
29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int)) 29#define __ARCH_SI_PREAMBLE_SIZE (3 * sizeof(int))
30#endif 30#elif _MIPS_SZLONG == 64
31#if __SIZEOF_LONG__ == 8
32#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) 31#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int))
32#else
33#error _MIPS_SZLONG neither 32 nor 64
33#endif 34#endif
34 35
35#include <asm-generic/siginfo.h> 36#include <asm-generic/siginfo.h>
diff --git a/arch/mips/kernel/bmips_vec.S b/arch/mips/kernel/bmips_vec.S
index f739aedcb509..bd79c4f9bff4 100644
--- a/arch/mips/kernel/bmips_vec.S
+++ b/arch/mips/kernel/bmips_vec.S
@@ -54,7 +54,11 @@ LEAF(bmips_smp_movevec)
54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */ 54 /* set up CPU1 CBR; move BASE to 0xa000_0000 */
55 li k0, 0xff400000 55 li k0, 0xff400000
56 mtc0 k0, $22, 6 56 mtc0 k0, $22, 6
57 li k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_1 57 /* set up relocation vector address based on thread ID */
58 mfc0 k1, $22, 3
59 srl k1, 16
60 andi k1, 0x8000
61 or k1, CKSEG1 | BMIPS_RELO_VECTOR_CONTROL_0
58 or k0, k1 62 or k0, k1
59 li k1, 0xa0080000 63 li k1, 0xa0080000
60 sw k1, 0(k0) 64 sw k1, 0(k0)
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index c0bb4d59076a..159abc8842d2 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -79,15 +79,9 @@ static void __init bmips_smp_setup(void)
79 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread 79 * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread
80 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output 80 * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output
81 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output 81 * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output
82 *
83 * If booting from TP1, leave the existing CMT interrupt routing
84 * such that TP0 responds to SW1 and TP1 responds to SW0.
85 */ 82 */
86 if (boot_cpu == 0) 83 change_c0_brcm_cmt_intr(0xf8018000,
87 change_c0_brcm_cmt_intr(0xf8018000,
88 (0x02 << 27) | (0x03 << 15)); 84 (0x02 << 27) | (0x03 << 15));
89 else
90 change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27));
91 85
92 /* single core, 2 threads (2 pipelines) */ 86 /* single core, 2 threads (2 pipelines) */
93 max_cpus = 2; 87 max_cpus = 2;
@@ -202,9 +196,15 @@ static void bmips_init_secondary(void)
202#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) 196#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380)
203 void __iomem *cbr = BMIPS_GET_CBR(); 197 void __iomem *cbr = BMIPS_GET_CBR();
204 unsigned long old_vec; 198 unsigned long old_vec;
199 unsigned long relo_vector;
200 int boot_cpu;
201
202 boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31));
203 relo_vector = boot_cpu ? BMIPS_RELO_VECTOR_CONTROL_0 :
204 BMIPS_RELO_VECTOR_CONTROL_1;
205 205
206 old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1); 206 old_vec = __raw_readl(cbr + relo_vector);
207 __raw_writel(old_vec & ~0x20000000, cbr + BMIPS_RELO_VECTOR_CONTROL_1); 207 __raw_writel(old_vec & ~0x20000000, cbr + relo_vector);
208 208
209 clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0); 209 clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0);
210#elif defined(CONFIG_CPU_BMIPS5000) 210#elif defined(CONFIG_CPU_BMIPS5000)
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c
index 9f64c2387808..0238af1ba503 100644
--- a/arch/mips/powertv/asic/asic_devices.c
+++ b/arch/mips/powertv/asic/asic_devices.c
@@ -529,8 +529,7 @@ EXPORT_SYMBOL(asic_resource_get);
529 */ 529 */
530void platform_release_memory(void *ptr, int size) 530void platform_release_memory(void *ptr, int size)
531{ 531{
532 free_reserved_area((unsigned long)ptr, (unsigned long)(ptr + size), 532 free_reserved_area(ptr, ptr + size, -1, NULL);
533 -1, NULL);
534} 533}
535EXPORT_SYMBOL(platform_release_memory); 534EXPORT_SYMBOL(platform_release_memory);
536 535
diff --git a/arch/parisc/configs/c8000_defconfig b/arch/parisc/configs/c8000_defconfig
new file mode 100644
index 000000000000..f11006361297
--- /dev/null
+++ b/arch/parisc/configs/c8000_defconfig
@@ -0,0 +1,279 @@
1# CONFIG_LOCALVERSION_AUTO is not set
2CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y
4CONFIG_FHANDLE=y
5CONFIG_BSD_PROCESS_ACCT=y
6CONFIG_BSD_PROCESS_ACCT_V3=y
7CONFIG_IKCONFIG=y
8CONFIG_IKCONFIG_PROC=y
9CONFIG_RELAY=y
10CONFIG_BLK_DEV_INITRD=y
11CONFIG_RD_BZIP2=y
12CONFIG_RD_LZMA=y
13CONFIG_RD_LZO=y
14CONFIG_EXPERT=y
15CONFIG_SYSCTL_SYSCALL=y
16CONFIG_SLAB=y
17CONFIG_MODULES=y
18CONFIG_MODULE_UNLOAD=y
19CONFIG_MODULE_FORCE_UNLOAD=y
20CONFIG_MODVERSIONS=y
21CONFIG_BLK_DEV_INTEGRITY=y
22CONFIG_PA8X00=y
23CONFIG_MLONGCALLS=y
24CONFIG_64BIT=y
25CONFIG_SMP=y
26CONFIG_PREEMPT=y
27# CONFIG_CROSS_MEMORY_ATTACH is not set
28CONFIG_IOMMU_CCIO=y
29CONFIG_PCI=y
30CONFIG_PCI_LBA=y
31# CONFIG_SUPERIO is not set
32# CONFIG_CHASSIS_LCD_LED is not set
33# CONFIG_PDC_CHASSIS is not set
34# CONFIG_PDC_CHASSIS_WARN is not set
35# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
36CONFIG_BINFMT_MISC=m
37CONFIG_PACKET=y
38CONFIG_UNIX=y
39CONFIG_XFRM_USER=m
40CONFIG_XFRM_SUB_POLICY=y
41CONFIG_NET_KEY=m
42CONFIG_INET=y
43CONFIG_IP_MULTICAST=y
44CONFIG_IP_PNP=y
45CONFIG_IP_PNP_DHCP=y
46CONFIG_IP_PNP_BOOTP=y
47CONFIG_IP_PNP_RARP=y
48CONFIG_NET_IPIP=m
49CONFIG_IP_MROUTE=y
50CONFIG_IP_PIMSM_V1=y
51CONFIG_IP_PIMSM_V2=y
52CONFIG_SYN_COOKIES=y
53CONFIG_INET_AH=m
54CONFIG_INET_ESP=m
55CONFIG_INET_IPCOMP=m
56CONFIG_INET_XFRM_MODE_BEET=m
57CONFIG_INET_DIAG=m
58# CONFIG_IPV6 is not set
59CONFIG_IP_DCCP=m
60# CONFIG_IP_DCCP_CCID3 is not set
61CONFIG_TIPC=m
62CONFIG_LLC2=m
63CONFIG_DNS_RESOLVER=y
64CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
65# CONFIG_STANDALONE is not set
66CONFIG_PARPORT=y
67CONFIG_PARPORT_PC=y
68CONFIG_PARPORT_PC_FIFO=y
69CONFIG_BLK_DEV_UMEM=m
70CONFIG_BLK_DEV_LOOP=m
71CONFIG_BLK_DEV_CRYPTOLOOP=m
72CONFIG_BLK_DEV_SX8=m
73CONFIG_BLK_DEV_RAM=y
74CONFIG_BLK_DEV_RAM_SIZE=6144
75CONFIG_CDROM_PKTCDVD=m
76CONFIG_CDROM_PKTCDVD_WCACHE=y
77CONFIG_ATA_OVER_ETH=m
78CONFIG_IDE=y
79CONFIG_BLK_DEV_IDECD=y
80CONFIG_BLK_DEV_PLATFORM=y
81CONFIG_BLK_DEV_GENERIC=y
82CONFIG_BLK_DEV_SIIMAGE=y
83CONFIG_SCSI=y
84CONFIG_BLK_DEV_SD=y
85CONFIG_CHR_DEV_ST=m
86CONFIG_BLK_DEV_SR=m
87CONFIG_CHR_DEV_SG=y
88CONFIG_CHR_DEV_SCH=m
89CONFIG_SCSI_CONSTANTS=y
90CONFIG_SCSI_LOGGING=y
91CONFIG_SCSI_FC_ATTRS=y
92CONFIG_SCSI_SAS_LIBSAS=m
93CONFIG_ISCSI_TCP=m
94CONFIG_ISCSI_BOOT_SYSFS=m
95CONFIG_FUSION=y
96CONFIG_FUSION_SPI=y
97CONFIG_FUSION_SAS=y
98CONFIG_NETDEVICES=y
99CONFIG_DUMMY=m
100CONFIG_NETCONSOLE=m
101CONFIG_TUN=y
102CONFIG_E1000=y
103CONFIG_PPP=m
104CONFIG_PPP_BSDCOMP=m
105CONFIG_PPP_DEFLATE=m
106CONFIG_PPP_MPPE=m
107CONFIG_PPPOE=m
108CONFIG_PPP_ASYNC=m
109CONFIG_PPP_SYNC_TTY=m
110# CONFIG_WLAN is not set
111CONFIG_INPUT_FF_MEMLESS=m
112# CONFIG_KEYBOARD_ATKBD is not set
113# CONFIG_KEYBOARD_HIL_OLD is not set
114# CONFIG_KEYBOARD_HIL is not set
115CONFIG_MOUSE_PS2=m
116CONFIG_INPUT_MISC=y
117CONFIG_INPUT_CM109=m
118CONFIG_SERIO_SERPORT=m
119CONFIG_SERIO_PARKBD=m
120CONFIG_SERIO_GSCPS2=m
121# CONFIG_HP_SDC is not set
122CONFIG_SERIO_PCIPS2=m
123CONFIG_SERIO_LIBPS2=y
124CONFIG_SERIO_RAW=m
125CONFIG_SERIAL_8250=y
126# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
127CONFIG_SERIAL_8250_CONSOLE=y
128CONFIG_SERIAL_8250_NR_UARTS=8
129CONFIG_SERIAL_8250_RUNTIME_UARTS=8
130CONFIG_SERIAL_8250_EXTENDED=y
131# CONFIG_SERIAL_MUX is not set
132CONFIG_SERIAL_JSM=m
133CONFIG_PRINTER=y
134CONFIG_HW_RANDOM=y
135CONFIG_RAW_DRIVER=m
136CONFIG_PTP_1588_CLOCK=y
137CONFIG_SSB=m
138CONFIG_SSB_DRIVER_PCICORE=y
139CONFIG_AGP=y
140CONFIG_AGP_PARISC=y
141CONFIG_DRM=y
142CONFIG_DRM_RADEON=y
143CONFIG_FIRMWARE_EDID=y
144CONFIG_FB_FOREIGN_ENDIAN=y
145CONFIG_FB_MODE_HELPERS=y
146CONFIG_FB_TILEBLITTING=y
147# CONFIG_FB_STI is not set
148CONFIG_BACKLIGHT_LCD_SUPPORT=y
149# CONFIG_LCD_CLASS_DEVICE is not set
150# CONFIG_BACKLIGHT_GENERIC is not set
151CONFIG_FRAMEBUFFER_CONSOLE=y
152# CONFIG_STI_CONSOLE is not set
153CONFIG_LOGO=y
154# CONFIG_LOGO_LINUX_MONO is not set
155# CONFIG_LOGO_LINUX_VGA16 is not set
156# CONFIG_LOGO_LINUX_CLUT224 is not set
157CONFIG_SOUND=m
158CONFIG_SND=m
159CONFIG_SND_SEQUENCER=m
160CONFIG_SND_SEQ_DUMMY=m
161CONFIG_SND_MIXER_OSS=m
162CONFIG_SND_PCM_OSS=m
163CONFIG_SND_SEQUENCER_OSS=y
164CONFIG_SND_VERBOSE_PRINTK=y
165CONFIG_SND_AD1889=m
166# CONFIG_SND_USB is not set
167# CONFIG_SND_GSC is not set
168CONFIG_HID_A4TECH=m
169CONFIG_HID_APPLE=m
170CONFIG_HID_BELKIN=m
171CONFIG_HID_CHERRY=m
172CONFIG_HID_CHICONY=m
173CONFIG_HID_CYPRESS=m
174CONFIG_HID_DRAGONRISE=m
175CONFIG_HID_EZKEY=m
176CONFIG_HID_KYE=m
177CONFIG_HID_GYRATION=m
178CONFIG_HID_TWINHAN=m
179CONFIG_HID_KENSINGTON=m
180CONFIG_HID_LOGITECH=m
181CONFIG_HID_LOGITECH_DJ=m
182CONFIG_HID_MICROSOFT=m
183CONFIG_HID_MONTEREY=m
184CONFIG_HID_NTRIG=m
185CONFIG_HID_ORTEK=m
186CONFIG_HID_PANTHERLORD=m
187CONFIG_HID_PETALYNX=m
188CONFIG_HID_SAMSUNG=m
189CONFIG_HID_SUNPLUS=m
190CONFIG_HID_GREENASIA=m
191CONFIG_HID_SMARTJOYPLUS=m
192CONFIG_HID_TOPSEED=m
193CONFIG_HID_THRUSTMASTER=m
194CONFIG_HID_ZEROPLUS=m
195CONFIG_USB_HID=m
196CONFIG_USB=y
197CONFIG_USB_OHCI_HCD=y
198CONFIG_USB_STORAGE=y
199CONFIG_EXT2_FS=y
200CONFIG_EXT2_FS_XATTR=y
201CONFIG_EXT2_FS_POSIX_ACL=y
202CONFIG_EXT2_FS_SECURITY=y
203CONFIG_EXT3_FS=y
204# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
205CONFIG_EXT4_FS=m
206CONFIG_REISERFS_FS=m
207CONFIG_REISERFS_PROC_INFO=y
208CONFIG_XFS_FS=m
209CONFIG_XFS_POSIX_ACL=y
210CONFIG_QUOTA=y
211CONFIG_QFMT_V1=m
212CONFIG_QFMT_V2=m
213CONFIG_AUTOFS4_FS=m
214CONFIG_FUSE_FS=m
215CONFIG_ISO9660_FS=y
216CONFIG_JOLIET=y
217CONFIG_MSDOS_FS=m
218CONFIG_VFAT_FS=m
219CONFIG_PROC_KCORE=y
220CONFIG_TMPFS=y
221CONFIG_TMPFS_XATTR=y
222CONFIG_NFS_FS=m
223CONFIG_NLS_CODEPAGE_437=m
224CONFIG_NLS_CODEPAGE_737=m
225CONFIG_NLS_CODEPAGE_775=m
226CONFIG_NLS_CODEPAGE_850=m
227CONFIG_NLS_CODEPAGE_852=m
228CONFIG_NLS_CODEPAGE_855=m
229CONFIG_NLS_CODEPAGE_857=m
230CONFIG_NLS_CODEPAGE_860=m
231CONFIG_NLS_CODEPAGE_861=m
232CONFIG_NLS_CODEPAGE_862=m
233CONFIG_NLS_CODEPAGE_863=m
234CONFIG_NLS_CODEPAGE_864=m
235CONFIG_NLS_CODEPAGE_865=m
236CONFIG_NLS_CODEPAGE_866=m
237CONFIG_NLS_CODEPAGE_869=m
238CONFIG_NLS_CODEPAGE_936=m
239CONFIG_NLS_CODEPAGE_950=m
240CONFIG_NLS_CODEPAGE_932=m
241CONFIG_NLS_CODEPAGE_949=m
242CONFIG_NLS_CODEPAGE_874=m
243CONFIG_NLS_ISO8859_8=m
244CONFIG_NLS_CODEPAGE_1250=m
245CONFIG_NLS_CODEPAGE_1251=m
246CONFIG_NLS_ASCII=m
247CONFIG_NLS_ISO8859_1=m
248CONFIG_NLS_ISO8859_2=m
249CONFIG_NLS_ISO8859_3=m
250CONFIG_NLS_ISO8859_4=m
251CONFIG_NLS_ISO8859_5=m
252CONFIG_NLS_ISO8859_6=m
253CONFIG_NLS_ISO8859_7=m
254CONFIG_NLS_ISO8859_9=m
255CONFIG_NLS_ISO8859_13=m
256CONFIG_NLS_ISO8859_14=m
257CONFIG_NLS_ISO8859_15=m
258CONFIG_NLS_KOI8_R=m
259CONFIG_NLS_KOI8_U=m
260CONFIG_NLS_UTF8=m
261CONFIG_UNUSED_SYMBOLS=y
262CONFIG_DEBUG_FS=y
263CONFIG_MAGIC_SYSRQ=y
264CONFIG_DEBUG_SLAB=y
265CONFIG_DEBUG_SLAB_LEAK=y
266CONFIG_DEBUG_MEMORY_INIT=y
267CONFIG_DEBUG_STACKOVERFLOW=y
268CONFIG_LOCKUP_DETECTOR=y
269CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
270CONFIG_PANIC_ON_OOPS=y
271CONFIG_DEBUG_RT_MUTEXES=y
272CONFIG_RT_MUTEX_TESTER=y
273CONFIG_PROVE_RCU_DELAY=y
274CONFIG_DEBUG_BLOCK_EXT_DEVT=y
275CONFIG_LATENCYTOP=y
276CONFIG_DEBUG_STRICT_USER_COPY_CHECKS=y
277CONFIG_KEYS=y
278# CONFIG_CRYPTO_HW is not set
279CONFIG_FONTS=y
diff --git a/arch/parisc/include/asm/parisc-device.h b/arch/parisc/include/asm/parisc-device.h
index 9afdad6c2ffb..eaf4dc1c7294 100644
--- a/arch/parisc/include/asm/parisc-device.h
+++ b/arch/parisc/include/asm/parisc-device.h
@@ -23,6 +23,7 @@ struct parisc_device {
23 /* generic info returned from pdc_pat_cell_module() */ 23 /* generic info returned from pdc_pat_cell_module() */
24 unsigned long mod_info; /* PAT specific - Misc Module info */ 24 unsigned long mod_info; /* PAT specific - Misc Module info */
25 unsigned long pmod_loc; /* physical Module location */ 25 unsigned long pmod_loc; /* physical Module location */
26 unsigned long mod0;
26#endif 27#endif
27 u64 dma_mask; /* DMA mask for I/O */ 28 u64 dma_mask; /* DMA mask for I/O */
28 struct device dev; 29 struct device dev;
@@ -61,4 +62,6 @@ parisc_get_drvdata(struct parisc_device *d)
61 62
62extern struct bus_type parisc_bus_type; 63extern struct bus_type parisc_bus_type;
63 64
65int iosapic_serial_irq(struct parisc_device *dev);
66
64#endif /*_ASM_PARISC_PARISC_DEVICE_H_*/ 67#endif /*_ASM_PARISC_PARISC_DEVICE_H_*/
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 2e65aa54bd10..c035673209f7 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -71,18 +71,27 @@ flush_cache_all_local(void)
71} 71}
72EXPORT_SYMBOL(flush_cache_all_local); 72EXPORT_SYMBOL(flush_cache_all_local);
73 73
74/* Virtual address of pfn. */
75#define pfn_va(pfn) __va(PFN_PHYS(pfn))
76
74void 77void
75update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep) 78update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
76{ 79{
77 struct page *page = pte_page(*ptep); 80 unsigned long pfn = pte_pfn(*ptep);
81 struct page *page;
78 82
79 if (pfn_valid(page_to_pfn(page)) && page_mapping(page) && 83 /* We don't have pte special. As a result, we can be called with
80 test_bit(PG_dcache_dirty, &page->flags)) { 84 an invalid pfn and we don't need to flush the kernel dcache page.
85 This occurs with FireGL card in C8000. */
86 if (!pfn_valid(pfn))
87 return;
81 88
82 flush_kernel_dcache_page(page); 89 page = pfn_to_page(pfn);
90 if (page_mapping(page) && test_bit(PG_dcache_dirty, &page->flags)) {
91 flush_kernel_dcache_page_addr(pfn_va(pfn));
83 clear_bit(PG_dcache_dirty, &page->flags); 92 clear_bit(PG_dcache_dirty, &page->flags);
84 } else if (parisc_requires_coherency()) 93 } else if (parisc_requires_coherency())
85 flush_kernel_dcache_page(page); 94 flush_kernel_dcache_page_addr(pfn_va(pfn));
86} 95}
87 96
88void 97void
@@ -495,44 +504,42 @@ static inline pte_t *get_ptep(pgd_t *pgd, unsigned long addr)
495 504
496void flush_cache_mm(struct mm_struct *mm) 505void flush_cache_mm(struct mm_struct *mm)
497{ 506{
507 struct vm_area_struct *vma;
508 pgd_t *pgd;
509
498 /* Flushing the whole cache on each cpu takes forever on 510 /* Flushing the whole cache on each cpu takes forever on
499 rp3440, etc. So, avoid it if the mm isn't too big. */ 511 rp3440, etc. So, avoid it if the mm isn't too big. */
500 if (mm_total_size(mm) < parisc_cache_flush_threshold) { 512 if (mm_total_size(mm) >= parisc_cache_flush_threshold) {
501 struct vm_area_struct *vma; 513 flush_cache_all();
502 514 return;
503 if (mm->context == mfsp(3)) { 515 }
504 for (vma = mm->mmap; vma; vma = vma->vm_next) { 516
505 flush_user_dcache_range_asm(vma->vm_start, 517 if (mm->context == mfsp(3)) {
506 vma->vm_end); 518 for (vma = mm->mmap; vma; vma = vma->vm_next) {
507 if (vma->vm_flags & VM_EXEC) 519 flush_user_dcache_range_asm(vma->vm_start, vma->vm_end);
508 flush_user_icache_range_asm( 520 if ((vma->vm_flags & VM_EXEC) == 0)
509 vma->vm_start, vma->vm_end); 521 continue;
510 } 522 flush_user_icache_range_asm(vma->vm_start, vma->vm_end);
511 } else {
512 pgd_t *pgd = mm->pgd;
513
514 for (vma = mm->mmap; vma; vma = vma->vm_next) {
515 unsigned long addr;
516
517 for (addr = vma->vm_start; addr < vma->vm_end;
518 addr += PAGE_SIZE) {
519 pte_t *ptep = get_ptep(pgd, addr);
520 if (ptep != NULL) {
521 pte_t pte = *ptep;
522 __flush_cache_page(vma, addr,
523 page_to_phys(pte_page(pte)));
524 }
525 }
526 }
527 } 523 }
528 return; 524 return;
529 } 525 }
530 526
531#ifdef CONFIG_SMP 527 pgd = mm->pgd;
532 flush_cache_all(); 528 for (vma = mm->mmap; vma; vma = vma->vm_next) {
533#else 529 unsigned long addr;
534 flush_cache_all_local(); 530
535#endif 531 for (addr = vma->vm_start; addr < vma->vm_end;
532 addr += PAGE_SIZE) {
533 unsigned long pfn;
534 pte_t *ptep = get_ptep(pgd, addr);
535 if (!ptep)
536 continue;
537 pfn = pte_pfn(*ptep);
538 if (!pfn_valid(pfn))
539 continue;
540 __flush_cache_page(vma, addr, PFN_PHYS(pfn));
541 }
542 }
536} 543}
537 544
538void 545void
@@ -556,33 +563,32 @@ flush_user_icache_range(unsigned long start, unsigned long end)
556void flush_cache_range(struct vm_area_struct *vma, 563void flush_cache_range(struct vm_area_struct *vma,
557 unsigned long start, unsigned long end) 564 unsigned long start, unsigned long end)
558{ 565{
566 unsigned long addr;
567 pgd_t *pgd;
568
559 BUG_ON(!vma->vm_mm->context); 569 BUG_ON(!vma->vm_mm->context);
560 570
561 if ((end - start) < parisc_cache_flush_threshold) { 571 if ((end - start) >= parisc_cache_flush_threshold) {
562 if (vma->vm_mm->context == mfsp(3)) {
563 flush_user_dcache_range_asm(start, end);
564 if (vma->vm_flags & VM_EXEC)
565 flush_user_icache_range_asm(start, end);
566 } else {
567 unsigned long addr;
568 pgd_t *pgd = vma->vm_mm->pgd;
569
570 for (addr = start & PAGE_MASK; addr < end;
571 addr += PAGE_SIZE) {
572 pte_t *ptep = get_ptep(pgd, addr);
573 if (ptep != NULL) {
574 pte_t pte = *ptep;
575 flush_cache_page(vma,
576 addr, pte_pfn(pte));
577 }
578 }
579 }
580 } else {
581#ifdef CONFIG_SMP
582 flush_cache_all(); 572 flush_cache_all();
583#else 573 return;
584 flush_cache_all_local(); 574 }
585#endif 575
576 if (vma->vm_mm->context == mfsp(3)) {
577 flush_user_dcache_range_asm(start, end);
578 if (vma->vm_flags & VM_EXEC)
579 flush_user_icache_range_asm(start, end);
580 return;
581 }
582
583 pgd = vma->vm_mm->pgd;
584 for (addr = start & PAGE_MASK; addr < end; addr += PAGE_SIZE) {
585 unsigned long pfn;
586 pte_t *ptep = get_ptep(pgd, addr);
587 if (!ptep)
588 continue;
589 pfn = pte_pfn(*ptep);
590 if (pfn_valid(pfn))
591 __flush_cache_page(vma, addr, PFN_PHYS(pfn));
586 } 592 }
587} 593}
588 594
@@ -591,9 +597,10 @@ flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr, unsigned long
591{ 597{
592 BUG_ON(!vma->vm_mm->context); 598 BUG_ON(!vma->vm_mm->context);
593 599
594 flush_tlb_page(vma, vmaddr); 600 if (pfn_valid(pfn)) {
595 __flush_cache_page(vma, vmaddr, page_to_phys(pfn_to_page(pfn))); 601 flush_tlb_page(vma, vmaddr);
596 602 __flush_cache_page(vma, vmaddr, PFN_PHYS(pfn));
603 }
597} 604}
598 605
599#ifdef CONFIG_PARISC_TMPALIAS 606#ifdef CONFIG_PARISC_TMPALIAS
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c
index 3295ef4a185d..f0b6722fc706 100644
--- a/arch/parisc/kernel/inventory.c
+++ b/arch/parisc/kernel/inventory.c
@@ -211,6 +211,7 @@ pat_query_module(ulong pcell_loc, ulong mod_index)
211 /* REVISIT: who is the consumer of this? not sure yet... */ 211 /* REVISIT: who is the consumer of this? not sure yet... */
212 dev->mod_info = pa_pdc_cell->mod_info; /* pass to PAT_GET_ENTITY() */ 212 dev->mod_info = pa_pdc_cell->mod_info; /* pass to PAT_GET_ENTITY() */
213 dev->pmod_loc = pa_pdc_cell->mod_location; 213 dev->pmod_loc = pa_pdc_cell->mod_location;
214 dev->mod0 = pa_pdc_cell->mod[0];
214 215
215 register_parisc_device(dev); /* advertise device */ 216 register_parisc_device(dev); /* advertise device */
216 217
diff --git a/arch/parisc/kernel/signal.c b/arch/parisc/kernel/signal.c
index 940188d1942c..07349b002687 100644
--- a/arch/parisc/kernel/signal.c
+++ b/arch/parisc/kernel/signal.c
@@ -56,13 +56,6 @@
56#define A(__x) ((unsigned long)(__x)) 56#define A(__x) ((unsigned long)(__x))
57 57
58/* 58/*
59 * Atomically swap in the new signal mask, and wait for a signal.
60 */
61#ifdef CONFIG_64BIT
62#include "sys32.h"
63#endif
64
65/*
66 * Do a signal return - restore sigcontext. 59 * Do a signal return - restore sigcontext.
67 */ 60 */
68 61
diff --git a/arch/parisc/kernel/signal32.c b/arch/parisc/kernel/signal32.c
index 33eca1b04926..6c6a271a6140 100644
--- a/arch/parisc/kernel/signal32.c
+++ b/arch/parisc/kernel/signal32.c
@@ -34,7 +34,6 @@
34#include <asm/uaccess.h> 34#include <asm/uaccess.h>
35 35
36#include "signal32.h" 36#include "signal32.h"
37#include "sys32.h"
38 37
39#define DEBUG_COMPAT_SIG 0 38#define DEBUG_COMPAT_SIG 0
40#define DEBUG_COMPAT_SIG_LEVEL 2 39#define DEBUG_COMPAT_SIG_LEVEL 2
diff --git a/arch/parisc/kernel/sys32.h b/arch/parisc/kernel/sys32.h
deleted file mode 100644
index 60dd470f39f8..000000000000
--- a/arch/parisc/kernel/sys32.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * Copyright (C) 2002 Richard Hirst <rhirst at parisc-linux.org>
3 * Copyright (C) 2003 James Bottomley <jejb at parisc-linux.org>
4 * Copyright (C) 2003 Randolph Chung <tausq with parisc-linux.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef _PARISC64_KERNEL_SYS32_H
21#define _PARISC64_KERNEL_SYS32_H
22
23#include <linux/compat.h>
24
25/* Call a kernel syscall which will use kernel space instead of user
26 * space for its copy_to/from_user.
27 */
28#define KERNEL_SYSCALL(ret, syscall, args...) \
29{ \
30 mm_segment_t old_fs = get_fs(); \
31 set_fs(KERNEL_DS); \
32 ret = syscall(args); \
33 set_fs (old_fs); \
34}
35
36#endif
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c
index a134ff4da12e..bb9f3b64de55 100644
--- a/arch/parisc/kernel/sys_parisc32.c
+++ b/arch/parisc/kernel/sys_parisc32.c
@@ -42,8 +42,6 @@
42#include <asm/uaccess.h> 42#include <asm/uaccess.h>
43#include <asm/mmu_context.h> 43#include <asm/mmu_context.h>
44 44
45#include "sys32.h"
46
47#undef DEBUG 45#undef DEBUG
48 46
49#ifdef DEBUG 47#ifdef DEBUG
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index c86fcb92358e..0e8cfd09da2f 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -58,7 +58,7 @@ CONFIG_SCHED_SMT=y
58CONFIG_PPC_DENORMALISATION=y 58CONFIG_PPC_DENORMALISATION=y
59CONFIG_PCCARD=y 59CONFIG_PCCARD=y
60CONFIG_ELECTRA_CF=y 60CONFIG_ELECTRA_CF=y
61CONFIG_HOTPLUG_PCI=m 61CONFIG_HOTPLUG_PCI=y
62CONFIG_HOTPLUG_PCI_RPA=m 62CONFIG_HOTPLUG_PCI_RPA=m
63CONFIG_HOTPLUG_PCI_RPA_DLPAR=m 63CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
64CONFIG_PACKET=y 64CONFIG_PACKET=y
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig
index 4b20f76172e2..0085dc4642c5 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -32,7 +32,7 @@ CONFIG_IRQ_ALL_CPUS=y
32CONFIG_SPARSEMEM_MANUAL=y 32CONFIG_SPARSEMEM_MANUAL=y
33CONFIG_PCI_MSI=y 33CONFIG_PCI_MSI=y
34CONFIG_PCCARD=y 34CONFIG_PCCARD=y
35CONFIG_HOTPLUG_PCI=m 35CONFIG_HOTPLUG_PCI=y
36CONFIG_PACKET=y 36CONFIG_PACKET=y
37CONFIG_UNIX=y 37CONFIG_UNIX=y
38CONFIG_XFRM_USER=m 38CONFIG_XFRM_USER=m
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index bea8587c3af5..1d4b9763895d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -53,7 +53,7 @@ CONFIG_PPC_64K_PAGES=y
53CONFIG_PPC_SUBPAGE_PROT=y 53CONFIG_PPC_SUBPAGE_PROT=y
54CONFIG_SCHED_SMT=y 54CONFIG_SCHED_SMT=y
55CONFIG_PPC_DENORMALISATION=y 55CONFIG_PPC_DENORMALISATION=y
56CONFIG_HOTPLUG_PCI=m 56CONFIG_HOTPLUG_PCI=y
57CONFIG_HOTPLUG_PCI_RPA=m 57CONFIG_HOTPLUG_PCI_RPA=m
58CONFIG_HOTPLUG_PCI_RPA_DLPAR=m 58CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
59CONFIG_PACKET=y 59CONFIG_PACKET=y
diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 09a8743143f3..d3e5e9bc8f94 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -55,6 +55,8 @@ struct device_node;
55#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */ 55#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
56#define EEH_PE_PHB_DEAD (1 << 2) /* Dead PHB */ 56#define EEH_PE_PHB_DEAD (1 << 2) /* Dead PHB */
57 57
58#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
59
58struct eeh_pe { 60struct eeh_pe {
59 int type; /* PE type: PHB/Bus/Device */ 61 int type; /* PE type: PHB/Bus/Device */
60 int state; /* PE EEH dependent mode */ 62 int state; /* PE EEH dependent mode */
@@ -72,8 +74,8 @@ struct eeh_pe {
72 struct list_head child; /* Child PEs */ 74 struct list_head child; /* Child PEs */
73}; 75};
74 76
75#define eeh_pe_for_each_dev(pe, edev) \ 77#define eeh_pe_for_each_dev(pe, edev, tmp) \
76 list_for_each_entry(edev, &pe->edevs, list) 78 list_for_each_entry_safe(edev, tmp, &pe->edevs, list)
77 79
78/* 80/*
79 * The struct is used to trace EEH state for the associated 81 * The struct is used to trace EEH state for the associated
@@ -82,7 +84,13 @@ struct eeh_pe {
82 * another tree except the currently existing tree of PCI 84 * another tree except the currently existing tree of PCI
83 * buses and PCI devices 85 * buses and PCI devices
84 */ 86 */
85#define EEH_DEV_IRQ_DISABLED (1<<0) /* Interrupt disabled */ 87#define EEH_DEV_BRIDGE (1 << 0) /* PCI bridge */
88#define EEH_DEV_ROOT_PORT (1 << 1) /* PCIe root port */
89#define EEH_DEV_DS_PORT (1 << 2) /* Downstream port */
90#define EEH_DEV_IRQ_DISABLED (1 << 3) /* Interrupt disabled */
91#define EEH_DEV_DISCONNECTED (1 << 4) /* Removing from PE */
92
93#define EEH_DEV_SYSFS (1 << 8) /* Sysfs created */
86 94
87struct eeh_dev { 95struct eeh_dev {
88 int mode; /* EEH mode */ 96 int mode; /* EEH mode */
@@ -90,11 +98,13 @@ struct eeh_dev {
90 int config_addr; /* Config address */ 98 int config_addr; /* Config address */
91 int pe_config_addr; /* PE config address */ 99 int pe_config_addr; /* PE config address */
92 u32 config_space[16]; /* Saved PCI config space */ 100 u32 config_space[16]; /* Saved PCI config space */
101 u8 pcie_cap; /* Saved PCIe capability */
93 struct eeh_pe *pe; /* Associated PE */ 102 struct eeh_pe *pe; /* Associated PE */
94 struct list_head list; /* Form link list in the PE */ 103 struct list_head list; /* Form link list in the PE */
95 struct pci_controller *phb; /* Associated PHB */ 104 struct pci_controller *phb; /* Associated PHB */
96 struct device_node *dn; /* Associated device node */ 105 struct device_node *dn; /* Associated device node */
97 struct pci_dev *pdev; /* Associated PCI device */ 106 struct pci_dev *pdev; /* Associated PCI device */
107 struct pci_bus *bus; /* PCI bus for partial hotplug */
98}; 108};
99 109
100static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev) 110static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
@@ -193,8 +203,10 @@ int eeh_phb_pe_create(struct pci_controller *phb);
193struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb); 203struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
194struct eeh_pe *eeh_pe_get(struct eeh_dev *edev); 204struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
195int eeh_add_to_parent_pe(struct eeh_dev *edev); 205int eeh_add_to_parent_pe(struct eeh_dev *edev);
196int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe); 206int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
197void eeh_pe_update_time_stamp(struct eeh_pe *pe); 207void eeh_pe_update_time_stamp(struct eeh_pe *pe);
208void *eeh_pe_traverse(struct eeh_pe *root,
209 eeh_traverse_func fn, void *flag);
198void *eeh_pe_dev_traverse(struct eeh_pe *root, 210void *eeh_pe_dev_traverse(struct eeh_pe *root,
199 eeh_traverse_func fn, void *flag); 211 eeh_traverse_func fn, void *flag);
200void eeh_pe_restore_bars(struct eeh_pe *pe); 212void eeh_pe_restore_bars(struct eeh_pe *pe);
@@ -209,10 +221,12 @@ unsigned long eeh_check_failure(const volatile void __iomem *token,
209 unsigned long val); 221 unsigned long val);
210int eeh_dev_check_failure(struct eeh_dev *edev); 222int eeh_dev_check_failure(struct eeh_dev *edev);
211void eeh_addr_cache_build(void); 223void eeh_addr_cache_build(void);
224void eeh_add_device_early(struct device_node *);
212void eeh_add_device_tree_early(struct device_node *); 225void eeh_add_device_tree_early(struct device_node *);
226void eeh_add_device_late(struct pci_dev *);
213void eeh_add_device_tree_late(struct pci_bus *); 227void eeh_add_device_tree_late(struct pci_bus *);
214void eeh_add_sysfs_files(struct pci_bus *); 228void eeh_add_sysfs_files(struct pci_bus *);
215void eeh_remove_bus_device(struct pci_dev *, int); 229void eeh_remove_device(struct pci_dev *);
216 230
217/** 231/**
218 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure. 232 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
@@ -252,13 +266,17 @@ static inline unsigned long eeh_check_failure(const volatile void __iomem *token
252 266
253static inline void eeh_addr_cache_build(void) { } 267static inline void eeh_addr_cache_build(void) { }
254 268
269static inline void eeh_add_device_early(struct device_node *dn) { }
270
255static inline void eeh_add_device_tree_early(struct device_node *dn) { } 271static inline void eeh_add_device_tree_early(struct device_node *dn) { }
256 272
273static inline void eeh_add_device_late(struct pci_dev *dev) { }
274
257static inline void eeh_add_device_tree_late(struct pci_bus *bus) { } 275static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
258 276
259static inline void eeh_add_sysfs_files(struct pci_bus *bus) { } 277static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
260 278
261static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { } 279static inline void eeh_remove_device(struct pci_dev *dev) { }
262 280
263#define EEH_POSSIBLE_ERROR(val, type) (0) 281#define EEH_POSSIBLE_ERROR(val, type) (0)
264#define EEH_IO_ERROR_VALUE(size) (-1UL) 282#define EEH_IO_ERROR_VALUE(size) (-1UL)
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index ba713f166fa5..10be1dd01c6b 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -96,10 +96,11 @@ static inline bool arch_irqs_disabled(void)
96#endif 96#endif
97 97
98#define hard_irq_disable() do { \ 98#define hard_irq_disable() do { \
99 u8 _was_enabled = get_paca()->soft_enabled; \ 99 u8 _was_enabled; \
100 __hard_irq_disable(); \ 100 __hard_irq_disable(); \
101 get_paca()->soft_enabled = 0; \ 101 _was_enabled = local_paca->soft_enabled; \
102 get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \ 102 local_paca->soft_enabled = 0; \
103 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
103 if (_was_enabled) \ 104 if (_was_enabled) \
104 trace_hardirqs_off(); \ 105 trace_hardirqs_off(); \
105} while(0) 106} while(0)
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h
index c1df590ec444..49fa55bfbac4 100644
--- a/arch/powerpc/include/asm/module.h
+++ b/arch/powerpc/include/asm/module.h
@@ -82,10 +82,9 @@ struct exception_table_entry;
82void sort_ex_table(struct exception_table_entry *start, 82void sort_ex_table(struct exception_table_entry *start,
83 struct exception_table_entry *finish); 83 struct exception_table_entry *finish);
84 84
85#ifdef CONFIG_MODVERSIONS 85#if defined(CONFIG_MODVERSIONS) && defined(CONFIG_PPC64)
86#define ARCH_RELOCATES_KCRCTAB 86#define ARCH_RELOCATES_KCRCTAB
87 87#define reloc_start PHYSICAL_START
88extern const unsigned long reloc_start[];
89#endif 88#endif
90#endif /* __KERNEL__ */ 89#endif /* __KERNEL__ */
91#endif /* _ASM_POWERPC_MODULE_H */ 90#endif /* _ASM_POWERPC_MODULE_H */
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 2c1d8cb9b265..32d0d2018faf 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -209,7 +209,6 @@ static inline struct eeh_dev *of_node_to_eeh_dev(struct device_node *dn)
209extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn); 209extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn);
210 210
211/** Remove all of the PCI devices under this bus */ 211/** Remove all of the PCI devices under this bus */
212extern void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe);
213extern void pcibios_remove_pci_devices(struct pci_bus *bus); 212extern void pcibios_remove_pci_devices(struct pci_bus *bus);
214 213
215/** Discover new pci devices under this bus, and add them */ 214/** Discover new pci devices under this bus, and add them */
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h
index 2dd7bfc459be..8b2492644754 100644
--- a/arch/powerpc/include/asm/perf_event_server.h
+++ b/arch/powerpc/include/asm/perf_event_server.h
@@ -12,6 +12,7 @@
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/hw_irq.h> 13#include <asm/hw_irq.h>
14#include <linux/device.h> 14#include <linux/device.h>
15#include <uapi/asm/perf_event.h>
15 16
16#define MAX_HWEVENTS 8 17#define MAX_HWEVENTS 8
17#define MAX_EVENT_ALTERNATIVES 8 18#define MAX_EVENT_ALTERNATIVES 8
@@ -69,11 +70,6 @@ struct power_pmu {
69#define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */ 70#define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */
70#define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */ 71#define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */
71 72
72/*
73 * We use the event config bit 63 as a flag to request EBB.
74 */
75#define EVENT_CONFIG_EBB_SHIFT 63
76
77extern int register_power_pmu(struct power_pmu *); 73extern int register_power_pmu(struct power_pmu *);
78 74
79struct pt_regs; 75struct pt_regs;
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 5d7d9c2a5473..a6840e4e24f7 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1088,7 +1088,8 @@
1088#define PVR_970MP 0x0044 1088#define PVR_970MP 0x0044
1089#define PVR_970GX 0x0045 1089#define PVR_970GX 0x0045
1090#define PVR_POWER7p 0x004A 1090#define PVR_POWER7p 0x004A
1091#define PVR_POWER8 0x004B 1091#define PVR_POWER8E 0x004B
1092#define PVR_POWER8 0x004D
1092#define PVR_BE 0x0070 1093#define PVR_BE 0x0070
1093#define PVR_PA6T 0x0090 1094#define PVR_PA6T 0x0090
1094 1095
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index ffbaabebcdca..48cfc858abd6 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -145,6 +145,10 @@ extern void __cpu_die(unsigned int cpu);
145#define smp_setup_cpu_maps() 145#define smp_setup_cpu_maps()
146static inline void inhibit_secondary_onlining(void) {} 146static inline void inhibit_secondary_onlining(void) {}
147static inline void uninhibit_secondary_onlining(void) {} 147static inline void uninhibit_secondary_onlining(void) {}
148static inline const struct cpumask *cpu_sibling_mask(int cpu)
149{
150 return cpumask_of(cpu);
151}
148 152
149#endif /* CONFIG_SMP */ 153#endif /* CONFIG_SMP */
150 154
diff --git a/arch/powerpc/include/uapi/asm/Kbuild b/arch/powerpc/include/uapi/asm/Kbuild
index 5182c8622b54..48be855ef37b 100644
--- a/arch/powerpc/include/uapi/asm/Kbuild
+++ b/arch/powerpc/include/uapi/asm/Kbuild
@@ -20,6 +20,7 @@ header-y += mman.h
20header-y += msgbuf.h 20header-y += msgbuf.h
21header-y += nvram.h 21header-y += nvram.h
22header-y += param.h 22header-y += param.h
23header-y += perf_event.h
23header-y += poll.h 24header-y += poll.h
24header-y += posix_types.h 25header-y += posix_types.h
25header-y += ps3fb.h 26header-y += ps3fb.h
diff --git a/arch/powerpc/include/uapi/asm/perf_event.h b/arch/powerpc/include/uapi/asm/perf_event.h
new file mode 100644
index 000000000000..80a4d40cf5bc
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/perf_event.h
@@ -0,0 +1,18 @@
1/*
2 * Copyright 2013 Michael Ellerman, IBM Corp.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; version 2 of the
7 * License.
8 */
9
10#ifndef _UAPI_ASM_POWERPC_PERF_EVENT_H
11#define _UAPI_ASM_POWERPC_PERF_EVENT_H
12
13/*
14 * We use bit 63 of perf_event_attr.config as a flag to request EBB.
15 */
16#define PERF_EVENT_CONFIG_EBB_SHIFT 63
17
18#endif /* _UAPI_ASM_POWERPC_PERF_EVENT_H */
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 2a45d0f04385..22973a74df73 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -494,9 +494,27 @@ static struct cpu_spec __initdata cpu_specs[] = {
494 .cpu_restore = __restore_cpu_power7, 494 .cpu_restore = __restore_cpu_power7,
495 .platform = "power7+", 495 .platform = "power7+",
496 }, 496 },
497 { /* Power8 */ 497 { /* Power8E */
498 .pvr_mask = 0xffff0000, 498 .pvr_mask = 0xffff0000,
499 .pvr_value = 0x004b0000, 499 .pvr_value = 0x004b0000,
500 .cpu_name = "POWER8E (raw)",
501 .cpu_features = CPU_FTRS_POWER8,
502 .cpu_user_features = COMMON_USER_POWER8,
503 .cpu_user_features2 = COMMON_USER2_POWER8,
504 .mmu_features = MMU_FTRS_POWER8,
505 .icache_bsize = 128,
506 .dcache_bsize = 128,
507 .num_pmcs = 6,
508 .pmc_type = PPC_PMC_IBM,
509 .oprofile_cpu_type = "ppc64/power8",
510 .oprofile_type = PPC_OPROFILE_INVALID,
511 .cpu_setup = __setup_cpu_power8,
512 .cpu_restore = __restore_cpu_power8,
513 .platform = "power8",
514 },
515 { /* Power8 */
516 .pvr_mask = 0xffff0000,
517 .pvr_value = 0x004d0000,
500 .cpu_name = "POWER8 (raw)", 518 .cpu_name = "POWER8 (raw)",
501 .cpu_features = CPU_FTRS_POWER8, 519 .cpu_features = CPU_FTRS_POWER8,
502 .cpu_user_features = COMMON_USER_POWER8, 520 .cpu_user_features = COMMON_USER_POWER8,
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 39954fe941b8..ea9414c8088d 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -231,7 +231,7 @@ static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
231void eeh_slot_error_detail(struct eeh_pe *pe, int severity) 231void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
232{ 232{
233 size_t loglen = 0; 233 size_t loglen = 0;
234 struct eeh_dev *edev; 234 struct eeh_dev *edev, *tmp;
235 bool valid_cfg_log = true; 235 bool valid_cfg_log = true;
236 236
237 /* 237 /*
@@ -251,7 +251,7 @@ void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
251 eeh_pe_restore_bars(pe); 251 eeh_pe_restore_bars(pe);
252 252
253 pci_regs_buf[0] = 0; 253 pci_regs_buf[0] = 0;
254 eeh_pe_for_each_dev(pe, edev) { 254 eeh_pe_for_each_dev(pe, edev, tmp) {
255 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen, 255 loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
256 EEH_PCI_REGS_LOG_LEN - loglen); 256 EEH_PCI_REGS_LOG_LEN - loglen);
257 } 257 }
@@ -499,8 +499,6 @@ unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned lon
499 } 499 }
500 500
501 eeh_dev_check_failure(edev); 501 eeh_dev_check_failure(edev);
502
503 pci_dev_put(eeh_dev_to_pci_dev(edev));
504 return val; 502 return val;
505} 503}
506 504
@@ -838,7 +836,7 @@ core_initcall_sync(eeh_init);
838 * on the CEC architecture, type of the device, on earlier boot 836 * on the CEC architecture, type of the device, on earlier boot
839 * command-line arguments & etc. 837 * command-line arguments & etc.
840 */ 838 */
841static void eeh_add_device_early(struct device_node *dn) 839void eeh_add_device_early(struct device_node *dn)
842{ 840{
843 struct pci_controller *phb; 841 struct pci_controller *phb;
844 842
@@ -886,7 +884,7 @@ EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
886 * This routine must be used to complete EEH initialization for PCI 884 * This routine must be used to complete EEH initialization for PCI
887 * devices that were added after system boot (e.g. hotplug, dlpar). 885 * devices that were added after system boot (e.g. hotplug, dlpar).
888 */ 886 */
889static void eeh_add_device_late(struct pci_dev *dev) 887void eeh_add_device_late(struct pci_dev *dev)
890{ 888{
891 struct device_node *dn; 889 struct device_node *dn;
892 struct eeh_dev *edev; 890 struct eeh_dev *edev;
@@ -902,9 +900,23 @@ static void eeh_add_device_late(struct pci_dev *dev)
902 pr_debug("EEH: Already referenced !\n"); 900 pr_debug("EEH: Already referenced !\n");
903 return; 901 return;
904 } 902 }
905 WARN_ON(edev->pdev);
906 903
907 pci_dev_get(dev); 904 /*
905 * The EEH cache might not be removed correctly because of
906 * unbalanced kref to the device during unplug time, which
907 * relies on pcibios_release_device(). So we have to remove
908 * that here explicitly.
909 */
910 if (edev->pdev) {
911 eeh_rmv_from_parent_pe(edev);
912 eeh_addr_cache_rmv_dev(edev->pdev);
913 eeh_sysfs_remove_device(edev->pdev);
914 edev->mode &= ~EEH_DEV_SYSFS;
915
916 edev->pdev = NULL;
917 dev->dev.archdata.edev = NULL;
918 }
919
908 edev->pdev = dev; 920 edev->pdev = dev;
909 dev->dev.archdata.edev = edev; 921 dev->dev.archdata.edev = edev;
910 922
@@ -967,7 +979,6 @@ EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
967/** 979/**
968 * eeh_remove_device - Undo EEH setup for the indicated pci device 980 * eeh_remove_device - Undo EEH setup for the indicated pci device
969 * @dev: pci device to be removed 981 * @dev: pci device to be removed
970 * @purge_pe: remove the PE or not
971 * 982 *
972 * This routine should be called when a device is removed from 983 * This routine should be called when a device is removed from
973 * a running system (e.g. by hotplug or dlpar). It unregisters 984 * a running system (e.g. by hotplug or dlpar). It unregisters
@@ -975,7 +986,7 @@ EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
975 * this device will no longer be detected after this call; thus, 986 * this device will no longer be detected after this call; thus,
976 * i/o errors affecting this slot may leave this device unusable. 987 * i/o errors affecting this slot may leave this device unusable.
977 */ 988 */
978static void eeh_remove_device(struct pci_dev *dev, int purge_pe) 989void eeh_remove_device(struct pci_dev *dev)
979{ 990{
980 struct eeh_dev *edev; 991 struct eeh_dev *edev;
981 992
@@ -986,42 +997,29 @@ static void eeh_remove_device(struct pci_dev *dev, int purge_pe)
986 /* Unregister the device with the EEH/PCI address search system */ 997 /* Unregister the device with the EEH/PCI address search system */
987 pr_debug("EEH: Removing device %s\n", pci_name(dev)); 998 pr_debug("EEH: Removing device %s\n", pci_name(dev));
988 999
989 if (!edev || !edev->pdev) { 1000 if (!edev || !edev->pdev || !edev->pe) {
990 pr_debug("EEH: Not referenced !\n"); 1001 pr_debug("EEH: Not referenced !\n");
991 return; 1002 return;
992 } 1003 }
1004
1005 /*
1006 * During the hotplug for EEH error recovery, we need the EEH
1007 * device attached to the parent PE in order for BAR restore
1008 * a bit later. So we keep it for BAR restore and remove it
1009 * from the parent PE during the BAR resotre.
1010 */
993 edev->pdev = NULL; 1011 edev->pdev = NULL;
994 dev->dev.archdata.edev = NULL; 1012 dev->dev.archdata.edev = NULL;
995 pci_dev_put(dev); 1013 if (!(edev->pe->state & EEH_PE_KEEP))
1014 eeh_rmv_from_parent_pe(edev);
1015 else
1016 edev->mode |= EEH_DEV_DISCONNECTED;
996 1017
997 eeh_rmv_from_parent_pe(edev, purge_pe);
998 eeh_addr_cache_rmv_dev(dev); 1018 eeh_addr_cache_rmv_dev(dev);
999 eeh_sysfs_remove_device(dev); 1019 eeh_sysfs_remove_device(dev);
1020 edev->mode &= ~EEH_DEV_SYSFS;
1000} 1021}
1001 1022
1002/**
1003 * eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
1004 * @dev: PCI device
1005 * @purge_pe: remove the corresponding PE or not
1006 *
1007 * This routine must be called when a device is removed from the
1008 * running system through hotplug or dlpar. The corresponding
1009 * PCI address cache will be removed.
1010 */
1011void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe)
1012{
1013 struct pci_bus *bus = dev->subordinate;
1014 struct pci_dev *child, *tmp;
1015
1016 eeh_remove_device(dev, purge_pe);
1017
1018 if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1019 list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
1020 eeh_remove_bus_device(child, purge_pe);
1021 }
1022}
1023EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
1024
1025static int proc_eeh_show(struct seq_file *m, void *v) 1023static int proc_eeh_show(struct seq_file *m, void *v)
1026{ 1024{
1027 if (0 == eeh_subsystem_enabled) { 1025 if (0 == eeh_subsystem_enabled) {
diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c
index f9ac1232a746..e8c9fd546a5c 100644
--- a/arch/powerpc/kernel/eeh_cache.c
+++ b/arch/powerpc/kernel/eeh_cache.c
@@ -68,16 +68,12 @@ static inline struct eeh_dev *__eeh_addr_cache_get_device(unsigned long addr)
68 struct pci_io_addr_range *piar; 68 struct pci_io_addr_range *piar;
69 piar = rb_entry(n, struct pci_io_addr_range, rb_node); 69 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
70 70
71 if (addr < piar->addr_lo) { 71 if (addr < piar->addr_lo)
72 n = n->rb_left; 72 n = n->rb_left;
73 } else { 73 else if (addr > piar->addr_hi)
74 if (addr > piar->addr_hi) { 74 n = n->rb_right;
75 n = n->rb_right; 75 else
76 } else { 76 return piar->edev;
77 pci_dev_get(piar->pcidev);
78 return piar->edev;
79 }
80 }
81 } 77 }
82 78
83 return NULL; 79 return NULL;
@@ -156,7 +152,6 @@ eeh_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
156 if (!piar) 152 if (!piar)
157 return NULL; 153 return NULL;
158 154
159 pci_dev_get(dev);
160 piar->addr_lo = alo; 155 piar->addr_lo = alo;
161 piar->addr_hi = ahi; 156 piar->addr_hi = ahi;
162 piar->edev = pci_dev_to_eeh_dev(dev); 157 piar->edev = pci_dev_to_eeh_dev(dev);
@@ -250,7 +245,6 @@ restart:
250 245
251 if (piar->pcidev == dev) { 246 if (piar->pcidev == dev) {
252 rb_erase(n, &pci_io_addr_cache_root.rb_root); 247 rb_erase(n, &pci_io_addr_cache_root.rb_root);
253 pci_dev_put(piar->pcidev);
254 kfree(piar); 248 kfree(piar);
255 goto restart; 249 goto restart;
256 } 250 }
@@ -302,12 +296,10 @@ void eeh_addr_cache_build(void)
302 if (!edev) 296 if (!edev)
303 continue; 297 continue;
304 298
305 pci_dev_get(dev); /* matching put is in eeh_remove_device() */
306 dev->dev.archdata.edev = edev; 299 dev->dev.archdata.edev = edev;
307 edev->pdev = dev; 300 edev->pdev = dev;
308 301
309 eeh_addr_cache_insert_dev(dev); 302 eeh_addr_cache_insert_dev(dev);
310
311 eeh_sysfs_add_device(dev); 303 eeh_sysfs_add_device(dev);
312 } 304 }
313 305
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 2b1ce17cae50..36bed5a12750 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -143,10 +143,14 @@ static void eeh_disable_irq(struct pci_dev *dev)
143static void eeh_enable_irq(struct pci_dev *dev) 143static void eeh_enable_irq(struct pci_dev *dev)
144{ 144{
145 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev); 145 struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
146 struct irq_desc *desc;
146 147
147 if ((edev->mode) & EEH_DEV_IRQ_DISABLED) { 148 if ((edev->mode) & EEH_DEV_IRQ_DISABLED) {
148 edev->mode &= ~EEH_DEV_IRQ_DISABLED; 149 edev->mode &= ~EEH_DEV_IRQ_DISABLED;
149 enable_irq(dev->irq); 150
151 desc = irq_to_desc(dev->irq);
152 if (desc && desc->depth > 0)
153 enable_irq(dev->irq);
150 } 154 }
151} 155}
152 156
@@ -338,6 +342,54 @@ static void *eeh_report_failure(void *data, void *userdata)
338 return NULL; 342 return NULL;
339} 343}
340 344
345static void *eeh_rmv_device(void *data, void *userdata)
346{
347 struct pci_driver *driver;
348 struct eeh_dev *edev = (struct eeh_dev *)data;
349 struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
350 int *removed = (int *)userdata;
351
352 /*
353 * Actually, we should remove the PCI bridges as well.
354 * However, that's lots of complexity to do that,
355 * particularly some of devices under the bridge might
356 * support EEH. So we just care about PCI devices for
357 * simplicity here.
358 */
359 if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
360 return NULL;
361 driver = eeh_pcid_get(dev);
362 if (driver && driver->err_handler)
363 return NULL;
364
365 /* Remove it from PCI subsystem */
366 pr_debug("EEH: Removing %s without EEH sensitive driver\n",
367 pci_name(dev));
368 edev->bus = dev->bus;
369 edev->mode |= EEH_DEV_DISCONNECTED;
370 (*removed)++;
371
372 pci_stop_and_remove_bus_device(dev);
373
374 return NULL;
375}
376
377static void *eeh_pe_detach_dev(void *data, void *userdata)
378{
379 struct eeh_pe *pe = (struct eeh_pe *)data;
380 struct eeh_dev *edev, *tmp;
381
382 eeh_pe_for_each_dev(pe, edev, tmp) {
383 if (!(edev->mode & EEH_DEV_DISCONNECTED))
384 continue;
385
386 edev->mode &= ~(EEH_DEV_DISCONNECTED | EEH_DEV_IRQ_DISABLED);
387 eeh_rmv_from_parent_pe(edev);
388 }
389
390 return NULL;
391}
392
341/** 393/**
342 * eeh_reset_device - Perform actual reset of a pci slot 394 * eeh_reset_device - Perform actual reset of a pci slot
343 * @pe: EEH PE 395 * @pe: EEH PE
@@ -349,8 +401,9 @@ static void *eeh_report_failure(void *data, void *userdata)
349 */ 401 */
350static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus) 402static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
351{ 403{
404 struct pci_bus *frozen_bus = eeh_pe_bus_get(pe);
352 struct timeval tstamp; 405 struct timeval tstamp;
353 int cnt, rc; 406 int cnt, rc, removed = 0;
354 407
355 /* pcibios will clear the counter; save the value */ 408 /* pcibios will clear the counter; save the value */
356 cnt = pe->freeze_count; 409 cnt = pe->freeze_count;
@@ -362,8 +415,11 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
362 * devices are expected to be attached soon when calling 415 * devices are expected to be attached soon when calling
363 * into pcibios_add_pci_devices(). 416 * into pcibios_add_pci_devices().
364 */ 417 */
418 eeh_pe_state_mark(pe, EEH_PE_KEEP);
365 if (bus) 419 if (bus)
366 __pcibios_remove_pci_devices(bus, 0); 420 pcibios_remove_pci_devices(bus);
421 else if (frozen_bus)
422 eeh_pe_dev_traverse(pe, eeh_rmv_device, &removed);
367 423
368 /* Reset the pci controller. (Asserts RST#; resets config space). 424 /* Reset the pci controller. (Asserts RST#; resets config space).
369 * Reconfigure bridges and devices. Don't try to bring the system 425 * Reconfigure bridges and devices. Don't try to bring the system
@@ -384,9 +440,24 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
384 * potentially weird things happen. 440 * potentially weird things happen.
385 */ 441 */
386 if (bus) { 442 if (bus) {
443 pr_info("EEH: Sleep 5s ahead of complete hotplug\n");
387 ssleep(5); 444 ssleep(5);
445
446 /*
447 * The EEH device is still connected with its parent
448 * PE. We should disconnect it so the binding can be
449 * rebuilt when adding PCI devices.
450 */
451 eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
388 pcibios_add_pci_devices(bus); 452 pcibios_add_pci_devices(bus);
453 } else if (frozen_bus && removed) {
454 pr_info("EEH: Sleep 5s ahead of partial hotplug\n");
455 ssleep(5);
456
457 eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
458 pcibios_add_pci_devices(frozen_bus);
389 } 459 }
460 eeh_pe_state_clear(pe, EEH_PE_KEEP);
390 461
391 pe->tstamp = tstamp; 462 pe->tstamp = tstamp;
392 pe->freeze_count = cnt; 463 pe->freeze_count = cnt;
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index 016588a6f5ed..f9450537e335 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -149,8 +149,8 @@ static struct eeh_pe *eeh_pe_next(struct eeh_pe *pe,
149 * callback returns something other than NULL, or no more PEs 149 * callback returns something other than NULL, or no more PEs
150 * to be traversed. 150 * to be traversed.
151 */ 151 */
152static void *eeh_pe_traverse(struct eeh_pe *root, 152void *eeh_pe_traverse(struct eeh_pe *root,
153 eeh_traverse_func fn, void *flag) 153 eeh_traverse_func fn, void *flag)
154{ 154{
155 struct eeh_pe *pe; 155 struct eeh_pe *pe;
156 void *ret; 156 void *ret;
@@ -176,7 +176,7 @@ void *eeh_pe_dev_traverse(struct eeh_pe *root,
176 eeh_traverse_func fn, void *flag) 176 eeh_traverse_func fn, void *flag)
177{ 177{
178 struct eeh_pe *pe; 178 struct eeh_pe *pe;
179 struct eeh_dev *edev; 179 struct eeh_dev *edev, *tmp;
180 void *ret; 180 void *ret;
181 181
182 if (!root) { 182 if (!root) {
@@ -186,7 +186,7 @@ void *eeh_pe_dev_traverse(struct eeh_pe *root,
186 186
187 /* Traverse root PE */ 187 /* Traverse root PE */
188 for (pe = root; pe; pe = eeh_pe_next(pe, root)) { 188 for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
189 eeh_pe_for_each_dev(pe, edev) { 189 eeh_pe_for_each_dev(pe, edev, tmp) {
190 ret = fn(edev, flag); 190 ret = fn(edev, flag);
191 if (ret) 191 if (ret)
192 return ret; 192 return ret;
@@ -333,7 +333,7 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
333 while (parent) { 333 while (parent) {
334 if (!(parent->type & EEH_PE_INVALID)) 334 if (!(parent->type & EEH_PE_INVALID))
335 break; 335 break;
336 parent->type &= ~EEH_PE_INVALID; 336 parent->type &= ~(EEH_PE_INVALID | EEH_PE_KEEP);
337 parent = parent->parent; 337 parent = parent->parent;
338 } 338 }
339 pr_debug("EEH: Add %s to Device PE#%x, Parent PE#%x\n", 339 pr_debug("EEH: Add %s to Device PE#%x, Parent PE#%x\n",
@@ -397,21 +397,20 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
397/** 397/**
398 * eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE 398 * eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE
399 * @edev: EEH device 399 * @edev: EEH device
400 * @purge_pe: remove PE or not
401 * 400 *
402 * The PE hierarchy tree might be changed when doing PCI hotplug. 401 * The PE hierarchy tree might be changed when doing PCI hotplug.
403 * Also, the PCI devices or buses could be removed from the system 402 * Also, the PCI devices or buses could be removed from the system
404 * during EEH recovery. So we have to call the function remove the 403 * during EEH recovery. So we have to call the function remove the
405 * corresponding PE accordingly if necessary. 404 * corresponding PE accordingly if necessary.
406 */ 405 */
407int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe) 406int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
408{ 407{
409 struct eeh_pe *pe, *parent, *child; 408 struct eeh_pe *pe, *parent, *child;
410 int cnt; 409 int cnt;
411 410
412 if (!edev->pe) { 411 if (!edev->pe) {
413 pr_warning("%s: No PE found for EEH device %s\n", 412 pr_debug("%s: No PE found for EEH device %s\n",
414 __func__, edev->dn->full_name); 413 __func__, edev->dn->full_name);
415 return -EEXIST; 414 return -EEXIST;
416 } 415 }
417 416
@@ -431,7 +430,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
431 if (pe->type & EEH_PE_PHB) 430 if (pe->type & EEH_PE_PHB)
432 break; 431 break;
433 432
434 if (purge_pe) { 433 if (!(pe->state & EEH_PE_KEEP)) {
435 if (list_empty(&pe->edevs) && 434 if (list_empty(&pe->edevs) &&
436 list_empty(&pe->child_list)) { 435 list_empty(&pe->child_list)) {
437 list_del(&pe->child); 436 list_del(&pe->child);
@@ -502,7 +501,7 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
502{ 501{
503 struct eeh_pe *pe = (struct eeh_pe *)data; 502 struct eeh_pe *pe = (struct eeh_pe *)data;
504 int state = *((int *)flag); 503 int state = *((int *)flag);
505 struct eeh_dev *tmp; 504 struct eeh_dev *edev, *tmp;
506 struct pci_dev *pdev; 505 struct pci_dev *pdev;
507 506
508 /* 507 /*
@@ -512,8 +511,8 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
512 * the PCI device driver. 511 * the PCI device driver.
513 */ 512 */
514 pe->state |= state; 513 pe->state |= state;
515 eeh_pe_for_each_dev(pe, tmp) { 514 eeh_pe_for_each_dev(pe, edev, tmp) {
516 pdev = eeh_dev_to_pci_dev(tmp); 515 pdev = eeh_dev_to_pci_dev(edev);
517 if (pdev) 516 if (pdev)
518 pdev->error_state = pci_channel_io_frozen; 517 pdev->error_state = pci_channel_io_frozen;
519 } 518 }
@@ -579,7 +578,7 @@ void eeh_pe_state_clear(struct eeh_pe *pe, int state)
579 * blocked on normal path during the stage. So we need utilize 578 * blocked on normal path during the stage. So we need utilize
580 * eeh operations, which is always permitted. 579 * eeh operations, which is always permitted.
581 */ 580 */
582static void eeh_bridge_check_link(struct pci_dev *pdev, 581static void eeh_bridge_check_link(struct eeh_dev *edev,
583 struct device_node *dn) 582 struct device_node *dn)
584{ 583{
585 int cap; 584 int cap;
@@ -590,16 +589,17 @@ static void eeh_bridge_check_link(struct pci_dev *pdev,
590 * We only check root port and downstream ports of 589 * We only check root port and downstream ports of
591 * PCIe switches 590 * PCIe switches
592 */ 591 */
593 if (!pci_is_pcie(pdev) || 592 if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
594 (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
595 pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
596 return; 593 return;
597 594
598 pr_debug("%s: Check PCIe link for %s ...\n", 595 pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
599 __func__, pci_name(pdev)); 596 __func__, edev->phb->global_number,
597 edev->config_addr >> 8,
598 PCI_SLOT(edev->config_addr & 0xFF),
599 PCI_FUNC(edev->config_addr & 0xFF));
600 600
601 /* Check slot status */ 601 /* Check slot status */
602 cap = pdev->pcie_cap; 602 cap = edev->pcie_cap;
603 eeh_ops->read_config(dn, cap + PCI_EXP_SLTSTA, 2, &val); 603 eeh_ops->read_config(dn, cap + PCI_EXP_SLTSTA, 2, &val);
604 if (!(val & PCI_EXP_SLTSTA_PDS)) { 604 if (!(val & PCI_EXP_SLTSTA_PDS)) {
605 pr_debug(" No card in the slot (0x%04x) !\n", val); 605 pr_debug(" No card in the slot (0x%04x) !\n", val);
@@ -653,8 +653,7 @@ static void eeh_bridge_check_link(struct pci_dev *pdev,
653#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF)) 653#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
654#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)]) 654#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
655 655
656static void eeh_restore_bridge_bars(struct pci_dev *pdev, 656static void eeh_restore_bridge_bars(struct eeh_dev *edev,
657 struct eeh_dev *edev,
658 struct device_node *dn) 657 struct device_node *dn)
659{ 658{
660 int i; 659 int i;
@@ -680,7 +679,7 @@ static void eeh_restore_bridge_bars(struct pci_dev *pdev,
680 eeh_ops->write_config(dn, PCI_COMMAND, 4, edev->config_space[1]); 679 eeh_ops->write_config(dn, PCI_COMMAND, 4, edev->config_space[1]);
681 680
682 /* Check the PCIe link is ready */ 681 /* Check the PCIe link is ready */
683 eeh_bridge_check_link(pdev, dn); 682 eeh_bridge_check_link(edev, dn);
684} 683}
685 684
686static void eeh_restore_device_bars(struct eeh_dev *edev, 685static void eeh_restore_device_bars(struct eeh_dev *edev,
@@ -729,19 +728,12 @@ static void eeh_restore_device_bars(struct eeh_dev *edev,
729 */ 728 */
730static void *eeh_restore_one_device_bars(void *data, void *flag) 729static void *eeh_restore_one_device_bars(void *data, void *flag)
731{ 730{
732 struct pci_dev *pdev = NULL;
733 struct eeh_dev *edev = (struct eeh_dev *)data; 731 struct eeh_dev *edev = (struct eeh_dev *)data;
734 struct device_node *dn = eeh_dev_to_of_node(edev); 732 struct device_node *dn = eeh_dev_to_of_node(edev);
735 733
736 /* Trace the PCI bridge */ 734 /* Do special restore for bridges */
737 if (eeh_probe_mode_dev()) { 735 if (edev->mode & EEH_DEV_BRIDGE)
738 pdev = eeh_dev_to_pci_dev(edev); 736 eeh_restore_bridge_bars(edev, dn);
739 if (pdev->hdr_type != PCI_HEADER_TYPE_BRIDGE)
740 pdev = NULL;
741 }
742
743 if (pdev)
744 eeh_restore_bridge_bars(pdev, edev, dn);
745 else 737 else
746 eeh_restore_device_bars(edev, dn); 738 eeh_restore_device_bars(edev, dn);
747 739
diff --git a/arch/powerpc/kernel/eeh_sysfs.c b/arch/powerpc/kernel/eeh_sysfs.c
index e7ae3484918c..5d753d4f2c75 100644
--- a/arch/powerpc/kernel/eeh_sysfs.c
+++ b/arch/powerpc/kernel/eeh_sysfs.c
@@ -56,19 +56,40 @@ EEH_SHOW_ATTR(eeh_pe_config_addr, pe_config_addr, "0x%x");
56 56
57void eeh_sysfs_add_device(struct pci_dev *pdev) 57void eeh_sysfs_add_device(struct pci_dev *pdev)
58{ 58{
59 struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
59 int rc=0; 60 int rc=0;
60 61
62 if (edev && (edev->mode & EEH_DEV_SYSFS))
63 return;
64
61 rc += device_create_file(&pdev->dev, &dev_attr_eeh_mode); 65 rc += device_create_file(&pdev->dev, &dev_attr_eeh_mode);
62 rc += device_create_file(&pdev->dev, &dev_attr_eeh_config_addr); 66 rc += device_create_file(&pdev->dev, &dev_attr_eeh_config_addr);
63 rc += device_create_file(&pdev->dev, &dev_attr_eeh_pe_config_addr); 67 rc += device_create_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
64 68
65 if (rc) 69 if (rc)
66 printk(KERN_WARNING "EEH: Unable to create sysfs entries\n"); 70 printk(KERN_WARNING "EEH: Unable to create sysfs entries\n");
71 else if (edev)
72 edev->mode |= EEH_DEV_SYSFS;
67} 73}
68 74
69void eeh_sysfs_remove_device(struct pci_dev *pdev) 75void eeh_sysfs_remove_device(struct pci_dev *pdev)
70{ 76{
77 struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
78
79 /*
80 * The parent directory might have been removed. We needn't
81 * continue for that case.
82 */
83 if (!pdev->dev.kobj.sd) {
84 if (edev)
85 edev->mode &= ~EEH_DEV_SYSFS;
86 return;
87 }
88
71 device_remove_file(&pdev->dev, &dev_attr_eeh_mode); 89 device_remove_file(&pdev->dev, &dev_attr_eeh_mode);
72 device_remove_file(&pdev->dev, &dev_attr_eeh_config_addr); 90 device_remove_file(&pdev->dev, &dev_attr_eeh_config_addr);
73 device_remove_file(&pdev->dev, &dev_attr_eeh_pe_config_addr); 91 device_remove_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
92
93 if (edev)
94 edev->mode &= ~EEH_DEV_SYSFS;
74} 95}
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 2e51cde616d2..c69440cef7af 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -362,7 +362,7 @@ int arch_show_interrupts(struct seq_file *p, int prec)
362 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs); 362 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
363 seq_printf(p, " Spurious interrupts\n"); 363 seq_printf(p, " Spurious interrupts\n");
364 364
365 seq_printf(p, "%*s: ", prec, "CNT"); 365 seq_printf(p, "%*s: ", prec, "PMI");
366 for_each_online_cpu(j) 366 for_each_online_cpu(j)
367 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs); 367 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
368 seq_printf(p, " Performance monitoring interrupts\n"); 368 seq_printf(p, " Performance monitoring interrupts\n");
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index f46914a0f33e..7d22a675fe1a 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1462,6 +1462,8 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
1462 /* Allocate bus and devices resources */ 1462 /* Allocate bus and devices resources */
1463 pcibios_allocate_bus_resources(bus); 1463 pcibios_allocate_bus_resources(bus);
1464 pcibios_claim_one_bus(bus); 1464 pcibios_claim_one_bus(bus);
1465 if (!pci_has_flag(PCI_PROBE_ONLY))
1466 pci_assign_unassigned_bus_resources(bus);
1465 1467
1466 /* Fixup EEH */ 1468 /* Fixup EEH */
1467 eeh_add_device_tree_late(bus); 1469 eeh_add_device_tree_late(bus);
diff --git a/arch/powerpc/kernel/pci-hotplug.c b/arch/powerpc/kernel/pci-hotplug.c
index 3f608800c06b..c1e17ae68a08 100644
--- a/arch/powerpc/kernel/pci-hotplug.c
+++ b/arch/powerpc/kernel/pci-hotplug.c
@@ -22,45 +22,40 @@
22#include <asm/eeh.h> 22#include <asm/eeh.h>
23 23
24/** 24/**
25 * __pcibios_remove_pci_devices - remove all devices under this bus 25 * pcibios_release_device - release PCI device
26 * @dev: PCI device
27 *
28 * The function is called before releasing the indicated PCI device.
29 */
30void pcibios_release_device(struct pci_dev *dev)
31{
32 eeh_remove_device(dev);
33}
34
35/**
36 * pcibios_remove_pci_devices - remove all devices under this bus
26 * @bus: the indicated PCI bus 37 * @bus: the indicated PCI bus
27 * @purge_pe: destroy the PE on removal of PCI devices
28 * 38 *
29 * Remove all of the PCI devices under this bus both from the 39 * Remove all of the PCI devices under this bus both from the
30 * linux pci device tree, and from the powerpc EEH address cache. 40 * linux pci device tree, and from the powerpc EEH address cache.
31 * By default, the corresponding PE will be destroied during the
32 * normal PCI hotplug path. For PCI hotplug during EEH recovery,
33 * the corresponding PE won't be destroied and deallocated.
34 */ 41 */
35void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe) 42void pcibios_remove_pci_devices(struct pci_bus *bus)
36{ 43{
37 struct pci_dev *dev, *tmp; 44 struct pci_dev *dev, *tmp;
38 struct pci_bus *child_bus; 45 struct pci_bus *child_bus;
39 46
40 /* First go down child busses */ 47 /* First go down child busses */
41 list_for_each_entry(child_bus, &bus->children, node) 48 list_for_each_entry(child_bus, &bus->children, node)
42 __pcibios_remove_pci_devices(child_bus, purge_pe); 49 pcibios_remove_pci_devices(child_bus);
43 50
44 pr_debug("PCI: Removing devices on bus %04x:%02x\n", 51 pr_debug("PCI: Removing devices on bus %04x:%02x\n",
45 pci_domain_nr(bus), bus->number); 52 pci_domain_nr(bus), bus->number);
46 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) { 53 list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
47 pr_debug(" * Removing %s...\n", pci_name(dev)); 54 pr_debug(" Removing %s...\n", pci_name(dev));
48 eeh_remove_bus_device(dev, purge_pe);
49 pci_stop_and_remove_bus_device(dev); 55 pci_stop_and_remove_bus_device(dev);
50 } 56 }
51} 57}
52 58
53/**
54 * pcibios_remove_pci_devices - remove all devices under this bus
55 * @bus: the indicated PCI bus
56 *
57 * Remove all of the PCI devices under this bus both from the
58 * linux pci device tree, and from the powerpc EEH address cache.
59 */
60void pcibios_remove_pci_devices(struct pci_bus *bus)
61{
62 __pcibios_remove_pci_devices(bus, 1);
63}
64EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices); 59EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
65 60
66/** 61/**
@@ -76,7 +71,7 @@ EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
76 */ 71 */
77void pcibios_add_pci_devices(struct pci_bus * bus) 72void pcibios_add_pci_devices(struct pci_bus * bus)
78{ 73{
79 int slotno, num, mode, pass, max; 74 int slotno, mode, pass, max;
80 struct pci_dev *dev; 75 struct pci_dev *dev;
81 struct device_node *dn = pci_bus_to_OF_node(bus); 76 struct device_node *dn = pci_bus_to_OF_node(bus);
82 77
@@ -90,11 +85,15 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
90 /* use ofdt-based probe */ 85 /* use ofdt-based probe */
91 of_rescan_bus(dn, bus); 86 of_rescan_bus(dn, bus);
92 } else if (mode == PCI_PROBE_NORMAL) { 87 } else if (mode == PCI_PROBE_NORMAL) {
93 /* use legacy probe */ 88 /*
89 * Use legacy probe. In the partial hotplug case, we
90 * probably have grandchildren devices unplugged. So
91 * we don't check the return value from pci_scan_slot() in
92 * order for fully rescan all the way down to pick them up.
93 * They can have been removed during partial hotplug.
94 */
94 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn); 95 slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
95 num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0)); 96 pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
96 if (!num)
97 return;
98 pcibios_setup_bus_devices(bus); 97 pcibios_setup_bus_devices(bus);
99 max = bus->busn_res.start; 98 max = bus->busn_res.start;
100 for (pass = 0; pass < 2; pass++) { 99 for (pass = 0; pass < 2; pass++) {
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 6b0ba5854d99..15d9105323bf 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -230,11 +230,14 @@ void of_scan_pci_bridge(struct pci_dev *dev)
230 return; 230 return;
231 } 231 }
232 232
233 bus = pci_add_new_bus(dev->bus, dev, busrange[0]); 233 bus = pci_find_bus(pci_domain_nr(dev->bus), busrange[0]);
234 if (!bus) { 234 if (!bus) {
235 printk(KERN_ERR "Failed to create pci bus for %s\n", 235 bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
236 node->full_name); 236 if (!bus) {
237 return; 237 printk(KERN_ERR "Failed to create pci bus for %s\n",
238 node->full_name);
239 return;
240 }
238 } 241 }
239 242
240 bus->primary = dev->bus->number; 243 bus->primary = dev->bus->number;
@@ -292,6 +295,38 @@ void of_scan_pci_bridge(struct pci_dev *dev)
292} 295}
293EXPORT_SYMBOL(of_scan_pci_bridge); 296EXPORT_SYMBOL(of_scan_pci_bridge);
294 297
298static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
299 struct device_node *dn)
300{
301 struct pci_dev *dev = NULL;
302 const u32 *reg;
303 int reglen, devfn;
304
305 pr_debug(" * %s\n", dn->full_name);
306 if (!of_device_is_available(dn))
307 return NULL;
308
309 reg = of_get_property(dn, "reg", &reglen);
310 if (reg == NULL || reglen < 20)
311 return NULL;
312 devfn = (reg[0] >> 8) & 0xff;
313
314 /* Check if the PCI device is already there */
315 dev = pci_get_slot(bus, devfn);
316 if (dev) {
317 pci_dev_put(dev);
318 return dev;
319 }
320
321 /* create a new pci_dev for this device */
322 dev = of_create_pci_dev(dn, bus, devfn);
323 if (!dev)
324 return NULL;
325
326 pr_debug(" dev header type: %x\n", dev->hdr_type);
327 return dev;
328}
329
295/** 330/**
296 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices 331 * __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
297 * @node: device tree node for the PCI bus 332 * @node: device tree node for the PCI bus
@@ -302,8 +337,6 @@ static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
302 int rescan_existing) 337 int rescan_existing)
303{ 338{
304 struct device_node *child; 339 struct device_node *child;
305 const u32 *reg;
306 int reglen, devfn;
307 struct pci_dev *dev; 340 struct pci_dev *dev;
308 341
309 pr_debug("of_scan_bus(%s) bus no %d...\n", 342 pr_debug("of_scan_bus(%s) bus no %d...\n",
@@ -311,16 +344,7 @@ static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
311 344
312 /* Scan direct children */ 345 /* Scan direct children */
313 for_each_child_of_node(node, child) { 346 for_each_child_of_node(node, child) {
314 pr_debug(" * %s\n", child->full_name); 347 dev = of_scan_pci_dev(bus, child);
315 if (!of_device_is_available(child))
316 continue;
317 reg = of_get_property(child, "reg", &reglen);
318 if (reg == NULL || reglen < 20)
319 continue;
320 devfn = (reg[0] >> 8) & 0xff;
321
322 /* create a new pci_dev for this device */
323 dev = of_create_pci_dev(child, bus, devfn);
324 if (!dev) 348 if (!dev)
325 continue; 349 continue;
326 pr_debug(" dev header type: %x\n", dev->hdr_type); 350 pr_debug(" dev header type: %x\n", dev->hdr_type);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 5eccda9fd33f..607902424e73 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -644,7 +644,8 @@ unsigned char ibm_architecture_vec[] = {
644 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ 644 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
645 W(0xffff0000), W(0x003e0000), /* POWER6 */ 645 W(0xffff0000), W(0x003e0000), /* POWER6 */
646 W(0xffff0000), W(0x003f0000), /* POWER7 */ 646 W(0xffff0000), W(0x003f0000), /* POWER7 */
647 W(0xffff0000), W(0x004b0000), /* POWER8 */ 647 W(0xffff0000), W(0x004b0000), /* POWER8E */
648 W(0xffff0000), W(0x004d0000), /* POWER8 */
648 W(0xffffffff), W(0x0f000004), /* all 2.07-compliant */ 649 W(0xffffffff), W(0x0f000004), /* all 2.07-compliant */
649 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */ 650 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
650 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ 651 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
@@ -706,7 +707,7 @@ unsigned char ibm_architecture_vec[] = {
706 * must match by the macro below. Update the definition if 707 * must match by the macro below. Update the definition if
707 * the structure layout changes. 708 * the structure layout changes.
708 */ 709 */
709#define IBM_ARCH_VEC_NRCORES_OFFSET 117 710#define IBM_ARCH_VEC_NRCORES_OFFSET 125
710 W(NR_CPUS), /* number of cores supported */ 711 W(NR_CPUS), /* number of cores supported */
711 0, 712 0,
712 0, 713 0,
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 654e479802f2..f096e72262f4 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -38,9 +38,6 @@ jiffies = jiffies_64 + 4;
38#endif 38#endif
39SECTIONS 39SECTIONS
40{ 40{
41 . = 0;
42 reloc_start = .;
43
44 . = KERNELBASE; 41 . = KERNELBASE;
45 42
46/* 43/*
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 3f0c30ae4791..c33d939120c9 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -43,6 +43,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
43{ 43{
44 unsigned long va; 44 unsigned long va;
45 unsigned int penc; 45 unsigned int penc;
46 unsigned long sllp;
46 47
47 /* 48 /*
48 * We need 14 to 65 bits of va for a tlibe of 4K page 49 * We need 14 to 65 bits of va for a tlibe of 4K page
@@ -64,7 +65,9 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
64 /* clear out bits after (52) [0....52.....63] */ 65 /* clear out bits after (52) [0....52.....63] */
65 va &= ~((1ul << (64 - 52)) - 1); 66 va &= ~((1ul << (64 - 52)) - 1);
66 va |= ssize << 8; 67 va |= ssize << 8;
67 va |= mmu_psize_defs[apsize].sllp << 6; 68 sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
69 ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
70 va |= sllp << 5;
68 asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2) 71 asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
69 : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206) 72 : : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
70 : "memory"); 73 : "memory");
@@ -98,6 +101,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
98{ 101{
99 unsigned long va; 102 unsigned long va;
100 unsigned int penc; 103 unsigned int penc;
104 unsigned long sllp;
101 105
102 /* VPN_SHIFT can be atmost 12 */ 106 /* VPN_SHIFT can be atmost 12 */
103 va = vpn << VPN_SHIFT; 107 va = vpn << VPN_SHIFT;
@@ -113,7 +117,9 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
113 /* clear out bits after(52) [0....52.....63] */ 117 /* clear out bits after(52) [0....52.....63] */
114 va &= ~((1ul << (64 - 52)) - 1); 118 va &= ~((1ul << (64 - 52)) - 1);
115 va |= ssize << 8; 119 va |= ssize << 8;
116 va |= mmu_psize_defs[apsize].sllp << 6; 120 sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
121 ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
122 va |= sllp << 5;
117 asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)" 123 asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)"
118 : : "r"(va) : "memory"); 124 : : "r"(va) : "memory");
119 break; 125 break;
@@ -554,6 +560,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
554 seg_off |= vpi << shift; 560 seg_off |= vpi << shift;
555 } 561 }
556 *vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT; 562 *vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT;
563 break;
557 case MMU_SEGSIZE_1T: 564 case MMU_SEGSIZE_1T:
558 /* We only have 40 - 23 bits of seg_off in avpn */ 565 /* We only have 40 - 23 bits of seg_off in avpn */
559 seg_off = (avpn & 0x1ffff) << 23; 566 seg_off = (avpn & 0x1ffff) << 23;
@@ -563,6 +570,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
563 seg_off |= vpi << shift; 570 seg_off |= vpi << shift;
564 } 571 }
565 *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT; 572 *vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT;
573 break;
566 default: 574 default:
567 *vpn = size = 0; 575 *vpn = size = 0;
568 } 576 }
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 08397217e8ac..5850798826cd 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -27,6 +27,7 @@
27#include <linux/seq_file.h> 27#include <linux/seq_file.h>
28#include <linux/uaccess.h> 28#include <linux/uaccess.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <asm/cputhreads.h>
30#include <asm/sparsemem.h> 31#include <asm/sparsemem.h>
31#include <asm/prom.h> 32#include <asm/prom.h>
32#include <asm/smp.h> 33#include <asm/smp.h>
@@ -1318,7 +1319,8 @@ static int update_cpu_associativity_changes_mask(void)
1318 } 1319 }
1319 } 1320 }
1320 if (changed) { 1321 if (changed) {
1321 cpumask_set_cpu(cpu, changes); 1322 cpumask_or(changes, changes, cpu_sibling_mask(cpu));
1323 cpu = cpu_last_thread_sibling(cpu);
1322 } 1324 }
1323 } 1325 }
1324 1326
@@ -1426,7 +1428,7 @@ static int update_cpu_topology(void *data)
1426 if (!data) 1428 if (!data)
1427 return -EINVAL; 1429 return -EINVAL;
1428 1430
1429 cpu = get_cpu(); 1431 cpu = smp_processor_id();
1430 1432
1431 for (update = data; update; update = update->next) { 1433 for (update = data; update; update = update->next) {
1432 if (cpu != update->cpu) 1434 if (cpu != update->cpu)
@@ -1446,12 +1448,12 @@ static int update_cpu_topology(void *data)
1446 */ 1448 */
1447int arch_update_cpu_topology(void) 1449int arch_update_cpu_topology(void)
1448{ 1450{
1449 unsigned int cpu, changed = 0; 1451 unsigned int cpu, sibling, changed = 0;
1450 struct topology_update_data *updates, *ud; 1452 struct topology_update_data *updates, *ud;
1451 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0}; 1453 unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
1452 cpumask_t updated_cpus; 1454 cpumask_t updated_cpus;
1453 struct device *dev; 1455 struct device *dev;
1454 int weight, i = 0; 1456 int weight, new_nid, i = 0;
1455 1457
1456 weight = cpumask_weight(&cpu_associativity_changes_mask); 1458 weight = cpumask_weight(&cpu_associativity_changes_mask);
1457 if (!weight) 1459 if (!weight)
@@ -1464,19 +1466,46 @@ int arch_update_cpu_topology(void)
1464 cpumask_clear(&updated_cpus); 1466 cpumask_clear(&updated_cpus);
1465 1467
1466 for_each_cpu(cpu, &cpu_associativity_changes_mask) { 1468 for_each_cpu(cpu, &cpu_associativity_changes_mask) {
1467 ud = &updates[i++]; 1469 /*
1468 ud->cpu = cpu; 1470 * If siblings aren't flagged for changes, updates list
1469 vphn_get_associativity(cpu, associativity); 1471 * will be too short. Skip on this update and set for next
1470 ud->new_nid = associativity_to_nid(associativity); 1472 * update.
1471 1473 */
1472 if (ud->new_nid < 0 || !node_online(ud->new_nid)) 1474 if (!cpumask_subset(cpu_sibling_mask(cpu),
1473 ud->new_nid = first_online_node; 1475 &cpu_associativity_changes_mask)) {
1476 pr_info("Sibling bits not set for associativity "
1477 "change, cpu%d\n", cpu);
1478 cpumask_or(&cpu_associativity_changes_mask,
1479 &cpu_associativity_changes_mask,
1480 cpu_sibling_mask(cpu));
1481 cpu = cpu_last_thread_sibling(cpu);
1482 continue;
1483 }
1474 1484
1475 ud->old_nid = numa_cpu_lookup_table[cpu]; 1485 /* Use associativity from first thread for all siblings */
1476 cpumask_set_cpu(cpu, &updated_cpus); 1486 vphn_get_associativity(cpu, associativity);
1487 new_nid = associativity_to_nid(associativity);
1488 if (new_nid < 0 || !node_online(new_nid))
1489 new_nid = first_online_node;
1490
1491 if (new_nid == numa_cpu_lookup_table[cpu]) {
1492 cpumask_andnot(&cpu_associativity_changes_mask,
1493 &cpu_associativity_changes_mask,
1494 cpu_sibling_mask(cpu));
1495 cpu = cpu_last_thread_sibling(cpu);
1496 continue;
1497 }
1477 1498
1478 if (i < weight) 1499 for_each_cpu(sibling, cpu_sibling_mask(cpu)) {
1479 ud->next = &updates[i]; 1500 ud = &updates[i++];
1501 ud->cpu = sibling;
1502 ud->new_nid = new_nid;
1503 ud->old_nid = numa_cpu_lookup_table[sibling];
1504 cpumask_set_cpu(sibling, &updated_cpus);
1505 if (i < weight)
1506 ud->next = &updates[i];
1507 }
1508 cpu = cpu_last_thread_sibling(cpu);
1480 } 1509 }
1481 1510
1482 stop_machine(update_cpu_topology, &updates[0], &updated_cpus); 1511 stop_machine(update_cpu_topology, &updates[0], &updated_cpus);
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index a3985aee77fe..eeae308cf982 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -484,7 +484,7 @@ static bool is_ebb_event(struct perf_event *event)
484 * use bit 63 of the event code for something else if they wish. 484 * use bit 63 of the event code for something else if they wish.
485 */ 485 */
486 return (ppmu->flags & PPMU_EBB) && 486 return (ppmu->flags & PPMU_EBB) &&
487 ((event->attr.config >> EVENT_CONFIG_EBB_SHIFT) & 1); 487 ((event->attr.config >> PERF_EVENT_CONFIG_EBB_SHIFT) & 1);
488} 488}
489 489
490static int ebb_event_check(struct perf_event *event) 490static int ebb_event_check(struct perf_event *event)
@@ -1252,8 +1252,11 @@ nocheck:
1252 1252
1253 ret = 0; 1253 ret = 0;
1254 out: 1254 out:
1255 if (has_branch_stack(event)) 1255 if (has_branch_stack(event)) {
1256 power_pmu_bhrb_enable(event); 1256 power_pmu_bhrb_enable(event);
1257 cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
1258 event->attr.branch_sample_type);
1259 }
1257 1260
1258 perf_pmu_enable(event->pmu); 1261 perf_pmu_enable(event->pmu);
1259 local_irq_restore(flags); 1262 local_irq_restore(flags);
diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c
index 96a64d6a8bdf..2ee4a707f0df 100644
--- a/arch/powerpc/perf/power8-pmu.c
+++ b/arch/powerpc/perf/power8-pmu.c
@@ -118,7 +118,7 @@
118 (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \ 118 (EVENT_UNIT_MASK << EVENT_UNIT_SHIFT) | \
119 (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \ 119 (EVENT_COMBINE_MASK << EVENT_COMBINE_SHIFT) | \
120 (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \ 120 (EVENT_MARKED_MASK << EVENT_MARKED_SHIFT) | \
121 (EVENT_EBB_MASK << EVENT_CONFIG_EBB_SHIFT) | \ 121 (EVENT_EBB_MASK << PERF_EVENT_CONFIG_EBB_SHIFT) | \
122 EVENT_PSEL_MASK) 122 EVENT_PSEL_MASK)
123 123
124/* MMCRA IFM bits - POWER8 */ 124/* MMCRA IFM bits - POWER8 */
@@ -233,10 +233,10 @@ static int power8_get_constraint(u64 event, unsigned long *maskp, unsigned long
233 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK; 233 pmc = (event >> EVENT_PMC_SHIFT) & EVENT_PMC_MASK;
234 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK; 234 unit = (event >> EVENT_UNIT_SHIFT) & EVENT_UNIT_MASK;
235 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK; 235 cache = (event >> EVENT_CACHE_SEL_SHIFT) & EVENT_CACHE_SEL_MASK;
236 ebb = (event >> EVENT_CONFIG_EBB_SHIFT) & EVENT_EBB_MASK; 236 ebb = (event >> PERF_EVENT_CONFIG_EBB_SHIFT) & EVENT_EBB_MASK;
237 237
238 /* Clear the EBB bit in the event, so event checks work below */ 238 /* Clear the EBB bit in the event, so event checks work below */
239 event &= ~(EVENT_EBB_MASK << EVENT_CONFIG_EBB_SHIFT); 239 event &= ~(EVENT_EBB_MASK << PERF_EVENT_CONFIG_EBB_SHIFT);
240 240
241 if (pmc) { 241 if (pmc) {
242 if (pmc > 6) 242 if (pmc > 6)
@@ -561,18 +561,13 @@ static int power8_generic_events[] = {
561static u64 power8_bhrb_filter_map(u64 branch_sample_type) 561static u64 power8_bhrb_filter_map(u64 branch_sample_type)
562{ 562{
563 u64 pmu_bhrb_filter = 0; 563 u64 pmu_bhrb_filter = 0;
564 u64 br_privilege = branch_sample_type & ONLY_PLM;
565 564
566 /* BHRB and regular PMU events share the same prvillege state 565 /* BHRB and regular PMU events share the same privilege state
567 * filter configuration. BHRB is always recorded along with a 566 * filter configuration. BHRB is always recorded along with a
568 * regular PMU event. So privilege state filter criteria for BHRB 567 * regular PMU event. As the privilege state filter is handled
569 * and the companion PMU events has to be the same. As a default 568 * in the basic PMC configuration of the accompanying regular
570 * "perf record" tool sets all privillege bits ON when no filter 569 * PMU event, we ignore any separate BHRB specific request.
571 * criteria is provided in the command line. So as along as all
572 * privillege bits are ON or they are OFF, we are good to go.
573 */ 570 */
574 if ((br_privilege != 7) && (br_privilege != 0))
575 return -1;
576 571
577 /* No branch filter requested */ 572 /* No branch filter requested */
578 if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY) 573 if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
@@ -621,10 +616,19 @@ static struct power_pmu power8_pmu = {
621 616
622static int __init init_power8_pmu(void) 617static int __init init_power8_pmu(void)
623{ 618{
619 int rc;
620
624 if (!cur_cpu_spec->oprofile_cpu_type || 621 if (!cur_cpu_spec->oprofile_cpu_type ||
625 strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power8")) 622 strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power8"))
626 return -ENODEV; 623 return -ENODEV;
627 624
628 return register_power_pmu(&power8_pmu); 625 rc = register_power_pmu(&power8_pmu);
626 if (rc)
627 return rc;
628
629 /* Tell userspace that EBB is supported */
630 cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_EBB;
631
632 return 0;
629} 633}
630early_initcall(init_power8_pmu); 634early_initcall(init_power8_pmu);
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 969cce73055a..79663d26e6ea 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -114,7 +114,7 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
114 * the root bridge. So it's not reasonable to continue 114 * the root bridge. So it's not reasonable to continue
115 * the probing. 115 * the probing.
116 */ 116 */
117 if (!dn || !edev) 117 if (!dn || !edev || edev->pe)
118 return 0; 118 return 0;
119 119
120 /* Skip for PCI-ISA bridge */ 120 /* Skip for PCI-ISA bridge */
@@ -122,8 +122,19 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
122 return 0; 122 return 0;
123 123
124 /* Initialize eeh device */ 124 /* Initialize eeh device */
125 edev->class_code = dev->class; 125 edev->class_code = dev->class;
126 edev->mode = 0; 126 edev->mode &= 0xFFFFFF00;
127 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
128 edev->mode |= EEH_DEV_BRIDGE;
129 if (pci_is_pcie(dev)) {
130 edev->pcie_cap = pci_pcie_cap(dev);
131
132 if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
133 edev->mode |= EEH_DEV_ROOT_PORT;
134 else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
135 edev->mode |= EEH_DEV_DS_PORT;
136 }
137
127 edev->config_addr = ((dev->bus->number << 8) | dev->devfn); 138 edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
128 edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff); 139 edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
129 140
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c
index 49b57b9f835d..d8140b125e62 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1266,7 +1266,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
1266 opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE); 1266 opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
1267} 1267}
1268 1268
1269void pnv_pci_init_ioda2_phb(struct device_node *np) 1269void __init pnv_pci_init_ioda2_phb(struct device_node *np)
1270{ 1270{
1271 pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2); 1271 pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
1272} 1272}
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index 1bd3399146ed..62b4f8025de0 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -19,7 +19,6 @@ config PPC_PSERIES
19 select ZLIB_DEFLATE 19 select ZLIB_DEFLATE
20 select PPC_DOORBELL 20 select PPC_DOORBELL
21 select HAVE_CONTEXT_TRACKING 21 select HAVE_CONTEXT_TRACKING
22 select HOTPLUG if SMP
23 select HOTPLUG_CPU if SMP 22 select HOTPLUG_CPU if SMP
24 default y 23 default y
25 24
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index b456b157d33d..7fbc25b1813f 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -133,6 +133,48 @@ static int pseries_eeh_init(void)
133 return 0; 133 return 0;
134} 134}
135 135
136static int pseries_eeh_cap_start(struct device_node *dn)
137{
138 struct pci_dn *pdn = PCI_DN(dn);
139 u32 status;
140
141 if (!pdn)
142 return 0;
143
144 rtas_read_config(pdn, PCI_STATUS, 2, &status);
145 if (!(status & PCI_STATUS_CAP_LIST))
146 return 0;
147
148 return PCI_CAPABILITY_LIST;
149}
150
151
152static int pseries_eeh_find_cap(struct device_node *dn, int cap)
153{
154 struct pci_dn *pdn = PCI_DN(dn);
155 int pos = pseries_eeh_cap_start(dn);
156 int cnt = 48; /* Maximal number of capabilities */
157 u32 id;
158
159 if (!pos)
160 return 0;
161
162 while (cnt--) {
163 rtas_read_config(pdn, pos, 1, &pos);
164 if (pos < 0x40)
165 break;
166 pos &= ~3;
167 rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
168 if (id == 0xff)
169 break;
170 if (id == cap)
171 return pos;
172 pos += PCI_CAP_LIST_NEXT;
173 }
174
175 return 0;
176}
177
136/** 178/**
137 * pseries_eeh_of_probe - EEH probe on the given device 179 * pseries_eeh_of_probe - EEH probe on the given device
138 * @dn: OF node 180 * @dn: OF node
@@ -146,14 +188,16 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
146{ 188{
147 struct eeh_dev *edev; 189 struct eeh_dev *edev;
148 struct eeh_pe pe; 190 struct eeh_pe pe;
191 struct pci_dn *pdn = PCI_DN(dn);
149 const u32 *class_code, *vendor_id, *device_id; 192 const u32 *class_code, *vendor_id, *device_id;
150 const u32 *regs; 193 const u32 *regs;
194 u32 pcie_flags;
151 int enable = 0; 195 int enable = 0;
152 int ret; 196 int ret;
153 197
154 /* Retrieve OF node and eeh device */ 198 /* Retrieve OF node and eeh device */
155 edev = of_node_to_eeh_dev(dn); 199 edev = of_node_to_eeh_dev(dn);
156 if (!of_device_is_available(dn)) 200 if (edev->pe || !of_device_is_available(dn))
157 return NULL; 201 return NULL;
158 202
159 /* Retrieve class/vendor/device IDs */ 203 /* Retrieve class/vendor/device IDs */
@@ -167,9 +211,26 @@ static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
167 if (dn->type && !strcmp(dn->type, "isa")) 211 if (dn->type && !strcmp(dn->type, "isa"))
168 return NULL; 212 return NULL;
169 213
170 /* Update class code and mode of eeh device */ 214 /*
215 * Update class code and mode of eeh device. We need
216 * correctly reflects that current device is root port
217 * or PCIe switch downstream port.
218 */
171 edev->class_code = *class_code; 219 edev->class_code = *class_code;
172 edev->mode = 0; 220 edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
221 edev->mode &= 0xFFFFFF00;
222 if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
223 edev->mode |= EEH_DEV_BRIDGE;
224 if (edev->pcie_cap) {
225 rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
226 2, &pcie_flags);
227 pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
228 if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
229 edev->mode |= EEH_DEV_ROOT_PORT;
230 else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
231 edev->mode |= EEH_DEV_DS_PORT;
232 }
233 }
173 234
174 /* Retrieve the device address */ 235 /* Retrieve the device address */
175 regs = of_get_property(dn, "reg", NULL); 236 regs = of_get_property(dn, "reg", NULL);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 02d6e21619bb..8bad880bd177 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -146,7 +146,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
146 flags = 0; 146 flags = 0;
147 147
148 /* Make pHyp happy */ 148 /* Make pHyp happy */
149 if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU)) 149 if ((rflags & _PAGE_NO_CACHE) && !(rflags & _PAGE_WRITETHRU))
150 hpte_r &= ~_PAGE_COHERENT; 150 hpte_r &= ~_PAGE_COHERENT;
151 if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N)) 151 if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
152 flags |= H_COALESCE_CAND; 152 flags |= H_COALESCE_CAND;
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 7b3cbde8c783..721c0586b284 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -287,6 +287,9 @@ static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
287 unsigned long *savep; 287 unsigned long *savep;
288 struct rtas_error_log *h, *errhdr = NULL; 288 struct rtas_error_log *h, *errhdr = NULL;
289 289
290 /* Mask top two bits */
291 regs->gpr[3] &= ~(0x3UL << 62);
292
290 if (!VALID_FWNMI_BUFFER(regs->gpr[3])) { 293 if (!VALID_FWNMI_BUFFER(regs->gpr[3])) {
291 printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]); 294 printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]);
292 return NULL; 295 return NULL;
diff --git a/arch/sh/configs/sh03_defconfig b/arch/sh/configs/sh03_defconfig
index 2051821724c6..0cf4097b71e8 100644
--- a/arch/sh/configs/sh03_defconfig
+++ b/arch/sh/configs/sh03_defconfig
@@ -22,7 +22,7 @@ CONFIG_PREEMPT=y
22CONFIG_CMDLINE_OVERWRITE=y 22CONFIG_CMDLINE_OVERWRITE=y
23CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs" 23CONFIG_CMDLINE="console=ttySC1,115200 mem=64M root=/dev/nfs"
24CONFIG_PCI=y 24CONFIG_PCI=y
25CONFIG_HOTPLUG_PCI=m 25CONFIG_HOTPLUG_PCI=y
26CONFIG_BINFMT_MISC=y 26CONFIG_BINFMT_MISC=y
27CONFIG_NET=y 27CONFIG_NET=y
28CONFIG_PACKET=y 28CONFIG_PACKET=y
diff --git a/arch/x86/crypto/Makefile b/arch/x86/crypto/Makefile
index 7d6ba9db1be9..6c63c358a7e6 100644
--- a/arch/x86/crypto/Makefile
+++ b/arch/x86/crypto/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_CRYPTO_SHA1_SSSE3) += sha1-ssse3.o
27obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o 27obj-$(CONFIG_CRYPTO_CRC32_PCLMUL) += crc32-pclmul.o
28obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o 28obj-$(CONFIG_CRYPTO_SHA256_SSSE3) += sha256-ssse3.o
29obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o 29obj-$(CONFIG_CRYPTO_SHA512_SSSE3) += sha512-ssse3.o
30obj-$(CONFIG_CRYPTO_CRCT10DIF_PCLMUL) += crct10dif-pclmul.o
31 30
32# These modules require assembler to support AVX. 31# These modules require assembler to support AVX.
33ifeq ($(avx_supported),yes) 32ifeq ($(avx_supported),yes)
@@ -82,4 +81,3 @@ crc32c-intel-$(CONFIG_64BIT) += crc32c-pcl-intel-asm_64.o
82crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o 81crc32-pclmul-y := crc32-pclmul_asm.o crc32-pclmul_glue.o
83sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o 82sha256-ssse3-y := sha256-ssse3-asm.o sha256-avx-asm.o sha256-avx2-asm.o sha256_ssse3_glue.o
84sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o 83sha512-ssse3-y := sha512-ssse3-asm.o sha512-avx-asm.o sha512-avx2-asm.o sha512_ssse3_glue.o
85crct10dif-pclmul-y := crct10dif-pcl-asm_64.o crct10dif-pclmul_glue.o
diff --git a/arch/x86/crypto/crct10dif-pcl-asm_64.S b/arch/x86/crypto/crct10dif-pcl-asm_64.S
deleted file mode 100644
index 35e97569d05f..000000000000
--- a/arch/x86/crypto/crct10dif-pcl-asm_64.S
+++ /dev/null
@@ -1,643 +0,0 @@
1########################################################################
2# Implement fast CRC-T10DIF computation with SSE and PCLMULQDQ instructions
3#
4# Copyright (c) 2013, Intel Corporation
5#
6# Authors:
7# Erdinc Ozturk <erdinc.ozturk@intel.com>
8# Vinodh Gopal <vinodh.gopal@intel.com>
9# James Guilford <james.guilford@intel.com>
10# Tim Chen <tim.c.chen@linux.intel.com>
11#
12# This software is available to you under a choice of one of two
13# licenses. You may choose to be licensed under the terms of the GNU
14# General Public License (GPL) Version 2, available from the file
15# COPYING in the main directory of this source tree, or the
16# OpenIB.org BSD license below:
17#
18# Redistribution and use in source and binary forms, with or without
19# modification, are permitted provided that the following conditions are
20# met:
21#
22# * Redistributions of source code must retain the above copyright
23# notice, this list of conditions and the following disclaimer.
24#
25# * Redistributions in binary form must reproduce the above copyright
26# notice, this list of conditions and the following disclaimer in the
27# documentation and/or other materials provided with the
28# distribution.
29#
30# * Neither the name of the Intel Corporation nor the names of its
31# contributors may be used to endorse or promote products derived from
32# this software without specific prior written permission.
33#
34#
35# THIS SOFTWARE IS PROVIDED BY INTEL CORPORATION ""AS IS"" AND ANY
36# EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
37# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
38# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL CORPORATION OR
39# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
40# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
41# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
42# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
43# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
44# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
45# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46########################################################################
47# Function API:
48# UINT16 crc_t10dif_pcl(
49# UINT16 init_crc, //initial CRC value, 16 bits
50# const unsigned char *buf, //buffer pointer to calculate CRC on
51# UINT64 len //buffer length in bytes (64-bit data)
52# );
53#
54# Reference paper titled "Fast CRC Computation for Generic
55# Polynomials Using PCLMULQDQ Instruction"
56# URL: http://www.intel.com/content/dam/www/public/us/en/documents
57# /white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
58#
59#
60
61#include <linux/linkage.h>
62
63.text
64
65#define arg1 %rdi
66#define arg2 %rsi
67#define arg3 %rdx
68
69#define arg1_low32 %edi
70
71ENTRY(crc_t10dif_pcl)
72.align 16
73
74 # adjust the 16-bit initial_crc value, scale it to 32 bits
75 shl $16, arg1_low32
76
77 # Allocate Stack Space
78 mov %rsp, %rcx
79 sub $16*2, %rsp
80 # align stack to 16 byte boundary
81 and $~(0x10 - 1), %rsp
82
83 # check if smaller than 256
84 cmp $256, arg3
85
86 # for sizes less than 128, we can't fold 64B at a time...
87 jl _less_than_128
88
89
90 # load the initial crc value
91 movd arg1_low32, %xmm10 # initial crc
92
93 # crc value does not need to be byte-reflected, but it needs
94 # to be moved to the high part of the register.
95 # because data will be byte-reflected and will align with
96 # initial crc at correct place.
97 pslldq $12, %xmm10
98
99 movdqa SHUF_MASK(%rip), %xmm11
100 # receive the initial 64B data, xor the initial crc value
101 movdqu 16*0(arg2), %xmm0
102 movdqu 16*1(arg2), %xmm1
103 movdqu 16*2(arg2), %xmm2
104 movdqu 16*3(arg2), %xmm3
105 movdqu 16*4(arg2), %xmm4
106 movdqu 16*5(arg2), %xmm5
107 movdqu 16*6(arg2), %xmm6
108 movdqu 16*7(arg2), %xmm7
109
110 pshufb %xmm11, %xmm0
111 # XOR the initial_crc value
112 pxor %xmm10, %xmm0
113 pshufb %xmm11, %xmm1
114 pshufb %xmm11, %xmm2
115 pshufb %xmm11, %xmm3
116 pshufb %xmm11, %xmm4
117 pshufb %xmm11, %xmm5
118 pshufb %xmm11, %xmm6
119 pshufb %xmm11, %xmm7
120
121 movdqa rk3(%rip), %xmm10 #xmm10 has rk3 and rk4
122 #imm value of pclmulqdq instruction
123 #will determine which constant to use
124
125 #################################################################
126 # we subtract 256 instead of 128 to save one instruction from the loop
127 sub $256, arg3
128
129 # at this section of the code, there is 64*x+y (0<=y<64) bytes of
130 # buffer. The _fold_64_B_loop will fold 64B at a time
131 # until we have 64+y Bytes of buffer
132
133
134 # fold 64B at a time. This section of the code folds 4 xmm
135 # registers in parallel
136_fold_64_B_loop:
137
138 # update the buffer pointer
139 add $128, arg2 # buf += 64#
140
141 movdqu 16*0(arg2), %xmm9
142 movdqu 16*1(arg2), %xmm12
143 pshufb %xmm11, %xmm9
144 pshufb %xmm11, %xmm12
145 movdqa %xmm0, %xmm8
146 movdqa %xmm1, %xmm13
147 pclmulqdq $0x0 , %xmm10, %xmm0
148 pclmulqdq $0x11, %xmm10, %xmm8
149 pclmulqdq $0x0 , %xmm10, %xmm1
150 pclmulqdq $0x11, %xmm10, %xmm13
151 pxor %xmm9 , %xmm0
152 xorps %xmm8 , %xmm0
153 pxor %xmm12, %xmm1
154 xorps %xmm13, %xmm1
155
156 movdqu 16*2(arg2), %xmm9
157 movdqu 16*3(arg2), %xmm12
158 pshufb %xmm11, %xmm9
159 pshufb %xmm11, %xmm12
160 movdqa %xmm2, %xmm8
161 movdqa %xmm3, %xmm13
162 pclmulqdq $0x0, %xmm10, %xmm2
163 pclmulqdq $0x11, %xmm10, %xmm8
164 pclmulqdq $0x0, %xmm10, %xmm3
165 pclmulqdq $0x11, %xmm10, %xmm13
166 pxor %xmm9 , %xmm2
167 xorps %xmm8 , %xmm2
168 pxor %xmm12, %xmm3
169 xorps %xmm13, %xmm3
170
171 movdqu 16*4(arg2), %xmm9
172 movdqu 16*5(arg2), %xmm12
173 pshufb %xmm11, %xmm9
174 pshufb %xmm11, %xmm12
175 movdqa %xmm4, %xmm8
176 movdqa %xmm5, %xmm13
177 pclmulqdq $0x0, %xmm10, %xmm4
178 pclmulqdq $0x11, %xmm10, %xmm8
179 pclmulqdq $0x0, %xmm10, %xmm5
180 pclmulqdq $0x11, %xmm10, %xmm13
181 pxor %xmm9 , %xmm4
182 xorps %xmm8 , %xmm4
183 pxor %xmm12, %xmm5
184 xorps %xmm13, %xmm5
185
186 movdqu 16*6(arg2), %xmm9
187 movdqu 16*7(arg2), %xmm12
188 pshufb %xmm11, %xmm9
189 pshufb %xmm11, %xmm12
190 movdqa %xmm6 , %xmm8
191 movdqa %xmm7 , %xmm13
192 pclmulqdq $0x0 , %xmm10, %xmm6
193 pclmulqdq $0x11, %xmm10, %xmm8
194 pclmulqdq $0x0 , %xmm10, %xmm7
195 pclmulqdq $0x11, %xmm10, %xmm13
196 pxor %xmm9 , %xmm6
197 xorps %xmm8 , %xmm6
198 pxor %xmm12, %xmm7
199 xorps %xmm13, %xmm7
200
201 sub $128, arg3
202
203 # check if there is another 64B in the buffer to be able to fold
204 jge _fold_64_B_loop
205 ##################################################################
206
207
208 add $128, arg2
209 # at this point, the buffer pointer is pointing at the last y Bytes
210 # of the buffer the 64B of folded data is in 4 of the xmm
211 # registers: xmm0, xmm1, xmm2, xmm3
212
213
214 # fold the 8 xmm registers to 1 xmm register with different constants
215
216 movdqa rk9(%rip), %xmm10
217 movdqa %xmm0, %xmm8
218 pclmulqdq $0x11, %xmm10, %xmm0
219 pclmulqdq $0x0 , %xmm10, %xmm8
220 pxor %xmm8, %xmm7
221 xorps %xmm0, %xmm7
222
223 movdqa rk11(%rip), %xmm10
224 movdqa %xmm1, %xmm8
225 pclmulqdq $0x11, %xmm10, %xmm1
226 pclmulqdq $0x0 , %xmm10, %xmm8
227 pxor %xmm8, %xmm7
228 xorps %xmm1, %xmm7
229
230 movdqa rk13(%rip), %xmm10
231 movdqa %xmm2, %xmm8
232 pclmulqdq $0x11, %xmm10, %xmm2
233 pclmulqdq $0x0 , %xmm10, %xmm8
234 pxor %xmm8, %xmm7
235 pxor %xmm2, %xmm7
236
237 movdqa rk15(%rip), %xmm10
238 movdqa %xmm3, %xmm8
239 pclmulqdq $0x11, %xmm10, %xmm3
240 pclmulqdq $0x0 , %xmm10, %xmm8
241 pxor %xmm8, %xmm7
242 xorps %xmm3, %xmm7
243
244 movdqa rk17(%rip), %xmm10
245 movdqa %xmm4, %xmm8
246 pclmulqdq $0x11, %xmm10, %xmm4
247 pclmulqdq $0x0 , %xmm10, %xmm8
248 pxor %xmm8, %xmm7
249 pxor %xmm4, %xmm7
250
251 movdqa rk19(%rip), %xmm10
252 movdqa %xmm5, %xmm8
253 pclmulqdq $0x11, %xmm10, %xmm5
254 pclmulqdq $0x0 , %xmm10, %xmm8
255 pxor %xmm8, %xmm7
256 xorps %xmm5, %xmm7
257
258 movdqa rk1(%rip), %xmm10 #xmm10 has rk1 and rk2
259 #imm value of pclmulqdq instruction
260 #will determine which constant to use
261 movdqa %xmm6, %xmm8
262 pclmulqdq $0x11, %xmm10, %xmm6
263 pclmulqdq $0x0 , %xmm10, %xmm8
264 pxor %xmm8, %xmm7
265 pxor %xmm6, %xmm7
266
267
268 # instead of 64, we add 48 to the loop counter to save 1 instruction
269 # from the loop instead of a cmp instruction, we use the negative
270 # flag with the jl instruction
271 add $128-16, arg3
272 jl _final_reduction_for_128
273
274 # now we have 16+y bytes left to reduce. 16 Bytes is in register xmm7
275 # and the rest is in memory. We can fold 16 bytes at a time if y>=16
276 # continue folding 16B at a time
277
278_16B_reduction_loop:
279 movdqa %xmm7, %xmm8
280 pclmulqdq $0x11, %xmm10, %xmm7
281 pclmulqdq $0x0 , %xmm10, %xmm8
282 pxor %xmm8, %xmm7
283 movdqu (arg2), %xmm0
284 pshufb %xmm11, %xmm0
285 pxor %xmm0 , %xmm7
286 add $16, arg2
287 sub $16, arg3
288 # instead of a cmp instruction, we utilize the flags with the
289 # jge instruction equivalent of: cmp arg3, 16-16
290 # check if there is any more 16B in the buffer to be able to fold
291 jge _16B_reduction_loop
292
293 #now we have 16+z bytes left to reduce, where 0<= z < 16.
294 #first, we reduce the data in the xmm7 register
295
296
297_final_reduction_for_128:
298 # check if any more data to fold. If not, compute the CRC of
299 # the final 128 bits
300 add $16, arg3
301 je _128_done
302
303 # here we are getting data that is less than 16 bytes.
304 # since we know that there was data before the pointer, we can
305 # offset the input pointer before the actual point, to receive
306 # exactly 16 bytes. after that the registers need to be adjusted.
307_get_last_two_xmms:
308 movdqa %xmm7, %xmm2
309
310 movdqu -16(arg2, arg3), %xmm1
311 pshufb %xmm11, %xmm1
312
313 # get rid of the extra data that was loaded before
314 # load the shift constant
315 lea pshufb_shf_table+16(%rip), %rax
316 sub arg3, %rax
317 movdqu (%rax), %xmm0
318
319 # shift xmm2 to the left by arg3 bytes
320 pshufb %xmm0, %xmm2
321
322 # shift xmm7 to the right by 16-arg3 bytes
323 pxor mask1(%rip), %xmm0
324 pshufb %xmm0, %xmm7
325 pblendvb %xmm2, %xmm1 #xmm0 is implicit
326
327 # fold 16 Bytes
328 movdqa %xmm1, %xmm2
329 movdqa %xmm7, %xmm8
330 pclmulqdq $0x11, %xmm10, %xmm7
331 pclmulqdq $0x0 , %xmm10, %xmm8
332 pxor %xmm8, %xmm7
333 pxor %xmm2, %xmm7
334
335_128_done:
336 # compute crc of a 128-bit value
337 movdqa rk5(%rip), %xmm10 # rk5 and rk6 in xmm10
338 movdqa %xmm7, %xmm0
339
340 #64b fold
341 pclmulqdq $0x1, %xmm10, %xmm7
342 pslldq $8 , %xmm0
343 pxor %xmm0, %xmm7
344
345 #32b fold
346 movdqa %xmm7, %xmm0
347
348 pand mask2(%rip), %xmm0
349
350 psrldq $12, %xmm7
351 pclmulqdq $0x10, %xmm10, %xmm7
352 pxor %xmm0, %xmm7
353
354 #barrett reduction
355_barrett:
356 movdqa rk7(%rip), %xmm10 # rk7 and rk8 in xmm10
357 movdqa %xmm7, %xmm0
358 pclmulqdq $0x01, %xmm10, %xmm7
359 pslldq $4, %xmm7
360 pclmulqdq $0x11, %xmm10, %xmm7
361
362 pslldq $4, %xmm7
363 pxor %xmm0, %xmm7
364 pextrd $1, %xmm7, %eax
365
366_cleanup:
367 # scale the result back to 16 bits
368 shr $16, %eax
369 mov %rcx, %rsp
370 ret
371
372########################################################################
373
374.align 16
375_less_than_128:
376
377 # check if there is enough buffer to be able to fold 16B at a time
378 cmp $32, arg3
379 jl _less_than_32
380 movdqa SHUF_MASK(%rip), %xmm11
381
382 # now if there is, load the constants
383 movdqa rk1(%rip), %xmm10 # rk1 and rk2 in xmm10
384
385 movd arg1_low32, %xmm0 # get the initial crc value
386 pslldq $12, %xmm0 # align it to its correct place
387 movdqu (arg2), %xmm7 # load the plaintext
388 pshufb %xmm11, %xmm7 # byte-reflect the plaintext
389 pxor %xmm0, %xmm7
390
391
392 # update the buffer pointer
393 add $16, arg2
394
395 # update the counter. subtract 32 instead of 16 to save one
396 # instruction from the loop
397 sub $32, arg3
398
399 jmp _16B_reduction_loop
400
401
402.align 16
403_less_than_32:
404 # mov initial crc to the return value. this is necessary for
405 # zero-length buffers.
406 mov arg1_low32, %eax
407 test arg3, arg3
408 je _cleanup
409
410 movdqa SHUF_MASK(%rip), %xmm11
411
412 movd arg1_low32, %xmm0 # get the initial crc value
413 pslldq $12, %xmm0 # align it to its correct place
414
415 cmp $16, arg3
416 je _exact_16_left
417 jl _less_than_16_left
418
419 movdqu (arg2), %xmm7 # load the plaintext
420 pshufb %xmm11, %xmm7 # byte-reflect the plaintext
421 pxor %xmm0 , %xmm7 # xor the initial crc value
422 add $16, arg2
423 sub $16, arg3
424 movdqa rk1(%rip), %xmm10 # rk1 and rk2 in xmm10
425 jmp _get_last_two_xmms
426
427
428.align 16
429_less_than_16_left:
430 # use stack space to load data less than 16 bytes, zero-out
431 # the 16B in memory first.
432
433 pxor %xmm1, %xmm1
434 mov %rsp, %r11
435 movdqa %xmm1, (%r11)
436
437 cmp $4, arg3
438 jl _only_less_than_4
439
440 # backup the counter value
441 mov arg3, %r9
442 cmp $8, arg3
443 jl _less_than_8_left
444
445 # load 8 Bytes
446 mov (arg2), %rax
447 mov %rax, (%r11)
448 add $8, %r11
449 sub $8, arg3
450 add $8, arg2
451_less_than_8_left:
452
453 cmp $4, arg3
454 jl _less_than_4_left
455
456 # load 4 Bytes
457 mov (arg2), %eax
458 mov %eax, (%r11)
459 add $4, %r11
460 sub $4, arg3
461 add $4, arg2
462_less_than_4_left:
463
464 cmp $2, arg3
465 jl _less_than_2_left
466
467 # load 2 Bytes
468 mov (arg2), %ax
469 mov %ax, (%r11)
470 add $2, %r11
471 sub $2, arg3
472 add $2, arg2
473_less_than_2_left:
474 cmp $1, arg3
475 jl _zero_left
476
477 # load 1 Byte
478 mov (arg2), %al
479 mov %al, (%r11)
480_zero_left:
481 movdqa (%rsp), %xmm7
482 pshufb %xmm11, %xmm7
483 pxor %xmm0 , %xmm7 # xor the initial crc value
484
485 # shl r9, 4
486 lea pshufb_shf_table+16(%rip), %rax
487 sub %r9, %rax
488 movdqu (%rax), %xmm0
489 pxor mask1(%rip), %xmm0
490
491 pshufb %xmm0, %xmm7
492 jmp _128_done
493
494.align 16
495_exact_16_left:
496 movdqu (arg2), %xmm7
497 pshufb %xmm11, %xmm7
498 pxor %xmm0 , %xmm7 # xor the initial crc value
499
500 jmp _128_done
501
502_only_less_than_4:
503 cmp $3, arg3
504 jl _only_less_than_3
505
506 # load 3 Bytes
507 mov (arg2), %al
508 mov %al, (%r11)
509
510 mov 1(arg2), %al
511 mov %al, 1(%r11)
512
513 mov 2(arg2), %al
514 mov %al, 2(%r11)
515
516 movdqa (%rsp), %xmm7
517 pshufb %xmm11, %xmm7
518 pxor %xmm0 , %xmm7 # xor the initial crc value
519
520 psrldq $5, %xmm7
521
522 jmp _barrett
523_only_less_than_3:
524 cmp $2, arg3
525 jl _only_less_than_2
526
527 # load 2 Bytes
528 mov (arg2), %al
529 mov %al, (%r11)
530
531 mov 1(arg2), %al
532 mov %al, 1(%r11)
533
534 movdqa (%rsp), %xmm7
535 pshufb %xmm11, %xmm7
536 pxor %xmm0 , %xmm7 # xor the initial crc value
537
538 psrldq $6, %xmm7
539
540 jmp _barrett
541_only_less_than_2:
542
543 # load 1 Byte
544 mov (arg2), %al
545 mov %al, (%r11)
546
547 movdqa (%rsp), %xmm7
548 pshufb %xmm11, %xmm7
549 pxor %xmm0 , %xmm7 # xor the initial crc value
550
551 psrldq $7, %xmm7
552
553 jmp _barrett
554
555ENDPROC(crc_t10dif_pcl)
556
557.data
558
559# precomputed constants
560# these constants are precomputed from the poly:
561# 0x8bb70000 (0x8bb7 scaled to 32 bits)
562.align 16
563# Q = 0x18BB70000
564# rk1 = 2^(32*3) mod Q << 32
565# rk2 = 2^(32*5) mod Q << 32
566# rk3 = 2^(32*15) mod Q << 32
567# rk4 = 2^(32*17) mod Q << 32
568# rk5 = 2^(32*3) mod Q << 32
569# rk6 = 2^(32*2) mod Q << 32
570# rk7 = floor(2^64/Q)
571# rk8 = Q
572rk1:
573.quad 0x2d56000000000000
574rk2:
575.quad 0x06df000000000000
576rk3:
577.quad 0x9d9d000000000000
578rk4:
579.quad 0x7cf5000000000000
580rk5:
581.quad 0x2d56000000000000
582rk6:
583.quad 0x1368000000000000
584rk7:
585.quad 0x00000001f65a57f8
586rk8:
587.quad 0x000000018bb70000
588
589rk9:
590.quad 0xceae000000000000
591rk10:
592.quad 0xbfd6000000000000
593rk11:
594.quad 0x1e16000000000000
595rk12:
596.quad 0x713c000000000000
597rk13:
598.quad 0xf7f9000000000000
599rk14:
600.quad 0x80a6000000000000
601rk15:
602.quad 0x044c000000000000
603rk16:
604.quad 0xe658000000000000
605rk17:
606.quad 0xad18000000000000
607rk18:
608.quad 0xa497000000000000
609rk19:
610.quad 0x6ee3000000000000
611rk20:
612.quad 0xe7b5000000000000
613
614
615
616mask1:
617.octa 0x80808080808080808080808080808080
618mask2:
619.octa 0x00000000FFFFFFFFFFFFFFFFFFFFFFFF
620
621SHUF_MASK:
622.octa 0x000102030405060708090A0B0C0D0E0F
623
624pshufb_shf_table:
625# use these values for shift constants for the pshufb instruction
626# different alignments result in values as shown:
627# DDQ 0x008f8e8d8c8b8a898887868584838281 # shl 15 (16-1) / shr1
628# DDQ 0x01008f8e8d8c8b8a8988878685848382 # shl 14 (16-3) / shr2
629# DDQ 0x0201008f8e8d8c8b8a89888786858483 # shl 13 (16-4) / shr3
630# DDQ 0x030201008f8e8d8c8b8a898887868584 # shl 12 (16-4) / shr4
631# DDQ 0x04030201008f8e8d8c8b8a8988878685 # shl 11 (16-5) / shr5
632# DDQ 0x0504030201008f8e8d8c8b8a89888786 # shl 10 (16-6) / shr6
633# DDQ 0x060504030201008f8e8d8c8b8a898887 # shl 9 (16-7) / shr7
634# DDQ 0x07060504030201008f8e8d8c8b8a8988 # shl 8 (16-8) / shr8
635# DDQ 0x0807060504030201008f8e8d8c8b8a89 # shl 7 (16-9) / shr9
636# DDQ 0x090807060504030201008f8e8d8c8b8a # shl 6 (16-10) / shr10
637# DDQ 0x0a090807060504030201008f8e8d8c8b # shl 5 (16-11) / shr11
638# DDQ 0x0b0a090807060504030201008f8e8d8c # shl 4 (16-12) / shr12
639# DDQ 0x0c0b0a090807060504030201008f8e8d # shl 3 (16-13) / shr13
640# DDQ 0x0d0c0b0a090807060504030201008f8e # shl 2 (16-14) / shr14
641# DDQ 0x0e0d0c0b0a090807060504030201008f # shl 1 (16-15) / shr15
642.octa 0x8f8e8d8c8b8a89888786858483828100
643.octa 0x000e0d0c0b0a09080706050403020100
diff --git a/arch/x86/crypto/crct10dif-pclmul_glue.c b/arch/x86/crypto/crct10dif-pclmul_glue.c
deleted file mode 100644
index 7845d7fd54c0..000000000000
--- a/arch/x86/crypto/crct10dif-pclmul_glue.c
+++ /dev/null
@@ -1,151 +0,0 @@
1/*
2 * Cryptographic API.
3 *
4 * T10 Data Integrity Field CRC16 Crypto Transform using PCLMULQDQ Instructions
5 *
6 * Copyright (C) 2013 Intel Corporation
7 * Author: Tim Chen <tim.c.chen@linux.intel.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the Free
11 * Software Foundation; either version 2 of the License, or (at your option)
12 * any later version.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 */
24
25#include <linux/types.h>
26#include <linux/module.h>
27#include <linux/crc-t10dif.h>
28#include <crypto/internal/hash.h>
29#include <linux/init.h>
30#include <linux/string.h>
31#include <linux/kernel.h>
32#include <asm/i387.h>
33#include <asm/cpufeature.h>
34#include <asm/cpu_device_id.h>
35
36asmlinkage __u16 crc_t10dif_pcl(__u16 crc, const unsigned char *buf,
37 size_t len);
38
39struct chksum_desc_ctx {
40 __u16 crc;
41};
42
43/*
44 * Steps through buffer one byte at at time, calculates reflected
45 * crc using table.
46 */
47
48static int chksum_init(struct shash_desc *desc)
49{
50 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
51
52 ctx->crc = 0;
53
54 return 0;
55}
56
57static int chksum_update(struct shash_desc *desc, const u8 *data,
58 unsigned int length)
59{
60 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
61
62 if (irq_fpu_usable()) {
63 kernel_fpu_begin();
64 ctx->crc = crc_t10dif_pcl(ctx->crc, data, length);
65 kernel_fpu_end();
66 } else
67 ctx->crc = crc_t10dif_generic(ctx->crc, data, length);
68 return 0;
69}
70
71static int chksum_final(struct shash_desc *desc, u8 *out)
72{
73 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
74
75 *(__u16 *)out = ctx->crc;
76 return 0;
77}
78
79static int __chksum_finup(__u16 *crcp, const u8 *data, unsigned int len,
80 u8 *out)
81{
82 if (irq_fpu_usable()) {
83 kernel_fpu_begin();
84 *(__u16 *)out = crc_t10dif_pcl(*crcp, data, len);
85 kernel_fpu_end();
86 } else
87 *(__u16 *)out = crc_t10dif_generic(*crcp, data, len);
88 return 0;
89}
90
91static int chksum_finup(struct shash_desc *desc, const u8 *data,
92 unsigned int len, u8 *out)
93{
94 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
95
96 return __chksum_finup(&ctx->crc, data, len, out);
97}
98
99static int chksum_digest(struct shash_desc *desc, const u8 *data,
100 unsigned int length, u8 *out)
101{
102 struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
103
104 return __chksum_finup(&ctx->crc, data, length, out);
105}
106
107static struct shash_alg alg = {
108 .digestsize = CRC_T10DIF_DIGEST_SIZE,
109 .init = chksum_init,
110 .update = chksum_update,
111 .final = chksum_final,
112 .finup = chksum_finup,
113 .digest = chksum_digest,
114 .descsize = sizeof(struct chksum_desc_ctx),
115 .base = {
116 .cra_name = "crct10dif",
117 .cra_driver_name = "crct10dif-pclmul",
118 .cra_priority = 200,
119 .cra_blocksize = CRC_T10DIF_BLOCK_SIZE,
120 .cra_module = THIS_MODULE,
121 }
122};
123
124static const struct x86_cpu_id crct10dif_cpu_id[] = {
125 X86_FEATURE_MATCH(X86_FEATURE_PCLMULQDQ),
126 {}
127};
128MODULE_DEVICE_TABLE(x86cpu, crct10dif_cpu_id);
129
130static int __init crct10dif_intel_mod_init(void)
131{
132 if (!x86_match_cpu(crct10dif_cpu_id))
133 return -ENODEV;
134
135 return crypto_register_shash(&alg);
136}
137
138static void __exit crct10dif_intel_mod_fini(void)
139{
140 crypto_unregister_shash(&alg);
141}
142
143module_init(crct10dif_intel_mod_init);
144module_exit(crct10dif_intel_mod_fini);
145
146MODULE_AUTHOR("Tim Chen <tim.c.chen@linux.intel.com>");
147MODULE_DESCRIPTION("T10 DIF CRC calculation accelerated with PCLMULQDQ.");
148MODULE_LICENSE("GPL");
149
150MODULE_ALIAS("crct10dif");
151MODULE_ALIAS("crct10dif-pclmul");
diff --git a/arch/x86/kernel/cpu/mcheck/mce-severity.c b/arch/x86/kernel/cpu/mcheck/mce-severity.c
index e2703520d120..c370e1c4468b 100644
--- a/arch/x86/kernel/cpu/mcheck/mce-severity.c
+++ b/arch/x86/kernel/cpu/mcheck/mce-severity.c
@@ -111,8 +111,8 @@ static struct severity {
111#ifdef CONFIG_MEMORY_FAILURE 111#ifdef CONFIG_MEMORY_FAILURE
112 MCESEV( 112 MCESEV(
113 KEEP, "Action required but unaffected thread is continuable", 113 KEEP, "Action required but unaffected thread is continuable",
114 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR), 114 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
115 MCGMASK(MCG_STATUS_RIPV, MCG_STATUS_RIPV) 115 MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
116 ), 116 ),
117 MCESEV( 117 MCESEV(
118 AR, "Action required: data load error in a user process", 118 AR, "Action required: data load error in a user process",
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index 643b8b5eee86..8244f5ec2f4c 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -12,6 +12,7 @@
12#include <linux/kernel.h> 12#include <linux/kernel.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/reboot.h>
15#include <linux/serial_reg.h> 16#include <linux/serial_reg.h>
16#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
17#include <linux/reboot.h> 18#include <linux/reboot.h>