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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 01:40:03 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 01:40:03 -0500
commit8a5dc585d50015af9c079ae2d182dc4c1cd22914 (patch)
tree7544d20587e589bf20c526a5f83205e113cc3e58 /arch
parenteeab517b68beb9e044e869bee18e3bdfa60e5aca (diff)
parent9da8312048edcf246ac1d7ab6aa0293f252de559 (diff)
Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "Main pin control pull request for the v3.13 cycle. The changes hitting arch/blackfin are ACKed by the Blackfin maintainer, and the device tree bindings are ACKed to the extent possible by someone from the device tree maintainers group. - Blackfin ADI pin control driver, we move yet another architecture under this subsystem umbrella. - Incremental updates to the Renesas Super-H PFC pin control driver. New subdriver for the r8a7791 SoC. - Non-linear GPIO ranges from the gpiolib side of things, this enabled simplified device tree bindings by referring entire groups of pins on some pin controller to act as back-end for a certain GPIO-chip driver. - Add the Abilis TB10x pin control driver used on the ARC architecture. Also the corresponding GPIO driver is merged through this tree, so the ARC has full support for pins and GPIOs after this. - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller instances. The i.MX1 and i.MX27 is an entirely new family (silicon) of controllers whereas i.MX50 is a variant of the previous supported controller. - Then the usual slew of fixes, cleanups and incremental updates" The ARC DT changes are apparently still pending, that hopefully gets sorted out in a timely manner. * tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: imx50: add pinctrl support code for the IMX50 SoC pinctrl: at91: copy define to driver pinctrl: remove minor dead code pinctrl: imx: fix using pin->input_val wrongly pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe() gpio: tb10x: fix return value check in tb10x_gpio_probe() gpio: tb10x: use module_platform_driver to simplify the code pinctrl: imx27: imx27 pincontrol driver pinctrl: imx1 core driver pinctrl: sh-pfc: r8a7791 PFC support sh-pfc: r8a7778: Add CAN pin groups gpio: add TB10x GPIO driver pinctrl: at91: correct a few typos pinctrl: mvebu: remove redundant of_match_ptr pinctrl: tb10x: use module_platform_driver to simplify the code pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe() pinctrl: add documentation for pinctrl_get_group_pins() pinctrl: rockchip: emulate both edge triggered interrupts pinctrl: rockchip: add rk3188 specifics pinctrl: rockchip: remove redundant check ...
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/atlas6.dtsi12
-rw-r--r--arch/arm/boot/dts/prima2.dtsi42
-rw-r--r--arch/blackfin/Kconfig11
-rw-r--r--arch/blackfin/include/asm/gpio.h157
-rw-r--r--arch/blackfin/include/asm/portmux.h19
-rw-r--r--arch/blackfin/kernel/Makefile3
-rw-r--r--arch/blackfin/mach-bf548/include/mach/portmux.h2
-rw-r--r--arch/blackfin/mach-bf609/include/mach/portmux.h2
8 files changed, 104 insertions, 144 deletions
diff --git a/arch/arm/boot/dts/atlas6.dtsi b/arch/arm/boot/dts/atlas6.dtsi
index a49032c6e199..978bab4991df 100644
--- a/arch/arm/boot/dts/atlas6.dtsi
+++ b/arch/arm/boot/dts/atlas6.dtsi
@@ -558,6 +558,18 @@
558 sirf,function = "usb1_utmi_drvbus"; 558 sirf,function = "usb1_utmi_drvbus";
559 }; 559 };
560 }; 560 };
561 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
562 usb1_dp_dn {
563 sirf,pins = "usb1_dp_dngrp";
564 sirf,function = "usb1_dp_dn";
565 };
566 };
567 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
568 uart1_route_io_usb1 {
569 sirf,pins = "uart1_route_io_usb1grp";
570 sirf,function = "uart1_route_io_usb1";
571 };
572 };
561 warm_rst_pins_a: warm_rst@0 { 573 warm_rst_pins_a: warm_rst@0 {
562 warm_rst { 574 warm_rst {
563 sirf,pins = "warm_rstgrp"; 575 sirf,pins = "warm_rstgrp";
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 7cf78afee7b1..daee58944e15 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -388,6 +388,12 @@
388 sirf,function = "uart0"; 388 sirf,function = "uart0";
389 }; 389 };
390 }; 390 };
391 uart0_noflow_pins_a: uart0@1 {
392 uart {
393 sirf,pins = "uart0_nostreamctrlgrp";
394 sirf,function = "uart0_nostreamctrl";
395 };
396 };
391 uart1_pins_a: uart1@0 { 397 uart1_pins_a: uart1@0 {
392 uart { 398 uart {
393 sirf,pins = "uart1grp"; 399 sirf,pins = "uart1grp";
@@ -526,18 +532,42 @@
526 sirf,function = "usp0"; 532 sirf,function = "usp0";
527 }; 533 };
528 }; 534 };
535 usp0_uart_nostreamctrl_pins_a: usp0@1 {
536 usp0 {
537 sirf,pins =
538 "usp0_uart_nostreamctrl_grp";
539 sirf,function =
540 "usp0_uart_nostreamctrl";
541 };
542 };
529 usp1_pins_a: usp1@0 { 543 usp1_pins_a: usp1@0 {
530 usp1 { 544 usp1 {
531 sirf,pins = "usp1grp"; 545 sirf,pins = "usp1grp";
532 sirf,function = "usp1"; 546 sirf,function = "usp1";
533 }; 547 };
534 }; 548 };
549 usp1_uart_nostreamctrl_pins_a: usp1@1 {
550 usp1 {
551 sirf,pins =
552 "usp1_uart_nostreamctrl_grp";
553 sirf,function =
554 "usp1_uart_nostreamctrl";
555 };
556 };
535 usp2_pins_a: usp2@0 { 557 usp2_pins_a: usp2@0 {
536 usp2 { 558 usp2 {
537 sirf,pins = "usp2grp"; 559 sirf,pins = "usp2grp";
538 sirf,function = "usp2"; 560 sirf,function = "usp2";
539 }; 561 };
540 }; 562 };
563 usp2_uart_nostreamctrl_pins_a: usp2@1 {
564 usp2 {
565 sirf,pins =
566 "usp2_uart_nostreamctrl_grp";
567 sirf,function =
568 "usp2_uart_nostreamctrl";
569 };
570 };
541 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 { 571 usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
542 usb0_utmi_drvbus { 572 usb0_utmi_drvbus {
543 sirf,pins = "usb0_utmi_drvbusgrp"; 573 sirf,pins = "usb0_utmi_drvbusgrp";
@@ -550,6 +580,18 @@
550 sirf,function = "usb1_utmi_drvbus"; 580 sirf,function = "usb1_utmi_drvbus";
551 }; 581 };
552 }; 582 };
583 usb1_dp_dn_pins_a: usb1_dp_dn@0 {
584 usb1_dp_dn {
585 sirf,pins = "usb1_dp_dngrp";
586 sirf,function = "usb1_dp_dn";
587 };
588 };
589 uart1_route_io_usb1_pins_a: uart1_route_io_usb1@0 {
590 uart1_route_io_usb1 {
591 sirf,pins = "uart1_route_io_usb1grp";
592 sirf,function = "uart1_route_io_usb1";
593 };
594 };
553 warm_rst_pins_a: warm_rst@0 { 595 warm_rst_pins_a: warm_rst@0 {
554 warm_rst { 596 warm_rst {
555 sirf,pins = "warm_rstgrp"; 597 sirf,pins = "warm_rstgrp";
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index f78c9a2c7e28..74314bd8be39 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -52,6 +52,9 @@ config GENERIC_BUG
52config ZONE_DMA 52config ZONE_DMA
53 def_bool y 53 def_bool y
54 54
55config GENERIC_GPIO
56 def_bool y
57
55config FORCE_MAX_ZONEORDER 58config FORCE_MAX_ZONEORDER
56 int 59 int
57 default "14" 60 default "14"
@@ -317,6 +320,14 @@ config BF53x
317 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537) 320 depends on (BF531 || BF532 || BF533 || BF534 || BF536 || BF537)
318 default y 321 default y
319 322
323config GPIO_ADI
324 def_bool y
325 depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
326
327config PINCTRL
328 def_bool y
329 depends on BF54x || BF60x
330
320config MEM_MT48LC64M4A2FB_7E 331config MEM_MT48LC64M4A2FB_7E
321 bool 332 bool
322 depends on (BFIN533_STAMP) 333 depends on (BFIN533_STAMP)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 98d0133346b5..99d338ca2ea4 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
@@ -25,8 +25,12 @@
25 25
26#ifndef __ASSEMBLY__ 26#ifndef __ASSEMBLY__
27 27
28#ifndef CONFIG_PINCTRL
29
28#include <linux/compiler.h> 30#include <linux/compiler.h>
29#include <linux/gpio.h> 31#include <asm/blackfin.h>
32#include <asm/portmux.h>
33#include <asm/irq_handler.h>
30 34
31/*********************************************************** 35/***********************************************************
32* 36*
@@ -45,7 +49,6 @@
45* MODIFICATION HISTORY : 49* MODIFICATION HISTORY :
46**************************************************************/ 50**************************************************************/
47 51
48#if !BFIN_GPIO_PINT
49void set_gpio_dir(unsigned, unsigned short); 52void set_gpio_dir(unsigned, unsigned short);
50void set_gpio_inen(unsigned, unsigned short); 53void set_gpio_inen(unsigned, unsigned short);
51void set_gpio_polar(unsigned, unsigned short); 54void set_gpio_polar(unsigned, unsigned short);
@@ -115,7 +118,6 @@ struct gpio_port_t {
115 unsigned short dummy16; 118 unsigned short dummy16;
116 unsigned short inen; 119 unsigned short inen;
117}; 120};
118#endif
119 121
120#ifdef BFIN_SPECIAL_GPIO_BANKS 122#ifdef BFIN_SPECIAL_GPIO_BANKS
121void bfin_special_gpio_free(unsigned gpio); 123void bfin_special_gpio_free(unsigned gpio);
@@ -127,25 +129,21 @@ void bfin_special_gpio_pm_hibernate_suspend(void);
127#endif 129#endif
128 130
129#ifdef CONFIG_PM 131#ifdef CONFIG_PM
130int bfin_pm_standby_ctrl(unsigned ctrl); 132void bfin_gpio_pm_hibernate_restore(void);
133void bfin_gpio_pm_hibernate_suspend(void);
134int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
135int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
131 136
132static inline int bfin_pm_standby_setup(void) 137static inline int bfin_pm_standby_setup(void)
133{ 138{
134 return bfin_pm_standby_ctrl(1); 139 return bfin_gpio_pm_standby_ctrl(1);
135} 140}
136 141
137static inline void bfin_pm_standby_restore(void) 142static inline void bfin_pm_standby_restore(void)
138{ 143{
139 bfin_pm_standby_ctrl(0); 144 bfin_gpio_pm_standby_ctrl(0);
140} 145}
141 146
142void bfin_gpio_pm_hibernate_restore(void);
143void bfin_gpio_pm_hibernate_suspend(void);
144void bfin_pint_suspend(void);
145void bfin_pint_resume(void);
146
147# if !BFIN_GPIO_PINT
148int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
149 147
150struct gpio_port_s { 148struct gpio_port_s {
151 unsigned short data; 149 unsigned short data;
@@ -161,7 +159,6 @@ struct gpio_port_s {
161 unsigned short reserved; 159 unsigned short reserved;
162 unsigned short mux; 160 unsigned short mux;
163}; 161};
164# endif
165#endif /*CONFIG_PM*/ 162#endif /*CONFIG_PM*/
166 163
167/*********************************************************** 164/***********************************************************
@@ -178,36 +175,29 @@ struct gpio_port_s {
178************************************************************* 175*************************************************************
179* MODIFICATION HISTORY : 176* MODIFICATION HISTORY :
180**************************************************************/ 177**************************************************************/
181
182int bfin_gpio_request(unsigned gpio, const char *label);
183void bfin_gpio_free(unsigned gpio);
184int bfin_gpio_irq_request(unsigned gpio, const char *label); 178int bfin_gpio_irq_request(unsigned gpio, const char *label);
185void bfin_gpio_irq_free(unsigned gpio); 179void bfin_gpio_irq_free(unsigned gpio);
186int bfin_gpio_direction_input(unsigned gpio); 180void bfin_gpio_irq_prepare(unsigned gpio);
187int bfin_gpio_direction_output(unsigned gpio, int value); 181
188int bfin_gpio_get_value(unsigned gpio); 182static inline int irq_to_gpio(unsigned irq)
189void bfin_gpio_set_value(unsigned gpio, int value); 183{
184 return irq - GPIO_IRQ_BASE;
185}
186#endif /* CONFIG_PINCTRL */
190 187
191#include <asm/irq.h> 188#include <asm/irq.h>
192#include <asm/errno.h> 189#include <asm/errno.h>
193 190
194#ifdef CONFIG_GPIOLIB
195#include <asm-generic/gpio.h> /* cansleep wrappers */ 191#include <asm-generic/gpio.h> /* cansleep wrappers */
196 192
197static inline int gpio_get_value(unsigned int gpio) 193static inline int gpio_get_value(unsigned int gpio)
198{ 194{
199 if (gpio < MAX_BLACKFIN_GPIOS) 195 return __gpio_get_value(gpio);
200 return bfin_gpio_get_value(gpio);
201 else
202 return __gpio_get_value(gpio);
203} 196}
204 197
205static inline void gpio_set_value(unsigned int gpio, int value) 198static inline void gpio_set_value(unsigned int gpio, int value)
206{ 199{
207 if (gpio < MAX_BLACKFIN_GPIOS) 200 __gpio_set_value(gpio, value);
208 bfin_gpio_set_value(gpio, value);
209 else
210 __gpio_set_value(gpio, value);
211} 201}
212 202
213static inline int gpio_cansleep(unsigned int gpio) 203static inline int gpio_cansleep(unsigned int gpio)
@@ -219,113 +209,6 @@ static inline int gpio_to_irq(unsigned gpio)
219{ 209{
220 return __gpio_to_irq(gpio); 210 return __gpio_to_irq(gpio);
221} 211}
222
223#else /* !CONFIG_GPIOLIB */
224
225static inline int gpio_request(unsigned gpio, const char *label)
226{
227 return bfin_gpio_request(gpio, label);
228}
229
230static inline void gpio_free(unsigned gpio)
231{
232 return bfin_gpio_free(gpio);
233}
234
235static inline int gpio_direction_input(unsigned gpio)
236{
237 return bfin_gpio_direction_input(gpio);
238}
239
240static inline int gpio_direction_output(unsigned gpio, int value)
241{
242 return bfin_gpio_direction_output(gpio, value);
243}
244
245static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
246{
247 return -EINVAL;
248}
249
250static inline int gpio_request_one(unsigned gpio, unsigned long flags, const char *label)
251{
252 int err;
253
254 err = bfin_gpio_request(gpio, label);
255 if (err)
256 return err;
257
258 if (flags & GPIOF_DIR_IN)
259 err = bfin_gpio_direction_input(gpio);
260 else
261 err = bfin_gpio_direction_output(gpio,
262 (flags & GPIOF_INIT_HIGH) ? 1 : 0);
263
264 if (err)
265 bfin_gpio_free(gpio);
266
267 return err;
268}
269
270static inline int gpio_request_array(const struct gpio *array, size_t num)
271{
272 int i, err;
273
274 for (i = 0; i < num; i++, array++) {
275 err = gpio_request_one(array->gpio, array->flags, array->label);
276 if (err)
277 goto err_free;
278 }
279 return 0;
280
281err_free:
282 while (i--)
283 bfin_gpio_free((--array)->gpio);
284 return err;
285}
286
287static inline void gpio_free_array(const struct gpio *array, size_t num)
288{
289 while (num--)
290 bfin_gpio_free((array++)->gpio);
291}
292
293static inline int __gpio_get_value(unsigned gpio)
294{
295 return bfin_gpio_get_value(gpio);
296}
297
298static inline void __gpio_set_value(unsigned gpio, int value)
299{
300 return bfin_gpio_set_value(gpio, value);
301}
302
303static inline int gpio_get_value(unsigned gpio)
304{
305 return __gpio_get_value(gpio);
306}
307
308static inline void gpio_set_value(unsigned gpio, int value)
309{
310 return __gpio_set_value(gpio, value);
311}
312
313static inline int gpio_to_irq(unsigned gpio)
314{
315 if (likely(gpio < MAX_BLACKFIN_GPIOS))
316 return gpio + GPIO_IRQ_BASE;
317
318 return -EINVAL;
319}
320
321#include <asm-generic/gpio.h> /* cansleep wrappers */
322#endif /* !CONFIG_GPIOLIB */
323
324static inline int irq_to_gpio(unsigned irq)
325{
326 return (irq - GPIO_IRQ_BASE);
327}
328
329#endif /* __ASSEMBLY__ */ 212#endif /* __ASSEMBLY__ */
330 213
331#endif /* __ARCH_BLACKFIN_GPIO_H__ */ 214#endif /* __ARCH_BLACKFIN_GPIO_H__ */
diff --git a/arch/blackfin/include/asm/portmux.h b/arch/blackfin/include/asm/portmux.h
index 9b1e2c37b324..7aa20436e799 100644
--- a/arch/blackfin/include/asm/portmux.h
+++ b/arch/blackfin/include/asm/portmux.h
@@ -17,14 +17,29 @@
17#define P_MAYSHARE 0x2000 17#define P_MAYSHARE 0x2000
18#define P_DONTCARE 0x1000 18#define P_DONTCARE 0x1000
19 19
20 20#ifdef CONFIG_PINCTRL
21#include <asm/irq_handler.h>
22
23#define gpio_pint_regs bfin_pint_regs
24#define adi_internal_set_wake bfin_internal_set_wake
25
26#define peripheral_request(per, label) 0
27#define peripheral_free(per)
28#define peripheral_request_list(per, label) \
29 (pdev ? (IS_ERR(devm_pinctrl_get_select_default(&pdev->dev)) \
30 ? -EINVAL : 0) : 0)
31#define peripheral_free_list(per)
32#else
21int peripheral_request(unsigned short per, const char *label); 33int peripheral_request(unsigned short per, const char *label);
22void peripheral_free(unsigned short per); 34void peripheral_free(unsigned short per);
23int peripheral_request_list(const unsigned short per[], const char *label); 35int peripheral_request_list(const unsigned short per[], const char *label);
24void peripheral_free_list(const unsigned short per[]); 36void peripheral_free_list(const unsigned short per[]);
37#endif
25 38
26#include <asm/gpio.h> 39#include <linux/err.h>
40#include <linux/pinctrl/pinctrl.h>
27#include <mach/portmux.h> 41#include <mach/portmux.h>
42#include <linux/gpio.h>
28 43
29#ifndef P_SPORT2_TFS 44#ifndef P_SPORT2_TFS
30#define P_SPORT2_TFS P_UNDEF 45#define P_SPORT2_TFS P_UNDEF
diff --git a/arch/blackfin/kernel/Makefile b/arch/blackfin/kernel/Makefile
index 735f24e07425..703dc7cf2ecc 100644
--- a/arch/blackfin/kernel/Makefile
+++ b/arch/blackfin/kernel/Makefile
@@ -7,7 +7,7 @@ extra-y := vmlinux.lds
7obj-y := \ 7obj-y := \
8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \ 8 entry.o process.o bfin_ksyms.o ptrace.o setup.o signal.o \
9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \ 9 sys_bfin.o traps.o irqchip.o dma-mapping.o flat.o \
10 fixed_code.o reboot.o bfin_gpio.o bfin_dma.o \ 10 fixed_code.o reboot.o bfin_dma.o \
11 exception.o dumpstack.o 11 exception.o dumpstack.o
12 12
13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y) 13ifeq ($(CONFIG_GENERIC_CLOCKEVENTS),y)
@@ -16,6 +16,7 @@ else
16 obj-y += time.o 16 obj-y += time.o
17endif 17endif
18 18
19obj-$(CONFIG_GPIO_ADI) += bfin_gpio.o
19obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o 20obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
20obj-$(CONFIG_FUNCTION_TRACER) += ftrace-entry.o 21obj-$(CONFIG_FUNCTION_TRACER) += ftrace-entry.o
21obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o 22obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o
diff --git a/arch/blackfin/mach-bf548/include/mach/portmux.h b/arch/blackfin/mach-bf548/include/mach/portmux.h
index e22246202730..d9f8632d7d09 100644
--- a/arch/blackfin/mach-bf548/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf548/include/mach/portmux.h
@@ -7,8 +7,6 @@
7#ifndef _MACH_PORTMUX_H_ 7#ifndef _MACH_PORTMUX_H_
8#define _MACH_PORTMUX_H_ 8#define _MACH_PORTMUX_H_
9 9
10#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
11
12#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0)) 10#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0))
13#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0)) 11#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0))
14#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0)) 12#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0))
diff --git a/arch/blackfin/mach-bf609/include/mach/portmux.h b/arch/blackfin/mach-bf609/include/mach/portmux.h
index 2e1a51c25098..fe34191eef0b 100644
--- a/arch/blackfin/mach-bf609/include/mach/portmux.h
+++ b/arch/blackfin/mach-bf609/include/mach/portmux.h
@@ -7,8 +7,6 @@
7#ifndef _MACH_PORTMUX_H_ 7#ifndef _MACH_PORTMUX_H_
8#define _MACH_PORTMUX_H_ 8#define _MACH_PORTMUX_H_
9 9
10#define MAX_RESOURCES MAX_BLACKFIN_GPIOS
11
12/* EMAC RMII Port Mux */ 10/* EMAC RMII Port Mux */
13#define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0)) 11#define P_MII0_MDC (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0))
14#define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0)) 12#define P_MII0_MDIO (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0))