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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-09-10 17:43:37 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-09-10 17:43:37 -0400
commit897ee77bfba12b83752027427a41009961458ee6 (patch)
tree2caf21fd61ab29d5e5ac37e45ff70b55ceeff9c9 /arch
parentf3f94ce5dba6e134cf0958dd3a42ab28a028fc83 (diff)
parent43863074659b71345b0047c2cf2ff8d8f7a4b4a1 (diff)
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Ocelot: remove remaining bits [MIPS] TLB: Fix instruction bitmasks [MIPS] R10000: Fix wrong test in dma-default.c [MIPS] Provide empty irq_enable_hazard definition for legacy and R1 cores. [MIPS] Sibyte: Remove broken dependency on EXPERIMENTAL from SIBYTE_SB1xxx_SOC. [MIPS] Kconfig: whitespace cleanup. [MIPS] PCI: Set need_domain_info if controller domain index is non-zero. [MIPS] BCM1480: Fix computation of interrupt mask address register. [MIPS] i8259: Add disable method. [MIPS] tty: add the new ioctls and definitions.
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/Kconfig22
-rw-r--r--arch/mips/kernel/i8259.c1
-rw-r--r--arch/mips/mm/dma-default.c2
-rw-r--r--arch/mips/mm/tlbex.c4
-rw-r--r--arch/mips/pci/pci.c1
-rw-r--r--arch/mips/sibyte/Kconfig1
-rw-r--r--arch/mips/sibyte/bcm1480/irq.c8
7 files changed, 13 insertions, 26 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 04797b289c21..3b807b4bc7cd 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -80,10 +80,10 @@ config MACH_DECSTATION
80 If you have one of the following DECstation Models you definitely 80 If you have one of the following DECstation Models you definitely
81 want to choose R4xx0 for the CPU Type: 81 want to choose R4xx0 for the CPU Type:
82 82
83 DECstation 5000/50 83 DECstation 5000/50
84 DECstation 5000/150 84 DECstation 5000/150
85 DECstation 5000/260 85 DECstation 5000/260
86 DECsystem 5900/260 86 DECsystem 5900/260
87 87
88 otherwise choose R3000. 88 otherwise choose R3000.
89 89
@@ -818,20 +818,6 @@ config EMMA2RH
818config SERIAL_RM9000 818config SERIAL_RM9000
819 bool 819 bool
820 820
821#
822# Unfortunately not all GT64120 systems run the chip at the same clock.
823# As the user for the clock rate and try to minimize the available options.
824#
825choice
826 prompt "Galileo Chip Clock"
827 depends on MOMENCO_OCELOT
828 default SYSCLK_100 if MOMENCO_OCELOT
829
830config SYSCLK_100
831 bool "100" if MOMENCO_OCELOT
832
833endchoice
834
835config ARC32 821config ARC32
836 bool 822 bool
837 823
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 2345160e63fc..b6c30800c667 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -36,6 +36,7 @@ void mask_and_ack_8259A(unsigned int);
36static struct irq_chip i8259A_chip = { 36static struct irq_chip i8259A_chip = {
37 .name = "XT-PIC", 37 .name = "XT-PIC",
38 .mask = disable_8259A_irq, 38 .mask = disable_8259A_irq,
39 .disable = disable_8259A_irq,
39 .unmask = enable_8259A_irq, 40 .unmask = enable_8259A_irq,
40 .mask_ack = mask_and_ack_8259A, 41 .mask_ack = mask_and_ack_8259A,
41}; 42};
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c
index 76903c727647..f60b3dc0fc62 100644
--- a/arch/mips/mm/dma-default.c
+++ b/arch/mips/mm/dma-default.c
@@ -35,7 +35,7 @@ static inline unsigned long dma_addr_to_virt(dma_addr_t dma_addr)
35static inline int cpu_is_noncoherent_r10000(struct device *dev) 35static inline int cpu_is_noncoherent_r10000(struct device *dev)
36{ 36{
37 return !plat_device_is_coherent(dev) && 37 return !plat_device_is_coherent(dev) &&
38 (current_cpu_data.cputype == CPU_R10000 && 38 (current_cpu_data.cputype == CPU_R10000 ||
39 current_cpu_data.cputype == CPU_R12000); 39 current_cpu_data.cputype == CPU_R12000);
40} 40}
41 41
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 4ec0964b8394..9cb39644b6f1 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -78,7 +78,7 @@ enum fields
78 SET = 0x200 78 SET = 0x200
79}; 79};
80 80
81#define OP_MASK 0x2f 81#define OP_MASK 0x3f
82#define OP_SH 26 82#define OP_SH 26
83#define RS_MASK 0x1f 83#define RS_MASK 0x1f
84#define RS_SH 21 84#define RS_SH 21
@@ -92,7 +92,7 @@ enum fields
92#define IMM_SH 0 92#define IMM_SH 0
93#define JIMM_MASK 0x3ffffff 93#define JIMM_MASK 0x3ffffff
94#define JIMM_SH 0 94#define JIMM_SH 0
95#define FUNC_MASK 0x2f 95#define FUNC_MASK 0x3f
96#define FUNC_SH 0 96#define FUNC_SH 0
97#define SET_MASK 0x7 97#define SET_MASK 0x7
98#define SET_SH 0 98#define SET_SH 0
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 6c5c684d1422..589b745d822a 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
@@ -141,6 +141,7 @@ static int __init pcibios_init(void)
141 141
142 bus = pci_scan_bus(next_busno, hose->pci_ops, hose); 142 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
143 hose->bus = bus; 143 hose->bus = bus;
144 need_domain_info = need_domain_info || hose->index;
144 hose->need_domain_info = need_domain_info; 145 hose->need_domain_info = need_domain_info;
145 if (bus) { 146 if (bus) {
146 next_busno = bus->subordinate + 1; 147 next_busno = bus->subordinate + 1;
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
index e6b003ec6716..fdd7bd98fb44 100644
--- a/arch/mips/sibyte/Kconfig
+++ b/arch/mips/sibyte/Kconfig
@@ -48,7 +48,6 @@ config SIBYTE_BCM1x55
48 48
49config SIBYTE_SB1xxx_SOC 49config SIBYTE_SB1xxx_SOC
50 bool 50 bool
51 depends on EXPERIMENTAL
52 select DMA_COHERENT 51 select DMA_COHERENT
53 select SIBYTE_CFE 52 select SIBYTE_CFE
54 select SWAP_IO_SPACE 53 select SWAP_IO_SPACE
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c
index 79ae6ef979bb..e729b5f30264 100644
--- a/arch/mips/sibyte/bcm1480/irq.c
+++ b/arch/mips/sibyte/bcm1480/irq.c
@@ -100,8 +100,8 @@ DEFINE_SPINLOCK(bcm1480_imr_lock);
100 100
101void bcm1480_mask_irq(int cpu, int irq) 101void bcm1480_mask_irq(int cpu, int irq)
102{ 102{
103 unsigned long flags; 103 unsigned long flags, hl_spacing;
104 u64 cur_ints,hl_spacing; 104 u64 cur_ints;
105 105
106 spin_lock_irqsave(&bcm1480_imr_lock, flags); 106 spin_lock_irqsave(&bcm1480_imr_lock, flags);
107 hl_spacing = 0; 107 hl_spacing = 0;
@@ -117,8 +117,8 @@ void bcm1480_mask_irq(int cpu, int irq)
117 117
118void bcm1480_unmask_irq(int cpu, int irq) 118void bcm1480_unmask_irq(int cpu, int irq)
119{ 119{
120 unsigned long flags; 120 unsigned long flags, hl_spacing;
121 u64 cur_ints,hl_spacing; 121 u64 cur_ints;
122 122
123 spin_lock_irqsave(&bcm1480_imr_lock, flags); 123 spin_lock_irqsave(&bcm1480_imr_lock, flags);
124 hl_spacing = 0; 124 hl_spacing = 0;