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authorOlof Johansson <olof@lixom.net>2013-02-09 21:27:28 -0500
committerOlof Johansson <olof@lixom.net>2013-02-09 21:27:28 -0500
commit877cd953167bc50765719ca047a3ac2c4fdd7aaf (patch)
tree80b284bbdcf7014932d4c5f8ed4ad2427f030af4 /arch
parentf58cf70ed954c179825cd0c51f5f64cd1ed74ed3 (diff)
parente1ab0056df613662929290f385590da2cccb8c19 (diff)
Merge tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: mxs soc changes for 3.9 - A couple of optimization on timer - Some updates on mxs_defconfig * tag 'mxs-soc-3.9' of git://git.linaro.org/people/shawnguo/linux-2.6: ARM: mxs_defconfig: Select CONFIG_DEVTMPFS_MOUNT ARM: mxs: decrease mxs_clockevent_device.min_delta_ns to 2 clock cycles ARM: mxs: use apbx bus clock to drive the timers on timrotv2 ARM: mxs: Update mxs_defconfig
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/configs/mxs_defconfig64
-rw-r--r--arch/arm/mach-mxs/timer.c12
2 files changed, 38 insertions, 38 deletions
diff --git a/arch/arm/configs/mxs_defconfig b/arch/arm/configs/mxs_defconfig
index 7bf535104e26..fbbc5bb022d5 100644
--- a/arch/arm/configs/mxs_defconfig
+++ b/arch/arm/configs/mxs_defconfig
@@ -1,5 +1,7 @@
1CONFIG_EXPERIMENTAL=y 1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y 2CONFIG_SYSVIPC=y
3CONFIG_NO_HZ=y
4CONFIG_HIGH_RES_TIMERS=y
3CONFIG_TASKSTATS=y 5CONFIG_TASKSTATS=y
4CONFIG_TASK_DELAY_ACCT=y 6CONFIG_TASK_DELAY_ACCT=y
5CONFIG_TASK_XACCT=y 7CONFIG_TASK_XACCT=y
@@ -8,7 +10,6 @@ CONFIG_IKCONFIG=y
8CONFIG_IKCONFIG_PROC=y 10CONFIG_IKCONFIG_PROC=y
9# CONFIG_UTS_NS is not set 11# CONFIG_UTS_NS is not set
10# CONFIG_IPC_NS is not set 12# CONFIG_IPC_NS is not set
11# CONFIG_USER_NS is not set
12# CONFIG_PID_NS is not set 13# CONFIG_PID_NS is not set
13# CONFIG_NET_NS is not set 14# CONFIG_NET_NS is not set
14CONFIG_PERF_EVENTS=y 15CONFIG_PERF_EVENTS=y
@@ -24,8 +25,6 @@ CONFIG_BLK_DEV_INTEGRITY=y
24CONFIG_ARCH_MXS=y 25CONFIG_ARCH_MXS=y
25CONFIG_MACH_MXS_DT=y 26CONFIG_MACH_MXS_DT=y
26# CONFIG_ARM_THUMB is not set 27# CONFIG_ARM_THUMB is not set
27CONFIG_NO_HZ=y
28CONFIG_HIGH_RES_TIMERS=y
29CONFIG_PREEMPT_VOLUNTARY=y 28CONFIG_PREEMPT_VOLUNTARY=y
30CONFIG_AEABI=y 29CONFIG_AEABI=y
31CONFIG_AUTO_ZRELADDR=y 30CONFIG_AUTO_ZRELADDR=y
@@ -46,25 +45,34 @@ CONFIG_SYN_COOKIES=y
46CONFIG_CAN=m 45CONFIG_CAN=m
47CONFIG_CAN_RAW=m 46CONFIG_CAN_RAW=m
48CONFIG_CAN_BCM=m 47CONFIG_CAN_BCM=m
49CONFIG_CAN_DEV=m
50CONFIG_CAN_FLEXCAN=m 48CONFIG_CAN_FLEXCAN=m
51# CONFIG_WIRELESS is not set 49# CONFIG_WIRELESS is not set
52CONFIG_DEVTMPFS=y 50CONFIG_DEVTMPFS=y
51CONFIG_DEVTMPFS_MOUNT=y
53# CONFIG_FIRMWARE_IN_KERNEL is not set 52# CONFIG_FIRMWARE_IN_KERNEL is not set
54# CONFIG_BLK_DEV is not set
55CONFIG_MTD=y 53CONFIG_MTD=y
54CONFIG_MTD_CMDLINE_PARTS=y
56CONFIG_MTD_CHAR=y 55CONFIG_MTD_CHAR=y
56CONFIG_MTD_BLOCK=y
57CONFIG_MTD_DATAFLASH=y 57CONFIG_MTD_DATAFLASH=y
58CONFIG_MTD_M25P80 58CONFIG_MTD_M25P80=y
59# CONFIG_M25PXX_USE_FAST_READ is not set
60CONFIG_MTD_SST25L=y
59CONFIG_MTD_NAND=y 61CONFIG_MTD_NAND=y
60CONFIG_MTD_NAND_GPMI_NAND=y 62CONFIG_MTD_NAND_GPMI_NAND=y
63CONFIG_MTD_UBI=y
64# CONFIG_BLK_DEV is not set
65CONFIG_EEPROM_AT24=y
66CONFIG_SCSI=y
67CONFIG_BLK_DEV_SD=y
61CONFIG_NETDEVICES=y 68CONFIG_NETDEVICES=y
62CONFIG_NET_ETHERNET=y
63CONFIG_ENC28J60=y 69CONFIG_ENC28J60=y
64CONFIG_USB_USBNET=y 70CONFIG_USB_USBNET=y
65CONFIG_USB_NET_SMSC95XX=y 71CONFIG_USB_NET_SMSC95XX=y
66# CONFIG_NETDEV_1000 is not set 72CONFIG_SMSC_PHY=y
67# CONFIG_NETDEV_10000 is not set 73CONFIG_ICPLUS_PHY=y
74CONFIG_REALTEK_PHY=y
75CONFIG_MICREL_PHY=y
68# CONFIG_WLAN is not set 76# CONFIG_WLAN is not set
69# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 77# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
70CONFIG_INPUT_EVDEV=m 78CONFIG_INPUT_EVDEV=m
@@ -91,21 +99,6 @@ CONFIG_SPI_MXS=y
91CONFIG_DEBUG_GPIO=y 99CONFIG_DEBUG_GPIO=y
92CONFIG_GPIO_SYSFS=y 100CONFIG_GPIO_SYSFS=y
93# CONFIG_HWMON is not set 101# CONFIG_HWMON is not set
94# CONFIG_MFD_SUPPORT is not set
95CONFIG_DISPLAY_SUPPORT=m
96# CONFIG_HID_SUPPORT is not set
97CONFIG_SOUND=y
98CONFIG_SND=y
99CONFIG_SND_TIMER=y
100CONFIG_SND_PCM=y
101CONFIG_SND_JACK=y
102CONFIG_SND_DRIVERS=y
103CONFIG_SND_ARM=y
104CONFIG_SND_SOC=y
105CONFIG_SND_MXS_SOC=y
106CONFIG_SND_SOC_MXS_SGTL5000=y
107CONFIG_SND_SOC_I2C_AND_SPI=y
108CONFIG_SND_SOC_SGTL5000=y
109CONFIG_REGULATOR=y 102CONFIG_REGULATOR=y
110CONFIG_REGULATOR_FIXED_VOLTAGE=y 103CONFIG_REGULATOR_FIXED_VOLTAGE=y
111CONFIG_FB=y 104CONFIG_FB=y
@@ -117,13 +110,16 @@ CONFIG_BACKLIGHT_PWM=y
117CONFIG_FRAMEBUFFER_CONSOLE=y 110CONFIG_FRAMEBUFFER_CONSOLE=y
118CONFIG_FONTS=y 111CONFIG_FONTS=y
119CONFIG_LOGO=y 112CONFIG_LOGO=y
113CONFIG_SOUND=y
114CONFIG_SND=y
115CONFIG_SND_SOC=y
116CONFIG_SND_MXS_SOC=y
117CONFIG_SND_SOC_MXS_SGTL5000=y
120CONFIG_USB=y 118CONFIG_USB=y
121CONFIG_USB_CHIPIDEA=y 119CONFIG_USB_CHIPIDEA=y
122CONFIG_USB_CHIPIDEA_HOST=y 120CONFIG_USB_CHIPIDEA_HOST=y
123CONFIG_USB_STORAGE=y 121CONFIG_USB_STORAGE=y
124CONFIG_USB_MXS_PHY=y 122CONFIG_USB_MXS_PHY=y
125CONFIG_SCSI=y
126CONFIG_BLK_DEV_SD=y
127CONFIG_MMC=y 123CONFIG_MMC=y
128CONFIG_MMC_MXS=y 124CONFIG_MMC_MXS=y
129CONFIG_NEW_LEDS=y 125CONFIG_NEW_LEDS=y
@@ -147,16 +143,23 @@ CONFIG_COMMON_CLK_DEBUG=y
147CONFIG_IIO=y 143CONFIG_IIO=y
148CONFIG_PWM=y 144CONFIG_PWM=y
149CONFIG_PWM_MXS=y 145CONFIG_PWM_MXS=y
146CONFIG_EXT2_FS=y
147CONFIG_EXT2_FS_XATTR=y
150CONFIG_EXT3_FS=y 148CONFIG_EXT3_FS=y
149CONFIG_EXT4_FS=y
151# CONFIG_DNOTIFY is not set 150# CONFIG_DNOTIFY is not set
152CONFIG_FSCACHE=m 151CONFIG_FSCACHE=m
153CONFIG_FSCACHE_STATS=y 152CONFIG_FSCACHE_STATS=y
154CONFIG_CACHEFILES=m 153CONFIG_CACHEFILES=m
155CONFIG_TMPFS=y 154CONFIG_TMPFS=y
156CONFIG_TMPFS_POSIX_ACL=y 155CONFIG_TMPFS_POSIX_ACL=y
157# CONFIG_MISC_FILESYSTEMS is not set 156CONFIG_JFFS2_FS=y
157CONFIG_JFFS2_COMPRESSION_OPTIONS=y
158CONFIG_JFFS2_LZO=y
159CONFIG_JFFS2_RUBIN=y
160CONFIG_UBIFS_FS=y
161CONFIG_UBIFS_FS_ADVANCED_COMPR=y
158CONFIG_NFS_FS=y 162CONFIG_NFS_FS=y
159CONFIG_NFS_V3=y
160CONFIG_NFS_V3_ACL=y 163CONFIG_NFS_V3_ACL=y
161CONFIG_NFS_V4=y 164CONFIG_NFS_V4=y
162CONFIG_ROOT_NFS=y 165CONFIG_ROOT_NFS=y
@@ -170,17 +173,12 @@ CONFIG_MAGIC_SYSRQ=y
170CONFIG_UNUSED_SYMBOLS=y 173CONFIG_UNUSED_SYMBOLS=y
171CONFIG_DEBUG_KERNEL=y 174CONFIG_DEBUG_KERNEL=y
172CONFIG_LOCKUP_DETECTOR=y 175CONFIG_LOCKUP_DETECTOR=y
173CONFIG_DETECT_HUNG_TASK=y
174CONFIG_TIMER_STATS=y 176CONFIG_TIMER_STATS=y
175CONFIG_PROVE_LOCKING=y 177CONFIG_PROVE_LOCKING=y
176CONFIG_DEBUG_SPINLOCK_SLEEP=y
177CONFIG_DEBUG_INFO=y 178CONFIG_DEBUG_INFO=y
178CONFIG_SYSCTL_SYSCALL_CHECK=y
179CONFIG_BLK_DEV_IO_TRACE=y 179CONFIG_BLK_DEV_IO_TRACE=y
180CONFIG_STRICT_DEVMEM=y 180CONFIG_STRICT_DEVMEM=y
181CONFIG_DEBUG_USER=y 181CONFIG_DEBUG_USER=y
182CONFIG_CRYPTO=y
183CONFIG_CRYPTO_CRC32C=m
184# CONFIG_CRYPTO_ANSI_CPRNG is not set 182# CONFIG_CRYPTO_ANSI_CPRNG is not set
185# CONFIG_CRYPTO_HW is not set 183# CONFIG_CRYPTO_HW is not set
186CONFIG_CRC_ITU_T=m 184CONFIG_CRC_ITU_T=m
diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c
index 27451b1ba3f1..421020498a1b 100644
--- a/arch/arm/mach-mxs/timer.c
+++ b/arch/arm/mach-mxs/timer.c
@@ -72,8 +72,9 @@
72#define BM_TIMROT_TIMCTRLn_IRQ_EN (1 << 14) 72#define BM_TIMROT_TIMCTRLn_IRQ_EN (1 << 14)
73#define BM_TIMROT_TIMCTRLn_IRQ (1 << 15) 73#define BM_TIMROT_TIMCTRLn_IRQ (1 << 15)
74#define BP_TIMROT_TIMCTRLn_SELECT 0 74#define BP_TIMROT_TIMCTRLn_SELECT 0
75#define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8 75#define BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL 0x8
76#define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb 76#define BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL 0xb
77#define BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS 0xf
77 78
78static struct clock_event_device mxs_clockevent_device; 79static struct clock_event_device mxs_clockevent_device;
79static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED; 80static enum clock_event_mode mxs_clockevent_mode = CLOCK_EVT_MODE_UNUSED;
@@ -206,7 +207,8 @@ static int __init mxs_clockevent_init(struct clk *timer_clk)
206 mxs_clockevent_device.set_next_event = timrotv1_set_next_event; 207 mxs_clockevent_device.set_next_event = timrotv1_set_next_event;
207 mxs_clockevent_device.cpumask = cpumask_of(0); 208 mxs_clockevent_device.cpumask = cpumask_of(0);
208 clockevents_config_and_register(&mxs_clockevent_device, 209 clockevents_config_and_register(&mxs_clockevent_device,
209 clk_get_rate(timer_clk), 0xf, 210 clk_get_rate(timer_clk),
211 timrot_is_v1() ? 0xf : 0x2,
210 timrot_is_v1() ? 0xfffe : 0xfffffffe); 212 timrot_is_v1() ? 0xfffe : 0xfffffffe);
211 213
212 return 0; 214 return 0;
@@ -274,7 +276,7 @@ void __init mxs_timer_init(void)
274 /* one for clock_event */ 276 /* one for clock_event */
275 __raw_writel((timrot_is_v1() ? 277 __raw_writel((timrot_is_v1() ?
276 BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : 278 BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
277 BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) | 279 BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) |
278 BM_TIMROT_TIMCTRLn_UPDATE | 280 BM_TIMROT_TIMCTRLn_UPDATE |
279 BM_TIMROT_TIMCTRLn_IRQ_EN, 281 BM_TIMROT_TIMCTRLn_IRQ_EN,
280 mxs_timrot_base + HW_TIMROT_TIMCTRLn(0)); 282 mxs_timrot_base + HW_TIMROT_TIMCTRLn(0));
@@ -282,7 +284,7 @@ void __init mxs_timer_init(void)
282 /* another for clocksource */ 284 /* another for clocksource */
283 __raw_writel((timrot_is_v1() ? 285 __raw_writel((timrot_is_v1() ?
284 BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL : 286 BV_TIMROTv1_TIMCTRLn_SELECT__32KHZ_XTAL :
285 BV_TIMROTv2_TIMCTRLn_SELECT__32KHZ_XTAL) | 287 BV_TIMROTv2_TIMCTRLn_SELECT__TICK_ALWAYS) |
286 BM_TIMROT_TIMCTRLn_RELOAD, 288 BM_TIMROT_TIMCTRLn_RELOAD,
287 mxs_timrot_base + HW_TIMROT_TIMCTRLn(1)); 289 mxs_timrot_base + HW_TIMROT_TIMCTRLn(1));
288 290