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authorRyan Mallon <ryan@bluewatersys.com>2010-06-01 20:55:36 -0400
committerNicolas Ferre <nicolas.ferre@atmel.com>2010-12-17 06:10:39 -0500
commit8251544f9e28058e54c4f35b7cd13b0d191d7555 (patch)
treedac7e573319cc79055df4db209b8d1145d1472db /arch
parenta3383e8372c0c11238f9bb9777929bfc3a2d320a (diff)
at91: Fix uhpck clock rate in upll case
The uhpck clock should be divided from the utmi clock, not its parent (main). This change is mostly cosmetic as the uhpck rate value is not used anywhere except for the debugfs clock output. Signed-off-by: Ryan Mallon <ryan@bluewatersys.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-at91/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c
index 7525cee3983f..9113da6845f1 100644
--- a/arch/arm/mach-at91/clock.c
+++ b/arch/arm/mach-at91/clock.c
@@ -658,7 +658,7 @@ static void __init at91_upll_usbfs_clock_init(unsigned long main_clock)
658 /* Now set uhpck values */ 658 /* Now set uhpck values */
659 uhpck.parent = &utmi_clk; 659 uhpck.parent = &utmi_clk;
660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP; 660 uhpck.pmc_mask = AT91SAM926x_PMC_UHP;
661 uhpck.rate_hz = utmi_clk.parent->rate_hz; 661 uhpck.rate_hz = utmi_clk.rate_hz;
662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8); 662 uhpck.rate_hz /= 1 + ((at91_sys_read(AT91_PMC_USB) & AT91_PMC_OHCIUSBDIV) >> 8);
663} 663}
664 664