diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-02-13 01:01:37 -0500 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-13 01:01:37 -0500 |
commit | 7dae8c5209147ad06d424928a5f1ec45caa87691 (patch) | |
tree | 9d62ca389dde613cf6eba66710eb06d513f202a5 /arch | |
parent | ac819a86a76dc29d18306f5c998c38af1ebb58cd (diff) | |
parent | b2994d318dc78c9a4a43605629f00217335ada28 (diff) |
Merge branch 'v3.4-next/devel-samsung-rtc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
* 'v3.4-next/devel-samsung-rtc' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C2443/S3C2416: add s3c_rtc_setname and rename rtc devices
rtc-s3c: add variants for S3C2443 and S3C2416
rtc-s3c: make room for more variants in devicetree block
ARM: SAMSUNG: cleanup of rtc register definitions
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/mach-s3c2416/s3c2416.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c2443/s3c2443.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-rtc.h | 81 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/rtc-core.h | 27 |
4 files changed, 73 insertions, 39 deletions
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 08bb0355159d..0e9a71c90ed7 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c | |||
@@ -59,6 +59,7 @@ | |||
59 | #include <plat/fb-core.h> | 59 | #include <plat/fb-core.h> |
60 | #include <plat/nand-core.h> | 60 | #include <plat/nand-core.h> |
61 | #include <plat/adc-core.h> | 61 | #include <plat/adc-core.h> |
62 | #include <plat/rtc-core.h> | ||
62 | 63 | ||
63 | static struct map_desc s3c2416_iodesc[] __initdata = { | 64 | static struct map_desc s3c2416_iodesc[] __initdata = { |
64 | IODESC_ENT(WATCHDOG), | 65 | IODESC_ENT(WATCHDOG), |
@@ -98,6 +99,7 @@ int __init s3c2416_init(void) | |||
98 | s3c_fb_setname("s3c2443-fb"); | 99 | s3c_fb_setname("s3c2443-fb"); |
99 | 100 | ||
100 | s3c_adc_setname("s3c2416-adc"); | 101 | s3c_adc_setname("s3c2416-adc"); |
102 | s3c_rtc_setname("s3c2416-rtc"); | ||
101 | 103 | ||
102 | #ifdef CONFIG_PM | 104 | #ifdef CONFIG_PM |
103 | register_syscore_ops(&s3c2416_pm_syscore_ops); | 105 | register_syscore_ops(&s3c2416_pm_syscore_ops); |
diff --git a/arch/arm/mach-s3c2443/s3c2443.c b/arch/arm/mach-s3c2443/s3c2443.c index b9deaeb0dfff..b7778a9dafaf 100644 --- a/arch/arm/mach-s3c2443/s3c2443.c +++ b/arch/arm/mach-s3c2443/s3c2443.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <plat/fb-core.h> | 41 | #include <plat/fb-core.h> |
42 | #include <plat/nand-core.h> | 42 | #include <plat/nand-core.h> |
43 | #include <plat/adc-core.h> | 43 | #include <plat/adc-core.h> |
44 | #include <plat/rtc-core.h> | ||
44 | 45 | ||
45 | static struct map_desc s3c2443_iodesc[] __initdata = { | 46 | static struct map_desc s3c2443_iodesc[] __initdata = { |
46 | IODESC_ENT(WATCHDOG), | 47 | IODESC_ENT(WATCHDOG), |
@@ -73,6 +74,7 @@ int __init s3c2443_init(void) | |||
73 | s3c_fb_setname("s3c2443-fb"); | 74 | s3c_fb_setname("s3c2443-fb"); |
74 | 75 | ||
75 | s3c_adc_setname("s3c2443-adc"); | 76 | s3c_adc_setname("s3c2443-adc"); |
77 | s3c_rtc_setname("s3c2443-rtc"); | ||
76 | 78 | ||
77 | /* change WDT IRQ number */ | 79 | /* change WDT IRQ number */ |
78 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | 80 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; |
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h index 30b7cc14cef5..0f8263e93eea 100644 --- a/arch/arm/plat-samsung/include/plat/regs-rtc.h +++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h | |||
@@ -18,51 +18,54 @@ | |||
18 | #define S3C2410_INTP_ALM (1 << 1) | 18 | #define S3C2410_INTP_ALM (1 << 1) |
19 | #define S3C2410_INTP_TIC (1 << 0) | 19 | #define S3C2410_INTP_TIC (1 << 0) |
20 | 20 | ||
21 | #define S3C2410_RTCCON S3C2410_RTCREG(0x40) | 21 | #define S3C2410_RTCCON S3C2410_RTCREG(0x40) |
22 | #define S3C2410_RTCCON_RTCEN (1<<0) | 22 | #define S3C2410_RTCCON_RTCEN (1 << 0) |
23 | #define S3C2410_RTCCON_CLKSEL (1<<1) | 23 | #define S3C2410_RTCCON_CNTSEL (1 << 2) |
24 | #define S3C2410_RTCCON_CNTSEL (1<<2) | 24 | #define S3C2410_RTCCON_CLKRST (1 << 3) |
25 | #define S3C2410_RTCCON_CLKRST (1<<3) | 25 | #define S3C2443_RTCCON_TICSEL (1 << 4) |
26 | #define S3C64XX_RTCCON_TICEN (1<<8) | 26 | #define S3C64XX_RTCCON_TICEN (1 << 8) |
27 | 27 | ||
28 | #define S3C64XX_RTCCON_TICMSK (0xF<<7) | 28 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) |
29 | #define S3C64XX_RTCCON_TICSHT (7) | 29 | #define S3C2410_TICNT_ENABLE (1 << 7) |
30 | 30 | ||
31 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) | 31 | /* S3C2443: tick count is 15 bit wide |
32 | #define S3C2410_TICNT_ENABLE (1<<7) | 32 | * TICNT[6:0] contains upper 7 bits |
33 | * TICNT1[7:0] contains lower 8 bits | ||
34 | */ | ||
35 | #define S3C2443_TICNT_PART(x) ((x & 0x7f00) >> 8) | ||
36 | #define S3C2443_TICNT1 S3C2410_RTCREG(0x4C) | ||
37 | #define S3C2443_TICNT1_PART(x) (x & 0xff) | ||
33 | 38 | ||
34 | #define S3C2410_RTCALM S3C2410_RTCREG(0x50) | 39 | /* S3C2416: tick count is 32 bit wide |
35 | #define S3C2410_RTCALM_ALMEN (1<<6) | 40 | * TICNT[6:0] contains bits [14:8] |
36 | #define S3C2410_RTCALM_YEAREN (1<<5) | 41 | * TICNT1[7:0] contains lower 8 bits |
37 | #define S3C2410_RTCALM_MONEN (1<<4) | 42 | * TICNT2[16:0] contains upper 17 bits |
38 | #define S3C2410_RTCALM_DAYEN (1<<3) | 43 | */ |
39 | #define S3C2410_RTCALM_HOUREN (1<<2) | 44 | #define S3C2416_TICNT2 S3C2410_RTCREG(0x48) |
40 | #define S3C2410_RTCALM_MINEN (1<<1) | 45 | #define S3C2416_TICNT2_PART(x) ((x & 0xffff8000) >> 15) |
41 | #define S3C2410_RTCALM_SECEN (1<<0) | ||
42 | 46 | ||
43 | #define S3C2410_RTCALM_ALL \ | 47 | #define S3C2410_RTCALM S3C2410_RTCREG(0x50) |
44 | S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\ | 48 | #define S3C2410_RTCALM_ALMEN (1 << 6) |
45 | S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\ | 49 | #define S3C2410_RTCALM_YEAREN (1 << 5) |
46 | S3C2410_RTCALM_SECEN | 50 | #define S3C2410_RTCALM_MONEN (1 << 4) |
51 | #define S3C2410_RTCALM_DAYEN (1 << 3) | ||
52 | #define S3C2410_RTCALM_HOUREN (1 << 2) | ||
53 | #define S3C2410_RTCALM_MINEN (1 << 1) | ||
54 | #define S3C2410_RTCALM_SECEN (1 << 0) | ||
47 | 55 | ||
56 | #define S3C2410_ALMSEC S3C2410_RTCREG(0x54) | ||
57 | #define S3C2410_ALMMIN S3C2410_RTCREG(0x58) | ||
58 | #define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) | ||
48 | 59 | ||
49 | #define S3C2410_ALMSEC S3C2410_RTCREG(0x54) | 60 | #define S3C2410_ALMDATE S3C2410_RTCREG(0x60) |
50 | #define S3C2410_ALMMIN S3C2410_RTCREG(0x58) | 61 | #define S3C2410_ALMMON S3C2410_RTCREG(0x64) |
51 | #define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) | 62 | #define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) |
52 | |||
53 | #define S3C2410_ALMDATE S3C2410_RTCREG(0x60) | ||
54 | #define S3C2410_ALMMON S3C2410_RTCREG(0x64) | ||
55 | #define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) | ||
56 | |||
57 | #define S3C2410_RTCRST S3C2410_RTCREG(0x6c) | ||
58 | |||
59 | #define S3C2410_RTCSEC S3C2410_RTCREG(0x70) | ||
60 | #define S3C2410_RTCMIN S3C2410_RTCREG(0x74) | ||
61 | #define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) | ||
62 | #define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) | ||
63 | #define S3C2410_RTCDAY S3C2410_RTCREG(0x80) | ||
64 | #define S3C2410_RTCMON S3C2410_RTCREG(0x84) | ||
65 | #define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) | ||
66 | 63 | ||
64 | #define S3C2410_RTCSEC S3C2410_RTCREG(0x70) | ||
65 | #define S3C2410_RTCMIN S3C2410_RTCREG(0x74) | ||
66 | #define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) | ||
67 | #define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) | ||
68 | #define S3C2410_RTCMON S3C2410_RTCREG(0x84) | ||
69 | #define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) | ||
67 | 70 | ||
68 | #endif /* __ASM_ARCH_REGS_RTC_H */ | 71 | #endif /* __ASM_ARCH_REGS_RTC_H */ |
diff --git a/arch/arm/plat-samsung/include/plat/rtc-core.h b/arch/arm/plat-samsung/include/plat/rtc-core.h new file mode 100644 index 000000000000..21d8594d37ca --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/rtc-core.h | |||
@@ -0,0 +1,27 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/rtc-core.h | ||
2 | * | ||
3 | * Copyright (c) 2011 Heiko Stuebner <heiko@sntech.de> | ||
4 | * | ||
5 | * Samsung RTC Controller core functions | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_PLAT_RTC_CORE_H | ||
13 | #define __ASM_PLAT_RTC_CORE_H __FILE__ | ||
14 | |||
15 | /* These functions are only for use with the core support code, such as | ||
16 | * the cpu specific initialisation code | ||
17 | */ | ||
18 | |||
19 | /* re-define device name depending on support. */ | ||
20 | static inline void s3c_rtc_setname(char *name) | ||
21 | { | ||
22 | #if defined(CONFIG_SAMSUNG_DEV_RTC) || defined(CONFIG_PLAT_S3C24XX) | ||
23 | s3c_device_rtc.name = name; | ||
24 | #endif | ||
25 | } | ||
26 | |||
27 | #endif /* __ASM_PLAT_RTC_CORE_H */ | ||