ARM: dts: imx6qdl-sabresd: add always on pcie regulator

Everything in the PCI specification assumes devices to be
enumerable on startup. This is only possible if they have
power available.

A future improvement may allow this regulator to be switched
off for D3hot and D3cold power states, but there is a lot
of work to do the pcie host controller side for this to work.
To keep things simple always enable the regulator for now.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

1 files changed, 19 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index ec43dde78525..07fb3020e1bf 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -54,6 +54,19 @@
                         gpio = <&gpio4 10 0>;
                         enable-active-high;
                 };
+
+                reg_pcie: regulator@3 {
+                        compatible = "regulator-fixed";
+                        reg = <3>;
+                        pinctrl-names = "default";
+                        pinctrl-0 = <&pinctrl_pcie_reg>;
+                        regulator-name = "MPCIE_3V3";
+                        regulator-min-microvolt = <3300000>;
+                        regulator-max-microvolt = <3300000>;
+                        gpio = <&gpio3 19 0>;
+                        regulator-always-on;
+                        enable-active-high;
+                };
         };
 
         gpio-keys {
@@ -400,6 +413,12 @@
                         >;
                 };
 
+                pinctrl_pcie_reg: pciereggrp {
+                        fsl,pins = <
+                                MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x1b0b0
+                        >;
+                };
+
                 pinctrl_pwm1: pwm1grp {
                         fsl,pins = <
                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT           0x1b0b1