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authorJens Axboe <axboe@kernel.dk>2012-07-30 03:03:10 -0400
committerJens Axboe <axboe@kernel.dk>2012-07-30 03:03:10 -0400
commit72ea1f74fcdf874cca6d2c0962379523bbd99e2c (patch)
tree4c67be6c73356086ff44ef1b8b1c9479702689ca /arch
parentb1af9be5ef77898c05667bb9dbf3b180d91d3292 (diff)
parenta73ff3231df59a4b92ccd0dd4e73897c5822489b (diff)
Merge branch 'for-jens' of git://git.drbd.org/linux-drbd into for-3.6/drivers
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/dts/mmp2-brownstone.dts4
-rw-r--r--arch/arm/boot/dts/omap2.dtsi2
-rw-r--r--arch/arm/boot/dts/spear1310-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear1310.dtsi2
-rw-r--r--arch/arm/boot/dts/spear1340-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear1340.dtsi2
-rw-r--r--arch/arm/boot/dts/spear13xx.dtsi13
-rw-r--r--arch/arm/boot/dts/spear300-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear300.dtsi2
-rw-r--r--arch/arm/boot/dts/spear310-evb.dts2
-rw-r--r--arch/arm/boot/dts/spear310.dtsi2
-rw-r--r--arch/arm/boot/dts/spear320-evb.dts8
-rw-r--r--arch/arm/boot/dts/spear320.dtsi2
-rw-r--r--arch/arm/boot/dts/spear3xx.dtsi2
-rw-r--r--arch/arm/boot/dts/spear600.dtsi1
-rw-r--r--arch/arm/common/dmabounce.c16
-rw-r--r--arch/arm/configs/omap2plus_defconfig1
-rw-r--r--arch/arm/include/asm/atomic.h2
-rw-r--r--arch/arm/include/asm/domain.h18
-rw-r--r--arch/arm/include/asm/futex.h1
-rw-r--r--arch/arm/include/asm/hardware/sp810.h2
-rw-r--r--arch/arm/include/asm/thread_info.h5
-rw-r--r--arch/arm/kernel/entry-armv.S1
-rw-r--r--arch/arm/kernel/kprobes-test-arm.c4
-rw-r--r--arch/arm/kernel/kprobes-thumb.c2
-rw-r--r--arch/arm/kernel/perf_event.c2
-rw-r--r--arch/arm/kernel/ptrace.c3
-rw-r--r--arch/arm/kernel/signal.c46
-rw-r--r--arch/arm/kernel/signal.h2
-rw-r--r--arch/arm/kernel/traps.c2
-rw-r--r--arch/arm/kernel/vmlinux.lds.S2
-rw-r--r--arch/arm/mach-dove/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h1
-rw-r--r--arch/arm/mach-exynos/Kconfig8
-rw-r--r--arch/arm/mach-exynos/pm_domains.c13
-rw-r--r--arch/arm/mach-highbank/Makefile6
-rw-r--r--arch/arm/mach-highbank/core.h1
-rw-r--r--arch/arm/mach-highbank/highbank.c14
-rw-r--r--arch/arm/mach-highbank/smc.S27
-rw-r--r--arch/arm/mach-imx/Kconfig1
-rw-r--r--arch/arm/mach-imx/clk-imx1.c3
-rw-r--r--arch/arm/mach-imx/clk-imx21.c4
-rw-r--r--arch/arm/mach-imx/clk-imx25.c2
-rw-r--r--arch/arm/mach-imx/clk-imx27.c3
-rw-r--r--arch/arm/mach-imx/clk-imx31.c3
-rw-r--r--arch/arm/mach-imx/clk-imx35.c15
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c12
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c26
-rw-r--r--arch/arm/mach-imx/clk-pllv2.c93
-rw-r--r--arch/arm/mach-imx/crm-regs-imx5.h2
-rw-r--r--arch/arm/mach-imx/hotplug.c42
-rw-r--r--arch/arm/mach-imx/mach-cpuimx35.c1
-rw-r--r--arch/arm/mach-imx/mach-cpuimx51sd.c1
-rw-r--r--arch/arm/mach-imx/mach-imx27_visstrim_m10.c38
-rw-r--r--arch/arm/mach-imx/mach-mx21ads.c2
-rw-r--r--arch/arm/mach-imx/mm-imx3.c4
-rw-r--r--arch/arm/mach-imx/mm-imx5.c2
-rw-r--r--arch/arm/mach-kirkwood/board-iconnect.c3
-rw-r--r--arch/arm/mach-kirkwood/common.c9
-rw-r--r--arch/arm/mach-kirkwood/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h29
-rw-r--r--arch/arm/mach-mmp/irq.c7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/bridge-regs.h1
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
-rw-r--r--arch/arm/mach-mxs/mach-apx4devkit.c11
-rw-r--r--arch/arm/mach-omap2/board-flash.c5
-rw-r--r--arch/arm/mach-omap2/board-n8x0.c6
-rw-r--r--arch/arm/mach-omap2/board-omap3beagle.c28
-rw-r--r--arch/arm/mach-omap2/board-overo.c2
-rw-r--r--arch/arm/mach-omap2/board-rx51-peripherals.c6
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
-rw-r--r--arch/arm/mach-omap2/clockdomain.h4
-rw-r--r--arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/clockdomains44xx_data.c2
-rw-r--r--arch/arm/mach-omap2/cm.h11
-rw-r--r--arch/arm/mach-omap2/cminst44xx.c4
-rw-r--r--arch/arm/mach-omap2/display.c4
-rw-r--r--arch/arm/mach-omap2/dsp.c3
-rw-r--r--arch/arm/mach-omap2/id.c11
-rw-r--r--arch/arm/mach-omap2/irq.c1
-rw-r--r--arch/arm/mach-omap2/mux.c4
-rw-r--r--arch/arm/mach-omap2/mux.h11
-rw-r--r--arch/arm/mach-omap2/omap_hwmod.c34
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c36
-rw-r--r--arch/arm/mach-omap2/omap_l3_smx.c3
-rw-r--r--arch/arm/mach-omap2/omap_phy_internal.c6
-rw-r--r--arch/arm/mach-omap2/pm34xx.c1
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c14
-rw-r--r--arch/arm/mach-omap2/serial.c67
-rw-r--r--arch/arm/mach-omap2/twl-common.c2
-rw-r--r--arch/arm/mach-omap2/usb-musb.c6
-rw-r--r--arch/arm/mach-omap2/usb-tusb6010.c2
-rw-r--r--arch/arm/mach-orion5x/include/mach/bridge-regs.h2
-rw-r--r--arch/arm/mach-orion5x/include/mach/io.h22
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h1
-rw-r--r--arch/arm/mach-pxa/hx4700.c15
-rw-r--r--arch/arm/mach-s3c24xx/clock-s3c2440.c2
-rw-r--r--arch/arm/mach-shmobile/Kconfig6
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9d.c1
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g.c1
-rw-r--r--arch/arm/mach-shmobile/board-mackerel.c3
-rw-r--r--arch/arm/mach-shmobile/clock-sh73a0.c8
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c7
-rw-r--r--arch/arm/mach-shmobile/platsmp.c10
-rw-r--r--arch/arm/mach-shmobile/setup-sh7372.c2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/dma.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/generic.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/timex.h2
-rw-r--r--arch/arm/mach-spear13xx/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-spear13xx/spear1310.c2
-rw-r--r--arch/arm/mach-spear13xx/spear1340.c2
-rw-r--r--arch/arm/mach-spear13xx/spear13xx.c2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/debug-macro.S2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/generic.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/spear.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/timex.h2
-rw-r--r--arch/arm/mach-spear3xx/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-spear3xx/spear300.c2
-rw-r--r--arch/arm/mach-spear3xx/spear310.c2
-rw-r--r--arch/arm/mach-spear3xx/spear320.c2
-rw-r--r--arch/arm/mach-spear3xx/spear3xx.c4
-rw-r--r--arch/arm/mach-spear6xx/include/mach/gpio.h2
-rw-r--r--arch/arm/mach-spear6xx/include/mach/misc_regs.h2
-rw-r--r--arch/arm/mach-spear6xx/spear6xx.c2
-rw-r--r--arch/arm/mach-tegra/reset.c2
-rw-r--r--arch/arm/mach-ux500/board-mop500.c66
-rw-r--r--arch/arm/mach-ux500/timer.c2
-rw-r--r--arch/arm/mach-versatile/core.c19
-rw-r--r--arch/arm/mach-versatile/include/mach/hardware.h3
-rw-r--r--arch/arm/mach-versatile/include/mach/io.h27
-rw-r--r--arch/arm/mach-versatile/pci.c19
-rw-r--r--arch/arm/mm/dma-mapping.c20
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/mm.h4
-rw-r--r--arch/arm/mm/mmu.c74
-rw-r--r--arch/arm/net/bpf_jit_32.c5
-rw-r--r--arch/arm/net/bpf_jit_32.h4
-rw-r--r--arch/arm/plat-mxc/epit.c11
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx2_cam.h2
-rw-r--r--arch/arm/plat-mxc/time.c24
-rw-r--r--arch/arm/plat-omap/clock.c2
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h33
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h4
-rw-r--r--arch/arm/plat-orion/common.c2
-rw-r--r--arch/arm/plat-pxa/ssp.c1
-rw-r--r--arch/arm/plat-samsung/adc.c8
-rw-r--r--arch/arm/plat-samsung/devs.c3
-rw-r--r--arch/arm/plat-samsung/include/plat/map-s3c.h2
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h2
-rw-r--r--arch/arm/plat-samsung/s5p-clock.c1
-rw-r--r--arch/arm/plat-spear/include/plat/debug-macro.S2
-rw-r--r--arch/arm/plat-spear/include/plat/pl080.h2
-rw-r--r--arch/arm/plat-spear/include/plat/shirq.h2
-rw-r--r--arch/arm/plat-spear/include/plat/timex.h2
-rw-r--r--arch/arm/plat-spear/include/plat/uncompress.h2
-rw-r--r--arch/arm/plat-spear/pl080.c2
-rw-r--r--arch/arm/plat-spear/restart.c2
-rw-r--r--arch/arm/plat-spear/shirq.c2
-rw-r--r--arch/avr32/kernel/signal.c2
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/h8300/include/asm/pgtable.h3
-rw-r--r--arch/h8300/include/asm/uaccess.h3
-rw-r--r--arch/h8300/kernel/setup.c23
-rw-r--r--arch/h8300/kernel/signal.c2
-rw-r--r--arch/h8300/kernel/time.c1
-rw-r--r--arch/h8300/mm/init.c17
-rw-r--r--arch/m32r/boot/compressed/Makefile6
-rw-r--r--arch/m32r/boot/compressed/misc.c12
-rw-r--r--arch/m32r/include/asm/ptrace.h3
-rw-r--r--arch/m32r/kernel/ptrace.c7
-rw-r--r--arch/m32r/kernel/signal.c2
-rw-r--r--arch/m68k/Kconfig2
-rw-r--r--arch/m68k/include/asm/Kbuild2
-rw-r--r--arch/m68k/include/asm/m528xsim.h2
-rw-r--r--arch/m68k/include/asm/uaccess_mm.h11
-rw-r--r--arch/m68k/kernel/ptrace.c2
-rw-r--r--arch/m68k/kernel/time.c4
-rw-r--r--arch/m68k/lib/uaccess.c74
-rw-r--r--arch/m68k/platform/68328/timers.c6
-rw-r--r--arch/m68k/platform/68360/config.c7
-rw-r--r--arch/m68k/platform/coldfire/clk.c7
-rw-r--r--arch/mips/Kconfig2
-rw-r--r--arch/mips/bcm47xx/Kconfig1
-rw-r--r--arch/mips/bcm63xx/dev-pcmcia.c4
-rw-r--r--arch/mips/cavium-octeon/Kconfig4
-rw-r--r--arch/mips/cavium-octeon/smp.c2
-rw-r--r--arch/mips/include/asm/bitops.h1
-rw-r--r--arch/mips/include/asm/cmpxchg.h1
-rw-r--r--arch/mips/include/asm/cpu.h7
-rw-r--r--arch/mips/include/asm/gic.h15
-rw-r--r--arch/mips/include/asm/inst.h4
-rw-r--r--arch/mips/include/asm/io.h1
-rw-r--r--arch/mips/include/asm/irq.h1
-rw-r--r--arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h2
-rw-r--r--arch/mips/include/asm/mips-boards/maltaint.h10
-rw-r--r--arch/mips/include/asm/mipsmtregs.h2
-rw-r--r--arch/mips/include/asm/switch_to.h6
-rw-r--r--arch/mips/include/asm/thread_info.h4
-rw-r--r--arch/mips/kernel/cpu-probe.c11
-rw-r--r--arch/mips/kernel/mips_ksyms.c8
-rw-r--r--arch/mips/kernel/octeon_switch.S2
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c5
-rw-r--r--arch/mips/kernel/r2300_switch.S15
-rw-r--r--arch/mips/kernel/r4k_switch.S12
-rw-r--r--arch/mips/kernel/smp-bmips.c15
-rw-r--r--arch/mips/kernel/smp.c12
-rw-r--r--arch/mips/kernel/smtc.c13
-rw-r--r--arch/mips/kernel/sync-r4k.c5
-rw-r--r--arch/mips/kernel/traps.c7
-rw-r--r--arch/mips/kernel/vmlinux.lds.S3
-rw-r--r--arch/mips/mm/Makefile4
-rw-r--r--arch/mips/mm/c-r4k.c5
-rw-r--r--arch/mips/mm/page-funcs.S50
-rw-r--r--arch/mips/mm/page.c67
-rw-r--r--arch/mips/mm/tlbex.c2
-rw-r--r--arch/mips/mti-malta/malta-pci.c7
-rw-r--r--arch/mips/mti-malta/malta-setup.c2
-rw-r--r--arch/mips/netlogic/xlp/setup.c8
-rw-r--r--arch/mips/oprofile/common.c1
-rw-r--r--arch/mips/oprofile/op_model_mipsxx.c4
-rw-r--r--arch/mips/pci/fixup-fuloong2e.c12
-rw-r--r--arch/mips/pci/fixup-lemote2f.c12
-rw-r--r--arch/mips/pci/fixup-malta.c6
-rw-r--r--arch/mips/pci/fixup-mpc30x.c4
-rw-r--r--arch/mips/pci/fixup-sb1250.c6
-rw-r--r--arch/mips/pci/ops-tx4927.c2
-rw-r--r--arch/mips/pci/pci-ip27.c2
-rw-r--r--arch/mips/pci/pci-lantiq.c4
-rw-r--r--arch/mips/pci/pci-xlr.c61
-rw-r--r--arch/mips/pmc-sierra/yosemite/smp.c2
-rw-r--r--arch/mips/powertv/asic/asic-calliope.c2
-rw-r--r--arch/mips/powertv/asic/asic-cronus.c2
-rw-r--r--arch/mips/powertv/asic/asic-gaia.c2
-rw-r--r--arch/mips/powertv/asic/asic-zeus.c2
-rw-r--r--arch/mips/txx9/generic/pci.c2
-rw-r--r--arch/mn10300/include/asm/ptrace.h3
-rw-r--r--arch/mn10300/include/asm/thread_info.h2
-rw-r--r--arch/mn10300/include/asm/timex.h11
-rw-r--r--arch/mn10300/kernel/cevt-mn10300.c10
-rw-r--r--arch/mn10300/kernel/internal.h2
-rw-r--r--arch/mn10300/kernel/irq.c4
-rw-r--r--arch/mn10300/kernel/signal.c5
-rw-r--r--arch/mn10300/kernel/traps.c1
-rw-r--r--arch/mn10300/mm/dma-alloc.c1
-rw-r--r--arch/mn10300/unit-asb2303/include/unit/timex.h4
-rw-r--r--arch/mn10300/unit-asb2303/smc91111.c1
-rw-r--r--arch/mn10300/unit-asb2305/include/unit/timex.h4
-rw-r--r--arch/mn10300/unit-asb2305/unit-init.c1
-rw-r--r--arch/mn10300/unit-asb2364/include/unit/timex.h4
-rw-r--r--arch/parisc/Makefile3
-rw-r--r--arch/parisc/include/asm/Kbuild1
-rw-r--r--arch/parisc/include/asm/bug.h2
-rw-r--r--arch/powerpc/include/asm/hw_irq.h14
-rw-r--r--arch/powerpc/kernel/entry_64.S97
-rw-r--r--arch/powerpc/kernel/irq.c50
-rw-r--r--arch/powerpc/kernel/module_32.c11
-rw-r--r--arch/powerpc/kernel/prom_init.c4
-rw-r--r--arch/powerpc/kernel/time.c14
-rw-r--r--arch/powerpc/kvm/book3s_hv.c96
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S2
-rw-r--r--arch/powerpc/kvm/book3s_pr_papr.c1
-rw-r--r--arch/powerpc/mm/numa.c4
-rw-r--r--arch/powerpc/net/bpf_jit_64.S2
-rw-r--r--arch/powerpc/platforms/cell/pervasive.c11
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c4
-rw-r--r--arch/powerpc/platforms/pseries/nvram.c61
-rw-r--r--arch/powerpc/platforms/pseries/processor_idle.c17
-rw-r--r--arch/powerpc/xmon/xmon.c2
-rw-r--r--arch/sh/Kconfig2
-rw-r--r--arch/sh/Makefile16
-rw-r--r--arch/sh/boards/mach-kfr2r09/setup.c4
-rw-r--r--arch/sh/drivers/pci/pcie-sh7786.c2
-rw-r--r--arch/sh/include/asm/Kbuild34
-rw-r--r--arch/sh/include/asm/bitsperlong.h1
-rw-r--r--arch/sh/include/asm/cputime.h6
-rw-r--r--arch/sh/include/asm/current.h1
-rw-r--r--arch/sh/include/asm/delay.h1
-rw-r--r--arch/sh/include/asm/div64.h1
-rw-r--r--arch/sh/include/asm/emergency-restart.h6
-rw-r--r--arch/sh/include/asm/errno.h6
-rw-r--r--arch/sh/include/asm/fcntl.h1
-rw-r--r--arch/sh/include/asm/io_noioport.h17
-rw-r--r--arch/sh/include/asm/ioctl.h1
-rw-r--r--arch/sh/include/asm/ipcbuf.h1
-rw-r--r--arch/sh/include/asm/irq_regs.h1
-rw-r--r--arch/sh/include/asm/kvm_para.h1
-rw-r--r--arch/sh/include/asm/local.h7
-rw-r--r--arch/sh/include/asm/local64.h1
-rw-r--r--arch/sh/include/asm/mman.h1
-rw-r--r--arch/sh/include/asm/msgbuf.h1
-rw-r--r--arch/sh/include/asm/param.h1
-rw-r--r--arch/sh/include/asm/parport.h1
-rw-r--r--arch/sh/include/asm/percpu.h6
-rw-r--r--arch/sh/include/asm/poll.h1
-rw-r--r--arch/sh/include/asm/resource.h6
-rw-r--r--arch/sh/include/asm/scatterlist.h6
-rw-r--r--arch/sh/include/asm/sembuf.h1
-rw-r--r--arch/sh/include/asm/serial.h1
-rw-r--r--arch/sh/include/asm/shmbuf.h1
-rw-r--r--arch/sh/include/asm/siginfo.h6
-rw-r--r--arch/sh/include/asm/sizes.h1
-rw-r--r--arch/sh/include/asm/socket.h1
-rw-r--r--arch/sh/include/asm/statfs.h6
-rw-r--r--arch/sh/include/asm/termbits.h1
-rw-r--r--arch/sh/include/asm/termios.h1
-rw-r--r--arch/sh/include/asm/uaccess.h75
-rw-r--r--arch/sh/include/asm/uaccess_32.h75
-rw-r--r--arch/sh/include/asm/uaccess_64.h4
-rw-r--r--arch/sh/include/asm/ucontext.h1
-rw-r--r--arch/sh/include/asm/word-at-a-time.h53
-rw-r--r--arch/sh/include/asm/xor.h1
-rw-r--r--arch/sh/include/cpu-sh2a/cpu/ubc.h28
-rw-r--r--arch/sh/kernel/cpu/sh3/serial-sh7720.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7343.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7366.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7722.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7723.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7724.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7734.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7757.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7785.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-sh7786.c2
-rw-r--r--arch/sh/kernel/cpu/sh4a/clock-shx3.c2
-rw-r--r--arch/sh/kernel/cpu/sh5/entry.S82
-rw-r--r--arch/sh/kernel/process.c1
-rw-r--r--arch/sh/kernel/process_64.c1
-rw-r--r--arch/sh/kernel/sh_ksyms_64.c2
-rw-r--r--arch/sparc/include/asm/cmt.h59
-rw-r--r--arch/sparc/include/asm/mpmbox.h67
-rw-r--r--arch/sparc/kernel/vio.c2
-rw-r--r--arch/tile/include/asm/thread_info.h5
-rw-r--r--arch/tile/include/asm/uaccess.h2
-rw-r--r--arch/tile/kernel/backtrace.c9
-rw-r--r--arch/tile/kernel/entry.S14
-rw-r--r--arch/tile/kernel/setup.c1
-rw-r--r--arch/um/drivers/mconsole_kern.c1
-rw-r--r--arch/x86/boot/header.S42
-rw-r--r--arch/x86/boot/tools/build.c172
-rw-r--r--arch/x86/crypto/aesni-intel_asm.S6
-rw-r--r--arch/x86/ia32/ia32_signal.c2
-rw-r--r--arch/x86/include/asm/cpufeature.h2
-rw-r--r--arch/x86/include/asm/nmi.h14
-rw-r--r--arch/x86/include/asm/pgtable-3level.h30
-rw-r--r--arch/x86/include/asm/uaccess.h12
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h1
-rw-r--r--arch/x86/kernel/acpi/boot.c27
-rw-r--r--arch/x86/kernel/aperture_64.c6
-rw-r--r--arch/x86/kernel/apic/io_apic.c4
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c4
-rw-r--r--arch/x86/kernel/cpu/mkcapflags.pl25
-rw-r--r--arch/x86/kernel/cpu/perf_event.c11
-rw-r--r--arch/x86/kernel/cpu/perf_event.h2
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel.c145
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_ds.c9
-rw-r--r--arch/x86/kernel/cpu/scattered.c2
-rw-r--r--arch/x86/kernel/kgdb.c8
-rw-r--r--arch/x86/kernel/kvmclock.c5
-rw-r--r--arch/x86/kernel/nmi_selftest.c4
-rw-r--r--arch/x86/kernel/pci-dma.c3
-rw-r--r--arch/x86/kernel/reboot.c14
-rw-r--r--arch/x86/kernel/smpboot.c26
-rw-r--r--arch/x86/kernel/vsyscall_64.c39
-rw-r--r--arch/x86/kvm/mmu.c3
-rw-r--r--arch/x86/lib/csum-wrappers_64.c2
-rw-r--r--arch/x86/lib/usercopy.c4
-rw-r--r--arch/x86/lib/x86-opcode-map.txt8
-rw-r--r--arch/x86/mm/init.c3
-rw-r--r--arch/x86/mm/ioremap.c4
-rw-r--r--arch/x86/mm/pageattr.c2
-rw-r--r--arch/x86/mm/srat.c2
-rw-r--r--arch/x86/platform/mrst/early_printk_mrst.c13
-rw-r--r--arch/x86/platform/mrst/mrst.c2
-rw-r--r--arch/x86/platform/uv/tlb_uv.c1
-rw-r--r--arch/x86/tools/gen-insn-attr-x86.awk14
-rw-r--r--arch/x86/um/sys_call_table_32.c4
-rw-r--r--arch/x86/xen/enlighten.c8
-rw-r--r--arch/x86/xen/p2m.c36
-rw-r--r--arch/x86/xen/setup.c3
-rw-r--r--arch/xtensa/Makefile4
-rw-r--r--arch/xtensa/include/asm/syscall.h4
-rw-r--r--arch/xtensa/kernel/process.c2
-rw-r--r--arch/xtensa/kernel/signal.c2
-rw-r--r--arch/xtensa/kernel/vmlinux.lds.S3
-rw-r--r--arch/xtensa/mm/init.c18
396 files changed, 2110 insertions, 1731 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b649c5904a4f..a91009c61870 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -7,7 +7,6 @@ config ARM
7 select HAVE_IDE if PCI || ISA || PCMCIA 7 select HAVE_IDE if PCI || ISA || PCMCIA
8 select HAVE_DMA_ATTRS 8 select HAVE_DMA_ATTRS
9 select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7) 9 select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
10 select CMA if (CPU_V6 || CPU_V6K || CPU_V7)
11 select HAVE_MEMBLOCK 10 select HAVE_MEMBLOCK
12 select RTC_LIB 11 select RTC_LIB
13 select SYS_SUPPORTS_APM_EMULATION 12 select SYS_SUPPORTS_APM_EMULATION
@@ -294,6 +293,7 @@ config ARCH_VERSATILE
294 select ICST 293 select ICST
295 select GENERIC_CLOCKEVENTS 294 select GENERIC_CLOCKEVENTS
296 select ARCH_WANT_OPTIONAL_GPIOLIB 295 select ARCH_WANT_OPTIONAL_GPIOLIB
296 select NEED_MACH_IO_H if PCI
297 select PLAT_VERSATILE 297 select PLAT_VERSATILE
298 select PLAT_VERSATILE_CLCD 298 select PLAT_VERSATILE_CLCD
299 select PLAT_VERSATILE_FPGA_IRQ 299 select PLAT_VERSATILE_FPGA_IRQ
@@ -589,6 +589,7 @@ config ARCH_ORION5X
589 select PCI 589 select PCI
590 select ARCH_REQUIRE_GPIOLIB 590 select ARCH_REQUIRE_GPIOLIB
591 select GENERIC_CLOCKEVENTS 591 select GENERIC_CLOCKEVENTS
592 select NEED_MACH_IO_H
592 select PLAT_ORION 593 select PLAT_ORION
593 help 594 help
594 Support for the following Marvell Orion 5x series SoCs: 595 Support for the following Marvell Orion 5x series SoCs:
diff --git a/arch/arm/boot/dts/mmp2-brownstone.dts b/arch/arm/boot/dts/mmp2-brownstone.dts
index 153a4b2d12b5..c9b4f27d191e 100644
--- a/arch/arm/boot/dts/mmp2-brownstone.dts
+++ b/arch/arm/boot/dts/mmp2-brownstone.dts
@@ -11,7 +11,7 @@
11/include/ "mmp2.dtsi" 11/include/ "mmp2.dtsi"
12 12
13/ { 13/ {
14 model = "Marvell MMP2 Aspenite Development Board"; 14 model = "Marvell MMP2 Brownstone Development Board";
15 compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2"; 15 compatible = "mrvl,mmp2-brownstone", "mrvl,mmp2";
16 16
17 chosen { 17 chosen {
@@ -19,7 +19,7 @@
19 }; 19 };
20 20
21 memory { 21 memory {
22 reg = <0x00000000 0x04000000>; 22 reg = <0x00000000 0x08000000>;
23 }; 23 };
24 24
25 soc { 25 soc {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index f2ab4ea7cc0e..581cb081cb0f 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -44,6 +44,8 @@
44 compatible = "ti,omap2-intc"; 44 compatible = "ti,omap2-intc";
45 interrupt-controller; 45 interrupt-controller;
46 #interrupt-cells = <1>; 46 #interrupt-cells = <1>;
47 ti,intc-size = <96>;
48 reg = <0x480FE000 0x1000>;
47 }; 49 };
48 50
49 uart1: serial@4806a000 { 51 uart1: serial@4806a000 {
diff --git a/arch/arm/boot/dts/spear1310-evb.dts b/arch/arm/boot/dts/spear1310-evb.dts
index 8314e4171884..dd4358bc26e2 100644
--- a/arch/arm/boot/dts/spear1310-evb.dts
+++ b/arch/arm/boot/dts/spear1310-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr1310 Evaluation Baord 2 * DTS file for SPEAr1310 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1310.dtsi b/arch/arm/boot/dts/spear1310.dtsi
index 9e61da404d57..419ea7413d23 100644
--- a/arch/arm/boot/dts/spear1310.dtsi
+++ b/arch/arm/boot/dts/spear1310.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr1310 SoCs 2 * DTS file for all SPEAr1310 SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340-evb.dts b/arch/arm/boot/dts/spear1340-evb.dts
index 0d8472e5ab9f..c9a54e06fb68 100644
--- a/arch/arm/boot/dts/spear1340-evb.dts
+++ b/arch/arm/boot/dts/spear1340-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr1340 Evaluation Baord 2 * DTS file for SPEAr1340 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear1340.dtsi b/arch/arm/boot/dts/spear1340.dtsi
index a26fc47a55e8..d71fe2a68f09 100644
--- a/arch/arm/boot/dts/spear1340.dtsi
+++ b/arch/arm/boot/dts/spear1340.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr1340 SoCs 2 * DTS file for all SPEAr1340 SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear13xx.dtsi b/arch/arm/boot/dts/spear13xx.dtsi
index 1f8e1e1481df..f7b84aced654 100644
--- a/arch/arm/boot/dts/spear13xx.dtsi
+++ b/arch/arm/boot/dts/spear13xx.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr13xx SoCs 2 * DTS file for all SPEAr13xx SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
@@ -43,8 +43,8 @@
43 43
44 pmu { 44 pmu {
45 compatible = "arm,cortex-a9-pmu"; 45 compatible = "arm,cortex-a9-pmu";
46 interrupts = <0 8 0x04 46 interrupts = <0 6 0x04
47 0 9 0x04>; 47 0 7 0x04>;
48 }; 48 };
49 49
50 L2: l2-cache { 50 L2: l2-cache {
@@ -119,8 +119,8 @@
119 gmac0: eth@e2000000 { 119 gmac0: eth@e2000000 {
120 compatible = "st,spear600-gmac"; 120 compatible = "st,spear600-gmac";
121 reg = <0xe2000000 0x8000>; 121 reg = <0xe2000000 0x8000>;
122 interrupts = <0 23 0x4 122 interrupts = <0 33 0x4
123 0 24 0x4>; 123 0 34 0x4>;
124 interrupt-names = "macirq", "eth_wake_irq"; 124 interrupt-names = "macirq", "eth_wake_irq";
125 status = "disabled"; 125 status = "disabled";
126 }; 126 };
@@ -202,6 +202,7 @@
202 kbd@e0300000 { 202 kbd@e0300000 {
203 compatible = "st,spear300-kbd"; 203 compatible = "st,spear300-kbd";
204 reg = <0xe0300000 0x1000>; 204 reg = <0xe0300000 0x1000>;
205 interrupts = <0 52 0x4>;
205 status = "disabled"; 206 status = "disabled";
206 }; 207 };
207 208
@@ -224,7 +225,7 @@
224 serial@e0000000 { 225 serial@e0000000 {
225 compatible = "arm,pl011", "arm,primecell"; 226 compatible = "arm,pl011", "arm,primecell";
226 reg = <0xe0000000 0x1000>; 227 reg = <0xe0000000 0x1000>;
227 interrupts = <0 36 0x4>; 228 interrupts = <0 35 0x4>;
228 status = "disabled"; 229 status = "disabled";
229 }; 230 };
230 231
diff --git a/arch/arm/boot/dts/spear300-evb.dts b/arch/arm/boot/dts/spear300-evb.dts
index fc82b1a26458..d71b8d581e3d 100644
--- a/arch/arm/boot/dts/spear300-evb.dts
+++ b/arch/arm/boot/dts/spear300-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr300 Evaluation Baord 2 * DTS file for SPEAr300 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear300.dtsi b/arch/arm/boot/dts/spear300.dtsi
index 01c5e358fdb2..ed3627c116cc 100644
--- a/arch/arm/boot/dts/spear300.dtsi
+++ b/arch/arm/boot/dts/spear300.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr300 SoC 2 * DTS file for SPEAr300 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310-evb.dts b/arch/arm/boot/dts/spear310-evb.dts
index dc5e2d445a93..b00544e0cd5d 100644
--- a/arch/arm/boot/dts/spear310-evb.dts
+++ b/arch/arm/boot/dts/spear310-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr310 Evaluation Baord 2 * DTS file for SPEAr310 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear310.dtsi b/arch/arm/boot/dts/spear310.dtsi
index e47081c494d9..62fc4fb3e5f9 100644
--- a/arch/arm/boot/dts/spear310.dtsi
+++ b/arch/arm/boot/dts/spear310.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr310 SoC 2 * DTS file for SPEAr310 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear320-evb.dts b/arch/arm/boot/dts/spear320-evb.dts
index 6308fa3bec1e..e4e912f95024 100644
--- a/arch/arm/boot/dts/spear320-evb.dts
+++ b/arch/arm/boot/dts/spear320-evb.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 Evaluation Baord 2 * DTS file for SPEAr320 Evaluation Baord
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
@@ -15,8 +15,8 @@
15/include/ "spear320.dtsi" 15/include/ "spear320.dtsi"
16 16
17/ { 17/ {
18 model = "ST SPEAr300 Evaluation Board"; 18 model = "ST SPEAr320 Evaluation Board";
19 compatible = "st,spear300-evb", "st,spear300"; 19 compatible = "st,spear320-evb", "st,spear320";
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 22
@@ -26,7 +26,7 @@
26 26
27 ahb { 27 ahb {
28 pinmux@b3000000 { 28 pinmux@b3000000 {
29 st,pinmux-mode = <3>; 29 st,pinmux-mode = <4>;
30 pinctrl-names = "default"; 30 pinctrl-names = "default";
31 pinctrl-0 = <&state_default>; 31 pinctrl-0 = <&state_default>;
32 32
diff --git a/arch/arm/boot/dts/spear320.dtsi b/arch/arm/boot/dts/spear320.dtsi
index 5372ca399b1f..1f49d69595a0 100644
--- a/arch/arm/boot/dts/spear320.dtsi
+++ b/arch/arm/boot/dts/spear320.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for SPEAr320 SoC 2 * DTS file for SPEAr320 SoC
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear3xx.dtsi b/arch/arm/boot/dts/spear3xx.dtsi
index 91072553963f..3a8bb5736928 100644
--- a/arch/arm/boot/dts/spear3xx.dtsi
+++ b/arch/arm/boot/dts/spear3xx.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * DTS file for all SPEAr3xx SoCs 2 * DTS file for all SPEAr3xx SoCs
3 * 3 *
4 * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> 4 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
5 * 5 *
6 * The code contained herein is licensed under the GNU General Public 6 * The code contained herein is licensed under the GNU General Public
7 * License. You may obtain a copy of the GNU General Public License 7 * License. You may obtain a copy of the GNU General Public License
diff --git a/arch/arm/boot/dts/spear600.dtsi b/arch/arm/boot/dts/spear600.dtsi
index 089f0a42c50e..a3c36e47d7ef 100644
--- a/arch/arm/boot/dts/spear600.dtsi
+++ b/arch/arm/boot/dts/spear600.dtsi
@@ -181,6 +181,7 @@
181 timer@f0000000 { 181 timer@f0000000 {
182 compatible = "st,spear-timer"; 182 compatible = "st,spear-timer";
183 reg = <0xf0000000 0x400>; 183 reg = <0xf0000000 0x400>;
184 interrupt-parent = <&vic0>;
184 interrupts = <16>; 185 interrupts = <16>;
185 }; 186 };
186 }; 187 };
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c
index 9d7eb530f95f..aa07f5938f05 100644
--- a/arch/arm/common/dmabounce.c
+++ b/arch/arm/common/dmabounce.c
@@ -366,8 +366,8 @@ static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
366 struct safe_buffer *buf; 366 struct safe_buffer *buf;
367 unsigned long off; 367 unsigned long off;
368 368
369 dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n", 369 dev_dbg(dev, "%s(dma=%#x,sz=%zx,dir=%x)\n",
370 __func__, addr, off, sz, dir); 370 __func__, addr, sz, dir);
371 371
372 buf = find_safe_buffer_dev(dev, addr, __func__); 372 buf = find_safe_buffer_dev(dev, addr, __func__);
373 if (!buf) 373 if (!buf)
@@ -377,8 +377,8 @@ static int __dmabounce_sync_for_cpu(struct device *dev, dma_addr_t addr,
377 377
378 BUG_ON(buf->direction != dir); 378 BUG_ON(buf->direction != dir);
379 379
380 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", 380 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x off=%#lx) mapped to %p (dma=%#x)\n",
381 __func__, buf->ptr, virt_to_dma(dev, buf->ptr), 381 __func__, buf->ptr, virt_to_dma(dev, buf->ptr), off,
382 buf->safe, buf->safe_dma_addr); 382 buf->safe, buf->safe_dma_addr);
383 383
384 DO_STATS(dev->archdata.dmabounce->bounce_count++); 384 DO_STATS(dev->archdata.dmabounce->bounce_count++);
@@ -406,8 +406,8 @@ static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
406 struct safe_buffer *buf; 406 struct safe_buffer *buf;
407 unsigned long off; 407 unsigned long off;
408 408
409 dev_dbg(dev, "%s(dma=%#x,off=%#lx,sz=%zx,dir=%x)\n", 409 dev_dbg(dev, "%s(dma=%#x,sz=%zx,dir=%x)\n",
410 __func__, addr, off, sz, dir); 410 __func__, addr, sz, dir);
411 411
412 buf = find_safe_buffer_dev(dev, addr, __func__); 412 buf = find_safe_buffer_dev(dev, addr, __func__);
413 if (!buf) 413 if (!buf)
@@ -417,8 +417,8 @@ static int __dmabounce_sync_for_device(struct device *dev, dma_addr_t addr,
417 417
418 BUG_ON(buf->direction != dir); 418 BUG_ON(buf->direction != dir);
419 419
420 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", 420 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x off=%#lx) mapped to %p (dma=%#x)\n",
421 __func__, buf->ptr, virt_to_dma(dev, buf->ptr), 421 __func__, buf->ptr, virt_to_dma(dev, buf->ptr), off,
422 buf->safe, buf->safe_dma_addr); 422 buf->safe, buf->safe_dma_addr);
423 423
424 DO_STATS(dev->archdata.dmabounce->bounce_count++); 424 DO_STATS(dev->archdata.dmabounce->bounce_count++);
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index 9854ff4279e0..11828e632532 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -176,7 +176,6 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
176CONFIG_USB_DEVICEFS=y 176CONFIG_USB_DEVICEFS=y
177CONFIG_USB_SUSPEND=y 177CONFIG_USB_SUSPEND=y
178CONFIG_USB_MON=y 178CONFIG_USB_MON=y
179CONFIG_USB_EHCI_HCD=y
180CONFIG_USB_WDM=y 179CONFIG_USB_WDM=y
181CONFIG_USB_STORAGE=y 180CONFIG_USB_STORAGE=y
182CONFIG_USB_LIBUSUAL=y 181CONFIG_USB_LIBUSUAL=y
diff --git a/arch/arm/include/asm/atomic.h b/arch/arm/include/asm/atomic.h
index 68374ba6a943..c79f61faa3a5 100644
--- a/arch/arm/include/asm/atomic.h
+++ b/arch/arm/include/asm/atomic.h
@@ -243,7 +243,7 @@ typedef struct {
243 243
244#define ATOMIC64_INIT(i) { (i) } 244#define ATOMIC64_INIT(i) { (i) }
245 245
246static inline u64 atomic64_read(atomic64_t *v) 246static inline u64 atomic64_read(const atomic64_t *v)
247{ 247{
248 u64 result; 248 u64 result;
249 249
diff --git a/arch/arm/include/asm/domain.h b/arch/arm/include/asm/domain.h
index 3d2220498abc..6ddbe446425e 100644
--- a/arch/arm/include/asm/domain.h
+++ b/arch/arm/include/asm/domain.h
@@ -60,13 +60,13 @@
60#ifndef __ASSEMBLY__ 60#ifndef __ASSEMBLY__
61 61
62#ifdef CONFIG_CPU_USE_DOMAINS 62#ifdef CONFIG_CPU_USE_DOMAINS
63#define set_domain(x) \ 63static inline void set_domain(unsigned val)
64 do { \ 64{
65 __asm__ __volatile__( \ 65 asm volatile(
66 "mcr p15, 0, %0, c3, c0 @ set domain" \ 66 "mcr p15, 0, %0, c3, c0 @ set domain"
67 : : "r" (x)); \ 67 : : "r" (val));
68 isb(); \ 68 isb();
69 } while (0) 69}
70 70
71#define modify_domain(dom,type) \ 71#define modify_domain(dom,type) \
72 do { \ 72 do { \
@@ -78,8 +78,8 @@
78 } while (0) 78 } while (0)
79 79
80#else 80#else
81#define set_domain(x) do { } while (0) 81static inline void set_domain(unsigned val) { }
82#define modify_domain(dom,type) do { } while (0) 82static inline void modify_domain(unsigned dom, unsigned type) { }
83#endif 83#endif
84 84
85/* 85/*
diff --git a/arch/arm/include/asm/futex.h b/arch/arm/include/asm/futex.h
index 7be54690aeec..e42cf597f6e6 100644
--- a/arch/arm/include/asm/futex.h
+++ b/arch/arm/include/asm/futex.h
@@ -19,6 +19,7 @@
19 " .long 1b, 4f, 2b, 4f\n" \ 19 " .long 1b, 4f, 2b, 4f\n" \
20 " .popsection\n" \ 20 " .popsection\n" \
21 " .pushsection .fixup,\"ax\"\n" \ 21 " .pushsection .fixup,\"ax\"\n" \
22 " .align 2\n" \
22 "4: mov %0, " err_reg "\n" \ 23 "4: mov %0, " err_reg "\n" \
23 " b 3b\n" \ 24 " b 3b\n" \
24 " .popsection" 25 " .popsection"
diff --git a/arch/arm/include/asm/hardware/sp810.h b/arch/arm/include/asm/hardware/sp810.h
index e0d1c0cfa548..6b9b077d86b3 100644
--- a/arch/arm/include/asm/hardware/sp810.h
+++ b/arch/arm/include/asm/hardware/sp810.h
@@ -4,7 +4,7 @@
4 * ARM PrimeXsys System Controller SP810 header file 4 * ARM PrimeXsys System Controller SP810 header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/include/asm/thread_info.h b/arch/arm/include/asm/thread_info.h
index b79f8e97f775..af7b0bda3355 100644
--- a/arch/arm/include/asm/thread_info.h
+++ b/arch/arm/include/asm/thread_info.h
@@ -148,7 +148,6 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */ 148#define TIF_NOTIFY_RESUME 2 /* callback before returning to user */
149#define TIF_SYSCALL_TRACE 8 149#define TIF_SYSCALL_TRACE 8
150#define TIF_SYSCALL_AUDIT 9 150#define TIF_SYSCALL_AUDIT 9
151#define TIF_SYSCALL_RESTARTSYS 10
152#define TIF_POLLING_NRFLAG 16 151#define TIF_POLLING_NRFLAG 16
153#define TIF_USING_IWMMXT 17 152#define TIF_USING_IWMMXT 17
154#define TIF_MEMDIE 18 /* is terminating due to OOM killer */ 153#define TIF_MEMDIE 18 /* is terminating due to OOM killer */
@@ -164,11 +163,9 @@ extern int vfp_restore_user_hwstate(struct user_vfp __user *,
164#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG) 163#define _TIF_POLLING_NRFLAG (1 << TIF_POLLING_NRFLAG)
165#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT) 164#define _TIF_USING_IWMMXT (1 << TIF_USING_IWMMXT)
166#define _TIF_SECCOMP (1 << TIF_SECCOMP) 165#define _TIF_SECCOMP (1 << TIF_SECCOMP)
167#define _TIF_SYSCALL_RESTARTSYS (1 << TIF_SYSCALL_RESTARTSYS)
168 166
169/* Checks for any syscall work in entry-common.S */ 167/* Checks for any syscall work in entry-common.S */
170#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \ 168#define _TIF_SYSCALL_WORK (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT)
171 _TIF_SYSCALL_RESTARTSYS)
172 169
173/* 170/*
174 * Change these and you break ASM code in entry-common.S 171 * Change these and you break ASM code in entry-common.S
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index 437f0c426517..0d1851ca6eb9 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -495,6 +495,7 @@ ENDPROC(__und_usr)
495 * The out of line fixup for the ldrt above. 495 * The out of line fixup for the ldrt above.
496 */ 496 */
497 .pushsection .fixup, "ax" 497 .pushsection .fixup, "ax"
498 .align 2
4984: mov pc, r9 4994: mov pc, r9
499 .popsection 500 .popsection
500 .pushsection __ex_table,"a" 501 .pushsection __ex_table,"a"
diff --git a/arch/arm/kernel/kprobes-test-arm.c b/arch/arm/kernel/kprobes-test-arm.c
index ba32b393b3f0..38c1a3b103a0 100644
--- a/arch/arm/kernel/kprobes-test-arm.c
+++ b/arch/arm/kernel/kprobes-test-arm.c
@@ -187,8 +187,8 @@ void kprobe_arm_test_cases(void)
187 TEST_BF_R ("mov pc, r",0,2f,"") 187 TEST_BF_R ("mov pc, r",0,2f,"")
188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"") 188 TEST_BF_RR("mov pc, r",0,2f,", asl r",1,0,"")
189 TEST_BB( "sub pc, pc, #1b-2b+8") 189 TEST_BB( "sub pc, pc, #1b-2b+8")
190#if __LINUX_ARM_ARCH__ >= 6 190#if __LINUX_ARM_ARCH__ == 6 && !defined(CONFIG_CPU_V7)
191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before ARMv6 */ 191 TEST_BB( "sub pc, pc, #1b-2b+8-2") /* UNPREDICTABLE before and after ARMv6 */
192#endif 192#endif
193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"") 193 TEST_BB_R( "sub pc, pc, r",14, 1f-2f+8,"")
194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc") 194 TEST_BB_R( "rsb pc, r",14,1f-2f+8,", pc")
diff --git a/arch/arm/kernel/kprobes-thumb.c b/arch/arm/kernel/kprobes-thumb.c
index 8f96ec778e8d..6123daf397a7 100644
--- a/arch/arm/kernel/kprobes-thumb.c
+++ b/arch/arm/kernel/kprobes-thumb.c
@@ -660,7 +660,7 @@ static const union decode_item t32_table_1111_100x[] = {
660 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */ 660 /* LDRSB (literal) 1111 1001 x001 1111 xxxx xxxx xxxx xxxx */
661 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */ 661 /* LDRH (literal) 1111 1000 x011 1111 xxxx xxxx xxxx xxxx */
662 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */ 662 /* LDRSH (literal) 1111 1001 x011 1111 xxxx xxxx xxxx xxxx */
663 DECODE_EMULATEX (0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal, 663 DECODE_SIMULATEX(0xfe5f0000, 0xf81f0000, t32_simulate_ldr_literal,
664 REGS(PC, NOSPPCX, 0, 0, 0)), 664 REGS(PC, NOSPPCX, 0, 0, 0)),
665 665
666 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */ 666 /* STRB (immediate) 1111 1000 0000 xxxx xxxx 1xxx xxxx xxxx */
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 186c8cb982c5..a02eada3aa5d 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -503,7 +503,7 @@ __hw_perf_event_init(struct perf_event *event)
503 event_requires_mode_exclusion(&event->attr)) { 503 event_requires_mode_exclusion(&event->attr)) {
504 pr_debug("ARM performance counters do not support " 504 pr_debug("ARM performance counters do not support "
505 "mode exclusion\n"); 505 "mode exclusion\n");
506 return -EPERM; 506 return -EOPNOTSUPP;
507 } 507 }
508 508
509 /* 509 /*
diff --git a/arch/arm/kernel/ptrace.c b/arch/arm/kernel/ptrace.c
index 5700a7ae7f0b..14e38261cd31 100644
--- a/arch/arm/kernel/ptrace.c
+++ b/arch/arm/kernel/ptrace.c
@@ -25,7 +25,6 @@
25#include <linux/regset.h> 25#include <linux/regset.h>
26#include <linux/audit.h> 26#include <linux/audit.h>
27#include <linux/tracehook.h> 27#include <linux/tracehook.h>
28#include <linux/unistd.h>
29 28
30#include <asm/pgtable.h> 29#include <asm/pgtable.h>
31#include <asm/traps.h> 30#include <asm/traps.h>
@@ -918,8 +917,6 @@ asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
918 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0, 917 audit_syscall_entry(AUDIT_ARCH_ARM, scno, regs->ARM_r0,
919 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3); 918 regs->ARM_r1, regs->ARM_r2, regs->ARM_r3);
920 919
921 if (why == 0 && test_and_clear_thread_flag(TIF_SYSCALL_RESTARTSYS))
922 scno = __NR_restart_syscall - __NR_SYSCALL_BASE;
923 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 920 if (!test_thread_flag(TIF_SYSCALL_TRACE))
924 return scno; 921 return scno;
925 922
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index fd2392a17ac1..536c5d6b340b 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -27,6 +27,7 @@
27 */ 27 */
28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 28#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)) 29#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
30#define SWI_SYS_RESTART (0xef000000|__NR_restart_syscall|__NR_OABI_SYSCALL_BASE)
30 31
31/* 32/*
32 * With EABI, the syscall number has to be loaded into r7. 33 * With EABI, the syscall number has to be loaded into r7.
@@ -47,6 +48,18 @@ const unsigned long sigreturn_codes[7] = {
47}; 48};
48 49
49/* 50/*
51 * Either we support OABI only, or we have EABI with the OABI
52 * compat layer enabled. In the later case we don't know if
53 * user space is EABI or not, and if not we must not clobber r7.
54 * Always using the OABI syscall solves that issue and works for
55 * all those cases.
56 */
57const unsigned long syscall_restart_code[2] = {
58 SWI_SYS_RESTART, /* swi __NR_restart_syscall */
59 0xe49df004, /* ldr pc, [sp], #4 */
60};
61
62/*
50 * atomically swap in the new signal mask, and wait for a signal. 63 * atomically swap in the new signal mask, and wait for a signal.
51 */ 64 */
52asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask) 65asmlinkage int sys_sigsuspend(int restart, unsigned long oldmask, old_sigset_t mask)
@@ -592,10 +605,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
592 case -ERESTARTNOHAND: 605 case -ERESTARTNOHAND:
593 case -ERESTARTSYS: 606 case -ERESTARTSYS:
594 case -ERESTARTNOINTR: 607 case -ERESTARTNOINTR:
595 case -ERESTART_RESTARTBLOCK:
596 regs->ARM_r0 = regs->ARM_ORIG_r0; 608 regs->ARM_r0 = regs->ARM_ORIG_r0;
597 regs->ARM_pc = restart_addr; 609 regs->ARM_pc = restart_addr;
598 break; 610 break;
611 case -ERESTART_RESTARTBLOCK:
612 regs->ARM_r0 = -EINTR;
613 break;
599 } 614 }
600 } 615 }
601 616
@@ -611,14 +626,12 @@ static void do_signal(struct pt_regs *regs, int syscall)
611 * debugger has chosen to restart at a different PC. 626 * debugger has chosen to restart at a different PC.
612 */ 627 */
613 if (regs->ARM_pc == restart_addr) { 628 if (regs->ARM_pc == restart_addr) {
614 if (retval == -ERESTARTNOHAND || 629 if (retval == -ERESTARTNOHAND
615 retval == -ERESTART_RESTARTBLOCK
616 || (retval == -ERESTARTSYS 630 || (retval == -ERESTARTSYS
617 && !(ka.sa.sa_flags & SA_RESTART))) { 631 && !(ka.sa.sa_flags & SA_RESTART))) {
618 regs->ARM_r0 = -EINTR; 632 regs->ARM_r0 = -EINTR;
619 regs->ARM_pc = continue_addr; 633 regs->ARM_pc = continue_addr;
620 } 634 }
621 clear_thread_flag(TIF_SYSCALL_RESTARTSYS);
622 } 635 }
623 636
624 handle_signal(signr, &ka, &info, regs); 637 handle_signal(signr, &ka, &info, regs);
@@ -632,8 +645,29 @@ static void do_signal(struct pt_regs *regs, int syscall)
632 * ignore the restart. 645 * ignore the restart.
633 */ 646 */
634 if (retval == -ERESTART_RESTARTBLOCK 647 if (retval == -ERESTART_RESTARTBLOCK
635 && regs->ARM_pc == restart_addr) 648 && regs->ARM_pc == continue_addr) {
636 set_thread_flag(TIF_SYSCALL_RESTARTSYS); 649 if (thumb_mode(regs)) {
650 regs->ARM_r7 = __NR_restart_syscall - __NR_SYSCALL_BASE;
651 regs->ARM_pc -= 2;
652 } else {
653#if defined(CONFIG_AEABI) && !defined(CONFIG_OABI_COMPAT)
654 regs->ARM_r7 = __NR_restart_syscall;
655 regs->ARM_pc -= 4;
656#else
657 u32 __user *usp;
658
659 regs->ARM_sp -= 4;
660 usp = (u32 __user *)regs->ARM_sp;
661
662 if (put_user(regs->ARM_pc, usp) == 0) {
663 regs->ARM_pc = KERN_RESTART_CODE;
664 } else {
665 regs->ARM_sp += 4;
666 force_sigsegv(0, current);
667 }
668#endif
669 }
670 }
637 } 671 }
638 672
639 restore_saved_sigmask(); 673 restore_saved_sigmask();
diff --git a/arch/arm/kernel/signal.h b/arch/arm/kernel/signal.h
index 5ff067b7c752..6fcfe8398aa4 100644
--- a/arch/arm/kernel/signal.h
+++ b/arch/arm/kernel/signal.h
@@ -8,5 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500) 10#define KERN_SIGRETURN_CODE (CONFIG_VECTORS_BASE + 0x00000500)
11#define KERN_RESTART_CODE (KERN_SIGRETURN_CODE + sizeof(sigreturn_codes))
11 12
12extern const unsigned long sigreturn_codes[7]; 13extern const unsigned long sigreturn_codes[7];
14extern const unsigned long syscall_restart_code[2];
diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c
index 4928d89758f4..3647170e9a16 100644
--- a/arch/arm/kernel/traps.c
+++ b/arch/arm/kernel/traps.c
@@ -820,6 +820,8 @@ void __init early_trap_init(void *vectors_base)
820 */ 820 */
821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE), 821 memcpy((void *)(vectors + KERN_SIGRETURN_CODE - CONFIG_VECTORS_BASE),
822 sigreturn_codes, sizeof(sigreturn_codes)); 822 sigreturn_codes, sizeof(sigreturn_codes));
823 memcpy((void *)(vectors + KERN_RESTART_CODE - CONFIG_VECTORS_BASE),
824 syscall_restart_code, sizeof(syscall_restart_code));
823 825
824 flush_icache_range(vectors, vectors + PAGE_SIZE); 826 flush_icache_range(vectors, vectors + PAGE_SIZE);
825 modify_domain(DOMAIN_USER, DOMAIN_CLIENT); 827 modify_domain(DOMAIN_USER, DOMAIN_CLIENT);
diff --git a/arch/arm/kernel/vmlinux.lds.S b/arch/arm/kernel/vmlinux.lds.S
index 43a31fb06318..36ff15bbfdd4 100644
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -183,7 +183,9 @@ SECTIONS
183 } 183 }
184#endif 184#endif
185 185
186#ifdef CONFIG_SMP
186 PERCPU_SECTION(L1_CACHE_BYTES) 187 PERCPU_SECTION(L1_CACHE_BYTES)
188#endif
187 189
188#ifdef CONFIG_XIP_KERNEL 190#ifdef CONFIG_XIP_KERNEL
189 __data_loc = ALIGN(4); /* location in binary */ 191 __data_loc = ALIGN(4); /* location in binary */
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 226949dc4ac0..f953bb54aa9d 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -50,5 +50,6 @@
50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c) 50#define POWER_MANAGEMENT (BRIDGE_VIRT_BASE | 0x011c)
51 51
52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 52#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
53#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
53 54
54#endif 55#endif
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index ad1165d488c1..d52b0ef313b7 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -78,6 +78,7 @@
78 78
79/* North-South Bridge */ 79/* North-South Bridge */
80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000) 80#define BRIDGE_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0x20000)
81#define BRIDGE_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x20000)
81 82
82/* Cryptographic Engine */ 83/* Cryptographic Engine */
83#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000) 84#define DOVE_CRYPT_PHYS_BASE (DOVE_SB_REGS_PHYS_BASE | 0x30000)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 573be57d3d28..6f6d13f91e4c 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -212,7 +212,7 @@ config MACH_SMDKV310
212 select EXYNOS_DEV_SYSMMU 212 select EXYNOS_DEV_SYSMMU
213 select EXYNOS4_DEV_AHCI 213 select EXYNOS4_DEV_AHCI
214 select SAMSUNG_DEV_KEYPAD 214 select SAMSUNG_DEV_KEYPAD
215 select EXYNOS4_DEV_DMA 215 select EXYNOS_DEV_DMA
216 select SAMSUNG_DEV_PWM 216 select SAMSUNG_DEV_PWM
217 select EXYNOS4_DEV_USB_OHCI 217 select EXYNOS4_DEV_USB_OHCI
218 select EXYNOS4_SETUP_FIMD0 218 select EXYNOS4_SETUP_FIMD0
@@ -264,7 +264,7 @@ config MACH_UNIVERSAL_C210
264 select S5P_DEV_ONENAND 264 select S5P_DEV_ONENAND
265 select S5P_DEV_TV 265 select S5P_DEV_TV
266 select EXYNOS_DEV_SYSMMU 266 select EXYNOS_DEV_SYSMMU
267 select EXYNOS4_DEV_DMA 267 select EXYNOS_DEV_DMA
268 select EXYNOS_DEV_DRM 268 select EXYNOS_DEV_DRM
269 select EXYNOS4_SETUP_FIMD0 269 select EXYNOS4_SETUP_FIMD0
270 select EXYNOS4_SETUP_I2C1 270 select EXYNOS4_SETUP_I2C1
@@ -303,7 +303,7 @@ config MACH_NURI
303 select S5P_DEV_MFC 303 select S5P_DEV_MFC
304 select S5P_DEV_USB_EHCI 304 select S5P_DEV_USB_EHCI
305 select S5P_SETUP_MIPIPHY 305 select S5P_SETUP_MIPIPHY
306 select EXYNOS4_DEV_DMA 306 select EXYNOS_DEV_DMA
307 select EXYNOS_DEV_DRM 307 select EXYNOS_DEV_DRM
308 select EXYNOS4_SETUP_FIMC 308 select EXYNOS4_SETUP_FIMC
309 select EXYNOS4_SETUP_FIMD0 309 select EXYNOS4_SETUP_FIMD0
@@ -341,7 +341,7 @@ config MACH_ORIGEN
341 select SAMSUNG_DEV_PWM 341 select SAMSUNG_DEV_PWM
342 select EXYNOS_DEV_DRM 342 select EXYNOS_DEV_DRM
343 select EXYNOS_DEV_SYSMMU 343 select EXYNOS_DEV_SYSMMU
344 select EXYNOS4_DEV_DMA 344 select EXYNOS_DEV_DMA
345 select EXYNOS4_DEV_USB_OHCI 345 select EXYNOS4_DEV_USB_OHCI
346 select EXYNOS4_SETUP_FIMD0 346 select EXYNOS4_SETUP_FIMD0
347 select EXYNOS4_SETUP_SDHCI 347 select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index e9fafcf163de..373c3c00d24c 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -119,7 +119,9 @@ static __init void exynos_pm_add_dev_to_genpd(struct platform_device *pdev,
119 struct exynos_pm_domain *pd) 119 struct exynos_pm_domain *pd)
120{ 120{
121 if (pdev->dev.bus) { 121 if (pdev->dev.bus) {
122 if (pm_genpd_add_device(&pd->pd, &pdev->dev)) 122 if (!pm_genpd_add_device(&pd->pd, &pdev->dev))
123 pm_genpd_dev_need_restore(&pdev->dev, true);
124 else
123 pr_info("%s: error in adding %s device to %s power" 125 pr_info("%s: error in adding %s device to %s power"
124 "domain\n", __func__, dev_name(&pdev->dev), 126 "domain\n", __func__, dev_name(&pdev->dev),
125 pd->name); 127 pd->name);
@@ -151,9 +153,12 @@ static __init int exynos4_pm_init_power_domain(void)
151 if (of_have_populated_dt()) 153 if (of_have_populated_dt())
152 return exynos_pm_dt_parse_domains(); 154 return exynos_pm_dt_parse_domains();
153 155
154 for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) 156 for (idx = 0; idx < ARRAY_SIZE(exynos4_pm_domains); idx++) {
155 pm_genpd_init(&exynos4_pm_domains[idx]->pd, NULL, 157 struct exynos_pm_domain *pd = exynos4_pm_domains[idx];
156 exynos4_pm_domains[idx]->is_off); 158 int on = __raw_readl(pd->base + 0x4) & S5P_INT_LOCAL_PWR_EN;
159
160 pm_genpd_init(&pd->pd, NULL, !on);
161 }
157 162
158#ifdef CONFIG_S5P_DEV_FIMD0 163#ifdef CONFIG_S5P_DEV_FIMD0
159 exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0); 164 exynos_pm_add_dev_to_genpd(&s5p_device_fimd0, &exynos4_pd_lcd0);
diff --git a/arch/arm/mach-highbank/Makefile b/arch/arm/mach-highbank/Makefile
index f8437dd238c2..ded4652ada80 100644
--- a/arch/arm/mach-highbank/Makefile
+++ b/arch/arm/mach-highbank/Makefile
@@ -1,4 +1,8 @@
1obj-y := clock.o highbank.o system.o 1obj-y := clock.o highbank.o system.o smc.o
2
3plus_sec := $(call as-instr,.arch_extension sec,+sec)
4AFLAGS_smc.o :=-Wa,-march=armv7-a$(plus_sec)
5
2obj-$(CONFIG_DEBUG_HIGHBANK_UART) += lluart.o 6obj-$(CONFIG_DEBUG_HIGHBANK_UART) += lluart.o
3obj-$(CONFIG_SMP) += platsmp.o 7obj-$(CONFIG_SMP) += platsmp.o
4obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o 8obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
diff --git a/arch/arm/mach-highbank/core.h b/arch/arm/mach-highbank/core.h
index d8e2d0be64ac..141ed5171826 100644
--- a/arch/arm/mach-highbank/core.h
+++ b/arch/arm/mach-highbank/core.h
@@ -8,3 +8,4 @@ extern void highbank_lluart_map_io(void);
8static inline void highbank_lluart_map_io(void) {} 8static inline void highbank_lluart_map_io(void) {}
9#endif 9#endif
10 10
11extern void highbank_smc1(int fn, int arg);
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 410a112bb52e..8777612b1a42 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -85,10 +85,24 @@ const static struct of_device_id irq_match[] = {
85 {} 85 {}
86}; 86};
87 87
88#ifdef CONFIG_CACHE_L2X0
89static void highbank_l2x0_disable(void)
90{
91 /* Disable PL310 L2 Cache controller */
92 highbank_smc1(0x102, 0x0);
93}
94#endif
95
88static void __init highbank_init_irq(void) 96static void __init highbank_init_irq(void)
89{ 97{
90 of_irq_init(irq_match); 98 of_irq_init(irq_match);
99
100#ifdef CONFIG_CACHE_L2X0
101 /* Enable PL310 L2 Cache controller */
102 highbank_smc1(0x102, 0x1);
91 l2x0_of_init(0, ~0UL); 103 l2x0_of_init(0, ~0UL);
104 outer_cache.disable = highbank_l2x0_disable;
105#endif
92} 106}
93 107
94static void __init highbank_timer_init(void) 108static void __init highbank_timer_init(void)
diff --git a/arch/arm/mach-highbank/smc.S b/arch/arm/mach-highbank/smc.S
new file mode 100644
index 000000000000..407d17baaaa9
--- /dev/null
+++ b/arch/arm/mach-highbank/smc.S
@@ -0,0 +1,27 @@
1/*
2 * Copied from omap44xx-smc.S Copyright (C) 2010 Texas Instruments, Inc.
3 * Copyright 2012 Calxeda, Inc.
4 *
5 * This program is free software,you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#include <linux/linkage.h>
11
12/*
13 * This is common routine to manage secure monitor API
14 * used to modify the PL310 secure registers.
15 * 'r0' contains the value to be modified and 'r12' contains
16 * the monitor API number.
17 * Function signature : void highbank_smc1(u32 fn, u32 arg)
18 */
19
20ENTRY(highbank_smc1)
21 stmfd sp!, {r4-r11, lr}
22 mov r12, r0
23 mov r0, r1
24 dsb
25 smc #0
26 ldmfd sp!, {r4-r11, pc}
27ENDPROC(highbank_smc1)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 0021f726b153..eff4db5de0dd 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -477,6 +477,7 @@ config MACH_MX31_3DS
477 select IMX_HAVE_PLATFORM_IMX2_WDT 477 select IMX_HAVE_PLATFORM_IMX2_WDT
478 select IMX_HAVE_PLATFORM_IMX_I2C 478 select IMX_HAVE_PLATFORM_IMX_I2C
479 select IMX_HAVE_PLATFORM_IMX_KEYPAD 479 select IMX_HAVE_PLATFORM_IMX_KEYPAD
480 select IMX_HAVE_PLATFORM_IMX_SSI
480 select IMX_HAVE_PLATFORM_IMX_UART 481 select IMX_HAVE_PLATFORM_IMX_UART
481 select IMX_HAVE_PLATFORM_IPU_CORE 482 select IMX_HAVE_PLATFORM_IPU_CORE
482 select IMX_HAVE_PLATFORM_MXC_EHCI 483 select IMX_HAVE_PLATFORM_MXC_EHCI
diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c
index 0f0beb580b73..516ddee1948e 100644
--- a/arch/arm/mach-imx/clk-imx1.c
+++ b/arch/arm/mach-imx/clk-imx1.c
@@ -108,8 +108,7 @@ int __init mx1_clocks_init(unsigned long fref)
108 clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0"); 108 clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
109 clk_register_clkdev(clk[clko], "clko", NULL); 109 clk_register_clkdev(clk[clko], "clko", NULL);
110 110
111 mxc_timer_init(NULL, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), 111 mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
112 MX1_TIM1_INT);
113 112
114 return 0; 113 return 0;
115} 114}
diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c
index 4e4f384ee8dd..ea13e61bd5f3 100644
--- a/arch/arm/mach-imx/clk-imx21.c
+++ b/arch/arm/mach-imx/clk-imx21.c
@@ -180,7 +180,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
180 clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL); 180 clk_register_clkdev(clk[sdhc1_ipg_gate], "sdhc1", NULL);
181 clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL); 181 clk_register_clkdev(clk[sdhc2_ipg_gate], "sdhc2", NULL);
182 182
183 mxc_timer_init(NULL, MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), 183 mxc_timer_init(MX21_IO_ADDRESS(MX21_GPT1_BASE_ADDR), MX21_INT_GPT1);
184 MX21_INT_GPT1); 184
185 return 0; 185 return 0;
186} 186}
diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c
index d9833bb5fd61..fdd8cc87c9fe 100644
--- a/arch/arm/mach-imx/clk-imx25.c
+++ b/arch/arm/mach-imx/clk-imx25.c
@@ -243,6 +243,6 @@ int __init mx25_clocks_init(void)
243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma"); 243 clk_register_clkdev(clk[sdma_ahb], "ahb", "imx35-sdma");
244 clk_register_clkdev(clk[iim_ipg], "iim", NULL); 244 clk_register_clkdev(clk[iim_ipg], "iim", NULL);
245 245
246 mxc_timer_init(NULL, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); 246 mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
247 return 0; 247 return 0;
248} 248}
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 50a7ebd8d1b2..295cbd7c08dc 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -263,8 +263,7 @@ int __init mx27_clocks_init(unsigned long fref)
263 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0"); 263 clk_register_clkdev(clk[ssi1_baud_gate], "bitrate" , "imx-ssi.0");
264 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1"); 264 clk_register_clkdev(clk[ssi2_baud_gate], "bitrate" , "imx-ssi.1");
265 265
266 mxc_timer_init(NULL, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), 266 mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
267 MX27_INT_GPT1);
268 267
269 clk_prepare_enable(clk[emi_ahb_gate]); 268 clk_prepare_enable(clk[emi_ahb_gate]);
270 269
diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c
index a854b9cae5ea..c9a06d800f8e 100644
--- a/arch/arm/mach-imx/clk-imx31.c
+++ b/arch/arm/mach-imx/clk-imx31.c
@@ -175,8 +175,7 @@ int __init mx31_clocks_init(unsigned long fref)
175 mx31_revision(); 175 mx31_revision();
176 clk_disable_unprepare(clk[iim_gate]); 176 clk_disable_unprepare(clk[iim_gate]);
177 177
178 mxc_timer_init(NULL, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), 178 mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
179 MX31_INT_GPT);
180 179
181 return 0; 180 return 0;
182} 181}
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index a9e60bf7dd75..c6422fb10bae 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
201 pr_err("i.MX35 clk %d: register failed with %ld\n", 201 pr_err("i.MX35 clk %d: register failed with %ld\n",
202 i, PTR_ERR(clk[i])); 202 i, PTR_ERR(clk[i]));
203 203
204
205 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx"); 204 clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
206 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0"); 205 clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
207 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1"); 206 clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,14 +263,20 @@ int __init mx35_clocks_init()
264 clk_prepare_enable(clk[iim_gate]); 263 clk_prepare_enable(clk[iim_gate]);
265 clk_prepare_enable(clk[emi_gate]); 264 clk_prepare_enable(clk[emi_gate]);
266 265
266 /*
267 * SCC is needed to boot via mmc after a watchdog reset. The clock code
268 * before conversion to common clk also enabled UART1 (which isn't
269 * handled here and not needed for mmc) and IIM (which is enabled
270 * unconditionally above).
271 */
272 clk_prepare_enable(clk[scc_gate]);
273
267 imx_print_silicon_rev("i.MX35", mx35_revision()); 274 imx_print_silicon_rev("i.MX35", mx35_revision());
268 275
269#ifdef CONFIG_MXC_USE_EPIT 276#ifdef CONFIG_MXC_USE_EPIT
270 epit_timer_init(&epit1_clk, 277 epit_timer_init(MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
271 MX35_IO_ADDRESS(MX35_EPIT1_BASE_ADDR), MX35_INT_EPIT1);
272#else 278#else
273 mxc_timer_init(NULL, MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), 279 mxc_timer_init(MX35_IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
274 MX35_INT_GPT);
275#endif 280#endif
276 281
277 return 0; 282 return 0;
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index fcd94f3b0f0e..a2200c77bf70 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -104,12 +104,12 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
104 periph_apm_sel, ARRAY_SIZE(periph_apm_sel)); 104 periph_apm_sel, ARRAY_SIZE(periph_apm_sel));
105 clk[main_bus] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1, 105 clk[main_bus] = imx_clk_mux("main_bus", MXC_CCM_CBCDR, 25, 1,
106 main_bus_sel, ARRAY_SIZE(main_bus_sel)); 106 main_bus_sel, ARRAY_SIZE(main_bus_sel));
107 clk[per_lp_apm] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCDR, 1, 1, 107 clk[per_lp_apm] = imx_clk_mux("per_lp_apm", MXC_CCM_CBCMR, 1, 1,
108 per_lp_apm_sel, ARRAY_SIZE(per_lp_apm_sel)); 108 per_lp_apm_sel, ARRAY_SIZE(per_lp_apm_sel));
109 clk[per_pred1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2); 109 clk[per_pred1] = imx_clk_divider("per_pred1", "per_lp_apm", MXC_CCM_CBCDR, 6, 2);
110 clk[per_pred2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3); 110 clk[per_pred2] = imx_clk_divider("per_pred2", "per_pred1", MXC_CCM_CBCDR, 3, 3);
111 clk[per_podf] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3); 111 clk[per_podf] = imx_clk_divider("per_podf", "per_pred2", MXC_CCM_CBCDR, 0, 3);
112 clk[per_root] = imx_clk_mux("per_root", MXC_CCM_CBCDR, 1, 0, 112 clk[per_root] = imx_clk_mux("per_root", MXC_CCM_CBCMR, 0, 1,
113 per_root_sel, ARRAY_SIZE(per_root_sel)); 113 per_root_sel, ARRAY_SIZE(per_root_sel));
114 clk[ahb] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3); 114 clk[ahb] = imx_clk_divider("ahb", "main_bus", MXC_CCM_CBCDR, 10, 3);
115 clk[ahb_max] = imx_clk_gate2("ahb_max", "ahb", MXC_CCM_CCGR0, 28); 115 clk[ahb_max] = imx_clk_gate2("ahb_max", "ahb", MXC_CCM_CCGR0, 28);
@@ -172,7 +172,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
172 clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "ipg", MXC_CCM_CCGR2, 12); 172 clk[pwm1_hf_gate] = imx_clk_gate2("pwm1_hf_gate", "ipg", MXC_CCM_CCGR2, 12);
173 clk[pwm2_ipg_gate] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14); 173 clk[pwm2_ipg_gate] = imx_clk_gate2("pwm2_ipg_gate", "ipg", MXC_CCM_CCGR2, 14);
174 clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "ipg", MXC_CCM_CCGR2, 16); 174 clk[pwm2_hf_gate] = imx_clk_gate2("pwm2_hf_gate", "ipg", MXC_CCM_CCGR2, 16);
175 clk[gpt_gate] = imx_clk_gate2("gpt_gate", "ipg", MXC_CCM_CCGR2, 18); 175 clk[gpt_gate] = imx_clk_gate2("gpt_gate", "per_root", MXC_CCM_CCGR2, 18);
176 clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24); 176 clk[fec_gate] = imx_clk_gate2("fec_gate", "ipg", MXC_CCM_CCGR2, 24);
177 clk[usboh3_gate] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26); 177 clk[usboh3_gate] = imx_clk_gate2("usboh3_gate", "ipg", MXC_CCM_CCGR2, 26);
178 clk[usboh3_per_gate] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28); 178 clk[usboh3_per_gate] = imx_clk_gate2("usboh3_per_gate", "usboh3_podf", MXC_CCM_CCGR2, 28);
@@ -366,8 +366,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
366 clk_set_rate(clk[esdhc_b_podf], 166250000); 366 clk_set_rate(clk[esdhc_b_podf], 166250000);
367 367
368 /* System timer */ 368 /* System timer */
369 mxc_timer_init(NULL, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), 369 mxc_timer_init(MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), MX51_INT_GPT);
370 MX51_INT_GPT);
371 370
372 clk_prepare_enable(clk[iim_gate]); 371 clk_prepare_enable(clk[iim_gate]);
373 imx_print_silicon_rev("i.MX51", mx51_revision()); 372 imx_print_silicon_rev("i.MX51", mx51_revision());
@@ -452,8 +451,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
452 clk_set_rate(clk[esdhc_b_podf], 200000000); 451 clk_set_rate(clk[esdhc_b_podf], 200000000);
453 452
454 /* System timer */ 453 /* System timer */
455 mxc_timer_init(NULL, MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), 454 mxc_timer_init(MX53_IO_ADDRESS(MX53_GPT1_BASE_ADDR), MX53_INT_GPT);
456 MX53_INT_GPT);
457 455
458 clk_prepare_enable(clk[iim_gate]); 456 clk_prepare_enable(clk[iim_gate]);
459 imx_print_silicon_rev("i.MX53", mx53_revision()); 457 imx_print_silicon_rev("i.MX53", mx53_revision());
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index cab02d0a15d6..e1a17ac7b3b4 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -122,10 +122,6 @@ static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5
122 "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0", 122 "dummy", "axi", "enfc", "ipu1_di0", "ipu1_di1", "ipu2_di0",
123 "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio", }; 123 "ipu2_di1", "ahb", "ipg", "ipg_per", "ckil", "pll4_audio", };
124 124
125static const char * const clks_init_on[] __initconst = {
126 "mmdc_ch0_axi", "mmdc_ch1_axi", "usboh3",
127};
128
129enum mx6q_clks { 125enum mx6q_clks {
130 dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m, 126 dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m,
131 pll3_pfd0_720m, pll3_pfd1_540m, pll3_pfd2_508m, pll3_pfd3_454m, 127 pll3_pfd0_720m, pll3_pfd1_540m, pll3_pfd2_508m, pll3_pfd3_454m,
@@ -156,16 +152,20 @@ enum mx6q_clks {
156 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3, 152 ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
157 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg, 153 usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
158 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg, 154 pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
159 ssi2_ipg, ssi3_ipg, clk_max 155 ssi2_ipg, ssi3_ipg, rom,
156 clk_max
160}; 157};
161 158
162static struct clk *clk[clk_max]; 159static struct clk *clk[clk_max];
163 160
161static enum mx6q_clks const clks_init_on[] __initconst = {
162 mmdc_ch0_axi, rom,
163};
164
164int __init mx6q_clocks_init(void) 165int __init mx6q_clocks_init(void)
165{ 166{
166 struct device_node *np; 167 struct device_node *np;
167 void __iomem *base; 168 void __iomem *base;
168 struct clk *c;
169 int i, irq; 169 int i, irq;
170 170
171 clk[dummy] = imx_clk_fixed("dummy", 0); 171 clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -365,6 +365,7 @@ int __init mx6q_clocks_init(void)
365 clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26); 365 clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26);
366 clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28); 366 clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28);
367 clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30); 367 clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30);
368 clk[rom] = imx_clk_gate2("rom", "ahb", base + 0x7c, 0);
368 clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4); 369 clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4);
369 clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6); 370 clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
370 clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12); 371 clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
@@ -424,21 +425,14 @@ int __init mx6q_clocks_init(void)
424 clk_register_clkdev(clk[ahb], "ahb", NULL); 425 clk_register_clkdev(clk[ahb], "ahb", NULL);
425 clk_register_clkdev(clk[cko1], "cko1", NULL); 426 clk_register_clkdev(clk[cko1], "cko1", NULL);
426 427
427 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) { 428 for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
428 c = clk_get_sys(clks_init_on[i], NULL); 429 clk_prepare_enable(clk[clks_init_on[i]]);
429 if (IS_ERR(c)) {
430 pr_err("%s: failed to get clk %s", __func__,
431 clks_init_on[i]);
432 return PTR_ERR(c);
433 }
434 clk_prepare_enable(c);
435 }
436 430
437 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"); 431 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
438 base = of_iomap(np, 0); 432 base = of_iomap(np, 0);
439 WARN_ON(!base); 433 WARN_ON(!base);
440 irq = irq_of_parse_and_map(np, 0); 434 irq = irq_of_parse_and_map(np, 0);
441 mxc_timer_init(NULL, base, irq); 435 mxc_timer_init(base, irq);
442 436
443 return 0; 437 return 0;
444} 438}
diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c
index 4685919deb63..0440379e3628 100644
--- a/arch/arm/mach-imx/clk-pllv2.c
+++ b/arch/arm/mach-imx/clk-pllv2.c
@@ -74,30 +74,15 @@ struct clk_pllv2 {
74 void __iomem *base; 74 void __iomem *base;
75}; 75};
76 76
77static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw, 77static unsigned long __clk_pllv2_recalc_rate(unsigned long parent_rate,
78 unsigned long parent_rate) 78 u32 dp_ctl, u32 dp_op, u32 dp_mfd, u32 dp_mfn)
79{ 79{
80 long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; 80 long mfi, mfn, mfd, pdf, ref_clk, mfn_abs;
81 unsigned long dp_op, dp_mfd, dp_mfn, dp_ctl, pll_hfsm, dbl; 81 unsigned long dbl;
82 void __iomem *pllbase;
83 s64 temp; 82 s64 temp;
84 struct clk_pllv2 *pll = to_clk_pllv2(hw);
85
86 pllbase = pll->base;
87 83
88 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
89 pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM;
90 dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN; 84 dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN;
91 85
92 if (pll_hfsm == 0) {
93 dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
94 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
95 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
96 } else {
97 dp_op = __raw_readl(pllbase + MXC_PLL_DP_HFS_OP);
98 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFD);
99 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_HFS_MFN);
100 }
101 pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK; 86 pdf = dp_op & MXC_PLL_DP_OP_PDF_MASK;
102 mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET; 87 mfi = (dp_op & MXC_PLL_DP_OP_MFI_MASK) >> MXC_PLL_DP_OP_MFI_OFFSET;
103 mfi = (mfi <= 5) ? 5 : mfi; 88 mfi = (mfi <= 5) ? 5 : mfi;
@@ -123,18 +108,30 @@ static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,
123 return temp; 108 return temp;
124} 109}
125 110
126static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate, 111static unsigned long clk_pllv2_recalc_rate(struct clk_hw *hw,
127 unsigned long parent_rate) 112 unsigned long parent_rate)
128{ 113{
114 u32 dp_op, dp_mfd, dp_mfn, dp_ctl;
115 void __iomem *pllbase;
129 struct clk_pllv2 *pll = to_clk_pllv2(hw); 116 struct clk_pllv2 *pll = to_clk_pllv2(hw);
117
118 pllbase = pll->base;
119
120 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
121 dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
122 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
123 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
124
125 return __clk_pllv2_recalc_rate(parent_rate, dp_ctl, dp_op, dp_mfd, dp_mfn);
126}
127
128static int __clk_pllv2_set_rate(unsigned long rate, unsigned long parent_rate,
129 u32 *dp_op, u32 *dp_mfd, u32 *dp_mfn)
130{
130 u32 reg; 131 u32 reg;
131 void __iomem *pllbase;
132 long mfi, pdf, mfn, mfd = 999999; 132 long mfi, pdf, mfn, mfd = 999999;
133 s64 temp64; 133 s64 temp64;
134 unsigned long quad_parent_rate; 134 unsigned long quad_parent_rate;
135 unsigned long pll_hfsm, dp_ctl;
136
137 pllbase = pll->base;
138 135
139 quad_parent_rate = 4 * parent_rate; 136 quad_parent_rate = 4 * parent_rate;
140 pdf = mfi = -1; 137 pdf = mfi = -1;
@@ -144,25 +141,41 @@ static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
144 return -EINVAL; 141 return -EINVAL;
145 pdf--; 142 pdf--;
146 143
147 temp64 = rate * (pdf+1) - quad_parent_rate * mfi; 144 temp64 = rate * (pdf + 1) - quad_parent_rate * mfi;
148 do_div(temp64, quad_parent_rate/1000000); 145 do_div(temp64, quad_parent_rate / 1000000);
149 mfn = (long)temp64; 146 mfn = (long)temp64;
150 147
148 reg = mfi << 4 | pdf;
149
150 *dp_op = reg;
151 *dp_mfd = mfd;
152 *dp_mfn = mfn;
153
154 return 0;
155}
156
157static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
158 unsigned long parent_rate)
159{
160 struct clk_pllv2 *pll = to_clk_pllv2(hw);
161 void __iomem *pllbase;
162 u32 dp_ctl, dp_op, dp_mfd, dp_mfn;
163 int ret;
164
165 pllbase = pll->base;
166
167
168 ret = __clk_pllv2_set_rate(rate, parent_rate, &dp_op, &dp_mfd, &dp_mfn);
169 if (ret)
170 return ret;
171
151 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL); 172 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
152 /* use dpdck0_2 */ 173 /* use dpdck0_2 */
153 __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL); 174 __raw_writel(dp_ctl | 0x1000L, pllbase + MXC_PLL_DP_CTL);
154 pll_hfsm = dp_ctl & MXC_PLL_DP_CTL_HFSM; 175
155 if (pll_hfsm == 0) { 176 __raw_writel(dp_op, pllbase + MXC_PLL_DP_OP);
156 reg = mfi << 4 | pdf; 177 __raw_writel(dp_mfd, pllbase + MXC_PLL_DP_MFD);
157 __raw_writel(reg, pllbase + MXC_PLL_DP_OP); 178 __raw_writel(dp_mfn, pllbase + MXC_PLL_DP_MFN);
158 __raw_writel(mfd, pllbase + MXC_PLL_DP_MFD);
159 __raw_writel(mfn, pllbase + MXC_PLL_DP_MFN);
160 } else {
161 reg = mfi << 4 | pdf;
162 __raw_writel(reg, pllbase + MXC_PLL_DP_HFS_OP);
163 __raw_writel(mfd, pllbase + MXC_PLL_DP_HFS_MFD);
164 __raw_writel(mfn, pllbase + MXC_PLL_DP_HFS_MFN);
165 }
166 179
167 return 0; 180 return 0;
168} 181}
@@ -170,7 +183,11 @@ static int clk_pllv2_set_rate(struct clk_hw *hw, unsigned long rate,
170static long clk_pllv2_round_rate(struct clk_hw *hw, unsigned long rate, 183static long clk_pllv2_round_rate(struct clk_hw *hw, unsigned long rate,
171 unsigned long *prate) 184 unsigned long *prate)
172{ 185{
173 return rate; 186 u32 dp_op, dp_mfd, dp_mfn;
187
188 __clk_pllv2_set_rate(rate, *prate, &dp_op, &dp_mfd, &dp_mfn);
189 return __clk_pllv2_recalc_rate(*prate, MXC_PLL_DP_CTL_DPDCK0_2_EN,
190 dp_op, dp_mfd, dp_mfn);
174} 191}
175 192
176static int clk_pllv2_prepare(struct clk_hw *hw) 193static int clk_pllv2_prepare(struct clk_hw *hw)
diff --git a/arch/arm/mach-imx/crm-regs-imx5.h b/arch/arm/mach-imx/crm-regs-imx5.h
index 5e11ba7daee2..5e3f1f0f4cab 100644
--- a/arch/arm/mach-imx/crm-regs-imx5.h
+++ b/arch/arm/mach-imx/crm-regs-imx5.h
@@ -23,7 +23,7 @@
23#define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR) 23#define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR)
24#define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR) 24#define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR)
25#define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) 25#define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR)
26#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) 26#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR)
27 27
28/* PLL Register Offsets */ 28/* PLL Register Offsets */
29#define MXC_PLL_DP_CTL 0x00 29#define MXC_PLL_DP_CTL 0x00
diff --git a/arch/arm/mach-imx/hotplug.c b/arch/arm/mach-imx/hotplug.c
index 89493abd497c..20ed2d56c1af 100644
--- a/arch/arm/mach-imx/hotplug.c
+++ b/arch/arm/mach-imx/hotplug.c
@@ -12,6 +12,7 @@
12 12
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <asm/cacheflush.h> 14#include <asm/cacheflush.h>
15#include <asm/cp15.h>
15#include <mach/common.h> 16#include <mach/common.h>
16 17
17int platform_cpu_kill(unsigned int cpu) 18int platform_cpu_kill(unsigned int cpu)
@@ -19,6 +20,44 @@ int platform_cpu_kill(unsigned int cpu)
19 return 1; 20 return 1;
20} 21}
21 22
23static inline void cpu_enter_lowpower(void)
24{
25 unsigned int v;
26
27 flush_cache_all();
28 asm volatile(
29 "mcr p15, 0, %1, c7, c5, 0\n"
30 " mcr p15, 0, %1, c7, c10, 4\n"
31 /*
32 * Turn off coherency
33 */
34 " mrc p15, 0, %0, c1, c0, 1\n"
35 " bic %0, %0, %3\n"
36 " mcr p15, 0, %0, c1, c0, 1\n"
37 " mrc p15, 0, %0, c1, c0, 0\n"
38 " bic %0, %0, %2\n"
39 " mcr p15, 0, %0, c1, c0, 0\n"
40 : "=&r" (v)
41 : "r" (0), "Ir" (CR_C), "Ir" (0x40)
42 : "cc");
43}
44
45static inline void cpu_leave_lowpower(void)
46{
47 unsigned int v;
48
49 asm volatile(
50 "mrc p15, 0, %0, c1, c0, 0\n"
51 " orr %0, %0, %1\n"
52 " mcr p15, 0, %0, c1, c0, 0\n"
53 " mrc p15, 0, %0, c1, c0, 1\n"
54 " orr %0, %0, %2\n"
55 " mcr p15, 0, %0, c1, c0, 1\n"
56 : "=&r" (v)
57 : "Ir" (CR_C), "Ir" (0x40)
58 : "cc");
59}
60
22/* 61/*
23 * platform-specific code to shutdown a CPU 62 * platform-specific code to shutdown a CPU
24 * 63 *
@@ -26,9 +65,10 @@ int platform_cpu_kill(unsigned int cpu)
26 */ 65 */
27void platform_cpu_die(unsigned int cpu) 66void platform_cpu_die(unsigned int cpu)
28{ 67{
29 flush_cache_all(); 68 cpu_enter_lowpower();
30 imx_enable_cpu(cpu, false); 69 imx_enable_cpu(cpu, false);
31 cpu_do_idle(); 70 cpu_do_idle();
71 cpu_leave_lowpower();
32 72
33 /* We should never return from idle */ 73 /* We should never return from idle */
34 panic("cpu %d unexpectedly exit from shutdown\n", cpu); 74 panic("cpu %d unexpectedly exit from shutdown\n", cpu);
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c
index c515f8ede1a1..6450303f1a7a 100644
--- a/arch/arm/mach-imx/mach-cpuimx35.c
+++ b/arch/arm/mach-imx/mach-cpuimx35.c
@@ -70,7 +70,6 @@ static struct i2c_board_info eukrea_cpuimx35_i2c_devices[] = {
70 I2C_BOARD_INFO("pcf8563", 0x51), 70 I2C_BOARD_INFO("pcf8563", 0x51),
71 }, { 71 }, {
72 I2C_BOARD_INFO("tsc2007", 0x48), 72 I2C_BOARD_INFO("tsc2007", 0x48),
73 .type = "tsc2007",
74 .platform_data = &tsc2007_info, 73 .platform_data = &tsc2007_info,
75 .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO), 74 .irq = IMX_GPIO_TO_IRQ(TSC2007_IRQGPIO),
76 }, 75 },
diff --git a/arch/arm/mach-imx/mach-cpuimx51sd.c b/arch/arm/mach-imx/mach-cpuimx51sd.c
index ac50f1671e38..1e09de50cbcd 100644
--- a/arch/arm/mach-imx/mach-cpuimx51sd.c
+++ b/arch/arm/mach-imx/mach-cpuimx51sd.c
@@ -142,7 +142,6 @@ static struct i2c_board_info eukrea_cpuimx51sd_i2c_devices[] = {
142 I2C_BOARD_INFO("pcf8563", 0x51), 142 I2C_BOARD_INFO("pcf8563", 0x51),
143 }, { 143 }, {
144 I2C_BOARD_INFO("tsc2007", 0x49), 144 I2C_BOARD_INFO("tsc2007", 0x49),
145 .type = "tsc2007",
146 .platform_data = &tsc2007_info, 145 .platform_data = &tsc2007_info,
147 }, 146 },
148}; 147};
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
index dff82eb57cd9..ba09552fe5fe 100644
--- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
+++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c
@@ -38,7 +38,7 @@
38#include <asm/mach-types.h> 38#include <asm/mach-types.h>
39#include <asm/mach/arch.h> 39#include <asm/mach/arch.h>
40#include <asm/mach/time.h> 40#include <asm/mach/time.h>
41#include <asm/system.h> 41#include <asm/system_info.h>
42#include <mach/common.h> 42#include <mach/common.h>
43#include <mach/iomux-mx27.h> 43#include <mach/iomux-mx27.h>
44 44
@@ -116,6 +116,8 @@ static const int visstrim_m10_pins[] __initconst = {
116 PB23_PF_USB_PWR, 116 PB23_PF_USB_PWR,
117 PB24_PF_USB_OC, 117 PB24_PF_USB_OC,
118 /* CSI */ 118 /* CSI */
119 TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
120 TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
119 PB10_PF_CSI_D0, 121 PB10_PF_CSI_D0,
120 PB11_PF_CSI_D1, 122 PB11_PF_CSI_D1,
121 PB12_PF_CSI_D2, 123 PB12_PF_CSI_D2,
@@ -147,6 +149,24 @@ static struct gpio visstrim_m10_version_gpios[] = {
147 { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" }, 149 { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
148}; 150};
149 151
152static const struct gpio visstrim_m10_gpios[] __initconst = {
153 {
154 .gpio = TVP5150_RSTN,
155 .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
156 .label = "tvp5150_rstn",
157 },
158 {
159 .gpio = TVP5150_PWDN,
160 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
161 .label = "tvp5150_pwdn",
162 },
163 {
164 .gpio = OTG_PHY_CS_GPIO,
165 .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
166 .label = "usbotg_cs",
167 },
168};
169
150/* Camera */ 170/* Camera */
151static int visstrim_camera_power(struct device *dev, int on) 171static int visstrim_camera_power(struct device *dev, int on)
152{ 172{
@@ -190,13 +210,6 @@ static void __init visstrim_camera_init(void)
190 struct platform_device *pdev; 210 struct platform_device *pdev;
191 int dma; 211 int dma;
192 212
193 /* Initialize tvp5150 gpios */
194 mxc_gpio_mode(TVP5150_RSTN | GPIO_GPIO | GPIO_OUT);
195 mxc_gpio_mode(TVP5150_PWDN | GPIO_GPIO | GPIO_OUT);
196 gpio_set_value(TVP5150_RSTN, 1);
197 gpio_set_value(TVP5150_PWDN, 0);
198 ndelay(1);
199
200 gpio_set_value(TVP5150_PWDN, 1); 213 gpio_set_value(TVP5150_PWDN, 1);
201 ndelay(1); 214 ndelay(1);
202 gpio_set_value(TVP5150_RSTN, 0); 215 gpio_set_value(TVP5150_RSTN, 0);
@@ -377,10 +390,6 @@ static struct i2c_board_info visstrim_m10_i2c_devices[] = {
377/* USB OTG */ 390/* USB OTG */
378static int otg_phy_init(struct platform_device *pdev) 391static int otg_phy_init(struct platform_device *pdev)
379{ 392{
380 gpio_set_value(OTG_PHY_CS_GPIO, 0);
381
382 mdelay(10);
383
384 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED); 393 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
385} 394}
386 395
@@ -435,6 +444,11 @@ static void __init visstrim_m10_board_init(void)
435 if (ret) 444 if (ret)
436 pr_err("Failed to setup pins (%d)\n", ret); 445 pr_err("Failed to setup pins (%d)\n", ret);
437 446
447 ret = gpio_request_array(visstrim_m10_gpios,
448 ARRAY_SIZE(visstrim_m10_gpios));
449 if (ret)
450 pr_err("Failed to request gpios (%d)\n", ret);
451
438 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata); 452 imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
439 imx27_add_imx_uart0(&uart_pdata); 453 imx27_add_imx_uart0(&uart_pdata);
440 454
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c
index d14bbe949a4f..3e7401fca76c 100644
--- a/arch/arm/mach-imx/mach-mx21ads.c
+++ b/arch/arm/mach-imx/mach-mx21ads.c
@@ -32,7 +32,7 @@
32 * Memory-mapped I/O on MX21ADS base board 32 * Memory-mapped I/O on MX21ADS base board
33 */ 33 */
34#define MX21ADS_MMIO_BASE_ADDR 0xf5000000 34#define MX21ADS_MMIO_BASE_ADDR 0xf5000000
35#define MX21ADS_MMIO_SIZE SZ_16M 35#define MX21ADS_MMIO_SIZE 0xc00000
36 36
37#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \ 37#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
38 (MX21ADS_MMIO_BASE_ADDR + (offset)) 38 (MX21ADS_MMIO_BASE_ADDR + (offset))
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c
index 967ed5b35a45..a8983b9778d1 100644
--- a/arch/arm/mach-imx/mm-imx3.c
+++ b/arch/arm/mach-imx/mm-imx3.c
@@ -86,6 +86,7 @@ static void __iomem *imx3_ioremap_caller(unsigned long phys_addr, size_t size,
86 86
87void __init imx3_init_l2x0(void) 87void __init imx3_init_l2x0(void)
88{ 88{
89#ifdef CONFIG_CACHE_L2X0
89 void __iomem *l2x0_base; 90 void __iomem *l2x0_base;
90 void __iomem *clkctl_base; 91 void __iomem *clkctl_base;
91 92
@@ -115,6 +116,7 @@ void __init imx3_init_l2x0(void)
115 } 116 }
116 117
117 l2x0_init(l2x0_base, 0x00030024, 0x00000000); 118 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
119#endif
118} 120}
119 121
120#ifdef CONFIG_SOC_IMX31 122#ifdef CONFIG_SOC_IMX31
@@ -179,6 +181,8 @@ void __init imx31_soc_init(void)
179 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0); 181 mxc_register_gpio("imx31-gpio", 1, MX31_GPIO2_BASE_ADDR, SZ_16K, MX31_INT_GPIO2, 0);
180 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0); 182 mxc_register_gpio("imx31-gpio", 2, MX31_GPIO3_BASE_ADDR, SZ_16K, MX31_INT_GPIO3, 0);
181 183
184 pinctrl_provide_dummies();
185
182 if (to_version == 1) { 186 if (to_version == 1) {
183 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin", 187 strncpy(imx31_sdma_pdata.fw_name, "sdma-imx31-to1.bin",
184 strlen(imx31_sdma_pdata.fw_name)); 188 strlen(imx31_sdma_pdata.fw_name));
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c
index feeee17da96b..1d003053d562 100644
--- a/arch/arm/mach-imx/mm-imx5.c
+++ b/arch/arm/mach-imx/mm-imx5.c
@@ -202,6 +202,8 @@ void __init imx51_soc_init(void)
202 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH); 202 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH);
203 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH); 203 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH);
204 204
205 pinctrl_provide_dummies();
206
205 /* i.mx51 has the i.mx35 type sdma */ 207 /* i.mx51 has the i.mx35 type sdma */
206 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); 208 imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata);
207 209
diff --git a/arch/arm/mach-kirkwood/board-iconnect.c b/arch/arm/mach-kirkwood/board-iconnect.c
index 2222c5739519..b0d3cc49269d 100644
--- a/arch/arm/mach-kirkwood/board-iconnect.c
+++ b/arch/arm/mach-kirkwood/board-iconnect.c
@@ -20,9 +20,6 @@
20#include <linux/mv643xx_eth.h> 20#include <linux/mv643xx_eth.h>
21#include <linux/gpio.h> 21#include <linux/gpio.h>
22#include <linux/leds.h> 22#include <linux/leds.h>
23#include <linux/spi/flash.h>
24#include <linux/spi/spi.h>
25#include <linux/spi/orion_spi.h>
26#include <linux/i2c.h> 23#include <linux/i2c.h>
27#include <linux/input.h> 24#include <linux/input.h>
28#include <linux/gpio_keys.h> 25#include <linux/gpio_keys.h>
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 25fb3fd418ef..f261cd242643 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -159,6 +159,7 @@ static struct clk __init *clk_register_gate_fn(struct device *dev,
159 gate_fn->gate.flags = clk_gate_flags; 159 gate_fn->gate.flags = clk_gate_flags;
160 gate_fn->gate.lock = lock; 160 gate_fn->gate.lock = lock;
161 gate_fn->gate.hw.init = &init; 161 gate_fn->gate.hw.init = &init;
162 gate_fn->fn = fn;
162 163
163 /* ops is the gate ops, but with our disable function */ 164 /* ops is the gate ops, but with our disable function */
164 if (clk_gate_fn_ops.disable != clk_gate_fn_disable) { 165 if (clk_gate_fn_ops.disable != clk_gate_fn_disable) {
@@ -193,9 +194,11 @@ static struct clk __init *kirkwood_register_gate_fn(const char *name,
193 bit_idx, 0, &gating_lock, fn); 194 bit_idx, 0, &gating_lock, fn);
194} 195}
195 196
197static struct clk *ge0, *ge1;
198
196void __init kirkwood_clk_init(void) 199void __init kirkwood_clk_init(void)
197{ 200{
198 struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio; 201 struct clk *runit, *sata0, *sata1, *usb0, *sdio;
199 struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio; 202 struct clk *crypto, *xor0, *xor1, *pex0, *pex1, *audio;
200 203
201 tclk = clk_register_fixed_rate(NULL, "tclk", NULL, 204 tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
@@ -257,6 +260,9 @@ void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
257 orion_ge00_init(eth_data, 260 orion_ge00_init(eth_data,
258 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM, 261 GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
259 IRQ_KIRKWOOD_GE00_ERR); 262 IRQ_KIRKWOOD_GE00_ERR);
263 /* The interface forgets the MAC address assigned by u-boot if
264 the clock is turned off, so claim the clk now. */
265 clk_prepare_enable(ge0);
260} 266}
261 267
262 268
@@ -268,6 +274,7 @@ void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
268 orion_ge01_init(eth_data, 274 orion_ge01_init(eth_data,
269 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM, 275 GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
270 IRQ_KIRKWOOD_GE01_ERR); 276 IRQ_KIRKWOOD_GE01_ERR);
277 clk_prepare_enable(ge1);
271} 278}
272 279
273 280
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
index 3eee37a3b501..a115142f8690 100644
--- a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
+++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h
@@ -38,6 +38,7 @@
38#define IRQ_MASK_HIGH_OFF 0x0014 38#define IRQ_MASK_HIGH_OFF 0x0014
39 39
40#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 40#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
41#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
41 42
42#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) 43#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128)
43#define L2_WRITETHROUGH 0x00000010 44#define L2_WRITETHROUGH 0x00000010
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index fede3d503efa..c5b68510776b 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -80,6 +80,7 @@
80#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100) 80#define UART1_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2100)
81 81
82#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) 82#define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000)
83#define BRIDGE_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x20000)
83 84
84#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) 85#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000)
85 86
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
deleted file mode 100644
index 0e135a599f3e..000000000000
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,29 +0,0 @@
1#ifndef __ASM_MACH_GPIO_PXA_H
2#define __ASM_MACH_GPIO_PXA_H
3
4#include <mach/addr-map.h>
5#include <mach/cputype.h>
6#include <mach/irqs.h>
7
8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
9
10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
11#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
12
13#define gpio_to_bank(gpio) ((gpio) >> 5)
14
15/* NOTE: these macros are defined here to make optimization of
16 * gpio_{get,set}_value() to work when 'gpio' is a constant.
17 * Usage of these macros otherwise is no longer recommended,
18 * use generic GPIO API whenever possible.
19 */
20#define GPIO_bit(gpio) (1 << ((gpio) & 0x1f))
21
22#define GPLR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x00)
23#define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c)
24#define GPSR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x18)
25#define GPCR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x24)
26
27#include <plat/gpio-pxa.h>
28
29#endif /* __ASM_MACH_GPIO_PXA_H */
diff --git a/arch/arm/mach-mmp/irq.c b/arch/arm/mach-mmp/irq.c
index fcfe0e3bd701..e60c7d98922b 100644
--- a/arch/arm/mach-mmp/irq.c
+++ b/arch/arm/mach-mmp/irq.c
@@ -241,6 +241,7 @@ void __init mmp2_init_icu(void)
241 icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE; 241 icu_data[1].clr_mfp_irq_base = IRQ_MMP2_PMIC_BASE;
242 icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE; 242 icu_data[1].clr_mfp_hwirq = IRQ_MMP2_PMIC - IRQ_MMP2_PMIC_BASE;
243 icu_data[1].nr_irqs = 2; 243 icu_data[1].nr_irqs = 2;
244 icu_data[1].cascade_irq = 4;
244 icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE; 245 icu_data[1].virq_base = IRQ_MMP2_PMIC_BASE;
245 icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs, 246 icu_data[1].domain = irq_domain_add_legacy(NULL, icu_data[1].nr_irqs,
246 icu_data[1].virq_base, 0, 247 icu_data[1].virq_base, 0,
@@ -249,6 +250,7 @@ void __init mmp2_init_icu(void)
249 icu_data[2].reg_status = mmp_icu_base + 0x154; 250 icu_data[2].reg_status = mmp_icu_base + 0x154;
250 icu_data[2].reg_mask = mmp_icu_base + 0x16c; 251 icu_data[2].reg_mask = mmp_icu_base + 0x16c;
251 icu_data[2].nr_irqs = 2; 252 icu_data[2].nr_irqs = 2;
253 icu_data[2].cascade_irq = 5;
252 icu_data[2].virq_base = IRQ_MMP2_RTC_BASE; 254 icu_data[2].virq_base = IRQ_MMP2_RTC_BASE;
253 icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs, 255 icu_data[2].domain = irq_domain_add_legacy(NULL, icu_data[2].nr_irqs,
254 icu_data[2].virq_base, 0, 256 icu_data[2].virq_base, 0,
@@ -257,6 +259,7 @@ void __init mmp2_init_icu(void)
257 icu_data[3].reg_status = mmp_icu_base + 0x180; 259 icu_data[3].reg_status = mmp_icu_base + 0x180;
258 icu_data[3].reg_mask = mmp_icu_base + 0x17c; 260 icu_data[3].reg_mask = mmp_icu_base + 0x17c;
259 icu_data[3].nr_irqs = 3; 261 icu_data[3].nr_irqs = 3;
262 icu_data[3].cascade_irq = 9;
260 icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE; 263 icu_data[3].virq_base = IRQ_MMP2_KEYPAD_BASE;
261 icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs, 264 icu_data[3].domain = irq_domain_add_legacy(NULL, icu_data[3].nr_irqs,
262 icu_data[3].virq_base, 0, 265 icu_data[3].virq_base, 0,
@@ -265,6 +268,7 @@ void __init mmp2_init_icu(void)
265 icu_data[4].reg_status = mmp_icu_base + 0x158; 268 icu_data[4].reg_status = mmp_icu_base + 0x158;
266 icu_data[4].reg_mask = mmp_icu_base + 0x170; 269 icu_data[4].reg_mask = mmp_icu_base + 0x170;
267 icu_data[4].nr_irqs = 5; 270 icu_data[4].nr_irqs = 5;
271 icu_data[4].cascade_irq = 17;
268 icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE; 272 icu_data[4].virq_base = IRQ_MMP2_TWSI_BASE;
269 icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs, 273 icu_data[4].domain = irq_domain_add_legacy(NULL, icu_data[4].nr_irqs,
270 icu_data[4].virq_base, 0, 274 icu_data[4].virq_base, 0,
@@ -273,6 +277,7 @@ void __init mmp2_init_icu(void)
273 icu_data[5].reg_status = mmp_icu_base + 0x15c; 277 icu_data[5].reg_status = mmp_icu_base + 0x15c;
274 icu_data[5].reg_mask = mmp_icu_base + 0x174; 278 icu_data[5].reg_mask = mmp_icu_base + 0x174;
275 icu_data[5].nr_irqs = 15; 279 icu_data[5].nr_irqs = 15;
280 icu_data[5].cascade_irq = 35;
276 icu_data[5].virq_base = IRQ_MMP2_MISC_BASE; 281 icu_data[5].virq_base = IRQ_MMP2_MISC_BASE;
277 icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs, 282 icu_data[5].domain = irq_domain_add_legacy(NULL, icu_data[5].nr_irqs,
278 icu_data[5].virq_base, 0, 283 icu_data[5].virq_base, 0,
@@ -281,6 +286,7 @@ void __init mmp2_init_icu(void)
281 icu_data[6].reg_status = mmp_icu_base + 0x160; 286 icu_data[6].reg_status = mmp_icu_base + 0x160;
282 icu_data[6].reg_mask = mmp_icu_base + 0x178; 287 icu_data[6].reg_mask = mmp_icu_base + 0x178;
283 icu_data[6].nr_irqs = 2; 288 icu_data[6].nr_irqs = 2;
289 icu_data[6].cascade_irq = 51;
284 icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE; 290 icu_data[6].virq_base = IRQ_MMP2_MIPI_HSI1_BASE;
285 icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs, 291 icu_data[6].domain = irq_domain_add_legacy(NULL, icu_data[6].nr_irqs,
286 icu_data[6].virq_base, 0, 292 icu_data[6].virq_base, 0,
@@ -289,6 +295,7 @@ void __init mmp2_init_icu(void)
289 icu_data[7].reg_status = mmp_icu_base + 0x188; 295 icu_data[7].reg_status = mmp_icu_base + 0x188;
290 icu_data[7].reg_mask = mmp_icu_base + 0x184; 296 icu_data[7].reg_mask = mmp_icu_base + 0x184;
291 icu_data[7].nr_irqs = 2; 297 icu_data[7].nr_irqs = 2;
298 icu_data[7].cascade_irq = 55;
292 icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE; 299 icu_data[7].virq_base = IRQ_MMP2_MIPI_HSI0_BASE;
293 icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs, 300 icu_data[7].domain = irq_domain_add_legacy(NULL, icu_data[7].nr_irqs,
294 icu_data[7].virq_base, 0, 301 icu_data[7].virq_base, 0,
diff --git a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
index c64dbb96dbad..eb187e0e059b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/bridge-regs.h
@@ -31,5 +31,6 @@
31#define IRQ_MASK_HIGH_OFF 0x0014 31#define IRQ_MASK_HIGH_OFF 0x0014
32 32
33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 33#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
34#define TIMER_PHYS_BASE (BRIDGE_PHYS_BASE | 0x0300)
34 35
35#endif 36#endif
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index 3674497162e3..e807c4c52a0b 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -42,6 +42,7 @@
42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000 42#define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000 43#define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000 44#define MV78XX0_CORE_REGS_VIRT_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45#define MV78XX0_CORE_REGS_SIZE SZ_16K 46#define MV78XX0_CORE_REGS_SIZE SZ_16K
46 47
47#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20)) 48#define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
@@ -59,6 +60,7 @@
59 * Core-specific peripheral registers. 60 * Core-specific peripheral registers.
60 */ 61 */
61#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE) 62#define BRIDGE_VIRT_BASE (MV78XX0_CORE_REGS_VIRT_BASE)
63#define BRIDGE_PHYS_BASE (MV78XX0_CORE_REGS_PHYS_BASE)
62 64
63/* 65/*
64 * Register Map 66 * Register Map
diff --git a/arch/arm/mach-mxs/mach-apx4devkit.c b/arch/arm/mach-mxs/mach-apx4devkit.c
index 5e90b9dcdef8..f5f061757deb 100644
--- a/arch/arm/mach-mxs/mach-apx4devkit.c
+++ b/arch/arm/mach-mxs/mach-apx4devkit.c
@@ -205,6 +205,16 @@ static int apx4devkit_phy_fixup(struct phy_device *phy)
205 return 0; 205 return 0;
206} 206}
207 207
208static void __init apx4devkit_fec_phy_clk_enable(void)
209{
210 struct clk *clk;
211
212 /* Enable fec phy clock */
213 clk = clk_get_sys("enet_out", NULL);
214 if (!IS_ERR(clk))
215 clk_prepare_enable(clk);
216}
217
208static void __init apx4devkit_init(void) 218static void __init apx4devkit_init(void)
209{ 219{
210 mx28_soc_init(); 220 mx28_soc_init();
@@ -225,6 +235,7 @@ static void __init apx4devkit_init(void)
225 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK, 235 phy_register_fixup_for_uid(PHY_ID_KS8051, MICREL_PHY_ID_MASK,
226 apx4devkit_phy_fixup); 236 apx4devkit_phy_fixup);
227 237
238 apx4devkit_fec_phy_clk_enable();
228 mx28_add_fec(0, &mx28_fec_pdata); 239 mx28_add_fec(0, &mx28_fec_pdata);
229 240
230 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata); 241 mx28_add_mxs_mmc(0, &apx4devkit_mmc_pdata);
diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
index 70a81f900bb5..53c39d239d6e 100644
--- a/arch/arm/mach-omap2/board-flash.c
+++ b/arch/arm/mach-omap2/board-flash.c
@@ -97,11 +97,6 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
97 97
98 gpmc_onenand_init(&board_onenand_data); 98 gpmc_onenand_init(&board_onenand_data);
99} 99}
100#else
101void
102__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
103{
104}
105#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */ 100#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
106 101
107#if defined(CONFIG_MTD_NAND_OMAP2) || \ 102#if defined(CONFIG_MTD_NAND_OMAP2) || \
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index 8ca14e88a31a..2c5d0ed75285 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -83,11 +83,9 @@ static struct musb_hdrc_config musb_config = {
83}; 83};
84 84
85static struct musb_hdrc_platform_data tusb_data = { 85static struct musb_hdrc_platform_data tusb_data = {
86#if defined(CONFIG_USB_MUSB_OTG) 86#ifdef CONFIG_USB_GADGET_MUSB_HDRC
87 .mode = MUSB_OTG, 87 .mode = MUSB_OTG,
88#elif defined(CONFIG_USB_MUSB_PERIPHERAL) 88#else
89 .mode = MUSB_PERIPHERAL,
90#else /* defined(CONFIG_USB_MUSB_HOST) */
91 .mode = MUSB_HOST, 89 .mode = MUSB_HOST,
92#endif 90#endif
93 .set_power = tusb_set_power, 91 .set_power = tusb_set_power,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 79c6909eeb78..580fd17208da 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -81,13 +81,13 @@ static u8 omap3_beagle_version;
81static struct { 81static struct {
82 int mmc1_gpio_wp; 82 int mmc1_gpio_wp;
83 int usb_pwr_level; 83 int usb_pwr_level;
84 int reset_gpio; 84 int dvi_pd_gpio;
85 int usr_button_gpio; 85 int usr_button_gpio;
86 int mmc_caps; 86 int mmc_caps;
87} beagle_config = { 87} beagle_config = {
88 .mmc1_gpio_wp = -EINVAL, 88 .mmc1_gpio_wp = -EINVAL,
89 .usb_pwr_level = GPIOF_OUT_INIT_LOW, 89 .usb_pwr_level = GPIOF_OUT_INIT_LOW,
90 .reset_gpio = 129, 90 .dvi_pd_gpio = -EINVAL,
91 .usr_button_gpio = 4, 91 .usr_button_gpio = 4,
92 .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, 92 .mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
93}; 93};
@@ -126,21 +126,21 @@ static void __init omap3_beagle_init_rev(void)
126 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); 126 printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n");
127 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; 127 omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX;
128 beagle_config.mmc1_gpio_wp = 29; 128 beagle_config.mmc1_gpio_wp = 29;
129 beagle_config.reset_gpio = 170; 129 beagle_config.dvi_pd_gpio = 170;
130 beagle_config.usr_button_gpio = 7; 130 beagle_config.usr_button_gpio = 7;
131 break; 131 break;
132 case 6: 132 case 6:
133 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); 133 printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n");
134 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; 134 omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3;
135 beagle_config.mmc1_gpio_wp = 23; 135 beagle_config.mmc1_gpio_wp = 23;
136 beagle_config.reset_gpio = 170; 136 beagle_config.dvi_pd_gpio = 170;
137 beagle_config.usr_button_gpio = 7; 137 beagle_config.usr_button_gpio = 7;
138 break; 138 break;
139 case 5: 139 case 5:
140 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); 140 printk(KERN_INFO "OMAP3 Beagle Rev: C4\n");
141 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; 141 omap3_beagle_version = OMAP3BEAGLE_BOARD_C4;
142 beagle_config.mmc1_gpio_wp = 23; 142 beagle_config.mmc1_gpio_wp = 23;
143 beagle_config.reset_gpio = 170; 143 beagle_config.dvi_pd_gpio = 170;
144 beagle_config.usr_button_gpio = 7; 144 beagle_config.usr_button_gpio = 7;
145 break; 145 break;
146 case 0: 146 case 0:
@@ -274,11 +274,9 @@ static int beagle_twl_gpio_setup(struct device *dev,
274 if (r) 274 if (r)
275 pr_err("%s: unable to configure nDVI_PWR_EN\n", 275 pr_err("%s: unable to configure nDVI_PWR_EN\n",
276 __func__); 276 __func__);
277 r = gpio_request_one(gpio + 2, GPIOF_OUT_INIT_HIGH, 277
278 "DVI_LDO_EN"); 278 beagle_config.dvi_pd_gpio = gpio + 2;
279 if (r) 279
280 pr_err("%s: unable to configure DVI_LDO_EN\n",
281 __func__);
282 } else { 280 } else {
283 /* 281 /*
284 * REVISIT: need ehci-omap hooks for external VBUS 282 * REVISIT: need ehci-omap hooks for external VBUS
@@ -287,7 +285,7 @@ static int beagle_twl_gpio_setup(struct device *dev,
287 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) 285 if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC"))
288 pr_err("%s: unable to configure EHCI_nOC\n", __func__); 286 pr_err("%s: unable to configure EHCI_nOC\n", __func__);
289 } 287 }
290 dvi_panel.power_down_gpio = beagle_config.reset_gpio; 288 dvi_panel.power_down_gpio = beagle_config.dvi_pd_gpio;
291 289
292 gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, 290 gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level,
293 "nEN_USB_PWR"); 291 "nEN_USB_PWR");
@@ -499,7 +497,7 @@ static void __init omap3_beagle_init(void)
499 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 497 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
500 omap3_beagle_init_rev(); 498 omap3_beagle_init_rev();
501 499
502 if (beagle_config.mmc1_gpio_wp != -EINVAL) 500 if (gpio_is_valid(beagle_config.mmc1_gpio_wp))
503 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); 501 omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT);
504 mmc[0].caps = beagle_config.mmc_caps; 502 mmc[0].caps = beagle_config.mmc_caps;
505 omap_hsmmc_init(mmc); 503 omap_hsmmc_init(mmc);
@@ -510,15 +508,13 @@ static void __init omap3_beagle_init(void)
510 508
511 platform_add_devices(omap3_beagle_devices, 509 platform_add_devices(omap3_beagle_devices,
512 ARRAY_SIZE(omap3_beagle_devices)); 510 ARRAY_SIZE(omap3_beagle_devices));
511 if (gpio_is_valid(beagle_config.dvi_pd_gpio))
512 omap_mux_init_gpio(beagle_config.dvi_pd_gpio, OMAP_PIN_OUTPUT);
513 omap_display_init(&beagle_dss_data); 513 omap_display_init(&beagle_dss_data);
514 omap_serial_init(); 514 omap_serial_init();
515 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 515 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
516 mt46h32m32lf6_sdrc_params); 516 mt46h32m32lf6_sdrc_params);
517 517
518 omap_mux_init_gpio(170, OMAP_PIN_INPUT);
519 /* REVISIT leave DVI powered down until it's needed ... */
520 gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD");
521
522 usb_musb_init(NULL); 518 usb_musb_init(NULL);
523 usbhs_init(&usbhs_bdata); 519 usbhs_init(&usbhs_bdata);
524 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, 520 omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 8fa2fc3a4c3c..779734d8ba37 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -494,8 +494,8 @@ static void __init overo_init(void)
494 494
495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies)); 495 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); 496 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
497 omap_hsmmc_init(mmc);
498 overo_i2c_init(); 497 overo_i2c_init();
498 omap_hsmmc_init(mmc);
499 omap_display_init(&overo_dss_data); 499 omap_display_init(&overo_dss_data);
500 omap_serial_init(); 500 omap_serial_init();
501 omap_sdrc_init(mt46h32m32lf6_sdrc_params, 501 omap_sdrc_init(mt46h32m32lf6_sdrc_params,
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c
index ff53deccecab..df2534de3361 100644
--- a/arch/arm/mach-omap2/board-rx51-peripherals.c
+++ b/arch/arm/mach-omap2/board-rx51-peripherals.c
@@ -144,7 +144,6 @@ static struct lis3lv02d_platform_data rx51_lis3lv02d_data = {
144 .release_resources = lis302_release, 144 .release_resources = lis302_release,
145 .st_min_limits = {-32, 3, 3}, 145 .st_min_limits = {-32, 3, 3},
146 .st_max_limits = {-3, 32, 32}, 146 .st_max_limits = {-3, 32, 32},
147 .irq2 = OMAP_GPIO_IRQ(LIS302_IRQ2_GPIO),
148}; 147};
149#endif 148#endif
150 149
@@ -1030,7 +1029,6 @@ static struct i2c_board_info __initdata rx51_peripherals_i2c_board_info_3[] = {
1030 { 1029 {
1031 I2C_BOARD_INFO("lis3lv02d", 0x1d), 1030 I2C_BOARD_INFO("lis3lv02d", 0x1d),
1032 .platform_data = &rx51_lis3lv02d_data, 1031 .platform_data = &rx51_lis3lv02d_data,
1033 .irq = OMAP_GPIO_IRQ(LIS302_IRQ1_GPIO),
1034 }, 1032 },
1035#endif 1033#endif
1036}; 1034};
@@ -1056,6 +1054,10 @@ static int __init rx51_i2c_init(void)
1056 omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); 1054 omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
1057 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, 1055 omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
1058 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); 1056 ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
1057#if defined(CONFIG_SENSORS_LIS3_I2C) || defined(CONFIG_SENSORS_LIS3_I2C_MODULE)
1058 rx51_lis3lv02d_data.irq2 = gpio_to_irq(LIS302_IRQ2_GPIO);
1059 rx51_peripherals_i2c_board_info_3[0].irq = gpio_to_irq(LIS302_IRQ1_GPIO);
1060#endif
1059 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3, 1061 omap_register_i2c_bus(3, 400, rx51_peripherals_i2c_board_info_3,
1060 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3)); 1062 ARRAY_SIZE(rx51_peripherals_i2c_board_info_3));
1061 return 0; 1063 return 0;
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 4e1a3b0e8cc8..1efdec236ae8 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3514,7 +3514,7 @@ int __init omap3xxx_clk_init(void)
3514 struct omap_clk *c; 3514 struct omap_clk *c;
3515 u32 cpu_clkflg = 0; 3515 u32 cpu_clkflg = 0;
3516 3516
3517 if (cpu_is_omap3517()) { 3517 if (soc_is_am35xx()) {
3518 cpu_mask = RATE_IN_34XX; 3518 cpu_mask = RATE_IN_34XX;
3519 cpu_clkflg = CK_AM35XX; 3519 cpu_clkflg = CK_AM35XX;
3520 } else if (cpu_is_omap3630()) { 3520 } else if (cpu_is_omap3630()) {
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2172f6603848..ba6f9a0a43e9 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
84 84
85static struct clk sys_32k_ck = { 85static struct clk sys_32k_ck = {
86 .name = "sys_32k_ck", 86 .name = "sys_32k_ck",
87 .clkdm_name = "prm_clkdm",
87 .rate = 32768, 88 .rate = 32768,
88 .ops = &clkops_null, 89 .ops = &clkops_null,
89}; 90};
@@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
512 .name = "ddrphy_ck", 513 .name = "ddrphy_ck",
513 .parent = &dpll_core_m2_ck, 514 .parent = &dpll_core_m2_ck,
514 .ops = &clkops_null, 515 .ops = &clkops_null,
516 .clkdm_name = "l3_emif_clkdm",
515 .fixed_div = 2, 517 .fixed_div = 2,
516 .recalc = &omap_fixed_divisor_recalc, 518 .recalc = &omap_fixed_divisor_recalc,
517}; 519};
@@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
769static struct clk dpll_mpu_m2_ck = { 771static struct clk dpll_mpu_m2_ck = {
770 .name = "dpll_mpu_m2_ck", 772 .name = "dpll_mpu_m2_ck",
771 .parent = &dpll_mpu_ck, 773 .parent = &dpll_mpu_ck,
774 .clkdm_name = "cm_clkdm",
772 .clksel = dpll_mpu_m2_div, 775 .clksel = dpll_mpu_m2_div,
773 .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, 776 .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
774 .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, 777 .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
@@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
1149static struct clk l3_div_ck = { 1152static struct clk l3_div_ck = {
1150 .name = "l3_div_ck", 1153 .name = "l3_div_ck",
1151 .parent = &div_core_ck, 1154 .parent = &div_core_ck,
1155 .clkdm_name = "cm_clkdm",
1152 .clksel = l3_div_div, 1156 .clksel = l3_div_div,
1153 .clksel_reg = OMAP4430_CM_CLKSEL_CORE, 1157 .clksel_reg = OMAP4430_CM_CLKSEL_CORE,
1154 .clksel_mask = OMAP4430_CLKSEL_L3_MASK, 1158 .clksel_mask = OMAP4430_CLKSEL_L3_MASK,
@@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
2824static struct clk trace_clk_div_ck = { 2828static struct clk trace_clk_div_ck = {
2825 .name = "trace_clk_div_ck", 2829 .name = "trace_clk_div_ck",
2826 .parent = &pmd_trace_clk_mux_ck, 2830 .parent = &pmd_trace_clk_mux_ck,
2831 .clkdm_name = "emu_sys_clkdm",
2827 .clksel = trace_clk_div_div, 2832 .clksel = trace_clk_div_div,
2828 .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, 2833 .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
2829 .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK, 2834 .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,
@@ -3412,9 +3417,12 @@ int __init omap4xxx_clk_init(void)
3412 if (cpu_is_omap443x()) { 3417 if (cpu_is_omap443x()) {
3413 cpu_mask = RATE_IN_4430; 3418 cpu_mask = RATE_IN_4430;
3414 cpu_clkflg = CK_443X; 3419 cpu_clkflg = CK_443X;
3415 } else if (cpu_is_omap446x()) { 3420 } else if (cpu_is_omap446x() || cpu_is_omap447x()) {
3416 cpu_mask = RATE_IN_4460 | RATE_IN_4430; 3421 cpu_mask = RATE_IN_4460 | RATE_IN_4430;
3417 cpu_clkflg = CK_446X | CK_443X; 3422 cpu_clkflg = CK_446X | CK_443X;
3423
3424 if (cpu_is_omap447x())
3425 pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
3418 } else { 3426 } else {
3419 return 0; 3427 return 0;
3420 } 3428 }
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index f7b58609bad8..6227e9505c2d 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -31,12 +31,16 @@
31 * 31 *
32 * CLKDM_NO_AUTODEPS: Prevent "autodeps" from being added/removed from this 32 * CLKDM_NO_AUTODEPS: Prevent "autodeps" from being added/removed from this
33 * clockdomain. (Currently, this applies to OMAP3 clockdomains only.) 33 * clockdomain. (Currently, this applies to OMAP3 clockdomains only.)
34 * CLKDM_ACTIVE_WITH_MPU: The PRCM guarantees that this clockdomain is
35 * active whenever the MPU is active. True for interconnects and
36 * the WKUP clockdomains.
34 */ 37 */
35#define CLKDM_CAN_FORCE_SLEEP (1 << 0) 38#define CLKDM_CAN_FORCE_SLEEP (1 << 0)
36#define CLKDM_CAN_FORCE_WAKEUP (1 << 1) 39#define CLKDM_CAN_FORCE_WAKEUP (1 << 1)
37#define CLKDM_CAN_ENABLE_AUTO (1 << 2) 40#define CLKDM_CAN_ENABLE_AUTO (1 << 2)
38#define CLKDM_CAN_DISABLE_AUTO (1 << 3) 41#define CLKDM_CAN_DISABLE_AUTO (1 << 3)
39#define CLKDM_NO_AUTODEPS (1 << 4) 42#define CLKDM_NO_AUTODEPS (1 << 4)
43#define CLKDM_ACTIVE_WITH_MPU (1 << 5)
40 44
41#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO) 45#define CLKDM_CAN_HWSUP (CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_DISABLE_AUTO)
42#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP) 46#define CLKDM_CAN_SWSUP (CLKDM_CAN_FORCE_SLEEP | CLKDM_CAN_FORCE_WAKEUP)
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 839145e1cfbe..4972219653ce 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -88,4 +88,5 @@ struct clockdomain wkup_common_clkdm = {
88 .name = "wkup_clkdm", 88 .name = "wkup_clkdm",
89 .pwrdm = { .name = "wkup_pwrdm" }, 89 .pwrdm = { .name = "wkup_pwrdm" },
90 .dep_bit = OMAP_EN_WKUP_SHIFT, 90 .dep_bit = OMAP_EN_WKUP_SHIFT,
91 .flags = CLKDM_ACTIVE_WITH_MPU,
91}; 92};
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index c53425847493..7f2133abe7d3 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -381,7 +381,7 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
381 .cm_inst = OMAP4430_PRM_WKUP_CM_INST, 381 .cm_inst = OMAP4430_PRM_WKUP_CM_INST,
382 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS, 382 .clkdm_offs = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
383 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT, 383 .dep_bit = OMAP4430_L4WKUP_STATDEP_SHIFT,
384 .flags = CLKDM_CAN_HWSUP, 384 .flags = CLKDM_CAN_HWSUP | CLKDM_ACTIVE_WITH_MPU,
385}; 385};
386 386
387static struct clockdomain emu_sys_44xx_clkdm = { 387static struct clockdomain emu_sys_44xx_clkdm = {
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index a7bc096bd407..f24e3f7a2bbc 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -22,4 +22,15 @@
22 */ 22 */
23#define MAX_MODULE_READY_TIME 2000 23#define MAX_MODULE_READY_TIME 2000
24 24
25/*
26 * MAX_MODULE_DISABLE_TIME: max duration in microseconds to wait for
27 * the PRCM to request that a module enter the inactive state in the
28 * case of OMAP2 & 3. In the case of OMAP4 this is the max duration
29 * in microseconds for the module to reach the inactive state from
30 * a functional state.
31 * XXX FSUSB on OMAP4430 takes ~4ms to idle after reset during
32 * kernel init.
33 */
34#define MAX_MODULE_DISABLE_TIME 5000
35
25#endif 36#endif
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 8c86d294b1a3..1a39945d9ff8 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -313,9 +313,9 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off
313 313
314 omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == 314 omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) ==
315 CLKCTRL_IDLEST_DISABLED), 315 CLKCTRL_IDLEST_DISABLED),
316 MAX_MODULE_READY_TIME, i); 316 MAX_MODULE_DISABLE_TIME, i);
317 317
318 return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; 318 return (i < MAX_MODULE_DISABLE_TIME) ? 0 : -EBUSY;
319} 319}
320 320
321/** 321/**
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 54d49ddb9b81..5fb47a14f4ba 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -271,9 +271,9 @@ static struct platform_device *create_simple_dss_pdev(const char *pdev_name,
271 goto err; 271 goto err;
272 } 272 }
273 273
274 r = omap_device_register(pdev); 274 r = platform_device_add(pdev);
275 if (r) { 275 if (r) {
276 pr_err("Could not register omap_device for %s\n", pdev_name); 276 pr_err("Could not register platform_device for %s\n", pdev_name);
277 goto err; 277 goto err;
278 } 278 }
279 279
diff --git a/arch/arm/mach-omap2/dsp.c b/arch/arm/mach-omap2/dsp.c
index 845309f146fe..88ffa1e645cd 100644
--- a/arch/arm/mach-omap2/dsp.c
+++ b/arch/arm/mach-omap2/dsp.c
@@ -20,6 +20,9 @@
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23
24#include <asm/memblock.h>
25
23#include "cm2xxx_3xxx.h" 26#include "cm2xxx_3xxx.h"
24#include "prm2xxx_3xxx.h" 27#include "prm2xxx_3xxx.h"
25#ifdef CONFIG_BRIDGE_DVFS 28#ifdef CONFIG_BRIDGE_DVFS
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 0389b3264abe..00486a8564fd 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -247,6 +247,17 @@ void __init omap3xxx_check_features(void)
247 omap_features |= OMAP3_HAS_SDRC; 247 omap_features |= OMAP3_HAS_SDRC;
248 248
249 /* 249 /*
250 * am35x fixups:
251 * - The am35x Chip ID register has bits 12, 7:5, and 3:2 marked as
252 * reserved and therefore return 0 when read. Unfortunately,
253 * OMAP3_CHECK_FEATURE() will interpret some of those zeroes to
254 * mean that a feature is present even though it isn't so clear
255 * the incorrectly set feature bits.
256 */
257 if (soc_is_am35xx())
258 omap_features &= ~(OMAP3_HAS_IVA | OMAP3_HAS_ISP);
259
260 /*
250 * TODO: Get additional info (where applicable) 261 * TODO: Get additional info (where applicable)
251 * e.g. Size of L2 cache. 262 * e.g. Size of L2 cache.
252 */ 263 */
diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c
index fdc4303be563..6038a8c84b74 100644
--- a/arch/arm/mach-omap2/irq.c
+++ b/arch/arm/mach-omap2/irq.c
@@ -149,6 +149,7 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
149 ct->chip.irq_ack = omap_mask_ack_irq; 149 ct->chip.irq_ack = omap_mask_ack_irq;
150 ct->chip.irq_mask = irq_gc_mask_disable_reg; 150 ct->chip.irq_mask = irq_gc_mask_disable_reg;
151 ct->chip.irq_unmask = irq_gc_unmask_enable_reg; 151 ct->chip.irq_unmask = irq_gc_unmask_enable_reg;
152 ct->chip.flags |= IRQCHIP_SKIP_SET_WAKE;
152 153
153 ct->regs.enable = INTC_MIR_CLEAR0; 154 ct->regs.enable = INTC_MIR_CLEAR0;
154 ct->regs.disable = INTC_MIR_SET0; 155 ct->regs.disable = INTC_MIR_SET0;
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 80e55c5c9998..9fe6829f4c16 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -41,6 +41,7 @@
41#include "control.h" 41#include "control.h"
42#include "mux.h" 42#include "mux.h"
43#include "prm.h" 43#include "prm.h"
44#include "common.h"
44 45
45#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */ 46#define OMAP_MUX_BASE_OFFSET 0x30 /* Offset from CTRL_BASE */
46#define OMAP_MUX_BASE_SZ 0x5ca 47#define OMAP_MUX_BASE_SZ 0x5ca
@@ -217,8 +218,7 @@ static int __init _omap_mux_get_by_name(struct omap_mux_partition *partition,
217 return -ENODEV; 218 return -ENODEV;
218} 219}
219 220
220static int __init 221int __init omap_mux_get_by_name(const char *muxname,
221omap_mux_get_by_name(const char *muxname,
222 struct omap_mux_partition **found_partition, 222 struct omap_mux_partition **found_partition,
223 struct omap_mux **found_mux) 223 struct omap_mux **found_mux)
224{ 224{
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index 69fe060a0b75..471e62a74a16 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -59,6 +59,7 @@
59#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN 59#define OMAP_PIN_OFF_WAKEUPENABLE OMAP_WAKEUP_EN
60 60
61#define OMAP_MODE_GPIO(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4) 61#define OMAP_MODE_GPIO(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE4)
62#define OMAP_MODE_UART(x) (((x) & OMAP_MUX_MODE7) == OMAP_MUX_MODE0)
62 63
63/* Flags for omapX_mux_init */ 64/* Flags for omapX_mux_init */
64#define OMAP_PACKAGE_MASK 0xffff 65#define OMAP_PACKAGE_MASK 0xffff
@@ -225,8 +226,18 @@ omap_hwmod_mux_init(struct omap_device_pad *bpads, int nr_pads);
225 */ 226 */
226void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state); 227void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state);
227 228
229int omap_mux_get_by_name(const char *muxname,
230 struct omap_mux_partition **found_partition,
231 struct omap_mux **found_mux);
228#else 232#else
229 233
234static inline int omap_mux_get_by_name(const char *muxname,
235 struct omap_mux_partition **found_partition,
236 struct omap_mux **found_mux)
237{
238 return 0;
239}
240
230static inline int omap_mux_init_gpio(int gpio, int val) 241static inline int omap_mux_init_gpio(int gpio, int val)
231{ 242{
232 return 0; 243 return 0;
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index bf86f7e8f91f..2d710f50fca2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -530,7 +530,7 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 530 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 531 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 532 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 533 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
534 534
535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 535 /* XXX test pwrdm_get_wken for this hwmod's subsystem */
536 536
@@ -1124,15 +1124,18 @@ static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap
1124 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG 1124 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1125 * @oh: struct omap_hwmod * 1125 * @oh: struct omap_hwmod *
1126 * 1126 *
1127 * If module is marked as SWSUP_SIDLE, force the module out of slave 1127 * Ensure that the OCP_SYSCONFIG register for the IP block represented
1128 * idle; otherwise, configure it for smart-idle. If module is marked 1128 * by @oh is set to indicate to the PRCM that the IP block is active.
1129 * as SWSUP_MSUSPEND, force the module out of master standby; 1129 * Usually this means placing the module into smart-idle mode and
1130 * otherwise, configure it for smart-standby. No return value. 1130 * smart-standby, but if there is a bug in the automatic idle handling
1131 * for the IP block, it may need to be placed into the force-idle or
1132 * no-idle variants of these modes. No return value.
1131 */ 1133 */
1132static void _enable_sysc(struct omap_hwmod *oh) 1134static void _enable_sysc(struct omap_hwmod *oh)
1133{ 1135{
1134 u8 idlemode, sf; 1136 u8 idlemode, sf;
1135 u32 v; 1137 u32 v;
1138 bool clkdm_act;
1136 1139
1137 if (!oh->class->sysc) 1140 if (!oh->class->sysc)
1138 return; 1141 return;
@@ -1141,8 +1144,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
1141 sf = oh->class->sysc->sysc_flags; 1144 sf = oh->class->sysc->sysc_flags;
1142 1145
1143 if (sf & SYSC_HAS_SIDLEMODE) { 1146 if (sf & SYSC_HAS_SIDLEMODE) {
1144 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? 1147 clkdm_act = ((oh->clkdm &&
1145 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; 1148 oh->clkdm->flags & CLKDM_ACTIVE_WITH_MPU) ||
1149 (oh->_clk && oh->_clk->clkdm &&
1150 oh->_clk->clkdm->flags & CLKDM_ACTIVE_WITH_MPU));
1151 if (clkdm_act && !(oh->class->sysc->idlemodes &
1152 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1153 idlemode = HWMOD_IDLEMODE_FORCE;
1154 else
1155 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1156 HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1146 _set_slave_idlemode(oh, idlemode, &v); 1157 _set_slave_idlemode(oh, idlemode, &v);
1147 } 1158 }
1148 1159
@@ -1208,8 +1219,13 @@ static void _idle_sysc(struct omap_hwmod *oh)
1208 sf = oh->class->sysc->sysc_flags; 1219 sf = oh->class->sysc->sysc_flags;
1209 1220
1210 if (sf & SYSC_HAS_SIDLEMODE) { 1221 if (sf & SYSC_HAS_SIDLEMODE) {
1211 idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ? 1222 /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1212 HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; 1223 if (oh->flags & HWMOD_SWSUP_SIDLE ||
1224 !(oh->class->sysc->idlemodes &
1225 (SIDLE_SMART | SIDLE_SMART_WKUP)))
1226 idlemode = HWMOD_IDLEMODE_FORCE;
1227 else
1228 idlemode = HWMOD_IDLEMODE_SMART;
1213 _set_slave_idlemode(oh, idlemode, &v); 1229 _set_slave_idlemode(oh, idlemode, &v);
1214 } 1230 }
1215 1231
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 950454a3fa31..b7bcba5221ba 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -393,8 +393,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_counter_sysc = {
393 .rev_offs = 0x0000, 393 .rev_offs = 0x0000,
394 .sysc_offs = 0x0004, 394 .sysc_offs = 0x0004,
395 .sysc_flags = SYSC_HAS_SIDLEMODE, 395 .sysc_flags = SYSC_HAS_SIDLEMODE,
396 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 396 .idlemodes = (SIDLE_FORCE | SIDLE_NO),
397 SIDLE_SMART_WKUP),
398 .sysc_fields = &omap_hwmod_sysc_type1, 397 .sysc_fields = &omap_hwmod_sysc_type1,
399}; 398};
400 399
@@ -854,6 +853,11 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
854 .name = "dss_hdmi", 853 .name = "dss_hdmi",
855 .class = &omap44xx_hdmi_hwmod_class, 854 .class = &omap44xx_hdmi_hwmod_class,
856 .clkdm_name = "l3_dss_clkdm", 855 .clkdm_name = "l3_dss_clkdm",
856 /*
857 * HDMI audio requires to use no-idle mode. Hence,
858 * set idle mode by software.
859 */
860 .flags = HWMOD_SWSUP_SIDLE,
857 .mpu_irqs = omap44xx_dss_hdmi_irqs, 861 .mpu_irqs = omap44xx_dss_hdmi_irqs,
858 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, 862 .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
859 .main_clk = "dss_48mhz_clk", 863 .main_clk = "dss_48mhz_clk",
@@ -1924,7 +1928,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
1924 1928
1925static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = { 1929static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
1926 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1930 { .role = "pad_fck", .clk = "pad_clks_ck" },
1927 { .role = "prcm_clk", .clk = "mcbsp1_sync_mux_ck" }, 1931 { .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
1928}; 1932};
1929 1933
1930static struct omap_hwmod omap44xx_mcbsp1_hwmod = { 1934static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
@@ -1959,7 +1963,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
1959 1963
1960static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = { 1964static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
1961 { .role = "pad_fck", .clk = "pad_clks_ck" }, 1965 { .role = "pad_fck", .clk = "pad_clks_ck" },
1962 { .role = "prcm_clk", .clk = "mcbsp2_sync_mux_ck" }, 1966 { .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
1963}; 1967};
1964 1968
1965static struct omap_hwmod omap44xx_mcbsp2_hwmod = { 1969static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
@@ -1994,7 +1998,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
1994 1998
1995static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = { 1999static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
1996 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2000 { .role = "pad_fck", .clk = "pad_clks_ck" },
1997 { .role = "prcm_clk", .clk = "mcbsp3_sync_mux_ck" }, 2001 { .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
1998}; 2002};
1999 2003
2000static struct omap_hwmod omap44xx_mcbsp3_hwmod = { 2004static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
@@ -2029,7 +2033,7 @@ static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
2029 2033
2030static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = { 2034static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
2031 { .role = "pad_fck", .clk = "pad_clks_ck" }, 2035 { .role = "pad_fck", .clk = "pad_clks_ck" },
2032 { .role = "prcm_clk", .clk = "mcbsp4_sync_mux_ck" }, 2036 { .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
2033}; 2037};
2034 2038
2035static struct omap_hwmod omap44xx_mcbsp4_hwmod = { 2039static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
@@ -3860,7 +3864,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_2 = {
3860}; 3864};
3861 3865
3862/* usb_host_fs -> l3_main_2 */ 3866/* usb_host_fs -> l3_main_2 */
3863static struct omap_hwmod_ocp_if omap44xx_usb_host_fs__l3_main_2 = { 3867static struct omap_hwmod_ocp_if __maybe_unused omap44xx_usb_host_fs__l3_main_2 = {
3864 .master = &omap44xx_usb_host_fs_hwmod, 3868 .master = &omap44xx_usb_host_fs_hwmod,
3865 .slave = &omap44xx_l3_main_2_hwmod, 3869 .slave = &omap44xx_l3_main_2_hwmod,
3866 .clk = "l3_div_ck", 3870 .clk = "l3_div_ck",
@@ -3918,7 +3922,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = {
3918}; 3922};
3919 3923
3920/* aess -> l4_abe */ 3924/* aess -> l4_abe */
3921static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { 3925static struct omap_hwmod_ocp_if __maybe_unused omap44xx_aess__l4_abe = {
3922 .master = &omap44xx_aess_hwmod, 3926 .master = &omap44xx_aess_hwmod,
3923 .slave = &omap44xx_l4_abe_hwmod, 3927 .slave = &omap44xx_l4_abe_hwmod,
3924 .clk = "ocp_abe_iclk", 3928 .clk = "ocp_abe_iclk",
@@ -4009,7 +4013,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = {
4009}; 4013};
4010 4014
4011/* l4_abe -> aess */ 4015/* l4_abe -> aess */
4012static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { 4016static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess = {
4013 .master = &omap44xx_l4_abe_hwmod, 4017 .master = &omap44xx_l4_abe_hwmod,
4014 .slave = &omap44xx_aess_hwmod, 4018 .slave = &omap44xx_aess_hwmod,
4015 .clk = "ocp_abe_iclk", 4019 .clk = "ocp_abe_iclk",
@@ -4027,7 +4031,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = {
4027}; 4031};
4028 4032
4029/* l4_abe -> aess (dma) */ 4033/* l4_abe -> aess (dma) */
4030static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { 4034static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_abe__aess_dma = {
4031 .master = &omap44xx_l4_abe_hwmod, 4035 .master = &omap44xx_l4_abe_hwmod,
4032 .slave = &omap44xx_aess_hwmod, 4036 .slave = &omap44xx_aess_hwmod,
4033 .clk = "ocp_abe_iclk", 4037 .clk = "ocp_abe_iclk",
@@ -5853,7 +5857,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {
5853}; 5857};
5854 5858
5855/* l4_cfg -> usb_host_fs */ 5859/* l4_cfg -> usb_host_fs */
5856static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_fs = { 5860static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
5857 .master = &omap44xx_l4_cfg_hwmod, 5861 .master = &omap44xx_l4_cfg_hwmod,
5858 .slave = &omap44xx_usb_host_fs_hwmod, 5862 .slave = &omap44xx_usb_host_fs_hwmod,
5859 .clk = "l4_div_ck", 5863 .clk = "l4_div_ck",
@@ -6010,13 +6014,13 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6010 &omap44xx_iva__l3_main_2, 6014 &omap44xx_iva__l3_main_2,
6011 &omap44xx_l3_main_1__l3_main_2, 6015 &omap44xx_l3_main_1__l3_main_2,
6012 &omap44xx_l4_cfg__l3_main_2, 6016 &omap44xx_l4_cfg__l3_main_2,
6013 &omap44xx_usb_host_fs__l3_main_2, 6017 /* &omap44xx_usb_host_fs__l3_main_2, */
6014 &omap44xx_usb_host_hs__l3_main_2, 6018 &omap44xx_usb_host_hs__l3_main_2,
6015 &omap44xx_usb_otg_hs__l3_main_2, 6019 &omap44xx_usb_otg_hs__l3_main_2,
6016 &omap44xx_l3_main_1__l3_main_3, 6020 &omap44xx_l3_main_1__l3_main_3,
6017 &omap44xx_l3_main_2__l3_main_3, 6021 &omap44xx_l3_main_2__l3_main_3,
6018 &omap44xx_l4_cfg__l3_main_3, 6022 &omap44xx_l4_cfg__l3_main_3,
6019 &omap44xx_aess__l4_abe, 6023 /* &omap44xx_aess__l4_abe, */
6020 &omap44xx_dsp__l4_abe, 6024 &omap44xx_dsp__l4_abe,
6021 &omap44xx_l3_main_1__l4_abe, 6025 &omap44xx_l3_main_1__l4_abe,
6022 &omap44xx_mpu__l4_abe, 6026 &omap44xx_mpu__l4_abe,
@@ -6025,8 +6029,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6025 &omap44xx_l4_cfg__l4_wkup, 6029 &omap44xx_l4_cfg__l4_wkup,
6026 &omap44xx_mpu__mpu_private, 6030 &omap44xx_mpu__mpu_private,
6027 &omap44xx_l4_cfg__ocp_wp_noc, 6031 &omap44xx_l4_cfg__ocp_wp_noc,
6028 &omap44xx_l4_abe__aess, 6032 /* &omap44xx_l4_abe__aess, */
6029 &omap44xx_l4_abe__aess_dma, 6033 /* &omap44xx_l4_abe__aess_dma, */
6030 &omap44xx_l3_main_2__c2c, 6034 &omap44xx_l3_main_2__c2c,
6031 &omap44xx_l4_wkup__counter_32k, 6035 &omap44xx_l4_wkup__counter_32k,
6032 &omap44xx_l4_cfg__ctrl_module_core, 6036 &omap44xx_l4_cfg__ctrl_module_core,
@@ -6132,7 +6136,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
6132 &omap44xx_l4_per__uart2, 6136 &omap44xx_l4_per__uart2,
6133 &omap44xx_l4_per__uart3, 6137 &omap44xx_l4_per__uart3,
6134 &omap44xx_l4_per__uart4, 6138 &omap44xx_l4_per__uart4,
6135 &omap44xx_l4_cfg__usb_host_fs, 6139 /* &omap44xx_l4_cfg__usb_host_fs, */
6136 &omap44xx_l4_cfg__usb_host_hs, 6140 &omap44xx_l4_cfg__usb_host_hs,
6137 &omap44xx_l4_cfg__usb_otg_hs, 6141 &omap44xx_l4_cfg__usb_otg_hs,
6138 &omap44xx_l4_cfg__usb_tll_hs, 6142 &omap44xx_l4_cfg__usb_tll_hs,
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index a05a62f9ee5b..acc216491b8a 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -155,10 +155,11 @@ static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
155 u8 multi = error & L3_ERROR_LOG_MULTI; 155 u8 multi = error & L3_ERROR_LOG_MULTI;
156 u32 address = omap3_l3_decode_addr(error_addr); 156 u32 address = omap3_l3_decode_addr(error_addr);
157 157
158 WARN(true, "%s seen by %s %s at address %x\n", 158 pr_err("%s seen by %s %s at address %x\n",
159 omap3_l3_code_string(code), 159 omap3_l3_code_string(code),
160 omap3_l3_initiator_string(initid), 160 omap3_l3_initiator_string(initid),
161 multi ? "Multiple Errors" : "", address); 161 multi ? "Multiple Errors" : "", address);
162 WARN_ON(1);
162 163
163 return IRQ_HANDLED; 164 return IRQ_HANDLED;
164} 165}
diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c
index 4c90477e6f82..d52651a05daa 100644
--- a/arch/arm/mach-omap2/omap_phy_internal.c
+++ b/arch/arm/mach-omap2/omap_phy_internal.c
@@ -239,21 +239,15 @@ void am35x_set_mode(u8 musb_mode)
239 239
240 devconf2 &= ~CONF2_OTGMODE; 240 devconf2 &= ~CONF2_OTGMODE;
241 switch (musb_mode) { 241 switch (musb_mode) {
242#ifdef CONFIG_USB_MUSB_HDRC_HCD
243 case MUSB_HOST: /* Force VBUS valid, ID = 0 */ 242 case MUSB_HOST: /* Force VBUS valid, ID = 0 */
244 devconf2 |= CONF2_FORCE_HOST; 243 devconf2 |= CONF2_FORCE_HOST;
245 break; 244 break;
246#endif
247#ifdef CONFIG_USB_GADGET_MUSB_HDRC
248 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */ 245 case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
249 devconf2 |= CONF2_FORCE_DEVICE; 246 devconf2 |= CONF2_FORCE_DEVICE;
250 break; 247 break;
251#endif
252#ifdef CONFIG_USB_MUSB_OTG
253 case MUSB_OTG: /* Don't override the VBUS/ID comparators */ 248 case MUSB_OTG: /* Don't override the VBUS/ID comparators */
254 devconf2 |= CONF2_NO_OVERRIDE; 249 devconf2 |= CONF2_NO_OVERRIDE;
255 break; 250 break;
256#endif
257 default: 251 default:
258 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode); 252 pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
259 } 253 }
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index a34023d0ca7c..3a595e899724 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -724,6 +724,7 @@ int __init omap3_pm_init(void)
724 ret = request_irq(omap_prcm_event_to_irq("io"), 724 ret = request_irq(omap_prcm_event_to_irq("io"),
725 _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io", 725 _prcm_int_handle_io, IRQF_SHARED | IRQF_NO_SUSPEND, "pm_io",
726 omap3_pm_init); 726 omap3_pm_init);
727 enable_irq(omap_prcm_event_to_irq("io"));
727 728
728 if (ret) { 729 if (ret) {
729 pr_err("pm: Failed to request pm_io irq\n"); 730 pr_err("pm: Failed to request pm_io irq\n");
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9ce765407ad5..21cb74003a56 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -15,6 +15,7 @@
15#include <linux/errno.h> 15#include <linux/errno.h>
16#include <linux/err.h> 16#include <linux/err.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/irq.h>
18 19
19#include "common.h" 20#include "common.h"
20#include <plat/cpu.h> 21#include <plat/cpu.h>
@@ -303,8 +304,15 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask)
303 304
304static int __init omap3xxx_prcm_init(void) 305static int __init omap3xxx_prcm_init(void)
305{ 306{
306 if (cpu_is_omap34xx()) 307 int ret = 0;
307 return omap_prcm_register_chain_handler(&omap3_prcm_irq_setup); 308
308 return 0; 309 if (cpu_is_omap34xx()) {
310 ret = omap_prcm_register_chain_handler(&omap3_prcm_irq_setup);
311 if (!ret)
312 irq_set_status_flags(omap_prcm_event_to_irq("io"),
313 IRQ_NOAUTOEN);
314 }
315
316 return ret;
309} 317}
310subsys_initcall(omap3xxx_prcm_init); 318subsys_initcall(omap3xxx_prcm_init);
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 292d4aaca068..c1b93c752d70 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -57,6 +57,7 @@ struct omap_uart_state {
57 57
58 struct list_head node; 58 struct list_head node;
59 struct omap_hwmod *oh; 59 struct omap_hwmod *oh;
60 struct omap_device_pad default_omap_uart_pads[2];
60}; 61};
61 62
62static LIST_HEAD(uart_list); 63static LIST_HEAD(uart_list);
@@ -126,11 +127,70 @@ static void omap_uart_set_smartidle(struct platform_device *pdev) {}
126#endif /* CONFIG_PM */ 127#endif /* CONFIG_PM */
127 128
128#ifdef CONFIG_OMAP_MUX 129#ifdef CONFIG_OMAP_MUX
129static void omap_serial_fill_default_pads(struct omap_board_data *bdata) 130
131#define OMAP_UART_DEFAULT_PAD_NAME_LEN 28
132static char rx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN],
133 tx_pad_name[OMAP_UART_DEFAULT_PAD_NAME_LEN] __initdata;
134
135static void __init
136omap_serial_fill_uart_tx_rx_pads(struct omap_board_data *bdata,
137 struct omap_uart_state *uart)
138{
139 uart->default_omap_uart_pads[0].name = rx_pad_name;
140 uart->default_omap_uart_pads[0].flags = OMAP_DEVICE_PAD_REMUX |
141 OMAP_DEVICE_PAD_WAKEUP;
142 uart->default_omap_uart_pads[0].enable = OMAP_PIN_INPUT |
143 OMAP_MUX_MODE0;
144 uart->default_omap_uart_pads[0].idle = OMAP_PIN_INPUT | OMAP_MUX_MODE0;
145 uart->default_omap_uart_pads[1].name = tx_pad_name;
146 uart->default_omap_uart_pads[1].enable = OMAP_PIN_OUTPUT |
147 OMAP_MUX_MODE0;
148 bdata->pads = uart->default_omap_uart_pads;
149 bdata->pads_cnt = ARRAY_SIZE(uart->default_omap_uart_pads);
150}
151
152static void __init omap_serial_check_wakeup(struct omap_board_data *bdata,
153 struct omap_uart_state *uart)
130{ 154{
155 struct omap_mux_partition *tx_partition = NULL, *rx_partition = NULL;
156 struct omap_mux *rx_mux = NULL, *tx_mux = NULL;
157 char *rx_fmt, *tx_fmt;
158 int uart_nr = bdata->id + 1;
159
160 if (bdata->id != 2) {
161 rx_fmt = "uart%d_rx.uart%d_rx";
162 tx_fmt = "uart%d_tx.uart%d_tx";
163 } else {
164 rx_fmt = "uart%d_rx_irrx.uart%d_rx_irrx";
165 tx_fmt = "uart%d_tx_irtx.uart%d_tx_irtx";
166 }
167
168 snprintf(rx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, rx_fmt,
169 uart_nr, uart_nr);
170 snprintf(tx_pad_name, OMAP_UART_DEFAULT_PAD_NAME_LEN, tx_fmt,
171 uart_nr, uart_nr);
172
173 if (omap_mux_get_by_name(rx_pad_name, &rx_partition, &rx_mux) >= 0 &&
174 omap_mux_get_by_name
175 (tx_pad_name, &tx_partition, &tx_mux) >= 0) {
176 u16 tx_mode, rx_mode;
177
178 tx_mode = omap_mux_read(tx_partition, tx_mux->reg_offset);
179 rx_mode = omap_mux_read(rx_partition, rx_mux->reg_offset);
180
181 /*
182 * Check if uart is used in default tx/rx mode i.e. in mux mode0
183 * if yes then configure rx pin for wake up capability
184 */
185 if (OMAP_MODE_UART(rx_mode) && OMAP_MODE_UART(tx_mode))
186 omap_serial_fill_uart_tx_rx_pads(bdata, uart);
187 }
131} 188}
132#else 189#else
133static void omap_serial_fill_default_pads(struct omap_board_data *bdata) {} 190static void __init omap_serial_check_wakeup(struct omap_board_data *bdata,
191 struct omap_uart_state *uart)
192{
193}
134#endif 194#endif
135 195
136static char *cmdline_find_option(char *str) 196static char *cmdline_find_option(char *str)
@@ -287,8 +347,7 @@ void __init omap_serial_board_init(struct omap_uart_port_info *info)
287 bdata.pads = NULL; 347 bdata.pads = NULL;
288 bdata.pads_cnt = 0; 348 bdata.pads_cnt = 0;
289 349
290 if (cpu_is_omap44xx() || cpu_is_omap34xx()) 350 omap_serial_check_wakeup(&bdata, uart);
291 omap_serial_fill_default_pads(&bdata);
292 351
293 if (!info) 352 if (!info)
294 omap_serial_init_port(&bdata, NULL); 353 omap_serial_init_port(&bdata, NULL);
diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c
index 119d5a910f3a..43a979075338 100644
--- a/arch/arm/mach-omap2/twl-common.c
+++ b/arch/arm/mach-omap2/twl-common.c
@@ -32,6 +32,7 @@
32#include "twl-common.h" 32#include "twl-common.h"
33#include "pm.h" 33#include "pm.h"
34#include "voltage.h" 34#include "voltage.h"
35#include "mux.h"
35 36
36static struct i2c_board_info __initdata pmic_i2c_board_info = { 37static struct i2c_board_info __initdata pmic_i2c_board_info = {
37 .addr = 0x48, 38 .addr = 0x48,
@@ -77,6 +78,7 @@ void __init omap4_pmic_init(const char *pmic_type,
77 struct twl6040_platform_data *twl6040_data, int twl6040_irq) 78 struct twl6040_platform_data *twl6040_data, int twl6040_irq)
78{ 79{
79 /* PMIC part*/ 80 /* PMIC part*/
81 omap_mux_init_signal("sys_nirq1", OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE);
80 strncpy(omap4_i2c1_board_info[0].type, pmic_type, 82 strncpy(omap4_i2c1_board_info[0].type, pmic_type,
81 sizeof(omap4_i2c1_board_info[0].type)); 83 sizeof(omap4_i2c1_board_info[0].type));
82 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N; 84 omap4_i2c1_board_info[0].irq = OMAP44XX_IRQ_SYS_1N;
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index b19d1b43c12e..c4a576856661 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -41,12 +41,10 @@ static struct musb_hdrc_config musb_config = {
41}; 41};
42 42
43static struct musb_hdrc_platform_data musb_plat = { 43static struct musb_hdrc_platform_data musb_plat = {
44#ifdef CONFIG_USB_MUSB_OTG 44#ifdef CONFIG_USB_GADGET_MUSB_HDRC
45 .mode = MUSB_OTG, 45 .mode = MUSB_OTG,
46#elif defined(CONFIG_USB_MUSB_HDRC_HCD) 46#else
47 .mode = MUSB_HOST, 47 .mode = MUSB_HOST,
48#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
49 .mode = MUSB_PERIPHERAL,
50#endif 48#endif
51 /* .clock is set dynamically */ 49 /* .clock is set dynamically */
52 .config = &musb_config, 50 .config = &musb_config,
diff --git a/arch/arm/mach-omap2/usb-tusb6010.c b/arch/arm/mach-omap2/usb-tusb6010.c
index db84a46ce7fd..805bea6edf17 100644
--- a/arch/arm/mach-omap2/usb-tusb6010.c
+++ b/arch/arm/mach-omap2/usb-tusb6010.c
@@ -300,7 +300,7 @@ tusb6010_setup_interface(struct musb_hdrc_platform_data *data,
300 printk(error, 3, status); 300 printk(error, 3, status);
301 return status; 301 return status;
302 } 302 }
303 tusb_resources[2].start = irq + IH_GPIO_BASE; 303 tusb_resources[2].start = gpio_to_irq(irq);
304 304
305 /* set up memory timings ... can speed them up later */ 305 /* set up memory timings ... can speed them up later */
306 if (!ps_refclk) { 306 if (!ps_refclk) {
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
index 96484bcd34ca..11a3c1e9801f 100644
--- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h
+++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h
@@ -35,5 +35,5 @@
35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) 35#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204)
36 36
37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) 37#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300)
38 38#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300)
39#endif 39#endif
diff --git a/arch/arm/mach-orion5x/include/mach/io.h b/arch/arm/mach-orion5x/include/mach/io.h
new file mode 100644
index 000000000000..1aa5d0a50a0b
--- /dev/null
+++ b/arch/arm/mach-orion5x/include/mach/io.h
@@ -0,0 +1,22 @@
1/*
2 * arch/arm/mach-orion5x/include/mach/io.h
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef __ASM_ARCH_IO_H
10#define __ASM_ARCH_IO_H
11
12#include <mach/orion5x.h>
13#include <asm/sizes.h>
14
15#define IO_SPACE_LIMIT SZ_2M
16static inline void __iomem *__io(unsigned long addr)
17{
18 return (void __iomem *)(addr + ORION5X_PCIE_IO_VIRT_BASE);
19}
20
21#define __io(a) __io(a)
22#endif
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 2745f5d95b3f..683e085ce162 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -82,6 +82,7 @@
82#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) 82#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100)
83 83
84#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) 84#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000)
85#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x20000)
85 86
86#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) 87#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000)
87 88
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index d09da6a746b8..d3de84b0dcbe 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -127,7 +127,11 @@ static unsigned long hx4700_pin_config[] __initdata = {
127 GPIO19_SSP2_SCLK, 127 GPIO19_SSP2_SCLK,
128 GPIO86_SSP2_RXD, 128 GPIO86_SSP2_RXD,
129 GPIO87_SSP2_TXD, 129 GPIO87_SSP2_TXD,
130 GPIO88_GPIO, 130 GPIO88_GPIO | MFP_LPM_DRIVE_HIGH, /* TSC2046_CS */
131
132 /* BQ24022 Regulator */
133 GPIO72_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_nCHARGE_EN */
134 GPIO96_GPIO | MFP_LPM_KEEP_OUTPUT, /* BQ24022_ISET2 */
131 135
132 /* HX4700 specific input GPIOs */ 136 /* HX4700 specific input GPIOs */
133 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */ 137 GPIO12_GPIO | WAKEUP_ON_EDGE_RISE, /* ASIC3_IRQ */
@@ -135,6 +139,10 @@ static unsigned long hx4700_pin_config[] __initdata = {
135 GPIO14_GPIO, /* nWLAN_IRQ */ 139 GPIO14_GPIO, /* nWLAN_IRQ */
136 140
137 /* HX4700 specific output GPIOs */ 141 /* HX4700 specific output GPIOs */
142 GPIO61_GPIO | MFP_LPM_DRIVE_HIGH, /* W3220_nRESET */
143 GPIO71_GPIO | MFP_LPM_DRIVE_HIGH, /* ASIC3_nRESET */
144 GPIO81_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_GP_nRESET */
145 GPIO116_GPIO | MFP_LPM_DRIVE_HIGH, /* CPU_HW_nRESET */
138 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */ 146 GPIO102_GPIO | MFP_LPM_DRIVE_LOW, /* SYNAPTICS_POWER_ON */
139 147
140 GPIO10_GPIO, /* GSM_IRQ */ 148 GPIO10_GPIO, /* GSM_IRQ */
@@ -872,14 +880,19 @@ static struct gpio global_gpios[] = {
872 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" }, 880 { GPIO110_HX4700_LCD_LVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_LVDD" },
873 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" }, 881 { GPIO111_HX4700_LCD_AVDD_3V3_ON, GPIOF_OUT_INIT_HIGH, "LCD_AVDD" },
874 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" }, 882 { GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
883 { GPIO61_HX4700_W3220_nRESET, GPIOF_OUT_INIT_HIGH, "W3220_nRESET" },
875 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" }, 884 { GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
885 { GPIO81_HX4700_CPU_GP_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_GP_nRESET" },
876 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" }, 886 { GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
887 { GPIO116_HX4700_CPU_HW_nRESET, GPIOF_OUT_INIT_HIGH, "CPU_HW_nRESET" },
877}; 888};
878 889
879static void __init hx4700_init(void) 890static void __init hx4700_init(void)
880{ 891{
881 int ret; 892 int ret;
882 893
894 PCFR = PCFR_GPR_EN | PCFR_OPDE;
895
883 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config)); 896 pxa2xx_mfp_config(ARRAY_AND_SIZE(hx4700_pin_config));
884 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1); 897 gpio_set_wake(GPIO12_HX4700_ASIC3_IRQ, 1);
885 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios)); 898 ret = gpio_request_array(ARRAY_AND_SIZE(global_gpios));
diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c
index 414364eb426c..cb2883d553b5 100644
--- a/arch/arm/mach-s3c24xx/clock-s3c2440.c
+++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c
@@ -106,7 +106,7 @@ static struct clk s3c2440_clk_cam_upll = {
106static struct clk s3c2440_clk_ac97 = { 106static struct clk s3c2440_clk_ac97 = {
107 .name = "ac97", 107 .name = "ac97",
108 .enable = s3c2410_clkcon_enable, 108 .enable = s3c2410_clkcon_enable,
109 .ctrlbit = S3C2440_CLKCON_CAMERA, 109 .ctrlbit = S3C2440_CLKCON_AC97,
110}; 110};
111 111
112static unsigned long s3c2440_fclk_n_getrate(struct clk *clk) 112static unsigned long s3c2440_fclk_n_getrate(struct clk *clk)
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index f31383c32f9c..df33909205e2 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -186,6 +186,12 @@ config SH_TIMER_TMU
186 help 186 help
187 This enables build of the TMU timer driver. 187 This enables build of the TMU timer driver.
188 188
189config EM_TIMER_STI
190 bool "STI timer driver"
191 default y
192 help
193 This enables build of the STI timer driver.
194
189endmenu 195endmenu
190 196
191config SH_CLK_CPG 197config SH_CLK_CPG
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c
index 9e37026ef9dd..9bd135531d76 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva.c
@@ -779,6 +779,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
779 .init_irq = r8a7740_init_irq, 779 .init_irq = r8a7740_init_irq,
780 .handle_irq = shmobile_handle_irq_intc, 780 .handle_irq = shmobile_handle_irq_intc,
781 .init_machine = eva_init, 781 .init_machine = eva_init,
782 .init_late = shmobile_init_late,
782 .timer = &shmobile_timer, 783 .timer = &shmobile_timer,
783 .dt_compat = eva_boards_compat_dt, 784 .dt_compat = eva_boards_compat_dt,
784MACHINE_END 785MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9d.c b/arch/arm/mach-shmobile/board-kzm9d.c
index 7bc5e7d39f9b..6a33cf393428 100644
--- a/arch/arm/mach-shmobile/board-kzm9d.c
+++ b/arch/arm/mach-shmobile/board-kzm9d.c
@@ -80,6 +80,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
80 .init_irq = emev2_init_irq, 80 .init_irq = emev2_init_irq,
81 .handle_irq = gic_handle_irq, 81 .handle_irq = gic_handle_irq,
82 .init_machine = kzm9d_add_standard_devices, 82 .init_machine = kzm9d_add_standard_devices,
83 .init_late = shmobile_init_late,
83 .timer = &shmobile_timer, 84 .timer = &shmobile_timer,
84 .dt_compat = kzm9d_boards_compat_dt, 85 .dt_compat = kzm9d_boards_compat_dt,
85MACHINE_END 86MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-kzm9g.c b/arch/arm/mach-shmobile/board-kzm9g.c
index d8e33b682832..c0ae815e7beb 100644
--- a/arch/arm/mach-shmobile/board-kzm9g.c
+++ b/arch/arm/mach-shmobile/board-kzm9g.c
@@ -455,6 +455,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
455 .init_irq = sh73a0_init_irq, 455 .init_irq = sh73a0_init_irq,
456 .handle_irq = gic_handle_irq, 456 .handle_irq = gic_handle_irq,
457 .init_machine = kzm_init, 457 .init_machine = kzm_init,
458 .init_late = shmobile_init_late,
458 .timer = &shmobile_timer, 459 .timer = &shmobile_timer,
459 .dt_compat = kzm9g_boards_compat_dt, 460 .dt_compat = kzm9g_boards_compat_dt,
460MACHINE_END 461MACHINE_END
diff --git a/arch/arm/mach-shmobile/board-mackerel.c b/arch/arm/mach-shmobile/board-mackerel.c
index b577f7c44678..150122a44630 100644
--- a/arch/arm/mach-shmobile/board-mackerel.c
+++ b/arch/arm/mach-shmobile/board-mackerel.c
@@ -1512,6 +1512,9 @@ static void __init mackerel_init(void)
1512 gpio_request(GPIO_FN_SDHID0_1, NULL); 1512 gpio_request(GPIO_FN_SDHID0_1, NULL);
1513 gpio_request(GPIO_FN_SDHID0_0, NULL); 1513 gpio_request(GPIO_FN_SDHID0_0, NULL);
1514 1514
1515 /* SDHI0 PORT172 card-detect IRQ26 */
1516 gpio_request(GPIO_FN_IRQ26_172, NULL);
1517
1515#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) 1518#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
1516 /* enable SDHI1 */ 1519 /* enable SDHI1 */
1517 gpio_request(GPIO_FN_SDHICMD1, NULL); 1520 gpio_request(GPIO_FN_SDHICMD1, NULL);
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5361e5..3946c4ba2aa8 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
475 475
476enum { MSTP001, 476enum { MSTP001,
477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100, 477 MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
478 MSTP219, 478 MSTP219, MSTP218,
479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, 479 MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
480 MSTP331, MSTP329, MSTP325, MSTP323, MSTP318, 480 MSTP331, MSTP329, MSTP325, MSTP323,
481 MSTP314, MSTP313, MSTP312, MSTP311, 481 MSTP314, MSTP313, MSTP312, MSTP311,
482 MSTP303, MSTP302, MSTP301, MSTP300, 482 MSTP303, MSTP302, MSTP301, MSTP300,
483 MSTP411, MSTP410, MSTP403, 483 MSTP411, MSTP410, MSTP403,
@@ -497,6 +497,7 @@ static struct clk mstp_clks[MSTP_NR] = {
497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ 497 [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */ 498 [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */ 499 [MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
500 [MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
500 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */ 501 [MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
501 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */ 502 [MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
502 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */ 503 [MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
@@ -508,7 +509,6 @@ static struct clk mstp_clks[MSTP_NR] = {
508 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */ 509 [MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
509 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */ 510 [MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
510 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */ 511 [MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
511 [MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
512 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */ 512 [MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
513 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */ 513 [MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */ 514 [MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
@@ -552,6 +552,7 @@ static struct clk_lookup lookups[] = {
552 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */ 552 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
553 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ 553 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
554 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ 554 CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
555 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
555 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ 556 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
556 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ 557 CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
557 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */ 558 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
@@ -563,7 +564,6 @@ static struct clk_lookup lookups[] = {
563 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */ 564 CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
564 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */ 565 CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
565 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */ 566 CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
566 CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
567 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */ 567 CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
568 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */ 568 CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
569 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */ 569 CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
index 550b23df4fd4..f04fad4ec4fb 100644
--- a/arch/arm/mach-shmobile/intc-r8a7779.c
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -35,6 +35,9 @@
35#define INT2SMSKCR3 0xfe7822ac 35#define INT2SMSKCR3 0xfe7822ac
36#define INT2SMSKCR4 0xfe7822b0 36#define INT2SMSKCR4 0xfe7822b0
37 37
38#define INT2NTSR0 0xfe700060
39#define INT2NTSR1 0xfe700064
40
38static int r8a7779_set_wake(struct irq_data *data, unsigned int on) 41static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
39{ 42{
40 return 0; /* always allow wakeup */ 43 return 0; /* always allow wakeup */
@@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
49 gic_init(0, 29, gic_dist_base, gic_cpu_base); 52 gic_init(0, 29, gic_dist_base, gic_cpu_base);
50 gic_arch_extn.irq_set_wake = r8a7779_set_wake; 53 gic_arch_extn.irq_set_wake = r8a7779_set_wake;
51 54
55 /* route all interrupts to ARM */
56 __raw_writel(0xffffffff, INT2NTSR0);
57 __raw_writel(0x3fffffff, INT2NTSR1);
58
52 /* unmask all known interrupts in INTCS2 */ 59 /* unmask all known interrupts in INTCS2 */
53 __raw_writel(0xfffffff0, INT2SMSKCR0); 60 __raw_writel(0xfffffff0, INT2SMSKCR0);
54 __raw_writel(0xfff7ffff, INT2SMSKCR1); 61 __raw_writel(0xfff7ffff, INT2SMSKCR1);
diff --git a/arch/arm/mach-shmobile/platsmp.c b/arch/arm/mach-shmobile/platsmp.c
index bacdd667e3b1..fde0d23121dc 100644
--- a/arch/arm/mach-shmobile/platsmp.c
+++ b/arch/arm/mach-shmobile/platsmp.c
@@ -22,10 +22,20 @@
22#include <mach/common.h> 22#include <mach/common.h>
23#include <mach/emev2.h> 23#include <mach/emev2.h>
24 24
25#ifdef CONFIG_ARCH_SH73A0
25#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \ 26#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
26 of_machine_is_compatible("renesas,sh73a0")) 27 of_machine_is_compatible("renesas,sh73a0"))
28#else
29#define is_sh73a0() (0)
30#endif
31
27#define is_r8a7779() machine_is_marzen() 32#define is_r8a7779() machine_is_marzen()
33
34#ifdef CONFIG_ARCH_EMEV2
28#define is_emev2() of_machine_is_compatible("renesas,emev2") 35#define is_emev2() of_machine_is_compatible("renesas,emev2")
36#else
37#define is_emev2() (0)
38#endif
29 39
30static unsigned int __init shmobile_smp_get_core_count(void) 40static unsigned int __init shmobile_smp_get_core_count(void)
31{ 41{
diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c
index 6a4bd582c028..fafce9ce8218 100644
--- a/arch/arm/mach-shmobile/setup-sh7372.c
+++ b/arch/arm/mach-shmobile/setup-sh7372.c
@@ -484,7 +484,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
484 }, 484 },
485}; 485};
486 486
487#define SH7372_CHCLR 0x220 487#define SH7372_CHCLR (0x220 - 0x20)
488 488
489static const struct sh_dmae_channel sh7372_dmae_channels[] = { 489static const struct sh_dmae_channel sh7372_dmae_channels[] = {
490 { 490 {
diff --git a/arch/arm/mach-spear13xx/include/mach/debug-macro.S b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
index ea1564609bd4..9e3ae6bfe50d 100644
--- a/arch/arm/mach-spear13xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear13xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header spear13xx machine family 4 * Debugging macro include header spear13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/dma.h b/arch/arm/mach-spear13xx/include/mach/dma.h
index 383ab04dc6c9..d50bdb605925 100644
--- a/arch/arm/mach-spear13xx/include/mach/dma.h
+++ b/arch/arm/mach-spear13xx/include/mach/dma.h
@@ -4,7 +4,7 @@
4 * DMA information for SPEAr13xx machine family 4 * DMA information for SPEAr13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/generic.h b/arch/arm/mach-spear13xx/include/mach/generic.h
index 6d8c45b9f298..dac57fd0cdfd 100644
--- a/arch/arm/mach-spear13xx/include/mach/generic.h
+++ b/arch/arm/mach-spear13xx/include/mach/generic.h
@@ -4,7 +4,7 @@
4 * spear13xx machine family generic header file 4 * spear13xx machine family generic header file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/gpio.h b/arch/arm/mach-spear13xx/include/mach/gpio.h
index cd6f4f86a56b..85f176311f63 100644
--- a/arch/arm/mach-spear13xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear13xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr13xx machine family 4 * GPIO macros for SPEAr13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/irqs.h b/arch/arm/mach-spear13xx/include/mach/irqs.h
index f542a24aa5f2..271a62b4cd31 100644
--- a/arch/arm/mach-spear13xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear13xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
4 * IRQ helper macros for spear13xx machine family 4 * IRQ helper macros for spear13xx machine family
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/spear.h b/arch/arm/mach-spear13xx/include/mach/spear.h
index 30c57ef72686..65f27def239b 100644
--- a/arch/arm/mach-spear13xx/include/mach/spear.h
+++ b/arch/arm/mach-spear13xx/include/mach/spear.h
@@ -4,7 +4,7 @@
4 * spear13xx Machine family specific definition 4 * spear13xx Machine family specific definition
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/timex.h b/arch/arm/mach-spear13xx/include/mach/timex.h
index 31af3e8d976e..3a58b8284a6a 100644
--- a/arch/arm/mach-spear13xx/include/mach/timex.h
+++ b/arch/arm/mach-spear13xx/include/mach/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family specific timex definitions 4 * SPEAr3XX machine family specific timex definitions
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/include/mach/uncompress.h b/arch/arm/mach-spear13xx/include/mach/uncompress.h
index c7840896ae6e..70fe72f05dea 100644
--- a/arch/arm/mach-spear13xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear13xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1310.c b/arch/arm/mach-spear13xx/spear1310.c
index fefd15b2f380..732d29bc7330 100644
--- a/arch/arm/mach-spear13xx/spear1310.c
+++ b/arch/arm/mach-spear13xx/spear1310.c
@@ -4,7 +4,7 @@
4 * SPEAr1310 machine source file 4 * SPEAr1310 machine source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear1340.c b/arch/arm/mach-spear13xx/spear1340.c
index ee38cbc56869..81e4ed76ad06 100644
--- a/arch/arm/mach-spear13xx/spear1340.c
+++ b/arch/arm/mach-spear13xx/spear1340.c
@@ -4,7 +4,7 @@
4 * SPEAr1340 machine source file 4 * SPEAr1340 machine source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear13xx/spear13xx.c b/arch/arm/mach-spear13xx/spear13xx.c
index 50b349ae863d..cf936b106e27 100644
--- a/arch/arm/mach-spear13xx/spear13xx.c
+++ b/arch/arm/mach-spear13xx/spear13xx.c
@@ -4,7 +4,7 @@
4 * SPEAr13XX machines common source file 4 * SPEAr13XX machines common source file
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/debug-macro.S b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
index 590519f10d6e..0a6381fad5d9 100644
--- a/arch/arm/mach-spear3xx/include/mach/debug-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header spear3xx machine family 4 * Debugging macro include header spear3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/generic.h b/arch/arm/mach-spear3xx/include/mach/generic.h
index 4a95b9453c2a..ce19113ca791 100644
--- a/arch/arm/mach-spear3xx/include/mach/generic.h
+++ b/arch/arm/mach-spear3xx/include/mach/generic.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family generic header file 4 * SPEAr3XX machine family generic header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/gpio.h b/arch/arm/mach-spear3xx/include/mach/gpio.h
index 451b2081bfc9..2ac74c6db7f1 100644
--- a/arch/arm/mach-spear3xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear3xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr3xx machine family 4 * GPIO macros for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar<viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/irqs.h b/arch/arm/mach-spear3xx/include/mach/irqs.h
index 51bd62a0254c..803de76f5f36 100644
--- a/arch/arm/mach-spear3xx/include/mach/irqs.h
+++ b/arch/arm/mach-spear3xx/include/mach/irqs.h
@@ -4,7 +4,7 @@
4 * IRQ helper macros for SPEAr3xx machine family 4 * IRQ helper macros for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/misc_regs.h b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
index 18e2ac576f25..6309bf68d6f8 100644
--- a/arch/arm/mach-spear3xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear3xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
4 * Miscellaneous registers definitions for SPEAr3xx machine family 4 * Miscellaneous registers definitions for SPEAr3xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/spear.h b/arch/arm/mach-spear3xx/include/mach/spear.h
index 51eb953148a9..8cca95193d4d 100644
--- a/arch/arm/mach-spear3xx/include/mach/spear.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear.h
@@ -4,7 +4,7 @@
4 * SPEAr3xx Machine family specific definition 4 * SPEAr3xx Machine family specific definition
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/timex.h b/arch/arm/mach-spear3xx/include/mach/timex.h
index a38cc9de876f..9f5d08bd0c44 100644
--- a/arch/arm/mach-spear3xx/include/mach/timex.h
+++ b/arch/arm/mach-spear3xx/include/mach/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr3XX machine family specific timex definitions 4 * SPEAr3XX machine family specific timex definitions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/include/mach/uncompress.h b/arch/arm/mach-spear3xx/include/mach/uncompress.h
index 53ba8bbc0dfa..b909b011f7c8 100644
--- a/arch/arm/mach-spear3xx/include/mach/uncompress.h
+++ b/arch/arm/mach-spear3xx/include/mach/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c
index f74a05bdb829..0f882ecb7d81 100644
--- a/arch/arm/mach-spear3xx/spear300.c
+++ b/arch/arm/mach-spear3xx/spear300.c
@@ -4,7 +4,7 @@
4 * SPEAr300 machine source file 4 * SPEAr300 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear310.c b/arch/arm/mach-spear3xx/spear310.c
index 84dfb0900747..bbcf4571d361 100644
--- a/arch/arm/mach-spear3xx/spear310.c
+++ b/arch/arm/mach-spear3xx/spear310.c
@@ -4,7 +4,7 @@
4 * SPEAr310 machine source file 4 * SPEAr310 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear320.c b/arch/arm/mach-spear3xx/spear320.c
index a88fa841d29d..88d483bcd66a 100644
--- a/arch/arm/mach-spear3xx/spear320.c
+++ b/arch/arm/mach-spear3xx/spear320.c
@@ -4,7 +4,7 @@
4 * SPEAr320 machine source file 4 * SPEAr320 machine source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c
index f22419ed74a8..66db5f13af84 100644
--- a/arch/arm/mach-spear3xx/spear3xx.c
+++ b/arch/arm/mach-spear3xx/spear3xx.c
@@ -4,7 +4,7 @@
4 * SPEAr3XX machines common source file 4 * SPEAr3XX machines common source file
5 * 5 *
6 * Copyright (C) 2009-2012 ST Microelectronics 6 * Copyright (C) 2009-2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
@@ -87,7 +87,7 @@ void __init spear3xx_map_io(void)
87 87
88static void __init spear3xx_timer_init(void) 88static void __init spear3xx_timer_init(void)
89{ 89{
90 char pclk_name[] = "pll3_48m_clk"; 90 char pclk_name[] = "pll3_clk";
91 struct clk *gpt_clk, *pclk; 91 struct clk *gpt_clk, *pclk;
92 92
93 spear3xx_clk_init(); 93 spear3xx_clk_init();
diff --git a/arch/arm/mach-spear6xx/include/mach/gpio.h b/arch/arm/mach-spear6xx/include/mach/gpio.h
index 3a789dbb69f7..d42cefc0356d 100644
--- a/arch/arm/mach-spear6xx/include/mach/gpio.h
+++ b/arch/arm/mach-spear6xx/include/mach/gpio.h
@@ -4,7 +4,7 @@
4 * GPIO macros for SPEAr6xx machine family 4 * GPIO macros for SPEAr6xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/include/mach/misc_regs.h b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
index 179e45774b3a..c34acc201d34 100644
--- a/arch/arm/mach-spear6xx/include/mach/misc_regs.h
+++ b/arch/arm/mach-spear6xx/include/mach/misc_regs.h
@@ -4,7 +4,7 @@
4 * Miscellaneous registers definitions for SPEAr6xx machine family 4 * Miscellaneous registers definitions for SPEAr6xx machine family
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c
index 2e2e3596583e..9af67d003c62 100644
--- a/arch/arm/mach-spear6xx/spear6xx.c
+++ b/arch/arm/mach-spear6xx/spear6xx.c
@@ -423,7 +423,7 @@ void __init spear6xx_map_io(void)
423 423
424static void __init spear6xx_timer_init(void) 424static void __init spear6xx_timer_init(void)
425{ 425{
426 char pclk_name[] = "pll3_48m_clk"; 426 char pclk_name[] = "pll3_clk";
427 struct clk *gpt_clk, *pclk; 427 struct clk *gpt_clk, *pclk;
428 428
429 spear6xx_clk_init(); 429 spear6xx_clk_init();
diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c
index 4d6a2ee99c3b..5beb7ebe2948 100644
--- a/arch/arm/mach-tegra/reset.c
+++ b/arch/arm/mach-tegra/reset.c
@@ -33,7 +33,7 @@
33 33
34static bool is_enabled; 34static bool is_enabled;
35 35
36static void tegra_cpu_reset_handler_enable(void) 36static void __init tegra_cpu_reset_handler_enable(void)
37{ 37{
38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE); 38 void __iomem *iram_base = IO_ADDRESS(TEGRA_IRAM_RESET_BASE);
39 void __iomem *evp_cpu_reset = 39 void __iomem *evp_cpu_reset =
diff --git a/arch/arm/mach-ux500/board-mop500.c b/arch/arm/mach-ux500/board-mop500.c
index 9c74ac545849..4fd93f5c49ec 100644
--- a/arch/arm/mach-ux500/board-mop500.c
+++ b/arch/arm/mach-ux500/board-mop500.c
@@ -580,43 +580,12 @@ static void ux500_uart0_reset(void)
580 udelay(1); 580 udelay(1);
581} 581}
582 582
583/* This needs to be referenced by callbacks */
584struct pinctrl *u0_p;
585struct pinctrl_state *u0_def;
586struct pinctrl_state *u0_sleep;
587
588static void ux500_uart0_init(void)
589{
590 int ret;
591
592 if (IS_ERR(u0_p) || IS_ERR(u0_def))
593 return;
594
595 ret = pinctrl_select_state(u0_p, u0_def);
596 if (ret)
597 pr_err("could not set UART0 defstate\n");
598}
599
600static void ux500_uart0_exit(void)
601{
602 int ret;
603
604 if (IS_ERR(u0_p) || IS_ERR(u0_sleep))
605 return;
606
607 ret = pinctrl_select_state(u0_p, u0_sleep);
608 if (ret)
609 pr_err("could not set UART0 idlestate\n");
610}
611
612static struct amba_pl011_data uart0_plat = { 583static struct amba_pl011_data uart0_plat = {
613#ifdef CONFIG_STE_DMA40 584#ifdef CONFIG_STE_DMA40
614 .dma_filter = stedma40_filter, 585 .dma_filter = stedma40_filter,
615 .dma_rx_param = &uart0_dma_cfg_rx, 586 .dma_rx_param = &uart0_dma_cfg_rx,
616 .dma_tx_param = &uart0_dma_cfg_tx, 587 .dma_tx_param = &uart0_dma_cfg_tx,
617#endif 588#endif
618 .init = ux500_uart0_init,
619 .exit = ux500_uart0_exit,
620 .reset = ux500_uart0_reset, 589 .reset = ux500_uart0_reset,
621}; 590};
622 591
@@ -638,28 +607,7 @@ static struct amba_pl011_data uart2_plat = {
638 607
639static void __init mop500_uart_init(struct device *parent) 608static void __init mop500_uart_init(struct device *parent)
640{ 609{
641 struct amba_device *uart0_device; 610 db8500_add_uart0(parent, &uart0_plat);
642
643 uart0_device = db8500_add_uart0(parent, &uart0_plat);
644 if (uart0_device) {
645 u0_p = pinctrl_get(&uart0_device->dev);
646 if (IS_ERR(u0_p))
647 dev_err(&uart0_device->dev,
648 "could not get UART0 pinctrl\n");
649 else {
650 u0_def = pinctrl_lookup_state(u0_p,
651 PINCTRL_STATE_DEFAULT);
652 if (IS_ERR(u0_def)) {
653 dev_err(&uart0_device->dev,
654 "could not get UART0 defstate\n");
655 }
656 u0_sleep = pinctrl_lookup_state(u0_p,
657 PINCTRL_STATE_SLEEP);
658 if (IS_ERR(u0_sleep))
659 dev_err(&uart0_device->dev,
660 "could not get UART0 idlestate\n");
661 }
662 }
663 db8500_add_uart1(parent, &uart1_plat); 611 db8500_add_uart1(parent, &uart1_plat);
664 db8500_add_uart2(parent, &uart2_plat); 612 db8500_add_uart2(parent, &uart2_plat);
665} 613}
@@ -677,11 +625,6 @@ static struct platform_device *snowball_platform_devs[] __initdata = {
677 &ab8500_device, 625 &ab8500_device,
678}; 626};
679 627
680static struct platform_device *snowball_of_platform_devs[] __initdata = {
681 &snowball_led_dev,
682 &snowball_key_dev,
683};
684
685static void __init mop500_init_machine(void) 628static void __init mop500_init_machine(void)
686{ 629{
687 struct device *parent = NULL; 630 struct device *parent = NULL;
@@ -821,6 +764,11 @@ MACHINE_END
821 764
822#ifdef CONFIG_MACH_UX500_DT 765#ifdef CONFIG_MACH_UX500_DT
823 766
767static struct platform_device *snowball_of_platform_devs[] __initdata = {
768 &snowball_led_dev,
769 &snowball_key_dev,
770};
771
824struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 772struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
825 /* Requires DMA and call-back bindings. */ 773 /* Requires DMA and call-back bindings. */
826 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), 774 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
@@ -838,6 +786,8 @@ struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
838 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL), 786 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
839 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL), 787 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
840 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL), 788 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
789 /* Requires device name bindings. */
790 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
841 {}, 791 {},
842}; 792};
843 793
diff --git a/arch/arm/mach-ux500/timer.c b/arch/arm/mach-ux500/timer.c
index 741e71feca78..66e7f00884ab 100644
--- a/arch/arm/mach-ux500/timer.c
+++ b/arch/arm/mach-ux500/timer.c
@@ -63,8 +63,10 @@ static void __init ux500_timer_init(void)
63 63
64 /* TODO: Once MTU has been DT:ed place code above into else. */ 64 /* TODO: Once MTU has been DT:ed place code above into else. */
65 if (of_have_populated_dt()) { 65 if (of_have_populated_dt()) {
66#ifdef CONFIG_OF
66 np = of_find_matching_node(NULL, prcmu_timer_of_match); 67 np = of_find_matching_node(NULL, prcmu_timer_of_match);
67 if (!np) 68 if (!np)
69#endif
68 goto dt_fail; 70 goto dt_fail;
69 71
70 tmp_base = of_iomap(np, 0); 72 tmp_base = of_iomap(np, 0);
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index cf4687ee2a7b..cd8ea3588f93 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -169,26 +169,13 @@ static struct map_desc versatile_io_desc[] __initdata = {
169 .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE), 169 .pfn = __phys_to_pfn(VERSATILE_PCI_CFG_BASE),
170 .length = VERSATILE_PCI_CFG_BASE_SIZE, 170 .length = VERSATILE_PCI_CFG_BASE_SIZE,
171 .type = MT_DEVICE 171 .type = MT_DEVICE
172 },
173#if 0
174 {
175 .virtual = VERSATILE_PCI_VIRT_MEM_BASE0,
176 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
177 .length = SZ_16M,
178 .type = MT_DEVICE
179 }, { 172 }, {
180 .virtual = VERSATILE_PCI_VIRT_MEM_BASE1, 173 .virtual = (unsigned long)VERSATILE_PCI_VIRT_MEM_BASE0,
181 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE1), 174 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE0),
182 .length = SZ_16M, 175 .length = IO_SPACE_LIMIT,
183 .type = MT_DEVICE
184 }, {
185 .virtual = VERSATILE_PCI_VIRT_MEM_BASE2,
186 .pfn = __phys_to_pfn(VERSATILE_PCI_MEM_BASE2),
187 .length = SZ_16M,
188 .type = MT_DEVICE 176 .type = MT_DEVICE
189 }, 177 },
190#endif 178#endif
191#endif
192}; 179};
193 180
194void __init versatile_map_io(void) 181void __init versatile_map_io(void)
diff --git a/arch/arm/mach-versatile/include/mach/hardware.h b/arch/arm/mach-versatile/include/mach/hardware.h
index 4d4973dd8fba..408e58da46c6 100644
--- a/arch/arm/mach-versatile/include/mach/hardware.h
+++ b/arch/arm/mach-versatile/include/mach/hardware.h
@@ -29,8 +29,9 @@
29 */ 29 */
30#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul 30#define VERSATILE_PCI_VIRT_BASE (void __iomem *)0xe8000000ul
31#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul 31#define VERSATILE_PCI_CFG_VIRT_BASE (void __iomem *)0xe9000000ul
32#define VERSATILE_PCI_VIRT_MEM_BASE0 (void __iomem *)PCIO_BASE
32 33
33/* macro to get at IO space when running virtually */ 34/* macro to get at MMIO space when running virtually */
34#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000) 35#define IO_ADDRESS(x) (((x) & 0x0fffffff) + (((x) >> 4) & 0x0f000000) + 0xf0000000)
35 36
36#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n)) 37#define __io_address(n) ((void __iomem __force *)IO_ADDRESS(n))
diff --git a/arch/arm/mach-versatile/include/mach/io.h b/arch/arm/mach-versatile/include/mach/io.h
new file mode 100644
index 000000000000..0406513be7d8
--- /dev/null
+++ b/arch/arm/mach-versatile/include/mach/io.h
@@ -0,0 +1,27 @@
1/*
2 * arch/arm/mach-versatile/include/mach/io.h
3 *
4 * Copyright (C) 2003 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define PCIO_BASE 0xeb000000ul
24
25#define __io(a) ((a) + PCIO_BASE)
26
27#endif
diff --git a/arch/arm/mach-versatile/pci.c b/arch/arm/mach-versatile/pci.c
index 15c6a00000ec..e95bf84cc837 100644
--- a/arch/arm/mach-versatile/pci.c
+++ b/arch/arm/mach-versatile/pci.c
@@ -169,11 +169,18 @@ static struct pci_ops pci_versatile_ops = {
169 .write = versatile_write_config, 169 .write = versatile_write_config,
170}; 170};
171 171
172static struct resource io_port = {
173 .name = "PCI",
174 .start = 0,
175 .end = IO_SPACE_LIMIT,
176 .flags = IORESOURCE_IO,
177};
178
172static struct resource io_mem = { 179static struct resource io_mem = {
173 .name = "PCI I/O space", 180 .name = "PCI I/O space",
174 .start = VERSATILE_PCI_MEM_BASE0, 181 .start = VERSATILE_PCI_MEM_BASE0,
175 .end = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1, 182 .end = VERSATILE_PCI_MEM_BASE0+VERSATILE_PCI_MEM_BASE0_SIZE-1,
176 .flags = IORESOURCE_IO, 183 .flags = IORESOURCE_MEM,
177}; 184};
178 185
179static struct resource non_mem = { 186static struct resource non_mem = {
@@ -200,6 +207,12 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
200 "memory region (%d)\n", ret); 207 "memory region (%d)\n", ret);
201 goto out; 208 goto out;
202 } 209 }
210 ret = request_resource(&ioport_resource, &io_port);
211 if (ret) {
212 printk(KERN_ERR "PCI: unable to allocate I/O "
213 "port region (%d)\n", ret);
214 goto out;
215 }
203 ret = request_resource(&iomem_resource, &non_mem); 216 ret = request_resource(&iomem_resource, &non_mem);
204 if (ret) { 217 if (ret) {
205 printk(KERN_ERR "PCI: unable to allocate non-prefetchable " 218 printk(KERN_ERR "PCI: unable to allocate non-prefetchable "
@@ -218,7 +231,7 @@ static int __init pci_versatile_setup_resources(struct pci_sys_data *sys)
218 * the mem resource for this bus 231 * the mem resource for this bus
219 * the prefetch mem resource for this bus 232 * the prefetch mem resource for this bus
220 */ 233 */
221 pci_add_resource_offset(&sys->resources, &io_mem, sys->io_offset); 234 pci_add_resource_offset(&sys->resources, &io_port, sys->io_offset);
222 pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset); 235 pci_add_resource_offset(&sys->resources, &non_mem, sys->mem_offset);
223 pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset); 236 pci_add_resource_offset(&sys->resources, &pre_mem, sys->mem_offset);
224 237
@@ -249,6 +262,7 @@ int __init pci_versatile_setup(int nr, struct pci_sys_data *sys)
249 262
250 if (nr == 0) { 263 if (nr == 0) {
251 sys->mem_offset = 0; 264 sys->mem_offset = 0;
265 sys->io_offset = 0;
252 ret = pci_versatile_setup_resources(sys); 266 ret = pci_versatile_setup_resources(sys);
253 if (ret < 0) { 267 if (ret < 0) {
254 printk("pci_versatile_setup: resources... oops?\n"); 268 printk("pci_versatile_setup: resources... oops?\n");
@@ -325,7 +339,6 @@ void __init pci_versatile_preinit(void)
325static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) 339static int __init versatile_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
326{ 340{
327 int irq; 341 int irq;
328 int devslot = PCI_SLOT(dev->devfn);
329 342
330 /* slot, pin, irq 343 /* slot, pin, irq
331 * 24 1 27 344 * 24 1 27
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index ea6b43154090..655878bcc96d 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -228,7 +228,7 @@ static pte_t **consistent_pte;
228 228
229#define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M 229#define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
230 230
231unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE; 231static unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
232 232
233void __init init_consistent_dma_size(unsigned long size) 233void __init init_consistent_dma_size(unsigned long size)
234{ 234{
@@ -268,10 +268,8 @@ static int __init consistent_init(void)
268 unsigned long base = consistent_base; 268 unsigned long base = consistent_base;
269 unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT; 269 unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
270 270
271#ifndef CONFIG_ARM_DMA_USE_IOMMU 271 if (IS_ENABLED(CONFIG_CMA) && !IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU))
272 if (cpu_architecture() >= CPU_ARCH_ARMv6)
273 return 0; 272 return 0;
274#endif
275 273
276 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL); 274 consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
277 if (!consistent_pte) { 275 if (!consistent_pte) {
@@ -323,7 +321,7 @@ static struct arm_vmregion_head coherent_head = {
323 .vm_list = LIST_HEAD_INIT(coherent_head.vm_list), 321 .vm_list = LIST_HEAD_INIT(coherent_head.vm_list),
324}; 322};
325 323
326size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8; 324static size_t coherent_pool_size = DEFAULT_CONSISTENT_DMA_SIZE / 8;
327 325
328static int __init early_coherent_pool(char *p) 326static int __init early_coherent_pool(char *p)
329{ 327{
@@ -342,7 +340,7 @@ static int __init coherent_init(void)
342 struct page *page; 340 struct page *page;
343 void *ptr; 341 void *ptr;
344 342
345 if (cpu_architecture() < CPU_ARCH_ARMv6) 343 if (!IS_ENABLED(CONFIG_CMA))
346 return 0; 344 return 0;
347 345
348 ptr = __alloc_from_contiguous(NULL, size, prot, &page); 346 ptr = __alloc_from_contiguous(NULL, size, prot, &page);
@@ -704,7 +702,7 @@ static void *__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle,
704 702
705 if (arch_is_coherent() || nommu()) 703 if (arch_is_coherent() || nommu())
706 addr = __alloc_simple_buffer(dev, size, gfp, &page); 704 addr = __alloc_simple_buffer(dev, size, gfp, &page);
707 else if (cpu_architecture() < CPU_ARCH_ARMv6) 705 else if (!IS_ENABLED(CONFIG_CMA))
708 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller); 706 addr = __alloc_remap_buffer(dev, size, gfp, prot, &page, caller);
709 else if (gfp & GFP_ATOMIC) 707 else if (gfp & GFP_ATOMIC)
710 addr = __alloc_from_pool(dev, size, &page, caller); 708 addr = __alloc_from_pool(dev, size, &page, caller);
@@ -773,7 +771,7 @@ void arm_dma_free(struct device *dev, size_t size, void *cpu_addr,
773 771
774 if (arch_is_coherent() || nommu()) { 772 if (arch_is_coherent() || nommu()) {
775 __dma_free_buffer(page, size); 773 __dma_free_buffer(page, size);
776 } else if (cpu_architecture() < CPU_ARCH_ARMv6) { 774 } else if (!IS_ENABLED(CONFIG_CMA)) {
777 __dma_free_remap(cpu_addr, size); 775 __dma_free_remap(cpu_addr, size);
778 __dma_free_buffer(page, size); 776 __dma_free_buffer(page, size);
779 } else { 777 } else {
@@ -1069,7 +1067,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t
1069 return NULL; 1067 return NULL;
1070 1068
1071 while (count) { 1069 while (count) {
1072 int j, order = __ffs(count); 1070 int j, order = __fls(count);
1073 1071
1074 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order); 1072 pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
1075 while (!pages[i] && order) 1073 while (!pages[i] && order)
@@ -1093,7 +1091,7 @@ error:
1093 while (--i) 1091 while (--i)
1094 if (pages[i]) 1092 if (pages[i])
1095 __free_pages(pages[i], 0); 1093 __free_pages(pages[i], 0);
1096 if (array_size < PAGE_SIZE) 1094 if (array_size <= PAGE_SIZE)
1097 kfree(pages); 1095 kfree(pages);
1098 else 1096 else
1099 vfree(pages); 1097 vfree(pages);
@@ -1108,7 +1106,7 @@ static int __iommu_free_buffer(struct device *dev, struct page **pages, size_t s
1108 for (i = 0; i < count; i++) 1106 for (i = 0; i < count; i++)
1109 if (pages[i]) 1107 if (pages[i])
1110 __free_pages(pages[i], 0); 1108 __free_pages(pages[i], 0);
1111 if (array_size < PAGE_SIZE) 1109 if (array_size <= PAGE_SIZE)
1112 kfree(pages); 1110 kfree(pages);
1113 else 1111 else
1114 vfree(pages); 1112 vfree(pages);
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index c21d06c7dd7e..f54d59219764 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -212,7 +212,7 @@ EXPORT_SYMBOL(arm_dma_zone_size);
212 * allocations. This must be the smallest DMA mask in the system, 212 * allocations. This must be the smallest DMA mask in the system,
213 * so a successful GFP_DMA allocation will always satisfy this. 213 * so a successful GFP_DMA allocation will always satisfy this.
214 */ 214 */
215u32 arm_dma_limit; 215phys_addr_t arm_dma_limit;
216 216
217static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole, 217static void __init arm_adjust_dma_zone(unsigned long *size, unsigned long *hole,
218 unsigned long dma_size) 218 unsigned long dma_size)
diff --git a/arch/arm/mm/mm.h b/arch/arm/mm/mm.h
index 93dc0c17cdcb..2e8a1efdf7b8 100644
--- a/arch/arm/mm/mm.h
+++ b/arch/arm/mm/mm.h
@@ -62,9 +62,9 @@ extern void __flush_dcache_page(struct address_space *mapping, struct page *page
62#endif 62#endif
63 63
64#ifdef CONFIG_ZONE_DMA 64#ifdef CONFIG_ZONE_DMA
65extern u32 arm_dma_limit; 65extern phys_addr_t arm_dma_limit;
66#else 66#else
67#define arm_dma_limit ((u32)~0) 67#define arm_dma_limit ((phys_addr_t)~0)
68#endif 68#endif
69 69
70extern phys_addr_t arm_lowmem_limit; 70extern phys_addr_t arm_lowmem_limit;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index e5dad60b558b..cf4528d51774 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -791,6 +791,79 @@ void __init iotable_init(struct map_desc *io_desc, int nr)
791 } 791 }
792} 792}
793 793
794#ifndef CONFIG_ARM_LPAE
795
796/*
797 * The Linux PMD is made of two consecutive section entries covering 2MB
798 * (see definition in include/asm/pgtable-2level.h). However a call to
799 * create_mapping() may optimize static mappings by using individual
800 * 1MB section mappings. This leaves the actual PMD potentially half
801 * initialized if the top or bottom section entry isn't used, leaving it
802 * open to problems if a subsequent ioremap() or vmalloc() tries to use
803 * the virtual space left free by that unused section entry.
804 *
805 * Let's avoid the issue by inserting dummy vm entries covering the unused
806 * PMD halves once the static mappings are in place.
807 */
808
809static void __init pmd_empty_section_gap(unsigned long addr)
810{
811 struct vm_struct *vm;
812
813 vm = early_alloc_aligned(sizeof(*vm), __alignof__(*vm));
814 vm->addr = (void *)addr;
815 vm->size = SECTION_SIZE;
816 vm->flags = VM_IOREMAP | VM_ARM_STATIC_MAPPING;
817 vm->caller = pmd_empty_section_gap;
818 vm_area_add_early(vm);
819}
820
821static void __init fill_pmd_gaps(void)
822{
823 struct vm_struct *vm;
824 unsigned long addr, next = 0;
825 pmd_t *pmd;
826
827 /* we're still single threaded hence no lock needed here */
828 for (vm = vmlist; vm; vm = vm->next) {
829 if (!(vm->flags & VM_ARM_STATIC_MAPPING))
830 continue;
831 addr = (unsigned long)vm->addr;
832 if (addr < next)
833 continue;
834
835 /*
836 * Check if this vm starts on an odd section boundary.
837 * If so and the first section entry for this PMD is free
838 * then we block the corresponding virtual address.
839 */
840 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
841 pmd = pmd_off_k(addr);
842 if (pmd_none(*pmd))
843 pmd_empty_section_gap(addr & PMD_MASK);
844 }
845
846 /*
847 * Then check if this vm ends on an odd section boundary.
848 * If so and the second section entry for this PMD is empty
849 * then we block the corresponding virtual address.
850 */
851 addr += vm->size;
852 if ((addr & ~PMD_MASK) == SECTION_SIZE) {
853 pmd = pmd_off_k(addr) + 1;
854 if (pmd_none(*pmd))
855 pmd_empty_section_gap(addr);
856 }
857
858 /* no need to look at any vm entry until we hit the next PMD */
859 next = (addr + PMD_SIZE - 1) & PMD_MASK;
860 }
861}
862
863#else
864#define fill_pmd_gaps() do { } while (0)
865#endif
866
794static void * __initdata vmalloc_min = 867static void * __initdata vmalloc_min =
795 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET); 868 (void *)(VMALLOC_END - (240 << 20) - VMALLOC_OFFSET);
796 869
@@ -1072,6 +1145,7 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
1072 */ 1145 */
1073 if (mdesc->map_io) 1146 if (mdesc->map_io)
1074 mdesc->map_io(); 1147 mdesc->map_io();
1148 fill_pmd_gaps();
1075 1149
1076 /* 1150 /*
1077 * Finally flush the caches and tlb to ensure that we're in a 1151 * Finally flush the caches and tlb to ensure that we're in a
diff --git a/arch/arm/net/bpf_jit_32.c b/arch/arm/net/bpf_jit_32.c
index 62135849f48b..c641fb685017 100644
--- a/arch/arm/net/bpf_jit_32.c
+++ b/arch/arm/net/bpf_jit_32.c
@@ -762,6 +762,11 @@ b_epilogue:
762 update_on_xread(ctx); 762 update_on_xread(ctx);
763 emit(ARM_MOV_R(r_A, r_X), ctx); 763 emit(ARM_MOV_R(r_A, r_X), ctx);
764 break; 764 break;
765 case BPF_S_ANC_ALU_XOR_X:
766 /* A ^= X */
767 update_on_xread(ctx);
768 emit(ARM_EOR_R(r_A, r_A, r_X), ctx);
769 break;
765 case BPF_S_ANC_PROTOCOL: 770 case BPF_S_ANC_PROTOCOL:
766 /* A = ntohs(skb->protocol) */ 771 /* A = ntohs(skb->protocol) */
767 ctx->seen |= SEEN_SKB; 772 ctx->seen |= SEEN_SKB;
diff --git a/arch/arm/net/bpf_jit_32.h b/arch/arm/net/bpf_jit_32.h
index 99ae5e3f46d2..7fa2f7d3cb90 100644
--- a/arch/arm/net/bpf_jit_32.h
+++ b/arch/arm/net/bpf_jit_32.h
@@ -68,6 +68,8 @@
68#define ARM_INST_CMP_R 0x01500000 68#define ARM_INST_CMP_R 0x01500000
69#define ARM_INST_CMP_I 0x03500000 69#define ARM_INST_CMP_I 0x03500000
70 70
71#define ARM_INST_EOR_R 0x00200000
72
71#define ARM_INST_LDRB_I 0x05d00000 73#define ARM_INST_LDRB_I 0x05d00000
72#define ARM_INST_LDRB_R 0x07d00000 74#define ARM_INST_LDRB_R 0x07d00000
73#define ARM_INST_LDRH_I 0x01d000b0 75#define ARM_INST_LDRH_I 0x01d000b0
@@ -132,6 +134,8 @@
132#define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm) 134#define ARM_CMP_R(rn, rm) _AL3_R(ARM_INST_CMP, 0, rn, rm)
133#define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm) 135#define ARM_CMP_I(rn, imm) _AL3_I(ARM_INST_CMP, 0, rn, imm)
134 136
137#define ARM_EOR_R(rd, rn, rm) _AL3_R(ARM_INST_EOR, rd, rn, rm)
138
135#define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \ 139#define ARM_LDR_I(rt, rn, off) (ARM_INST_LDR_I | (rt) << 12 | (rn) << 16 \
136 | (off)) 140 | (off))
137#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \ 141#define ARM_LDRB_I(rt, rn, off) (ARM_INST_LDRB_I | (rt) << 12 | (rn) << 16 \
diff --git a/arch/arm/plat-mxc/epit.c b/arch/arm/plat-mxc/epit.c
index 9129c9e7d532..88726f4dbbfa 100644
--- a/arch/arm/plat-mxc/epit.c
+++ b/arch/arm/plat-mxc/epit.c
@@ -50,6 +50,7 @@
50#include <linux/irq.h> 50#include <linux/irq.h>
51#include <linux/clockchips.h> 51#include <linux/clockchips.h>
52#include <linux/clk.h> 52#include <linux/clk.h>
53#include <linux/err.h>
53 54
54#include <mach/hardware.h> 55#include <mach/hardware.h>
55#include <asm/mach/time.h> 56#include <asm/mach/time.h>
@@ -201,8 +202,16 @@ static int __init epit_clockevent_init(struct clk *timer_clk)
201 return 0; 202 return 0;
202} 203}
203 204
204void __init epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq) 205void __init epit_timer_init(void __iomem *base, int irq)
205{ 206{
207 struct clk *timer_clk;
208
209 timer_clk = clk_get_sys("imx-epit.0", NULL);
210 if (IS_ERR(timer_clk)) {
211 pr_err("i.MX epit: unable to get clk\n");
212 return;
213 }
214
206 clk_prepare_enable(timer_clk); 215 clk_prepare_enable(timer_clk);
207 216
208 timer_base = base; 217 timer_base = base;
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index cf663d84e7c1..e429ca1b814a 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -54,8 +54,8 @@ extern void imx50_soc_init(void);
54extern void imx51_soc_init(void); 54extern void imx51_soc_init(void);
55extern void imx53_soc_init(void); 55extern void imx53_soc_init(void);
56extern void imx51_init_late(void); 56extern void imx51_init_late(void);
57extern void epit_timer_init(struct clk *timer_clk, void __iomem *base, int irq); 57extern void epit_timer_init(void __iomem *base, int irq);
58extern void mxc_timer_init(struct clk *timer_clk, void __iomem *, int); 58extern void mxc_timer_init(void __iomem *, int);
59extern int mx1_clocks_init(unsigned long fref); 59extern int mx1_clocks_init(unsigned long fref);
60extern int mx21_clocks_init(unsigned long lref, unsigned long fref); 60extern int mx21_clocks_init(unsigned long lref, unsigned long fref);
61extern int mx25_clocks_init(void); 61extern int mx25_clocks_init(void);
diff --git a/arch/arm/plat-mxc/include/mach/mx2_cam.h b/arch/arm/plat-mxc/include/mach/mx2_cam.h
index 7ded6f1f74bc..3c080a32dbf5 100644
--- a/arch/arm/plat-mxc/include/mach/mx2_cam.h
+++ b/arch/arm/plat-mxc/include/mach/mx2_cam.h
@@ -23,6 +23,7 @@
23#ifndef __MACH_MX2_CAM_H_ 23#ifndef __MACH_MX2_CAM_H_
24#define __MACH_MX2_CAM_H_ 24#define __MACH_MX2_CAM_H_
25 25
26#define MX2_CAMERA_SWAP16 (1 << 0)
26#define MX2_CAMERA_EXT_VSYNC (1 << 1) 27#define MX2_CAMERA_EXT_VSYNC (1 << 1)
27#define MX2_CAMERA_CCIR (1 << 2) 28#define MX2_CAMERA_CCIR (1 << 2)
28#define MX2_CAMERA_CCIR_INTERLACE (1 << 3) 29#define MX2_CAMERA_CCIR_INTERLACE (1 << 3)
@@ -30,6 +31,7 @@
30#define MX2_CAMERA_GATED_CLOCK (1 << 5) 31#define MX2_CAMERA_GATED_CLOCK (1 << 5)
31#define MX2_CAMERA_INV_DATA (1 << 6) 32#define MX2_CAMERA_INV_DATA (1 << 6)
32#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7) 33#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7)
34#define MX2_CAMERA_PACK_DIR_MSB (1 << 8)
33 35
34/** 36/**
35 * struct mx2_camera_platform_data - optional platform data for mx2_camera 37 * struct mx2_camera_platform_data - optional platform data for mx2_camera
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 99f958ca6cb8..00e8e659e667 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -58,6 +58,7 @@
58/* MX31, MX35, MX25, MX5 */ 58/* MX31, MX35, MX25, MX5 */
59#define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */ 59#define V2_TCTL_WAITEN (1 << 3) /* Wait enable mode */
60#define V2_TCTL_CLK_IPG (1 << 6) 60#define V2_TCTL_CLK_IPG (1 << 6)
61#define V2_TCTL_CLK_PER (2 << 6)
61#define V2_TCTL_FRR (1 << 9) 62#define V2_TCTL_FRR (1 << 9)
62#define V2_IR 0x0c 63#define V2_IR 0x0c
63#define V2_TSTAT 0x08 64#define V2_TSTAT 0x08
@@ -280,23 +281,22 @@ static int __init mxc_clockevent_init(struct clk *timer_clk)
280 return 0; 281 return 0;
281} 282}
282 283
283void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq) 284void __init mxc_timer_init(void __iomem *base, int irq)
284{ 285{
285 uint32_t tctl_val; 286 uint32_t tctl_val;
287 struct clk *timer_clk;
286 struct clk *timer_ipg_clk; 288 struct clk *timer_ipg_clk;
287 289
288 if (!timer_clk) { 290 timer_clk = clk_get_sys("imx-gpt.0", "per");
289 timer_clk = clk_get_sys("imx-gpt.0", "per"); 291 if (IS_ERR(timer_clk)) {
290 if (IS_ERR(timer_clk)) { 292 pr_err("i.MX timer: unable to get clk\n");
291 pr_err("i.MX timer: unable to get clk\n"); 293 return;
292 return;
293 }
294
295 timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");
296 if (!IS_ERR(timer_ipg_clk))
297 clk_prepare_enable(timer_ipg_clk);
298 } 294 }
299 295
296 timer_ipg_clk = clk_get_sys("imx-gpt.0", "ipg");
297 if (!IS_ERR(timer_ipg_clk))
298 clk_prepare_enable(timer_ipg_clk);
299
300 clk_prepare_enable(timer_clk); 300 clk_prepare_enable(timer_clk);
301 301
302 timer_base = base; 302 timer_base = base;
@@ -309,7 +309,7 @@ void __init mxc_timer_init(struct clk *timer_clk, void __iomem *base, int irq)
309 __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */ 309 __raw_writel(0, timer_base + MXC_TPRER); /* see datasheet note */
310 310
311 if (timer_is_v2()) 311 if (timer_is_v2())
312 tctl_val = V2_TCTL_CLK_IPG | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN; 312 tctl_val = V2_TCTL_CLK_PER | V2_TCTL_FRR | V2_TCTL_WAITEN | MXC_TCTL_TEN;
313 else 313 else
314 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN; 314 tctl_val = MX1_2_TCTL_FRR | MX1_2_TCTL_CLK_PCLK1 | MXC_TCTL_TEN;
315 315
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 62ec5c452792..706b7e29397f 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -461,6 +461,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
461 struct clk *c; 461 struct clk *c;
462 struct clk *pa; 462 struct clk *pa;
463 463
464 mutex_lock(&clocks_mutex);
464 seq_printf(s, "%-30s %-30s %-10s %s\n", 465 seq_printf(s, "%-30s %-30s %-10s %s\n",
465 "clock-name", "parent-name", "rate", "use-count"); 466 "clock-name", "parent-name", "rate", "use-count");
466 467
@@ -469,6 +470,7 @@ static int clk_dbg_show_summary(struct seq_file *s, void *unused)
469 seq_printf(s, "%-30s %-30s %-10lu %d\n", 470 seq_printf(s, "%-30s %-30s %-10lu %d\n",
470 c->name, pa ? pa->name : "none", c->rate, c->usecount); 471 c->name, pa ? pa->name : "none", c->rate, c->usecount);
471 } 472 }
473 mutex_unlock(&clocks_mutex);
472 474
473 return 0; 475 return 0;
474} 476}
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 297245dba66e..de6c0a08f461 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -252,8 +252,6 @@ IS_AM_SUBCLASS(335x, 0x335)
252 * cpu_is_omap2423(): True for OMAP2423 252 * cpu_is_omap2423(): True for OMAP2423
253 * cpu_is_omap2430(): True for OMAP2430 253 * cpu_is_omap2430(): True for OMAP2430
254 * cpu_is_omap3430(): True for OMAP3430 254 * cpu_is_omap3430(): True for OMAP3430
255 * cpu_is_omap3505(): True for OMAP3505
256 * cpu_is_omap3517(): True for OMAP3517
257 */ 255 */
258#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff) 256#define GET_OMAP_TYPE ((omap_rev() >> 16) & 0xffff)
259 257
@@ -277,8 +275,6 @@ IS_OMAP_TYPE(2422, 0x2422)
277IS_OMAP_TYPE(2423, 0x2423) 275IS_OMAP_TYPE(2423, 0x2423)
278IS_OMAP_TYPE(2430, 0x2430) 276IS_OMAP_TYPE(2430, 0x2430)
279IS_OMAP_TYPE(3430, 0x3430) 277IS_OMAP_TYPE(3430, 0x3430)
280IS_OMAP_TYPE(3505, 0x3517)
281IS_OMAP_TYPE(3517, 0x3517)
282 278
283#define cpu_is_omap310() 0 279#define cpu_is_omap310() 0
284#define cpu_is_omap730() 0 280#define cpu_is_omap730() 0
@@ -293,12 +289,6 @@ IS_OMAP_TYPE(3517, 0x3517)
293#define cpu_is_omap2422() 0 289#define cpu_is_omap2422() 0
294#define cpu_is_omap2423() 0 290#define cpu_is_omap2423() 0
295#define cpu_is_omap2430() 0 291#define cpu_is_omap2430() 0
296#define cpu_is_omap3503() 0
297#define cpu_is_omap3515() 0
298#define cpu_is_omap3525() 0
299#define cpu_is_omap3530() 0
300#define cpu_is_omap3505() 0
301#define cpu_is_omap3517() 0
302#define cpu_is_omap3430() 0 292#define cpu_is_omap3430() 0
303#define cpu_is_omap3630() 0 293#define cpu_is_omap3630() 0
304 294
@@ -350,12 +340,6 @@ IS_OMAP_TYPE(3517, 0x3517)
350 340
351#if defined(CONFIG_ARCH_OMAP3) 341#if defined(CONFIG_ARCH_OMAP3)
352# undef cpu_is_omap3430 342# undef cpu_is_omap3430
353# undef cpu_is_omap3503
354# undef cpu_is_omap3515
355# undef cpu_is_omap3525
356# undef cpu_is_omap3530
357# undef cpu_is_omap3505
358# undef cpu_is_omap3517
359# undef cpu_is_ti81xx 343# undef cpu_is_ti81xx
360# undef cpu_is_ti816x 344# undef cpu_is_ti816x
361# undef cpu_is_ti814x 345# undef cpu_is_ti814x
@@ -363,19 +347,6 @@ IS_OMAP_TYPE(3517, 0x3517)
363# undef cpu_is_am33xx 347# undef cpu_is_am33xx
364# undef cpu_is_am335x 348# undef cpu_is_am335x
365# define cpu_is_omap3430() is_omap3430() 349# define cpu_is_omap3430() is_omap3430()
366# define cpu_is_omap3503() (cpu_is_omap3430() && \
367 (!omap3_has_iva()) && \
368 (!omap3_has_sgx()))
369# define cpu_is_omap3515() (cpu_is_omap3430() && \
370 (!omap3_has_iva()) && \
371 (omap3_has_sgx()))
372# define cpu_is_omap3525() (cpu_is_omap3430() && \
373 (!omap3_has_sgx()) && \
374 (omap3_has_iva()))
375# define cpu_is_omap3530() (cpu_is_omap3430())
376# define cpu_is_omap3517() is_omap3517()
377# define cpu_is_omap3505() (cpu_is_omap3517() && \
378 !omap3_has_sgx())
379# undef cpu_is_omap3630 350# undef cpu_is_omap3630
380# define cpu_is_omap3630() is_omap363x() 351# define cpu_is_omap3630() is_omap363x()
381# define cpu_is_ti81xx() is_ti81xx() 352# define cpu_is_ti81xx() is_ti81xx()
@@ -424,10 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
424#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8)) 395#define OMAP3630_REV_ES1_1 (OMAP363X_CLASS | (0x1 << 8))
425#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8)) 396#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (0x2 << 8))
426 397
427#define OMAP3517_CLASS 0x35170034
428#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
429#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (0x1 << 8))
430
431#define TI816X_CLASS 0x81600034 398#define TI816X_CLASS 0x81600034
432#define TI8168_REV_ES1_0 TI816X_CLASS 399#define TI8168_REV_ES1_0 TI816X_CLASS
433#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8)) 400#define TI8168_REV_ES1_1 (TI816X_CLASS | (0x1 << 8))
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index a7754a886d42..5493bd95da5e 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -172,8 +172,7 @@ struct omap_mmc_platform_data {
172extern void omap_mmc_notify_cover_event(struct device *dev, int slot, 172extern void omap_mmc_notify_cover_event(struct device *dev, int slot,
173 int is_closed); 173 int is_closed);
174 174
175#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \ 175#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
176 defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
177void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 176void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
178 int nr_controllers); 177 int nr_controllers);
179void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data); 178void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data);
@@ -185,7 +184,6 @@ static inline void omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
185static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) 184static inline void omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
186{ 185{
187} 186}
188
189#endif 187#endif
190 188
191extern int omap_msdi_reset(struct omap_hwmod *oh); 189extern int omap_msdi_reset(struct omap_hwmod *oh);
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index 61fd837624a8..c1793786aea9 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -582,7 +582,7 @@ void __init orion_spi_1_init(unsigned long mapbase)
582 * Watchdog 582 * Watchdog
583 ****************************************************************************/ 583 ****************************************************************************/
584static struct resource orion_wdt_resource = 584static struct resource orion_wdt_resource =
585 DEFINE_RES_MEM(TIMER_VIRT_BASE, 0x28); 585 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x28);
586 586
587static struct platform_device orion_wdt_device = { 587static struct platform_device orion_wdt_device = {
588 .name = "orion_wdt", 588 .name = "orion_wdt",
diff --git a/arch/arm/plat-pxa/ssp.c b/arch/arm/plat-pxa/ssp.c
index 58b79809d20c..584c9bf8ed2d 100644
--- a/arch/arm/plat-pxa/ssp.c
+++ b/arch/arm/plat-pxa/ssp.c
@@ -193,6 +193,7 @@ static const struct platform_device_id ssp_id_table[] = {
193 { "pxa25x-nssp", PXA25x_NSSP }, 193 { "pxa25x-nssp", PXA25x_NSSP },
194 { "pxa27x-ssp", PXA27x_SSP }, 194 { "pxa27x-ssp", PXA27x_SSP },
195 { "pxa168-ssp", PXA168_SSP }, 195 { "pxa168-ssp", PXA168_SSP },
196 { "pxa910-ssp", PXA910_SSP },
196 { }, 197 { },
197}; 198};
198 199
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 33ecd0c9f0c3..b1e05ccff3ac 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -157,11 +157,13 @@ int s3c_adc_start(struct s3c_adc_client *client,
157 return -EINVAL; 157 return -EINVAL;
158 } 158 }
159 159
160 if (client->is_ts && adc->ts_pend)
161 return -EAGAIN;
162
163 spin_lock_irqsave(&adc->lock, flags); 160 spin_lock_irqsave(&adc->lock, flags);
164 161
162 if (client->is_ts && adc->ts_pend) {
163 spin_unlock_irqrestore(&adc->lock, flags);
164 return -EAGAIN;
165 }
166
165 client->channel = channel; 167 client->channel = channel;
166 client->nr_samples = nr_samples; 168 client->nr_samples = nr_samples;
167 169
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index 1d214cb9d770..6303974c2ee0 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -126,7 +126,8 @@ struct platform_device s3c_device_adc = {
126#ifdef CONFIG_CPU_S3C2440 126#ifdef CONFIG_CPU_S3C2440
127static struct resource s3c_camif_resource[] = { 127static struct resource s3c_camif_resource[] = {
128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), 128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129 [1] = DEFINE_RES_IRQ(IRQ_CAM), 129 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
130 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
130}; 131};
131 132
132struct platform_device s3c_device_camif = { 133struct platform_device s3c_device_camif = {
diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h
index 7d048759b772..c0c70a895ca8 100644
--- a/arch/arm/plat-samsung/include/plat/map-s3c.h
+++ b/arch/arm/plat-samsung/include/plat/map-s3c.h
@@ -22,7 +22,7 @@
22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 22#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
23 23
24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) 24#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000)
25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00010000) 25#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000)
26 26
27#define S3C2410_PA_UART (0x50000000) 27#define S3C2410_PA_UART (0x50000000)
28#define S3C24XX_PA_UART S3C2410_PA_UART 28#define S3C24XX_PA_UART S3C2410_PA_UART
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index f19aff19205c..bc4db9b04e36 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -25,7 +25,7 @@ static inline void arch_wdt_reset(void)
25 25
26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ 26 __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
27 27
28 if (s3c2410_wdtclk) 28 if (!IS_ERR(s3c2410_wdtclk))
29 clk_enable(s3c2410_wdtclk); 29 clk_enable(s3c2410_wdtclk);
30 30
31 /* put initial values into count and data */ 31 /* put initial values into count and data */
diff --git a/arch/arm/plat-samsung/s5p-clock.c b/arch/arm/plat-samsung/s5p-clock.c
index 031a61899bef..48a159911037 100644
--- a/arch/arm/plat-samsung/s5p-clock.c
+++ b/arch/arm/plat-samsung/s5p-clock.c
@@ -37,6 +37,7 @@ struct clk clk_ext_xtal_mux = {
37struct clk clk_xusbxti = { 37struct clk clk_xusbxti = {
38 .name = "xusbxti", 38 .name = "xusbxti",
39 .id = -1, 39 .id = -1,
40 .rate = 24000000,
40}; 41};
41 42
42struct clk s5p_clk_27m = { 43struct clk s5p_clk_27m = {
diff --git a/arch/arm/plat-spear/include/plat/debug-macro.S b/arch/arm/plat-spear/include/plat/debug-macro.S
index ab3de721c5db..75b05ad0fbad 100644
--- a/arch/arm/plat-spear/include/plat/debug-macro.S
+++ b/arch/arm/plat-spear/include/plat/debug-macro.S
@@ -4,7 +4,7 @@
4 * Debugging macro include header for spear platform 4 * Debugging macro include header for spear platform
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/pl080.h b/arch/arm/plat-spear/include/plat/pl080.h
index e14a3e4932f9..2bc6b54460a8 100644
--- a/arch/arm/plat-spear/include/plat/pl080.h
+++ b/arch/arm/plat-spear/include/plat/pl080.h
@@ -4,7 +4,7 @@
4 * DMAC pl080 definitions for SPEAr platform 4 * DMAC pl080 definitions for SPEAr platform
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/shirq.h b/arch/arm/plat-spear/include/plat/shirq.h
index 03ed8b585dcf..88a7fbd24793 100644
--- a/arch/arm/plat-spear/include/plat/shirq.h
+++ b/arch/arm/plat-spear/include/plat/shirq.h
@@ -4,7 +4,7 @@
4 * SPEAr platform shared irq layer header file 4 * SPEAr platform shared irq layer header file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/timex.h b/arch/arm/plat-spear/include/plat/timex.h
index 914d09dd50fd..ef95e5b780bd 100644
--- a/arch/arm/plat-spear/include/plat/timex.h
+++ b/arch/arm/plat-spear/include/plat/timex.h
@@ -4,7 +4,7 @@
4 * SPEAr platform specific timex definitions 4 * SPEAr platform specific timex definitions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/include/plat/uncompress.h b/arch/arm/plat-spear/include/plat/uncompress.h
index 6dd455bafdfd..2ce6cb17a98b 100644
--- a/arch/arm/plat-spear/include/plat/uncompress.h
+++ b/arch/arm/plat-spear/include/plat/uncompress.h
@@ -4,7 +4,7 @@
4 * Serial port stubs for kernel decompress status messages 4 * Serial port stubs for kernel decompress status messages
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/pl080.c b/arch/arm/plat-spear/pl080.c
index a56a067717c1..12cf27f935f9 100644
--- a/arch/arm/plat-spear/pl080.c
+++ b/arch/arm/plat-spear/pl080.c
@@ -4,7 +4,7 @@
4 * DMAC pl080 definitions for SPEAr platform 4 * DMAC pl080 definitions for SPEAr platform
5 * 5 *
6 * Copyright (C) 2012 ST Microelectronics 6 * Copyright (C) 2012 ST Microelectronics
7 * Viresh Kumar <viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/restart.c b/arch/arm/plat-spear/restart.c
index ea0a61302b7e..4f990115b1bd 100644
--- a/arch/arm/plat-spear/restart.c
+++ b/arch/arm/plat-spear/restart.c
@@ -4,7 +4,7 @@
4 * SPEAr platform specific restart functions 4 * SPEAr platform specific restart functions
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/arm/plat-spear/shirq.c b/arch/arm/plat-spear/shirq.c
index 961fb7261243..853e891e1184 100644
--- a/arch/arm/plat-spear/shirq.c
+++ b/arch/arm/plat-spear/shirq.c
@@ -4,7 +4,7 @@
4 * SPEAr platform shared irq layer source file 4 * SPEAr platform shared irq layer source file
5 * 5 *
6 * Copyright (C) 2009 ST Microelectronics 6 * Copyright (C) 2009 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com> 7 * Viresh Kumar <viresh.linux@gmail.com>
8 * 8 *
9 * This file is licensed under the terms of the GNU General Public 9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any 10 * License version 2. This program is licensed "as is" without any
diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c
index c140f9b41dce..d552a854dacc 100644
--- a/arch/avr32/kernel/signal.c
+++ b/arch/avr32/kernel/signal.c
@@ -300,7 +300,7 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, struct thread_info *ti)
300 if ((sysreg_read(SR) & MODE_MASK) == MODE_SUPERVISOR) 300 if ((sysreg_read(SR) & MODE_MASK) == MODE_SUPERVISOR)
301 syscall = 1; 301 syscall = 1;
302 302
303 if (ti->flags & _TIF_SIGPENDING)) 303 if (ti->flags & _TIF_SIGPENDING)
304 do_signal(regs, syscall); 304 do_signal(regs, syscall);
305 305
306 if (ti->flags & _TIF_NOTIFY_RESUME) { 306 if (ti->flags & _TIF_NOTIFY_RESUME) {
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 2e3994b20169..62bcea7dcc6d 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -173,7 +173,7 @@ asmlinkage int bfin_clone(struct pt_regs *regs)
173 unsigned long newsp; 173 unsigned long newsp;
174 174
175#ifdef __ARCH_SYNC_CORE_DCACHE 175#ifdef __ARCH_SYNC_CORE_DCACHE
176 if (current->rt.nr_cpus_allowed == num_possible_cpus()) 176 if (current->nr_cpus_allowed == num_possible_cpus())
177 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id())); 177 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
178#endif 178#endif
179 179
diff --git a/arch/h8300/include/asm/pgtable.h b/arch/h8300/include/asm/pgtable.h
index a09230a08e02..62ef17676b40 100644
--- a/arch/h8300/include/asm/pgtable.h
+++ b/arch/h8300/include/asm/pgtable.h
@@ -70,4 +70,7 @@ extern int is_in_rom(unsigned long);
70#define VMALLOC_END 0xffffffff 70#define VMALLOC_END 0xffffffff
71 71
72#define arch_enter_lazy_cpu_mode() do {} while (0) 72#define arch_enter_lazy_cpu_mode() do {} while (0)
73
74#include <asm-generic/pgtable.h>
75
73#endif /* _H8300_PGTABLE_H */ 76#endif /* _H8300_PGTABLE_H */
diff --git a/arch/h8300/include/asm/uaccess.h b/arch/h8300/include/asm/uaccess.h
index 356068cd0879..8725d1ad4272 100644
--- a/arch/h8300/include/asm/uaccess.h
+++ b/arch/h8300/include/asm/uaccess.h
@@ -100,7 +100,6 @@ extern int __put_user_bad(void);
100 break; \ 100 break; \
101 default: \ 101 default: \
102 __gu_err = __get_user_bad(); \ 102 __gu_err = __get_user_bad(); \
103 __gu_val = 0; \
104 break; \ 103 break; \
105 } \ 104 } \
106 (x) = __gu_val; \ 105 (x) = __gu_val; \
@@ -159,4 +158,6 @@ clear_user(void *to, unsigned long n)
159 return 0; 158 return 0;
160} 159}
161 160
161#define __clear_user clear_user
162
162#endif /* _H8300_UACCESS_H */ 163#endif /* _H8300_UACCESS_H */
diff --git a/arch/h8300/kernel/setup.c b/arch/h8300/kernel/setup.c
index 68d651081bd3..d0b1607f2711 100644
--- a/arch/h8300/kernel/setup.c
+++ b/arch/h8300/kernel/setup.c
@@ -35,6 +35,7 @@
35#include <asm/setup.h> 35#include <asm/setup.h>
36#include <asm/irq.h> 36#include <asm/irq.h>
37#include <asm/pgtable.h> 37#include <asm/pgtable.h>
38#include <asm/sections.h>
38 39
39#if defined(__H8300H__) 40#if defined(__H8300H__)
40#define CPU "H8/300H" 41#define CPU "H8/300H"
@@ -54,7 +55,6 @@ unsigned long memory_end;
54 55
55char __initdata command_line[COMMAND_LINE_SIZE]; 56char __initdata command_line[COMMAND_LINE_SIZE];
56 57
57extern int _stext, _etext, _sdata, _edata, _sbss, _ebss, _end;
58extern int _ramstart, _ramend; 58extern int _ramstart, _ramend;
59extern char _target_name[]; 59extern char _target_name[];
60extern void h8300_gpio_init(void); 60extern void h8300_gpio_init(void);
@@ -119,9 +119,9 @@ void __init setup_arch(char **cmdline_p)
119 memory_end = CONFIG_BLKDEV_RESERVE_ADDRESS; 119 memory_end = CONFIG_BLKDEV_RESERVE_ADDRESS;
120#endif 120#endif
121 121
122 init_mm.start_code = (unsigned long) &_stext; 122 init_mm.start_code = (unsigned long) _stext;
123 init_mm.end_code = (unsigned long) &_etext; 123 init_mm.end_code = (unsigned long) _etext;
124 init_mm.end_data = (unsigned long) &_edata; 124 init_mm.end_data = (unsigned long) _edata;
125 init_mm.brk = (unsigned long) 0; 125 init_mm.brk = (unsigned long) 0;
126 126
127#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) && defined(CONFIG_GDB_MAGICPRINT) 127#if (defined(CONFIG_H8300H_SIM) || defined(CONFIG_H8S_SIM)) && defined(CONFIG_GDB_MAGICPRINT)
@@ -134,15 +134,12 @@ void __init setup_arch(char **cmdline_p)
134 printk(KERN_INFO "H8/300 series support by Yoshinori Sato <ysato@users.sourceforge.jp>\n"); 134 printk(KERN_INFO "H8/300 series support by Yoshinori Sato <ysato@users.sourceforge.jp>\n");
135 135
136#ifdef DEBUG 136#ifdef DEBUG
137 printk(KERN_DEBUG "KERNEL -> TEXT=0x%06x-0x%06x DATA=0x%06x-0x%06x " 137 printk(KERN_DEBUG "KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p "
138 "BSS=0x%06x-0x%06x\n", (int) &_stext, (int) &_etext, 138 "BSS=0x%p-0x%p\n", _stext, _etext, _sdata, _edata, __bss_start,
139 (int) &_sdata, (int) &_edata, 139 __bss_stop);
140 (int) &_sbss, (int) &_ebss); 140 printk(KERN_DEBUG "KERNEL -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx "
141 printk(KERN_DEBUG "KERNEL -> ROMFS=0x%06x-0x%06x MEM=0x%06x-0x%06x " 141 "STACK=0x%06lx-0x%p\n", __bss_stop, memory_start, memory_start,
142 "STACK=0x%06x-0x%06x\n", 142 memory_end, memory_end, &_ramend);
143 (int) &_ebss, (int) memory_start,
144 (int) memory_start, (int) memory_end,
145 (int) memory_end, (int) &_ramend);
146#endif 143#endif
147 144
148#ifdef CONFIG_DEFAULT_CMDLINE 145#ifdef CONFIG_DEFAULT_CMDLINE
diff --git a/arch/h8300/kernel/signal.c b/arch/h8300/kernel/signal.c
index fca10378701b..5adaadaf9218 100644
--- a/arch/h8300/kernel/signal.c
+++ b/arch/h8300/kernel/signal.c
@@ -447,7 +447,7 @@ handle_signal(unsigned long sig, siginfo_t *info, struct k_sigaction *ka,
447 * want to handle. Thus you cannot kill init even with a SIGKILL even by 447 * want to handle. Thus you cannot kill init even with a SIGKILL even by
448 * mistake. 448 * mistake.
449 */ 449 */
450statis void do_signal(struct pt_regs *regs) 450static void do_signal(struct pt_regs *regs)
451{ 451{
452 siginfo_t info; 452 siginfo_t info;
453 int signr; 453 int signr;
diff --git a/arch/h8300/kernel/time.c b/arch/h8300/kernel/time.c
index 32263a138aa6..e0f74191d553 100644
--- a/arch/h8300/kernel/time.c
+++ b/arch/h8300/kernel/time.c
@@ -27,6 +27,7 @@
27#include <linux/profile.h> 27#include <linux/profile.h>
28 28
29#include <asm/io.h> 29#include <asm/io.h>
30#include <asm/irq_regs.h>
30#include <asm/timer.h> 31#include <asm/timer.h>
31 32
32#define TICK_SIZE (tick_nsec / 1000) 33#define TICK_SIZE (tick_nsec / 1000)
diff --git a/arch/h8300/mm/init.c b/arch/h8300/mm/init.c
index 973369c32a95..981e25094b1a 100644
--- a/arch/h8300/mm/init.c
+++ b/arch/h8300/mm/init.c
@@ -36,6 +36,7 @@
36#include <asm/segment.h> 36#include <asm/segment.h>
37#include <asm/page.h> 37#include <asm/page.h>
38#include <asm/pgtable.h> 38#include <asm/pgtable.h>
39#include <asm/sections.h>
39 40
40#undef DEBUG 41#undef DEBUG
41 42
@@ -123,7 +124,6 @@ void __init mem_init(void)
123 int codek = 0, datak = 0, initk = 0; 124 int codek = 0, datak = 0, initk = 0;
124 /* DAVIDM look at setup memory map generically with reserved area */ 125 /* DAVIDM look at setup memory map generically with reserved area */
125 unsigned long tmp; 126 unsigned long tmp;
126 extern char _etext, _stext, _sdata, _ebss, __init_begin, __init_end;
127 extern unsigned long _ramend, _ramstart; 127 extern unsigned long _ramend, _ramstart;
128 unsigned long len = &_ramend - &_ramstart; 128 unsigned long len = &_ramend - &_ramstart;
129 unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */ 129 unsigned long start_mem = memory_start; /* DAVIDM - these must start at end of kernel */
@@ -142,9 +142,9 @@ void __init mem_init(void)
142 /* this will put all memory onto the freelists */ 142 /* this will put all memory onto the freelists */
143 totalram_pages = free_all_bootmem(); 143 totalram_pages = free_all_bootmem();
144 144
145 codek = (&_etext - &_stext) >> 10; 145 codek = (_etext - _stext) >> 10;
146 datak = (&_ebss - &_sdata) >> 10; 146 datak = (__bss_stop - _sdata) >> 10;
147 initk = (&__init_begin - &__init_end) >> 10; 147 initk = (__init_begin - __init_end) >> 10;
148 148
149 tmp = nr_free_pages() << PAGE_SHIFT; 149 tmp = nr_free_pages() << PAGE_SHIFT;
150 printk(KERN_INFO "Memory available: %luk/%luk RAM, %luk/%luk ROM (%dk kernel code, %dk data)\n", 150 printk(KERN_INFO "Memory available: %luk/%luk RAM, %luk/%luk ROM (%dk kernel code, %dk data)\n",
@@ -178,22 +178,21 @@ free_initmem(void)
178{ 178{
179#ifdef CONFIG_RAMKERNEL 179#ifdef CONFIG_RAMKERNEL
180 unsigned long addr; 180 unsigned long addr;
181 extern char __init_begin, __init_end;
182/* 181/*
183 * the following code should be cool even if these sections 182 * the following code should be cool even if these sections
184 * are not page aligned. 183 * are not page aligned.
185 */ 184 */
186 addr = PAGE_ALIGN((unsigned long)(&__init_begin)); 185 addr = PAGE_ALIGN((unsigned long)(__init_begin));
187 /* next to check that the page we free is not a partial page */ 186 /* next to check that the page we free is not a partial page */
188 for (; addr + PAGE_SIZE < (unsigned long)(&__init_end); addr +=PAGE_SIZE) { 187 for (; addr + PAGE_SIZE < (unsigned long)__init_end; addr +=PAGE_SIZE) {
189 ClearPageReserved(virt_to_page(addr)); 188 ClearPageReserved(virt_to_page(addr));
190 init_page_count(virt_to_page(addr)); 189 init_page_count(virt_to_page(addr));
191 free_page(addr); 190 free_page(addr);
192 totalram_pages++; 191 totalram_pages++;
193 } 192 }
194 printk(KERN_INFO "Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n", 193 printk(KERN_INFO "Freeing unused kernel memory: %ldk freed (0x%x - 0x%x)\n",
195 (addr - PAGE_ALIGN((long) &__init_begin)) >> 10, 194 (addr - PAGE_ALIGN((long) __init_begin)) >> 10,
196 (int)(PAGE_ALIGN((unsigned long)(&__init_begin))), 195 (int)(PAGE_ALIGN((unsigned long)__init_begin)),
197 (int)(addr - PAGE_SIZE)); 196 (int)(addr - PAGE_SIZE));
198#endif 197#endif
199} 198}
diff --git a/arch/m32r/boot/compressed/Makefile b/arch/m32r/boot/compressed/Makefile
index 177716b1d613..01729c2979ba 100644
--- a/arch/m32r/boot/compressed/Makefile
+++ b/arch/m32r/boot/compressed/Makefile
@@ -43,9 +43,9 @@ endif
43 43
44OBJCOPYFLAGS += -R .empty_zero_page 44OBJCOPYFLAGS += -R .empty_zero_page
45 45
46suffix_$(CONFIG_KERNEL_GZIP) = gz 46suffix-$(CONFIG_KERNEL_GZIP) = gz
47suffix_$(CONFIG_KERNEL_BZIP2) = bz2 47suffix-$(CONFIG_KERNEL_BZIP2) = bz2
48suffix_$(CONFIG_KERNEL_LZMA) = lzma 48suffix-$(CONFIG_KERNEL_LZMA) = lzma
49 49
50$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE 50$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y) FORCE
51 $(call if_changed,ld) 51 $(call if_changed,ld)
diff --git a/arch/m32r/boot/compressed/misc.c b/arch/m32r/boot/compressed/misc.c
index 370d60881977..28a09529f206 100644
--- a/arch/m32r/boot/compressed/misc.c
+++ b/arch/m32r/boot/compressed/misc.c
@@ -28,7 +28,7 @@ static unsigned long free_mem_ptr;
28static unsigned long free_mem_end_ptr; 28static unsigned long free_mem_end_ptr;
29 29
30#ifdef CONFIG_KERNEL_BZIP2 30#ifdef CONFIG_KERNEL_BZIP2
31static void *memset(void *s, int c, size_t n) 31void *memset(void *s, int c, size_t n)
32{ 32{
33 char *ss = s; 33 char *ss = s;
34 34
@@ -39,6 +39,16 @@ static void *memset(void *s, int c, size_t n)
39#endif 39#endif
40 40
41#ifdef CONFIG_KERNEL_GZIP 41#ifdef CONFIG_KERNEL_GZIP
42void *memcpy(void *dest, const void *src, size_t n)
43{
44 char *d = dest;
45 const char *s = src;
46 while (n--)
47 *d++ = *s++;
48
49 return dest;
50}
51
42#define BOOT_HEAP_SIZE 0x10000 52#define BOOT_HEAP_SIZE 0x10000
43#include "../../../../lib/decompress_inflate.c" 53#include "../../../../lib/decompress_inflate.c"
44#endif 54#endif
diff --git a/arch/m32r/include/asm/ptrace.h b/arch/m32r/include/asm/ptrace.h
index 527527584dd0..4313aa62b51b 100644
--- a/arch/m32r/include/asm/ptrace.h
+++ b/arch/m32r/include/asm/ptrace.h
@@ -113,9 +113,6 @@ struct pt_regs {
113 113
114#define PTRACE_OLDSETOPTIONS 21 114#define PTRACE_OLDSETOPTIONS 21
115 115
116/* options set using PTRACE_SETOPTIONS */
117#define PTRACE_O_TRACESYSGOOD 0x00000001
118
119#ifdef __KERNEL__ 116#ifdef __KERNEL__
120 117
121#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */ 118#include <asm/m32r.h> /* M32R_PSW_BSM, M32R_PSW_BPM */
diff --git a/arch/m32r/kernel/ptrace.c b/arch/m32r/kernel/ptrace.c
index 4c03361537aa..51f5e9aa4901 100644
--- a/arch/m32r/kernel/ptrace.c
+++ b/arch/m32r/kernel/ptrace.c
@@ -591,17 +591,16 @@ void user_enable_single_step(struct task_struct *child)
591 591
592 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0) 592 if (access_process_vm(child, pc&~3, &insn, sizeof(insn), 0)
593 != sizeof(insn)) 593 != sizeof(insn))
594 return -EIO; 594 return;
595 595
596 compute_next_pc(insn, pc, &next_pc, child); 596 compute_next_pc(insn, pc, &next_pc, child);
597 if (next_pc & 0x80000000) 597 if (next_pc & 0x80000000)
598 return -EIO; 598 return;
599 599
600 if (embed_debug_trap(child, next_pc)) 600 if (embed_debug_trap(child, next_pc))
601 return -EIO; 601 return;
602 602
603 invalidate_cache(); 603 invalidate_cache();
604 return 0;
605} 604}
606 605
607void user_disable_single_step(struct task_struct *child) 606void user_disable_single_step(struct task_struct *child)
diff --git a/arch/m32r/kernel/signal.c b/arch/m32r/kernel/signal.c
index f3fb2c029cfc..d0f60b97bbc5 100644
--- a/arch/m32r/kernel/signal.c
+++ b/arch/m32r/kernel/signal.c
@@ -286,7 +286,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
286 case -ERESTARTNOINTR: 286 case -ERESTARTNOINTR:
287 regs->r0 = regs->orig_r0; 287 regs->r0 = regs->orig_r0;
288 if (prev_insn(regs) < 0) 288 if (prev_insn(regs) < 0)
289 return -EFAULT; 289 return;
290 } 290 }
291 } 291 }
292 292
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index cac5b6be572a..147120128260 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -7,6 +7,8 @@ config M68K
7 select GENERIC_IRQ_SHOW 7 select GENERIC_IRQ_SHOW
8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS 8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if RMW_INSNS
9 select GENERIC_CPU_DEVICES 9 select GENERIC_CPU_DEVICES
10 select GENERIC_STRNCPY_FROM_USER if MMU
11 select GENERIC_STRNLEN_USER if MMU
10 select FPU if MMU 12 select FPU if MMU
11 select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE 13 select ARCH_USES_GETTIMEOFFSET if MMU && !COLDFIRE
12 14
diff --git a/arch/m68k/include/asm/Kbuild b/arch/m68k/include/asm/Kbuild
index 1a922fad76f7..eafa2539a8ee 100644
--- a/arch/m68k/include/asm/Kbuild
+++ b/arch/m68k/include/asm/Kbuild
@@ -1,2 +1,4 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2header-y += cachectl.h 2header-y += cachectl.h
3
4generic-y += word-at-a-time.h
diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index d63b99ff7ff7..497c31c803ff 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -86,7 +86,7 @@
86/* 86/*
87 * QSPI module. 87 * QSPI module.
88 */ 88 */
89#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340) 89#define MCFQSPI_BASE (MCF_IPSBAR + 0x340)
90#define MCFQSPI_SIZE 0x40 90#define MCFQSPI_SIZE 0x40
91 91
92#define MCFQSPI_CS0 147 92#define MCFQSPI_CS0 147
diff --git a/arch/m68k/include/asm/uaccess_mm.h b/arch/m68k/include/asm/uaccess_mm.h
index 9c80cd515b20..472c891a4aee 100644
--- a/arch/m68k/include/asm/uaccess_mm.h
+++ b/arch/m68k/include/asm/uaccess_mm.h
@@ -379,12 +379,15 @@ __constant_copy_to_user(void __user *to, const void *from, unsigned long n)
379#define copy_from_user(to, from, n) __copy_from_user(to, from, n) 379#define copy_from_user(to, from, n) __copy_from_user(to, from, n)
380#define copy_to_user(to, from, n) __copy_to_user(to, from, n) 380#define copy_to_user(to, from, n) __copy_to_user(to, from, n)
381 381
382long strncpy_from_user(char *dst, const char __user *src, long count); 382#define user_addr_max() \
383long strnlen_user(const char __user *src, long n); 383 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
384
385extern long strncpy_from_user(char *dst, const char __user *src, long count);
386extern __must_check long strlen_user(const char __user *str);
387extern __must_check long strnlen_user(const char __user *str, long n);
388
384unsigned long __clear_user(void __user *to, unsigned long n); 389unsigned long __clear_user(void __user *to, unsigned long n);
385 390
386#define clear_user __clear_user 391#define clear_user __clear_user
387 392
388#define strlen_user(str) strnlen_user(str, 32767)
389
390#endif /* _M68K_UACCESS_H */ 393#endif /* _M68K_UACCESS_H */
diff --git a/arch/m68k/kernel/ptrace.c b/arch/m68k/kernel/ptrace.c
index 8b4a2222e658..1bc10e62b9af 100644
--- a/arch/m68k/kernel/ptrace.c
+++ b/arch/m68k/kernel/ptrace.c
@@ -286,7 +286,7 @@ asmlinkage void syscall_trace(void)
286 } 286 }
287} 287}
288 288
289#ifdef CONFIG_COLDFIRE 289#if defined(CONFIG_COLDFIRE) || !defined(CONFIG_MMU)
290asmlinkage int syscall_trace_enter(void) 290asmlinkage int syscall_trace_enter(void)
291{ 291{
292 int ret = 0; 292 int ret = 0;
diff --git a/arch/m68k/kernel/time.c b/arch/m68k/kernel/time.c
index d7deb7fc7eb5..707f0573ec6b 100644
--- a/arch/m68k/kernel/time.c
+++ b/arch/m68k/kernel/time.c
@@ -85,7 +85,7 @@ void __init time_init(void)
85 mach_sched_init(timer_interrupt); 85 mach_sched_init(timer_interrupt);
86} 86}
87 87
88#ifdef CONFIG_M68KCLASSIC 88#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
89 89
90u32 arch_gettimeoffset(void) 90u32 arch_gettimeoffset(void)
91{ 91{
@@ -108,4 +108,4 @@ static int __init rtc_init(void)
108 108
109module_init(rtc_init); 109module_init(rtc_init);
110 110
111#endif /* CONFIG_M68KCLASSIC */ 111#endif /* CONFIG_ARCH_USES_GETTIMEOFFSET */
diff --git a/arch/m68k/lib/uaccess.c b/arch/m68k/lib/uaccess.c
index 5664386338da..5e97f2ee7c11 100644
--- a/arch/m68k/lib/uaccess.c
+++ b/arch/m68k/lib/uaccess.c
@@ -104,80 +104,6 @@ unsigned long __generic_copy_to_user(void __user *to, const void *from,
104EXPORT_SYMBOL(__generic_copy_to_user); 104EXPORT_SYMBOL(__generic_copy_to_user);
105 105
106/* 106/*
107 * Copy a null terminated string from userspace.
108 */
109long strncpy_from_user(char *dst, const char __user *src, long count)
110{
111 long res;
112 char c;
113
114 if (count <= 0)
115 return count;
116
117 asm volatile ("\n"
118 "1: "MOVES".b (%2)+,%4\n"
119 " move.b %4,(%1)+\n"
120 " jeq 2f\n"
121 " subq.l #1,%3\n"
122 " jne 1b\n"
123 "2: sub.l %3,%0\n"
124 "3:\n"
125 " .section .fixup,\"ax\"\n"
126 " .even\n"
127 "10: move.l %5,%0\n"
128 " jra 3b\n"
129 " .previous\n"
130 "\n"
131 " .section __ex_table,\"a\"\n"
132 " .align 4\n"
133 " .long 1b,10b\n"
134 " .previous"
135 : "=d" (res), "+a" (dst), "+a" (src), "+r" (count), "=&d" (c)
136 : "i" (-EFAULT), "0" (count));
137
138 return res;
139}
140EXPORT_SYMBOL(strncpy_from_user);
141
142/*
143 * Return the size of a string (including the ending 0)
144 *
145 * Return 0 on exception, a value greater than N if too long
146 */
147long strnlen_user(const char __user *src, long n)
148{
149 char c;
150 long res;
151
152 asm volatile ("\n"
153 "1: subq.l #1,%1\n"
154 " jmi 3f\n"
155 "2: "MOVES".b (%0)+,%2\n"
156 " tst.b %2\n"
157 " jne 1b\n"
158 " jra 4f\n"
159 "\n"
160 "3: addq.l #1,%0\n"
161 "4: sub.l %4,%0\n"
162 "5:\n"
163 " .section .fixup,\"ax\"\n"
164 " .even\n"
165 "20: sub.l %0,%0\n"
166 " jra 5b\n"
167 " .previous\n"
168 "\n"
169 " .section __ex_table,\"a\"\n"
170 " .align 4\n"
171 " .long 2b,20b\n"
172 " .previous\n"
173 : "=&a" (res), "+d" (n), "=&d" (c)
174 : "0" (src), "r" (src));
175
176 return res;
177}
178EXPORT_SYMBOL(strnlen_user);
179
180/*
181 * Zero Userspace 107 * Zero Userspace
182 */ 108 */
183 109
diff --git a/arch/m68k/platform/68328/timers.c b/arch/m68k/platform/68328/timers.c
index c801c172b822..f4dc9b295609 100644
--- a/arch/m68k/platform/68328/timers.c
+++ b/arch/m68k/platform/68328/timers.c
@@ -53,6 +53,7 @@
53#endif 53#endif
54 54
55static u32 m68328_tick_cnt; 55static u32 m68328_tick_cnt;
56static irq_handler_t timer_interrupt;
56 57
57/***************************************************************************/ 58/***************************************************************************/
58 59
@@ -62,7 +63,7 @@ static irqreturn_t hw_tick(int irq, void *dummy)
62 TSTAT &= 0; 63 TSTAT &= 0;
63 64
64 m68328_tick_cnt += TICKS_PER_JIFFY; 65 m68328_tick_cnt += TICKS_PER_JIFFY;
65 return arch_timer_interrupt(irq, dummy); 66 return timer_interrupt(irq, dummy);
66} 67}
67 68
68/***************************************************************************/ 69/***************************************************************************/
@@ -99,7 +100,7 @@ static struct clocksource m68328_clk = {
99 100
100/***************************************************************************/ 101/***************************************************************************/
101 102
102void hw_timer_init(void) 103void hw_timer_init(irq_handler_t handler)
103{ 104{
104 /* disable timer 1 */ 105 /* disable timer 1 */
105 TCTL = 0; 106 TCTL = 0;
@@ -115,6 +116,7 @@ void hw_timer_init(void)
115 /* Enable timer 1 */ 116 /* Enable timer 1 */
116 TCTL |= TCTL_TEN; 117 TCTL |= TCTL_TEN;
117 clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ); 118 clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
119 timer_interrupt = handler;
118} 120}
119 121
120/***************************************************************************/ 122/***************************************************************************/
diff --git a/arch/m68k/platform/68360/config.c b/arch/m68k/platform/68360/config.c
index 255fc03913e9..9877cefad1e7 100644
--- a/arch/m68k/platform/68360/config.c
+++ b/arch/m68k/platform/68360/config.c
@@ -35,6 +35,7 @@ extern void m360_cpm_reset(void);
35#define OSCILLATOR (unsigned long int)33000000 35#define OSCILLATOR (unsigned long int)33000000
36#endif 36#endif
37 37
38static irq_handler_t timer_interrupt;
38unsigned long int system_clock; 39unsigned long int system_clock;
39 40
40extern QUICC *pquicc; 41extern QUICC *pquicc;
@@ -52,7 +53,7 @@ static irqreturn_t hw_tick(int irq, void *dummy)
52 53
53 pquicc->timer_ter1 = 0x0002; /* clear timer event */ 54 pquicc->timer_ter1 = 0x0002; /* clear timer event */
54 55
55 return arch_timer_interrupt(irq, dummy); 56 return timer_interrupt(irq, dummy);
56} 57}
57 58
58static struct irqaction m68360_timer_irq = { 59static struct irqaction m68360_timer_irq = {
@@ -61,7 +62,7 @@ static struct irqaction m68360_timer_irq = {
61 .handler = hw_tick, 62 .handler = hw_tick,
62}; 63};
63 64
64void hw_timer_init(void) 65void hw_timer_init(irq_handler_t handler)
65{ 66{
66 unsigned char prescaler; 67 unsigned char prescaler;
67 unsigned short tgcr_save; 68 unsigned short tgcr_save;
@@ -94,6 +95,8 @@ void hw_timer_init(void)
94 95
95 pquicc->timer_ter1 = 0x0003; /* clear timer events */ 96 pquicc->timer_ter1 = 0x0003; /* clear timer events */
96 97
98 timer_interrupt = handler;
99
97 /* enable timer 1 interrupt in CIMR */ 100 /* enable timer 1 interrupt in CIMR */
98 setup_irq(CPMVEC_TIMER1, &m68360_timer_irq); 101 setup_irq(CPMVEC_TIMER1, &m68360_timer_irq);
99 102
diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c
index 9f1260c5e2ad..44da406897e5 100644
--- a/arch/m68k/platform/coldfire/clk.c
+++ b/arch/m68k/platform/coldfire/clk.c
@@ -42,4 +42,11 @@ unsigned long clk_get_rate(struct clk *clk)
42 return MCF_CLK; 42 return MCF_CLK;
43} 43}
44EXPORT_SYMBOL(clk_get_rate); 44EXPORT_SYMBOL(clk_get_rate);
45
46struct clk *devm_clk_get(struct device *dev, const char *id)
47{
48 return NULL;
49}
50EXPORT_SYMBOL(devm_clk_get);
51
45/***************************************************************************/ 52/***************************************************************************/
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 09ab87ee6fef..b3e10fdd3898 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -288,6 +288,7 @@ config MIPS_MALTA
288 select SYS_HAS_CPU_MIPS32_R1 288 select SYS_HAS_CPU_MIPS32_R1
289 select SYS_HAS_CPU_MIPS32_R2 289 select SYS_HAS_CPU_MIPS32_R2
290 select SYS_HAS_CPU_MIPS64_R1 290 select SYS_HAS_CPU_MIPS64_R1
291 select SYS_HAS_CPU_MIPS64_R2
291 select SYS_HAS_CPU_NEVADA 292 select SYS_HAS_CPU_NEVADA
292 select SYS_HAS_CPU_RM7000 293 select SYS_HAS_CPU_RM7000
293 select SYS_HAS_EARLY_PRINTK 294 select SYS_HAS_EARLY_PRINTK
@@ -1423,6 +1424,7 @@ config CPU_SB1
1423config CPU_CAVIUM_OCTEON 1424config CPU_CAVIUM_OCTEON
1424 bool "Cavium Octeon processor" 1425 bool "Cavium Octeon processor"
1425 depends on SYS_HAS_CPU_CAVIUM_OCTEON 1426 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1427 select ARCH_SPARSEMEM_ENABLE
1426 select CPU_HAS_PREFETCH 1428 select CPU_HAS_PREFETCH
1427 select CPU_SUPPORTS_64BIT_KERNEL 1429 select CPU_SUPPORTS_64BIT_KERNEL
1428 select SYS_SUPPORTS_SMP 1430 select SYS_SUPPORTS_SMP
diff --git a/arch/mips/bcm47xx/Kconfig b/arch/mips/bcm47xx/Kconfig
index 6210b8d84109..b311be45a720 100644
--- a/arch/mips/bcm47xx/Kconfig
+++ b/arch/mips/bcm47xx/Kconfig
@@ -21,6 +21,7 @@ config BCM47XX_BCMA
21 select BCMA 21 select BCMA
22 select BCMA_HOST_SOC 22 select BCMA_HOST_SOC
23 select BCMA_DRIVER_MIPS 23 select BCMA_DRIVER_MIPS
24 select BCMA_HOST_PCI if PCI
24 select BCMA_DRIVER_PCI_HOSTMODE if PCI 25 select BCMA_DRIVER_PCI_HOSTMODE if PCI
25 default y 26 default y
26 help 27 help
diff --git a/arch/mips/bcm63xx/dev-pcmcia.c b/arch/mips/bcm63xx/dev-pcmcia.c
index de4d917fd54d..a551bab5ecb9 100644
--- a/arch/mips/bcm63xx/dev-pcmcia.c
+++ b/arch/mips/bcm63xx/dev-pcmcia.c
@@ -79,11 +79,11 @@ static int __init config_pcmcia_cs(unsigned int cs,
79 return ret; 79 return ret;
80} 80}
81 81
82static const __initdata struct { 82static const struct {
83 unsigned int cs; 83 unsigned int cs;
84 unsigned int base; 84 unsigned int base;
85 unsigned int size; 85 unsigned int size;
86} pcmcia_cs[3] = { 86} pcmcia_cs[3] __initconst = {
87 { 87 {
88 .cs = MPI_CS_PCMCIA_COMMON, 88 .cs = MPI_CS_PCMCIA_COMMON,
89 .base = BCM_PCMCIA_COMMON_BASE_PA, 89 .base = BCM_PCMCIA_COMMON_BASE_PA,
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index f9e275a50d98..2f4f6d5e05b6 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -82,10 +82,6 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY
82 help 82 help
83 Lock the kernel's implementation of memcpy() into L2. 83 Lock the kernel's implementation of memcpy() into L2.
84 84
85config ARCH_SPARSEMEM_ENABLE
86 def_bool y
87 select SPARSEMEM_STATIC
88
89config IOMMU_HELPER 85config IOMMU_HELPER
90 bool 86 bool
91 87
diff --git a/arch/mips/cavium-octeon/smp.c b/arch/mips/cavium-octeon/smp.c
index 4b93048044eb..ee1fb9f7f517 100644
--- a/arch/mips/cavium-octeon/smp.c
+++ b/arch/mips/cavium-octeon/smp.c
@@ -185,7 +185,6 @@ static void __cpuinit octeon_init_secondary(void)
185 octeon_init_cvmcount(); 185 octeon_init_cvmcount();
186 186
187 octeon_irq_setup_secondary(); 187 octeon_irq_setup_secondary();
188 raw_local_irq_enable();
189} 188}
190 189
191/** 190/**
@@ -233,6 +232,7 @@ static void octeon_smp_finish(void)
233 232
234 /* to generate the first CPU timer interrupt */ 233 /* to generate the first CPU timer interrupt */
235 write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ); 234 write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
235 local_irq_enable();
236} 236}
237 237
238/** 238/**
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 2e1ad4c652b7..82ad35ce2b45 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -17,7 +17,6 @@
17#include <linux/irqflags.h> 17#include <linux/irqflags.h>
18#include <linux/types.h> 18#include <linux/types.h>
19#include <asm/barrier.h> 19#include <asm/barrier.h>
20#include <asm/bug.h>
21#include <asm/byteorder.h> /* sigh ... */ 20#include <asm/byteorder.h> /* sigh ... */
22#include <asm/cpu-features.h> 21#include <asm/cpu-features.h>
23#include <asm/sgidefs.h> 22#include <asm/sgidefs.h>
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 285a41fa0b18..eee10dc07ac1 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -8,6 +8,7 @@
8#ifndef __ASM_CMPXCHG_H 8#ifndef __ASM_CMPXCHG_H
9#define __ASM_CMPXCHG_H 9#define __ASM_CMPXCHG_H
10 10
11#include <linux/bug.h>
11#include <linux/irqflags.h> 12#include <linux/irqflags.h>
12#include <asm/war.h> 13#include <asm/war.h>
13 14
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index f9fa2a479dd0..95e40c1e8ed1 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -94,6 +94,7 @@
94#define PRID_IMP_24KE 0x9600 94#define PRID_IMP_24KE 0x9600
95#define PRID_IMP_74K 0x9700 95#define PRID_IMP_74K 0x9700
96#define PRID_IMP_1004K 0x9900 96#define PRID_IMP_1004K 0x9900
97#define PRID_IMP_M14KC 0x9c00
97 98
98/* 99/*
99 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE 100 * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE
@@ -260,12 +261,12 @@ enum cpu_type_enum {
260 */ 261 */
261 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, 262 CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
262 CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350, 263 CPU_ALCHEMY, CPU_PR4450, CPU_BMIPS32, CPU_BMIPS3300, CPU_BMIPS4350,
263 CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, 264 CPU_BMIPS4380, CPU_BMIPS5000, CPU_JZRISC, CPU_M14KC,
264 265
265 /* 266 /*
266 * MIPS64 class processors 267 * MIPS64 class processors
267 */ 268 */
268 CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2, 269 CPU_5KC, CPU_5KE, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
269 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2, 270 CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, CPU_CAVIUM_OCTEON2,
270 CPU_XLR, CPU_XLP, 271 CPU_XLR, CPU_XLP,
271 272
@@ -288,7 +289,7 @@ enum cpu_type_enum {
288#define MIPS_CPU_ISA_M64R2 0x00000100 289#define MIPS_CPU_ISA_M64R2 0x00000100
289 290
290#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \ 291#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \
291 MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 ) 292 MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2)
292#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \ 293#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
293 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2) 294 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
294 295
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 86548da650e7..991b659e2548 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -206,7 +206,7 @@
206 206
207#define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100 207#define GIC_VPE_EIC_SHADOW_SET_BASE 0x0100
208#define GIC_VPE_EIC_SS(intr) \ 208#define GIC_VPE_EIC_SS(intr) \
209 (GIC_EIC_SHADOW_SET_BASE + (4 * intr)) 209 (GIC_VPE_EIC_SHADOW_SET_BASE + (4 * intr))
210 210
211#define GIC_VPE_EIC_VEC_BASE 0x0800 211#define GIC_VPE_EIC_VEC_BASE 0x0800
212#define GIC_VPE_EIC_VEC(intr) \ 212#define GIC_VPE_EIC_VEC(intr) \
@@ -330,6 +330,17 @@ struct gic_intr_map {
330#define GIC_FLAG_TRANSPARENT 0x02 330#define GIC_FLAG_TRANSPARENT 0x02
331}; 331};
332 332
333/*
334 * This is only used in EIC mode. This helps to figure out which
335 * shared interrupts we need to process when we get a vector interrupt.
336 */
337#define GIC_MAX_SHARED_INTR 0x5
338struct gic_shared_intr_map {
339 unsigned int num_shared_intr;
340 unsigned int intr_list[GIC_MAX_SHARED_INTR];
341 unsigned int local_intr_mask;
342};
343
333extern void gic_init(unsigned long gic_base_addr, 344extern void gic_init(unsigned long gic_base_addr,
334 unsigned long gic_addrspace_size, struct gic_intr_map *intrmap, 345 unsigned long gic_addrspace_size, struct gic_intr_map *intrmap,
335 unsigned int intrmap_size, unsigned int irqbase); 346 unsigned int intrmap_size, unsigned int irqbase);
@@ -338,5 +349,7 @@ extern unsigned int gic_get_int(void);
338extern void gic_send_ipi(unsigned int intr); 349extern void gic_send_ipi(unsigned int intr);
339extern unsigned int plat_ipi_call_int_xlate(unsigned int); 350extern unsigned int plat_ipi_call_int_xlate(unsigned int);
340extern unsigned int plat_ipi_resched_int_xlate(unsigned int); 351extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
352extern void gic_bind_eic_interrupt(int irq, int set);
353extern unsigned int gic_get_timer_pending(void);
341 354
342#endif /* _ASM_GICREGS_H */ 355#endif /* _ASM_GICREGS_H */
diff --git a/arch/mips/include/asm/inst.h b/arch/mips/include/asm/inst.h
index 7ebfc392e58d..ab84064283db 100644
--- a/arch/mips/include/asm/inst.h
+++ b/arch/mips/include/asm/inst.h
@@ -251,7 +251,7 @@ struct f_format { /* FPU register format */
251 unsigned int func : 6; 251 unsigned int func : 6;
252}; 252};
253 253
254struct ma_format { /* FPU multipy and add format (MIPS IV) */ 254struct ma_format { /* FPU multiply and add format (MIPS IV) */
255 unsigned int opcode : 6; 255 unsigned int opcode : 6;
256 unsigned int fr : 5; 256 unsigned int fr : 5;
257 unsigned int ft : 5; 257 unsigned int ft : 5;
@@ -324,7 +324,7 @@ struct f_format { /* FPU register format */
324 unsigned int opcode : 6; 324 unsigned int opcode : 6;
325}; 325};
326 326
327struct ma_format { /* FPU multipy and add format (MIPS IV) */ 327struct ma_format { /* FPU multiply and add format (MIPS IV) */
328 unsigned int fmt : 2; 328 unsigned int fmt : 2;
329 unsigned int func : 4; 329 unsigned int func : 4;
330 unsigned int fd : 5; 330 unsigned int fd : 5;
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index a58f22998a86..29d9c23c20c7 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -17,6 +17,7 @@
17#include <linux/types.h> 17#include <linux/types.h>
18 18
19#include <asm/addrspace.h> 19#include <asm/addrspace.h>
20#include <asm/bug.h>
20#include <asm/byteorder.h> 21#include <asm/byteorder.h>
21#include <asm/cpu.h> 22#include <asm/cpu.h>
22#include <asm/cpu-features.h> 23#include <asm/cpu-features.h>
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h
index fb698dc09bc9..78dbb8a86da2 100644
--- a/arch/mips/include/asm/irq.h
+++ b/arch/mips/include/asm/irq.h
@@ -136,6 +136,7 @@ extern void free_irqno(unsigned int irq);
136 * IE7. Since R2 their number has to be read from the c0_intctl register. 136 * IE7. Since R2 their number has to be read from the c0_intctl register.
137 */ 137 */
138#define CP0_LEGACY_COMPARE_IRQ 7 138#define CP0_LEGACY_COMPARE_IRQ 7
139#define CP0_LEGACY_PERFCNT_IRQ 7
139 140
140extern int cp0_compare_irq; 141extern int cp0_compare_irq;
141extern int cp0_compare_irq_shift; 142extern int cp0_compare_irq_shift;
diff --git a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
index 94d4faad29a1..fdcd78ca1b03 100644
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -99,7 +99,7 @@
99#define CKCTL_6368_USBH_CLK_EN (1 << 15) 99#define CKCTL_6368_USBH_CLK_EN (1 << 15)
100#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16) 100#define CKCTL_6368_DISABLE_GLESS_EN (1 << 16)
101#define CKCTL_6368_NAND_CLK_EN (1 << 17) 101#define CKCTL_6368_NAND_CLK_EN (1 << 17)
102#define CKCTL_6368_IPSEC_CLK_EN (1 << 17) 102#define CKCTL_6368_IPSEC_CLK_EN (1 << 18)
103 103
104#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \ 104#define CKCTL_6368_ALL_SAFE_EN (CKCTL_6368_SWPKT_USB_EN | \
105 CKCTL_6368_SWPKT_SAR_EN | \ 105 CKCTL_6368_SWPKT_SAR_EN | \
diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h
index d11aa02a956a..5447d9fc4219 100644
--- a/arch/mips/include/asm/mips-boards/maltaint.h
+++ b/arch/mips/include/asm/mips-boards/maltaint.h
@@ -86,6 +86,16 @@
86#define GIC_CPU_INT4 4 /* . */ 86#define GIC_CPU_INT4 4 /* . */
87#define GIC_CPU_INT5 5 /* Core Interrupt 5 */ 87#define GIC_CPU_INT5 5 /* Core Interrupt 5 */
88 88
89/* MALTA GIC local interrupts */
90#define GIC_INT_TMR (GIC_CPU_INT5)
91#define GIC_INT_PERFCTR (GIC_CPU_INT5)
92
93/* GIC constants */
94/* Add 2 to convert non-eic hw int # to eic vector # */
95#define GIC_CPU_TO_VEC_OFFSET (2)
96/* If we map an intr to pin X, GIC will actually generate vector X+1 */
97#define GIC_PIN_TO_VEC_OFFSET (1)
98
89#define GIC_EXT_INTR(x) x 99#define GIC_EXT_INTR(x) x
90 100
91/* External Interrupts used for IPI */ 101/* External Interrupts used for IPI */
diff --git a/arch/mips/include/asm/mipsmtregs.h b/arch/mips/include/asm/mipsmtregs.h
index c9420aa97e32..e71ff4c317f2 100644
--- a/arch/mips/include/asm/mipsmtregs.h
+++ b/arch/mips/include/asm/mipsmtregs.h
@@ -48,7 +48,7 @@
48#define CP0_VPECONF0 $1, 2 48#define CP0_VPECONF0 $1, 2
49#define CP0_VPECONF1 $1, 3 49#define CP0_VPECONF1 $1, 3
50#define CP0_YQMASK $1, 4 50#define CP0_YQMASK $1, 4
51#define CP0_VPESCHEDULE $1, 5 51#define CP0_VPESCHEDULE $1, 5
52#define CP0_VPESCHEFBK $1, 6 52#define CP0_VPESCHEFBK $1, 6
53#define CP0_TCSTATUS $2, 1 53#define CP0_TCSTATUS $2, 1
54#define CP0_TCBIND $2, 2 54#define CP0_TCBIND $2, 2
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
index 5d33621b5658..4f8ddba8c360 100644
--- a/arch/mips/include/asm/switch_to.h
+++ b/arch/mips/include/asm/switch_to.h
@@ -22,7 +22,7 @@ struct task_struct;
22 * switch_to(n) should switch tasks to task nr n, first 22 * switch_to(n) should switch tasks to task nr n, first
23 * checking that n isn't the current task, in which case it does nothing. 23 * checking that n isn't the current task, in which case it does nothing.
24 */ 24 */
25extern asmlinkage void *resume(void *last, void *next, void *next_ti); 25extern asmlinkage void *resume(void *last, void *next, void *next_ti, u32 __usedfpu);
26 26
27extern unsigned int ll_bit; 27extern unsigned int ll_bit;
28extern struct task_struct *ll_task; 28extern struct task_struct *ll_task;
@@ -66,11 +66,13 @@ do { \
66 66
67#define switch_to(prev, next, last) \ 67#define switch_to(prev, next, last) \
68do { \ 68do { \
69 u32 __usedfpu; \
69 __mips_mt_fpaff_switch_to(prev); \ 70 __mips_mt_fpaff_switch_to(prev); \
70 if (cpu_has_dsp) \ 71 if (cpu_has_dsp) \
71 __save_dsp(prev); \ 72 __save_dsp(prev); \
72 __clear_software_ll_bit(); \ 73 __clear_software_ll_bit(); \
73 (last) = resume(prev, next, task_thread_info(next)); \ 74 __usedfpu = test_and_clear_tsk_thread_flag(prev, TIF_USEDFPU); \
75 (last) = resume(prev, next, task_thread_info(next), __usedfpu); \
74} while (0) 76} while (0)
75 77
76#define finish_arch_switch(prev) \ 78#define finish_arch_switch(prev) \
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index e2eca7d10598..ca97e0ecb64b 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -60,6 +60,8 @@ struct thread_info {
60register struct thread_info *__current_thread_info __asm__("$28"); 60register struct thread_info *__current_thread_info __asm__("$28");
61#define current_thread_info() __current_thread_info 61#define current_thread_info() __current_thread_info
62 62
63#endif /* !__ASSEMBLY__ */
64
63/* thread information allocation */ 65/* thread information allocation */
64#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT) 66#if defined(CONFIG_PAGE_SIZE_4KB) && defined(CONFIG_32BIT)
65#define THREAD_SIZE_ORDER (1) 67#define THREAD_SIZE_ORDER (1)
@@ -85,8 +87,6 @@ register struct thread_info *__current_thread_info __asm__("$28");
85 87
86#define STACK_WARN (THREAD_SIZE / 8) 88#define STACK_WARN (THREAD_SIZE / 8)
87 89
88#endif /* !__ASSEMBLY__ */
89
90#define PREEMPT_ACTIVE 0x10000000 90#define PREEMPT_ACTIVE 0x10000000
91 91
92/* 92/*
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 6ae7ce4ac63e..f4630e1082ab 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -4,7 +4,7 @@
4 * Copyright (C) xxxx the Anonymous 4 * Copyright (C) xxxx the Anonymous
5 * Copyright (C) 1994 - 2006 Ralf Baechle 5 * Copyright (C) 1994 - 2006 Ralf Baechle
6 * Copyright (C) 2003, 2004 Maciej W. Rozycki 6 * Copyright (C) 2003, 2004 Maciej W. Rozycki
7 * Copyright (C) 2001, 2004 MIPS Inc. 7 * Copyright (C) 2001, 2004, 2011, 2012 MIPS Technologies, Inc.
8 * 8 *
9 * This program is free software; you can redistribute it and/or 9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License 10 * modify it under the terms of the GNU General Public License
@@ -199,6 +199,7 @@ void __init check_wait(void)
199 cpu_wait = rm7k_wait_irqoff; 199 cpu_wait = rm7k_wait_irqoff;
200 break; 200 break;
201 201
202 case CPU_M14KC:
202 case CPU_24K: 203 case CPU_24K:
203 case CPU_34K: 204 case CPU_34K:
204 case CPU_1004K: 205 case CPU_1004K:
@@ -810,6 +811,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
810 c->cputype = CPU_5KC; 811 c->cputype = CPU_5KC;
811 __cpu_name[cpu] = "MIPS 5Kc"; 812 __cpu_name[cpu] = "MIPS 5Kc";
812 break; 813 break;
814 case PRID_IMP_5KE:
815 c->cputype = CPU_5KE;
816 __cpu_name[cpu] = "MIPS 5KE";
817 break;
813 case PRID_IMP_20KC: 818 case PRID_IMP_20KC:
814 c->cputype = CPU_20KC; 819 c->cputype = CPU_20KC;
815 __cpu_name[cpu] = "MIPS 20Kc"; 820 __cpu_name[cpu] = "MIPS 20Kc";
@@ -831,6 +836,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
831 c->cputype = CPU_74K; 836 c->cputype = CPU_74K;
832 __cpu_name[cpu] = "MIPS 74Kc"; 837 __cpu_name[cpu] = "MIPS 74Kc";
833 break; 838 break;
839 case PRID_IMP_M14KC:
840 c->cputype = CPU_M14KC;
841 __cpu_name[cpu] = "MIPS M14Kc";
842 break;
834 case PRID_IMP_1004K: 843 case PRID_IMP_1004K:
835 c->cputype = CPU_1004K; 844 c->cputype = CPU_1004K;
836 __cpu_name[cpu] = "MIPS 1004Kc"; 845 __cpu_name[cpu] = "MIPS 1004Kc";
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 57ba13edb03a..3fc1691110dc 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -5,7 +5,7 @@
5 * License. See the file "COPYING" in the main directory of this archive 5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details. 6 * for more details.
7 * 7 *
8 * Copyright (C) 1996, 97, 98, 99, 2000, 01, 03, 04, 05 by Ralf Baechle 8 * Copyright (C) 1996, 97, 98, 99, 2000, 01, 03, 04, 05, 12 by Ralf Baechle
9 * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc. 9 * Copyright (C) 1999, 2000, 01 Silicon Graphics, Inc.
10 */ 10 */
11#include <linux/interrupt.h> 11#include <linux/interrupt.h>
@@ -35,6 +35,12 @@ EXPORT_SYMBOL(memmove);
35EXPORT_SYMBOL(kernel_thread); 35EXPORT_SYMBOL(kernel_thread);
36 36
37/* 37/*
38 * Functions that operate on entire pages. Mostly used by memory management.
39 */
40EXPORT_SYMBOL(clear_page);
41EXPORT_SYMBOL(copy_page);
42
43/*
38 * Userspace access stuff. 44 * Userspace access stuff.
39 */ 45 */
40EXPORT_SYMBOL(__copy_user); 46EXPORT_SYMBOL(__copy_user);
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index ce89c8061708..0441f54b2a6a 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -31,7 +31,7 @@
31 31
32/* 32/*
33 * task_struct *resume(task_struct *prev, task_struct *next, 33 * task_struct *resume(task_struct *prev, task_struct *next,
34 * struct thread_info *next_ti) 34 * struct thread_info *next_ti, int usedfpu)
35 */ 35 */
36 .align 7 36 .align 7
37 LEAF(resume) 37 LEAF(resume)
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index f29099b104c4..eb5e394a4650 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -162,11 +162,6 @@ static unsigned int counters_total_to_per_cpu(unsigned int counters)
162 return counters >> vpe_shift(); 162 return counters >> vpe_shift();
163} 163}
164 164
165static unsigned int counters_per_cpu_to_total(unsigned int counters)
166{
167 return counters << vpe_shift();
168}
169
170#else /* !CONFIG_MIPS_MT_SMP */ 165#else /* !CONFIG_MIPS_MT_SMP */
171#define vpe_id() 0 166#define vpe_id() 0
172 167
diff --git a/arch/mips/kernel/r2300_switch.S b/arch/mips/kernel/r2300_switch.S
index 293898391e67..9c51be5a163a 100644
--- a/arch/mips/kernel/r2300_switch.S
+++ b/arch/mips/kernel/r2300_switch.S
@@ -43,7 +43,7 @@
43 43
44/* 44/*
45 * task_struct *resume(task_struct *prev, task_struct *next, 45 * task_struct *resume(task_struct *prev, task_struct *next,
46 * struct thread_info *next_ti) ) 46 * struct thread_info *next_ti, int usedfpu)
47 */ 47 */
48LEAF(resume) 48LEAF(resume)
49 mfc0 t1, CP0_STATUS 49 mfc0 t1, CP0_STATUS
@@ -51,18 +51,9 @@ LEAF(resume)
51 cpu_save_nonscratch a0 51 cpu_save_nonscratch a0
52 sw ra, THREAD_REG31(a0) 52 sw ra, THREAD_REG31(a0)
53 53
54 /* 54 beqz a3, 1f
55 * check if we need to save FPU registers
56 */
57 lw t3, TASK_THREAD_INFO(a0)
58 lw t0, TI_FLAGS(t3)
59 li t1, _TIF_USEDFPU
60 and t2, t0, t1
61 beqz t2, 1f
62 nor t1, zero, t1
63 55
64 and t0, t0, t1 56 PTR_L t3, TASK_THREAD_INFO(a0)
65 sw t0, TI_FLAGS(t3)
66 57
67 /* 58 /*
68 * clear saved user stack CU1 bit 59 * clear saved user stack CU1 bit
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 9414f9354469..42d2a3938420 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -41,7 +41,7 @@
41 41
42/* 42/*
43 * task_struct *resume(task_struct *prev, task_struct *next, 43 * task_struct *resume(task_struct *prev, task_struct *next,
44 * struct thread_info *next_ti) 44 * struct thread_info *next_ti, int usedfpu)
45 */ 45 */
46 .align 5 46 .align 5
47 LEAF(resume) 47 LEAF(resume)
@@ -53,16 +53,10 @@
53 /* 53 /*
54 * check if we need to save FPU registers 54 * check if we need to save FPU registers
55 */ 55 */
56 PTR_L t3, TASK_THREAD_INFO(a0)
57 LONG_L t0, TI_FLAGS(t3)
58 li t1, _TIF_USEDFPU
59 and t2, t0, t1
60 beqz t2, 1f
61 nor t1, zero, t1
62 56
63 and t0, t0, t1 57 beqz a3, 1f
64 LONG_S t0, TI_FLAGS(t3)
65 58
59 PTR_L t3, TASK_THREAD_INFO(a0)
66 /* 60 /*
67 * clear saved user stack CU1 bit 61 * clear saved user stack CU1 bit
68 */ 62 */
diff --git a/arch/mips/kernel/smp-bmips.c b/arch/mips/kernel/smp-bmips.c
index 3046e2986006..8e393b8443f7 100644
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -15,7 +15,6 @@
15#include <linux/smp.h> 15#include <linux/smp.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/spinlock.h> 17#include <linux/spinlock.h>
18#include <linux/init.h>
19#include <linux/cpu.h> 18#include <linux/cpu.h>
20#include <linux/cpumask.h> 19#include <linux/cpumask.h>
21#include <linux/reboot.h> 20#include <linux/reboot.h>
@@ -197,13 +196,6 @@ static void bmips_init_secondary(void)
197 196
198 write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0)); 197 write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0));
199#endif 198#endif
200
201 /* make sure there won't be a timer interrupt for a little while */
202 write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
203
204 irq_enable_hazard();
205 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);
206 irq_enable_hazard();
207} 199}
208 200
209/* 201/*
@@ -212,6 +204,13 @@ static void bmips_init_secondary(void)
212static void bmips_smp_finish(void) 204static void bmips_smp_finish(void)
213{ 205{
214 pr_info("SMP: CPU%d is running\n", smp_processor_id()); 206 pr_info("SMP: CPU%d is running\n", smp_processor_id());
207
208 /* make sure there won't be a timer interrupt for a little while */
209 write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);
210
211 irq_enable_hazard();
212 set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);
213 irq_enable_hazard();
215} 214}
216 215
217/* 216/*
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c
index 48650c818040..1268392f1d27 100644
--- a/arch/mips/kernel/smp.c
+++ b/arch/mips/kernel/smp.c
@@ -122,13 +122,21 @@ asmlinkage __cpuinit void start_secondary(void)
122 122
123 notify_cpu_starting(cpu); 123 notify_cpu_starting(cpu);
124 124
125 mp_ops->smp_finish(); 125 set_cpu_online(cpu, true);
126
126 set_cpu_sibling_map(cpu); 127 set_cpu_sibling_map(cpu);
127 128
128 cpu_set(cpu, cpu_callin_map); 129 cpu_set(cpu, cpu_callin_map);
129 130
130 synchronise_count_slave(); 131 synchronise_count_slave();
131 132
133 /*
134 * irq will be enabled in ->smp_finish(), enabling it too early
135 * is dangerous.
136 */
137 WARN_ON_ONCE(!irqs_disabled());
138 mp_ops->smp_finish();
139
132 cpu_idle(); 140 cpu_idle();
133} 141}
134 142
@@ -196,8 +204,6 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
196 while (!cpu_isset(cpu, cpu_callin_map)) 204 while (!cpu_isset(cpu, cpu_callin_map))
197 udelay(100); 205 udelay(100);
198 206
199 set_cpu_online(cpu, true);
200
201 return 0; 207 return 0;
202} 208}
203 209
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c
index f5dd38f1d015..15b5f3cfd20c 100644
--- a/arch/mips/kernel/smtc.c
+++ b/arch/mips/kernel/smtc.c
@@ -322,7 +322,7 @@ int __init smtc_build_cpu_map(int start_cpu_slot)
322 322
323/* 323/*
324 * Common setup before any secondaries are started 324 * Common setup before any secondaries are started
325 * Make sure all CPU's are in a sensible state before we boot any of the 325 * Make sure all CPUs are in a sensible state before we boot any of the
326 * secondaries. 326 * secondaries.
327 * 327 *
328 * For MIPS MT "SMTC" operation, we set up all TCs, spread as evenly 328 * For MIPS MT "SMTC" operation, we set up all TCs, spread as evenly
@@ -340,12 +340,12 @@ static void smtc_tc_setup(int vpe, int tc, int cpu)
340 /* 340 /*
341 * TCContext gets an offset from the base of the IPIQ array 341 * TCContext gets an offset from the base of the IPIQ array
342 * to be used in low-level code to detect the presence of 342 * to be used in low-level code to detect the presence of
343 * an active IPI queue 343 * an active IPI queue.
344 */ 344 */
345 write_tc_c0_tccontext((sizeof(struct smtc_ipi_q) * cpu) << 16); 345 write_tc_c0_tccontext((sizeof(struct smtc_ipi_q) * cpu) << 16);
346 /* Bind tc to vpe */ 346 /* Bind tc to vpe */
347 write_tc_c0_tcbind(vpe); 347 write_tc_c0_tcbind(vpe);
348 /* In general, all TCs should have the same cpu_data indications */ 348 /* In general, all TCs should have the same cpu_data indications. */
349 memcpy(&cpu_data[cpu], &cpu_data[0], sizeof(struct cpuinfo_mips)); 349 memcpy(&cpu_data[cpu], &cpu_data[0], sizeof(struct cpuinfo_mips));
350 /* For 34Kf, start with TC/CPU 0 as sole owner of single FPU context */ 350 /* For 34Kf, start with TC/CPU 0 as sole owner of single FPU context */
351 if (cpu_data[0].cputype == CPU_34K || 351 if (cpu_data[0].cputype == CPU_34K ||
@@ -358,8 +358,8 @@ static void smtc_tc_setup(int vpe, int tc, int cpu)
358} 358}
359 359
360/* 360/*
361 * Tweak to get Count registes in as close a sync as possible. 361 * Tweak to get Count registes in as close a sync as possible. The
362 * Value seems good for 34K-class cores. 362 * value seems good for 34K-class cores.
363 */ 363 */
364 364
365#define CP0_SKEW 8 365#define CP0_SKEW 8
@@ -615,7 +615,6 @@ void __cpuinit smtc_boot_secondary(int cpu, struct task_struct *idle)
615 615
616void smtc_init_secondary(void) 616void smtc_init_secondary(void)
617{ 617{
618 local_irq_enable();
619} 618}
620 619
621void smtc_smp_finish(void) 620void smtc_smp_finish(void)
@@ -631,6 +630,8 @@ void smtc_smp_finish(void)
631 if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id)) 630 if (cpu > 0 && (cpu_data[cpu].vpe_id != cpu_data[cpu - 1].vpe_id))
632 write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ); 631 write_c0_compare(read_c0_count() + mips_hpt_frequency/HZ);
633 632
633 local_irq_enable();
634
634 printk("TC %d going on-line as CPU %d\n", 635 printk("TC %d going on-line as CPU %d\n",
635 cpu_data[smp_processor_id()].tc_id, smp_processor_id()); 636 cpu_data[smp_processor_id()].tc_id, smp_processor_id());
636} 637}
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c
index 99f913c8d7a6..842d55e411fd 100644
--- a/arch/mips/kernel/sync-r4k.c
+++ b/arch/mips/kernel/sync-r4k.c
@@ -111,7 +111,6 @@ void __cpuinit synchronise_count_master(void)
111void __cpuinit synchronise_count_slave(void) 111void __cpuinit synchronise_count_slave(void)
112{ 112{
113 int i; 113 int i;
114 unsigned long flags;
115 unsigned int initcount; 114 unsigned int initcount;
116 int ncpus; 115 int ncpus;
117 116
@@ -123,8 +122,6 @@ void __cpuinit synchronise_count_slave(void)
123 return; 122 return;
124#endif 123#endif
125 124
126 local_irq_save(flags);
127
128 /* 125 /*
129 * Not every cpu is online at the time this gets called, 126 * Not every cpu is online at the time this gets called,
130 * so we first wait for the master to say everyone is ready 127 * so we first wait for the master to say everyone is ready
@@ -154,7 +151,5 @@ void __cpuinit synchronise_count_slave(void)
154 } 151 }
155 /* Arrange for an interrupt in a short while */ 152 /* Arrange for an interrupt in a short while */
156 write_c0_compare(read_c0_count() + COUNTON); 153 write_c0_compare(read_c0_count() + COUNTON);
157
158 local_irq_restore(flags);
159} 154}
160#undef NR_LOOPS 155#undef NR_LOOPS
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 2d0c2a277f52..c3c293543703 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -132,6 +132,9 @@ static void show_backtrace(struct task_struct *task, const struct pt_regs *regs)
132 unsigned long ra = regs->regs[31]; 132 unsigned long ra = regs->regs[31];
133 unsigned long pc = regs->cp0_epc; 133 unsigned long pc = regs->cp0_epc;
134 134
135 if (!task)
136 task = current;
137
135 if (raw_show_trace || !__kernel_text_address(pc)) { 138 if (raw_show_trace || !__kernel_text_address(pc)) {
136 show_raw_backtrace(sp); 139 show_raw_backtrace(sp);
137 return; 140 return;
@@ -1249,6 +1252,7 @@ static inline void parity_protection_init(void)
1249 break; 1252 break;
1250 1253
1251 case CPU_5KC: 1254 case CPU_5KC:
1255 case CPU_5KE:
1252 write_c0_ecc(0x80000000); 1256 write_c0_ecc(0x80000000);
1253 back_to_back_c0_hazard(); 1257 back_to_back_c0_hazard();
1254 /* Set the PE bit (bit 31) in the c0_errctl register. */ 1258 /* Set the PE bit (bit 31) in the c0_errctl register. */
@@ -1498,6 +1502,7 @@ extern void flush_tlb_handlers(void);
1498 * Timer interrupt 1502 * Timer interrupt
1499 */ 1503 */
1500int cp0_compare_irq; 1504int cp0_compare_irq;
1505EXPORT_SYMBOL_GPL(cp0_compare_irq);
1501int cp0_compare_irq_shift; 1506int cp0_compare_irq_shift;
1502 1507
1503/* 1508/*
@@ -1597,7 +1602,7 @@ void __cpuinit per_cpu_trap_init(bool is_boot_cpu)
1597 cp0_perfcount_irq = -1; 1602 cp0_perfcount_irq = -1;
1598 } else { 1603 } else {
1599 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ; 1604 cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
1600 cp0_compare_irq_shift = cp0_compare_irq; 1605 cp0_compare_irq_shift = CP0_LEGACY_PERFCNT_IRQ;
1601 cp0_perfcount_irq = -1; 1606 cp0_perfcount_irq = -1;
1602 } 1607 }
1603 1608
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index 924da5eb7031..df243a64f430 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -1,5 +1,6 @@
1#include <asm/asm-offsets.h> 1#include <asm/asm-offsets.h>
2#include <asm/page.h> 2#include <asm/page.h>
3#include <asm/thread_info.h>
3#include <asm-generic/vmlinux.lds.h> 4#include <asm-generic/vmlinux.lds.h>
4 5
5#undef mips 6#undef mips
@@ -72,7 +73,7 @@ SECTIONS
72 .data : { /* Data */ 73 .data : { /* Data */
73 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ 74 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
74 75
75 INIT_TASK_DATA(PAGE_SIZE) 76 INIT_TASK_DATA(THREAD_SIZE)
76 NOSAVE_DATA 77 NOSAVE_DATA
77 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 78 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
78 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) 79 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 4aa20280613e..fd6203f14f1f 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -3,8 +3,8 @@
3# 3#
4 4
5obj-y += cache.o dma-default.o extable.o fault.o \ 5obj-y += cache.o dma-default.o extable.o fault.o \
6 gup.o init.o mmap.o page.o tlbex.o \ 6 gup.o init.o mmap.o page.o page-funcs.o \
7 tlbex-fault.o uasm.o 7 tlbex.o tlbex-fault.o uasm.o
8 8
9obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o 9obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o
10obj-$(CONFIG_64BIT) += pgtable-64.o 10obj-$(CONFIG_64BIT) += pgtable-64.o
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 5109be96d98d..f092c265dc63 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -977,7 +977,7 @@ static void __cpuinit probe_pcache(void)
977 c->icache.linesz = 2 << lsize; 977 c->icache.linesz = 2 << lsize;
978 else 978 else
979 c->icache.linesz = lsize; 979 c->icache.linesz = lsize;
980 c->icache.sets = 64 << ((config1 >> 22) & 7); 980 c->icache.sets = 32 << (((config1 >> 22) + 1) & 7);
981 c->icache.ways = 1 + ((config1 >> 16) & 7); 981 c->icache.ways = 1 + ((config1 >> 16) & 7);
982 982
983 icache_size = c->icache.sets * 983 icache_size = c->icache.sets *
@@ -997,7 +997,7 @@ static void __cpuinit probe_pcache(void)
997 c->dcache.linesz = 2 << lsize; 997 c->dcache.linesz = 2 << lsize;
998 else 998 else
999 c->dcache.linesz= lsize; 999 c->dcache.linesz= lsize;
1000 c->dcache.sets = 64 << ((config1 >> 13) & 7); 1000 c->dcache.sets = 32 << (((config1 >> 13) + 1) & 7);
1001 c->dcache.ways = 1 + ((config1 >> 7) & 7); 1001 c->dcache.ways = 1 + ((config1 >> 7) & 7);
1002 1002
1003 dcache_size = c->dcache.sets * 1003 dcache_size = c->dcache.sets *
@@ -1051,6 +1051,7 @@ static void __cpuinit probe_pcache(void)
1051 case CPU_R14000: 1051 case CPU_R14000:
1052 break; 1052 break;
1053 1053
1054 case CPU_M14KC:
1054 case CPU_24K: 1055 case CPU_24K:
1055 case CPU_34K: 1056 case CPU_34K:
1056 case CPU_74K: 1057 case CPU_74K:
diff --git a/arch/mips/mm/page-funcs.S b/arch/mips/mm/page-funcs.S
new file mode 100644
index 000000000000..48a6b38ff13e
--- /dev/null
+++ b/arch/mips/mm/page-funcs.S
@@ -0,0 +1,50 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Micro-assembler generated clear_page/copy_page functions.
7 *
8 * Copyright (C) 2012 MIPS Technologies, Inc.
9 * Copyright (C) 2012 Ralf Baechle <ralf@linux-mips.org>
10 */
11#include <asm/asm.h>
12#include <asm/regdef.h>
13
14#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
15#define cpu_clear_page_function_name clear_page_cpu
16#define cpu_copy_page_function_name copy_page_cpu
17#else
18#define cpu_clear_page_function_name clear_page
19#define cpu_copy_page_function_name copy_page
20#endif
21
22/*
23 * Maximum sizes:
24 *
25 * R4000 128 bytes S-cache: 0x058 bytes
26 * R4600 v1.7: 0x05c bytes
27 * R4600 v2.0: 0x060 bytes
28 * With prefetching, 16 word strides 0x120 bytes
29 */
30EXPORT(__clear_page_start)
31LEAF(cpu_clear_page_function_name)
321: j 1b /* Dummy, will be replaced. */
33 .space 288
34END(cpu_clear_page_function_name)
35EXPORT(__clear_page_end)
36
37/*
38 * Maximum sizes:
39 *
40 * R4000 128 bytes S-cache: 0x11c bytes
41 * R4600 v1.7: 0x080 bytes
42 * R4600 v2.0: 0x07c bytes
43 * With prefetching, 16 word strides 0x540 bytes
44 */
45EXPORT(__copy_page_start)
46LEAF(cpu_copy_page_function_name)
471: j 1b /* Dummy, will be replaced. */
48 .space 1344
49END(cpu_copy_page_function_name)
50EXPORT(__copy_page_end)
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index cc0b626858b3..98f530e18216 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -6,6 +6,7 @@
6 * Copyright (C) 2003, 04, 05 Ralf Baechle (ralf@linux-mips.org) 6 * Copyright (C) 2003, 04, 05 Ralf Baechle (ralf@linux-mips.org)
7 * Copyright (C) 2007 Maciej W. Rozycki 7 * Copyright (C) 2007 Maciej W. Rozycki
8 * Copyright (C) 2008 Thiemo Seufer 8 * Copyright (C) 2008 Thiemo Seufer
9 * Copyright (C) 2012 MIPS Technologies, Inc.
9 */ 10 */
10#include <linux/init.h> 11#include <linux/init.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
@@ -71,45 +72,6 @@ static struct uasm_reloc __cpuinitdata relocs[5];
71#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010) 72#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
72#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020) 73#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
73 74
74/*
75 * Maximum sizes:
76 *
77 * R4000 128 bytes S-cache: 0x058 bytes
78 * R4600 v1.7: 0x05c bytes
79 * R4600 v2.0: 0x060 bytes
80 * With prefetching, 16 word strides 0x120 bytes
81 */
82
83static u32 clear_page_array[0x120 / 4];
84
85#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
86void clear_page_cpu(void *page) __attribute__((alias("clear_page_array")));
87#else
88void clear_page(void *page) __attribute__((alias("clear_page_array")));
89#endif
90
91EXPORT_SYMBOL(clear_page);
92
93/*
94 * Maximum sizes:
95 *
96 * R4000 128 bytes S-cache: 0x11c bytes
97 * R4600 v1.7: 0x080 bytes
98 * R4600 v2.0: 0x07c bytes
99 * With prefetching, 16 word strides 0x540 bytes
100 */
101static u32 copy_page_array[0x540 / 4];
102
103#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
104void
105copy_page_cpu(void *to, void *from) __attribute__((alias("copy_page_array")));
106#else
107void copy_page(void *to, void *from) __attribute__((alias("copy_page_array")));
108#endif
109
110EXPORT_SYMBOL(copy_page);
111
112
113static int pref_bias_clear_store __cpuinitdata; 75static int pref_bias_clear_store __cpuinitdata;
114static int pref_bias_copy_load __cpuinitdata; 76static int pref_bias_copy_load __cpuinitdata;
115static int pref_bias_copy_store __cpuinitdata; 77static int pref_bias_copy_store __cpuinitdata;
@@ -282,10 +244,15 @@ static inline void __cpuinit build_clear_pref(u32 **buf, int off)
282 } 244 }
283} 245}
284 246
247extern u32 __clear_page_start;
248extern u32 __clear_page_end;
249extern u32 __copy_page_start;
250extern u32 __copy_page_end;
251
285void __cpuinit build_clear_page(void) 252void __cpuinit build_clear_page(void)
286{ 253{
287 int off; 254 int off;
288 u32 *buf = (u32 *)&clear_page_array; 255 u32 *buf = &__clear_page_start;
289 struct uasm_label *l = labels; 256 struct uasm_label *l = labels;
290 struct uasm_reloc *r = relocs; 257 struct uasm_reloc *r = relocs;
291 int i; 258 int i;
@@ -356,17 +323,17 @@ void __cpuinit build_clear_page(void)
356 uasm_i_jr(&buf, RA); 323 uasm_i_jr(&buf, RA);
357 uasm_i_nop(&buf); 324 uasm_i_nop(&buf);
358 325
359 BUG_ON(buf > clear_page_array + ARRAY_SIZE(clear_page_array)); 326 BUG_ON(buf > &__clear_page_end);
360 327
361 uasm_resolve_relocs(relocs, labels); 328 uasm_resolve_relocs(relocs, labels);
362 329
363 pr_debug("Synthesized clear page handler (%u instructions).\n", 330 pr_debug("Synthesized clear page handler (%u instructions).\n",
364 (u32)(buf - clear_page_array)); 331 (u32)(buf - &__clear_page_start));
365 332
366 pr_debug("\t.set push\n"); 333 pr_debug("\t.set push\n");
367 pr_debug("\t.set noreorder\n"); 334 pr_debug("\t.set noreorder\n");
368 for (i = 0; i < (buf - clear_page_array); i++) 335 for (i = 0; i < (buf - &__clear_page_start); i++)
369 pr_debug("\t.word 0x%08x\n", clear_page_array[i]); 336 pr_debug("\t.word 0x%08x\n", (&__clear_page_start)[i]);
370 pr_debug("\t.set pop\n"); 337 pr_debug("\t.set pop\n");
371} 338}
372 339
@@ -427,7 +394,7 @@ static inline void build_copy_store_pref(u32 **buf, int off)
427void __cpuinit build_copy_page(void) 394void __cpuinit build_copy_page(void)
428{ 395{
429 int off; 396 int off;
430 u32 *buf = (u32 *)&copy_page_array; 397 u32 *buf = &__copy_page_start;
431 struct uasm_label *l = labels; 398 struct uasm_label *l = labels;
432 struct uasm_reloc *r = relocs; 399 struct uasm_reloc *r = relocs;
433 int i; 400 int i;
@@ -595,21 +562,23 @@ void __cpuinit build_copy_page(void)
595 uasm_i_jr(&buf, RA); 562 uasm_i_jr(&buf, RA);
596 uasm_i_nop(&buf); 563 uasm_i_nop(&buf);
597 564
598 BUG_ON(buf > copy_page_array + ARRAY_SIZE(copy_page_array)); 565 BUG_ON(buf > &__copy_page_end);
599 566
600 uasm_resolve_relocs(relocs, labels); 567 uasm_resolve_relocs(relocs, labels);
601 568
602 pr_debug("Synthesized copy page handler (%u instructions).\n", 569 pr_debug("Synthesized copy page handler (%u instructions).\n",
603 (u32)(buf - copy_page_array)); 570 (u32)(buf - &__copy_page_start));
604 571
605 pr_debug("\t.set push\n"); 572 pr_debug("\t.set push\n");
606 pr_debug("\t.set noreorder\n"); 573 pr_debug("\t.set noreorder\n");
607 for (i = 0; i < (buf - copy_page_array); i++) 574 for (i = 0; i < (buf - &__copy_page_start); i++)
608 pr_debug("\t.word 0x%08x\n", copy_page_array[i]); 575 pr_debug("\t.word 0x%08x\n", (&__copy_page_start)[i]);
609 pr_debug("\t.set pop\n"); 576 pr_debug("\t.set pop\n");
610} 577}
611 578
612#ifdef CONFIG_SIBYTE_DMA_PAGEOPS 579#ifdef CONFIG_SIBYTE_DMA_PAGEOPS
580extern void clear_page_cpu(void *page);
581extern void copy_page_cpu(void *to, void *from);
613 582
614/* 583/*
615 * Pad descriptors to cacheline, since each is exclusively owned by a 584 * Pad descriptors to cacheline, since each is exclusively owned by a
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 0bc485b3cd60..03eb0ef91580 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -9,6 +9,7 @@
9 * Copyright (C) 2005, 2007, 2008, 2009 Maciej W. Rozycki 9 * Copyright (C) 2005, 2007, 2008, 2009 Maciej W. Rozycki
10 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org) 10 * Copyright (C) 2006 Ralf Baechle (ralf@linux-mips.org)
11 * Copyright (C) 2008, 2009 Cavium Networks, Inc. 11 * Copyright (C) 2008, 2009 Cavium Networks, Inc.
12 * Copyright (C) 2011 MIPS Technologies, Inc.
12 * 13 *
13 * ... and the days got worse and worse and now you see 14 * ... and the days got worse and worse and now you see
14 * I've gone completly out of my mind. 15 * I've gone completly out of my mind.
@@ -494,6 +495,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
494 case CPU_R14000: 495 case CPU_R14000:
495 case CPU_4KC: 496 case CPU_4KC:
496 case CPU_4KEC: 497 case CPU_4KEC:
498 case CPU_M14KC:
497 case CPU_SB1: 499 case CPU_SB1:
498 case CPU_SB1A: 500 case CPU_SB1A:
499 case CPU_4KSC: 501 case CPU_4KSC:
diff --git a/arch/mips/mti-malta/malta-pci.c b/arch/mips/mti-malta/malta-pci.c
index bf80921f2f56..284dea54faf5 100644
--- a/arch/mips/mti-malta/malta-pci.c
+++ b/arch/mips/mti-malta/malta-pci.c
@@ -241,8 +241,9 @@ void __init mips_pcibios_init(void)
241 return; 241 return;
242 } 242 }
243 243
244 if (controller->io_resource->start < 0x00001000UL) /* FIXME */ 244 /* Change start address to avoid conflicts with ACPI and SMB devices */
245 controller->io_resource->start = 0x00001000UL; 245 if (controller->io_resource->start < 0x00002000UL)
246 controller->io_resource->start = 0x00002000UL;
246 247
247 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */ 248 iomem_resource.end &= 0xfffffffffULL; /* 64 GB */
248 ioport_resource.end = controller->io_resource->end; 249 ioport_resource.end = controller->io_resource->end;
@@ -253,7 +254,7 @@ void __init mips_pcibios_init(void)
253} 254}
254 255
255/* Enable PCI 2.1 compatibility in PIIX4 */ 256/* Enable PCI 2.1 compatibility in PIIX4 */
256static void __init quirk_dlcsetup(struct pci_dev *dev) 257static void __devinit quirk_dlcsetup(struct pci_dev *dev)
257{ 258{
258 u8 odlc, ndlc; 259 u8 odlc, ndlc;
259 (void) pci_read_config_byte(dev, 0x82, &odlc); 260 (void) pci_read_config_byte(dev, 0x82, &odlc);
diff --git a/arch/mips/mti-malta/malta-setup.c b/arch/mips/mti-malta/malta-setup.c
index b7f37d4982fa..2e28f653f66d 100644
--- a/arch/mips/mti-malta/malta-setup.c
+++ b/arch/mips/mti-malta/malta-setup.c
@@ -111,7 +111,7 @@ static void __init pci_clock_check(void)
111 unsigned int __iomem *jmpr_p = 111 unsigned int __iomem *jmpr_p =
112 (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int)); 112 (unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
113 int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07; 113 int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
114 static const int pciclocks[] __initdata = { 114 static const int pciclocks[] __initconst = {
115 33, 20, 25, 30, 12, 16, 37, 10 115 33, 20, 25, 30, 12, 16, 37, 10
116 }; 116 };
117 int pciclock = pciclocks[jmpr]; 117 int pciclock = pciclocks[jmpr];
diff --git a/arch/mips/netlogic/xlp/setup.c b/arch/mips/netlogic/xlp/setup.c
index acb677a1227c..b3df7c2aad1e 100644
--- a/arch/mips/netlogic/xlp/setup.c
+++ b/arch/mips/netlogic/xlp/setup.c
@@ -82,8 +82,10 @@ void __init prom_free_prom_memory(void)
82 82
83void xlp_mmu_init(void) 83void xlp_mmu_init(void)
84{ 84{
85 /* enable extended TLB and Large Fixed TLB */
85 write_c0_config6(read_c0_config6() | 0x24); 86 write_c0_config6(read_c0_config6() | 0x24);
86 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; 87
88 /* set page mask of Fixed TLB in config7 */
87 write_c0_config7(PM_DEFAULT_MASK >> 89 write_c0_config7(PM_DEFAULT_MASK >>
88 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2))); 90 (13 + (ffz(PM_DEFAULT_MASK >> 13) / 2)));
89} 91}
@@ -100,6 +102,10 @@ void __init prom_init(void)
100 nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1)); 102 nlm_common_ebase = read_c0_ebase() & (~((1 << 12) - 1));
101#ifdef CONFIG_SMP 103#ifdef CONFIG_SMP
102 nlm_wakeup_secondary_cpus(0xffffffff); 104 nlm_wakeup_secondary_cpus(0xffffffff);
105
106 /* update TLB size after waking up threads */
107 current_cpu_data.tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1;
108
103 register_smp_ops(&nlm_smp_ops); 109 register_smp_ops(&nlm_smp_ops);
104#endif 110#endif
105} 111}
diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c
index d1f2d4c52d42..b6e378211a2c 100644
--- a/arch/mips/oprofile/common.c
+++ b/arch/mips/oprofile/common.c
@@ -78,6 +78,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
78 78
79 switch (current_cpu_type()) { 79 switch (current_cpu_type()) {
80 case CPU_5KC: 80 case CPU_5KC:
81 case CPU_M14KC:
81 case CPU_20KC: 82 case CPU_20KC:
82 case CPU_24K: 83 case CPU_24K:
83 case CPU_25KF: 84 case CPU_25KF:
diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c
index baba3bcaa3c2..4d80a856048d 100644
--- a/arch/mips/oprofile/op_model_mipsxx.c
+++ b/arch/mips/oprofile/op_model_mipsxx.c
@@ -322,6 +322,10 @@ static int __init mipsxx_init(void)
322 322
323 op_model_mipsxx_ops.num_counters = counters; 323 op_model_mipsxx_ops.num_counters = counters;
324 switch (current_cpu_type()) { 324 switch (current_cpu_type()) {
325 case CPU_M14KC:
326 op_model_mipsxx_ops.cpu_type = "mips/M14Kc";
327 break;
328
325 case CPU_20KC: 329 case CPU_20KC:
326 op_model_mipsxx_ops.cpu_type = "mips/20K"; 330 op_model_mipsxx_ops.cpu_type = "mips/20K";
327 break; 331 break;
diff --git a/arch/mips/pci/fixup-fuloong2e.c b/arch/mips/pci/fixup-fuloong2e.c
index d5d4c018fb04..0857ab8c3919 100644
--- a/arch/mips/pci/fixup-fuloong2e.c
+++ b/arch/mips/pci/fixup-fuloong2e.c
@@ -48,7 +48,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
48 return 0; 48 return 0;
49} 49}
50 50
51static void __init loongson2e_nec_fixup(struct pci_dev *pdev) 51static void __devinit loongson2e_nec_fixup(struct pci_dev *pdev)
52{ 52{
53 unsigned int val; 53 unsigned int val;
54 54
@@ -60,7 +60,7 @@ static void __init loongson2e_nec_fixup(struct pci_dev *pdev)
60 pci_write_config_dword(pdev, 0xe4, 1 << 5); 60 pci_write_config_dword(pdev, 0xe4, 1 << 5);
61} 61}
62 62
63static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev) 63static void __devinit loongson2e_686b_func0_fixup(struct pci_dev *pdev)
64{ 64{
65 unsigned char c; 65 unsigned char c;
66 66
@@ -135,7 +135,7 @@ static void __init loongson2e_686b_func0_fixup(struct pci_dev *pdev)
135 printk(KERN_INFO"via686b fix: ISA bridge done\n"); 135 printk(KERN_INFO"via686b fix: ISA bridge done\n");
136} 136}
137 137
138static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev) 138static void __devinit loongson2e_686b_func1_fixup(struct pci_dev *pdev)
139{ 139{
140 printk(KERN_INFO"via686b fix: IDE\n"); 140 printk(KERN_INFO"via686b fix: IDE\n");
141 141
@@ -168,19 +168,19 @@ static void __init loongson2e_686b_func1_fixup(struct pci_dev *pdev)
168 printk(KERN_INFO"via686b fix: IDE done\n"); 168 printk(KERN_INFO"via686b fix: IDE done\n");
169} 169}
170 170
171static void __init loongson2e_686b_func2_fixup(struct pci_dev *pdev) 171static void __devinit loongson2e_686b_func2_fixup(struct pci_dev *pdev)
172{ 172{
173 /* irq routing */ 173 /* irq routing */
174 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10); 174 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 10);
175} 175}
176 176
177static void __init loongson2e_686b_func3_fixup(struct pci_dev *pdev) 177static void __devinit loongson2e_686b_func3_fixup(struct pci_dev *pdev)
178{ 178{
179 /* irq routing */ 179 /* irq routing */
180 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11); 180 pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, 11);
181} 181}
182 182
183static void __init loongson2e_686b_func5_fixup(struct pci_dev *pdev) 183static void __devinit loongson2e_686b_func5_fixup(struct pci_dev *pdev)
184{ 184{
185 unsigned int val; 185 unsigned int val;
186 unsigned char c; 186 unsigned char c;
diff --git a/arch/mips/pci/fixup-lemote2f.c b/arch/mips/pci/fixup-lemote2f.c
index 4b9768d5d729..a7b917dcf604 100644
--- a/arch/mips/pci/fixup-lemote2f.c
+++ b/arch/mips/pci/fixup-lemote2f.c
@@ -96,21 +96,21 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
96} 96}
97 97
98/* CS5536 SPEC. fixup */ 98/* CS5536 SPEC. fixup */
99static void __init loongson_cs5536_isa_fixup(struct pci_dev *pdev) 99static void __devinit loongson_cs5536_isa_fixup(struct pci_dev *pdev)
100{ 100{
101 /* the uart1 and uart2 interrupt in PIC is enabled as default */ 101 /* the uart1 and uart2 interrupt in PIC is enabled as default */
102 pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1); 102 pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1);
103 pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1); 103 pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1);
104} 104}
105 105
106static void __init loongson_cs5536_ide_fixup(struct pci_dev *pdev) 106static void __devinit loongson_cs5536_ide_fixup(struct pci_dev *pdev)
107{ 107{
108 /* setting the mutex pin as IDE function */ 108 /* setting the mutex pin as IDE function */
109 pci_write_config_dword(pdev, PCI_IDE_CFG_REG, 109 pci_write_config_dword(pdev, PCI_IDE_CFG_REG,
110 CS5536_IDE_FLASH_SIGNATURE); 110 CS5536_IDE_FLASH_SIGNATURE);
111} 111}
112 112
113static void __init loongson_cs5536_acc_fixup(struct pci_dev *pdev) 113static void __devinit loongson_cs5536_acc_fixup(struct pci_dev *pdev)
114{ 114{
115 /* enable the AUDIO interrupt in PIC */ 115 /* enable the AUDIO interrupt in PIC */
116 pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1); 116 pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1);
@@ -118,14 +118,14 @@ static void __init loongson_cs5536_acc_fixup(struct pci_dev *pdev)
118 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0); 118 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0);
119} 119}
120 120
121static void __init loongson_cs5536_ohci_fixup(struct pci_dev *pdev) 121static void __devinit loongson_cs5536_ohci_fixup(struct pci_dev *pdev)
122{ 122{
123 /* enable the OHCI interrupt in PIC */ 123 /* enable the OHCI interrupt in PIC */
124 /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */ 124 /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */
125 pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1); 125 pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1);
126} 126}
127 127
128static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev) 128static void __devinit loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
129{ 129{
130 u32 hi, lo; 130 u32 hi, lo;
131 131
@@ -137,7 +137,7 @@ static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev)
137 pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000); 137 pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000);
138} 138}
139 139
140static void __init loongson_nec_fixup(struct pci_dev *pdev) 140static void __devinit loongson_nec_fixup(struct pci_dev *pdev)
141{ 141{
142 unsigned int val; 142 unsigned int val;
143 143
diff --git a/arch/mips/pci/fixup-malta.c b/arch/mips/pci/fixup-malta.c
index 0f48498bc231..70073c98ed32 100644
--- a/arch/mips/pci/fixup-malta.c
+++ b/arch/mips/pci/fixup-malta.c
@@ -49,10 +49,10 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
49 return 0; 49 return 0;
50} 50}
51 51
52static void __init malta_piix_func0_fixup(struct pci_dev *pdev) 52static void __devinit malta_piix_func0_fixup(struct pci_dev *pdev)
53{ 53{
54 unsigned char reg_val; 54 unsigned char reg_val;
55 static int piixirqmap[16] __initdata = { /* PIIX PIRQC[A:D] irq mappings */ 55 static int piixirqmap[16] __devinitdata = { /* PIIX PIRQC[A:D] irq mappings */
56 0, 0, 0, 3, 56 0, 0, 0, 3,
57 4, 5, 6, 7, 57 4, 5, 6, 7,
58 0, 9, 10, 11, 58 0, 9, 10, 11,
@@ -83,7 +83,7 @@ static void __init malta_piix_func0_fixup(struct pci_dev *pdev)
83DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0, 83DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
84 malta_piix_func0_fixup); 84 malta_piix_func0_fixup);
85 85
86static void __init malta_piix_func1_fixup(struct pci_dev *pdev) 86static void __devinit malta_piix_func1_fixup(struct pci_dev *pdev)
87{ 87{
88 unsigned char reg_val; 88 unsigned char reg_val;
89 89
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c
index e08f49cb6875..8e4f8288eca2 100644
--- a/arch/mips/pci/fixup-mpc30x.c
+++ b/arch/mips/pci/fixup-mpc30x.c
@@ -22,13 +22,13 @@
22 22
23#include <asm/vr41xx/mpc30x.h> 23#include <asm/vr41xx/mpc30x.h>
24 24
25static const int internal_func_irqs[] __initdata = { 25static const int internal_func_irqs[] __initconst = {
26 VRC4173_CASCADE_IRQ, 26 VRC4173_CASCADE_IRQ,
27 VRC4173_AC97_IRQ, 27 VRC4173_AC97_IRQ,
28 VRC4173_USB_IRQ, 28 VRC4173_USB_IRQ,
29}; 29};
30 30
31static const int irq_tab_mpc30x[] __initdata = { 31static const int irq_tab_mpc30x[] __initconst = {
32 [12] = VRC4173_PCMCIA1_IRQ, 32 [12] = VRC4173_PCMCIA1_IRQ,
33 [13] = VRC4173_PCMCIA2_IRQ, 33 [13] = VRC4173_PCMCIA2_IRQ,
34 [29] = MQ200_IRQ, 34 [29] = MQ200_IRQ,
diff --git a/arch/mips/pci/fixup-sb1250.c b/arch/mips/pci/fixup-sb1250.c
index f0bb9146e6c0..d02900a72916 100644
--- a/arch/mips/pci/fixup-sb1250.c
+++ b/arch/mips/pci/fixup-sb1250.c
@@ -15,7 +15,7 @@
15 * Set the BCM1250, etc. PCI host bridge's TRDY timeout 15 * Set the BCM1250, etc. PCI host bridge's TRDY timeout
16 * to the finite max. 16 * to the finite max.
17 */ 17 */
18static void __init quirk_sb1250_pci(struct pci_dev *dev) 18static void __devinit quirk_sb1250_pci(struct pci_dev *dev)
19{ 19{
20 pci_write_config_byte(dev, 0x40, 0xff); 20 pci_write_config_byte(dev, 0x40, 0xff);
21} 21}
@@ -25,7 +25,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI,
25/* 25/*
26 * The BCM1250, etc. PCI/HT bridge reports as a host bridge. 26 * The BCM1250, etc. PCI/HT bridge reports as a host bridge.
27 */ 27 */
28static void __init quirk_sb1250_ht(struct pci_dev *dev) 28static void __devinit quirk_sb1250_ht(struct pci_dev *dev)
29{ 29{
30 dev->class = PCI_CLASS_BRIDGE_PCI << 8; 30 dev->class = PCI_CLASS_BRIDGE_PCI << 8;
31} 31}
@@ -35,7 +35,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_HT,
35/* 35/*
36 * Set the SP1011 HT/PCI bridge's TRDY timeout to the finite max. 36 * Set the SP1011 HT/PCI bridge's TRDY timeout to the finite max.
37 */ 37 */
38static void __init quirk_sp1011(struct pci_dev *dev) 38static void __devinit quirk_sp1011(struct pci_dev *dev)
39{ 39{
40 pci_write_config_byte(dev, 0x64, 0xff); 40 pci_write_config_byte(dev, 0x64, 0xff);
41} 41}
diff --git a/arch/mips/pci/ops-tx4927.c b/arch/mips/pci/ops-tx4927.c
index a1e7e6d80c8c..bc13e29d2bb3 100644
--- a/arch/mips/pci/ops-tx4927.c
+++ b/arch/mips/pci/ops-tx4927.c
@@ -495,7 +495,7 @@ irqreturn_t tx4927_pcierr_interrupt(int irq, void *dev_id)
495} 495}
496 496
497#ifdef CONFIG_TOSHIBA_FPCIB0 497#ifdef CONFIG_TOSHIBA_FPCIB0
498static void __init tx4927_quirk_slc90e66_bridge(struct pci_dev *dev) 498static void __devinit tx4927_quirk_slc90e66_bridge(struct pci_dev *dev)
499{ 499{
500 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus); 500 struct tx4927_pcic_reg __iomem *pcicptr = pci_bus_to_pcicptr(dev->bus);
501 501
diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c
index 0fbe4c0c170a..fdc24440294c 100644
--- a/arch/mips/pci/pci-ip27.c
+++ b/arch/mips/pci/pci-ip27.c
@@ -212,7 +212,7 @@ static inline void pci_enable_swapping(struct pci_dev *dev)
212 bridge->b_widget.w_tflush; /* Flush */ 212 bridge->b_widget.w_tflush; /* Flush */
213} 213}
214 214
215static void __init pci_fixup_ioc3(struct pci_dev *d) 215static void __devinit pci_fixup_ioc3(struct pci_dev *d)
216{ 216{
217 pci_disable_swapping(d); 217 pci_disable_swapping(d);
218} 218}
diff --git a/arch/mips/pci/pci-lantiq.c b/arch/mips/pci/pci-lantiq.c
index ea453532a33c..075d87acd12a 100644
--- a/arch/mips/pci/pci-lantiq.c
+++ b/arch/mips/pci/pci-lantiq.c
@@ -129,7 +129,7 @@ static int __devinit ltq_pci_startup(struct platform_device *pdev)
129 129
130 /* setup reset gpio used by pci */ 130 /* setup reset gpio used by pci */
131 reset_gpio = of_get_named_gpio(node, "gpio-reset", 0); 131 reset_gpio = of_get_named_gpio(node, "gpio-reset", 0);
132 if (reset_gpio > 0) 132 if (gpio_is_valid(reset_gpio))
133 devm_gpio_request(&pdev->dev, reset_gpio, "pci-reset"); 133 devm_gpio_request(&pdev->dev, reset_gpio, "pci-reset");
134 134
135 /* enable auto-switching between PCI and EBU */ 135 /* enable auto-switching between PCI and EBU */
@@ -192,7 +192,7 @@ static int __devinit ltq_pci_startup(struct platform_device *pdev)
192 ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN); 192 ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_IEN) | 0x10, LTQ_EBU_PCC_IEN);
193 193
194 /* toggle reset pin */ 194 /* toggle reset pin */
195 if (reset_gpio > 0) { 195 if (gpio_is_valid(reset_gpio)) {
196 __gpio_set_value(reset_gpio, 0); 196 __gpio_set_value(reset_gpio, 0);
197 wmb(); 197 wmb();
198 mdelay(1); 198 mdelay(1);
diff --git a/arch/mips/pci/pci-xlr.c b/arch/mips/pci/pci-xlr.c
index 1644805a6730..172af1cd5867 100644
--- a/arch/mips/pci/pci-xlr.c
+++ b/arch/mips/pci/pci-xlr.c
@@ -41,6 +41,7 @@
41#include <linux/irq.h> 41#include <linux/irq.h>
42#include <linux/irqdesc.h> 42#include <linux/irqdesc.h>
43#include <linux/console.h> 43#include <linux/console.h>
44#include <linux/pci_regs.h>
44 45
45#include <asm/io.h> 46#include <asm/io.h>
46 47
@@ -156,35 +157,55 @@ struct pci_controller nlm_pci_controller = {
156 .io_offset = 0x00000000UL, 157 .io_offset = 0x00000000UL,
157}; 158};
158 159
160/*
161 * The top level PCIe links on the XLS PCIe controller appear as
162 * bridges. Given a device, this function finds which link it is
163 * on.
164 */
165static struct pci_dev *xls_get_pcie_link(const struct pci_dev *dev)
166{
167 struct pci_bus *bus, *p;
168
169 /* Find the bridge on bus 0 */
170 bus = dev->bus;
171 for (p = bus->parent; p && p->number != 0; p = p->parent)
172 bus = p;
173
174 return p ? bus->self : NULL;
175}
176
159static int get_irq_vector(const struct pci_dev *dev) 177static int get_irq_vector(const struct pci_dev *dev)
160{ 178{
179 struct pci_dev *lnk;
180
161 if (!nlm_chip_is_xls()) 181 if (!nlm_chip_is_xls())
162 return PIC_PCIX_IRQ; /* for XLR just one IRQ*/ 182 return PIC_PCIX_IRQ; /* for XLR just one IRQ */
163 183
164 /* 184 /*
165 * For XLS PCIe, there is an IRQ per Link, find out which 185 * For XLS PCIe, there is an IRQ per Link, find out which
166 * link the device is on to assign interrupts 186 * link the device is on to assign interrupts
167 */ 187 */
168 if (dev->bus->self == NULL) 188 lnk = xls_get_pcie_link(dev);
189 if (lnk == NULL)
169 return 0; 190 return 0;
170 191
171 switch (dev->bus->self->devfn) { 192 switch (PCI_SLOT(lnk->devfn)) {
172 case 0x0: 193 case 0:
173 return PIC_PCIE_LINK0_IRQ; 194 return PIC_PCIE_LINK0_IRQ;
174 case 0x8: 195 case 1:
175 return PIC_PCIE_LINK1_IRQ; 196 return PIC_PCIE_LINK1_IRQ;
176 case 0x10: 197 case 2:
177 if (nlm_chip_is_xls_b()) 198 if (nlm_chip_is_xls_b())
178 return PIC_PCIE_XLSB0_LINK2_IRQ; 199 return PIC_PCIE_XLSB0_LINK2_IRQ;
179 else 200 else
180 return PIC_PCIE_LINK2_IRQ; 201 return PIC_PCIE_LINK2_IRQ;
181 case 0x18: 202 case 3:
182 if (nlm_chip_is_xls_b()) 203 if (nlm_chip_is_xls_b())
183 return PIC_PCIE_XLSB0_LINK3_IRQ; 204 return PIC_PCIE_XLSB0_LINK3_IRQ;
184 else 205 else
185 return PIC_PCIE_LINK3_IRQ; 206 return PIC_PCIE_LINK3_IRQ;
186 } 207 }
187 WARN(1, "Unexpected devfn %d\n", dev->bus->self->devfn); 208 WARN(1, "Unexpected devfn %d\n", lnk->devfn);
188 return 0; 209 return 0;
189} 210}
190 211
@@ -202,7 +223,27 @@ void arch_teardown_msi_irq(unsigned int irq)
202int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc) 223int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
203{ 224{
204 struct msi_msg msg; 225 struct msi_msg msg;
226 struct pci_dev *lnk;
205 int irq, ret; 227 int irq, ret;
228 u16 val;
229
230 /* MSI not supported on XLR */
231 if (!nlm_chip_is_xls())
232 return 1;
233
234 /*
235 * Enable MSI on the XLS PCIe controller bridge which was disabled
236 * at enumeration, the bridge MSI capability is at 0x50
237 */
238 lnk = xls_get_pcie_link(dev);
239 if (lnk == NULL)
240 return 1;
241
242 pci_read_config_word(lnk, 0x50 + PCI_MSI_FLAGS, &val);
243 if ((val & PCI_MSI_FLAGS_ENABLE) == 0) {
244 val |= PCI_MSI_FLAGS_ENABLE;
245 pci_write_config_word(lnk, 0x50 + PCI_MSI_FLAGS, val);
246 }
206 247
207 irq = get_irq_vector(dev); 248 irq = get_irq_vector(dev);
208 if (irq <= 0) 249 if (irq <= 0)
@@ -327,7 +368,7 @@ static int __init pcibios_init(void)
327 } 368 }
328 } else { 369 } else {
329 /* XLR PCI controller ACK */ 370 /* XLR PCI controller ACK */
330 irq_set_handler_data(PIC_PCIE_XLSB0_LINK3_IRQ, xlr_pci_ack); 371 irq_set_handler_data(PIC_PCIX_IRQ, xlr_pci_ack);
331 } 372 }
332 373
333 return 0; 374 return 0;
diff --git a/arch/mips/pmc-sierra/yosemite/smp.c b/arch/mips/pmc-sierra/yosemite/smp.c
index b71fae231049..5edab2bc6fc0 100644
--- a/arch/mips/pmc-sierra/yosemite/smp.c
+++ b/arch/mips/pmc-sierra/yosemite/smp.c
@@ -115,11 +115,11 @@ static void yos_send_ipi_mask(const struct cpumask *mask, unsigned int action)
115 */ 115 */
116static void __cpuinit yos_init_secondary(void) 116static void __cpuinit yos_init_secondary(void)
117{ 117{
118 set_c0_status(ST0_CO | ST0_IE | ST0_IM);
119} 118}
120 119
121static void __cpuinit yos_smp_finish(void) 120static void __cpuinit yos_smp_finish(void)
122{ 121{
122 set_c0_status(ST0_CO | ST0_IM | ST0_IE);
123} 123}
124 124
125/* Hook for after all CPUs are online */ 125/* Hook for after all CPUs are online */
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c
index 0a170e0ffeaa..7773f3d956b0 100644
--- a/arch/mips/powertv/asic/asic-calliope.c
+++ b/arch/mips/powertv/asic/asic-calliope.c
@@ -28,7 +28,7 @@
28 28
29#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x)) 29#define CALLIOPE_ADDR(x) (CALLIOPE_IO_BASE + (x))
30 30
31const struct register_map calliope_register_map __initdata = { 31const struct register_map calliope_register_map __initconst = {
32 .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)}, 32 .eic_slow0_strt_add = {.phys = CALLIOPE_ADDR(0x800000)},
33 .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)}, 33 .eic_cfg_bits = {.phys = CALLIOPE_ADDR(0x800038)},
34 .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)}, 34 .eic_ready_status = {.phys = CALLIOPE_ADDR(0x80004c)},
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c
index bbc0c122be5e..da076db7b7ed 100644
--- a/arch/mips/powertv/asic/asic-cronus.c
+++ b/arch/mips/powertv/asic/asic-cronus.c
@@ -28,7 +28,7 @@
28 28
29#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x)) 29#define CRONUS_ADDR(x) (CRONUS_IO_BASE + (x))
30 30
31const struct register_map cronus_register_map __initdata = { 31const struct register_map cronus_register_map __initconst = {
32 .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)}, 32 .eic_slow0_strt_add = {.phys = CRONUS_ADDR(0x000000)},
33 .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)}, 33 .eic_cfg_bits = {.phys = CRONUS_ADDR(0x000038)},
34 .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)}, 34 .eic_ready_status = {.phys = CRONUS_ADDR(0x00004C)},
diff --git a/arch/mips/powertv/asic/asic-gaia.c b/arch/mips/powertv/asic/asic-gaia.c
index 91dda682752c..47683b370e74 100644
--- a/arch/mips/powertv/asic/asic-gaia.c
+++ b/arch/mips/powertv/asic/asic-gaia.c
@@ -23,7 +23,7 @@
23#include <linux/init.h> 23#include <linux/init.h>
24#include <asm/mach-powertv/asic.h> 24#include <asm/mach-powertv/asic.h>
25 25
26const struct register_map gaia_register_map __initdata = { 26const struct register_map gaia_register_map __initconst = {
27 .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000}, 27 .eic_slow0_strt_add = {.phys = GAIA_IO_BASE + 0x000000},
28 .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038}, 28 .eic_cfg_bits = {.phys = GAIA_IO_BASE + 0x000038},
29 .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C}, 29 .eic_ready_status = {.phys = GAIA_IO_BASE + 0x00004C},
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c
index 4a05bb096476..6ff4b10f09da 100644
--- a/arch/mips/powertv/asic/asic-zeus.c
+++ b/arch/mips/powertv/asic/asic-zeus.c
@@ -28,7 +28,7 @@
28 28
29#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x)) 29#define ZEUS_ADDR(x) (ZEUS_IO_BASE + (x))
30 30
31const struct register_map zeus_register_map __initdata = { 31const struct register_map zeus_register_map __initconst = {
32 .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)}, 32 .eic_slow0_strt_add = {.phys = ZEUS_ADDR(0x000000)},
33 .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)}, 33 .eic_cfg_bits = {.phys = ZEUS_ADDR(0x000038)},
34 .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)}, 34 .eic_ready_status = {.phys = ZEUS_ADDR(0x00004c)},
diff --git a/arch/mips/txx9/generic/pci.c b/arch/mips/txx9/generic/pci.c
index 682efb0c108d..64eb71b15280 100644
--- a/arch/mips/txx9/generic/pci.c
+++ b/arch/mips/txx9/generic/pci.c
@@ -269,7 +269,7 @@ txx9_i8259_irq_setup(int irq)
269 return err; 269 return err;
270} 270}
271 271
272static void __init quirk_slc90e66_bridge(struct pci_dev *dev) 272static void __devinit quirk_slc90e66_bridge(struct pci_dev *dev)
273{ 273{
274 int irq; /* PCI/ISA Bridge interrupt */ 274 int irq; /* PCI/ISA Bridge interrupt */
275 u8 reg_64; 275 u8 reg_64;
diff --git a/arch/mn10300/include/asm/ptrace.h b/arch/mn10300/include/asm/ptrace.h
index 55b79ef10028..44251b974f1d 100644
--- a/arch/mn10300/include/asm/ptrace.h
+++ b/arch/mn10300/include/asm/ptrace.h
@@ -81,9 +81,6 @@ struct pt_regs {
81#define PTRACE_GETFPREGS 14 81#define PTRACE_GETFPREGS 14
82#define PTRACE_SETFPREGS 15 82#define PTRACE_SETFPREGS 15
83 83
84/* options set using PTRACE_SETOPTIONS */
85#define PTRACE_O_TRACESYSGOOD 0x00000001
86
87#ifdef __KERNEL__ 84#ifdef __KERNEL__
88 85
89#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL) 86#define user_mode(regs) (((regs)->epsw & EPSW_nSL) == EPSW_nSL)
diff --git a/arch/mn10300/include/asm/thread_info.h b/arch/mn10300/include/asm/thread_info.h
index 08251d6f6b11..ac519bbd42ff 100644
--- a/arch/mn10300/include/asm/thread_info.h
+++ b/arch/mn10300/include/asm/thread_info.h
@@ -123,7 +123,7 @@ static inline unsigned long current_stack_pointer(void)
123} 123}
124 124
125#ifndef CONFIG_KGDB 125#ifndef CONFIG_KGDB
126void arch_release_thread_info(struct thread_info *ti) 126void arch_release_thread_info(struct thread_info *ti);
127#endif 127#endif
128#define get_thread_info(ti) get_task_struct((ti)->task) 128#define get_thread_info(ti) get_task_struct((ti)->task)
129#define put_thread_info(ti) put_task_struct((ti)->task) 129#define put_thread_info(ti) put_task_struct((ti)->task)
diff --git a/arch/mn10300/include/asm/timex.h b/arch/mn10300/include/asm/timex.h
index bd4e90dfe6c2..f8e66425cbf8 100644
--- a/arch/mn10300/include/asm/timex.h
+++ b/arch/mn10300/include/asm/timex.h
@@ -11,7 +11,6 @@
11#ifndef _ASM_TIMEX_H 11#ifndef _ASM_TIMEX_H
12#define _ASM_TIMEX_H 12#define _ASM_TIMEX_H
13 13
14#include <asm/hardirq.h>
15#include <unit/timex.h> 14#include <unit/timex.h>
16 15
17#define TICK_SIZE (tick_nsec / 1000) 16#define TICK_SIZE (tick_nsec / 1000)
@@ -30,16 +29,6 @@ static inline cycles_t get_cycles(void)
30extern int init_clockevents(void); 29extern int init_clockevents(void);
31extern int init_clocksource(void); 30extern int init_clocksource(void);
32 31
33static inline void setup_jiffies_interrupt(int irq,
34 struct irqaction *action)
35{
36 u16 tmp;
37 setup_irq(irq, action);
38 set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
39 GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
40 tmp = GxICR(irq);
41}
42
43#endif /* __KERNEL__ */ 32#endif /* __KERNEL__ */
44 33
45#endif /* _ASM_TIMEX_H */ 34#endif /* _ASM_TIMEX_H */
diff --git a/arch/mn10300/kernel/cevt-mn10300.c b/arch/mn10300/kernel/cevt-mn10300.c
index 69cae0260786..ccce35e3e179 100644
--- a/arch/mn10300/kernel/cevt-mn10300.c
+++ b/arch/mn10300/kernel/cevt-mn10300.c
@@ -70,6 +70,16 @@ static void event_handler(struct clock_event_device *dev)
70{ 70{
71} 71}
72 72
73static inline void setup_jiffies_interrupt(int irq,
74 struct irqaction *action)
75{
76 u16 tmp;
77 setup_irq(irq, action);
78 set_intr_level(irq, NUM2GxICR_LEVEL(CONFIG_TIMER_IRQ_LEVEL));
79 GxICR(irq) |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST;
80 tmp = GxICR(irq);
81}
82
73int __init init_clockevents(void) 83int __init init_clockevents(void)
74{ 84{
75 struct clock_event_device *cd; 85 struct clock_event_device *cd;
diff --git a/arch/mn10300/kernel/internal.h b/arch/mn10300/kernel/internal.h
index a5ac755dd69f..2df440105a80 100644
--- a/arch/mn10300/kernel/internal.h
+++ b/arch/mn10300/kernel/internal.h
@@ -9,6 +9,8 @@
9 * 2 of the Licence, or (at your option) any later version. 9 * 2 of the Licence, or (at your option) any later version.
10 */ 10 */
11 11
12#include <linux/irqreturn.h>
13
12struct clocksource; 14struct clocksource;
13struct clock_event_device; 15struct clock_event_device;
14 16
diff --git a/arch/mn10300/kernel/irq.c b/arch/mn10300/kernel/irq.c
index 2381df83bd00..35932a8de8b8 100644
--- a/arch/mn10300/kernel/irq.c
+++ b/arch/mn10300/kernel/irq.c
@@ -170,9 +170,9 @@ mn10300_cpupic_setaffinity(struct irq_data *d, const struct cpumask *mask,
170 case SC1TXIRQ: 170 case SC1TXIRQ:
171#ifdef CONFIG_MN10300_TTYSM1_TIMER12 171#ifdef CONFIG_MN10300_TTYSM1_TIMER12
172 case TM12IRQ: 172 case TM12IRQ:
173#elif CONFIG_MN10300_TTYSM1_TIMER9 173#elif defined(CONFIG_MN10300_TTYSM1_TIMER9)
174 case TM9IRQ: 174 case TM9IRQ:
175#elif CONFIG_MN10300_TTYSM1_TIMER3 175#elif defined(CONFIG_MN10300_TTYSM1_TIMER3)
176 case TM3IRQ: 176 case TM3IRQ:
177#endif /* CONFIG_MN10300_TTYSM1_TIMER12 */ 177#endif /* CONFIG_MN10300_TTYSM1_TIMER12 */
178#endif /* CONFIG_MN10300_TTYSM1 */ 178#endif /* CONFIG_MN10300_TTYSM1 */
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
index 6ab0bee2a54f..4d584ae29ae1 100644
--- a/arch/mn10300/kernel/signal.c
+++ b/arch/mn10300/kernel/signal.c
@@ -459,10 +459,11 @@ static int handle_signal(int sig,
459 else 459 else
460 ret = setup_frame(sig, ka, oldset, regs); 460 ret = setup_frame(sig, ka, oldset, regs);
461 if (ret) 461 if (ret)
462 return; 462 return ret;
463 463
464 signal_delivered(sig, info, ka, regs, 464 signal_delivered(sig, info, ka, regs,
465 test_thread_flag(TIF_SINGLESTEP)); 465 test_thread_flag(TIF_SINGLESTEP));
466 return 0;
466} 467}
467 468
468/* 469/*
diff --git a/arch/mn10300/kernel/traps.c b/arch/mn10300/kernel/traps.c
index 94a9c6d53e1b..b900e5afa0ae 100644
--- a/arch/mn10300/kernel/traps.c
+++ b/arch/mn10300/kernel/traps.c
@@ -26,6 +26,7 @@
26#include <linux/kdebug.h> 26#include <linux/kdebug.h>
27#include <linux/bug.h> 27#include <linux/bug.h>
28#include <linux/irq.h> 28#include <linux/irq.h>
29#include <linux/export.h>
29#include <asm/processor.h> 30#include <asm/processor.h>
30#include <linux/uaccess.h> 31#include <linux/uaccess.h>
31#include <asm/io.h> 32#include <asm/io.h>
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
index 159acb02cfd4..e244ebe637e1 100644
--- a/arch/mn10300/mm/dma-alloc.c
+++ b/arch/mn10300/mm/dma-alloc.c
@@ -15,6 +15,7 @@
15#include <linux/string.h> 15#include <linux/string.h>
16#include <linux/pci.h> 16#include <linux/pci.h>
17#include <linux/gfp.h> 17#include <linux/gfp.h>
18#include <linux/export.h>
18#include <asm/io.h> 19#include <asm/io.h>
19 20
20static unsigned long pci_sram_allocated = 0xbc000000; 21static unsigned long pci_sram_allocated = 0xbc000000;
diff --git a/arch/mn10300/unit-asb2303/include/unit/timex.h b/arch/mn10300/unit-asb2303/include/unit/timex.h
index cc18fe7d8b90..c37f9832cf17 100644
--- a/arch/mn10300/unit-asb2303/include/unit/timex.h
+++ b/arch/mn10300/unit-asb2303/include/unit/timex.h
@@ -11,10 +11,6 @@
11#ifndef _ASM_UNIT_TIMEX_H 11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H 12#define _ASM_UNIT_TIMEX_H
13 13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h> 14#include <asm/timer-regs.h>
19#include <unit/clock.h> 15#include <unit/clock.h>
20#include <asm/param.h> 16#include <asm/param.h>
diff --git a/arch/mn10300/unit-asb2303/smc91111.c b/arch/mn10300/unit-asb2303/smc91111.c
index 43c246439413..53677694b165 100644
--- a/arch/mn10300/unit-asb2303/smc91111.c
+++ b/arch/mn10300/unit-asb2303/smc91111.c
@@ -15,6 +15,7 @@
15#include <linux/platform_device.h> 15#include <linux/platform_device.h>
16 16
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/irq.h>
18#include <asm/timex.h> 19#include <asm/timex.h>
19#include <asm/processor.h> 20#include <asm/processor.h>
20#include <asm/intctl-regs.h> 21#include <asm/intctl-regs.h>
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h
index 758af30d1a16..4cefc224f448 100644
--- a/arch/mn10300/unit-asb2305/include/unit/timex.h
+++ b/arch/mn10300/unit-asb2305/include/unit/timex.h
@@ -11,10 +11,6 @@
11#ifndef _ASM_UNIT_TIMEX_H 11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H 12#define _ASM_UNIT_TIMEX_H
13 13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h> 14#include <asm/timer-regs.h>
19#include <unit/clock.h> 15#include <unit/clock.h>
20#include <asm/param.h> 16#include <asm/param.h>
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
index e1becd6b7571..bc4adfaf815c 100644
--- a/arch/mn10300/unit-asb2305/unit-init.c
+++ b/arch/mn10300/unit-asb2305/unit-init.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <asm/io.h> 15#include <asm/io.h>
16#include <asm/irq.h>
16#include <asm/setup.h> 17#include <asm/setup.h>
17#include <asm/processor.h> 18#include <asm/processor.h>
18#include <asm/intctl-regs.h> 19#include <asm/intctl-regs.h>
diff --git a/arch/mn10300/unit-asb2364/include/unit/timex.h b/arch/mn10300/unit-asb2364/include/unit/timex.h
index ddb7ed010706..42f32db75087 100644
--- a/arch/mn10300/unit-asb2364/include/unit/timex.h
+++ b/arch/mn10300/unit-asb2364/include/unit/timex.h
@@ -11,10 +11,6 @@
11#ifndef _ASM_UNIT_TIMEX_H 11#ifndef _ASM_UNIT_TIMEX_H
12#define _ASM_UNIT_TIMEX_H 12#define _ASM_UNIT_TIMEX_H
13 13
14#ifndef __ASSEMBLY__
15#include <linux/irq.h>
16#endif /* __ASSEMBLY__ */
17
18#include <asm/timer-regs.h> 14#include <asm/timer-regs.h>
19#include <unit/clock.h> 15#include <unit/clock.h>
20#include <asm/param.h> 16#include <asm/param.h>
diff --git a/arch/parisc/Makefile b/arch/parisc/Makefile
index dbc3850b1d0d..5707f1a62341 100644
--- a/arch/parisc/Makefile
+++ b/arch/parisc/Makefile
@@ -21,6 +21,7 @@ KBUILD_DEFCONFIG := default_defconfig
21 21
22NM = sh $(srctree)/arch/parisc/nm 22NM = sh $(srctree)/arch/parisc/nm
23CHECKFLAGS += -D__hppa__=1 23CHECKFLAGS += -D__hppa__=1
24LIBGCC = $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
24 25
25MACHINE := $(shell uname -m) 26MACHINE := $(shell uname -m)
26ifeq ($(MACHINE),parisc*) 27ifeq ($(MACHINE),parisc*)
@@ -79,7 +80,7 @@ kernel-y := mm/ kernel/ math-emu/
79kernel-$(CONFIG_HPUX) += hpux/ 80kernel-$(CONFIG_HPUX) += hpux/
80 81
81core-y += $(addprefix arch/parisc/, $(kernel-y)) 82core-y += $(addprefix arch/parisc/, $(kernel-y))
82libs-y += arch/parisc/lib/ `$(CC) -print-libgcc-file-name` 83libs-y += arch/parisc/lib/ $(LIBGCC)
83 84
84drivers-$(CONFIG_OPROFILE) += arch/parisc/oprofile/ 85drivers-$(CONFIG_OPROFILE) += arch/parisc/oprofile/
85 86
diff --git a/arch/parisc/include/asm/Kbuild b/arch/parisc/include/asm/Kbuild
index 19a434f55059..4383707d9801 100644
--- a/arch/parisc/include/asm/Kbuild
+++ b/arch/parisc/include/asm/Kbuild
@@ -1,3 +1,4 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += pdc.h 3header-y += pdc.h
4generic-y += word-at-a-time.h
diff --git a/arch/parisc/include/asm/bug.h b/arch/parisc/include/asm/bug.h
index 72cfdb0cfdd1..62a33338549c 100644
--- a/arch/parisc/include/asm/bug.h
+++ b/arch/parisc/include/asm/bug.h
@@ -1,6 +1,8 @@
1#ifndef _PARISC_BUG_H 1#ifndef _PARISC_BUG_H
2#define _PARISC_BUG_H 2#define _PARISC_BUG_H
3 3
4#include <linux/kernel.h> /* for BUGFLAG_TAINT */
5
4/* 6/*
5 * Tell the user there is some problem. 7 * Tell the user there is some problem.
6 * The offending file and line are encoded in the __bug_table section. 8 * The offending file and line are encoded in the __bug_table section.
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index c9aac24b02e2..0554ab062bdc 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -86,8 +86,8 @@ static inline bool arch_irqs_disabled(void)
86} 86}
87 87
88#ifdef CONFIG_PPC_BOOK3E 88#ifdef CONFIG_PPC_BOOK3E
89#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory"); 89#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory")
90#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory"); 90#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory")
91#else 91#else
92#define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1) 92#define __hard_irq_enable() __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
93#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1) 93#define __hard_irq_disable() __mtmsrd(local_paca->kernel_msr, 1)
@@ -100,6 +100,14 @@ static inline void hard_irq_disable(void)
100 get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; 100 get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
101} 101}
102 102
103/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
104#define hard_irq_disable hard_irq_disable
105
106static inline bool lazy_irq_pending(void)
107{
108 return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
109}
110
103/* 111/*
104 * This is called by asynchronous interrupts to conditionally 112 * This is called by asynchronous interrupts to conditionally
105 * re-enable hard interrupts when soft-disabled after having 113 * re-enable hard interrupts when soft-disabled after having
@@ -117,6 +125,8 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
117 return !regs->softe; 125 return !regs->softe;
118} 126}
119 127
128extern bool prep_irq_for_idle(void);
129
120#else /* CONFIG_PPC64 */ 130#else /* CONFIG_PPC64 */
121 131
122#define SET_MSR_EE(x) mtmsr(x) 132#define SET_MSR_EE(x) mtmsr(x)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ed1718feb9d9..5971c85df136 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -558,27 +558,54 @@ _GLOBAL(ret_from_except_lite)
558 mtmsrd r10,1 /* Update machine state */ 558 mtmsrd r10,1 /* Update machine state */
559#endif /* CONFIG_PPC_BOOK3E */ 559#endif /* CONFIG_PPC_BOOK3E */
560 560
561#ifdef CONFIG_PREEMPT
562 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */ 561 clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
563 li r0,_TIF_NEED_RESCHED /* bits to check */
564 ld r3,_MSR(r1) 562 ld r3,_MSR(r1)
565 ld r4,TI_FLAGS(r9) 563 ld r4,TI_FLAGS(r9)
566 /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
567 rlwimi r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
568 and. r0,r4,r0 /* check NEED_RESCHED and maybe SIGPENDING */
569 bne do_work
570
571#else /* !CONFIG_PREEMPT */
572 ld r3,_MSR(r1) /* Returning to user mode? */
573 andi. r3,r3,MSR_PR 564 andi. r3,r3,MSR_PR
574 beq restore /* if not, just restore regs and return */ 565 beq resume_kernel
575 566
576 /* Check current_thread_info()->flags */ 567 /* Check current_thread_info()->flags */
568 andi. r0,r4,_TIF_USER_WORK_MASK
569 beq restore
570
571 andi. r0,r4,_TIF_NEED_RESCHED
572 beq 1f
573 bl .restore_interrupts
574 bl .schedule
575 b .ret_from_except_lite
576
5771: bl .save_nvgprs
578 bl .restore_interrupts
579 addi r3,r1,STACK_FRAME_OVERHEAD
580 bl .do_notify_resume
581 b .ret_from_except
582
583resume_kernel:
584#ifdef CONFIG_PREEMPT
585 /* Check if we need to preempt */
586 andi. r0,r4,_TIF_NEED_RESCHED
587 beq+ restore
588 /* Check that preempt_count() == 0 and interrupts are enabled */
589 lwz r8,TI_PREEMPT(r9)
590 cmpwi cr1,r8,0
591 ld r0,SOFTE(r1)
592 cmpdi r0,0
593 crandc eq,cr1*4+eq,eq
594 bne restore
595
596 /*
597 * Here we are preempting the current task. We want to make
598 * sure we are soft-disabled first
599 */
600 SOFT_DISABLE_INTS(r3,r4)
6011: bl .preempt_schedule_irq
602
603 /* Re-test flags and eventually loop */
577 clrrdi r9,r1,THREAD_SHIFT 604 clrrdi r9,r1,THREAD_SHIFT
578 ld r4,TI_FLAGS(r9) 605 ld r4,TI_FLAGS(r9)
579 andi. r0,r4,_TIF_USER_WORK_MASK 606 andi. r0,r4,_TIF_NEED_RESCHED
580 bne do_work 607 bne 1b
581#endif /* !CONFIG_PREEMPT */ 608#endif /* CONFIG_PREEMPT */
582 609
583 .globl fast_exc_return_irq 610 .globl fast_exc_return_irq
584fast_exc_return_irq: 611fast_exc_return_irq:
@@ -759,50 +786,6 @@ restore_check_irq_replay:
759#endif /* CONFIG_PPC_BOOK3E */ 786#endif /* CONFIG_PPC_BOOK3E */
7601: b .ret_from_except /* What else to do here ? */ 7871: b .ret_from_except /* What else to do here ? */
761 788
762
763
7643:
765do_work:
766#ifdef CONFIG_PREEMPT
767 andi. r0,r3,MSR_PR /* Returning to user mode? */
768 bne user_work
769 /* Check that preempt_count() == 0 and interrupts are enabled */
770 lwz r8,TI_PREEMPT(r9)
771 cmpwi cr1,r8,0
772 ld r0,SOFTE(r1)
773 cmpdi r0,0
774 crandc eq,cr1*4+eq,eq
775 bne restore
776
777 /*
778 * Here we are preempting the current task. We want to make
779 * sure we are soft-disabled first
780 */
781 SOFT_DISABLE_INTS(r3,r4)
7821: bl .preempt_schedule_irq
783
784 /* Re-test flags and eventually loop */
785 clrrdi r9,r1,THREAD_SHIFT
786 ld r4,TI_FLAGS(r9)
787 andi. r0,r4,_TIF_NEED_RESCHED
788 bne 1b
789 b restore
790
791user_work:
792#endif /* CONFIG_PREEMPT */
793
794 andi. r0,r4,_TIF_NEED_RESCHED
795 beq 1f
796 bl .restore_interrupts
797 bl .schedule
798 b .ret_from_except_lite
799
8001: bl .save_nvgprs
801 bl .restore_interrupts
802 addi r3,r1,STACK_FRAME_OVERHEAD
803 bl .do_notify_resume
804 b .ret_from_except
805
806unrecov_restore: 789unrecov_restore:
807 addi r3,r1,STACK_FRAME_OVERHEAD 790 addi r3,r1,STACK_FRAME_OVERHEAD
808 bl .unrecoverable_exception 791 bl .unrecoverable_exception
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 7835a5e1ea5f..1f017bb7a7ce 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -229,7 +229,7 @@ notrace void arch_local_irq_restore(unsigned long en)
229 */ 229 */
230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS)) 230 if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
231 __hard_irq_disable(); 231 __hard_irq_disable();
232#ifdef CONFIG_TRACE_IRQFLAG 232#ifdef CONFIG_TRACE_IRQFLAGS
233 else { 233 else {
234 /* 234 /*
235 * We should already be hard disabled here. We had bugs 235 * We should already be hard disabled here. We had bugs
@@ -277,7 +277,7 @@ EXPORT_SYMBOL(arch_local_irq_restore);
277 * NOTE: This is called with interrupts hard disabled but not marked 277 * NOTE: This is called with interrupts hard disabled but not marked
278 * as such in paca->irq_happened, so we need to resync this. 278 * as such in paca->irq_happened, so we need to resync this.
279 */ 279 */
280void restore_interrupts(void) 280void notrace restore_interrupts(void)
281{ 281{
282 if (irqs_disabled()) { 282 if (irqs_disabled()) {
283 local_paca->irq_happened |= PACA_IRQ_HARD_DIS; 283 local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
@@ -286,6 +286,52 @@ void restore_interrupts(void)
286 __hard_irq_enable(); 286 __hard_irq_enable();
287} 287}
288 288
289/*
290 * This is a helper to use when about to go into idle low-power
291 * when the latter has the side effect of re-enabling interrupts
292 * (such as calling H_CEDE under pHyp).
293 *
294 * You call this function with interrupts soft-disabled (this is
295 * already the case when ppc_md.power_save is called). The function
296 * will return whether to enter power save or just return.
297 *
298 * In the former case, it will have notified lockdep of interrupts
299 * being re-enabled and generally sanitized the lazy irq state,
300 * and in the latter case it will leave with interrupts hard
301 * disabled and marked as such, so the local_irq_enable() call
302 * in cpu_idle() will properly re-enable everything.
303 */
304bool prep_irq_for_idle(void)
305{
306 /*
307 * First we need to hard disable to ensure no interrupt
308 * occurs before we effectively enter the low power state
309 */
310 hard_irq_disable();
311
312 /*
313 * If anything happened while we were soft-disabled,
314 * we return now and do not enter the low power state.
315 */
316 if (lazy_irq_pending())
317 return false;
318
319 /* Tell lockdep we are about to re-enable */
320 trace_hardirqs_on();
321
322 /*
323 * Mark interrupts as soft-enabled and clear the
324 * PACA_IRQ_HARD_DIS from the pending mask since we
325 * are about to hard enable as well as a side effect
326 * of entering the low power state.
327 */
328 local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
329 local_paca->soft_enabled = 1;
330
331 /* Tell the caller to enter the low power state */
332 return true;
333}
334
289#endif /* CONFIG_PPC64 */ 335#endif /* CONFIG_PPC64 */
290 336
291int arch_show_interrupts(struct seq_file *p, int prec) 337int arch_show_interrupts(struct seq_file *p, int prec)
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index 0b6d79617d7b..2e3200ca485f 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -176,8 +176,8 @@ int module_frob_arch_sections(Elf32_Ehdr *hdr,
176 176
177static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val) 177static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val)
178{ 178{
179 if (entry->jump[0] == 0x3d600000 + ((val + 0x8000) >> 16) 179 if (entry->jump[0] == 0x3d800000 + ((val + 0x8000) >> 16)
180 && entry->jump[1] == 0x396b0000 + (val & 0xffff)) 180 && entry->jump[1] == 0x398c0000 + (val & 0xffff))
181 return 1; 181 return 1;
182 return 0; 182 return 0;
183} 183}
@@ -204,10 +204,9 @@ static uint32_t do_plt_call(void *location,
204 entry++; 204 entry++;
205 } 205 }
206 206
207 /* Stolen from Paul Mackerras as well... */ 207 entry->jump[0] = 0x3d800000+((val+0x8000)>>16); /* lis r12,sym@ha */
208 entry->jump[0] = 0x3d600000+((val+0x8000)>>16); /* lis r11,sym@ha */ 208 entry->jump[1] = 0x398c0000 + (val&0xffff); /* addi r12,r12,sym@l*/
209 entry->jump[1] = 0x396b0000 + (val&0xffff); /* addi r11,r11,sym@l*/ 209 entry->jump[2] = 0x7d8903a6; /* mtctr r12 */
210 entry->jump[2] = 0x7d6903a6; /* mtctr r11 */
211 entry->jump[3] = 0x4e800420; /* bctr */ 210 entry->jump[3] = 0x4e800420; /* bctr */
212 211
213 DEBUGP("Initialized plt for 0x%x at %p\n", val, entry); 212 DEBUGP("Initialized plt for 0x%x at %p\n", val, entry);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 1b488e5305c5..0794a3017b1b 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1312,7 +1312,7 @@ static struct opal_secondary_data {
1312 1312
1313extern char opal_secondary_entry; 1313extern char opal_secondary_entry;
1314 1314
1315static void prom_query_opal(void) 1315static void __init prom_query_opal(void)
1316{ 1316{
1317 long rc; 1317 long rc;
1318 1318
@@ -1436,7 +1436,7 @@ static void __init prom_opal_hold_cpus(void)
1436 prom_debug("prom_opal_hold_cpus: end...\n"); 1436 prom_debug("prom_opal_hold_cpus: end...\n");
1437} 1437}
1438 1438
1439static void prom_opal_takeover(void) 1439static void __init prom_opal_takeover(void)
1440{ 1440{
1441 struct opal_secondary_data *data = &RELOC(opal_secondary_data); 1441 struct opal_secondary_data *data = &RELOC(opal_secondary_data);
1442 struct opal_takeover_args *args = &data->args; 1442 struct opal_takeover_args *args = &data->args;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 99a995c2a3f2..be171ee73bf8 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -475,6 +475,7 @@ void timer_interrupt(struct pt_regs * regs)
475 struct pt_regs *old_regs; 475 struct pt_regs *old_regs;
476 u64 *next_tb = &__get_cpu_var(decrementers_next_tb); 476 u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
477 struct clock_event_device *evt = &__get_cpu_var(decrementers); 477 struct clock_event_device *evt = &__get_cpu_var(decrementers);
478 u64 now;
478 479
479 /* Ensure a positive value is written to the decrementer, or else 480 /* Ensure a positive value is written to the decrementer, or else
480 * some CPUs will continue to take decrementer exceptions. 481 * some CPUs will continue to take decrementer exceptions.
@@ -509,9 +510,16 @@ void timer_interrupt(struct pt_regs * regs)
509 irq_work_run(); 510 irq_work_run();
510 } 511 }
511 512
512 *next_tb = ~(u64)0; 513 now = get_tb_or_rtc();
513 if (evt->event_handler) 514 if (now >= *next_tb) {
514 evt->event_handler(evt); 515 *next_tb = ~(u64)0;
516 if (evt->event_handler)
517 evt->event_handler(evt);
518 } else {
519 now = *next_tb - now;
520 if (now <= DECREMENTER_MAX)
521 set_dec((int)now);
522 }
515 523
516#ifdef CONFIG_PPC64 524#ifdef CONFIG_PPC64
517 /* collect purr register values often, for accurate calculations */ 525 /* collect purr register values often, for accurate calculations */
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index c6af1d623839..3abe1b86e583 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -268,24 +268,45 @@ static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
268 return err; 268 return err;
269} 269}
270 270
271static void kvmppc_update_vpa(struct kvm *kvm, struct kvmppc_vpa *vpap) 271static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
272{ 272{
273 struct kvm *kvm = vcpu->kvm;
273 void *va; 274 void *va;
274 unsigned long nb; 275 unsigned long nb;
276 unsigned long gpa;
275 277
276 vpap->update_pending = 0; 278 /*
277 va = NULL; 279 * We need to pin the page pointed to by vpap->next_gpa,
278 if (vpap->next_gpa) { 280 * but we can't call kvmppc_pin_guest_page under the lock
279 va = kvmppc_pin_guest_page(kvm, vpap->next_gpa, &nb); 281 * as it does get_user_pages() and down_read(). So we
280 if (nb < vpap->len) { 282 * have to drop the lock, pin the page, then get the lock
281 /* 283 * again and check that a new area didn't get registered
282 * If it's now too short, it must be that userspace 284 * in the meantime.
283 * has changed the mappings underlying guest memory, 285 */
284 * so unregister the region. 286 for (;;) {
285 */ 287 gpa = vpap->next_gpa;
288 spin_unlock(&vcpu->arch.vpa_update_lock);
289 va = NULL;
290 nb = 0;
291 if (gpa)
292 va = kvmppc_pin_guest_page(kvm, vpap->next_gpa, &nb);
293 spin_lock(&vcpu->arch.vpa_update_lock);
294 if (gpa == vpap->next_gpa)
295 break;
296 /* sigh... unpin that one and try again */
297 if (va)
286 kvmppc_unpin_guest_page(kvm, va); 298 kvmppc_unpin_guest_page(kvm, va);
287 va = NULL; 299 }
288 } 300
301 vpap->update_pending = 0;
302 if (va && nb < vpap->len) {
303 /*
304 * If it's now too short, it must be that userspace
305 * has changed the mappings underlying guest memory,
306 * so unregister the region.
307 */
308 kvmppc_unpin_guest_page(kvm, va);
309 va = NULL;
289 } 310 }
290 if (vpap->pinned_addr) 311 if (vpap->pinned_addr)
291 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr); 312 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr);
@@ -296,20 +317,18 @@ static void kvmppc_update_vpa(struct kvm *kvm, struct kvmppc_vpa *vpap)
296 317
297static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 318static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
298{ 319{
299 struct kvm *kvm = vcpu->kvm;
300
301 spin_lock(&vcpu->arch.vpa_update_lock); 320 spin_lock(&vcpu->arch.vpa_update_lock);
302 if (vcpu->arch.vpa.update_pending) { 321 if (vcpu->arch.vpa.update_pending) {
303 kvmppc_update_vpa(kvm, &vcpu->arch.vpa); 322 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
304 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 323 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
305 } 324 }
306 if (vcpu->arch.dtl.update_pending) { 325 if (vcpu->arch.dtl.update_pending) {
307 kvmppc_update_vpa(kvm, &vcpu->arch.dtl); 326 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
308 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 327 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
309 vcpu->arch.dtl_index = 0; 328 vcpu->arch.dtl_index = 0;
310 } 329 }
311 if (vcpu->arch.slb_shadow.update_pending) 330 if (vcpu->arch.slb_shadow.update_pending)
312 kvmppc_update_vpa(kvm, &vcpu->arch.slb_shadow); 331 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
313 spin_unlock(&vcpu->arch.vpa_update_lock); 332 spin_unlock(&vcpu->arch.vpa_update_lock);
314} 333}
315 334
@@ -800,12 +819,39 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)
800 struct kvm_vcpu *vcpu, *vcpu0, *vnext; 819 struct kvm_vcpu *vcpu, *vcpu0, *vnext;
801 long ret; 820 long ret;
802 u64 now; 821 u64 now;
803 int ptid, i; 822 int ptid, i, need_vpa_update;
804 823
805 /* don't start if any threads have a signal pending */ 824 /* don't start if any threads have a signal pending */
806 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) 825 need_vpa_update = 0;
826 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
807 if (signal_pending(vcpu->arch.run_task)) 827 if (signal_pending(vcpu->arch.run_task))
808 return 0; 828 return 0;
829 need_vpa_update |= vcpu->arch.vpa.update_pending |
830 vcpu->arch.slb_shadow.update_pending |
831 vcpu->arch.dtl.update_pending;
832 }
833
834 /*
835 * Initialize *vc, in particular vc->vcore_state, so we can
836 * drop the vcore lock if necessary.
837 */
838 vc->n_woken = 0;
839 vc->nap_count = 0;
840 vc->entry_exit_count = 0;
841 vc->vcore_state = VCORE_RUNNING;
842 vc->in_guest = 0;
843 vc->napping_threads = 0;
844
845 /*
846 * Updating any of the vpas requires calling kvmppc_pin_guest_page,
847 * which can't be called with any spinlocks held.
848 */
849 if (need_vpa_update) {
850 spin_unlock(&vc->lock);
851 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list)
852 kvmppc_update_vpas(vcpu);
853 spin_lock(&vc->lock);
854 }
809 855
810 /* 856 /*
811 * Make sure we are running on thread 0, and that 857 * Make sure we are running on thread 0, and that
@@ -838,20 +884,10 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)
838 if (vcpu->arch.ceded) 884 if (vcpu->arch.ceded)
839 vcpu->arch.ptid = ptid++; 885 vcpu->arch.ptid = ptid++;
840 886
841 vc->n_woken = 0;
842 vc->nap_count = 0;
843 vc->entry_exit_count = 0;
844 vc->vcore_state = VCORE_RUNNING;
845 vc->stolen_tb += mftb() - vc->preempt_tb; 887 vc->stolen_tb += mftb() - vc->preempt_tb;
846 vc->in_guest = 0;
847 vc->pcpu = smp_processor_id(); 888 vc->pcpu = smp_processor_id();
848 vc->napping_threads = 0;
849 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) { 889 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
850 kvmppc_start_thread(vcpu); 890 kvmppc_start_thread(vcpu);
851 if (vcpu->arch.vpa.update_pending ||
852 vcpu->arch.slb_shadow.update_pending ||
853 vcpu->arch.dtl.update_pending)
854 kvmppc_update_vpas(vcpu);
855 kvmppc_create_dtl_entry(vcpu, vc); 891 kvmppc_create_dtl_entry(vcpu, vc);
856 } 892 }
857 /* Grab any remaining hw threads so they can't go into the kernel */ 893 /* Grab any remaining hw threads so they can't go into the kernel */
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index a84aafce2a12..a1044f43becd 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -810,7 +810,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
810 lwz r3,VCORE_NAPPING_THREADS(r5) 810 lwz r3,VCORE_NAPPING_THREADS(r5)
811 lwz r4,VCPU_PTID(r9) 811 lwz r4,VCPU_PTID(r9)
812 li r0,1 812 li r0,1
813 sldi r0,r0,r4 813 sld r0,r0,r4
814 andc. r3,r3,r0 /* no sense IPI'ing ourselves */ 814 andc. r3,r3,r0 /* no sense IPI'ing ourselves */
815 beq 43f 815 beq 43f
816 mulli r4,r4,PACA_SIZE /* get paca for thread 0 */ 816 mulli r4,r4,PACA_SIZE /* get paca for thread 0 */
diff --git a/arch/powerpc/kvm/book3s_pr_papr.c b/arch/powerpc/kvm/book3s_pr_papr.c
index 3ff9013d6e79..ee02b30878ed 100644
--- a/arch/powerpc/kvm/book3s_pr_papr.c
+++ b/arch/powerpc/kvm/book3s_pr_papr.c
@@ -241,6 +241,7 @@ int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd)
241 case H_PUT_TCE: 241 case H_PUT_TCE:
242 return kvmppc_h_pr_put_tce(vcpu); 242 return kvmppc_h_pr_put_tce(vcpu);
243 case H_CEDE: 243 case H_CEDE:
244 vcpu->arch.shared->msr |= MSR_EE;
244 kvm_vcpu_block(vcpu); 245 kvm_vcpu_block(vcpu);
245 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 246 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
246 vcpu->stat.halt_wakeup++; 247 vcpu->stat.halt_wakeup++;
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b6edbb3b4a54..1e95556dc692 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -635,11 +635,11 @@ static inline int __init read_usm_ranges(const u32 **usm)
635 */ 635 */
636static void __init parse_drconf_memory(struct device_node *memory) 636static void __init parse_drconf_memory(struct device_node *memory)
637{ 637{
638 const u32 *dm, *usm; 638 const u32 *uninitialized_var(dm), *usm;
639 unsigned int n, rc, ranges, is_kexec_kdump = 0; 639 unsigned int n, rc, ranges, is_kexec_kdump = 0;
640 unsigned long lmb_size, base, size, sz; 640 unsigned long lmb_size, base, size, sz;
641 int nid; 641 int nid;
642 struct assoc_arrays aa; 642 struct assoc_arrays aa = { .arrays = NULL };
643 643
644 n = of_get_drconf_memory(memory, &dm); 644 n = of_get_drconf_memory(memory, &dm);
645 if (!n) 645 if (!n)
diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S
index 55ba3855a97f..7d3a3b5619a2 100644
--- a/arch/powerpc/net/bpf_jit_64.S
+++ b/arch/powerpc/net/bpf_jit_64.S
@@ -105,6 +105,7 @@ sk_load_byte_msh_positive_offset:
105 mr r4, r_addr; \ 105 mr r4, r_addr; \
106 li r6, SIZE; \ 106 li r6, SIZE; \
107 bl skb_copy_bits; \ 107 bl skb_copy_bits; \
108 nop; \
108 /* R3 = 0 on success */ \ 109 /* R3 = 0 on success */ \
109 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \ 110 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
110 ld r0, 16(r1); \ 111 ld r0, 16(r1); \
@@ -156,6 +157,7 @@ bpf_slow_path_byte_msh:
156 mr r4, r_addr; \ 157 mr r4, r_addr; \
157 li r5, SIZE; \ 158 li r5, SIZE; \
158 bl bpf_internal_load_pointer_neg_helper; \ 159 bl bpf_internal_load_pointer_neg_helper; \
160 nop; \
159 /* R3 != 0 on success */ \ 161 /* R3 != 0 on success */ \
160 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \ 162 addi r1, r1, BPF_PPC_SLOWPATH_FRAME; \
161 ld r0, 16(r1); \ 163 ld r0, 16(r1); \
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
index efdacc829576..d17e98bc0c10 100644
--- a/arch/powerpc/platforms/cell/pervasive.c
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -42,11 +42,9 @@ static void cbe_power_save(void)
42{ 42{
43 unsigned long ctrl, thread_switch_control; 43 unsigned long ctrl, thread_switch_control;
44 44
45 /* 45 /* Ensure our interrupt state is properly tracked */
46 * We need to hard disable interrupts, the local_irq_enable() done by 46 if (!prep_irq_for_idle())
47 * our caller upon return will hard re-enable. 47 return;
48 */
49 hard_irq_disable();
50 48
51 ctrl = mfspr(SPRN_CTRLF); 49 ctrl = mfspr(SPRN_CTRLF);
52 50
@@ -81,6 +79,9 @@ static void cbe_power_save(void)
81 */ 79 */
82 ctrl &= ~(CTRL_RUNLATCH | CTRL_TE); 80 ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
83 mtspr(SPRN_CTRLT, ctrl); 81 mtspr(SPRN_CTRLT, ctrl);
82
83 /* Re-enable interrupts in MSR */
84 __hard_irq_enable();
84} 85}
85 86
86static int cbe_system_reset_exception(struct pt_regs *regs) 87static int cbe_system_reset_exception(struct pt_regs *regs)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 0915b1ad66ce..2d311c0caf8e 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -106,7 +106,7 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
106 tcep++; 106 tcep++;
107 } 107 }
108 108
109 if (tbl->it_type == TCE_PCI_SWINV_CREATE) 109 if (tbl->it_type & TCE_PCI_SWINV_CREATE)
110 tce_invalidate_pSeries_sw(tbl, tces, tcep - 1); 110 tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
111 return 0; 111 return 0;
112} 112}
@@ -121,7 +121,7 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
121 while (npages--) 121 while (npages--)
122 *(tcep++) = 0; 122 *(tcep++) = 0;
123 123
124 if (tbl->it_type == TCE_PCI_SWINV_FREE) 124 if (tbl->it_type & TCE_PCI_SWINV_FREE)
125 tce_invalidate_pSeries_sw(tbl, tces, tcep - 1); 125 tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
126} 126}
127 127
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 36f957f31842..8733a86ad52e 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -68,9 +68,7 @@ static const char *pseries_nvram_os_partitions[] = {
68}; 68};
69 69
70static void oops_to_nvram(struct kmsg_dumper *dumper, 70static void oops_to_nvram(struct kmsg_dumper *dumper,
71 enum kmsg_dump_reason reason, 71 enum kmsg_dump_reason reason);
72 const char *old_msgs, unsigned long old_len,
73 const char *new_msgs, unsigned long new_len);
74 72
75static struct kmsg_dumper nvram_kmsg_dumper = { 73static struct kmsg_dumper nvram_kmsg_dumper = {
76 .dump = oops_to_nvram 74 .dump = oops_to_nvram
@@ -504,28 +502,6 @@ int __init pSeries_nvram_init(void)
504} 502}
505 503
506/* 504/*
507 * Try to capture the last capture_len bytes of the printk buffer. Return
508 * the amount actually captured.
509 */
510static size_t capture_last_msgs(const char *old_msgs, size_t old_len,
511 const char *new_msgs, size_t new_len,
512 char *captured, size_t capture_len)
513{
514 if (new_len >= capture_len) {
515 memcpy(captured, new_msgs + (new_len - capture_len),
516 capture_len);
517 return capture_len;
518 } else {
519 /* Grab the end of old_msgs. */
520 size_t old_tail_len = min(old_len, capture_len - new_len);
521 memcpy(captured, old_msgs + (old_len - old_tail_len),
522 old_tail_len);
523 memcpy(captured + old_tail_len, new_msgs, new_len);
524 return old_tail_len + new_len;
525 }
526}
527
528/*
529 * Are we using the ibm,rtas-log for oops/panic reports? And if so, 505 * Are we using the ibm,rtas-log for oops/panic reports? And if so,
530 * would logging this oops/panic overwrite an RTAS event that rtas_errd 506 * would logging this oops/panic overwrite an RTAS event that rtas_errd
531 * hasn't had a chance to read and process? Return 1 if so, else 0. 507 * hasn't had a chance to read and process? Return 1 if so, else 0.
@@ -541,27 +517,6 @@ static int clobbering_unread_rtas_event(void)
541 NVRAM_RTAS_READ_TIMEOUT); 517 NVRAM_RTAS_READ_TIMEOUT);
542} 518}
543 519
544/* Squeeze out each line's <n> severity prefix. */
545static size_t elide_severities(char *buf, size_t len)
546{
547 char *in, *out, *buf_end = buf + len;
548 /* Assume a <n> at the very beginning marks the start of a line. */
549 int newline = 1;
550
551 in = out = buf;
552 while (in < buf_end) {
553 if (newline && in+3 <= buf_end &&
554 *in == '<' && isdigit(in[1]) && in[2] == '>') {
555 in += 3;
556 newline = 0;
557 } else {
558 newline = (*in == '\n');
559 *out++ = *in++;
560 }
561 }
562 return out - buf;
563}
564
565/* Derived from logfs_compress() */ 520/* Derived from logfs_compress() */
566static int nvram_compress(const void *in, void *out, size_t inlen, 521static int nvram_compress(const void *in, void *out, size_t inlen,
567 size_t outlen) 522 size_t outlen)
@@ -619,9 +574,7 @@ static int zip_oops(size_t text_len)
619 * partition. If that's too much, go back and capture uncompressed text. 574 * partition. If that's too much, go back and capture uncompressed text.
620 */ 575 */
621static void oops_to_nvram(struct kmsg_dumper *dumper, 576static void oops_to_nvram(struct kmsg_dumper *dumper,
622 enum kmsg_dump_reason reason, 577 enum kmsg_dump_reason reason)
623 const char *old_msgs, unsigned long old_len,
624 const char *new_msgs, unsigned long new_len)
625{ 578{
626 static unsigned int oops_count = 0; 579 static unsigned int oops_count = 0;
627 static bool panicking = false; 580 static bool panicking = false;
@@ -660,14 +613,14 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
660 return; 613 return;
661 614
662 if (big_oops_buf) { 615 if (big_oops_buf) {
663 text_len = capture_last_msgs(old_msgs, old_len, 616 kmsg_dump_get_buffer(dumper, false,
664 new_msgs, new_len, big_oops_buf, big_oops_buf_sz); 617 big_oops_buf, big_oops_buf_sz, &text_len);
665 text_len = elide_severities(big_oops_buf, text_len);
666 rc = zip_oops(text_len); 618 rc = zip_oops(text_len);
667 } 619 }
668 if (rc != 0) { 620 if (rc != 0) {
669 text_len = capture_last_msgs(old_msgs, old_len, 621 kmsg_dump_rewind(dumper);
670 new_msgs, new_len, oops_data, oops_data_sz); 622 kmsg_dump_get_buffer(dumper, true,
623 oops_data, oops_data_sz, &text_len);
671 err_type = ERR_TYPE_KERNEL_PANIC; 624 err_type = ERR_TYPE_KERNEL_PANIC;
672 *oops_len = (u16) text_len; 625 *oops_len = (u16) text_len;
673 } 626 }
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 41a34bc4a9a2..c71be66bd5dc 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -99,15 +99,18 @@ out:
99static void check_and_cede_processor(void) 99static void check_and_cede_processor(void)
100{ 100{
101 /* 101 /*
102 * Interrupts are soft-disabled at this point, 102 * Ensure our interrupt state is properly tracked,
103 * but not hard disabled. So an interrupt might have 103 * also checks if no interrupt has occurred while we
104 * occurred before entering NAP, and would be potentially 104 * were soft-disabled
105 * lost (edge events, decrementer events, etc...) unless
106 * we first hard disable then check.
107 */ 105 */
108 hard_irq_disable(); 106 if (prep_irq_for_idle()) {
109 if (get_paca()->irq_happened == 0)
110 cede_processor(); 107 cede_processor();
108#ifdef CONFIG_TRACE_IRQFLAGS
109 /* Ensure that H_CEDE returns with IRQs on */
110 if (WARN_ON(!(mfmsr() & MSR_EE)))
111 __hard_irq_enable();
112#endif
113 }
111} 114}
112 115
113static int dedicated_cede_loop(struct cpuidle_device *dev, 116static int dedicated_cede_loop(struct cpuidle_device *dev,
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 0f3ab06d2222..eab3492a45c5 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -971,7 +971,7 @@ static int cpu_cmd(void)
971 /* print cpus waiting or in xmon */ 971 /* print cpus waiting or in xmon */
972 printf("cpus stopped:"); 972 printf("cpus stopped:");
973 count = 0; 973 count = 0;
974 for (cpu = 0; cpu < NR_CPUS; ++cpu) { 974 for_each_possible_cpu(cpu) {
975 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) { 975 if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
976 if (count == 0) 976 if (count == 0)
977 printf(" %x", cpu); 977 printf(" %x", cpu);
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 99bcd0ee838d..31d9db7913e4 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -32,6 +32,8 @@ config SUPERH
32 select GENERIC_SMP_IDLE_THREAD 32 select GENERIC_SMP_IDLE_THREAD
33 select GENERIC_CLOCKEVENTS 33 select GENERIC_CLOCKEVENTS
34 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST 34 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
35 select GENERIC_STRNCPY_FROM_USER
36 select GENERIC_STRNLEN_USER
35 help 37 help
36 The SuperH is a RISC processor targeted for use in embedded systems 38 The SuperH is a RISC processor targeted for use in embedded systems
37 and consumer electronics; it was also used in the Sega Dreamcast 39 and consumer electronics; it was also used in the Sega Dreamcast
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index 46edf070da1c..aed701c7b11b 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -9,6 +9,12 @@
9# License. See the file "COPYING" in the main directory of this archive 9# License. See the file "COPYING" in the main directory of this archive
10# for more details. 10# for more details.
11# 11#
12ifneq ($(SUBARCH),$(ARCH))
13 ifeq ($(CROSS_COMPILE),)
14 CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux- $(UTS_MACHINE)-linux-gnu- $(UTS_MACHINE)-unknown-linux-gnu-)
15 endif
16endif
17
12isa-y := any 18isa-y := any
13isa-$(CONFIG_SH_DSP) := sh 19isa-$(CONFIG_SH_DSP) := sh
14isa-$(CONFIG_CPU_SH2) := sh2 20isa-$(CONFIG_CPU_SH2) := sh2
@@ -106,19 +112,13 @@ LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
106KBUILD_DEFCONFIG := cayman_defconfig 112KBUILD_DEFCONFIG := cayman_defconfig
107endif 113endif
108 114
109ifneq ($(SUBARCH),$(ARCH))
110 ifeq ($(CROSS_COMPILE),)
111 CROSS_COMPILE := $(call cc-cross-prefix, $(UTS_MACHINE)-linux- $(UTS_MACHINE)-linux-gnu- $(UTS_MACHINE)-unknown-linux-gnu-)
112 endif
113endif
114
115ifdef CONFIG_CPU_LITTLE_ENDIAN 115ifdef CONFIG_CPU_LITTLE_ENDIAN
116ld-bfd := elf32-$(UTS_MACHINE)-linux 116ld-bfd := elf32-$(UTS_MACHINE)-linux
117LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' --oformat $(ld-bfd) 117LDFLAGS_vmlinux += --defsym jiffies=jiffies_64 --oformat $(ld-bfd)
118LDFLAGS += -EL 118LDFLAGS += -EL
119else 119else
120ld-bfd := elf32-$(UTS_MACHINE)big-linux 120ld-bfd := elf32-$(UTS_MACHINE)big-linux
121LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4' --oformat $(ld-bfd) 121LDFLAGS_vmlinux += --defsym jiffies=jiffies_64+4 --oformat $(ld-bfd)
122LDFLAGS += -EB 122LDFLAGS += -EB
123endif 123endif
124 124
diff --git a/arch/sh/boards/mach-kfr2r09/setup.c b/arch/sh/boards/mach-kfr2r09/setup.c
index 158c9176e42a..43a179ce9afc 100644
--- a/arch/sh/boards/mach-kfr2r09/setup.c
+++ b/arch/sh/boards/mach-kfr2r09/setup.c
@@ -201,8 +201,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {
201 .flags = IORESOURCE_MEM, 201 .flags = IORESOURCE_MEM,
202 }, 202 },
203 [1] = { 203 [1] = {
204 .start = evtirq(0xa20), 204 .start = evt2irq(0xa20),
205 .end = evtirq(0xa20), 205 .end = evt2irq(0xa20),
206 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, 206 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
207 }, 207 },
208}; 208};
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c
index c045142f7338..9e702f2f8045 100644
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@ -239,7 +239,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
239 clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR); 239 clk->enable_reg = (void __iomem *)(chan->reg_base + SH4A_PCIEPHYCTLR);
240 clk->enable_bit = BITS_CKE; 240 clk->enable_bit = BITS_CKE;
241 241
242 ret = sh_clk_mstp32_register(clk, 1); 242 ret = sh_clk_mstp_register(clk, 1);
243 if (unlikely(ret < 0)) 243 if (unlikely(ret < 0))
244 goto err_phy; 244 goto err_phy;
245 245
diff --git a/arch/sh/include/asm/Kbuild b/arch/sh/include/asm/Kbuild
index 7beb42322f60..7b673ddcd555 100644
--- a/arch/sh/include/asm/Kbuild
+++ b/arch/sh/include/asm/Kbuild
@@ -1,5 +1,39 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3generic-y += bitsperlong.h
4generic-y += cputime.h
5generic-y += current.h
6generic-y += delay.h
7generic-y += div64.h
8generic-y += emergency-restart.h
9generic-y += errno.h
10generic-y += fcntl.h
11generic-y += ioctl.h
12generic-y += ipcbuf.h
13generic-y += irq_regs.h
14generic-y += kvm_para.h
15generic-y += local.h
16generic-y += local64.h
17generic-y += param.h
18generic-y += parport.h
19generic-y += percpu.h
20generic-y += poll.h
21generic-y += mman.h
22generic-y += msgbuf.h
23generic-y += resource.h
24generic-y += scatterlist.h
25generic-y += sembuf.h
26generic-y += serial.h
27generic-y += shmbuf.h
28generic-y += siginfo.h
29generic-y += sizes.h
30generic-y += socket.h
31generic-y += statfs.h
32generic-y += termbits.h
33generic-y += termios.h
34generic-y += ucontext.h
35generic-y += xor.h
36
3header-y += cachectl.h 37header-y += cachectl.h
4header-y += cpu-features.h 38header-y += cpu-features.h
5header-y += hw_breakpoint.h 39header-y += hw_breakpoint.h
diff --git a/arch/sh/include/asm/bitsperlong.h b/arch/sh/include/asm/bitsperlong.h
deleted file mode 100644
index 6dc0bb0c13b2..000000000000
--- a/arch/sh/include/asm/bitsperlong.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/bitsperlong.h>
diff --git a/arch/sh/include/asm/cputime.h b/arch/sh/include/asm/cputime.h
deleted file mode 100644
index 6ca395d1393e..000000000000
--- a/arch/sh/include/asm/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __SH_CPUTIME_H
2#define __SH_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __SH_CPUTIME_H */
diff --git a/arch/sh/include/asm/current.h b/arch/sh/include/asm/current.h
deleted file mode 100644
index 4c51401b5537..000000000000
--- a/arch/sh/include/asm/current.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/current.h>
diff --git a/arch/sh/include/asm/delay.h b/arch/sh/include/asm/delay.h
deleted file mode 100644
index 9670e127b7b2..000000000000
--- a/arch/sh/include/asm/delay.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/delay.h>
diff --git a/arch/sh/include/asm/div64.h b/arch/sh/include/asm/div64.h
deleted file mode 100644
index 6cd978cefb28..000000000000
--- a/arch/sh/include/asm/div64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/div64.h>
diff --git a/arch/sh/include/asm/emergency-restart.h b/arch/sh/include/asm/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/arch/sh/include/asm/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/arch/sh/include/asm/errno.h b/arch/sh/include/asm/errno.h
deleted file mode 100644
index 51cf6f9cebb8..000000000000
--- a/arch/sh/include/asm/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH_ERRNO_H
2#define __ASM_SH_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* __ASM_SH_ERRNO_H */
diff --git a/arch/sh/include/asm/fcntl.h b/arch/sh/include/asm/fcntl.h
deleted file mode 100644
index 46ab12db5739..000000000000
--- a/arch/sh/include/asm/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/fcntl.h>
diff --git a/arch/sh/include/asm/io_noioport.h b/arch/sh/include/asm/io_noioport.h
index e136d28d1d2e..4d48f1436a63 100644
--- a/arch/sh/include/asm/io_noioport.h
+++ b/arch/sh/include/asm/io_noioport.h
@@ -19,9 +19,20 @@ static inline u32 inl(unsigned long addr)
19 return -1; 19 return -1;
20} 20}
21 21
22#define outb(x, y) BUG() 22static inline void outb(unsigned char x, unsigned long port)
23#define outw(x, y) BUG() 23{
24#define outl(x, y) BUG() 24 BUG();
25}
26
27static inline void outw(unsigned short x, unsigned long port)
28{
29 BUG();
30}
31
32static inline void outl(unsigned int x, unsigned long port)
33{
34 BUG();
35}
25 36
26#define inb_p(addr) inb(addr) 37#define inb_p(addr) inb(addr)
27#define inw_p(addr) inw(addr) 38#define inw_p(addr) inw(addr)
diff --git a/arch/sh/include/asm/ioctl.h b/arch/sh/include/asm/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/arch/sh/include/asm/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/arch/sh/include/asm/ipcbuf.h b/arch/sh/include/asm/ipcbuf.h
deleted file mode 100644
index 84c7e51cb6d0..000000000000
--- a/arch/sh/include/asm/ipcbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ipcbuf.h>
diff --git a/arch/sh/include/asm/irq_regs.h b/arch/sh/include/asm/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/arch/sh/include/asm/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/arch/sh/include/asm/kvm_para.h b/arch/sh/include/asm/kvm_para.h
deleted file mode 100644
index 14fab8f0b957..000000000000
--- a/arch/sh/include/asm/kvm_para.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kvm_para.h>
diff --git a/arch/sh/include/asm/local.h b/arch/sh/include/asm/local.h
deleted file mode 100644
index 9ed9b9cb459a..000000000000
--- a/arch/sh/include/asm/local.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH_LOCAL_H
2#define __ASM_SH_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* __ASM_SH_LOCAL_H */
7
diff --git a/arch/sh/include/asm/local64.h b/arch/sh/include/asm/local64.h
deleted file mode 100644
index 36c93b5cc239..000000000000
--- a/arch/sh/include/asm/local64.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/local64.h>
diff --git a/arch/sh/include/asm/mman.h b/arch/sh/include/asm/mman.h
deleted file mode 100644
index 8eebf89f5ab1..000000000000
--- a/arch/sh/include/asm/mman.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/mman.h>
diff --git a/arch/sh/include/asm/msgbuf.h b/arch/sh/include/asm/msgbuf.h
deleted file mode 100644
index 809134c644a6..000000000000
--- a/arch/sh/include/asm/msgbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/msgbuf.h>
diff --git a/arch/sh/include/asm/param.h b/arch/sh/include/asm/param.h
deleted file mode 100644
index 965d45427975..000000000000
--- a/arch/sh/include/asm/param.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/param.h>
diff --git a/arch/sh/include/asm/parport.h b/arch/sh/include/asm/parport.h
deleted file mode 100644
index cf252af64590..000000000000
--- a/arch/sh/include/asm/parport.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/parport.h>
diff --git a/arch/sh/include/asm/percpu.h b/arch/sh/include/asm/percpu.h
deleted file mode 100644
index 4db4b39a4399..000000000000
--- a/arch/sh/include/asm/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ARCH_SH_PERCPU
2#define __ARCH_SH_PERCPU
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ARCH_SH_PERCPU */
diff --git a/arch/sh/include/asm/poll.h b/arch/sh/include/asm/poll.h
deleted file mode 100644
index c98509d3149e..000000000000
--- a/arch/sh/include/asm/poll.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/poll.h>
diff --git a/arch/sh/include/asm/resource.h b/arch/sh/include/asm/resource.h
deleted file mode 100644
index 9c2499a86ec0..000000000000
--- a/arch/sh/include/asm/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH_RESOURCE_H
2#define __ASM_SH_RESOURCE_H
3
4#include <asm-generic/resource.h>
5
6#endif /* __ASM_SH_RESOURCE_H */
diff --git a/arch/sh/include/asm/scatterlist.h b/arch/sh/include/asm/scatterlist.h
deleted file mode 100644
index 98dfc3510f10..000000000000
--- a/arch/sh/include/asm/scatterlist.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH_SCATTERLIST_H
2#define __ASM_SH_SCATTERLIST_H
3
4#include <asm-generic/scatterlist.h>
5
6#endif /* __ASM_SH_SCATTERLIST_H */
diff --git a/arch/sh/include/asm/sembuf.h b/arch/sh/include/asm/sembuf.h
deleted file mode 100644
index 7673b83cfef7..000000000000
--- a/arch/sh/include/asm/sembuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/sembuf.h>
diff --git a/arch/sh/include/asm/serial.h b/arch/sh/include/asm/serial.h
deleted file mode 100644
index a0cb0caff152..000000000000
--- a/arch/sh/include/asm/serial.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/serial.h>
diff --git a/arch/sh/include/asm/shmbuf.h b/arch/sh/include/asm/shmbuf.h
deleted file mode 100644
index 83c05fc2de38..000000000000
--- a/arch/sh/include/asm/shmbuf.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/shmbuf.h>
diff --git a/arch/sh/include/asm/siginfo.h b/arch/sh/include/asm/siginfo.h
deleted file mode 100644
index 813040ed68a9..000000000000
--- a/arch/sh/include/asm/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH_SIGINFO_H
2#define __ASM_SH_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif /* __ASM_SH_SIGINFO_H */
diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h
deleted file mode 100644
index dd248c2e1085..000000000000
--- a/arch/sh/include/asm/sizes.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/sizes.h>
diff --git a/arch/sh/include/asm/socket.h b/arch/sh/include/asm/socket.h
deleted file mode 100644
index 6b71384b9d8b..000000000000
--- a/arch/sh/include/asm/socket.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/socket.h>
diff --git a/arch/sh/include/asm/statfs.h b/arch/sh/include/asm/statfs.h
deleted file mode 100644
index 9202a023328f..000000000000
--- a/arch/sh/include/asm/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH_STATFS_H
2#define __ASM_SH_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* __ASM_SH_STATFS_H */
diff --git a/arch/sh/include/asm/termbits.h b/arch/sh/include/asm/termbits.h
deleted file mode 100644
index 3935b106de79..000000000000
--- a/arch/sh/include/asm/termbits.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/termbits.h>
diff --git a/arch/sh/include/asm/termios.h b/arch/sh/include/asm/termios.h
deleted file mode 100644
index 280d78a9d966..000000000000
--- a/arch/sh/include/asm/termios.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/termios.h>
diff --git a/arch/sh/include/asm/uaccess.h b/arch/sh/include/asm/uaccess.h
index 050f221fa898..8698a80ed00c 100644
--- a/arch/sh/include/asm/uaccess.h
+++ b/arch/sh/include/asm/uaccess.h
@@ -25,6 +25,8 @@
25 (__chk_user_ptr(addr), \ 25 (__chk_user_ptr(addr), \
26 __access_ok((unsigned long __force)(addr), (size))) 26 __access_ok((unsigned long __force)(addr), (size)))
27 27
28#define user_addr_max() (current_thread_info()->addr_limit.seg)
29
28/* 30/*
29 * Uh, these should become the main single-value transfer routines ... 31 * Uh, these should become the main single-value transfer routines ...
30 * They automatically use the right size if we just have the right 32 * They automatically use the right size if we just have the right
@@ -100,6 +102,11 @@ struct __large_struct { unsigned long buf[100]; };
100# include "uaccess_64.h" 102# include "uaccess_64.h"
101#endif 103#endif
102 104
105extern long strncpy_from_user(char *dest, const char __user *src, long count);
106
107extern __must_check long strlen_user(const char __user *str);
108extern __must_check long strnlen_user(const char __user *str, long n);
109
103/* Generic arbitrary sized copy. */ 110/* Generic arbitrary sized copy. */
104/* Return the number of bytes NOT copied */ 111/* Return the number of bytes NOT copied */
105__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); 112__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
@@ -137,37 +144,6 @@ __kernel_size_t __clear_user(void *addr, __kernel_size_t size);
137 __cl_size; \ 144 __cl_size; \
138}) 145})
139 146
140/**
141 * strncpy_from_user: - Copy a NUL terminated string from userspace.
142 * @dst: Destination address, in kernel space. This buffer must be at
143 * least @count bytes long.
144 * @src: Source address, in user space.
145 * @count: Maximum number of bytes to copy, including the trailing NUL.
146 *
147 * Copies a NUL-terminated string from userspace to kernel space.
148 *
149 * On success, returns the length of the string (not including the trailing
150 * NUL).
151 *
152 * If access to userspace fails, returns -EFAULT (some data may have been
153 * copied).
154 *
155 * If @count is smaller than the length of the string, copies @count bytes
156 * and returns @count.
157 */
158#define strncpy_from_user(dest,src,count) \
159({ \
160 unsigned long __sfu_src = (unsigned long)(src); \
161 int __sfu_count = (int)(count); \
162 long __sfu_res = -EFAULT; \
163 \
164 if (__access_ok(__sfu_src, __sfu_count)) \
165 __sfu_res = __strncpy_from_user((unsigned long)(dest), \
166 __sfu_src, __sfu_count); \
167 \
168 __sfu_res; \
169})
170
171static inline unsigned long 147static inline unsigned long
172copy_from_user(void *to, const void __user *from, unsigned long n) 148copy_from_user(void *to, const void __user *from, unsigned long n)
173{ 149{
@@ -192,43 +168,6 @@ copy_to_user(void __user *to, const void *from, unsigned long n)
192 return __copy_size; 168 return __copy_size;
193} 169}
194 170
195/**
196 * strnlen_user: - Get the size of a string in user space.
197 * @s: The string to measure.
198 * @n: The maximum valid length
199 *
200 * Context: User context only. This function may sleep.
201 *
202 * Get the size of a NUL-terminated string in user space.
203 *
204 * Returns the size of the string INCLUDING the terminating NUL.
205 * On exception, returns 0.
206 * If the string is too long, returns a value greater than @n.
207 */
208static inline long strnlen_user(const char __user *s, long n)
209{
210 if (!__addr_ok(s))
211 return 0;
212 else
213 return __strnlen_user(s, n);
214}
215
216/**
217 * strlen_user: - Get the size of a string in user space.
218 * @str: The string to measure.
219 *
220 * Context: User context only. This function may sleep.
221 *
222 * Get the size of a NUL-terminated string in user space.
223 *
224 * Returns the size of the string INCLUDING the terminating NUL.
225 * On exception, returns 0.
226 *
227 * If there is a limit on the length of a valid string, you may wish to
228 * consider using strnlen_user() instead.
229 */
230#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
231
232/* 171/*
233 * The exception table consists of pairs of addresses: the first is the 172 * The exception table consists of pairs of addresses: the first is the
234 * address of an instruction that is allowed to fault, and the second is 173 * address of an instruction that is allowed to fault, and the second is
diff --git a/arch/sh/include/asm/uaccess_32.h b/arch/sh/include/asm/uaccess_32.h
index ae0d24f6653f..c0de7ee35ab7 100644
--- a/arch/sh/include/asm/uaccess_32.h
+++ b/arch/sh/include/asm/uaccess_32.h
@@ -170,79 +170,4 @@ __asm__ __volatile__( \
170 170
171extern void __put_user_unknown(void); 171extern void __put_user_unknown(void);
172 172
173static inline int
174__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count)
175{
176 __kernel_size_t res;
177 unsigned long __dummy, _d, _s, _c;
178
179 __asm__ __volatile__(
180 "9:\n"
181 "mov.b @%2+, %1\n\t"
182 "cmp/eq #0, %1\n\t"
183 "bt/s 2f\n"
184 "1:\n"
185 "mov.b %1, @%3\n\t"
186 "dt %4\n\t"
187 "bf/s 9b\n\t"
188 " add #1, %3\n\t"
189 "2:\n\t"
190 "sub %4, %0\n"
191 "3:\n"
192 ".section .fixup,\"ax\"\n"
193 "4:\n\t"
194 "mov.l 5f, %1\n\t"
195 "jmp @%1\n\t"
196 " mov %9, %0\n\t"
197 ".balign 4\n"
198 "5: .long 3b\n"
199 ".previous\n"
200 ".section __ex_table,\"a\"\n"
201 " .balign 4\n"
202 " .long 9b,4b\n"
203 ".previous"
204 : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c)
205 : "0" (__count), "2" (__src), "3" (__dest), "4" (__count),
206 "i" (-EFAULT)
207 : "memory", "t");
208
209 return res;
210}
211
212/*
213 * Return the size of a string (including the ending 0 even when we have
214 * exceeded the maximum string length).
215 */
216static inline long __strnlen_user(const char __user *__s, long __n)
217{
218 unsigned long res;
219 unsigned long __dummy;
220
221 __asm__ __volatile__(
222 "1:\t"
223 "mov.b @(%0,%3), %1\n\t"
224 "cmp/eq %4, %0\n\t"
225 "bt/s 2f\n\t"
226 " add #1, %0\n\t"
227 "tst %1, %1\n\t"
228 "bf 1b\n\t"
229 "2:\n"
230 ".section .fixup,\"ax\"\n"
231 "3:\n\t"
232 "mov.l 4f, %1\n\t"
233 "jmp @%1\n\t"
234 " mov #0, %0\n"
235 ".balign 4\n"
236 "4: .long 2b\n"
237 ".previous\n"
238 ".section __ex_table,\"a\"\n"
239 " .balign 4\n"
240 " .long 1b,3b\n"
241 ".previous"
242 : "=z" (res), "=&r" (__dummy)
243 : "0" (0), "r" (__s), "r" (__n)
244 : "t");
245 return res;
246}
247
248#endif /* __ASM_SH_UACCESS_32_H */ 173#endif /* __ASM_SH_UACCESS_32_H */
diff --git a/arch/sh/include/asm/uaccess_64.h b/arch/sh/include/asm/uaccess_64.h
index 56fd20b8cdcc..2e07e0f40c6a 100644
--- a/arch/sh/include/asm/uaccess_64.h
+++ b/arch/sh/include/asm/uaccess_64.h
@@ -84,8 +84,4 @@ extern long __put_user_asm_l(void *, long);
84extern long __put_user_asm_q(void *, long); 84extern long __put_user_asm_q(void *, long);
85extern void __put_user_unknown(void); 85extern void __put_user_unknown(void);
86 86
87extern long __strnlen_user(const char *__s, long __n);
88extern int __strncpy_from_user(unsigned long __dest,
89 unsigned long __user __src, int __count);
90
91#endif /* __ASM_SH_UACCESS_64_H */ 87#endif /* __ASM_SH_UACCESS_64_H */
diff --git a/arch/sh/include/asm/ucontext.h b/arch/sh/include/asm/ucontext.h
deleted file mode 100644
index 9bc07b9f30fb..000000000000
--- a/arch/sh/include/asm/ucontext.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ucontext.h>
diff --git a/arch/sh/include/asm/word-at-a-time.h b/arch/sh/include/asm/word-at-a-time.h
new file mode 100644
index 000000000000..6e38953ff7fd
--- /dev/null
+++ b/arch/sh/include/asm/word-at-a-time.h
@@ -0,0 +1,53 @@
1#ifndef __ASM_SH_WORD_AT_A_TIME_H
2#define __ASM_SH_WORD_AT_A_TIME_H
3
4#ifdef CONFIG_CPU_BIG_ENDIAN
5# include <asm-generic/word-at-a-time.h>
6#else
7/*
8 * Little-endian version cribbed from x86.
9 */
10struct word_at_a_time {
11 const unsigned long one_bits, high_bits;
12};
13
14#define WORD_AT_A_TIME_CONSTANTS { REPEAT_BYTE(0x01), REPEAT_BYTE(0x80) }
15
16/* Carl Chatfield / Jan Achrenius G+ version for 32-bit */
17static inline long count_masked_bytes(long mask)
18{
19 /* (000000 0000ff 00ffff ffffff) -> ( 1 1 2 3 ) */
20 long a = (0x0ff0001+mask) >> 23;
21 /* Fix the 1 for 00 case */
22 return a & mask;
23}
24
25/* Return nonzero if it has a zero */
26static inline unsigned long has_zero(unsigned long a, unsigned long *bits, const struct word_at_a_time *c)
27{
28 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits;
29 *bits = mask;
30 return mask;
31}
32
33static inline unsigned long prep_zero_mask(unsigned long a, unsigned long bits, const struct word_at_a_time *c)
34{
35 return bits;
36}
37
38static inline unsigned long create_zero_mask(unsigned long bits)
39{
40 bits = (bits - 1) & ~bits;
41 return bits >> 7;
42}
43
44/* The mask we created is directly usable as a bytemask */
45#define zero_bytemask(mask) (mask)
46
47static inline unsigned long find_zero(unsigned long mask)
48{
49 return count_masked_bytes(mask);
50}
51#endif
52
53#endif
diff --git a/arch/sh/include/asm/xor.h b/arch/sh/include/asm/xor.h
deleted file mode 100644
index c82eb12a5b18..000000000000
--- a/arch/sh/include/asm/xor.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/xor.h>
diff --git a/arch/sh/include/cpu-sh2a/cpu/ubc.h b/arch/sh/include/cpu-sh2a/cpu/ubc.h
deleted file mode 100644
index 1192e1c761a7..000000000000
--- a/arch/sh/include/cpu-sh2a/cpu/ubc.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * SH-2A UBC definitions
3 *
4 * Copyright (C) 2008 Kieran Bingham
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef __ASM_CPU_SH2A_UBC_H
12#define __ASM_CPU_SH2A_UBC_H
13
14#define UBC_BARA 0xfffc0400
15#define UBC_BAMRA 0xfffc0404
16#define UBC_BBRA 0xfffc04a0 /* 16 bit access */
17#define UBC_BDRA 0xfffc0408
18#define UBC_BDMRA 0xfffc040c
19
20#define UBC_BARB 0xfffc0410
21#define UBC_BAMRB 0xfffc0414
22#define UBC_BBRB 0xfffc04b0 /* 16 bit access */
23#define UBC_BDRB 0xfffc0418
24#define UBC_BDMRB 0xfffc041c
25
26#define UBC_BRCR 0xfffc04c0
27
28#endif /* __ASM_CPU_SH2A_UBC_H */
diff --git a/arch/sh/kernel/cpu/sh3/serial-sh7720.c b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
index 8832c526cdf9..c4a0336660dd 100644
--- a/arch/sh/kernel/cpu/sh3/serial-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/serial-sh7720.c
@@ -2,7 +2,7 @@
2#include <linux/serial_core.h> 2#include <linux/serial_core.h>
3#include <linux/io.h> 3#include <linux/io.h>
4#include <cpu/serial.h> 4#include <cpu/serial.h>
5#include <asm/gpio.h> 5#include <cpu/gpio.h>
6 6
7static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag) 7static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
8{ 8{
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
index ea01a72f1b94..53638e231cd0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7343.c
@@ -283,7 +283,7 @@ int __init arch_clk_init(void)
283 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 283 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
284 284
285 if (!ret) 285 if (!ret)
286 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 286 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
287 287
288 return ret; 288 return ret;
289} 289}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
index 7ac07b4f75de..22e485d1990b 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7366.c
@@ -276,7 +276,7 @@ int __init arch_clk_init(void)
276 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 276 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
277 277
278 if (!ret) 278 if (!ret)
279 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 279 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
280 280
281 return ret; 281 return ret;
282} 282}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
index 8e1f97010c0d..c4cb740e4d10 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c
@@ -261,7 +261,7 @@ int __init arch_clk_init(void)
261 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 261 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
262 262
263 if (!ret) 263 if (!ret)
264 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 264 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
265 265
266 return ret; 266 return ret;
267} 267}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
index 35f75cf0c7e5..37c41c7747a3 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7723.c
@@ -311,7 +311,7 @@ int __init arch_clk_init(void)
311 ret = sh_clk_div6_register(div6_clks, DIV6_NR); 311 ret = sh_clk_div6_register(div6_clks, DIV6_NR);
312 312
313 if (!ret) 313 if (!ret)
314 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 314 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
315 315
316 return ret; 316 return ret;
317} 317}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
index 2a87901673fe..c87e78f73234 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7724.c
@@ -375,7 +375,7 @@ int __init arch_clk_init(void)
375 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR); 375 ret = sh_clk_div6_reparent_register(div6_clks, DIV6_NR);
376 376
377 if (!ret) 377 if (!ret)
378 ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); 378 ret = sh_clk_mstp_register(mstp_clks, HWBLK_NR);
379 379
380 return ret; 380 return ret;
381} 381}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
index 1697642c1f73..deb683abacf0 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7734.c
@@ -260,7 +260,7 @@ int __init arch_clk_init(void)
260 &div4_table); 260 &div4_table);
261 261
262 if (!ret) 262 if (!ret)
263 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 263 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
264 264
265 return ret; 265 return ret;
266} 266}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 04ab5aeaf920..e84a43229b9c 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -148,7 +148,7 @@ int __init arch_clk_init(void)
148 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 148 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
149 &div4_table); 149 &div4_table);
150 if (!ret) 150 if (!ret)
151 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 151 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
152 152
153 return ret; 153 return ret;
154} 154}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
index ab1c58f2d101..1c83788db76a 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7785.c
@@ -175,7 +175,7 @@ int __init arch_clk_init(void)
175 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 175 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
176 &div4_table); 176 &div4_table);
177 if (!ret) 177 if (!ret)
178 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 178 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
179 179
180 return ret; 180 return ret;
181} 181}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
index 491709483e10..8bba6f159023 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7786.c
@@ -194,7 +194,7 @@ int __init arch_clk_init(void)
194 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 194 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
195 &div4_table); 195 &div4_table);
196 if (!ret) 196 if (!ret)
197 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 197 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
198 198
199 return ret; 199 return ret;
200} 200}
diff --git a/arch/sh/kernel/cpu/sh4a/clock-shx3.c b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
index 0f11b392bf46..a9422dab0ce7 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-shx3.c
@@ -149,7 +149,7 @@ int __init arch_clk_init(void)
149 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks), 149 ret = sh_clk_div4_register(div4_clks, ARRAY_SIZE(div4_clks),
150 &div4_table); 150 &div4_table);
151 if (!ret) 151 if (!ret)
152 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR); 152 ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
153 153
154 return ret; 154 return ret;
155} 155}
diff --git a/arch/sh/kernel/cpu/sh5/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index ff1f0e6e9bec..b7cf6a547f11 100644
--- a/arch/sh/kernel/cpu/sh5/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -1569,86 +1569,6 @@ ___clear_user_exit:
1569#endif /* CONFIG_MMU */ 1569#endif /* CONFIG_MMU */
1570 1570
1571/* 1571/*
1572 * int __strncpy_from_user(unsigned long __dest, unsigned long __src,
1573 * int __count)
1574 *
1575 * Inputs:
1576 * (r2) target address
1577 * (r3) source address
1578 * (r4) maximum size in bytes
1579 *
1580 * Ouputs:
1581 * (*r2) copied data
1582 * (r2) -EFAULT (in case of faulting)
1583 * copied data (otherwise)
1584 */
1585 .global __strncpy_from_user
1586__strncpy_from_user:
1587 pta ___strncpy_from_user1, tr0
1588 pta ___strncpy_from_user_done, tr1
1589 or r4, ZERO, r5 /* r5 = original count */
1590 beq/u r4, r63, tr1 /* early exit if r4==0 */
1591 movi -(EFAULT), r6 /* r6 = reply, no real fixup */
1592 or ZERO, ZERO, r7 /* r7 = data, clear top byte of data */
1593
1594___strncpy_from_user1:
1595 ld.b r3, 0, r7 /* Fault address: only in reading */
1596 st.b r2, 0, r7
1597 addi r2, 1, r2
1598 addi r3, 1, r3
1599 beq/u ZERO, r7, tr1
1600 addi r4, -1, r4 /* return real number of copied bytes */
1601 bne/l ZERO, r4, tr0
1602
1603___strncpy_from_user_done:
1604 sub r5, r4, r6 /* If done, return copied */
1605
1606___strncpy_from_user_exit:
1607 or r6, ZERO, r2
1608 ptabs LINK, tr0
1609 blink tr0, ZERO
1610
1611/*
1612 * extern long __strnlen_user(const char *__s, long __n)
1613 *
1614 * Inputs:
1615 * (r2) source address
1616 * (r3) source size in bytes
1617 *
1618 * Ouputs:
1619 * (r2) -EFAULT (in case of faulting)
1620 * string length (otherwise)
1621 */
1622 .global __strnlen_user
1623__strnlen_user:
1624 pta ___strnlen_user_set_reply, tr0
1625 pta ___strnlen_user1, tr1
1626 or ZERO, ZERO, r5 /* r5 = counter */
1627 movi -(EFAULT), r6 /* r6 = reply, no real fixup */
1628 or ZERO, ZERO, r7 /* r7 = data, clear top byte of data */
1629 beq r3, ZERO, tr0
1630
1631___strnlen_user1:
1632 ldx.b r2, r5, r7 /* Fault address: only in reading */
1633 addi r3, -1, r3 /* No real fixup */
1634 addi r5, 1, r5
1635 beq r3, ZERO, tr0
1636 bne r7, ZERO, tr1
1637! The line below used to be active. This meant led to a junk byte lying between each pair
1638! of entries in the argv & envp structures in memory. Whilst the program saw the right data
1639! via the argv and envp arguments to main, it meant the 'flat' representation visible through
1640! /proc/$pid/cmdline was corrupt, causing trouble with ps, for example.
1641! addi r5, 1, r5 /* Include '\0' */
1642
1643___strnlen_user_set_reply:
1644 or r5, ZERO, r6 /* If done, return counter */
1645
1646___strnlen_user_exit:
1647 or r6, ZERO, r2
1648 ptabs LINK, tr0
1649 blink tr0, ZERO
1650
1651/*
1652 * extern long __get_user_asm_?(void *val, long addr) 1572 * extern long __get_user_asm_?(void *val, long addr)
1653 * 1573 *
1654 * Inputs: 1574 * Inputs:
@@ -1982,8 +1902,6 @@ asm_uaccess_start:
1982 .long ___copy_user2, ___copy_user_exit 1902 .long ___copy_user2, ___copy_user_exit
1983 .long ___clear_user1, ___clear_user_exit 1903 .long ___clear_user1, ___clear_user_exit
1984#endif 1904#endif
1985 .long ___strncpy_from_user1, ___strncpy_from_user_exit
1986 .long ___strnlen_user1, ___strnlen_user_exit
1987 .long ___get_user_asm_b1, ___get_user_asm_b_exit 1905 .long ___get_user_asm_b1, ___get_user_asm_b_exit
1988 .long ___get_user_asm_w1, ___get_user_asm_w_exit 1906 .long ___get_user_asm_w1, ___get_user_asm_w_exit
1989 .long ___get_user_asm_l1, ___get_user_asm_l_exit 1907 .long ___get_user_asm_l1, ___get_user_asm_l_exit
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c
index 9b7a459a4613..055d91b70305 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process.c
@@ -4,6 +4,7 @@
4#include <linux/sched.h> 4#include <linux/sched.h>
5#include <linux/export.h> 5#include <linux/export.h>
6#include <linux/stackprotector.h> 6#include <linux/stackprotector.h>
7#include <asm/fpu.h>
7 8
8struct kmem_cache *task_xstate_cachep = NULL; 9struct kmem_cache *task_xstate_cachep = NULL;
9unsigned int xstate_size; 10unsigned int xstate_size;
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 4264583eabac..602545b12a86 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -33,6 +33,7 @@
33#include <asm/switch_to.h> 33#include <asm/switch_to.h>
34 34
35struct task_struct *last_task_used_math = NULL; 35struct task_struct *last_task_used_math = NULL;
36struct pt_regs fake_swapper_regs = { 0, };
36 37
37void show_regs(struct pt_regs *regs) 38void show_regs(struct pt_regs *regs)
38{ 39{
diff --git a/arch/sh/kernel/sh_ksyms_64.c b/arch/sh/kernel/sh_ksyms_64.c
index 45afa5c51f67..26a0774f5272 100644
--- a/arch/sh/kernel/sh_ksyms_64.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -32,8 +32,6 @@ EXPORT_SYMBOL(__get_user_asm_b);
32EXPORT_SYMBOL(__get_user_asm_w); 32EXPORT_SYMBOL(__get_user_asm_w);
33EXPORT_SYMBOL(__get_user_asm_l); 33EXPORT_SYMBOL(__get_user_asm_l);
34EXPORT_SYMBOL(__get_user_asm_q); 34EXPORT_SYMBOL(__get_user_asm_q);
35EXPORT_SYMBOL(__strnlen_user);
36EXPORT_SYMBOL(__strncpy_from_user);
37EXPORT_SYMBOL(__clear_user); 35EXPORT_SYMBOL(__clear_user);
38EXPORT_SYMBOL(copy_page); 36EXPORT_SYMBOL(copy_page);
39EXPORT_SYMBOL(__copy_user); 37EXPORT_SYMBOL(__copy_user);
diff --git a/arch/sparc/include/asm/cmt.h b/arch/sparc/include/asm/cmt.h
deleted file mode 100644
index 870db5928577..000000000000
--- a/arch/sparc/include/asm/cmt.h
+++ /dev/null
@@ -1,59 +0,0 @@
1#ifndef _SPARC64_CMT_H
2#define _SPARC64_CMT_H
3
4/* cmt.h: Chip Multi-Threading register definitions
5 *
6 * Copyright (C) 2004 David S. Miller (davem@redhat.com)
7 */
8
9/* ASI_CORE_ID - private */
10#define LP_ID 0x0000000000000010UL
11#define LP_ID_MAX 0x00000000003f0000UL
12#define LP_ID_ID 0x000000000000003fUL
13
14/* ASI_INTR_ID - private */
15#define LP_INTR_ID 0x0000000000000000UL
16#define LP_INTR_ID_ID 0x00000000000003ffUL
17
18/* ASI_CESR_ID - private */
19#define CESR_ID 0x0000000000000040UL
20#define CESR_ID_ID 0x00000000000000ffUL
21
22/* ASI_CORE_AVAILABLE - shared */
23#define LP_AVAIL 0x0000000000000000UL
24#define LP_AVAIL_1 0x0000000000000002UL
25#define LP_AVAIL_0 0x0000000000000001UL
26
27/* ASI_CORE_ENABLE_STATUS - shared */
28#define LP_ENAB_STAT 0x0000000000000010UL
29#define LP_ENAB_STAT_1 0x0000000000000002UL
30#define LP_ENAB_STAT_0 0x0000000000000001UL
31
32/* ASI_CORE_ENABLE - shared */
33#define LP_ENAB 0x0000000000000020UL
34#define LP_ENAB_1 0x0000000000000002UL
35#define LP_ENAB_0 0x0000000000000001UL
36
37/* ASI_CORE_RUNNING - shared */
38#define LP_RUNNING_RW 0x0000000000000050UL
39#define LP_RUNNING_W1S 0x0000000000000060UL
40#define LP_RUNNING_W1C 0x0000000000000068UL
41#define LP_RUNNING_1 0x0000000000000002UL
42#define LP_RUNNING_0 0x0000000000000001UL
43
44/* ASI_CORE_RUNNING_STAT - shared */
45#define LP_RUN_STAT 0x0000000000000058UL
46#define LP_RUN_STAT_1 0x0000000000000002UL
47#define LP_RUN_STAT_0 0x0000000000000001UL
48
49/* ASI_XIR_STEERING - shared */
50#define LP_XIR_STEER 0x0000000000000030UL
51#define LP_XIR_STEER_1 0x0000000000000002UL
52#define LP_XIR_STEER_0 0x0000000000000001UL
53
54/* ASI_CMT_ERROR_STEERING - shared */
55#define CMT_ER_STEER 0x0000000000000040UL
56#define CMT_ER_STEER_1 0x0000000000000002UL
57#define CMT_ER_STEER_0 0x0000000000000001UL
58
59#endif /* _SPARC64_CMT_H */
diff --git a/arch/sparc/include/asm/mpmbox.h b/arch/sparc/include/asm/mpmbox.h
deleted file mode 100644
index f8423039b242..000000000000
--- a/arch/sparc/include/asm/mpmbox.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * mpmbox.h: Interface and defines for the OpenProm mailbox
3 * facilities for MP machines under Linux.
4 *
5 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
6 */
7
8#ifndef _SPARC_MPMBOX_H
9#define _SPARC_MPMBOX_H
10
11/* The prom allocates, for each CPU on the machine an unsigned
12 * byte in physical ram. You probe the device tree prom nodes
13 * for these values. The purpose of this byte is to be able to
14 * pass messages from one cpu to another.
15 */
16
17/* These are the main message types we have to look for in our
18 * Cpu mailboxes, based upon these values we decide what course
19 * of action to take.
20 */
21
22/* The CPU is executing code in the kernel. */
23#define MAILBOX_ISRUNNING 0xf0
24
25/* Another CPU called romvec->pv_exit(), you should call
26 * prom_stopcpu() when you see this in your mailbox.
27 */
28#define MAILBOX_EXIT 0xfb
29
30/* Another CPU called romvec->pv_enter(), you should call
31 * prom_cpuidle() when this is seen.
32 */
33#define MAILBOX_GOSPIN 0xfc
34
35/* Another CPU has hit a breakpoint either into kadb or the prom
36 * itself. Just like MAILBOX_GOSPIN, you should call prom_cpuidle()
37 * at this point.
38 */
39#define MAILBOX_BPT_SPIN 0xfd
40
41/* Oh geese, some other nitwit got a damn watchdog reset. The party's
42 * over so go call prom_stopcpu().
43 */
44#define MAILBOX_WDOG_STOP 0xfe
45
46#ifndef __ASSEMBLY__
47
48/* Handy macro's to determine a cpu's state. */
49
50/* Is the cpu still in Power On Self Test? */
51#define MBOX_POST_P(letter) ((letter) >= 0x00 && (letter) <= 0x7f)
52
53/* Is the cpu at the 'ok' prompt of the PROM? */
54#define MBOX_PROMPROMPT_P(letter) ((letter) >= 0x80 && (letter) <= 0x8f)
55
56/* Is the cpu spinning in the PROM? */
57#define MBOX_PROMSPIN_P(letter) ((letter) >= 0x90 && (letter) <= 0xef)
58
59/* Sanity check... This is junk mail, throw it out. */
60#define MBOX_BOGON_P(letter) ((letter) >= 0xf1 && (letter) <= 0xfa)
61
62/* Is the cpu actively running an application/kernel-code? */
63#define MBOX_RUNNING_P(letter) ((letter) == MAILBOX_ISRUNNING)
64
65#endif /* !(__ASSEMBLY__) */
66
67#endif /* !(_SPARC_MPMBOX_H) */
diff --git a/arch/sparc/kernel/vio.c b/arch/sparc/kernel/vio.c
index 5cffdc55f075..3e244f31e56b 100644
--- a/arch/sparc/kernel/vio.c
+++ b/arch/sparc/kernel/vio.c
@@ -443,7 +443,7 @@ static int __init vio_init(void)
443 root_vdev = vio_create_one(hp, root, NULL); 443 root_vdev = vio_create_one(hp, root, NULL);
444 err = -ENODEV; 444 err = -ENODEV;
445 if (!root_vdev) { 445 if (!root_vdev) {
446 printk(KERN_ERR "VIO: Coult not create root device.\n"); 446 printk(KERN_ERR "VIO: Could not create root device.\n");
447 goto out_release; 447 goto out_release;
448 } 448 }
449 449
diff --git a/arch/tile/include/asm/thread_info.h b/arch/tile/include/asm/thread_info.h
index 7e1fef36bde6..e9c670d7a7fe 100644
--- a/arch/tile/include/asm/thread_info.h
+++ b/arch/tile/include/asm/thread_info.h
@@ -91,11 +91,6 @@ extern void smp_nap(void);
91/* Enable interrupts racelessly and nap forever: helper for cpu_idle(). */ 91/* Enable interrupts racelessly and nap forever: helper for cpu_idle(). */
92extern void _cpu_idle(void); 92extern void _cpu_idle(void);
93 93
94/* Switch boot idle thread to a freshly-allocated stack and free old stack. */
95extern void cpu_idle_on_new_stack(struct thread_info *old_ti,
96 unsigned long new_sp,
97 unsigned long new_ss10);
98
99#else /* __ASSEMBLY__ */ 94#else /* __ASSEMBLY__ */
100 95
101/* 96/*
diff --git a/arch/tile/include/asm/uaccess.h b/arch/tile/include/asm/uaccess.h
index c3dd275f25e2..9ab078a4605d 100644
--- a/arch/tile/include/asm/uaccess.h
+++ b/arch/tile/include/asm/uaccess.h
@@ -146,7 +146,7 @@ extern int fixup_exception(struct pt_regs *regs);
146#ifdef __tilegx__ 146#ifdef __tilegx__
147#define __get_user_1(x, ptr, ret) __get_user_asm(ld1u, x, ptr, ret) 147#define __get_user_1(x, ptr, ret) __get_user_asm(ld1u, x, ptr, ret)
148#define __get_user_2(x, ptr, ret) __get_user_asm(ld2u, x, ptr, ret) 148#define __get_user_2(x, ptr, ret) __get_user_asm(ld2u, x, ptr, ret)
149#define __get_user_4(x, ptr, ret) __get_user_asm(ld4u, x, ptr, ret) 149#define __get_user_4(x, ptr, ret) __get_user_asm(ld4s, x, ptr, ret)
150#define __get_user_8(x, ptr, ret) __get_user_asm(ld, x, ptr, ret) 150#define __get_user_8(x, ptr, ret) __get_user_asm(ld, x, ptr, ret)
151#else 151#else
152#define __get_user_1(x, ptr, ret) __get_user_asm(lb_u, x, ptr, ret) 152#define __get_user_1(x, ptr, ret) __get_user_asm(lb_u, x, ptr, ret)
diff --git a/arch/tile/kernel/backtrace.c b/arch/tile/kernel/backtrace.c
index 9092ce8aa6b4..f8b74ca83b92 100644
--- a/arch/tile/kernel/backtrace.c
+++ b/arch/tile/kernel/backtrace.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/string.h> 16#include <linux/string.h>
17#include <asm/byteorder.h>
17#include <asm/backtrace.h> 18#include <asm/backtrace.h>
18#include <asm/tile-desc.h> 19#include <asm/tile-desc.h>
19#include <arch/abi.h> 20#include <arch/abi.h>
@@ -336,8 +337,12 @@ static void find_caller_pc_and_caller_sp(CallerLocation *location,
336 bytes_to_prefetch / sizeof(tile_bundle_bits); 337 bytes_to_prefetch / sizeof(tile_bundle_bits);
337 } 338 }
338 339
339 /* Decode the next bundle. */ 340 /*
340 bundle.bits = prefetched_bundles[next_bundle++]; 341 * Decode the next bundle.
342 * TILE always stores instruction bundles in little-endian
343 * mode, even when the chip is running in big-endian mode.
344 */
345 bundle.bits = le64_to_cpu(prefetched_bundles[next_bundle++]);
341 bundle.num_insns = 346 bundle.num_insns =
342 parse_insn_tile(bundle.bits, pc, bundle.insns); 347 parse_insn_tile(bundle.bits, pc, bundle.insns);
343 num_info_ops = bt_get_info_ops(&bundle, info_operands); 348 num_info_ops = bt_get_info_ops(&bundle, info_operands);
diff --git a/arch/tile/kernel/entry.S b/arch/tile/kernel/entry.S
index 133c4b56a99e..c31637baff28 100644
--- a/arch/tile/kernel/entry.S
+++ b/arch/tile/kernel/entry.S
@@ -68,20 +68,6 @@ STD_ENTRY(KBacktraceIterator_init_current)
68 jrp lr /* keep backtracer happy */ 68 jrp lr /* keep backtracer happy */
69 STD_ENDPROC(KBacktraceIterator_init_current) 69 STD_ENDPROC(KBacktraceIterator_init_current)
70 70
71/*
72 * Reset our stack to r1/r2 (sp and ksp0+cpu respectively), then
73 * free the old stack (passed in r0) and re-invoke cpu_idle().
74 * We update sp and ksp0 simultaneously to avoid backtracer warnings.
75 */
76STD_ENTRY(cpu_idle_on_new_stack)
77 {
78 move sp, r1
79 mtspr SPR_SYSTEM_SAVE_K_0, r2
80 }
81 jal free_thread_info
82 j cpu_idle
83 STD_ENDPROC(cpu_idle_on_new_stack)
84
85/* Loop forever on a nap during SMP boot. */ 71/* Loop forever on a nap during SMP boot. */
86STD_ENTRY(smp_nap) 72STD_ENTRY(smp_nap)
87 nap 73 nap
diff --git a/arch/tile/kernel/setup.c b/arch/tile/kernel/setup.c
index 6098ccc59be2..dd87f3420390 100644
--- a/arch/tile/kernel/setup.c
+++ b/arch/tile/kernel/setup.c
@@ -29,6 +29,7 @@
29#include <linux/smp.h> 29#include <linux/smp.h>
30#include <linux/timex.h> 30#include <linux/timex.h>
31#include <linux/hugetlb.h> 31#include <linux/hugetlb.h>
32#include <linux/start_kernel.h>
32#include <asm/setup.h> 33#include <asm/setup.h>
33#include <asm/sections.h> 34#include <asm/sections.h>
34#include <asm/cacheflush.h> 35#include <asm/cacheflush.h>
diff --git a/arch/um/drivers/mconsole_kern.c b/arch/um/drivers/mconsole_kern.c
index 88e466b159dc..43b39d61b538 100644
--- a/arch/um/drivers/mconsole_kern.c
+++ b/arch/um/drivers/mconsole_kern.c
@@ -705,7 +705,6 @@ static void stack_proc(void *arg)
705 struct task_struct *from = current, *to = arg; 705 struct task_struct *from = current, *to = arg;
706 706
707 to->thread.saved_task = from; 707 to->thread.saved_task = from;
708 rcu_switch_from(from);
709 switch_to(from, to, from); 708 switch_to(from, to, from);
710} 709}
711 710
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S
index 8bbea6aa40d9..efe5acfc79c3 100644
--- a/arch/x86/boot/header.S
+++ b/arch/x86/boot/header.S
@@ -94,10 +94,10 @@ bs_die:
94 94
95 .section ".bsdata", "a" 95 .section ".bsdata", "a"
96bugger_off_msg: 96bugger_off_msg:
97 .ascii "Direct booting from floppy is no longer supported.\r\n" 97 .ascii "Direct floppy boot is not supported. "
98 .ascii "Please use a boot loader program instead.\r\n" 98 .ascii "Use a boot loader program instead.\r\n"
99 .ascii "\n" 99 .ascii "\n"
100 .ascii "Remove disk and press any key to reboot . . .\r\n" 100 .ascii "Remove disk and press any key to reboot ...\r\n"
101 .byte 0 101 .byte 0
102 102
103#ifdef CONFIG_EFI_STUB 103#ifdef CONFIG_EFI_STUB
@@ -111,7 +111,7 @@ coff_header:
111#else 111#else
112 .word 0x8664 # x86-64 112 .word 0x8664 # x86-64
113#endif 113#endif
114 .word 2 # nr_sections 114 .word 3 # nr_sections
115 .long 0 # TimeDateStamp 115 .long 0 # TimeDateStamp
116 .long 0 # PointerToSymbolTable 116 .long 0 # PointerToSymbolTable
117 .long 1 # NumberOfSymbols 117 .long 1 # NumberOfSymbols
@@ -158,8 +158,8 @@ extra_header_fields:
158#else 158#else
159 .quad 0 # ImageBase 159 .quad 0 # ImageBase
160#endif 160#endif
161 .long 0x1000 # SectionAlignment 161 .long 0x20 # SectionAlignment
162 .long 0x200 # FileAlignment 162 .long 0x20 # FileAlignment
163 .word 0 # MajorOperatingSystemVersion 163 .word 0 # MajorOperatingSystemVersion
164 .word 0 # MinorOperatingSystemVersion 164 .word 0 # MinorOperatingSystemVersion
165 .word 0 # MajorImageVersion 165 .word 0 # MajorImageVersion
@@ -200,8 +200,10 @@ extra_header_fields:
200 200
201 # Section table 201 # Section table
202section_table: 202section_table:
203 .ascii ".text" 203 #
204 .byte 0 204 # The offset & size fields are filled in by build.c.
205 #
206 .ascii ".setup"
205 .byte 0 207 .byte 0
206 .byte 0 208 .byte 0
207 .long 0 209 .long 0
@@ -217,9 +219,8 @@ section_table:
217 219
218 # 220 #
219 # The EFI application loader requires a relocation section 221 # The EFI application loader requires a relocation section
220 # because EFI applications must be relocatable. But since 222 # because EFI applications must be relocatable. The .reloc
221 # we don't need the loader to fixup any relocs for us, we 223 # offset & size fields are filled in by build.c.
222 # just create an empty (zero-length) .reloc section header.
223 # 224 #
224 .ascii ".reloc" 225 .ascii ".reloc"
225 .byte 0 226 .byte 0
@@ -233,6 +234,25 @@ section_table:
233 .word 0 # NumberOfRelocations 234 .word 0 # NumberOfRelocations
234 .word 0 # NumberOfLineNumbers 235 .word 0 # NumberOfLineNumbers
235 .long 0x42100040 # Characteristics (section flags) 236 .long 0x42100040 # Characteristics (section flags)
237
238 #
239 # The offset & size fields are filled in by build.c.
240 #
241 .ascii ".text"
242 .byte 0
243 .byte 0
244 .byte 0
245 .long 0
246 .long 0x0 # startup_{32,64}
247 .long 0 # Size of initialized data
248 # on disk
249 .long 0x0 # startup_{32,64}
250 .long 0 # PointerToRelocations
251 .long 0 # PointerToLineNumbers
252 .word 0 # NumberOfRelocations
253 .word 0 # NumberOfLineNumbers
254 .long 0x60500020 # Characteristics (section flags)
255
236#endif /* CONFIG_EFI_STUB */ 256#endif /* CONFIG_EFI_STUB */
237 257
238 # Kernel attributes; used by setup. This is part 1 of the 258 # Kernel attributes; used by setup. This is part 1 of the
diff --git a/arch/x86/boot/tools/build.c b/arch/x86/boot/tools/build.c
index 3f61f6e2b46f..4b8e165ee572 100644
--- a/arch/x86/boot/tools/build.c
+++ b/arch/x86/boot/tools/build.c
@@ -50,6 +50,8 @@ typedef unsigned int u32;
50u8 buf[SETUP_SECT_MAX*512]; 50u8 buf[SETUP_SECT_MAX*512];
51int is_big_kernel; 51int is_big_kernel;
52 52
53#define PECOFF_RELOC_RESERVE 0x20
54
53/*----------------------------------------------------------------------*/ 55/*----------------------------------------------------------------------*/
54 56
55static const u32 crctab32[] = { 57static const u32 crctab32[] = {
@@ -133,11 +135,103 @@ static void usage(void)
133 die("Usage: build setup system [> image]"); 135 die("Usage: build setup system [> image]");
134} 136}
135 137
136int main(int argc, char ** argv)
137{
138#ifdef CONFIG_EFI_STUB 138#ifdef CONFIG_EFI_STUB
139 unsigned int file_sz, pe_header; 139
140static void update_pecoff_section_header(char *section_name, u32 offset, u32 size)
141{
142 unsigned int pe_header;
143 unsigned short num_sections;
144 u8 *section;
145
146 pe_header = get_unaligned_le32(&buf[0x3c]);
147 num_sections = get_unaligned_le16(&buf[pe_header + 6]);
148
149#ifdef CONFIG_X86_32
150 section = &buf[pe_header + 0xa8];
151#else
152 section = &buf[pe_header + 0xb8];
140#endif 153#endif
154
155 while (num_sections > 0) {
156 if (strncmp((char*)section, section_name, 8) == 0) {
157 /* section header size field */
158 put_unaligned_le32(size, section + 0x8);
159
160 /* section header vma field */
161 put_unaligned_le32(offset, section + 0xc);
162
163 /* section header 'size of initialised data' field */
164 put_unaligned_le32(size, section + 0x10);
165
166 /* section header 'file offset' field */
167 put_unaligned_le32(offset, section + 0x14);
168
169 break;
170 }
171 section += 0x28;
172 num_sections--;
173 }
174}
175
176static void update_pecoff_setup_and_reloc(unsigned int size)
177{
178 u32 setup_offset = 0x200;
179 u32 reloc_offset = size - PECOFF_RELOC_RESERVE;
180 u32 setup_size = reloc_offset - setup_offset;
181
182 update_pecoff_section_header(".setup", setup_offset, setup_size);
183 update_pecoff_section_header(".reloc", reloc_offset, PECOFF_RELOC_RESERVE);
184
185 /*
186 * Modify .reloc section contents with a single entry. The
187 * relocation is applied to offset 10 of the relocation section.
188 */
189 put_unaligned_le32(reloc_offset + 10, &buf[reloc_offset]);
190 put_unaligned_le32(10, &buf[reloc_offset + 4]);
191}
192
193static void update_pecoff_text(unsigned int text_start, unsigned int file_sz)
194{
195 unsigned int pe_header;
196 unsigned int text_sz = file_sz - text_start;
197
198 pe_header = get_unaligned_le32(&buf[0x3c]);
199
200 /* Size of image */
201 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]);
202
203 /*
204 * Size of code: Subtract the size of the first sector (512 bytes)
205 * which includes the header.
206 */
207 put_unaligned_le32(file_sz - 512, &buf[pe_header + 0x1c]);
208
209#ifdef CONFIG_X86_32
210 /*
211 * Address of entry point.
212 *
213 * The EFI stub entry point is +16 bytes from the start of
214 * the .text section.
215 */
216 put_unaligned_le32(text_start + 16, &buf[pe_header + 0x28]);
217#else
218 /*
219 * Address of entry point. startup_32 is at the beginning and
220 * the 64-bit entry point (startup_64) is always 512 bytes
221 * after. The EFI stub entry point is 16 bytes after that, as
222 * the first instruction allows legacy loaders to jump over
223 * the EFI stub initialisation
224 */
225 put_unaligned_le32(text_start + 528, &buf[pe_header + 0x28]);
226#endif /* CONFIG_X86_32 */
227
228 update_pecoff_section_header(".text", text_start, text_sz);
229}
230
231#endif /* CONFIG_EFI_STUB */
232
233int main(int argc, char ** argv)
234{
141 unsigned int i, sz, setup_sectors; 235 unsigned int i, sz, setup_sectors;
142 int c; 236 int c;
143 u32 sys_size; 237 u32 sys_size;
@@ -163,6 +257,12 @@ int main(int argc, char ** argv)
163 die("Boot block hasn't got boot flag (0xAA55)"); 257 die("Boot block hasn't got boot flag (0xAA55)");
164 fclose(file); 258 fclose(file);
165 259
260#ifdef CONFIG_EFI_STUB
261 /* Reserve 0x20 bytes for .reloc section */
262 memset(buf+c, 0, PECOFF_RELOC_RESERVE);
263 c += PECOFF_RELOC_RESERVE;
264#endif
265
166 /* Pad unused space with zeros */ 266 /* Pad unused space with zeros */
167 setup_sectors = (c + 511) / 512; 267 setup_sectors = (c + 511) / 512;
168 if (setup_sectors < SETUP_SECT_MIN) 268 if (setup_sectors < SETUP_SECT_MIN)
@@ -170,6 +270,10 @@ int main(int argc, char ** argv)
170 i = setup_sectors*512; 270 i = setup_sectors*512;
171 memset(buf+c, 0, i-c); 271 memset(buf+c, 0, i-c);
172 272
273#ifdef CONFIG_EFI_STUB
274 update_pecoff_setup_and_reloc(i);
275#endif
276
173 /* Set the default root device */ 277 /* Set the default root device */
174 put_unaligned_le16(DEFAULT_ROOT_DEV, &buf[508]); 278 put_unaligned_le16(DEFAULT_ROOT_DEV, &buf[508]);
175 279
@@ -194,66 +298,8 @@ int main(int argc, char ** argv)
194 put_unaligned_le32(sys_size, &buf[0x1f4]); 298 put_unaligned_le32(sys_size, &buf[0x1f4]);
195 299
196#ifdef CONFIG_EFI_STUB 300#ifdef CONFIG_EFI_STUB
197 file_sz = sz + i + ((sys_size * 16) - sz); 301 update_pecoff_text(setup_sectors * 512, sz + i + ((sys_size * 16) - sz));
198 302#endif
199 pe_header = get_unaligned_le32(&buf[0x3c]);
200
201 /* Size of image */
202 put_unaligned_le32(file_sz, &buf[pe_header + 0x50]);
203
204 /*
205 * Subtract the size of the first section (512 bytes) which
206 * includes the header and .reloc section. The remaining size
207 * is that of the .text section.
208 */
209 file_sz -= 512;
210
211 /* Size of code */
212 put_unaligned_le32(file_sz, &buf[pe_header + 0x1c]);
213
214#ifdef CONFIG_X86_32
215 /*
216 * Address of entry point.
217 *
218 * The EFI stub entry point is +16 bytes from the start of
219 * the .text section.
220 */
221 put_unaligned_le32(i + 16, &buf[pe_header + 0x28]);
222
223 /* .text size */
224 put_unaligned_le32(file_sz, &buf[pe_header + 0xb0]);
225
226 /* .text vma */
227 put_unaligned_le32(0x200, &buf[pe_header + 0xb4]);
228
229 /* .text size of initialised data */
230 put_unaligned_le32(file_sz, &buf[pe_header + 0xb8]);
231
232 /* .text file offset */
233 put_unaligned_le32(0x200, &buf[pe_header + 0xbc]);
234#else
235 /*
236 * Address of entry point. startup_32 is at the beginning and
237 * the 64-bit entry point (startup_64) is always 512 bytes
238 * after. The EFI stub entry point is 16 bytes after that, as
239 * the first instruction allows legacy loaders to jump over
240 * the EFI stub initialisation
241 */
242 put_unaligned_le32(i + 528, &buf[pe_header + 0x28]);
243
244 /* .text size */
245 put_unaligned_le32(file_sz, &buf[pe_header + 0xc0]);
246
247 /* .text vma */
248 put_unaligned_le32(0x200, &buf[pe_header + 0xc4]);
249
250 /* .text size of initialised data */
251 put_unaligned_le32(file_sz, &buf[pe_header + 0xc8]);
252
253 /* .text file offset */
254 put_unaligned_le32(0x200, &buf[pe_header + 0xcc]);
255#endif /* CONFIG_X86_32 */
256#endif /* CONFIG_EFI_STUB */
257 303
258 crc = partial_crc32(buf, i, crc); 304 crc = partial_crc32(buf, i, crc);
259 if (fwrite(buf, 1, i, stdout) != i) 305 if (fwrite(buf, 1, i, stdout) != i)
diff --git a/arch/x86/crypto/aesni-intel_asm.S b/arch/x86/crypto/aesni-intel_asm.S
index be6d9e365a80..3470624d7835 100644
--- a/arch/x86/crypto/aesni-intel_asm.S
+++ b/arch/x86/crypto/aesni-intel_asm.S
@@ -2460,10 +2460,12 @@ ENTRY(aesni_cbc_dec)
2460 pxor IN3, STATE4 2460 pxor IN3, STATE4
2461 movaps IN4, IV 2461 movaps IN4, IV
2462#else 2462#else
2463 pxor (INP), STATE2
2464 pxor 0x10(INP), STATE3
2465 pxor IN1, STATE4 2463 pxor IN1, STATE4
2466 movaps IN2, IV 2464 movaps IN2, IV
2465 movups (INP), IN1
2466 pxor IN1, STATE2
2467 movups 0x10(INP), IN2
2468 pxor IN2, STATE3
2467#endif 2469#endif
2468 movups STATE1, (OUTP) 2470 movups STATE1, (OUTP)
2469 movups STATE2, 0x10(OUTP) 2471 movups STATE2, 0x10(OUTP)
diff --git a/arch/x86/ia32/ia32_signal.c b/arch/x86/ia32/ia32_signal.c
index daeca56211e3..673ac9b63d6b 100644
--- a/arch/x86/ia32/ia32_signal.c
+++ b/arch/x86/ia32/ia32_signal.c
@@ -38,7 +38,7 @@
38int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) 38int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from)
39{ 39{
40 int err = 0; 40 int err = 0;
41 bool ia32 = is_ia32_task(); 41 bool ia32 = test_thread_flag(TIF_IA32);
42 42
43 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t))) 43 if (!access_ok(VERIFY_WRITE, to, sizeof(compat_siginfo_t)))
44 return -EFAULT; 44 return -EFAULT;
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index 340ee49961a6..f91e80f4f180 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -176,7 +176,7 @@
176#define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */ 176#define X86_FEATURE_XSAVEOPT (7*32+ 4) /* Optimized Xsave */
177#define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */ 177#define X86_FEATURE_PLN (7*32+ 5) /* Intel Power Limit Notification */
178#define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */ 178#define X86_FEATURE_PTS (7*32+ 6) /* Intel Package Thermal Status */
179#define X86_FEATURE_DTS (7*32+ 7) /* Digital Thermal Sensor */ 179#define X86_FEATURE_DTHERM (7*32+ 7) /* Digital Thermal Sensor */
180#define X86_FEATURE_HW_PSTATE (7*32+ 8) /* AMD HW-PState */ 180#define X86_FEATURE_HW_PSTATE (7*32+ 8) /* AMD HW-PState */
181 181
182/* Virtualization flags: Linux defined, word 8 */ 182/* Virtualization flags: Linux defined, word 8 */
diff --git a/arch/x86/include/asm/nmi.h b/arch/x86/include/asm/nmi.h
index 0e3793b821ef..dc580c42851c 100644
--- a/arch/x86/include/asm/nmi.h
+++ b/arch/x86/include/asm/nmi.h
@@ -54,6 +54,20 @@ struct nmiaction {
54 __register_nmi_handler((t), &fn##_na); \ 54 __register_nmi_handler((t), &fn##_na); \
55}) 55})
56 56
57/*
58 * For special handlers that register/unregister in the
59 * init section only. This should be considered rare.
60 */
61#define register_nmi_handler_initonly(t, fn, fg, n) \
62({ \
63 static struct nmiaction fn##_na __initdata = { \
64 .handler = (fn), \
65 .name = (n), \
66 .flags = (fg), \
67 }; \
68 __register_nmi_handler((t), &fn##_na); \
69})
70
57int __register_nmi_handler(unsigned int, struct nmiaction *); 71int __register_nmi_handler(unsigned int, struct nmiaction *);
58 72
59void unregister_nmi_handler(unsigned int, const char *); 73void unregister_nmi_handler(unsigned int, const char *);
diff --git a/arch/x86/include/asm/pgtable-3level.h b/arch/x86/include/asm/pgtable-3level.h
index 43876f16caf1..cb00ccc7d571 100644
--- a/arch/x86/include/asm/pgtable-3level.h
+++ b/arch/x86/include/asm/pgtable-3level.h
@@ -47,16 +47,26 @@ static inline void native_set_pte(pte_t *ptep, pte_t pte)
47 * they can run pmd_offset_map_lock or pmd_trans_huge or other pmd 47 * they can run pmd_offset_map_lock or pmd_trans_huge or other pmd
48 * operations. 48 * operations.
49 * 49 *
50 * Without THP if the mmap_sem is hold for reading, the 50 * Without THP if the mmap_sem is hold for reading, the pmd can only
51 * pmd can only transition from null to not null while pmd_read_atomic runs. 51 * transition from null to not null while pmd_read_atomic runs. So
52 * So there's no need of literally reading it atomically. 52 * we can always return atomic pmd values with this function.
53 * 53 *
54 * With THP if the mmap_sem is hold for reading, the pmd can become 54 * With THP if the mmap_sem is hold for reading, the pmd can become
55 * THP or null or point to a pte (and in turn become "stable") at any 55 * trans_huge or none or point to a pte (and in turn become "stable")
56 * time under pmd_read_atomic, so it's mandatory to read it atomically 56 * at any time under pmd_read_atomic. We could read it really
57 * with cmpxchg8b. 57 * atomically here with a atomic64_read for the THP enabled case (and
58 * it would be a whole lot simpler), but to avoid using cmpxchg8b we
59 * only return an atomic pmdval if the low part of the pmdval is later
60 * found stable (i.e. pointing to a pte). And we're returning a none
61 * pmdval if the low part of the pmd is none. In some cases the high
62 * and low part of the pmdval returned may not be consistent if THP is
63 * enabled (the low part may point to previously mapped hugepage,
64 * while the high part may point to a more recently mapped hugepage),
65 * but pmd_none_or_trans_huge_or_clear_bad() only needs the low part
66 * of the pmd to be read atomically to decide if the pmd is unstable
67 * or not, with the only exception of when the low part of the pmd is
68 * zero in which case we return a none pmd.
58 */ 69 */
59#ifndef CONFIG_TRANSPARENT_HUGEPAGE
60static inline pmd_t pmd_read_atomic(pmd_t *pmdp) 70static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
61{ 71{
62 pmdval_t ret; 72 pmdval_t ret;
@@ -74,12 +84,6 @@ static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
74 84
75 return (pmd_t) { ret }; 85 return (pmd_t) { ret };
76} 86}
77#else /* CONFIG_TRANSPARENT_HUGEPAGE */
78static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
79{
80 return (pmd_t) { atomic64_read((atomic64_t *)pmdp) };
81}
82#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
83 87
84static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte) 88static inline void native_set_pte_atomic(pte_t *ptep, pte_t pte)
85{ 89{
diff --git a/arch/x86/include/asm/uaccess.h b/arch/x86/include/asm/uaccess.h
index 04cd6882308e..e1f3a17034fc 100644
--- a/arch/x86/include/asm/uaccess.h
+++ b/arch/x86/include/asm/uaccess.h
@@ -33,9 +33,8 @@
33#define segment_eq(a, b) ((a).seg == (b).seg) 33#define segment_eq(a, b) ((a).seg == (b).seg)
34 34
35#define user_addr_max() (current_thread_info()->addr_limit.seg) 35#define user_addr_max() (current_thread_info()->addr_limit.seg)
36#define __addr_ok(addr) \ 36#define __addr_ok(addr) \
37 ((unsigned long __force)(addr) < \ 37 ((unsigned long __force)(addr) < user_addr_max())
38 (current_thread_info()->addr_limit.seg))
39 38
40/* 39/*
41 * Test whether a block of memory is a valid user space address. 40 * Test whether a block of memory is a valid user space address.
@@ -47,14 +46,14 @@
47 * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry... 46 * This needs 33-bit (65-bit for x86_64) arithmetic. We have a carry...
48 */ 47 */
49 48
50#define __range_not_ok(addr, size) \ 49#define __range_not_ok(addr, size, limit) \
51({ \ 50({ \
52 unsigned long flag, roksum; \ 51 unsigned long flag, roksum; \
53 __chk_user_ptr(addr); \ 52 __chk_user_ptr(addr); \
54 asm("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0" \ 53 asm("add %3,%1 ; sbb %0,%0 ; cmp %1,%4 ; sbb $0,%0" \
55 : "=&r" (flag), "=r" (roksum) \ 54 : "=&r" (flag), "=r" (roksum) \
56 : "1" (addr), "g" ((long)(size)), \ 55 : "1" (addr), "g" ((long)(size)), \
57 "rm" (current_thread_info()->addr_limit.seg)); \ 56 "rm" (limit)); \
58 flag; \ 57 flag; \
59}) 58})
60 59
@@ -77,7 +76,8 @@
77 * checks that the pointer is in the user space range - after calling 76 * checks that the pointer is in the user space range - after calling
78 * this function, memory access functions may still return -EFAULT. 77 * this function, memory access functions may still return -EFAULT.
79 */ 78 */
80#define access_ok(type, addr, size) (likely(__range_not_ok(addr, size) == 0)) 79#define access_ok(type, addr, size) \
80 (likely(__range_not_ok(addr, size, user_addr_max()) == 0))
81 81
82/* 82/*
83 * The exception table consists of pairs of addresses relative to the 83 * The exception table consists of pairs of addresses relative to the
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index becf47b81735..6149b476d9df 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -149,7 +149,6 @@
149/* 4 bits of software ack period */ 149/* 4 bits of software ack period */
150#define UV2_ACK_MASK 0x7UL 150#define UV2_ACK_MASK 0x7UL
151#define UV2_ACK_UNITS_SHFT 3 151#define UV2_ACK_UNITS_SHFT 3
152#define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT
153#define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT 152#define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
154 153
155/* 154/*
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index 8afb69319815..b2297e58c6ed 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -422,12 +422,14 @@ acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
422 return 0; 422 return 0;
423 } 423 }
424 424
425 if (intsrc->source_irq == 0 && intsrc->global_irq == 2) { 425 if (intsrc->source_irq == 0) {
426 if (acpi_skip_timer_override) { 426 if (acpi_skip_timer_override) {
427 printk(PREFIX "BIOS IRQ0 pin2 override ignored.\n"); 427 printk(PREFIX "BIOS IRQ0 override ignored.\n");
428 return 0; 428 return 0;
429 } 429 }
430 if (acpi_fix_pin2_polarity && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) { 430
431 if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity
432 && (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
431 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK; 433 intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
432 printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n"); 434 printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
433 } 435 }
@@ -1334,17 +1336,12 @@ static int __init dmi_disable_acpi(const struct dmi_system_id *d)
1334} 1336}
1335 1337
1336/* 1338/*
1337 * Force ignoring BIOS IRQ0 pin2 override 1339 * Force ignoring BIOS IRQ0 override
1338 */ 1340 */
1339static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d) 1341static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
1340{ 1342{
1341 /*
1342 * The ati_ixp4x0_rev() early PCI quirk should have set
1343 * the acpi_skip_timer_override flag already:
1344 */
1345 if (!acpi_skip_timer_override) { 1343 if (!acpi_skip_timer_override) {
1346 WARN(1, KERN_ERR "ati_ixp4x0 quirk not complete.\n"); 1344 pr_notice("%s detected: Ignoring BIOS IRQ0 override\n",
1347 pr_notice("%s detected: Ignoring BIOS IRQ0 pin2 override\n",
1348 d->ident); 1345 d->ident);
1349 acpi_skip_timer_override = 1; 1346 acpi_skip_timer_override = 1;
1350 } 1347 }
@@ -1438,7 +1435,7 @@ static struct dmi_system_id __initdata acpi_dmi_table_late[] = {
1438 * is enabled. This input is incorrectly designated the 1435 * is enabled. This input is incorrectly designated the
1439 * ISA IRQ 0 via an interrupt source override even though 1436 * ISA IRQ 0 via an interrupt source override even though
1440 * it is wired to the output of the master 8259A and INTIN0 1437 * it is wired to the output of the master 8259A and INTIN0
1441 * is not connected at all. Force ignoring BIOS IRQ0 pin2 1438 * is not connected at all. Force ignoring BIOS IRQ0
1442 * override in that cases. 1439 * override in that cases.
1443 */ 1440 */
1444 { 1441 {
@@ -1473,6 +1470,14 @@ static struct dmi_system_id __initdata acpi_dmi_table_late[] = {
1473 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"), 1470 DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
1474 }, 1471 },
1475 }, 1472 },
1473 {
1474 .callback = dmi_ignore_irq0_timer_override,
1475 .ident = "FUJITSU SIEMENS",
1476 .matches = {
1477 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
1478 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
1479 },
1480 },
1476 {} 1481 {}
1477}; 1482};
1478 1483
diff --git a/arch/x86/kernel/aperture_64.c b/arch/x86/kernel/aperture_64.c
index 6e76c191a835..d5fd66f0d4cd 100644
--- a/arch/x86/kernel/aperture_64.c
+++ b/arch/x86/kernel/aperture_64.c
@@ -20,7 +20,6 @@
20#include <linux/bitops.h> 20#include <linux/bitops.h>
21#include <linux/ioport.h> 21#include <linux/ioport.h>
22#include <linux/suspend.h> 22#include <linux/suspend.h>
23#include <linux/kmemleak.h>
24#include <asm/e820.h> 23#include <asm/e820.h>
25#include <asm/io.h> 24#include <asm/io.h>
26#include <asm/iommu.h> 25#include <asm/iommu.h>
@@ -95,11 +94,6 @@ static u32 __init allocate_aperture(void)
95 return 0; 94 return 0;
96 } 95 }
97 memblock_reserve(addr, aper_size); 96 memblock_reserve(addr, aper_size);
98 /*
99 * Kmemleak should not scan this block as it may not be mapped via the
100 * kernel direct mapping.
101 */
102 kmemleak_ignore(phys_to_virt(addr));
103 printk(KERN_INFO "Mapping aperture over %d KB of RAM @ %lx\n", 97 printk(KERN_INFO "Mapping aperture over %d KB of RAM @ %lx\n",
104 aper_size >> 10, addr); 98 aper_size >> 10, addr);
105 insert_aperture_resource((u32)addr, aper_size); 99 insert_aperture_resource((u32)addr, aper_size);
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index ac96561d1a99..5f0ff597437c 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -1195,7 +1195,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
1195 BUG_ON(!cfg->vector); 1195 BUG_ON(!cfg->vector);
1196 1196
1197 vector = cfg->vector; 1197 vector = cfg->vector;
1198 for_each_cpu_and(cpu, cfg->domain, cpu_online_mask) 1198 for_each_cpu(cpu, cfg->domain)
1199 per_cpu(vector_irq, cpu)[vector] = -1; 1199 per_cpu(vector_irq, cpu)[vector] = -1;
1200 1200
1201 cfg->vector = 0; 1201 cfg->vector = 0;
@@ -1203,7 +1203,7 @@ static void __clear_irq_vector(int irq, struct irq_cfg *cfg)
1203 1203
1204 if (likely(!cfg->move_in_progress)) 1204 if (likely(!cfg->move_in_progress))
1205 return; 1205 return;
1206 for_each_cpu_and(cpu, cfg->old_domain, cpu_online_mask) { 1206 for_each_cpu(cpu, cfg->old_domain) {
1207 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS; 1207 for (vector = FIRST_EXTERNAL_VECTOR; vector < NR_VECTORS;
1208 vector++) { 1208 vector++) {
1209 if (per_cpu(vector_irq, cpu)[vector] != irq) 1209 if (per_cpu(vector_irq, cpu)[vector] != irq)
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 0a687fd185e6..da27c5d2168a 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1274,7 +1274,7 @@ static void mce_timer_fn(unsigned long data)
1274 */ 1274 */
1275 iv = __this_cpu_read(mce_next_interval); 1275 iv = __this_cpu_read(mce_next_interval);
1276 if (mce_notify_irq()) 1276 if (mce_notify_irq())
1277 iv = max(iv, (unsigned long) HZ/100); 1277 iv = max(iv / 2, (unsigned long) HZ/100);
1278 else 1278 else
1279 iv = min(iv * 2, round_jiffies_relative(check_interval * HZ)); 1279 iv = min(iv * 2, round_jiffies_relative(check_interval * HZ));
1280 __this_cpu_write(mce_next_interval, iv); 1280 __this_cpu_write(mce_next_interval, iv);
@@ -1557,7 +1557,7 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
1557static void __mcheck_cpu_init_timer(void) 1557static void __mcheck_cpu_init_timer(void)
1558{ 1558{
1559 struct timer_list *t = &__get_cpu_var(mce_timer); 1559 struct timer_list *t = &__get_cpu_var(mce_timer);
1560 unsigned long iv = __this_cpu_read(mce_next_interval); 1560 unsigned long iv = check_interval * HZ;
1561 1561
1562 setup_timer(t, mce_timer_fn, smp_processor_id()); 1562 setup_timer(t, mce_timer_fn, smp_processor_id());
1563 1563
diff --git a/arch/x86/kernel/cpu/mkcapflags.pl b/arch/x86/kernel/cpu/mkcapflags.pl
index dfea390e1608..c7b3fe2d72e0 100644
--- a/arch/x86/kernel/cpu/mkcapflags.pl
+++ b/arch/x86/kernel/cpu/mkcapflags.pl
@@ -1,4 +1,4 @@
1#!/usr/bin/perl 1#!/usr/bin/perl -w
2# 2#
3# Generate the x86_cap_flags[] array from include/asm-x86/cpufeature.h 3# Generate the x86_cap_flags[] array from include/asm-x86/cpufeature.h
4# 4#
@@ -11,22 +11,35 @@ open(OUT, "> $out\0") or die "$0: cannot create: $out: $!\n";
11print OUT "#include <asm/cpufeature.h>\n\n"; 11print OUT "#include <asm/cpufeature.h>\n\n";
12print OUT "const char * const x86_cap_flags[NCAPINTS*32] = {\n"; 12print OUT "const char * const x86_cap_flags[NCAPINTS*32] = {\n";
13 13
14%features = ();
15$err = 0;
16
14while (defined($line = <IN>)) { 17while (defined($line = <IN>)) {
15 if ($line =~ /^\s*\#\s*define\s+(X86_FEATURE_(\S+))\s+(.*)$/) { 18 if ($line =~ /^\s*\#\s*define\s+(X86_FEATURE_(\S+))\s+(.*)$/) {
16 $macro = $1; 19 $macro = $1;
17 $feature = $2; 20 $feature = "\L$2";
18 $tail = $3; 21 $tail = $3;
19 if ($tail =~ /\/\*\s*\"([^"]*)\".*\*\//) { 22 if ($tail =~ /\/\*\s*\"([^"]*)\".*\*\//) {
20 $feature = $1; 23 $feature = "\L$1";
21 } 24 }
22 25
23 if ($feature ne '') { 26 next if ($feature eq '');
24 printf OUT "\t%-32s = \"%s\",\n", 27
25 "[$macro]", "\L$feature"; 28 if ($features{$feature}++) {
29 print STDERR "$in: duplicate feature name: $feature\n";
30 $err++;
26 } 31 }
32 printf OUT "\t%-32s = \"%s\",\n", "[$macro]", $feature;
27 } 33 }
28} 34}
29print OUT "};\n"; 35print OUT "};\n";
30 36
31close(IN); 37close(IN);
32close(OUT); 38close(OUT);
39
40if ($err) {
41 unlink($out);
42 exit(1);
43}
44
45exit(0);
diff --git a/arch/x86/kernel/cpu/perf_event.c b/arch/x86/kernel/cpu/perf_event.c
index e049d6da0183..c4706cf9c011 100644
--- a/arch/x86/kernel/cpu/perf_event.c
+++ b/arch/x86/kernel/cpu/perf_event.c
@@ -1496,6 +1496,7 @@ static struct cpu_hw_events *allocate_fake_cpuc(void)
1496 if (!cpuc->shared_regs) 1496 if (!cpuc->shared_regs)
1497 goto error; 1497 goto error;
1498 } 1498 }
1499 cpuc->is_fake = 1;
1499 return cpuc; 1500 return cpuc;
1500error: 1501error:
1501 free_fake_cpuc(cpuc); 1502 free_fake_cpuc(cpuc);
@@ -1756,6 +1757,12 @@ perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
1756 dump_trace(NULL, regs, NULL, 0, &backtrace_ops, entry); 1757 dump_trace(NULL, regs, NULL, 0, &backtrace_ops, entry);
1757} 1758}
1758 1759
1760static inline int
1761valid_user_frame(const void __user *fp, unsigned long size)
1762{
1763 return (__range_not_ok(fp, size, TASK_SIZE) == 0);
1764}
1765
1759#ifdef CONFIG_COMPAT 1766#ifdef CONFIG_COMPAT
1760 1767
1761#include <asm/compat.h> 1768#include <asm/compat.h>
@@ -1780,7 +1787,7 @@ perf_callchain_user32(struct pt_regs *regs, struct perf_callchain_entry *entry)
1780 if (bytes != sizeof(frame)) 1787 if (bytes != sizeof(frame))
1781 break; 1788 break;
1782 1789
1783 if (fp < compat_ptr(regs->sp)) 1790 if (!valid_user_frame(fp, sizeof(frame)))
1784 break; 1791 break;
1785 1792
1786 perf_callchain_store(entry, frame.return_address); 1793 perf_callchain_store(entry, frame.return_address);
@@ -1826,7 +1833,7 @@ perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
1826 if (bytes != sizeof(frame)) 1833 if (bytes != sizeof(frame))
1827 break; 1834 break;
1828 1835
1829 if ((unsigned long)fp < regs->sp) 1836 if (!valid_user_frame(fp, sizeof(frame)))
1830 break; 1837 break;
1831 1838
1832 perf_callchain_store(entry, frame.return_address); 1839 perf_callchain_store(entry, frame.return_address);
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/kernel/cpu/perf_event.h
index 6638aaf54493..7241e2fc3c17 100644
--- a/arch/x86/kernel/cpu/perf_event.h
+++ b/arch/x86/kernel/cpu/perf_event.h
@@ -117,6 +117,7 @@ struct cpu_hw_events {
117 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */ 117 struct perf_event *event_list[X86_PMC_IDX_MAX]; /* in enabled order */
118 118
119 unsigned int group_flag; 119 unsigned int group_flag;
120 int is_fake;
120 121
121 /* 122 /*
122 * Intel DebugStore bits 123 * Intel DebugStore bits
@@ -364,6 +365,7 @@ struct x86_pmu {
364 int pebs_record_size; 365 int pebs_record_size;
365 void (*drain_pebs)(struct pt_regs *regs); 366 void (*drain_pebs)(struct pt_regs *regs);
366 struct event_constraint *pebs_constraints; 367 struct event_constraint *pebs_constraints;
368 void (*pebs_aliases)(struct perf_event *event);
367 369
368 /* 370 /*
369 * Intel LBR 371 * Intel LBR
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index 166546ec6aef..187c294bc658 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -1119,27 +1119,33 @@ intel_bts_constraints(struct perf_event *event)
1119 return NULL; 1119 return NULL;
1120} 1120}
1121 1121
1122static bool intel_try_alt_er(struct perf_event *event, int orig_idx) 1122static int intel_alt_er(int idx)
1123{ 1123{
1124 if (!(x86_pmu.er_flags & ERF_HAS_RSP_1)) 1124 if (!(x86_pmu.er_flags & ERF_HAS_RSP_1))
1125 return false; 1125 return idx;
1126 1126
1127 if (event->hw.extra_reg.idx == EXTRA_REG_RSP_0) { 1127 if (idx == EXTRA_REG_RSP_0)
1128 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; 1128 return EXTRA_REG_RSP_1;
1129 event->hw.config |= 0x01bb; 1129
1130 event->hw.extra_reg.idx = EXTRA_REG_RSP_1; 1130 if (idx == EXTRA_REG_RSP_1)
1131 event->hw.extra_reg.reg = MSR_OFFCORE_RSP_1; 1131 return EXTRA_REG_RSP_0;
1132 } else if (event->hw.extra_reg.idx == EXTRA_REG_RSP_1) { 1132
1133 return idx;
1134}
1135
1136static void intel_fixup_er(struct perf_event *event, int idx)
1137{
1138 event->hw.extra_reg.idx = idx;
1139
1140 if (idx == EXTRA_REG_RSP_0) {
1133 event->hw.config &= ~INTEL_ARCH_EVENT_MASK; 1141 event->hw.config &= ~INTEL_ARCH_EVENT_MASK;
1134 event->hw.config |= 0x01b7; 1142 event->hw.config |= 0x01b7;
1135 event->hw.extra_reg.idx = EXTRA_REG_RSP_0;
1136 event->hw.extra_reg.reg = MSR_OFFCORE_RSP_0; 1143 event->hw.extra_reg.reg = MSR_OFFCORE_RSP_0;
1144 } else if (idx == EXTRA_REG_RSP_1) {
1145 event->hw.config &= ~INTEL_ARCH_EVENT_MASK;
1146 event->hw.config |= 0x01bb;
1147 event->hw.extra_reg.reg = MSR_OFFCORE_RSP_1;
1137 } 1148 }
1138
1139 if (event->hw.extra_reg.idx == orig_idx)
1140 return false;
1141
1142 return true;
1143} 1149}
1144 1150
1145/* 1151/*
@@ -1157,14 +1163,18 @@ __intel_shared_reg_get_constraints(struct cpu_hw_events *cpuc,
1157 struct event_constraint *c = &emptyconstraint; 1163 struct event_constraint *c = &emptyconstraint;
1158 struct er_account *era; 1164 struct er_account *era;
1159 unsigned long flags; 1165 unsigned long flags;
1160 int orig_idx = reg->idx; 1166 int idx = reg->idx;
1161 1167
1162 /* already allocated shared msr */ 1168 /*
1163 if (reg->alloc) 1169 * reg->alloc can be set due to existing state, so for fake cpuc we
1170 * need to ignore this, otherwise we might fail to allocate proper fake
1171 * state for this extra reg constraint. Also see the comment below.
1172 */
1173 if (reg->alloc && !cpuc->is_fake)
1164 return NULL; /* call x86_get_event_constraint() */ 1174 return NULL; /* call x86_get_event_constraint() */
1165 1175
1166again: 1176again:
1167 era = &cpuc->shared_regs->regs[reg->idx]; 1177 era = &cpuc->shared_regs->regs[idx];
1168 /* 1178 /*
1169 * we use spin_lock_irqsave() to avoid lockdep issues when 1179 * we use spin_lock_irqsave() to avoid lockdep issues when
1170 * passing a fake cpuc 1180 * passing a fake cpuc
@@ -1173,6 +1183,29 @@ again:
1173 1183
1174 if (!atomic_read(&era->ref) || era->config == reg->config) { 1184 if (!atomic_read(&era->ref) || era->config == reg->config) {
1175 1185
1186 /*
1187 * If its a fake cpuc -- as per validate_{group,event}() we
1188 * shouldn't touch event state and we can avoid doing so
1189 * since both will only call get_event_constraints() once
1190 * on each event, this avoids the need for reg->alloc.
1191 *
1192 * Not doing the ER fixup will only result in era->reg being
1193 * wrong, but since we won't actually try and program hardware
1194 * this isn't a problem either.
1195 */
1196 if (!cpuc->is_fake) {
1197 if (idx != reg->idx)
1198 intel_fixup_er(event, idx);
1199
1200 /*
1201 * x86_schedule_events() can call get_event_constraints()
1202 * multiple times on events in the case of incremental
1203 * scheduling(). reg->alloc ensures we only do the ER
1204 * allocation once.
1205 */
1206 reg->alloc = 1;
1207 }
1208
1176 /* lock in msr value */ 1209 /* lock in msr value */
1177 era->config = reg->config; 1210 era->config = reg->config;
1178 era->reg = reg->reg; 1211 era->reg = reg->reg;
@@ -1180,17 +1213,17 @@ again:
1180 /* one more user */ 1213 /* one more user */
1181 atomic_inc(&era->ref); 1214 atomic_inc(&era->ref);
1182 1215
1183 /* no need to reallocate during incremental event scheduling */
1184 reg->alloc = 1;
1185
1186 /* 1216 /*
1187 * need to call x86_get_event_constraint() 1217 * need to call x86_get_event_constraint()
1188 * to check if associated event has constraints 1218 * to check if associated event has constraints
1189 */ 1219 */
1190 c = NULL; 1220 c = NULL;
1191 } else if (intel_try_alt_er(event, orig_idx)) { 1221 } else {
1192 raw_spin_unlock_irqrestore(&era->lock, flags); 1222 idx = intel_alt_er(idx);
1193 goto again; 1223 if (idx != reg->idx) {
1224 raw_spin_unlock_irqrestore(&era->lock, flags);
1225 goto again;
1226 }
1194 } 1227 }
1195 raw_spin_unlock_irqrestore(&era->lock, flags); 1228 raw_spin_unlock_irqrestore(&era->lock, flags);
1196 1229
@@ -1204,11 +1237,14 @@ __intel_shared_reg_put_constraints(struct cpu_hw_events *cpuc,
1204 struct er_account *era; 1237 struct er_account *era;
1205 1238
1206 /* 1239 /*
1207 * only put constraint if extra reg was actually 1240 * Only put constraint if extra reg was actually allocated. Also takes
1208 * allocated. Also takes care of event which do 1241 * care of event which do not use an extra shared reg.
1209 * not use an extra shared reg 1242 *
1243 * Also, if this is a fake cpuc we shouldn't touch any event state
1244 * (reg->alloc) and we don't care about leaving inconsistent cpuc state
1245 * either since it'll be thrown out.
1210 */ 1246 */
1211 if (!reg->alloc) 1247 if (!reg->alloc || cpuc->is_fake)
1212 return; 1248 return;
1213 1249
1214 era = &cpuc->shared_regs->regs[reg->idx]; 1250 era = &cpuc->shared_regs->regs[reg->idx];
@@ -1300,15 +1336,9 @@ static void intel_put_event_constraints(struct cpu_hw_events *cpuc,
1300 intel_put_shared_regs_event_constraints(cpuc, event); 1336 intel_put_shared_regs_event_constraints(cpuc, event);
1301} 1337}
1302 1338
1303static int intel_pmu_hw_config(struct perf_event *event) 1339static void intel_pebs_aliases_core2(struct perf_event *event)
1304{ 1340{
1305 int ret = x86_pmu_hw_config(event); 1341 if ((event->hw.config & X86_RAW_EVENT_MASK) == 0x003c) {
1306
1307 if (ret)
1308 return ret;
1309
1310 if (event->attr.precise_ip &&
1311 (event->hw.config & X86_RAW_EVENT_MASK) == 0x003c) {
1312 /* 1342 /*
1313 * Use an alternative encoding for CPU_CLK_UNHALTED.THREAD_P 1343 * Use an alternative encoding for CPU_CLK_UNHALTED.THREAD_P
1314 * (0x003c) so that we can use it with PEBS. 1344 * (0x003c) so that we can use it with PEBS.
@@ -1329,10 +1359,48 @@ static int intel_pmu_hw_config(struct perf_event *event)
1329 */ 1359 */
1330 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16); 1360 u64 alt_config = X86_CONFIG(.event=0xc0, .inv=1, .cmask=16);
1331 1361
1362 alt_config |= (event->hw.config & ~X86_RAW_EVENT_MASK);
1363 event->hw.config = alt_config;
1364 }
1365}
1366
1367static void intel_pebs_aliases_snb(struct perf_event *event)
1368{
1369 if ((event->hw.config & X86_RAW_EVENT_MASK) == 0x003c) {
1370 /*
1371 * Use an alternative encoding for CPU_CLK_UNHALTED.THREAD_P
1372 * (0x003c) so that we can use it with PEBS.
1373 *
1374 * The regular CPU_CLK_UNHALTED.THREAD_P event (0x003c) isn't
1375 * PEBS capable. However we can use UOPS_RETIRED.ALL
1376 * (0x01c2), which is a PEBS capable event, to get the same
1377 * count.
1378 *
1379 * UOPS_RETIRED.ALL counts the number of cycles that retires
1380 * CNTMASK micro-ops. By setting CNTMASK to a value (16)
1381 * larger than the maximum number of micro-ops that can be
1382 * retired per cycle (4) and then inverting the condition, we
1383 * count all cycles that retire 16 or less micro-ops, which
1384 * is every cycle.
1385 *
1386 * Thereby we gain a PEBS capable cycle counter.
1387 */
1388 u64 alt_config = X86_CONFIG(.event=0xc2, .umask=0x01, .inv=1, .cmask=16);
1332 1389
1333 alt_config |= (event->hw.config & ~X86_RAW_EVENT_MASK); 1390 alt_config |= (event->hw.config & ~X86_RAW_EVENT_MASK);
1334 event->hw.config = alt_config; 1391 event->hw.config = alt_config;
1335 } 1392 }
1393}
1394
1395static int intel_pmu_hw_config(struct perf_event *event)
1396{
1397 int ret = x86_pmu_hw_config(event);
1398
1399 if (ret)
1400 return ret;
1401
1402 if (event->attr.precise_ip && x86_pmu.pebs_aliases)
1403 x86_pmu.pebs_aliases(event);
1336 1404
1337 if (intel_pmu_needs_lbr_smpl(event)) { 1405 if (intel_pmu_needs_lbr_smpl(event)) {
1338 ret = intel_pmu_setup_lbr_filter(event); 1406 ret = intel_pmu_setup_lbr_filter(event);
@@ -1607,6 +1675,7 @@ static __initconst const struct x86_pmu intel_pmu = {
1607 .max_period = (1ULL << 31) - 1, 1675 .max_period = (1ULL << 31) - 1,
1608 .get_event_constraints = intel_get_event_constraints, 1676 .get_event_constraints = intel_get_event_constraints,
1609 .put_event_constraints = intel_put_event_constraints, 1677 .put_event_constraints = intel_put_event_constraints,
1678 .pebs_aliases = intel_pebs_aliases_core2,
1610 1679
1611 .format_attrs = intel_arch3_formats_attr, 1680 .format_attrs = intel_arch3_formats_attr,
1612 1681
@@ -1840,8 +1909,9 @@ __init int intel_pmu_init(void)
1840 break; 1909 break;
1841 1910
1842 case 42: /* SandyBridge */ 1911 case 42: /* SandyBridge */
1843 x86_add_quirk(intel_sandybridge_quirk);
1844 case 45: /* SandyBridge, "Romely-EP" */ 1912 case 45: /* SandyBridge, "Romely-EP" */
1913 x86_add_quirk(intel_sandybridge_quirk);
1914 case 58: /* IvyBridge */
1845 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids, 1915 memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
1846 sizeof(hw_cache_event_ids)); 1916 sizeof(hw_cache_event_ids));
1847 1917
@@ -1849,6 +1919,7 @@ __init int intel_pmu_init(void)
1849 1919
1850 x86_pmu.event_constraints = intel_snb_event_constraints; 1920 x86_pmu.event_constraints = intel_snb_event_constraints;
1851 x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints; 1921 x86_pmu.pebs_constraints = intel_snb_pebs_event_constraints;
1922 x86_pmu.pebs_aliases = intel_pebs_aliases_snb;
1852 x86_pmu.extra_regs = intel_snb_extra_regs; 1923 x86_pmu.extra_regs = intel_snb_extra_regs;
1853 /* all extra regs are per-cpu when HT is on */ 1924 /* all extra regs are per-cpu when HT is on */
1854 x86_pmu.er_flags |= ERF_HAS_RSP_1; 1925 x86_pmu.er_flags |= ERF_HAS_RSP_1;
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 5a3edc27f6e5..35e2192df9f4 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -400,14 +400,7 @@ struct event_constraint intel_snb_pebs_event_constraints[] = {
400 INTEL_EVENT_CONSTRAINT(0xc4, 0xf), /* BR_INST_RETIRED.* */ 400 INTEL_EVENT_CONSTRAINT(0xc4, 0xf), /* BR_INST_RETIRED.* */
401 INTEL_EVENT_CONSTRAINT(0xc5, 0xf), /* BR_MISP_RETIRED.* */ 401 INTEL_EVENT_CONSTRAINT(0xc5, 0xf), /* BR_MISP_RETIRED.* */
402 INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.* */ 402 INTEL_EVENT_CONSTRAINT(0xcd, 0x8), /* MEM_TRANS_RETIRED.* */
403 INTEL_UEVENT_CONSTRAINT(0x11d0, 0xf), /* MEM_UOP_RETIRED.STLB_MISS_LOADS */ 403 INTEL_EVENT_CONSTRAINT(0xd0, 0xf), /* MEM_UOP_RETIRED.* */
404 INTEL_UEVENT_CONSTRAINT(0x12d0, 0xf), /* MEM_UOP_RETIRED.STLB_MISS_STORES */
405 INTEL_UEVENT_CONSTRAINT(0x21d0, 0xf), /* MEM_UOP_RETIRED.LOCK_LOADS */
406 INTEL_UEVENT_CONSTRAINT(0x22d0, 0xf), /* MEM_UOP_RETIRED.LOCK_STORES */
407 INTEL_UEVENT_CONSTRAINT(0x41d0, 0xf), /* MEM_UOP_RETIRED.SPLIT_LOADS */
408 INTEL_UEVENT_CONSTRAINT(0x42d0, 0xf), /* MEM_UOP_RETIRED.SPLIT_STORES */
409 INTEL_UEVENT_CONSTRAINT(0x81d0, 0xf), /* MEM_UOP_RETIRED.ANY_LOADS */
410 INTEL_UEVENT_CONSTRAINT(0x82d0, 0xf), /* MEM_UOP_RETIRED.ANY_STORES */
411 INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */ 404 INTEL_EVENT_CONSTRAINT(0xd1, 0xf), /* MEM_LOAD_UOPS_RETIRED.* */
412 INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */ 405 INTEL_EVENT_CONSTRAINT(0xd2, 0xf), /* MEM_LOAD_UOPS_LLC_HIT_RETIRED.* */
413 INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */ 406 INTEL_UEVENT_CONSTRAINT(0x02d4, 0xf), /* MEM_LOAD_UOPS_MISC_RETIRED.LLC_MISS */
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index addf9e82a7f2..ee8e9abc859f 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -31,7 +31,7 @@ void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
31 const struct cpuid_bit *cb; 31 const struct cpuid_bit *cb;
32 32
33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = { 33 static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
34 { X86_FEATURE_DTS, CR_EAX, 0, 0x00000006, 0 }, 34 { X86_FEATURE_DTHERM, CR_EAX, 0, 0x00000006, 0 },
35 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 }, 35 { X86_FEATURE_IDA, CR_EAX, 1, 0x00000006, 0 },
36 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 }, 36 { X86_FEATURE_ARAT, CR_EAX, 2, 0x00000006, 0 },
37 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 }, 37 { X86_FEATURE_PLN, CR_EAX, 4, 0x00000006, 0 },
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index 8bfb6146f753..3f61904365cf 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -444,12 +444,12 @@ void kgdb_roundup_cpus(unsigned long flags)
444 444
445/** 445/**
446 * kgdb_arch_handle_exception - Handle architecture specific GDB packets. 446 * kgdb_arch_handle_exception - Handle architecture specific GDB packets.
447 * @vector: The error vector of the exception that happened. 447 * @e_vector: The error vector of the exception that happened.
448 * @signo: The signal number of the exception that happened. 448 * @signo: The signal number of the exception that happened.
449 * @err_code: The error code of the exception that happened. 449 * @err_code: The error code of the exception that happened.
450 * @remcom_in_buffer: The buffer of the packet we have read. 450 * @remcomInBuffer: The buffer of the packet we have read.
451 * @remcom_out_buffer: The buffer of %BUFMAX bytes to write a packet into. 451 * @remcomOutBuffer: The buffer of %BUFMAX bytes to write a packet into.
452 * @regs: The &struct pt_regs of the current process. 452 * @linux_regs: The &struct pt_regs of the current process.
453 * 453 *
454 * This function MUST handle the 'c' and 's' command packets, 454 * This function MUST handle the 'c' and 's' command packets,
455 * as well packets to set / remove a hardware breakpoint, if used. 455 * as well packets to set / remove a hardware breakpoint, if used.
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 086eb58c6e80..f1b42b3a186c 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -120,11 +120,6 @@ bool kvm_check_and_clear_guest_paused(void)
120 bool ret = false; 120 bool ret = false;
121 struct pvclock_vcpu_time_info *src; 121 struct pvclock_vcpu_time_info *src;
122 122
123 /*
124 * per_cpu() is safe here because this function is only called from
125 * timer functions where preemption is already disabled.
126 */
127 WARN_ON(!in_atomic());
128 src = &__get_cpu_var(hv_clock); 123 src = &__get_cpu_var(hv_clock);
129 if ((src->flags & PVCLOCK_GUEST_STOPPED) != 0) { 124 if ((src->flags & PVCLOCK_GUEST_STOPPED) != 0) {
130 __this_cpu_and(hv_clock.flags, ~PVCLOCK_GUEST_STOPPED); 125 __this_cpu_and(hv_clock.flags, ~PVCLOCK_GUEST_STOPPED);
diff --git a/arch/x86/kernel/nmi_selftest.c b/arch/x86/kernel/nmi_selftest.c
index e31bf8d5c4d2..149b8d9c6ad4 100644
--- a/arch/x86/kernel/nmi_selftest.c
+++ b/arch/x86/kernel/nmi_selftest.c
@@ -42,7 +42,7 @@ static int __init nmi_unk_cb(unsigned int val, struct pt_regs *regs)
42static void __init init_nmi_testsuite(void) 42static void __init init_nmi_testsuite(void)
43{ 43{
44 /* trap all the unknown NMIs we may generate */ 44 /* trap all the unknown NMIs we may generate */
45 register_nmi_handler(NMI_UNKNOWN, nmi_unk_cb, 0, "nmi_selftest_unk"); 45 register_nmi_handler_initonly(NMI_UNKNOWN, nmi_unk_cb, 0, "nmi_selftest_unk");
46} 46}
47 47
48static void __init cleanup_nmi_testsuite(void) 48static void __init cleanup_nmi_testsuite(void)
@@ -64,7 +64,7 @@ static void __init test_nmi_ipi(struct cpumask *mask)
64{ 64{
65 unsigned long timeout; 65 unsigned long timeout;
66 66
67 if (register_nmi_handler(NMI_LOCAL, test_nmi_ipi_callback, 67 if (register_nmi_handler_initonly(NMI_LOCAL, test_nmi_ipi_callback,
68 NMI_FLAG_FIRST, "nmi_selftest")) { 68 NMI_FLAG_FIRST, "nmi_selftest")) {
69 nmi_fail = FAILURE; 69 nmi_fail = FAILURE;
70 return; 70 return;
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c
index 62c9457ccd2f..c0f420f76cd3 100644
--- a/arch/x86/kernel/pci-dma.c
+++ b/arch/x86/kernel/pci-dma.c
@@ -100,7 +100,7 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
100 struct dma_attrs *attrs) 100 struct dma_attrs *attrs)
101{ 101{
102 unsigned long dma_mask; 102 unsigned long dma_mask;
103 struct page *page = NULL; 103 struct page *page;
104 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 104 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
105 dma_addr_t addr; 105 dma_addr_t addr;
106 106
@@ -108,6 +108,7 @@ void *dma_generic_alloc_coherent(struct device *dev, size_t size,
108 108
109 flag |= __GFP_ZERO; 109 flag |= __GFP_ZERO;
110again: 110again:
111 page = NULL;
111 if (!(flag & GFP_ATOMIC)) 112 if (!(flag & GFP_ATOMIC))
112 page = dma_alloc_from_contiguous(dev, count, get_order(size)); 113 page = dma_alloc_from_contiguous(dev, count, get_order(size));
113 if (!page) 114 if (!page)
diff --git a/arch/x86/kernel/reboot.c b/arch/x86/kernel/reboot.c
index 79c45af81604..5de92f1abd76 100644
--- a/arch/x86/kernel/reboot.c
+++ b/arch/x86/kernel/reboot.c
@@ -451,6 +451,14 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
451 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"), 451 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
452 }, 452 },
453 }, 453 },
454 { /* Handle problems with rebooting on the Precision M6600. */
455 .callback = set_pci_reboot,
456 .ident = "Dell OptiPlex 990",
457 .matches = {
458 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
459 DMI_MATCH(DMI_PRODUCT_NAME, "Precision M6600"),
460 },
461 },
454 { } 462 { }
455}; 463};
456 464
@@ -639,9 +647,11 @@ void native_machine_shutdown(void)
639 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id)); 647 set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
640 648
641 /* 649 /*
642 * O.K Now that I'm on the appropriate processor, 650 * O.K Now that I'm on the appropriate processor, stop all of the
643 * stop all of the others. 651 * others. Also disable the local irq to not receive the per-cpu
652 * timer interrupt which may trigger scheduler's load balance.
644 */ 653 */
654 local_irq_disable();
645 stop_other_cpus(); 655 stop_other_cpus();
646#endif 656#endif
647 657
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index f56f96da77f5..7bd8a0823654 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -349,9 +349,12 @@ static bool __cpuinit match_llc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
349 349
350static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 350static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
351{ 351{
352 if (c->phys_proc_id == o->phys_proc_id) 352 if (c->phys_proc_id == o->phys_proc_id) {
353 return topology_sane(c, o, "mc"); 353 if (cpu_has(c, X86_FEATURE_AMD_DCM))
354 return true;
354 355
356 return topology_sane(c, o, "mc");
357 }
355 return false; 358 return false;
356} 359}
357 360
@@ -382,6 +385,15 @@ void __cpuinit set_cpu_sibling_map(int cpu)
382 if ((i == cpu) || (has_mc && match_llc(c, o))) 385 if ((i == cpu) || (has_mc && match_llc(c, o)))
383 link_mask(llc_shared, cpu, i); 386 link_mask(llc_shared, cpu, i);
384 387
388 }
389
390 /*
391 * This needs a separate iteration over the cpus because we rely on all
392 * cpu_sibling_mask links to be set-up.
393 */
394 for_each_cpu(i, cpu_sibling_setup_mask) {
395 o = &cpu_data(i);
396
385 if ((i == cpu) || (has_mc && match_mc(c, o))) { 397 if ((i == cpu) || (has_mc && match_mc(c, o))) {
386 link_mask(core, cpu, i); 398 link_mask(core, cpu, i);
387 399
@@ -410,15 +422,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)
410/* maps the cpu to the sched domain representing multi-core */ 422/* maps the cpu to the sched domain representing multi-core */
411const struct cpumask *cpu_coregroup_mask(int cpu) 423const struct cpumask *cpu_coregroup_mask(int cpu)
412{ 424{
413 struct cpuinfo_x86 *c = &cpu_data(cpu); 425 return cpu_llc_shared_mask(cpu);
414 /*
415 * For perf, we return last level cache shared map.
416 * And for power savings, we return cpu_core_map
417 */
418 if (!(cpu_has(c, X86_FEATURE_AMD_DCM)))
419 return cpu_core_mask(cpu);
420 else
421 return cpu_llc_shared_mask(cpu);
422} 426}
423 427
424static void impress_friends(void) 428static void impress_friends(void)
diff --git a/arch/x86/kernel/vsyscall_64.c b/arch/x86/kernel/vsyscall_64.c
index 7515cf0e1805..5db36caf4289 100644
--- a/arch/x86/kernel/vsyscall_64.c
+++ b/arch/x86/kernel/vsyscall_64.c
@@ -139,6 +139,19 @@ static int addr_to_vsyscall_nr(unsigned long addr)
139 return nr; 139 return nr;
140} 140}
141 141
142#ifdef CONFIG_SECCOMP
143static int vsyscall_seccomp(struct task_struct *tsk, int syscall_nr)
144{
145 if (!seccomp_mode(&tsk->seccomp))
146 return 0;
147 task_pt_regs(tsk)->orig_ax = syscall_nr;
148 task_pt_regs(tsk)->ax = syscall_nr;
149 return __secure_computing(syscall_nr);
150}
151#else
152#define vsyscall_seccomp(_tsk, _nr) 0
153#endif
154
142static bool write_ok_or_segv(unsigned long ptr, size_t size) 155static bool write_ok_or_segv(unsigned long ptr, size_t size)
143{ 156{
144 /* 157 /*
@@ -174,6 +187,7 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
174 int vsyscall_nr; 187 int vsyscall_nr;
175 int prev_sig_on_uaccess_error; 188 int prev_sig_on_uaccess_error;
176 long ret; 189 long ret;
190 int skip;
177 191
178 /* 192 /*
179 * No point in checking CS -- the only way to get here is a user mode 193 * No point in checking CS -- the only way to get here is a user mode
@@ -205,9 +219,6 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
205 } 219 }
206 220
207 tsk = current; 221 tsk = current;
208 if (seccomp_mode(&tsk->seccomp))
209 do_exit(SIGKILL);
210
211 /* 222 /*
212 * With a real vsyscall, page faults cause SIGSEGV. We want to 223 * With a real vsyscall, page faults cause SIGSEGV. We want to
213 * preserve that behavior to make writing exploits harder. 224 * preserve that behavior to make writing exploits harder.
@@ -222,8 +233,13 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
222 * address 0". 233 * address 0".
223 */ 234 */
224 ret = -EFAULT; 235 ret = -EFAULT;
236 skip = 0;
225 switch (vsyscall_nr) { 237 switch (vsyscall_nr) {
226 case 0: 238 case 0:
239 skip = vsyscall_seccomp(tsk, __NR_gettimeofday);
240 if (skip)
241 break;
242
227 if (!write_ok_or_segv(regs->di, sizeof(struct timeval)) || 243 if (!write_ok_or_segv(regs->di, sizeof(struct timeval)) ||
228 !write_ok_or_segv(regs->si, sizeof(struct timezone))) 244 !write_ok_or_segv(regs->si, sizeof(struct timezone)))
229 break; 245 break;
@@ -234,6 +250,10 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
234 break; 250 break;
235 251
236 case 1: 252 case 1:
253 skip = vsyscall_seccomp(tsk, __NR_time);
254 if (skip)
255 break;
256
237 if (!write_ok_or_segv(regs->di, sizeof(time_t))) 257 if (!write_ok_or_segv(regs->di, sizeof(time_t)))
238 break; 258 break;
239 259
@@ -241,6 +261,10 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
241 break; 261 break;
242 262
243 case 2: 263 case 2:
264 skip = vsyscall_seccomp(tsk, __NR_getcpu);
265 if (skip)
266 break;
267
244 if (!write_ok_or_segv(regs->di, sizeof(unsigned)) || 268 if (!write_ok_or_segv(regs->di, sizeof(unsigned)) ||
245 !write_ok_or_segv(regs->si, sizeof(unsigned))) 269 !write_ok_or_segv(regs->si, sizeof(unsigned)))
246 break; 270 break;
@@ -253,6 +277,12 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
253 277
254 current_thread_info()->sig_on_uaccess_error = prev_sig_on_uaccess_error; 278 current_thread_info()->sig_on_uaccess_error = prev_sig_on_uaccess_error;
255 279
280 if (skip) {
281 if ((long)regs->ax <= 0L) /* seccomp errno emulation */
282 goto do_ret;
283 goto done; /* seccomp trace/trap */
284 }
285
256 if (ret == -EFAULT) { 286 if (ret == -EFAULT) {
257 /* Bad news -- userspace fed a bad pointer to a vsyscall. */ 287 /* Bad news -- userspace fed a bad pointer to a vsyscall. */
258 warn_bad_vsyscall(KERN_INFO, regs, 288 warn_bad_vsyscall(KERN_INFO, regs,
@@ -271,10 +301,11 @@ bool emulate_vsyscall(struct pt_regs *regs, unsigned long address)
271 301
272 regs->ax = ret; 302 regs->ax = ret;
273 303
304do_ret:
274 /* Emulate a ret instruction. */ 305 /* Emulate a ret instruction. */
275 regs->ip = caller; 306 regs->ip = caller;
276 regs->sp += 8; 307 regs->sp += 8;
277 308done:
278 return true; 309 return true;
279 310
280sigsegv: 311sigsegv:
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index be3cea4407ff..57e168e27b5b 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -3934,6 +3934,9 @@ static void kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm,
3934{ 3934{
3935 struct kvm_mmu_page *page; 3935 struct kvm_mmu_page *page;
3936 3936
3937 if (list_empty(&kvm->arch.active_mmu_pages))
3938 return;
3939
3937 page = container_of(kvm->arch.active_mmu_pages.prev, 3940 page = container_of(kvm->arch.active_mmu_pages.prev,
3938 struct kvm_mmu_page, link); 3941 struct kvm_mmu_page, link);
3939 kvm_mmu_prepare_zap_page(kvm, page, invalid_list); 3942 kvm_mmu_prepare_zap_page(kvm, page, invalid_list);
diff --git a/arch/x86/lib/csum-wrappers_64.c b/arch/x86/lib/csum-wrappers_64.c
index 459b58a8a15c..25b7ae8d058a 100644
--- a/arch/x86/lib/csum-wrappers_64.c
+++ b/arch/x86/lib/csum-wrappers_64.c
@@ -115,7 +115,7 @@ EXPORT_SYMBOL(csum_partial_copy_to_user);
115 * @src: source address 115 * @src: source address
116 * @dst: destination address 116 * @dst: destination address
117 * @len: number of bytes to be copied. 117 * @len: number of bytes to be copied.
118 * @isum: initial sum that is added into the result (32bit unfolded) 118 * @sum: initial sum that is added into the result (32bit unfolded)
119 * 119 *
120 * Returns an 32bit unfolded checksum of the buffer. 120 * Returns an 32bit unfolded checksum of the buffer.
121 */ 121 */
diff --git a/arch/x86/lib/usercopy.c b/arch/x86/lib/usercopy.c
index f61ee67ec00f..4f74d94c8d97 100644
--- a/arch/x86/lib/usercopy.c
+++ b/arch/x86/lib/usercopy.c
@@ -8,6 +8,7 @@
8#include <linux/module.h> 8#include <linux/module.h>
9 9
10#include <asm/word-at-a-time.h> 10#include <asm/word-at-a-time.h>
11#include <linux/sched.h>
11 12
12/* 13/*
13 * best effort, GUP based copy_from_user() that is NMI-safe 14 * best effort, GUP based copy_from_user() that is NMI-safe
@@ -21,6 +22,9 @@ copy_from_user_nmi(void *to, const void __user *from, unsigned long n)
21 void *map; 22 void *map;
22 int ret; 23 int ret;
23 24
25 if (__range_not_ok(from, n, TASK_SIZE))
26 return len;
27
24 do { 28 do {
25 ret = __get_user_pages_fast(addr, 1, 0, &page); 29 ret = __get_user_pages_fast(addr, 1, 0, &page);
26 if (!ret) 30 if (!ret)
diff --git a/arch/x86/lib/x86-opcode-map.txt b/arch/x86/lib/x86-opcode-map.txt
index 819137904428..5d7e51f3fd28 100644
--- a/arch/x86/lib/x86-opcode-map.txt
+++ b/arch/x86/lib/x86-opcode-map.txt
@@ -28,7 +28,7 @@
28# - (66): the last prefix is 0x66 28# - (66): the last prefix is 0x66
29# - (F3): the last prefix is 0xF3 29# - (F3): the last prefix is 0xF3
30# - (F2): the last prefix is 0xF2 30# - (F2): the last prefix is 0xF2
31# 31# - (!F3) : the last prefix is not 0xF3 (including non-last prefix case)
32 32
33Table: one byte opcode 33Table: one byte opcode
34Referrer: 34Referrer:
@@ -515,12 +515,12 @@ b4: LFS Gv,Mp
515b5: LGS Gv,Mp 515b5: LGS Gv,Mp
516b6: MOVZX Gv,Eb 516b6: MOVZX Gv,Eb
517b7: MOVZX Gv,Ew 517b7: MOVZX Gv,Ew
518b8: JMPE | POPCNT Gv,Ev (F3) 518b8: JMPE (!F3) | POPCNT Gv,Ev (F3)
519b9: Grp10 (1A) 519b9: Grp10 (1A)
520ba: Grp8 Ev,Ib (1A) 520ba: Grp8 Ev,Ib (1A)
521bb: BTC Ev,Gv 521bb: BTC Ev,Gv
522bc: BSF Gv,Ev | TZCNT Gv,Ev (F3) 522bc: BSF Gv,Ev (!F3) | TZCNT Gv,Ev (F3)
523bd: BSR Gv,Ev | LZCNT Gv,Ev (F3) 523bd: BSR Gv,Ev (!F3) | LZCNT Gv,Ev (F3)
524be: MOVSX Gv,Eb 524be: MOVSX Gv,Eb
525bf: MOVSX Gv,Ew 525bf: MOVSX Gv,Ew
526# 0x0f 0xc0-0xcf 526# 0x0f 0xc0-0xcf
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 97141c26a13a..bc4e9d84157f 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -62,7 +62,8 @@ static void __init find_early_table_space(struct map_range *mr, unsigned long en
62 extra += PMD_SIZE; 62 extra += PMD_SIZE;
63#endif 63#endif
64 /* The first 2/4M doesn't use large pages. */ 64 /* The first 2/4M doesn't use large pages. */
65 extra += mr->end - mr->start; 65 if (mr->start < PMD_SIZE)
66 extra += mr->end - mr->start;
66 67
67 ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT; 68 ptes = (extra + PAGE_SIZE - 1) >> PAGE_SHIFT;
68 } else 69 } else
diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
index be1ef574ce9a..78fe3f1ac49f 100644
--- a/arch/x86/mm/ioremap.c
+++ b/arch/x86/mm/ioremap.c
@@ -180,7 +180,7 @@ err_free_memtype:
180 180
181/** 181/**
182 * ioremap_nocache - map bus memory into CPU space 182 * ioremap_nocache - map bus memory into CPU space
183 * @offset: bus address of the memory 183 * @phys_addr: bus address of the memory
184 * @size: size of the resource to map 184 * @size: size of the resource to map
185 * 185 *
186 * ioremap_nocache performs a platform specific sequence of operations to 186 * ioremap_nocache performs a platform specific sequence of operations to
@@ -217,7 +217,7 @@ EXPORT_SYMBOL(ioremap_nocache);
217 217
218/** 218/**
219 * ioremap_wc - map memory into CPU space write combined 219 * ioremap_wc - map memory into CPU space write combined
220 * @offset: bus address of the memory 220 * @phys_addr: bus address of the memory
221 * @size: size of the resource to map 221 * @size: size of the resource to map
222 * 222 *
223 * This version of ioremap ensures that the memory is marked write combining. 223 * This version of ioremap ensures that the memory is marked write combining.
diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
index e1ebde315210..a718e0d23503 100644
--- a/arch/x86/mm/pageattr.c
+++ b/arch/x86/mm/pageattr.c
@@ -122,7 +122,7 @@ within(unsigned long addr, unsigned long start, unsigned long end)
122 122
123/** 123/**
124 * clflush_cache_range - flush a cache range with clflush 124 * clflush_cache_range - flush a cache range with clflush
125 * @addr: virtual start address 125 * @vaddr: virtual start address
126 * @size: number of bytes to flush 126 * @size: number of bytes to flush
127 * 127 *
128 * clflush is an unordered instruction which needs fencing with mfence 128 * clflush is an unordered instruction which needs fencing with mfence
diff --git a/arch/x86/mm/srat.c b/arch/x86/mm/srat.c
index 732af3a96183..4599c3e8bcb6 100644
--- a/arch/x86/mm/srat.c
+++ b/arch/x86/mm/srat.c
@@ -176,6 +176,8 @@ acpi_numa_memory_affinity_init(struct acpi_srat_mem_affinity *ma)
176 return; 176 return;
177 } 177 }
178 178
179 node_set(node, numa_nodes_parsed);
180
179 printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n", 181 printk(KERN_INFO "SRAT: Node %u PXM %u [mem %#010Lx-%#010Lx]\n",
180 node, pxm, 182 node, pxm,
181 (unsigned long long) start, (unsigned long long) end - 1); 183 (unsigned long long) start, (unsigned long long) end - 1);
diff --git a/arch/x86/platform/mrst/early_printk_mrst.c b/arch/x86/platform/mrst/early_printk_mrst.c
index 3c6e328483c7..028454f0c3a5 100644
--- a/arch/x86/platform/mrst/early_printk_mrst.c
+++ b/arch/x86/platform/mrst/early_printk_mrst.c
@@ -110,19 +110,16 @@ static struct kmsg_dumper dw_dumper;
110static int dumper_registered; 110static int dumper_registered;
111 111
112static void dw_kmsg_dump(struct kmsg_dumper *dumper, 112static void dw_kmsg_dump(struct kmsg_dumper *dumper,
113 enum kmsg_dump_reason reason, 113 enum kmsg_dump_reason reason)
114 const char *s1, unsigned long l1,
115 const char *s2, unsigned long l2)
116{ 114{
117 int i; 115 static char line[1024];
116 size_t len;
118 117
119 /* When run to this, we'd better re-init the HW */ 118 /* When run to this, we'd better re-init the HW */
120 mrst_early_console_init(); 119 mrst_early_console_init();
121 120
122 for (i = 0; i < l1; i++) 121 while (kmsg_dump_get_line(dumper, true, line, sizeof(line), &len))
123 early_mrst_console.write(&early_mrst_console, s1 + i, 1); 122 early_mrst_console.write(&early_mrst_console, line, len);
124 for (i = 0; i < l2; i++)
125 early_mrst_console.write(&early_mrst_console, s2 + i, 1);
126} 123}
127 124
128/* Set the ratio rate to 115200, 8n1, IRQ disabled */ 125/* Set the ratio rate to 115200, 8n1, IRQ disabled */
diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c
index e31bcd8f2eee..fd41a9262d65 100644
--- a/arch/x86/platform/mrst/mrst.c
+++ b/arch/x86/platform/mrst/mrst.c
@@ -782,7 +782,7 @@ BLOCKING_NOTIFIER_HEAD(intel_scu_notifier);
782EXPORT_SYMBOL_GPL(intel_scu_notifier); 782EXPORT_SYMBOL_GPL(intel_scu_notifier);
783 783
784/* Called by IPC driver */ 784/* Called by IPC driver */
785void intel_scu_devices_create(void) 785void __devinit intel_scu_devices_create(void)
786{ 786{
787 int i; 787 int i;
788 788
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index 3ae0e61abd23..59880afa851f 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1295,7 +1295,6 @@ static void __init enable_timeouts(void)
1295 */ 1295 */
1296 mmr_image |= (1L << SOFTACK_MSHIFT); 1296 mmr_image |= (1L << SOFTACK_MSHIFT);
1297 if (is_uv2_hub()) { 1297 if (is_uv2_hub()) {
1298 mmr_image &= ~(1L << UV2_LEG_SHFT);
1299 mmr_image |= (1L << UV2_EXT_SHFT); 1298 mmr_image |= (1L << UV2_EXT_SHFT);
1300 } 1299 }
1301 write_mmr_misc_control(pnode, mmr_image); 1300 write_mmr_misc_control(pnode, mmr_image);
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk
index 5f6a5b6c3a15..ddcf39b1a18d 100644
--- a/arch/x86/tools/gen-insn-attr-x86.awk
+++ b/arch/x86/tools/gen-insn-attr-x86.awk
@@ -66,9 +66,10 @@ BEGIN {
66 rex_expr = "^REX(\\.[XRWB]+)*" 66 rex_expr = "^REX(\\.[XRWB]+)*"
67 fpu_expr = "^ESC" # TODO 67 fpu_expr = "^ESC" # TODO
68 68
69 lprefix1_expr = "\\(66\\)" 69 lprefix1_expr = "\\((66|!F3)\\)"
70 lprefix2_expr = "\\(F3\\)" 70 lprefix2_expr = "\\(F3\\)"
71 lprefix3_expr = "\\(F2\\)" 71 lprefix3_expr = "\\((F2|!F3)\\)"
72 lprefix_expr = "\\((66|F2|F3)\\)"
72 max_lprefix = 4 73 max_lprefix = 4
73 74
74 # All opcodes starting with lower-case 'v' or with (v1) superscript 75 # All opcodes starting with lower-case 'v' or with (v1) superscript
@@ -333,13 +334,16 @@ function convert_operands(count,opnd, i,j,imm,mod)
333 if (match(ext, lprefix1_expr)) { 334 if (match(ext, lprefix1_expr)) {
334 lptable1[idx] = add_flags(lptable1[idx],flags) 335 lptable1[idx] = add_flags(lptable1[idx],flags)
335 variant = "INAT_VARIANT" 336 variant = "INAT_VARIANT"
336 } else if (match(ext, lprefix2_expr)) { 337 }
338 if (match(ext, lprefix2_expr)) {
337 lptable2[idx] = add_flags(lptable2[idx],flags) 339 lptable2[idx] = add_flags(lptable2[idx],flags)
338 variant = "INAT_VARIANT" 340 variant = "INAT_VARIANT"
339 } else if (match(ext, lprefix3_expr)) { 341 }
342 if (match(ext, lprefix3_expr)) {
340 lptable3[idx] = add_flags(lptable3[idx],flags) 343 lptable3[idx] = add_flags(lptable3[idx],flags)
341 variant = "INAT_VARIANT" 344 variant = "INAT_VARIANT"
342 } else { 345 }
346 if (!match(ext, lprefix_expr)){
343 table[idx] = add_flags(table[idx],flags) 347 table[idx] = add_flags(table[idx],flags)
344 } 348 }
345 } 349 }
diff --git a/arch/x86/um/sys_call_table_32.c b/arch/x86/um/sys_call_table_32.c
index 416bd40c0eba..68d1dc91b37b 100644
--- a/arch/x86/um/sys_call_table_32.c
+++ b/arch/x86/um/sys_call_table_32.c
@@ -39,9 +39,9 @@
39#undef __SYSCALL_I386 39#undef __SYSCALL_I386
40#define __SYSCALL_I386(nr, sym, compat) [ nr ] = sym, 40#define __SYSCALL_I386(nr, sym, compat) [ nr ] = sym,
41 41
42typedef void (*sys_call_ptr_t)(void); 42typedef asmlinkage void (*sys_call_ptr_t)(void);
43 43
44extern void sys_ni_syscall(void); 44extern asmlinkage void sys_ni_syscall(void);
45 45
46const sys_call_ptr_t sys_call_table[] __cacheline_aligned = { 46const sys_call_ptr_t sys_call_table[] __cacheline_aligned = {
47 /* 47 /*
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index e74df9548a02..ff962d4b821e 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -209,6 +209,9 @@ static void __init xen_banner(void)
209 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : ""); 209 xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
210} 210}
211 211
212#define CPUID_THERM_POWER_LEAF 6
213#define APERFMPERF_PRESENT 0
214
212static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0; 215static __read_mostly unsigned int cpuid_leaf1_edx_mask = ~0;
213static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0; 216static __read_mostly unsigned int cpuid_leaf1_ecx_mask = ~0;
214 217
@@ -242,6 +245,11 @@ static void xen_cpuid(unsigned int *ax, unsigned int *bx,
242 *dx = cpuid_leaf5_edx_val; 245 *dx = cpuid_leaf5_edx_val;
243 return; 246 return;
244 247
248 case CPUID_THERM_POWER_LEAF:
249 /* Disabling APERFMPERF for kernel usage */
250 maskecx = ~(1 << APERFMPERF_PRESENT);
251 break;
252
245 case 0xb: 253 case 0xb:
246 /* Suppress extended topology stuff */ 254 /* Suppress extended topology stuff */
247 maskebx = 0; 255 maskebx = 0;
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index ffd08c414e91..64effdc6da94 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -706,6 +706,7 @@ int m2p_add_override(unsigned long mfn, struct page *page,
706 unsigned long uninitialized_var(address); 706 unsigned long uninitialized_var(address);
707 unsigned level; 707 unsigned level;
708 pte_t *ptep = NULL; 708 pte_t *ptep = NULL;
709 int ret = 0;
709 710
710 pfn = page_to_pfn(page); 711 pfn = page_to_pfn(page);
711 if (!PageHighMem(page)) { 712 if (!PageHighMem(page)) {
@@ -741,6 +742,24 @@ int m2p_add_override(unsigned long mfn, struct page *page,
741 list_add(&page->lru, &m2p_overrides[mfn_hash(mfn)]); 742 list_add(&page->lru, &m2p_overrides[mfn_hash(mfn)]);
742 spin_unlock_irqrestore(&m2p_override_lock, flags); 743 spin_unlock_irqrestore(&m2p_override_lock, flags);
743 744
745 /* p2m(m2p(mfn)) == mfn: the mfn is already present somewhere in
746 * this domain. Set the FOREIGN_FRAME_BIT in the p2m for the other
747 * pfn so that the following mfn_to_pfn(mfn) calls will return the
748 * pfn from the m2p_override (the backend pfn) instead.
749 * We need to do this because the pages shared by the frontend
750 * (xen-blkfront) can be already locked (lock_page, called by
751 * do_read_cache_page); when the userspace backend tries to use them
752 * with direct_IO, mfn_to_pfn returns the pfn of the frontend, so
753 * do_blockdev_direct_IO is going to try to lock the same pages
754 * again resulting in a deadlock.
755 * As a side effect get_user_pages_fast might not be safe on the
756 * frontend pages while they are being shared with the backend,
757 * because mfn_to_pfn (that ends up being called by GUPF) will
758 * return the backend pfn rather than the frontend pfn. */
759 ret = __get_user(pfn, &machine_to_phys_mapping[mfn]);
760 if (ret == 0 && get_phys_to_machine(pfn) == mfn)
761 set_phys_to_machine(pfn, FOREIGN_FRAME(mfn));
762
744 return 0; 763 return 0;
745} 764}
746EXPORT_SYMBOL_GPL(m2p_add_override); 765EXPORT_SYMBOL_GPL(m2p_add_override);
@@ -752,6 +771,7 @@ int m2p_remove_override(struct page *page, bool clear_pte)
752 unsigned long uninitialized_var(address); 771 unsigned long uninitialized_var(address);
753 unsigned level; 772 unsigned level;
754 pte_t *ptep = NULL; 773 pte_t *ptep = NULL;
774 int ret = 0;
755 775
756 pfn = page_to_pfn(page); 776 pfn = page_to_pfn(page);
757 mfn = get_phys_to_machine(pfn); 777 mfn = get_phys_to_machine(pfn);
@@ -821,6 +841,22 @@ int m2p_remove_override(struct page *page, bool clear_pte)
821 } else 841 } else
822 set_phys_to_machine(pfn, page->index); 842 set_phys_to_machine(pfn, page->index);
823 843
844 /* p2m(m2p(mfn)) == FOREIGN_FRAME(mfn): the mfn is already present
845 * somewhere in this domain, even before being added to the
846 * m2p_override (see comment above in m2p_add_override).
847 * If there are no other entries in the m2p_override corresponding
848 * to this mfn, then remove the FOREIGN_FRAME_BIT from the p2m for
849 * the original pfn (the one shared by the frontend): the backend
850 * cannot do any IO on this page anymore because it has been
851 * unshared. Removing the FOREIGN_FRAME_BIT from the p2m entry of
852 * the original pfn causes mfn_to_pfn(mfn) to return the frontend
853 * pfn again. */
854 mfn &= ~FOREIGN_FRAME_BIT;
855 ret = __get_user(pfn, &machine_to_phys_mapping[mfn]);
856 if (ret == 0 && get_phys_to_machine(pfn) == FOREIGN_FRAME(mfn) &&
857 m2p_find_override(mfn) == NULL)
858 set_phys_to_machine(pfn, mfn);
859
824 return 0; 860 return 0;
825} 861}
826EXPORT_SYMBOL_GPL(m2p_remove_override); 862EXPORT_SYMBOL_GPL(m2p_remove_override);
diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c
index 3ebba0753d38..a4790bf22c59 100644
--- a/arch/x86/xen/setup.c
+++ b/arch/x86/xen/setup.c
@@ -371,7 +371,8 @@ char * __init xen_memory_setup(void)
371 populated = xen_populate_chunk(map, memmap.nr_entries, 371 populated = xen_populate_chunk(map, memmap.nr_entries,
372 max_pfn, &last_pfn, xen_released_pages); 372 max_pfn, &last_pfn, xen_released_pages);
373 373
374 extra_pages += (xen_released_pages - populated); 374 xen_released_pages -= populated;
375 extra_pages += xen_released_pages;
375 376
376 if (last_pfn > max_pfn) { 377 if (last_pfn > max_pfn) {
377 max_pfn = min(MAX_DOMAIN_PAGES, last_pfn); 378 max_pfn = min(MAX_DOMAIN_PAGES, last_pfn);
diff --git a/arch/xtensa/Makefile b/arch/xtensa/Makefile
index 7608559de93a..f973754ddf90 100644
--- a/arch/xtensa/Makefile
+++ b/arch/xtensa/Makefile
@@ -68,8 +68,8 @@ endif
68 68
69# Only build variant and/or platform if it includes a Makefile 69# Only build variant and/or platform if it includes a Makefile
70 70
71buildvar := $(shell test -a $(srctree)/arch/xtensa/variants/$(VARIANT)/Makefile && echo arch/xtensa/variants/$(VARIANT)/) 71buildvar := $(shell test -e $(srctree)/arch/xtensa/variants/$(VARIANT)/Makefile && echo arch/xtensa/variants/$(VARIANT)/)
72buildplf := $(shell test -a $(srctree)/arch/xtensa/platforms/$(PLATFORM)/Makefile && echo arch/xtensa/platforms/$(PLATFORM)/) 72buildplf := $(shell test -e $(srctree)/arch/xtensa/platforms/$(PLATFORM)/Makefile && echo arch/xtensa/platforms/$(PLATFORM)/)
73 73
74# Find libgcc.a 74# Find libgcc.a
75 75
diff --git a/arch/xtensa/include/asm/syscall.h b/arch/xtensa/include/asm/syscall.h
index 0b9f2e13c781..c1dacca312f3 100644
--- a/arch/xtensa/include/asm/syscall.h
+++ b/arch/xtensa/include/asm/syscall.h
@@ -31,5 +31,5 @@ asmlinkage long sys_pselect6(int n, fd_set __user *inp, fd_set __user *outp,
31asmlinkage long sys_ppoll(struct pollfd __user *ufds, unsigned int nfds, 31asmlinkage long sys_ppoll(struct pollfd __user *ufds, unsigned int nfds,
32 struct timespec __user *tsp, const sigset_t __user *sigmask, 32 struct timespec __user *tsp, const sigset_t __user *sigmask,
33 size_t sigsetsize); 33 size_t sigsetsize);
34 34asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset,
35 35 size_t sigsetsize);
diff --git a/arch/xtensa/kernel/process.c b/arch/xtensa/kernel/process.c
index 9b306e550e3f..2c8d6a3d250a 100644
--- a/arch/xtensa/kernel/process.c
+++ b/arch/xtensa/kernel/process.c
@@ -277,7 +277,7 @@ void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
277 277
278 /* Don't leak any random bits. */ 278 /* Don't leak any random bits. */
279 279
280 memset(elfregs, 0, sizeof (elfregs)); 280 memset(elfregs, 0, sizeof(*elfregs));
281 281
282 /* Note: PS.EXCM is not set while user task is running; its 282 /* Note: PS.EXCM is not set while user task is running; its
283 * being set in regs->ps is for exception handling convenience. 283 * being set in regs->ps is for exception handling convenience.
diff --git a/arch/xtensa/kernel/signal.c b/arch/xtensa/kernel/signal.c
index b9f8e5850d3a..efe4e854b3cd 100644
--- a/arch/xtensa/kernel/signal.c
+++ b/arch/xtensa/kernel/signal.c
@@ -493,7 +493,7 @@ static void do_signal(struct pt_regs *regs)
493 if (ret) 493 if (ret)
494 return; 494 return;
495 495
496 signal_delivered(signr, info, ka, regs, 0); 496 signal_delivered(signr, &info, &ka, regs, 0);
497 if (current->ptrace & PT_SINGLESTEP) 497 if (current->ptrace & PT_SINGLESTEP)
498 task_pt_regs(current)->icountlevel = 1; 498 task_pt_regs(current)->icountlevel = 1;
499 499
diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S
index 88ecea3facb4..ee2e2089483d 100644
--- a/arch/xtensa/kernel/vmlinux.lds.S
+++ b/arch/xtensa/kernel/vmlinux.lds.S
@@ -83,7 +83,6 @@ SECTIONS
83 83
84 _text = .; 84 _text = .;
85 _stext = .; 85 _stext = .;
86 _ftext = .;
87 86
88 .text : 87 .text :
89 { 88 {
@@ -112,7 +111,7 @@ SECTIONS
112 EXCEPTION_TABLE(16) 111 EXCEPTION_TABLE(16)
113 /* Data section */ 112 /* Data section */
114 113
115 _fdata = .; 114 _sdata = .;
116 RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE) 115 RW_DATA_SECTION(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, THREAD_SIZE)
117 _edata = .; 116 _edata = .;
118 117
diff --git a/arch/xtensa/mm/init.c b/arch/xtensa/mm/init.c
index ba150e5de2eb..db955179da2d 100644
--- a/arch/xtensa/mm/init.c
+++ b/arch/xtensa/mm/init.c
@@ -26,11 +26,7 @@
26 26
27#include <asm/bootparam.h> 27#include <asm/bootparam.h>
28#include <asm/page.h> 28#include <asm/page.h>
29 29#include <asm/sections.h>
30/* References to section boundaries */
31
32extern char _ftext, _etext, _fdata, _edata, _rodata_end;
33extern char __init_begin, __init_end;
34 30
35/* 31/*
36 * mem_reserve(start, end, must_exist) 32 * mem_reserve(start, end, must_exist)
@@ -197,9 +193,9 @@ void __init mem_init(void)
197 reservedpages++; 193 reservedpages++;
198 } 194 }
199 195
200 codesize = (unsigned long) &_etext - (unsigned long) &_ftext; 196 codesize = (unsigned long) _etext - (unsigned long) _stext;
201 datasize = (unsigned long) &_edata - (unsigned long) &_fdata; 197 datasize = (unsigned long) _edata - (unsigned long) _sdata;
202 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; 198 initsize = (unsigned long) __init_end - (unsigned long) __init_begin;
203 199
204 printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, " 200 printk("Memory: %luk/%luk available (%ldk kernel code, %ldk reserved, "
205 "%ldk data, %ldk init %ldk highmem)\n", 201 "%ldk data, %ldk init %ldk highmem)\n",
@@ -237,7 +233,7 @@ void free_initrd_mem(unsigned long start, unsigned long end)
237 233
238void free_initmem(void) 234void free_initmem(void)
239{ 235{
240 free_reserved_mem(&__init_begin, &__init_end); 236 free_reserved_mem(__init_begin, __init_end);
241 printk("Freeing unused kernel memory: %dk freed\n", 237 printk("Freeing unused kernel memory: %zuk freed\n",
242 (&__init_end - &__init_begin) >> 10); 238 (__init_end - __init_begin) >> 10);
243} 239}