[IA64] altix: misc pci interrupt related fixes

Fix a couple of altix interrupt related bugs.

Signed-off-by: Mark Maule <maule@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>

2 files changed, 3 insertions, 3 deletions

diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 7b03b8084ffc..1f500c81002c 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -212,13 +212,13 @@ void pcibr_target_interrupt(struct sn_irq_info *sn_irq_info)
                     pdi_pcibus_info;
 
                 /* Disable the device's IRQ   */
-                pcireg_intr_enable_bit_clr(pcibus_info, bit);
+                pcireg_intr_enable_bit_clr(pcibus_info, (1 << bit));
 
                 /* Change the device's IRQ    */
                 pcireg_intr_addr_addr_set(pcibus_info, bit, xtalk_addr);
 
                 /* Re-enable the device's IRQ */
-                pcireg_intr_enable_bit_set(pcibus_info, bit);
+                pcireg_intr_enable_bit_set(pcibus_info, (1 << bit));
 
                 pcibr_force_interrupt(sn_irq_info);
         }
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_reg.c b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
index 4f718c3e93d3..5d534091262c 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_reg.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_reg.c
@@ -131,7 +131,7 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
                         __sn_clrq_relaxed(&ptr->tio.cp_int_enable, bits);
                         break;
                 case PCIBR_BRIDGETYPE_PIC:
-                        __sn_clrq_relaxed(&ptr->pic.p_int_enable, ~bits);
+                        __sn_clrq_relaxed(&ptr->pic.p_int_enable, bits);
                         break;
                 default:
                         panic