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authorStepan Moskovchenko <stepanm@codeaurora.org>2011-03-09 23:12:25 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-10 05:04:30 -0500
commit6fa85e5ce311a8c57fe32cb6403961f7a897112d (patch)
tree14213d22c822e433494b034327901377c8ebba4d /arch
parentbf9dd36091695f1138a98b6ae85d565e60635545 (diff)
ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode
Use the correct I/O address definitions for Footbridge peripherals when the kernel is compiled without MMU support. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-footbridge/include/mach/hardware.h21
-rw-r--r--arch/arm/mach-footbridge/include/mach/io.h10
2 files changed, 22 insertions, 9 deletions
diff --git a/arch/arm/mach-footbridge/include/mach/hardware.h b/arch/arm/mach-footbridge/include/mach/hardware.h
index 51dd902043ad..b6fdf23ecf6c 100644
--- a/arch/arm/mach-footbridge/include/mach/hardware.h
+++ b/arch/arm/mach-footbridge/include/mach/hardware.h
@@ -23,26 +23,33 @@
23 * 0xf9000000 0x50000000 1MB Cache flush 23 * 0xf9000000 0x50000000 1MB Cache flush
24 * 0xf0000000 0x80000000 16MB ISA memory 24 * 0xf0000000 0x80000000 16MB ISA memory
25 */ 25 */
26
27#ifdef CONFIG_MMU
28#define MMU_IO(a, b) (a)
29#else
30#define MMU_IO(a, b) (b)
31#endif
32
26#define XBUS_SIZE 0x00100000 33#define XBUS_SIZE 0x00100000
27#define XBUS_BASE 0xff800000 34#define XBUS_BASE MMU_IO(0xff800000, 0x40000000)
28 35
29#define ARMCSR_SIZE 0x00100000 36#define ARMCSR_SIZE 0x00100000
30#define ARMCSR_BASE 0xfe000000 37#define ARMCSR_BASE MMU_IO(0xfe000000, 0x42000000)
31 38
32#define WFLUSH_SIZE 0x00100000 39#define WFLUSH_SIZE 0x00100000
33#define WFLUSH_BASE 0xfd000000 40#define WFLUSH_BASE MMU_IO(0xfd000000, 0x78000000)
34 41
35#define PCIIACK_SIZE 0x00100000 42#define PCIIACK_SIZE 0x00100000
36#define PCIIACK_BASE 0xfc000000 43#define PCIIACK_BASE MMU_IO(0xfc000000, 0x79000000)
37 44
38#define PCICFG1_SIZE 0x01000000 45#define PCICFG1_SIZE 0x01000000
39#define PCICFG1_BASE 0xfb000000 46#define PCICFG1_BASE MMU_IO(0xfb000000, 0x7a000000)
40 47
41#define PCICFG0_SIZE 0x01000000 48#define PCICFG0_SIZE 0x01000000
42#define PCICFG0_BASE 0xfa000000 49#define PCICFG0_BASE MMU_IO(0xfa000000, 0x7b000000)
43 50
44#define PCIMEM_SIZE 0x01000000 51#define PCIMEM_SIZE 0x01000000
45#define PCIMEM_BASE 0xf0000000 52#define PCIMEM_BASE MMU_IO(0xf0000000, 0x80000000)
46 53
47#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000)) 54#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
48#define XBUS_LED_AMBER (1 << 0) 55#define XBUS_LED_AMBER (1 << 0)
diff --git a/arch/arm/mach-footbridge/include/mach/io.h b/arch/arm/mach-footbridge/include/mach/io.h
index 101a4fe90bde..32e4cc397c28 100644
--- a/arch/arm/mach-footbridge/include/mach/io.h
+++ b/arch/arm/mach-footbridge/include/mach/io.h
@@ -14,8 +14,14 @@
14#ifndef __ASM_ARM_ARCH_IO_H 14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H 15#define __ASM_ARM_ARCH_IO_H
16 16
17#define PCIO_SIZE 0x00100000 17#ifdef CONFIG_MMU
18#define PCIO_BASE 0xff000000 18#define MMU_IO(a, b) (a)
19#else
20#define MMU_IO(a, b) (b)
21#endif
22
23#define PCIO_SIZE 0x00100000
24#define PCIO_BASE MMU_IO(0xff000000, 0x7c000000)
19 25
20#define IO_SPACE_LIMIT 0xffff 26#define IO_SPACE_LIMIT 0xffff
21 27